From 1ec914c5db79578b48b98030be0c67210ffb3f62 Mon Sep 17 00:00:00 2001 From: TimWang Date: Wed, 3 Jun 2020 19:08:28 +0800 Subject: [PATCH] targets:lpspi: Update the lpspi driver and api Change the lpspi default transfer delays to fix the data corruption issue. Add the loop and judgement to retry transfer when spi bus is busy. Add the judgement statement to fix the hang issue. Signed-off-by: TimWang --- .../TARGET_IMX/spi_api.c | 17 +++++++++----- .../TARGET_MIMXRT1050/drivers/fsl_lpspi.c | 22 +++++++++++-------- 2 files changed, 24 insertions(+), 15 deletions(-) mode change 100644 => 100755 targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/spi_api.c mode change 100644 => 100755 targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_lpspi.c diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/spi_api.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/spi_api.c old mode 100644 new mode 100755 index 5463cd693c..5ad8697076 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/spi_api.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/spi_api.c @@ -124,16 +124,21 @@ int spi_master_write(spi_t *obj, int value) int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill) { int total = (tx_length > rx_length) ? tx_length : rx_length; + int ret; // Default write is done in each and every call, in future can create HAL API instead LPSPI_SetDummyData(spi_address[obj->instance], write_fill); - LPSPI_MasterTransferBlocking(spi_address[obj->instance], &(lpspi_transfer_t){ - .txData = (uint8_t *)tx_buffer, - .rxData = (uint8_t *)rx_buffer, - .dataSize = total, - .configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_SlaveByteSwap, - }); + do + { + ret = LPSPI_MasterTransferBlocking(spi_address[obj->instance], &(lpspi_transfer_t){ + .txData = (uint8_t *)tx_buffer, + .rxData = (uint8_t *)rx_buffer, + .dataSize = total, + .configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous | kLPSPI_SlaveByteSwap, + }); + + } while((ret == kStatus_LPSPI_Busy)); return total; } diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_lpspi.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_lpspi.c old mode 100644 new mode 100755 index dbfbe38c98..13b902877a --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_lpspi.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_lpspi.c @@ -258,9 +258,9 @@ void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig) masterConfig->cpha = kLPSPI_ClockPhaseFirstEdge; masterConfig->direction = kLPSPI_MsbFirst; - masterConfig->pcsToSckDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2; - masterConfig->lastSckToPcsDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2; - masterConfig->betweenTransferDelayInNanoSec = 1000000000 / masterConfig->baudRate * 2; + masterConfig->pcsToSckDelayInNanoSec = 80; + masterConfig->lastSckToPcsDelayInNanoSec = 60; + masterConfig->betweenTransferDelayInNanoSec = 160; masterConfig->whichPcs = kLPSPI_Pcs0; masterConfig->pcsActiveHighOrLow = kLPSPI_PcsActiveLow; @@ -871,14 +871,18 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf { } - if (txData) + /* To prevent rxfifo overflow, ensure transmitting and receiving are executed in parallel */ + if(((NULL == rxData) || (rxRemainingByteCount - txRemainingByteCount)/bytesEachRead < fifoSize)) { - wordToSend = LPSPI_CombineWriteData(txData, bytesEachWrite, isByteSwap); - txData += bytesEachWrite; - } + if (txData) + { + wordToSend = LPSPI_CombineWriteData(txData, bytesEachWrite, isByteSwap); + txData += bytesEachWrite; + } - LPSPI_WriteData(base, wordToSend); - txRemainingByteCount -= bytesEachWrite; + LPSPI_WriteData(base, wordToSend); + txRemainingByteCount -= bytesEachWrite; + } /*Check whether there is RX data in RX FIFO . Read out the RX data so that the RX FIFO would not overrun.*/ if (rxData)