diff --git a/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.c b/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.c
index a07f8c4bc8..71d93e76f6 100644
--- a/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.c
+++ b/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.c
@@ -51,6 +51,7 @@ void FPUEnable(void);
 
 uint32_t IRQNestLevel;
 unsigned char seen_id0_active = 0; // single byte to hold a flag used in the workaround for GIC errata 733075
+uint32_t SystemCoreClock = CM0_RENESAS_RZ_A1_I_CLK;     /*!< System Clock Frequency (Core Clock)  */
 
 
 /**
@@ -198,6 +199,20 @@ uint32_t InterruptHandlerUnregister (IRQn_Type irq)
     }
 }
 
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock.
+ */
+void SystemCoreClockUpdate (void)
+{
+    SystemCoreClock = CM0_RENESAS_RZ_A1_I_CLK;
+}
+
+
 /**
  * Initialize the system
  *
diff --git a/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.h b/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.h
index 832e58bb91..bd7ba03809 100644
--- a/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.h
+++ b/hal/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/system_MBRZA1H.h
@@ -43,6 +43,8 @@
 extern "C" {
 #endif
 
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
 typedef void(*IRQHandler)();
 uint32_t InterruptHandlerRegister(IRQn_Type, IRQHandler);
 uint32_t InterruptHandlerUnregister(IRQn_Type);
diff --git a/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.c b/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.c
index 04bfbd0935..d97ccae069 100644
--- a/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.c
+++ b/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.c
@@ -51,6 +51,7 @@ void FPUEnable(void);
 
 uint32_t IRQNestLevel;
 unsigned char seen_id0_active = 0; // single byte to hold a flag used in the workaround for GIC errata 733075
+uint32_t SystemCoreClock = CM0_RENESAS_RZ_A1_I_CLK;     /*!< System Clock Frequency (Core Clock)  */
 
 
 /**
@@ -198,6 +199,20 @@ uint32_t InterruptHandlerUnregister (IRQn_Type irq)
     }
 }
 
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock.
+ */
+void SystemCoreClockUpdate (void)
+{
+    SystemCoreClock = CM0_RENESAS_RZ_A1_I_CLK;
+}
+
+
 /**
  * Initialize the system
  *
diff --git a/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.h b/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.h
index bc7637b39d..f04b37b8a4 100644
--- a/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.h
+++ b/hal/targets/cmsis/TARGET_RENESAS/TARGET_VK_RZ_A1H/system_VKRZA1H.h
@@ -43,6 +43,8 @@
 extern "C" {
 #endif
 
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
 typedef void(*IRQHandler)();
 uint32_t InterruptHandlerRegister(IRQn_Type, IRQHandler);
 uint32_t InterruptHandlerUnregister(IRQn_Type);