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Merge pull request #13611 from alcheagle/stm32l071xx-fixes 

Edit on Toolchain linker files for stm32L071xx target
pull/13691/head
Martin Kojtal 2020-09-30 16:00:20 +01:00 committed by GitHub
parent efd385d6ce b99702094c
commit 1dea16bc58
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 3501 additions and 3535 deletions
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42
targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/startup_stm32l071xx.S
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@ -1,15 +1,4 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
*
* Copyright (c) 2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
/**
******************************************************************************
* @file startup_stm32l071xx.s
* @author MCD Application Team
@ -23,6 +12,30 @@
* After Reset the Cortex-M0+ processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
.syntax unified
@ -85,9 +98,10 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
//bl __libc_init_array
/* Call the application's entry point.*/
bl main
//bl main
bl _start
LoopForever:
b LoopForever

2
targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/cmsis_nvic.h
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@ -32,7 +32,7 @@
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 32
#define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif

3841
targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/stm32l071xx.h
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15
targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/stm32l0xx.h
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@ -87,6 +87,10 @@
|(__STM32L0xx_CMSIS_VERSION_SUB2 << 8 )\
|(__STM32L0xx_CMSIS_VERSION_RC))
/**
* @}
*/
/** @addtogroup Device_Included
* @{
*/
@ -111,13 +115,11 @@
#elif defined(STM32L061xx)
#include "stm32l061xx.h"
#elif defined(STM32L071xx)
//#include "stm32l073xx.h"
#include "stm32l071xx.h"
#elif defined(STM32L072xx)
#include "stm32l072xx.h"
#elif defined(STM32L073xx)
#include "stm32l071xx.h"
//#include "stm32l073xx.h"
#include "stm32l073xx.h"
#elif defined(STM32L082xx)
#include "stm32l082xx.h"
#elif defined(STM32L083xx)
@ -176,10 +178,6 @@ typedef enum
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
#ifdef __cplusplus
}
#endif /* __cplusplus */
/**
* @}
*/
@ -188,6 +186,9 @@ typedef enum
#include "stm32l0xx_hal.h"
#endif /* USE_HAL_DRIVER */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __STM32L0xx_H */
/**