ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

UART 2 is enabled. 

Until now, only UART 0, 1 are enabled, but now UART 2 is also enabled.
W7500P should need UART 2 because DAP use UART 2.
pull/1324/head
hjjeon0608 2015-09-08 08:44:22 +09:00
parent 9c584b1ac7
commit 1c607a6c7a
4 changed files with 245 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/PeripheralNames.h
View File

@ -43,7 +43,8 @@ typedef enum {
typedef enum {
UART_0 = (int)W7500x_UART0_BASE,
UART_1 = (int)W7500x_UART1_BASE
UART_1 = (int)W7500x_UART1_BASE,
UART_2 = (int)W7500x_UART2_BASE
} UARTName;

66
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/W7500x_Peripheral_Library/W7500x_uart.c
View File

@ -208,13 +208,24 @@ void S_UART_DeInit()
uint32_t S_UART_Init(uint32_t baud)
{
uint32_t tmpreg=0x00;
uint32_t uartclock = 0x00, integer_baud = 0x00;
assert_param(IS_UART_MODE(S_UART_InitStruct->UART_Mode));
S_UART_SetBaud(baud);
tmpreg = UART2->CTRL;
tmpreg &= ~(S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
tmpreg |= (S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
UART2->CTRL = tmpreg;
return 0;
}
void S_UART_SetBaud(uint32_t baud)
{
uint32_t uartclock = 0x00, integer_baud = 0x00;
if(CRG->FCLK_SSR == CRG_FCLK_SSR_RCLK)
{
uartclock = INTERN_XTAL;
uartclock = INTERN_XTAL;
}
else if(CRG->FCLK_SSR == CRG_FCLK_SSR_OCLK)
{
@ -227,18 +238,11 @@ uint32_t S_UART_Init(uint32_t baud)
integer_baud = (uint32_t)(uartclock / baud);
UART2->BAUDDIV = integer_baud;
tmpreg = UART2->CTRL;
tmpreg &= ~(S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
tmpreg |= (S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
UART2->CTRL = tmpreg;
return 0;
}
void S_UART_SendData(uint16_t Data)
{
while(UART2->STATE & S_UART_STATE_TX_BUF_FULL);
while(UART2->STATE & S_UART_STATE_TX_BUF_FULL);
UART2->DATA = Data;
}
@ -248,13 +252,13 @@ uint16_t S_UART_ReceiveData()
}
FlagStatus S_UART_GetFlagStatus(uint16_t S_UART_FLAG)
FlagStatus S_UART_GetFlagStatus(uint16_t S_UART_STATE)
{
FlagStatus bitstatus = RESET;
assert_param(IS_S_UART_FLAG(S_UART_FLAG));
assert_param(IS_S_UART_STATE(S_UART_STATE));
if ((UART2->STATE & S_UART_FLAG) != (uint16_t)RESET)
if ((UART2->STATE & S_UART_STATE) != (FlagStatus)RESET)
{
bitstatus = SET;
}
@ -266,28 +270,40 @@ FlagStatus S_UART_GetFlagStatus(uint16_t S_UART_FLAG)
return bitstatus;
}
void S_UART_ITConfig(uint16_t S_UART_IT, FunctionalState NewState)
void S_UART_SetCTRL(uint16_t S_UART_CTRL, FunctionalState NewState)
{
assert_param(IS_S_UART_IT_FLAG(S_UART_IT));
if ( NewState != DISABLE )
{
UART2->CTRL |= S_UART_CTRL;
}
else
{
UART2->CTRL &= ~(S_UART_CTRL);
}
}
void S_UART_ITConfig(uint16_t S_UART_CTRL, FunctionalState NewState)
{
assert_param(IS_S_UART_CTRL_FLAG(S_UART_CTRL));
if ( NewState != DISABLE )
{
UART2->CTRL |= S_UART_IT;
UART2->CTRL |= S_UART_CTRL;
}
else
{
UART2->CTRL &= ~(S_UART_IT);
UART2->CTRL &= ~(S_UART_CTRL);
}
}
ITStatus S_UART_GetITStatus(uint16_t S_UART_IT)
ITStatus S_UART_GetITStatus(uint16_t S_UART_INTSTATUS)
{
ITStatus bitstatus = RESET;
assert_param(IS_S_UART_IT_FLAG(S_UART_IT));
assert_param(IS_S_UART_INTSATUS(S_UART_INTSTATUS));
if ((UART2->INT.STATUS & (S_UART_IT >> 2)) != (uint16_t) RESET)
if ((UART2->INT.STATUS & (S_UART_INTSTATUS)) != (uint16_t) RESET)
{
bitstatus = SET;
}
@ -299,11 +315,11 @@ ITStatus S_UART_GetITStatus(uint16_t S_UART_IT)
return bitstatus;
}
void S_UART_ClearITPendingBit(uint16_t S_UART_IT)
void S_UART_ClearITPendingBit(uint16_t S_UART_INTSTATUS)
{
assert_param(IS_S_UART_IT_FLAG(S_UART_IT));
assert_param(IS_S_UART_INTSATUS(S_UART_INTSTATUS));
UART2->INT.CLEAR |= (S_UART_IT >> 2);
UART2->INT.CLEAR |= (S_UART_INTSTATUS);
}

72
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/W7500x_Peripheral_Library/W7500x_uart.h
View File

@ -224,12 +224,32 @@ typedef struct
/** @addtogroup S_UART_Flags
* @{
*/
#define S_UART_FLAG_RXO ((uint16_t)0x01UL << 3) /*!< RX buffer Overrun */
#define S_UART_FLAG_TXO ((uint16_t)0x01UL << 2) /*!< TX buffer Overrun */
#define S_UART_FLAG_RXF ((uint16_t)0x01UL << 1) /*!< RX buffer Full */
#define S_UART_FLAG_TXF ((uint16_t)0x01UL << 0) /*!< TX buffer Full */
#define IS_S_UART_FLAG(FLAG) (((FLAG) == S_UART_FLAG_RXO) || ((FLAG) == S_UART_FLAG_TXO) || \
((FLAG) == S_UART_FLAG_RXF) || ((FLAG) == S_UART_FLAG_TXF))
#define S_UART_STATE_RXO ((uint16_t)0x01UL << 3) /*!< RX buffer Overrun */
#define S_UART_STATE_TXO ((uint16_t)0x01UL << 2) /*!< TX buffer Overrun */
#define S_UART_STATE_RXF ((uint16_t)0x01UL << 1) /*!< RX buffer Full */
#define S_UART_STATE_TXF ((uint16_t)0x01UL << 0) /*!< TX buffer Full */
#define IS_S_UART_STATE(FLAG) (((FLAG) == S_UART_STATE_RXO) || ((FLAG) == S_UART_STATE_TXO) || \
((FLAG) == S_UART_STATE_RXF) || ((FLAG) == S_UART_STATE_TXF))
/**
* @}
*/
/** @addtogroup S_UART_CTRL_Flags
* @{
*/
#define S_UART_CTRL_RXOI ((uint16_t)0x01UL << 5) /*!< RX overrun interrupt */
#define S_UART_CTRL_TXOI ((uint16_t)0x01UL << 4) /*!< TX overrun interrupt */
#define S_UART_CTRL_RXI ((uint16_t)0x01UL << 3) /*!< RX interrupt */
#define S_UART_CTRL_TXI ((uint16_t)0x01UL << 2) /*!< TX interrupt */
#define S_UART_CTRL_RX ((uint16_t)0x01UL << 1) /*!< RX */
#define S_UART_CTRL_TX ((uint16_t)0x01UL << 0) /*!< TX */
#define IS_S_UART_CTRL_FLAG(FLAG) (((FLAG) == S_UART_CTRL_FLAG_RXOI) || ((FLAG) == S_UART_CTRL_FLAG_TXOI) || \
((FLAG) == S_UART_CTRL_FLAG_RXI) || ((FLAG) == S_UART_CTRL_FLAG_TXI) || \
((FLAG) == S_UART_CTRL_FLAG_RX) || ((FLAG) == S_UART_CTRL_FLAG_TX))
/**
* @}
*/
@ -239,13 +259,12 @@ typedef struct
* @{
*/
#define S_UART_IT_FLAG_RXOI ((uint16_t)0x01UL << 5) /*!< RX overrun interrupt */
#define S_UART_IT_FLAG_TXOI ((uint16_t)0x01UL << 4) /*!< TX overrun interrupt */
#define S_UART_IT_FLAG_RXI ((uint16_t)0x01UL << 3) /*!< RX interrupt */
#define S_UART_IT_FLAG_TXI ((uint16_t)0x01UL << 2) /*!< TX interrupt */
#define IS_S_UART_IT_FLAG(FLAG) (((FLAG) == S_UART_IT_FLAG_RXOI) || ((FLAG) == S_UART_IT_FLAG_TXOI) || \
((FLAG) == S_UART_IT_FLAG_RXI) || ((FLAG) == S_UART_IT_FLAG_TXI))
#define S_UART_INTSTATUS_RXOI ((uint16_t)0x01UL << 3) /*!< RX overrun interrupt */
#define S_UART_INTSTATUS_TXOI ((uint16_t)0x01UL << 2) /*!< TX overrun interrupt */
#define S_UART_INTSTATUS_RXI ((uint16_t)0x01UL << 1) /*!< RX interrupt */
#define S_UART_INTSTATUS_TXI ((uint16_t)0x01UL << 0) /*!< TX interrupt */
#define IS_S_UART_INTSTATUS(FLAG) (((FLAG) == S_UART_INTSTATUS_RXOI) || ((FLAG) == S_UART_INTSTATUS_TXOI) || \
((FLAG) == S_UART_INTSTATUS_RXI) || ((FLAG) == S_UART_INTSTATUS_TXI))
/**
* @}
*/
@ -263,21 +282,26 @@ void UART_ITConfig (UART_TypeDef* UARTx, uint16_t UART_IT, Func
ITStatus UART_GetITStatus (UART_TypeDef* UARTx, uint16_t UART_IT);
void UART_ClearITPendingBit (UART_TypeDef* UARTx, uint16_t UART_IT);
void S_UART_DeInit(void);
uint32_t S_UART_Init(uint32_t baud);
void S_UART_SendData(uint16_t Data);
uint16_t S_UART_ReceiveData(void);
uint8_t UartPutc (UART_TypeDef* UARTx, uint8_t ch);
void UartPuts (UART_TypeDef* UARTx, uint8_t *str);
uint8_t UartGetc (UART_TypeDef* UARTx);
uint8_t S_UartPutc(uint8_t ch);
void S_UartPuts(uint8_t *str);
uint8_t S_UartGetc(void);
void S_UART_DeInit (void);
uint32_t S_UART_Init (uint32_t baud);
void S_UART_SetBaud (uint32_t baud);
void S_UART_SetCTRL (uint16_t S_UART_CTRL, FunctionalState NewState);
void S_UART_SendData (uint16_t Data);
uint16_t S_UART_ReceiveData(void);
uint8_t S_UartPutc (uint8_t ch);
void S_UartPuts (uint8_t *str);
uint8_t S_UartGetc (void);
FlagStatus S_UART_GetFlagStatus (uint16_t S_UART_STATE);
void S_UART_ITConfig (uint16_t S_UART_CTRL, FunctionalState NewState);
ITStatus S_UART_GetITStatus (uint16_t S_UART_IT);
void S_UART_ClearITPendingBit(uint16_t S_UART_IT);
#ifdef __cplusplus

206
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/serial_api.c
View File

@ -39,9 +39,9 @@
#include "PeripheralPins.h"
#include "W7500x_uart.h"
#define UART_NUM (2)
#define UART_NUM (3)
static uint32_t serial_irq_ids[UART_NUM] = {0, 0};
static uint32_t serial_irq_ids[UART_NUM] = {0, 0, 0};
static uart_irq_handler irq_handler;
@ -55,23 +55,46 @@ serial_t stdio_uart;
static void init_uart(serial_t *obj)
{
UART = (UART_TypeDef *)(obj->uart);
UART_InitStructure.UART_BaudRate = obj->baudrate;
UART_InitStructure.UART_WordLength = obj->databits;
UART_InitStructure.UART_StopBits = obj->stopbits;
UART_InitStructure.UART_Parity = obj->parity;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
if(obj->index == 2) // For UART2, It is simple UART.
{
SystemCoreClockUpdate();
//S_UART_Init(obj->baudrate);
S_UART_SetCTRL((S_UART_CTRL_RX_EN|S_UART_CTRL_TX_EN), DISABLE);
S_UART_SetBaud(obj->baudrate);
if (obj->pin_rx == NC) {
UART_InitStructure.UART_Mode = UART_Mode_Tx;
} else if (obj->pin_tx == NC) {
UART_InitStructure.UART_Mode = UART_Mode_Rx;
} else {
UART_InitStructure.UART_Mode = (UART_Mode_Rx | UART_Mode_Tx);
if(obj->pin_rx == NC)
{
S_UART_SetCTRL(S_UART_CTRL_TX_EN, ENABLE);
}
else if(obj->pin_tx == NC)
{
S_UART_SetCTRL(S_UART_CTRL_RX_EN, ENABLE);
}
else
{
S_UART_SetCTRL((S_UART_CTRL_TX_EN|S_UART_CTRL_RX_EN),ENABLE);
}
}
else // For UART0 and UART1.
{
UART = (UART_TypeDef *)(obj->uart);
UART_InitStructure.UART_BaudRate = obj->baudrate;
UART_InitStructure.UART_WordLength = obj->databits;
UART_InitStructure.UART_StopBits = obj->stopbits;
UART_InitStructure.UART_Parity = obj->parity;
UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
UART_Init(UART,&UART_InitStructure);
if (obj->pin_rx == NC) {
UART_InitStructure.UART_Mode = UART_Mode_Tx;
} else if (obj->pin_tx == NC) {
UART_InitStructure.UART_Mode = UART_Mode_Rx;
} else {
UART_InitStructure.UART_Mode = (UART_Mode_Rx | UART_Mode_Tx);
}
UART_Init(UART,&UART_InitStructure);
}
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
@ -94,6 +117,10 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
obj->index = 1;
}
if (obj->uart == UART_2) {
obj->index = 2;
}
// Configure the UART pins
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
@ -131,11 +158,8 @@ void serial_free(serial_t *obj)
if (obj->uart == UART_1) {
}
// Configure GPIOs
// pin_function(obj->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
// pin_function(obj->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
if (obj->uart == UART_2) {
}
serial_irq_ids[obj->index] = 0;
}
@ -195,6 +219,20 @@ static void uart_irq(UARTName name, int id)
}
}
static void uart2_irq()
{
if(serial_irq_ids[2] != 0){
if( S_UART_GetITStatus(S_UART_INTSTATUS_TXI) != RESET ){
S_UART_ClearITPendingBit(S_UART_INTSTATUS_TXI);
irq_handler(serial_irq_ids[2], TxIrq);
}
if( S_UART_GetITStatus(S_UART_INTSTATUS_RXI) != RESET ) {
S_UART_ClearITPendingBit(S_UART_INTSTATUS_RXI);
irq_handler(serial_irq_ids[2], RxIrq);
}
}
}
#ifdef __cplusplus
extern "C"{
#endif
@ -207,6 +245,11 @@ void UART1_Handler()
{
uart_irq(UART_1, 1);
}
void UART2_Handler()
{
uart2_irq();
}
#ifdef __cplusplus
}
#endif
@ -222,28 +265,49 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
IRQn_Type irq_n = (IRQn_Type)0;
UART = (UART_TypeDef *)(obj->uart);
if (obj->uart == UART_0) {
irq_n = UART0_IRQn;
if (obj->uart == UART_2)
{
irq_n = UART2_IRQn;
if (enable){
if (irq == RxIrq){
S_UART_ITConfig(S_UART_CTRL_RXI,ENABLE);
} else {
S_UART_ITConfig(S_UART_CTRL_TXI,ENABLE);
}
NVIC_ClearPendingIRQ(irq_n);
NVIC_EnableIRQ(irq_n);
} else { // disable
S_UART_ITConfig((S_UART_CTRL_RXI|S_UART_CTRL_TXI),DISABLE);
NVIC_DisableIRQ(irq_n);
}
}
if (obj->uart == UART_1) {
irq_n = UART1_IRQn;
}
if (enable) {
if (irq == RxIrq) {
UART_ITConfig(UART,UART_IT_FLAG_RXI,ENABLE);
} else { // TxIrq
UART_ITConfig(UART,UART_IT_FLAG_TXI,ENABLE);
else
{
UART = (UART_TypeDef *)(obj->uart);
if (obj->uart == UART_0) {
irq_n = UART0_IRQn;
}
NVIC_ClearPendingIRQ(irq_n);
NVIC_EnableIRQ(irq_n);
} else { // disable
UART_ITConfig(UART,(UART_IT_FLAG_RXI|UART_IT_FLAG_TXI),DISABLE);
NVIC_DisableIRQ(irq_n);
if (obj->uart == UART_1) {
irq_n = UART1_IRQn;
}
if (enable) {
if (irq == RxIrq) {
UART_ITConfig(UART,UART_IT_FLAG_RXI,ENABLE);
} else { // TxIrq
UART_ITConfig(UART,UART_IT_FLAG_TXI,ENABLE);
}
NVIC_ClearPendingIRQ(irq_n);
NVIC_EnableIRQ(irq_n);
} else { // disable
UART_ITConfig(UART,(UART_IT_FLAG_RXI|UART_IT_FLAG_TXI),DISABLE);
NVIC_DisableIRQ(irq_n);
}
}
}
@ -253,36 +317,74 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
int serial_getc(serial_t *obj)
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
// while(!serial_readable(obj));
while(uart->FR & UART_FR_RXFE);
if (obj->uart == UART_2)
{
S_UART_TypeDef *uart = (S_UART_TypeDef *)(obj->uart);
return (uart->DR & 0xFF);
while( (uart->STATE & S_UART_STATE_RX_BUF_FULL) == 0 );
return (uint16_t)(uart->DATA);
}
else
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
while(uart->FR & UART_FR_RXFE);
return (uart->DR & 0xFF);
}
}
void serial_putc(serial_t *obj, int c)
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
if (obj->uart == UART_2)
{
S_UART_TypeDef *uart = (S_UART_TypeDef *)(obj->uart);
uart->DR = (uint32_t)(c & (uint16_t)0xFF);
while(uart->FR & UART_FR_BUSY);
while(uart->STATE & S_UART_STATE_TX_BUF_FULL);
uart->DATA = (uint32_t)(c & (uint16_t)0xFF);
}
else
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
uart->DR = (uint32_t)(c & (uint16_t)0xFF);
while(uart->FR & UART_FR_BUSY);
}
}
int serial_readable(serial_t *obj)
{
int status;
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
// Check if data is received
status = ((uart->FR & UART_FR_RXFE) ? 0: 1);
if (obj->uart == UART_2)
{
S_UART_TypeDef *uart = (S_UART_TypeDef *)(obj->uart);
status = ((uart->STATE & S_UART_STATE_RX_BUF_FULL) ? 1 : 0);
}
else
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
// Check if data is received
status = ((uart->FR & UART_FR_RXFE) ? 0: 1);
}
return status;
}
int serial_writable(serial_t *obj)
{
int status;
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
// Check if data is transmitted
status = ((uart->FR & UART_FR_BUSY) ? 0: 1);
if (obj->uart == UART_2)
{
S_UART_TypeDef *uart = (S_UART_TypeDef *)(obj->uart);
status = ((uart->STATE & S_UART_STATE_TX_BUF_FULL) ? 0 : 1);
}
else
{
UART_TypeDef *uart = (UART_TypeDef *)(obj->uart);
// Check if data is transmitted
status = ((uart->FR & UART_FR_BUSY) ? 0: 1);
}
return status;
}