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Merge pull request #4869 from toyowata/lpc_spi_fix 

HAL LPCs SPI: Fix mask bits for SPI clock rate
pull/4935/head
Jimmy Brisson 2017-08-14 11:40:25 -05:00 committed by GitHub
parent 96074417b2 da7fa0dd2a
commit 1c41a9b920
8 changed files with 16 additions and 16 deletions
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4
targets/TARGET_NXP/TARGET_LPC11U6X/spi_api.c
View File

@ -110,7 +110,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC11UXX/spi_api.c
View File

@ -76,7 +76,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -112,7 +112,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c
View File

@ -112,7 +112,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -148,7 +148,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC13XX/spi_api.c
View File

@ -104,7 +104,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -140,7 +140,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC176X/spi_api.c
View File

@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -146,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/spi_api.c
View File

@ -118,7 +118,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -153,7 +153,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c
View File

@ -98,7 +98,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -133,7 +133,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;

4
targets/TARGET_NXP/TARGET_LPC43XX/spi_api.c
View File

@ -117,7 +117,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
int FRF = 0; // FRF (frame format) = SPI
uint32_t tmp = obj->spi->CR0;
tmp &= ~(0xFFFF);
tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
tmp |= DSS << 0
| FRF << 4
| SPO << 6
@ -152,7 +152,7 @@ void spi_frequency(spi_t *obj, int hz) {
obj->spi->CPSR = prescaler;
// divider
obj->spi->CR0 &= ~(0xFFFF << 8);
obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
obj->spi->CR0 |= (divider - 1) << 8;
ssp_enable(obj);
return;