diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/system_LPC15xx.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/system_LPC15xx.c
index a44d08200f..86dbd933ed 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/system_LPC15xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC15XX/system_LPC15xx.c
@@ -156,7 +156,7 @@
 //            <2=> P = 4
 //            <3=> P = 8
 //     </h>
-#define SCTPLLCTRL_Val        0x00000023              // Reset value: 0x000
+#define SCTPLLCTRL_Val        0x00000005              // Reset value: 0x000
 //
 //     <o.0..1> SCT PLL Clock Source Select (SCTPLLCLKSEL.SEL)
 //                   <0=> IRC Oscillator
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c
index 1387d9da01..1954a7d612 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c
@@ -30,6 +30,7 @@ void us_ticker_init(void) {
     
     // Clear peripheral reset the SCT0:
     LPC_SYSCON->PRESETCTRL1 |= (1 << 2);
+    LPC_SYSCON->PRESETCTRL1 &= ~(1 << 2);
     
     // Unified counter (32 bits)
     LPC_SCT0->CONFIG |= 1;