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Update GeneratedSource files for 064B0S2 using psoc6pdl-1.6.0.4266-rc3

pull/13122/head
Roman Okhrimenko 2020-06-18 10:16:22 +03:00
parent 611c95614d
commit 1bd215ba1a
14 changed files with 805 additions and 688 deletions
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2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
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@ -5,7 +5,7 @@
* Wrapper function to initialize all generated code.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.h
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@ -5,7 +5,7 @@
* Simple wrapper header containing all generated files.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.timestamp
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@ -5,7 +5,7 @@
* Sentinel file for determining if generated source is up to date.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
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@ -5,7 +5,7 @@
* Clock configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.h
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@ -5,7 +5,7 @@
* Clock configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_notices.h
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@ -6,7 +6,7 @@
* design.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
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@ -5,7 +5,7 @@
* Peripheral Hardware Block configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.h
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@ -5,7 +5,7 @@
* Peripheral Hardware Block configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
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@ -5,7 +5,7 @@
* Pin configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h
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@ -5,7 +5,7 @@
* Pin configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c
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@ -5,7 +5,7 @@
* Establishes all necessary connections between hardware elements.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*

16
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.h
View File

@ -5,7 +5,7 @@
* Establishes all necessary connections between hardware elements.
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*
@ -38,20 +38,20 @@ void init_cycfg_routing(void);
#define init_cycfg_connectivity() init_cycfg_routing()
#define ioss_0_port_0_pin_0_ANALOG P0_0_SRSS_WCO_IN
#define ioss_0_port_0_pin_1_ANALOG P0_1_SRSS_WCO_OUT
#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_6_pin_4_HSIOM P6_4_CPUSS_SWJ_SWO_TDO
#define ioss_0_port_6_pin_6_HSIOM P6_6_CPUSS_SWJ_SWDIO_TMS
#define ioss_0_port_6_pin_7_HSIOM P6_7_CPUSS_SWJ_SWCLK_TCLK
#define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_4_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_5_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_8_pin_7_HSIOM HSIOM_SEL_AMUXB
#define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_AMUXA
#define ioss_0_port_8_pin_7_HSIOM HSIOM_SEL_AMUXA
#if defined(__cplusplus)
}

123
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
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@ -5,7 +5,7 @@
* System configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*
@ -121,351 +121,467 @@ __WEAK void cycfg_ClockStartupError(uint32_t error)
#ifdef CY_CFG_PWR_ENABLED
secure_config->powerEnable = CY_CFG_PWR_ENABLED;
#endif /* CY_CFG_PWR_ENABLED */
#ifdef CY_CFG_PWR_USING_LDO
secure_config->ldoEnable = CY_CFG_PWR_USING_LDO;
#endif /* CY_CFG_PWR_USING_LDO */
#ifdef CY_CFG_PWR_USING_PMIC
secure_config->pmicEnable = CY_CFG_PWR_USING_PMIC;
#endif /* CY_CFG_PWR_USING_PMIC */
#ifdef CY_CFG_PWR_VBACKUP_USING_VDDD
secure_config->vBackupVDDDEnable = CY_CFG_PWR_VBACKUP_USING_VDDD;
#endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
#ifdef CY_CFG_PWR_USING_ULP
secure_config->ulpEnable = CY_CFG_PWR_USING_ULP;
#endif /* CY_CFG_PWR_USING_ULP */
#ifdef CY_CFG_SYSCLK_ECO_ENABLED
secure_config->ecoEnable = CY_CFG_SYSCLK_ECO_ENABLED;
#endif /* CY_CFG_SYSCLK_ECO_ENABLED */
#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
secure_config->extClkEnable = CY_CFG_SYSCLK_EXTCLK_ENABLED;
#endif /* CY_CFG_SYSCLK_EXTCLK_ENABLED */
#ifdef CY_CFG_SYSCLK_ILO_ENABLED
secure_config->iloEnable = CY_CFG_SYSCLK_ILO_ENABLED;
#endif /* CY_CFG_SYSCLK_ILO_ENABLED */
#ifdef CY_CFG_SYSCLK_WCO_ENABLED
secure_config->wcoEnable = CY_CFG_SYSCLK_WCO_ENABLED;
#endif /* CY_CFG_SYSCLK_WCO_ENABLED */
#ifdef CY_CFG_SYSCLK_FLL_ENABLED
secure_config->fllEnable = CY_CFG_SYSCLK_FLL_ENABLED;
#endif /* CY_CFG_SYSCLK_FLL_ENABLED */
#ifdef CY_CFG_SYSCLK_PLL0_ENABLED
secure_config->pll0Enable = CY_CFG_SYSCLK_PLL0_ENABLED;
#endif /* CY_CFG_SYSCLK_PLL0_ENABLED */
#ifdef CY_CFG_SYSCLK_PLL1_ENABLED
secure_config->pll1Enable = CY_CFG_SYSCLK_PLL1_ENABLED;
#endif /* CY_CFG_SYSCLK_PLL1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
secure_config->path0Enable = CY_CFG_SYSCLK_CLKPATH0_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH0_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
secure_config->path1Enable = CY_CFG_SYSCLK_CLKPATH1_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED
secure_config->path2Enable = CY_CFG_SYSCLK_CLKPATH2_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH2_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED
secure_config->path3Enable = CY_CFG_SYSCLK_CLKPATH3_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH3_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED
secure_config->path4Enable = CY_CFG_SYSCLK_CLKPATH4_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH4_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED
secure_config->path5Enable = CY_CFG_SYSCLK_CLKPATH5_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH5_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
secure_config->clkFastEnable = CY_CFG_SYSCLK_CLKFAST_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKFAST_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
secure_config->clkPeriEnable = CY_CFG_SYSCLK_CLKPERI_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPERI_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
secure_config->clkSlowEnable = CY_CFG_SYSCLK_CLKSLOW_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKSLOW_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF0_ENABLED
secure_config->clkHF0Enable = CY_CFG_SYSCLK_CLKHF0_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF0_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
secure_config->clkHF1Enable = CY_CFG_SYSCLK_CLKHF1_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED
secure_config->clkHF2Enable = CY_CFG_SYSCLK_CLKHF2_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF2_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED
secure_config->clkHF3Enable = CY_CFG_SYSCLK_CLKHF3_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF3_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED
secure_config->clkHF4Enable = CY_CFG_SYSCLK_CLKHF4_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF4_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED
secure_config->clkHF5Enable = CY_CFG_SYSCLK_CLKHF5_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF5_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
secure_config->clkPumpEnable = CY_CFG_SYSCLK_CLKPUMP_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPUMP_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
secure_config->clkLFEnable = CY_CFG_SYSCLK_CLKLF_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKLF_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
secure_config->clkBakEnable = CY_CFG_SYSCLK_CLKBAK_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKBAK_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
secure_config->clkTimerEnable = CY_CFG_SYSCLK_CLKTIMER_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKTIMER_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
secure_config->clkAltSysTickEnable = CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED;
#error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices.
#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED */
#ifdef CY_CFG_SYSCLK_PILO_ENABLED
secure_config->piloEnable = CY_CFG_SYSCLK_PILO_ENABLED;
#endif /* CY_CFG_SYSCLK_PILO_ENABLED */
#ifdef CY_CFG_SYSCLK_ALTHF_ENABLED
secure_config->clkAltHfEnable = CY_CFG_SYSCLK_ALTHF_ENABLED;
#endif /* CY_CFG_SYSCLK_ALTHF_ENABLED */
#ifdef CY_CFG_PWR_LDO_VOLTAGE
secure_config->ldoVoltage = CY_CFG_PWR_LDO_VOLTAGE;
#endif /* CY_CFG_PWR_LDO_VOLTAGE */
#ifdef CY_CFG_PWR_REGULATOR_MODE_MIN
secure_config->pwrCurrentModeMin = CY_CFG_PWR_REGULATOR_MODE_MIN;
#endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
#ifdef CY_CFG_PWR_BUCK_VOLTAGE
secure_config->buckVoltage = CY_CFG_PWR_BUCK_VOLTAGE;
#endif /* CY_CFG_PWR_BUCK_VOLTAGE */
#ifdef CY_CFG_SYSCLK_ECO_FREQ
secure_config->ecoFreqHz = CY_CFG_SYSCLK_ECO_FREQ;
#endif /* CY_CFG_SYSCLK_ECO_FREQ */
#ifdef CY_CFG_SYSCLK_ECO_CLOAD
secure_config->ecoLoad = CY_CFG_SYSCLK_ECO_CLOAD;
#endif /* CY_CFG_SYSCLK_ECO_CLOAD */
#ifdef CY_CFG_SYSCLK_ECO_ESR
secure_config->ecoEsr = CY_CFG_SYSCLK_ECO_ESR;
#endif /* CY_CFG_SYSCLK_ECO_ESR */
#ifdef CY_CFG_SYSCLK_ECO_DRIVE_LEVEL
secure_config->ecoDriveLevel = CY_CFG_SYSCLK_ECO_DRIVE_LEVEL;
#endif /* CY_CFG_SYSCLK_ECO_DRIVE_LEVEL */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PRT
secure_config->ecoInPort = CY_CFG_SYSCLK_ECO_GPIO_IN_PRT;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PRT */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT
secure_config->ecoOutPort = CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PIN
secure_config->ecoInPinNum = CY_CFG_SYSCLK_ECO_GPIO_IN_PIN;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PIN */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN
secure_config->ecoOutPinNum = CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN */
#ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
secure_config->extClkFreqHz = CY_CFG_SYSCLK_EXTCLK_FREQ;
#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PRT
secure_config->extClkPort = CY_CFG_SYSCLK_EXTCLK_GPIO_PRT;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PRT */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PIN
secure_config->extClkPinNum = CY_CFG_SYSCLK_EXTCLK_GPIO_PIN;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PIN */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM
secure_config->extClkHsiom = CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM */
#ifdef CY_CFG_SYSCLK_ILO_HIBERNATE
secure_config->iloHibernateON = CY_CFG_SYSCLK_ILO_HIBERNATE;
#endif /* CY_CFG_SYSCLK_ILO_HIBERNATE */
#ifdef CY_CFG_SYSCLK_WCO_BYPASS
secure_config->bypassEnable = CY_CFG_SYSCLK_WCO_BYPASS;
#endif /* CY_CFG_SYSCLK_WCO_BYPASS */
#ifdef CY_CFG_SYSCLK_WCO_IN_PRT
secure_config->wcoInPort = CY_CFG_SYSCLK_WCO_IN_PRT;
#endif /* CY_CFG_SYSCLK_WCO_IN_PRT */
#ifdef CY_CFG_SYSCLK_WCO_OUT_PRT
secure_config->wcoOutPort = CY_CFG_SYSCLK_WCO_OUT_PRT;
#endif /* CY_CFG_SYSCLK_WCO_OUT_PRT */
#ifdef CY_CFG_SYSCLK_WCO_IN_PIN
secure_config->wcoInPinNum = CY_CFG_SYSCLK_WCO_IN_PIN;
#endif /* CY_CFG_SYSCLK_WCO_IN_PIN */
#ifdef CY_CFG_SYSCLK_WCO_OUT_PIN
secure_config->wcoOutPinNum = CY_CFG_SYSCLK_WCO_OUT_PIN;
#endif /* CY_CFG_SYSCLK_WCO_OUT_PIN */
#ifdef CY_CFG_SYSCLK_FLL_OUT_FREQ
secure_config->fllOutFreqHz = CY_CFG_SYSCLK_FLL_OUT_FREQ;
#endif /* CY_CFG_SYSCLK_FLL_OUT_FREQ */
#ifdef CY_CFG_SYSCLK_FLL_MULT
secure_config->fllMult = CY_CFG_SYSCLK_FLL_MULT;
#endif /* CY_CFG_SYSCLK_FLL_MULT */
#ifdef CY_CFG_SYSCLK_FLL_REFDIV
secure_config->fllRefDiv = CY_CFG_SYSCLK_FLL_REFDIV;
#endif /* CY_CFG_SYSCLK_FLL_REFDIV */
#ifdef CY_CFG_SYSCLK_FLL_CCO_RANGE
secure_config->fllCcoRange = CY_CFG_SYSCLK_FLL_CCO_RANGE;
#endif /* CY_CFG_SYSCLK_FLL_CCO_RANGE */
#ifdef CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV
secure_config->enableOutputDiv = CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV;
#endif /* CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV */
#ifdef CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE
secure_config->lockTolerance = CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE;
#endif /* CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE */
#ifdef CY_CFG_SYSCLK_FLL_IGAIN
secure_config->igain = CY_CFG_SYSCLK_FLL_IGAIN;
#endif /* CY_CFG_SYSCLK_FLL_IGAIN */
#ifdef CY_CFG_SYSCLK_FLL_PGAIN
secure_config->pgain = CY_CFG_SYSCLK_FLL_PGAIN;
#endif /* CY_CFG_SYSCLK_FLL_PGAIN */
#ifdef CY_CFG_SYSCLK_FLL_SETTLING_COUNT
secure_config->settlingCount = CY_CFG_SYSCLK_FLL_SETTLING_COUNT;
#endif /* CY_CFG_SYSCLK_FLL_SETTLING_COUNT */
#ifdef CY_CFG_SYSCLK_FLL_OUTPUT_MODE
secure_config->outputMode = CY_CFG_SYSCLK_FLL_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_FLL_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_FLL_CCO_FREQ
secure_config->ccoFreq = CY_CFG_SYSCLK_FLL_CCO_FREQ;
#endif /* CY_CFG_SYSCLK_FLL_CCO_FREQ */
#ifdef CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV
secure_config->pll0FeedbackDiv = CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_REFERENCE_DIV
secure_config->pll0ReferenceDiv = CY_CFG_SYSCLK_PLL0_REFERENCE_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_REFERENCE_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_DIV
secure_config->pll0OutputDiv = CY_CFG_SYSCLK_PLL0_OUTPUT_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_LF_MODE
secure_config->pll0LfMode = CY_CFG_SYSCLK_PLL0_LF_MODE;
#endif /* CY_CFG_SYSCLK_PLL0_LF_MODE */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_MODE
secure_config->pll0OutputMode = CY_CFG_SYSCLK_PLL0_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ
secure_config->pll0OutFreqHz = CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ */
#ifdef CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV
secure_config->pll1FeedbackDiv = CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_REFERENCE_DIV
secure_config->pll1ReferenceDiv = CY_CFG_SYSCLK_PLL1_REFERENCE_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_REFERENCE_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_DIV
secure_config->pll1OutputDiv = CY_CFG_SYSCLK_PLL1_OUTPUT_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_LF_MODE
secure_config->pll1LfMode = CY_CFG_SYSCLK_PLL1_LF_MODE;
#endif /* CY_CFG_SYSCLK_PLL1_LF_MODE */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_MODE
secure_config->pll1OutputMode = CY_CFG_SYSCLK_PLL1_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ
secure_config->pll1OutFreqHz = CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ */
#ifdef CY_CFG_SYSCLK_CLKPATH0_SOURCE
secure_config->path0Src = CY_CFG_SYSCLK_CLKPATH0_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH0_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH1_SOURCE
secure_config->path1Src = CY_CFG_SYSCLK_CLKPATH1_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH1_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH2_SOURCE
secure_config->path2Src = CY_CFG_SYSCLK_CLKPATH2_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH2_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH3_SOURCE
secure_config->path3Src = CY_CFG_SYSCLK_CLKPATH3_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH3_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH4_SOURCE
secure_config->path4Src = CY_CFG_SYSCLK_CLKPATH4_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH4_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH5_SOURCE
secure_config->path5Src = CY_CFG_SYSCLK_CLKPATH5_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH5_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKFAST_DIVIDER
secure_config->clkFastDiv = CY_CFG_SYSCLK_CLKFAST_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKFAST_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKPERI_DIVIDER
secure_config->clkPeriDiv = CY_CFG_SYSCLK_CLKPERI_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKPERI_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKSLOW_DIVIDER
secure_config->clkSlowDiv = CY_CFG_SYSCLK_CLKSLOW_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKSLOW_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF0_CLKPATH
secure_config->hf0Source = CY_CFG_SYSCLK_CLKHF0_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF0_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF0_DIVIDER
secure_config->hf0Divider = CY_CFG_SYSCLK_CLKHF0_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF0_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ
secure_config->hf0OutFreqMHz = CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF1_CLKPATH
secure_config->hf1Source = CY_CFG_SYSCLK_CLKHF1_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF1_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF1_DIVIDER
secure_config->hf1Divider = CY_CFG_SYSCLK_CLKHF1_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF1_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ
secure_config->hf1OutFreqMHz = CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF2_CLKPATH
secure_config->hf2Source = CY_CFG_SYSCLK_CLKHF2_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF2_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF2_DIVIDER
secure_config->hf2Divider = CY_CFG_SYSCLK_CLKHF2_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF2_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ
secure_config->hf2OutFreqMHz = CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF3_CLKPATH
secure_config->hf3Source = CY_CFG_SYSCLK_CLKHF3_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF3_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF3_DIVIDER
secure_config->hf3Divider = CY_CFG_SYSCLK_CLKHF3_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF3_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ
secure_config->hf3OutFreqMHz = CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF4_CLKPATH
secure_config->hf4Source = CY_CFG_SYSCLK_CLKHF4_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF4_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF4_DIVIDER
secure_config->hf4Divider = CY_CFG_SYSCLK_CLKHF4_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF4_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ
secure_config->hf4OutFreqMHz = CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF5_CLKPATH
secure_config->hf5Source = CY_CFG_SYSCLK_CLKHF5_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF5_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF5_DIVIDER
secure_config->hf5Divider = CY_CFG_SYSCLK_CLKHF5_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF5_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ
secure_config->hf5OutFreqMHz = CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKPUMP_SOURCE
secure_config->pumpSource = CY_CFG_SYSCLK_CLKPUMP_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPUMP_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPUMP_DIVIDER
secure_config->pumpDivider = CY_CFG_SYSCLK_CLKPUMP_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKPUMP_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKLF_SOURCE
secure_config->clkLfSource = CY_CFG_SYSCLK_CLKLF_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKLF_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKBAK_SOURCE
secure_config->clkBakSource = CY_CFG_SYSCLK_CLKBAK_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKBAK_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKTIMER_SOURCE
secure_config->clkTimerSource = CY_CFG_SYSCLK_CLKTIMER_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKTIMER_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKTIMER_DIVIDER
secure_config->clkTimerDivider = CY_CFG_SYSCLK_CLKTIMER_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKTIMER_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE
secure_config->clkSrcAltSysTick = CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD
secure_config->altHFcLoad = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME
secure_config->altHFxtalStartUpTime = CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ
secure_config->altHFfreq = CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV
secure_config->altHFsysClkDiv = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR
secure_config->altHFvoltageReg = CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR */
@ -635,7 +751,8 @@ void init_cycfg_system(void)
#ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);
#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
#else
#else /* ((CY_CPU_CORTEX_M4) && (defined(CY_DEVICE_SECURE))) */
/* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */
Cy_SysLib_SetWaitStates(false, 150UL);
#ifdef CY_CFG_PWR_ENABLED

2
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h
View File

@ -5,7 +5,7 @@
* System configuration
* This file was automatically generated and should not be modified.
* Tools Package 2.2.0.1747
* psoc6pdl 1.6.0.4172
* psoc6pdl 1.6.0.4266
* personalities_2.0 2.0.0.0
* udd 1.2.0.370
*