FPGA UART test: disable 7 bits test for K64F

pull/12615/head
jeromecoutant 2020-04-14 18:05:40 +02:00
parent 64f9a7a8ba
commit 1a64d6e525
2 changed files with 10 additions and 6 deletions

View File

@ -13,7 +13,7 @@
},
"K64F": {
"target.macros_add": [
"UART_7BITS_PARITY_NONE_NOT_SUPPORTED",
"UART_7BITS_NOT_SUPPORTED",
"UART_9BITS_NOT_SUPPORTED"
]
},

View File

@ -86,13 +86,10 @@ static void test_irq_handler(uint32_t id, SerialIrq event)
static void uart_test_common(int baudrate, int data_bits, SerialParity parity, int stop_bits, bool init_direct, PinName tx, PinName rx, PinName cts, PinName rts)
{
// The FPGA CI shield only supports None, Odd & Even.
// Forced parity is not supported on Atmel, Freescale, Nordic & STM targets.
// Forced parity is not supported on many targets
MBED_ASSERT(parity != ParityForced1 && parity != ParityForced0);
// STM-specific constraints
// Only 7, 8 & 9 data bits.
MBED_ASSERT(data_bits >= 7 && data_bits <= 9);
// See TESTS/configs/fpga.json to check which target supports what
#if defined(UART_9BITS_NOT_SUPPORTED)
if (data_bits == 9) {
utest_printf(" UART_9BITS_NOT_SUPPORTED set ... ");
@ -107,6 +104,13 @@ static void uart_test_common(int baudrate, int data_bits, SerialParity parity, i
}
#endif
#if defined(UART_7BITS_NOT_SUPPORTED)
if (data_bits == 7) {
utest_printf(" UART_7BITS_NOT_SUPPORTED set ... ");
return;
}
#endif
#if defined(UART_7BITS_PARITY_NONE_NOT_SUPPORTED)
if ((data_bits == 7) && (parity == ParityNone)) {
utest_printf(" UART_7BITS_PARITY_NONE_NOT_SUPPORTED set ... ");