From 19ae097c62efb66eeaa7c8ba8778a9b26d092fe3 Mon Sep 17 00:00:00 2001 From: Sissors Date: Sat, 1 Mar 2014 16:38:03 +0100 Subject: [PATCH] Fixed writable for LPC1768 Bit 6 (0x40) is true if the peripheral is completely empty. Bit 5 (0x20) is true if the transmit hold register is empty, which is sufficient for it to be writable. The TxIrq uses the same requirement, so now it works together and BufferedSerial doesn't go haywire on LPC1768 --- .../mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c index 2a06b61c31..56c00414d9 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c @@ -368,7 +368,7 @@ int serial_writable(serial_t *obj) { if (NC != uart_data[obj->index].sw_cts.pin) isWritable = gpio_read(&uart_data[obj->index].sw_cts) == 0; if (isWritable) - isWritable = obj->uart->LSR & 0x40; + isWritable = obj->uart->LSR & 0x20; return isWritable; }