Merge pull request #14003 from jeromecoutant/PR_H7_PWR

STM32H7: system power supply configuration
2020-12-09 08:57:43 +00:00 · 2020-12-09 08:57:43 +00:00 · 18f6794498
parent 626804aa54 cc90ec9096
commit 18f6794498
7 changed files with 39 additions and 25 deletions
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c
@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

@ -160,8 +158,6 @@ uint8_t SetSysClock_PLL_HSI(void)
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;

-    /*!< Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
    while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c
@ -89,8 +89,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

@ -163,8 +161,6 @@ uint8_t SetSysClock_PLL_HSI(void)
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;

-    /*!< Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
    while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/system_clock.c
@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/system_clock.c
@ -88,8 +88,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

@ -165,8 +163,6 @@ uint8_t SetSysClock_PLL_HSI(void)
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H7A3xIQ/system_clock.c
@ -84,9 +84,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

-    /* Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
-
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);

@ -156,8 +153,6 @@ uint8_t SetSysClock_PLL_HSI(void)
    RCC_ClkInitTypeDef RCC_ClkInitStruct;
    RCC_OscInitTypeDef RCC_OscInitStruct;

-    /*!< Supply configuration update enable */
-    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
    /* Configure the main internal regulator output voltage */
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
    while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
--- a/targets/TARGET_STM/mbed_overrides.c
+++ b/targets/TARGET_STM/mbed_overrides.c
@ -240,6 +240,15 @@ void mbed_sdk_init()
        LSEDriveConfig();
    }
 #endif
+
+#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
+#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
+    HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
+#else
+    #error system_power_supply not configured
+#endif
+#endif
+
    SetSysClock();
    SystemCoreClockUpdate();

@ -268,6 +277,14 @@ void mbed_sdk_init()
    }
 #endif

+#if defined(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
+#if IS_PWR_SUPPLY(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY)
+    HAL_PWREx_ConfigSupply(MBED_CONF_TARGET_SYSTEM_POWER_SUPPLY);
+#else
+    #error system_power_supply not configured
+#endif
+#endif
+
    SetSysClock();
    SystemCoreClockUpdate();
 #endif /* DUAL_CORE */
--- a/targets/targets.json
+++ b/targets/targets.json
@ -2722,6 +2722,12 @@
            "lse_drive_load_level": {
                "help": "HSE drive load level  RCC_LSEDRIVE_LOW | RCC_LSEDRIVE_MEDIUMLOW | RCC_LSEDRIVE_MEDIUMHIGH | RCC_LSEDRIVE_HIGH",
                "value": "RCC_LSEDRIVE_LOW"
+            },
+            "system_power_supply": {
+                "expected_value1": "PWR_LDO_SUPPLY | PWR_DIRECT_SMPS_SUPPLY",
+                "expected_value2": "PWR_SMPS_1V8_SUPPLIES_LDO | PWR_SMPS_2V5_SUPPLIES_LDO | PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO | PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO",
+                "expected_value3": "PWR_SMPS_1V8_SUPPLIES_EXT | PWR_SMPS_2V5_SUPPLIES_EXT | PWR_EXTERNAL_SOURCE_SUPPLY",
+                "value": "NC"
            }
        },
        "components_add": [
@ -2758,7 +2764,10 @@
        ],
        "macros_add": [
            "STM32H743xx"
-        ]
+        ],
+        "overrides": {
+            "system_power_supply": "PWR_LDO_SUPPLY"
+        }
    },
    "NUCLEO_H743ZI2": {
        "inherits": [
@ -2800,7 +2809,10 @@
        ],
        "macros_add": [
            "STM32H745xx"
-        ]
+        ],
+        "overrides": {
+            "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
+        }
    },
    "MCU_STM32H745xI_CM4": {
        "inherits": [
@ -2846,7 +2858,10 @@
        ],
        "macros_add": [
            "STM32H747xx"
-        ]
+        ],
+        "overrides": {
+            "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
+        }
    },
    "MCU_STM32H747xI_CM7": {
        "inherits": [
@ -2948,7 +2963,10 @@
        ],
        "macros_add": [
            "STM32H7A3xxQ"
-        ]
+        ],
+        "overrides": {
+            "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY"
+        }
    },
    "NUCLEO_H7A3ZI_Q": {
        "inherits": [