From 188c6d9a4aea326a2a778b45d3ae10b8f49c7f4d Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Wed, 22 Apr 2020 13:29:36 +0800 Subject: [PATCH] NANO130: Make memory specification configurable --- .../TARGET_NANO100/device/NANO100_mem.h | 133 ++++++++++++++++++ .../TARGET_NANO100/device/NANO100_mem.icf.h | 115 +++++++++++++++ .../device/TOOLCHAIN_ARM_MICRO/NANO130.sct | 47 ++++--- .../device/TOOLCHAIN_ARM_STD/NANO130.sct | 44 ++++-- .../device/TOOLCHAIN_GCC_ARM/NANO130.ld | 26 +++- .../device/TOOLCHAIN_IAR/NANO130.icf | 31 +++- 6 files changed, 354 insertions(+), 42 deletions(-) create mode 100644 targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.h create mode 100644 targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.icf.h diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.h b/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.h new file mode 100644 index 0000000000..7f658ade1f --- /dev/null +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.h @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __NANO100_MEM_H__ +#define __NANO100_MEM_H__ + +/* About NANO100_mem.h/NANO100_mem.icf.h + * + * 1. NANO100_mem.h is created for centralizing memory configuration. It will be included by C/C++ files + * and linker files (except IAR linker file). + * 2. IAR linker doesn't support preprocessor, so NANO100_mem.icf.h, duplicate of NANO100_mem.h + * is created for IAR linker file. + * 3. To continue above, we name NANO100_mem.icf.h instead of NANO100_mem.icf because: + * (1) Mbed OS build tool may mis-regard NANO100_mem.icf as the main linker configuration file. + * (2) *.icf files may not be present in search directories for "include" directive. Per observation, + * the search directories are inconsistent among normal example build and test code build. To address + * it, we name NANO100_mem.icf.h instead because *.h files are always present in these builds + * (already there or via copy). + */ + +/* Default memory specification + * + * Flash size: 128KiB + * SRAM size: 16KiB + */ + +/* Resolve ROM start */ +#ifndef MBED_ROM_START +#define MBED_ROM_START (0x0) +#endif + +/* Resolve ROM size */ +#ifndef MBED_ROM_SIZE +#define MBED_ROM_SIZE (0x20000) +#endif + +/* Resolve RAM start */ +#ifndef MBED_RAM_START +#define MBED_RAM_START (0x20000000) +#endif + +/* Resolve RAM size */ +#ifndef MBED_RAM_SIZE +#define MBED_RAM_SIZE (0x4000) +#endif + + +/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just + * MBED_APP_xxx macros to linker files even though they mean the same thing. + * Because this file is to include by both C/C++ files and linker files, we add + * these macros according to the others for consistency when they are missing + * in compile or link stage. */ + +#ifndef APPLICATION_ADDR +#ifdef MBED_APP_START +#define APPLICATION_ADDR MBED_APP_START +#else +#define APPLICATION_ADDR MBED_ROM_START +#endif +#endif + +#ifndef APPLICATION_SIZE +#ifdef MBED_APP_SIZE +#define APPLICATION_SIZE MBED_APP_SIZE +#else +#define APPLICATION_SIZE MBED_ROM_SIZE +#endif +#endif + +#ifndef APPLICATION_RAM_ADDR +#ifdef MBED_RAM_APP_START +#define APPLICATION_RAM_ADDR MBED_RAM_APP_START +#else +#define APPLICATION_RAM_ADDR MBED_RAM_START +#endif +#endif + +#ifndef APPLICATION_RAM_SIZE +#ifdef MBED_RAM_APP_SIZE +#define APPLICATION_RAM_SIZE MBED_RAM_APP_SIZE +#else +#define APPLICATION_RAM_SIZE MBED_RAM_SIZE +#endif +#endif + +#ifndef MBED_APP_START +#define MBED_APP_START APPLICATION_ADDR +#endif + +#ifndef MBED_APP_SIZE +#define MBED_APP_SIZE APPLICATION_SIZE +#endif + +#ifndef MBED_RAM_APP_START +#define MBED_RAM_APP_START APPLICATION_RAM_ADDR +#endif + +#ifndef MBED_RAM_APP_SIZE +#define MBED_RAM_APP_SIZE APPLICATION_RAM_SIZE +#endif + +#if (APPLICATION_ADDR != MBED_APP_START) +#error("APPLICATION_ADDR and MBED_APP_START are not the same!!!") +#endif + +#if (APPLICATION_SIZE != MBED_APP_SIZE) +#error("APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!") +#endif + +#if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START) +#error("APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!") +#endif + +#if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE) +#error("APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!") +#endif + +#endif /* __NANO100_MEM_H__ */ diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.icf.h b/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.icf.h new file mode 100644 index 0000000000..6b14f62cfc --- /dev/null +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/NANO100_mem.icf.h @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* See NANO100_mem.h for documentation */ + +/* Default memory specification + * + * Flash size: 128KiB + * SRAM size: 16KiB + */ + +/* Resolve ROM start */ +if (!isdefinedsymbol(MBED_ROM_START)) { + define symbol MBED_ROM_START = 0x0; +} + +/* Resolve ROM size */ +if (!isdefinedsymbol(MBED_ROM_SIZE)) { + define symbol MBED_ROM_SIZE = 0x20000; +} + +/* Resolve RAM start */ +if (!isdefinedsymbol(MBED_RAM_START)) { + define symbol MBED_RAM_START = 0x20000000; +} + +/* Resolve RAM size */ +if (!isdefinedsymbol(MBED_RAM_SIZE)) { + define symbol MBED_RAM_SIZE = 0x4000; +} + +/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just + * MBED_APP_xxx macros to linker files even though they mean the same thing. + * Because this file is to include by both C/C++ files and linker files, we add + * these macros according to the others for consistency when they are missing + * in compile or link stage. */ + +if (!isdefinedsymbol(APPLICATION_ADDR)) { + if (isdefinedsymbol(MBED_APP_START)) { + define symbol APPLICATION_ADDR = MBED_APP_START; + } else { + define symbol APPLICATION_ADDR = MBED_ROM_START; + } +} + +if (!isdefinedsymbol(APPLICATION_SIZE)) { + if (isdefinedsymbol(MBED_APP_SIZE)) { + define symbol APPLICATION_SIZE = MBED_APP_SIZE; + } else { + define symbol APPLICATION_SIZE = MBED_ROM_SIZE; + } +} + +if (!isdefinedsymbol(APPLICATION_RAM_ADDR)) { + if (isdefinedsymbol(MBED_RAM_APP_START)) { + define symbol APPLICATION_RAM_ADDR = MBED_RAM_APP_START; + } else { + define symbol APPLICATION_RAM_ADDR = MBED_RAM_START; + } +} + +if (!isdefinedsymbol(APPLICATION_RAM_SIZE)) { + if (isdefinedsymbol(MBED_RAM_APP_SIZE)) { + define symbol APPLICATION_RAM_SIZE = MBED_RAM_APP_SIZE; + } else { + define symbol APPLICATION_RAM_SIZE = MBED_RAM_SIZE; + } +} + +if (!isdefinedsymbol(MBED_APP_START)) { + define symbol MBED_APP_START = APPLICATION_ADDR; +} + +if (!isdefinedsymbol(MBED_APP_SIZE)) { + define symbol MBED_APP_SIZE = APPLICATION_SIZE; +} + +if (!isdefinedsymbol(MBED_RAM_APP_START)) { + define symbol MBED_RAM_APP_START = APPLICATION_RAM_ADDR; +} + +if (!isdefinedsymbol(MBED_RAM_APP_SIZE)) { + define symbol MBED_RAM_APP_SIZE = APPLICATION_RAM_SIZE; +} + +if (APPLICATION_ADDR != MBED_APP_START) { + error "APPLICATION_ADDR and MBED_APP_START are not the same!!!"; +} + +if (APPLICATION_SIZE != MBED_APP_SIZE) { + error "APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!"; +} + +if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START) { + error "APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!"; +} + +if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE) { + error "APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!"; +} diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct index 7c809b9db9..f5ea071d1f 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct @@ -1,23 +1,24 @@ #! armcc -E -; 512 KB APROM -#if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00020000 -#endif - -; 16 KB SRAM (internal) -#if !defined(MBED_RAM_START) - #define MBED_RAM_START 0x20000000 -#endif - -#if !defined(MBED_RAM_SIZE) - #define MBED_RAM_SIZE 0x4000 -#endif +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "../NANO100_mem.h" #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 @@ -32,17 +33,17 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { } RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - - ; Extern SRAM for HEAP - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 128 KB APROM -ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 16 KB SRAM (internal) + +ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) +ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE)) diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_STD/NANO130.sct b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_STD/NANO130.sct index 97f76f6675..f5ea071d1f 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_STD/NANO130.sct +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_STD/NANO130.sct @@ -1,27 +1,49 @@ #! armcc -E +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "../NANO100_mem.h" + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +; Does not support vector table relocation + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x4000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00020000) ; 128 KB APROM -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20004000) ; 16 KB SRAM + +ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) +ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE)) diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld index a919b7c869..e254d8bc3e 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld @@ -1,7 +1,27 @@ +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + /* * Nuvoton NANO130 GCC linker script file */ +#include "../NANO100_mem.h" + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif @@ -10,9 +30,9 @@ StackSize = MBED_BOOT_STACK_SIZE; MEMORY { - VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00020000 - 0x00000400 - RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000 - 0x00000000 + VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x400 + FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400 + RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE } /** diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf index d7468abd8e..40161e3216 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf @@ -1,14 +1,35 @@ +/* + * Copyright (c) 2020, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + /*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ + +include "../NANO100_mem.icf.h"; + if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; +define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x00020000 - 1; -define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_IRAM_end__ = 0x20004000 - 1; +define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; +define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; +define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; +define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400;