diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/stm32h7xx.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/stm32h7xx.h
index 28a052423e..9f32ac5a30 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/stm32h7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/stm32h7xx.h
@@ -88,8 +88,6 @@
 #define USE_HAL_DRIVER // MBED PATCH
 #endif /* USE_HAL_DRIVER */
 
-#define USE_FULL_LL_DRIVER // MBED PATCH
-
 /**
   * @brief CMSIS Device version number V1.5.0
   */
diff --git a/targets/targets.json b/targets/targets.json
index b3f007fa7d..18c6f721b3 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -1853,7 +1853,10 @@
         "public": false,
         "extra_labels": ["STM"],
         "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
-        "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
+        "macros": [
+            "USE_FULL_LL_DRIVER",
+            "TRANSACTION_QUEUE_SIZE_SPI=2"
+        ],
         "config": {
             "lse_available": {
                 "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
@@ -3195,8 +3198,7 @@
             }
         },
         "macros_add": [
-            "MBED_TICKLESS",
-            "USE_FULL_LL_DRIVER"
+            "MBED_TICKLESS"
         ],
         "overrides": { "lpticker_delay_ticks": 4 },
         "supported_form_factors": ["ARDUINO"],