From 4cf6f09411c7cc62a89bdff2e8d63e3557e4866f Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 22 Jul 2013 12:46:46 +0100 Subject: [PATCH 1/7] Enabled the interrupts api to compile --- .../targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index 5d5b81afa9..aaff0d0d8a 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -23,8 +23,9 @@ static uint32_t channel_ids[CHANNEL_NUM] = {0}; static gpio_irq_handler irq_handler; -#warning TODO(@toyowata): need implimentation -#if 0 + +#warning (matthewelse) This code isn't working yet, so don't rely on it, or try to use it. + static inline void handle_interrupt_in(uint32_t channel) { uint32_t ch_bit = (1 << channel); @@ -127,6 +128,4 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { &port_reg->IENF &= ~ch_bit; } } -} - -#endif +} \ No newline at end of file From 1da8e8a2c72a2d8bed36645463c95ea6952ad5bf Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 22 Jul 2013 13:30:00 +0100 Subject: [PATCH 2/7] Started to implement gpio_irq_set --- .../TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 60 ++++++++++++------- 1 file changed, 38 insertions(+), 22 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index aaff0d0d8a..55f7d15a09 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -23,6 +23,7 @@ static uint32_t channel_ids[CHANNEL_NUM] = {0}; static gpio_irq_handler irq_handler; +static int gpioIrqInitialised = 0; #warning (matthewelse) This code isn't working yet, so don't rely on it, or try to use it. @@ -56,6 +57,7 @@ void gpio_irq3(void) {handle_interrupt_in(3);} int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { if (pin == NC) return -1; + if (gpioInitialised) return; irq_handler = handler; @@ -96,6 +98,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 NVIC_SetVector((IRQn_Type)(PININT_IRQ - obj->ch)), (uint32_t)channels_irq); NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ - obj->ch)); + gpioInitialised = 1; return 0; } @@ -105,27 +108,40 @@ void gpio_irq_free(gpio_irq_t *obj) { } void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { - unsigned int ch_bit = (1 << obj->ch); - - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE + (obj->ch * 0x10000)); + if (!gpioIqrInitialised) gpio_irq_init(); - // Clear interrupt - if (!(&port_reg->ISEL & ch_bit)) - &port_reg->IST = ch_bit; - - // Edge trigger - &port_reg->ISEL &= ~ch_bit; - if (event == IRQ_RISE) { - if (enable) { - &port_reg->IENR |= ch_bit; - } else { - &port_reg->IENR &= ~ch_bit; - } - } else { - if (enable) { - &port_reg->IENF |= ch_bit; - } else { - &port_reg->IENF &= ~ch_bit; - } +#warning (matthewelse) TODO: undefined port and value. Also need to do something with the *obj... + int port = 0; + int pin = 0; + + LPC_GPIO_TypeDef *gpioRegisters; + + switch (port) { + case 0: + gpioRegisters = LPC_GPIO0; + break; + case 1: + gpioRegisters = LPC_GPIO1; + break; + case 2: + gpioRegisters = LPC_GPIO2; + break; + case 3: + gpioRegisters = LPC_GPIO3; + break; } -} \ No newline at end of file + + gpioRegisters->IBE 0; // Assume that we only want to interrupt on high or low edges, not both. + gpioRegisters->IS &= ~(1 << pin); + + if (enable) { + gpioRegisters->IE |= (1<IEV |= 1 << pin; + } + else { + gpioRegisters->IEV &= ~(1 << pin); + } +} From fea818fccbdf05c06b2b1ddb0a19c223282e661b Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 22 Jul 2013 13:56:56 +0100 Subject: [PATCH 3/7] Updates to interrupt handling --- .../TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 45 +++++-------------- 1 file changed, 10 insertions(+), 35 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index 55f7d15a09..9782f78793 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -28,6 +28,9 @@ static int gpioIrqInitialised = 0; #warning (matthewelse) This code isn't working yet, so don't rely on it, or try to use it. static inline void handle_interrupt_in(uint32_t channel) { + +#error (matthewelse) There's no way this code will work now... + uint32_t ch_bit = (1 << channel); LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE + (channel * 0x10000)); @@ -60,43 +63,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 if (gpioInitialised) return; irq_handler = handler; - - int found_free_channel = 0; - int i = 0; - for (i=0; ich = i; - found_free_channel = 1; - break; - } - } - if (!found_free_channel) return -1; - + /* Enable AHB clock to the GPIO domain. */ - LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6); + LPC_SYSCON->SYSAHBCLKCTRL |= SCB_SYSAHBCLKCTRL_GPIO; - /* Enable AHB clock to the FlexInt, GroupedInt domain. */ - LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<19) | (1<<23) | (1<<24)); - - /* To select a pin for any of the eight pin interrupts, write the pin number - * as 0 to 23 for pins PIO0_0 to PIO0_23 and 24 to 55. - * @see: mbed_capi/PinNames.h - */ - LPC_SYSCON->PINTSEL[obj->ch] = (pin >> 5) ? (pin - 8) : (pin); - - // Interrupt Wake-Up Enable - LPC_SYSCON->STARTERP0 |= 1 << obj->ch; - - void (*channels_irq)(void) = NULL; - switch (obj->ch) { - case 0: channels_irq = &gpio_irq0; break; - case 1: channels_irq = &gpio_irq1; break; - case 2: channels_irq = &gpio_irq2; break; - case 3: channels_irq = &gpio_irq3; break; - } - NVIC_SetVector((IRQn_Type)(PININT_IRQ - obj->ch)), (uint32_t)channels_irq); - NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ - obj->ch)); + NVIC_EnableIRQ(EINT0_IRQn); + NVIC_EnableIRQ(EINT1_IRQn); + NVIC_EnableIRQ(EINT2_IRQn); + NVIC_EnableIRQ(EINT3_IRQn); gpioInitialised = 1; return 0; @@ -107,6 +81,7 @@ void gpio_irq_free(gpio_irq_t *obj) { LPC_SYSCON->STARTERP0 &= ~(1 << obj->ch); } +// This is basically complete, but non-functional as it needs to do something with obj at some point. void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { if (!gpioIqrInitialised) gpio_irq_init(); From 80119920218c06dbaa3da922e438f1e438c2ab48 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 23 Jul 2013 14:19:33 +0100 Subject: [PATCH 4/7] Fully implemented gpio_irq_set --- .../TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 122 ++++++++++-------- .../hal/TARGET_NXP/TARGET_LPC11XX/objects.h | 2 + 2 files changed, 69 insertions(+), 55 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index 9782f78793..509606dd0e 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -23,34 +23,16 @@ static uint32_t channel_ids[CHANNEL_NUM] = {0}; static gpio_irq_handler irq_handler; -static int gpioIrqInitialised = 0; +static uint32_t channel = 0; #warning (matthewelse) This code isn't working yet, so don't rely on it, or try to use it. static inline void handle_interrupt_in(uint32_t channel) { #error (matthewelse) There's no way this code will work now... - uint32_t ch_bit = (1 << channel); - - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE + (channel * 0x10000)); - - // Return immediately if: - // * The interrupt was already served - // * There is no user handler - // * It is a level interrupt, not an edge interrupt - if ( ((&port_reg->IST & ch_bit) == 0) || - (channel_ids[channel] == 0 ) || - (&port_reg->ISEL & ch_bit ) ) return; - - if ((&port_reg->IENR & ch_bit) && (&port_reg->RISE & ch_bit)) { - irq_handler(channel_ids[channel], IRQ_RISE); - &port_reg->RISE = ch_bit; - } - if ((&port_reg->IENF & ch_bit) && (&port_reg->FALL & ch_bit)) { - irq_handler(channel_ids[channel], IRQ_FALL); - } - &port_reg->IST = ch_bit; + LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (channel * 0x10000))); + } void gpio_irq0(void) {handle_interrupt_in(0);} @@ -60,63 +42,93 @@ void gpio_irq3(void) {handle_interrupt_in(3);} int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { if (pin == NC) return -1; - if (gpioInitialised) return; + channel_ids[channel] = id; irq_handler = handler; - /* Enable AHB clock to the GPIO domain. */ - LPC_SYSCON->SYSAHBCLKCTRL |= SCB_SYSAHBCLKCTRL_GPIO; + //obj->pin = pin; + obj->ch = channel; NVIC_EnableIRQ(EINT0_IRQn); NVIC_EnableIRQ(EINT1_IRQn); NVIC_EnableIRQ(EINT2_IRQn); NVIC_EnableIRQ(EINT3_IRQn); - gpioInitialised = 1; + channel++; return 0; } void gpio_irq_free(gpio_irq_t *obj) { channel_ids[obj->ch] = 0; - LPC_SYSCON->STARTERP0 &= ~(1 << obj->ch); } // This is basically complete, but non-functional as it needs to do something with obj at some point. void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { - if (!gpioIqrInitialised) gpio_irq_init(); + // TODO: Debug this to find out what data is put in the obj object at runtime... -#warning (matthewelse) TODO: undefined port and value. Also need to do something with the *obj... - int port = 0; - int pin = 0; + LPC_GPIO_TypeDef *gpioReg; - LPC_GPIO_TypeDef *gpioRegisters; - - switch (port) { - case 0: - gpioRegisters = LPC_GPIO0; + // Firstly, clear the interrupts for this pin. + // Then, let the registers know whether we're looking for edge detection... + // And enable the interrupt + // And set it to only respond to interrupts on one edge. + switch (obj->port) { + case LPC_GPIO0_BASE: + // Clear + LPC_GPIO0->IC |= 1 << obj->pin; + + // Edge + LPC_GPIO0->IS &= ~(1 << obj->pin); + + // Enable + if (enable) LPC_GPIO0->IE |= 1 << obj->pin; + else LPC_GPIO0->IE &= ~(1 << obj->pin); + + // One edge + LPC_GPIO0->IBE &= ~(1 << obj->pin); + + // Rising/falling? + if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; + else LPC_GPIO0->IEV &= ~(1 << obj->pin); break; - case 1: - gpioRegisters = LPC_GPIO1; - break; - case 2: - gpioRegisters = LPC_GPIO2; - break; - case 3: - gpioRegisters = LPC_GPIO3; - break; - } + case LPC_GPIO1_BASE: + LPC_GPIO1->IC |= 1 << obj->pin; - gpioRegisters->IBE 0; // Assume that we only want to interrupt on high or low edges, not both. - gpioRegisters->IS &= ~(1 << pin); + LPC_GPIO1->IS &= ~(1 << obj->pin); - if (enable) { - gpioRegisters->IE |= (1<IE |= 1 << obj->pin; + else LPC_GPIO1->IE &= ~(1 << obj->pin); - if (event == IRP_RISE) { - gpioRegisters->IEV |= 1 << pin; - } - else { - gpioRegisters->IEV &= ~(1 << pin); + LPC_GPIO1->IBE &= ~(1 << obj->pin); + + if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; + else LPC_GPIO0->IEV &= ~(1 << obj->pin); + break; + case LPC_GPIO2_BASE: + LPC_GPIO2->IC |= 1 << obj->pin; + + LPC_GPIO2->IS &= ~(1 << obj->pin); + + if (enable) LPC_GPIO2->IE |= 1 << obj->pin; + else LPC_GPIO2->IE &= ~(1 << obj->pin); + + LPC_GPIO2->IBE &= ~(1 << obj->pin); + + if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; + else LPC_GPIO0->IEV &= ~(1 << obj->pin); + break; + case LPC_GPIO3_BASE: + LPC_GPIO3->IC |= 1 << obj->pin; + + LPC_GPIO3->IC &= ~(1 << obj->pin); + + if (enable) LPC_GPIO3->IE |= 1 << obj->pin; + else LPC_GPIO3->IE &= ~(1 << obj->pin); + + LPC_GPIO3->IBE &= ~(1 << obj->pin); + + if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; + else LPC_GPIO0->IEV &= ~(1 << obj->pin); + break; } } diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h index 0718498e8d..9ca1df1f3e 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h @@ -27,6 +27,8 @@ extern "C" { struct gpio_irq_s { uint32_t ch; + uint32_t port; + uint32_t pin; }; struct port_s { From 819ca5547c00581e973d8f4fce1ea1ad8ebceaed Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 23 Jul 2013 14:21:40 +0100 Subject: [PATCH 5/7] Removed extraneous comment from the function --- .../mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 1 - 1 file changed, 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index 509606dd0e..44fd6b01d0 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -62,7 +62,6 @@ void gpio_irq_free(gpio_irq_t *obj) { channel_ids[obj->ch] = 0; } -// This is basically complete, but non-functional as it needs to do something with obj at some point. void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { // TODO: Debug this to find out what data is put in the obj object at runtime... From c56d1a5236bcf470a0993c361f9f44cad3147f3e Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 23 Jul 2013 15:35:38 +0100 Subject: [PATCH 6/7] Fully implemented GPIO_IRQ * Removed unused variables/comments. * As of yet, untested... --- .../TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 161 +++++++++--------- .../hal/TARGET_NXP/TARGET_LPC11XX/objects.h | 3 +- 2 files changed, 79 insertions(+), 85 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index 44fd6b01d0..f31d2340f3 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -18,21 +18,31 @@ #include "gpio_irq_api.h" #include "error.h" +// The chip is capable of 4 external interrupts. #define CHANNEL_NUM 4 -#define PININT_IRQ 28+3 static uint32_t channel_ids[CHANNEL_NUM] = {0}; static gpio_irq_handler irq_handler; -static uint32_t channel = 0; - -#warning (matthewelse) This code isn't working yet, so don't rely on it, or try to use it. +static int channel = 0; +static PinName pin_names[CHANNEL_NUM] = {}; static inline void handle_interrupt_in(uint32_t channel) { + // Find out whether the interrupt has been triggered by a high or low value... + // As the LPC1114 doesn't have a specific register for this, we'll just have to read + // the level of the pin as if it were just a normal input... -#error (matthewelse) There's no way this code will work now... - uint32_t ch_bit = (1 << channel); - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (channel * 0x10000))); - + // Get the number of the pin being used and the port typedef + uint8_t pin_number = (pin_names[channel] & (0x0f << 8)) >> 8; + LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000))); + + if ((port_reg->MASKED_ACCESS & (1 << pin_number)) >> pin_number) { + // High, therefore rising edge... + irq_handler(channel_ids[channel], IRQ_RISE); + } + else { + // Low, therefore falling edge... + irq_handler(channel_ids[channel], IRQ_FALL); + } } void gpio_irq0(void) {handle_interrupt_in(0);} @@ -43,17 +53,43 @@ void gpio_irq3(void) {handle_interrupt_in(3);} int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { if (pin == NC) return -1; - channel_ids[channel] = id; - irq_handler = handler; + // Firstly, we'll put some data in *obj so we can keep track of stuff. + obj->pin = pin; - //obj->pin = pin; + /* + If there are any ports or pins that aren't able to handle interrupts, put them here and uncomment. + + if (pin == ... || + pin == ...) { + error("This pin does not suppor interrupts."); + return -1; + } + */ + + channel_ids[channnel] = id; + pin_names[channel] = pin; obj->ch = channel; - - NVIC_EnableIRQ(EINT0_IRQn); - NVIC_EnableIRQ(EINT1_IRQn); - NVIC_EnableIRQ(EINT2_IRQn); - NVIC_EnableIRQ(EINT3_IRQn); - + + // Which port are we using? + switch (channel) { + case 0: + NVIC_SetVector(EINT0_IRQn, (uint32_t)gpio_irq0); + NVIC_EnableIrq(EINT0_IRQn); + break; + case 1: + NVIC_SetVector(EINT1_IRQn, (uint32_t)gpio_irq1); + NVIC_EnableIrq(EINT1_IRQn); + break; + case 2: + NVIC_SetVector(EINT2_IRQn, (uint32_t)gpio_irq2); + NVIC_EnableIrq(EINT2_IRQn); + break; + case 3: + NVIC_SetVector(EINT3_IRQn, (uint32_t)gpio_irq3); + NVIC_EnableIrq(EINT3_IRQn); + break; + } + channel++; return 0; } @@ -63,71 +99,30 @@ void gpio_irq_free(gpio_irq_t *obj) { } void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { - // TODO: Debug this to find out what data is put in the obj object at runtime... + pin = obj->pin; + LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000))); - LPC_GPIO_TypeDef *gpioReg; - - // Firstly, clear the interrupts for this pin. - // Then, let the registers know whether we're looking for edge detection... - // And enable the interrupt - // And set it to only respond to interrupts on one edge. - switch (obj->port) { - case LPC_GPIO0_BASE: - // Clear - LPC_GPIO0->IC |= 1 << obj->pin; - - // Edge - LPC_GPIO0->IS &= ~(1 << obj->pin); - - // Enable - if (enable) LPC_GPIO0->IE |= 1 << obj->pin; - else LPC_GPIO0->IE &= ~(1 << obj->pin); - - // One edge - LPC_GPIO0->IBE &= ~(1 << obj->pin); - - // Rising/falling? - if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; - else LPC_GPIO0->IEV &= ~(1 << obj->pin); - break; - case LPC_GPIO1_BASE: - LPC_GPIO1->IC |= 1 << obj->pin; - - LPC_GPIO1->IS &= ~(1 << obj->pin); - - if (enable) LPC_GPIO1->IE |= 1 << obj->pin; - else LPC_GPIO1->IE &= ~(1 << obj->pin); - - LPC_GPIO1->IBE &= ~(1 << obj->pin); - - if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; - else LPC_GPIO0->IEV &= ~(1 << obj->pin); - break; - case LPC_GPIO2_BASE: - LPC_GPIO2->IC |= 1 << obj->pin; - - LPC_GPIO2->IS &= ~(1 << obj->pin); - - if (enable) LPC_GPIO2->IE |= 1 << obj->pin; - else LPC_GPIO2->IE &= ~(1 << obj->pin); - - LPC_GPIO2->IBE &= ~(1 << obj->pin); - - if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; - else LPC_GPIO0->IEV &= ~(1 << obj->pin); - break; - case LPC_GPIO3_BASE: - LPC_GPIO3->IC |= 1 << obj->pin; - - LPC_GPIO3->IC &= ~(1 << obj->pin); - - if (enable) LPC_GPIO3->IE |= 1 << obj->pin; - else LPC_GPIO3->IE &= ~(1 << obj->pin); - - LPC_GPIO3->IBE &= ~(1 << obj->pin); - - if (event == IRQ_RISE) LPC_GPIO0->IEV |= 1 << obj->pin; - else LPC_GPIO0->IEV &= ~(1 << obj->pin); - break; - } + /* + Firstly, clear the interrupts for this pin, + Then, let the registers know whether we're looking for edge detection, + Enable the interrupt, + And set it to only respond to interrupts on one edge. + */ + + // Clear + port_reg->IC |= 1 << obj->pin; + + // Edge + port_reg->IS &= ~(1 << obj->pin); + + // Enable + if (enable) port_reg->IE |= 1 << obj->pin; + else port_reg->IE &= ~(1 << obj->pin); + + // One edge + port_reg->IBE &= ~(1 << obj->pin); + + // Rising/falling? + if (event == IRQ_RISE) port_reg->IEV |= 1 << obj->pin; + else port_reg->IEV &= ~(1 << obj->pin); } diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h index 9ca1df1f3e..f736bcf5f7 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h @@ -27,8 +27,7 @@ extern "C" { struct gpio_irq_s { uint32_t ch; - uint32_t port; - uint32_t pin; + PinName pin; }; struct port_s { From 55f91f1da8d3932881009c63cb7a89d3f44026b3 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 23 Jul 2013 15:44:24 +0100 Subject: [PATCH 7/7] Fixed errors in gpio_irq_api.c --- .../TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c index f31d2340f3..ba3e869ae4 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c @@ -32,10 +32,12 @@ static inline void handle_interrupt_in(uint32_t channel) { // the level of the pin as if it were just a normal input... // Get the number of the pin being used and the port typedef - uint8_t pin_number = (pin_names[channel] & (0x0f << 8)) >> 8; + uint32_t pin = (pin_names[channel] & (0x0f << 8)) >> 8; LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000))); + uint32_t logiclevel = port_reg->DATA; + logiclevel &= (uint32_t)(1 << pin) >> pin; - if ((port_reg->MASKED_ACCESS & (1 << pin_number)) >> pin_number) { + if (logiclevel == 1) { // High, therefore rising edge... irq_handler(channel_ids[channel], IRQ_RISE); } @@ -66,7 +68,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 } */ - channel_ids[channnel] = id; + channel_ids[channel] = id; pin_names[channel] = pin; obj->ch = channel; @@ -74,19 +76,19 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 switch (channel) { case 0: NVIC_SetVector(EINT0_IRQn, (uint32_t)gpio_irq0); - NVIC_EnableIrq(EINT0_IRQn); + NVIC_EnableIRQ(EINT0_IRQn); break; case 1: NVIC_SetVector(EINT1_IRQn, (uint32_t)gpio_irq1); - NVIC_EnableIrq(EINT1_IRQn); + NVIC_EnableIRQ(EINT1_IRQn); break; case 2: NVIC_SetVector(EINT2_IRQn, (uint32_t)gpio_irq2); - NVIC_EnableIrq(EINT2_IRQn); + NVIC_EnableIRQ(EINT2_IRQn); break; case 3: NVIC_SetVector(EINT3_IRQn, (uint32_t)gpio_irq3); - NVIC_EnableIrq(EINT3_IRQn); + NVIC_EnableIRQ(EINT3_IRQn); break; } @@ -99,8 +101,7 @@ void gpio_irq_free(gpio_irq_t *obj) { } void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { - pin = obj->pin; - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000))); + LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((obj->pin & 0xF000) >> PORT_SHIFT) * 0x10000))); /* Firstly, clear the interrupts for this pin,