From 172ababc27acccd0258468c1b2ddab76cce8582d Mon Sep 17 00:00:00 2001
From: Leszek Rusinowicz <leszek.rusinowicz@futureelectronics.com>
Date: Tue, 27 Nov 2018 17:41:43 +0100
Subject: [PATCH] FUTURE_SEQUANA SPI fixes: - fix to allow using only a subset
 of pins for SPI communication - added missing conter increment in
 spi_master_block_write()

---
 targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c | 41 ++++++++++++++-----
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c b/targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c
index 4b668e8010..45f71cc148 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c
@@ -170,16 +170,36 @@ static cy_en_sysclk_status_t spi_init_clock(spi_obj_t *obj, uint32_t frequency)
  */
 static void spi_init_pins(spi_obj_t *obj)
 {
-    if (cy_reserve_io_pin(obj->pin_sclk) ||
-            cy_reserve_io_pin(obj->pin_mosi) ||
-            cy_reserve_io_pin(obj->pin_miso) ||
-            cy_reserve_io_pin(obj->pin_ssel)) {
+    bool conflict = false;
+    conflict = cy_reserve_io_pin(obj->pin_sclk);
+    if (!conflict) {
+        pin_function(obj->pin_sclk, pinmap_function(obj->pin_sclk, PinMap_SPI_SCLK));
+    }
+    if (obj->pin_mosi != NC) {
+        if (!cy_reserve_io_pin(obj->pin_mosi)) {
+            pin_function(obj->pin_mosi, pinmap_function(obj->pin_mosi, PinMap_SPI_MOSI));
+        } else {
+            conflict = true;
+        }
+    }
+    if (obj->pin_miso != NC) {
+        if (!cy_reserve_io_pin(obj->pin_miso)) {
+            pin_function(obj->pin_miso, pinmap_function(obj->pin_miso, PinMap_SPI_MISO));
+        } else {
+            conflict = true;
+        }
+    }
+    if (obj->pin_ssel != NC) {
+        if (!cy_reserve_io_pin(obj->pin_ssel)) {
+            pin_function(obj->pin_ssel, pinmap_function(obj->pin_ssel, PinMap_SPI_SSEL));
+        } else {
+            conflict = true;
+        }
+    }
+    if (conflict) {
         error("SPI pin reservation conflict.");
     }
-    pin_function(obj->pin_sclk, pinmap_function(obj->pin_sclk, PinMap_SPI_SCLK));
-    pin_function(obj->pin_mosi, pinmap_function(obj->pin_mosi, PinMap_SPI_MOSI));
-    pin_function(obj->pin_miso, pinmap_function(obj->pin_miso, PinMap_SPI_MISO));
-    pin_function(obj->pin_ssel, pinmap_function(obj->pin_ssel, PinMap_SPI_SSEL));
+
     // Pin configuration in PinMap defaults to Master mode; revert for Slave.
     if (obj->ms_mode == CY_SCB_SPI_SLAVE) {
         pin_mode(obj->pin_sclk, PullNone);
@@ -276,7 +296,7 @@ void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName s
         }
 #endif // DEVICE_SLEEP && DEVICE_LOWPOWERTIMER
     } else {
-        error("Serial pinout mismatch. Requested pins Rx and Tx can't be used for the same Serial communication.");
+        error("SPI pinout mismatch. Requested Rx and Tx pins can't be used for the same SPI communication.");
     }
 }
 
@@ -367,9 +387,10 @@ int spi_master_block_write(spi_t *obj_in, const char *tx_buffer, int tx_length,
             ++rx_count;
         }
     }
-    // Read any ramaining bytes from the fifo.
+    // Read any remaining bytes from the fifo.
     while (rx_count < rx_length) {
         *rx_buffer++ = (char)Cy_SCB_SPI_Read(obj->base);
+        ++rx_count;
     }
     // Clean up if we have read less bytes than available.
     Cy_SCB_SPI_ClearRxFifo(obj->base);