From 1584c55aedc2c04df909bd0bf19a24f3deb51113 Mon Sep 17 00:00:00 2001
From: "Aron L. Phillips" <Aron.Phillips@ghielectronics.com>
Date: Fri, 1 Aug 2014 15:53:02 -0400
Subject: [PATCH] Modified the linker script for the ARM Micro, Standard, and
 GCC to accommodate for the specific chip that the mBuino platform uses
 LPC11U24FHI33/301 which is 6kB in the SRAM vs 8kB; Added ('GHI_MBUINO',    
 ('ARM', 'uARM', 'GCC_ARM')), to the OFFICIAL_MBED_LIBRARY_BUILD section of
 build_release.py.

---
 .../TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct        | 4 ++--
 .../TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct          | 4 ++--
 .../TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld           | 2 +-
 workspace_tools/build_release.py                              | 1 +
 4 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct
index 093772cc06..5a6e12b240 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_GHI_MBUINO/LPC11U24.sct
@@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x8000  {    ; load region size_region (32k)
    .ANY (+RO)
   }
   ; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
-  ; 8KB - 0xC0 = 0x1F40
-  RW_IRAM1 0x100000C0 0x1F40  {
+  ; 6KB - 0xC0 = 0x1740
+  RW_IRAM1 0x100000C0 0x1740  {
    .ANY (+RW +ZI)
   }
   RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct
index 093772cc06..5a6e12b240 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_GHI_MBUINO/LPC11U24.sct
@@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x8000  {    ; load region size_region (32k)
    .ANY (+RO)
   }
   ; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
-  ; 8KB - 0xC0 = 0x1F40
-  RW_IRAM1 0x100000C0 0x1F40  {
+  ; 6KB - 0xC0 = 0x1740
+  RW_IRAM1 0x100000C0 0x1740  {
    .ANY (+RW +ZI)
   }
   RW_IRAM2 0x20004000 0x800   { ; RW data, USB RAM
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld
index 52168576b9..159019e267 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_GHI_MBUINO/LPC11U24.ld
@@ -4,7 +4,7 @@
 MEMORY
 {
   FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 32K
-  RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
+  RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1740
   USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
 }
 
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index ffd1720512..8f11c2b87c 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -64,6 +64,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('RBLAB_NRF51822', ('ARM', )),
 
     ('LPC11U68',     ('uARM','GCC_ARM','GCC_CR')),
+	('GHI_MBUINO',     ('ARM', 'uARM', 'GCC_ARM')),
 )