diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/rtc_api.c index 42a6c2520a..92ab4788dc 100755 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/rtc_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/rtc_api.c @@ -86,8 +86,9 @@ void rtc_init(void) __HAL_RCC_RTC_ENABLE(); RtcHandle.Init.HourFormat = RTC_HOURFORMAT_24; - RtcHandle.Init.AsynchPrediv = 127; - RtcHandle.Init.SynchPrediv = (rtc_freq / 128) - 1; + /* SubSecond resolution of 16384Hz */ + RtcHandle.Init.AsynchPrediv = /*127*/ 1; + RtcHandle.Init.SynchPrediv = (rtc_freq / /*128*/ 2) - 1; RtcHandle.Init.OutPut = RTC_OUTPUT_DISABLE; RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; RtcHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/sleep.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/sleep.c old mode 100644 new mode 100755 index 07b90c4caf..fe51689e8d --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/sleep.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_MOTE_L152RC/sleep.c @@ -50,12 +50,38 @@ void sleep(void) void deepsleep(void) { + uint8_t STOPEntry = PWR_STOPENTRY_WFI; /* PWR_STOPENTRY_WFE */ + // Disable HAL tick interrupt TimMasterHandle.Instance = TIM5; __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2); // Request to enter STOP mode with regulator in low power mode - HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); + //HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); + /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */ + MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), PWR_LOWPOWERREGULATOR_ON); + + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); + + /* Select Stop mode entry --------------------------------------------------*/ + if(STOPEntry == PWR_STOPENTRY_WFI) + { + /* Request Wait For Interrupt */ + __WFI(); + } + else + { + /* Request Wait For Event */ + __SEV(); + __WFE(); + __WFE(); + } + __NOP(); + __NOP(); + __NOP(); + /* Reset SLEEPDEEP bit of Cortex System Control Register */ + CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); // After wake-up from STOP reconfigure the PLL SetSysClock();