From de73e4574aca8e535a2efa83344918bb331856b8 Mon Sep 17 00:00:00 2001
From: Kevin Gillespie <kevin.gillespie@maximintegrated.com>
Date: Thu, 9 Apr 2015 15:35:56 -0500
Subject: [PATCH 01/45] [MAXWSNENV] Fixing comments in startup file for ARM
 compiler.

---
 .../TOOLCHAIN_ARM_STD/startup_MAX32610.s      | 191 +++++++++---------
 1 file changed, 95 insertions(+), 96 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/startup_MAX32610.s b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/startup_MAX32610.s
index 933e7871ce..e3c52cae9d 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/startup_MAX32610.s
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/TOOLCHAIN_ARM_STD/startup_MAX32610.s
@@ -1,35 +1,34 @@
-/*******************************************************************************
- * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
- * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Except as contained in this notice, the name of Maxim Integrated
- * Products, Inc. shall not be used except as stated in the Maxim Integrated
- * Products, Inc. Branding Policy.
- *
- * The mere transfer of this software does not imply any licenses
- * of trade secrets, proprietary technology, copyrights, patents,
- * trademarks, maskwork rights, or any other form of intellectual
- * property whatsoever. Maxim Integrated Products, Inc. retains all
- * ownership rights.
- *******************************************************************************
- */
+;*******************************************************************************
+; Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a
+; copy of this software and associated documentation files (the "Software"),
+; to deal in the Software without restriction, including without limitation
+; the rights to use, copy, modify, merge, publish, distribute, sublicense,
+; and/or sell copies of the Software, and to permit persons to whom the
+; Software is furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included
+; in all copies or substantial portions of the Software.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+; OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+; IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+; OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+; ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+; OTHER DEALINGS IN THE SOFTWARE.
+;
+; Except as contained in this notice, the name of Maxim Integrated
+; Products, Inc. shall not be used except as stated in the Maxim Integrated
+; Products, Inc. Branding Policy.
+;
+; The mere transfer of this software does not imply any licenses
+; of trade secrets, proprietary technology, copyrights, patents,
+; trademarks, maskwork rights, or any other form of intellectual
+; property whatsoever. Maxim Integrated Products, Inc. retains all
+; ownership rights.
+;*******************************************************************************
 
 __initial_sp        EQU     0x20008000  ; Top of RAM
 
@@ -44,71 +43,71 @@ __initial_sp        EQU     0x20008000  ; Top of RAM
                 EXPORT  __Vectors_End
                 EXPORT  __Vectors_Size
 
-__Vectors       DCD     __initial_sp              /* Top of Stack */
-                DCD     Reset_Handler             /* Reset Handler */
-                DCD     NMI_Handler               /* NMI Handler */
-                DCD     HardFault_Handler         /* Hard Fault Handler */
-                DCD     DefaultIRQ_Handler        /* MPU Fault Handler */
-                DCD     DefaultIRQ_Handler        /* Bus Fault Handler */
-                DCD     DefaultIRQ_Handler        /* Usage Fault Handler */
-                DCD     0                         /* Reserved */
-                DCD     0                         /* Reserved */
-                DCD     0                         /* Reserved */
-                DCD     0                         /* Reserved */
-                DCD     DefaultIRQ_Handler        /* SVCall Handler */
-                DCD     DebugMon_Handler          /* Debug Monitor Handler */
-                DCD     0                         /* Reserved */
-                DCD     DefaultIRQ_Handler        /* PendSV Handler */
-                DCD     SysTick_IRQHandler        /* SysTick Handler */
+__Vectors       DCD     __initial_sp              ; Top of Stack 
+                DCD     Reset_Handler             ; Reset Handler 
+                DCD     NMI_Handler               ; NMI Handler 
+                DCD     HardFault_Handler         ; Hard Fault Handler 
+                DCD     DefaultIRQ_Handler        ; MPU Fault Handler 
+                DCD     DefaultIRQ_Handler        ; Bus Fault Handler 
+                DCD     DefaultIRQ_Handler        ; Usage Fault Handler 
+                DCD     0                         ; Reserved 
+                DCD     0                         ; Reserved 
+                DCD     0                         ; Reserved 
+                DCD     0                         ; Reserved 
+                DCD     DefaultIRQ_Handler        ; SVCall Handler 
+                DCD     DebugMon_Handler          ; Debug Monitor Handler 
+                DCD     0                         ; Reserved 
+                DCD     DefaultIRQ_Handler        ; PendSV Handler 
+                DCD     SysTick_IRQHandler        ; SysTick Handler 
 
-                /* Maxim 32610 Externals interrupts */
-                DCD     UART0_IRQHandler          /* 16: 1 UART0 */
-                DCD     UART1_IRQHandler          /* 17: 2 UART1 */
-                DCD     I2CM0_IRQHandler          /* 18: 3 I2C Master 0 */
-                DCD     I2CS_IRQHandler           /* 19: 4 I2C Slave */
-                DCD     USB_IRQHandler            /* 20: 5 USB */
-                DCD     PMU_IRQHandler            /* 21: 6 DMA */
-                DCD     AFE_IRQHandler            /* 22: 7 AFE */
-                DCD     MAA_IRQHandler            /* 23: 8 MAA */
-                DCD     AES_IRQHandler            /* 24: 9 AES */
-                DCD     SPI0_IRQHandler           /* 25:10 SPI0 */
-                DCD     SPI1_IRQHandler           /* 26:11 SPI1 */
-                DCD     SPI2_IRQHandler           /* 27:12 SPI2 */
-                DCD     TMR0_IRQHandler           /* 28:13 Timer32-0 */
-                DCD     TMR1_IRQHandler           /* 29:14 Timer32-1 */
-                DCD     TMR2_IRQHandler           /* 30:15 Timer32-1 */
-                DCD     TMR3_IRQHandler           /* 31:16 Timer32-2 */
-                DCD     RSVD0_IRQHandler          /* 32:17 RSVD */
-                DCD     RSVD1_IRQHandler          /* 33:18 RSVD */
-                DCD     DAC0_IRQHandler           /* 34:19 DAC0  (12-bit DAC) */  
-                DCD     DAC1_IRQHandler           /* 35:20 DAC1  (12-bit DAC) */  
-                DCD     DAC2_IRQHandler           /* 36:21 DAC2  (8-bit DAC) */
-                DCD     DAC3_IRQHandler           /* 37:22 DAC3  (8-bit DAC) */
-                DCD     ADC_IRQHandler            /* 38:23 ADC */
-                DCD     FLC_IRQHandler            /* 39:24 Flash Controller */
-                DCD     PWRMAN_IRQHandler         /* 40:25 PWRMAN */
-                DCD     CLKMAN_IRQHandler         /* 41:26 CLKMAN */
-                DCD     RTC0_IRQHandler           /* 42:27 RTC INT0 */
-                DCD     RTC1_IRQHandler           /* 43:28 RTC INT1 */
-                DCD     RTC2_IRQHandler           /* 44:29 RTC INT2 */
-                DCD     RTC3_IRQHandler           /* 45:30 RTC INT3 */
-                DCD     WDT0_IRQHandler           /* 46:31 WATCHDOG0 */
-                DCD     WDT0_P_IRQHandler         /* 47:32 WATCHDOG0 PRE-WINDOW */
-                DCD     WDT1_IRQHandler           /* 48:33 WATCHDOG1 */
-                DCD     WDT1_P_IRQHandler         /* 49:34 WATCHDOG1 PRE-WINDOW */
-                DCD     GPIO_P0_IRQHandler        /* 50:35 GPIO Port 0  */
-                DCD     GPIO_P1_IRQHandler        /* 51:36 GPIO Port 1  */
-                DCD     GPIO_P2_IRQHandler        /* 52:37 GPIO Port 2  */
-                DCD     GPIO_P3_IRQHandler        /* 53:38 GPIO Port 3  */
-                DCD     GPIO_P4_IRQHandler        /* 54:39 GPIO Port 4  */
-                DCD     GPIO_P5_IRQHandler        /* 55:40 GPIO Port 5  */
-                DCD     GPIO_P6_IRQHandler        /* 56:41 GPIO Port 6  */
-                DCD     GPIO_P7_IRQHandler        /* 57:42 GPIO Port 7  */
-                DCD     TMR16_0_IRQHandler        /* 58:43 Timer16-s0 */
-                DCD     TMR16_1_IRQHandler        /* 59:44 Timer16-s1 */
-                DCD     TMR16_2_IRQHandler        /* 60:45 Timer16-s2 */
-                DCD     TMR16_3_IRQHandler        /* 61:46 Timer16-s3 */
-                DCD     I2CM1_IRQHandler          /* 62:47 I2C Master 1 */
+                ; Maxim 32610 Externals interrupts 
+                DCD     UART0_IRQHandler          ; 16: 1 UART0 
+                DCD     UART1_IRQHandler          ; 17: 2 UART1 
+                DCD     I2CM0_IRQHandler          ; 18: 3 I2C Master 0 
+                DCD     I2CS_IRQHandler           ; 19: 4 I2C Slave 
+                DCD     USB_IRQHandler            ; 20: 5 USB 
+                DCD     PMU_IRQHandler            ; 21: 6 DMA 
+                DCD     AFE_IRQHandler            ; 22: 7 AFE 
+                DCD     MAA_IRQHandler            ; 23: 8 MAA 
+                DCD     AES_IRQHandler            ; 24: 9 AES 
+                DCD     SPI0_IRQHandler           ; 25:10 SPI0 
+                DCD     SPI1_IRQHandler           ; 26:11 SPI1 
+                DCD     SPI2_IRQHandler           ; 27:12 SPI2 
+                DCD     TMR0_IRQHandler           ; 28:13 Timer32-0 
+                DCD     TMR1_IRQHandler           ; 29:14 Timer32-1 
+                DCD     TMR2_IRQHandler           ; 30:15 Timer32-1 
+                DCD     TMR3_IRQHandler           ; 31:16 Timer32-2 
+                DCD     RSVD0_IRQHandler          ; 32:17 RSVD 
+                DCD     RSVD1_IRQHandler          ; 33:18 RSVD 
+                DCD     DAC0_IRQHandler           ; 34:19 DAC0  (12-bit DAC)   
+                DCD     DAC1_IRQHandler           ; 35:20 DAC1  (12-bit DAC)   
+                DCD     DAC2_IRQHandler           ; 36:21 DAC2  (8-bit DAC) 
+                DCD     DAC3_IRQHandler           ; 37:22 DAC3  (8-bit DAC) 
+                DCD     ADC_IRQHandler            ; 38:23 ADC 
+                DCD     FLC_IRQHandler            ; 39:24 Flash Controller 
+                DCD     PWRMAN_IRQHandler         ; 40:25 PWRMAN 
+                DCD     CLKMAN_IRQHandler         ; 41:26 CLKMAN 
+                DCD     RTC0_IRQHandler           ; 42:27 RTC INT0 
+                DCD     RTC1_IRQHandler           ; 43:28 RTC INT1 
+                DCD     RTC2_IRQHandler           ; 44:29 RTC INT2 
+                DCD     RTC3_IRQHandler           ; 45:30 RTC INT3 
+                DCD     WDT0_IRQHandler           ; 46:31 WATCHDOG0 
+                DCD     WDT0_P_IRQHandler         ; 47:32 WATCHDOG0 PRE-WINDOW 
+                DCD     WDT1_IRQHandler           ; 48:33 WATCHDOG1 
+                DCD     WDT1_P_IRQHandler         ; 49:34 WATCHDOG1 PRE-WINDOW 
+                DCD     GPIO_P0_IRQHandler        ; 50:35 GPIO Port 0  
+                DCD     GPIO_P1_IRQHandler        ; 51:36 GPIO Port 1  
+                DCD     GPIO_P2_IRQHandler        ; 52:37 GPIO Port 2  
+                DCD     GPIO_P3_IRQHandler        ; 53:38 GPIO Port 3  
+                DCD     GPIO_P4_IRQHandler        ; 54:39 GPIO Port 4  
+                DCD     GPIO_P5_IRQHandler        ; 55:40 GPIO Port 5  
+                DCD     GPIO_P6_IRQHandler        ; 56:41 GPIO Port 6  
+                DCD     GPIO_P7_IRQHandler        ; 57:42 GPIO Port 7  
+                DCD     TMR16_0_IRQHandler        ; 58:43 Timer16-s0 
+                DCD     TMR16_1_IRQHandler        ; 59:44 Timer16-s1 
+                DCD     TMR16_2_IRQHandler        ; 60:45 Timer16-s2 
+                DCD     TMR16_3_IRQHandler        ; 61:46 Timer16-s3 
+                DCD     I2CM1_IRQHandler          ; 62:47 I2C Master 1 
 __Vectors_End
 
 __Vectors_Size  EQU  __Vectors_End - __Vectors

From f211a680b460d3407ab3e5289a55760cda5cf039 Mon Sep 17 00:00:00 2001
From: Jun-Ru Chang <jrjang@realtek.com>
Date: Fri, 10 Apr 2015 10:38:52 +0800
Subject: [PATCH 02/45] [RTOS] fix compilation warning

pragma push/pop/Ospace are only supported by ARM compiler. Change
predefined marco from __arm__ to __CC_ARM. Warning messages are
shown as below.

[Warning] rt_CMSIS.c@1867: 1866:0: warning: ignoring #pragma push
[-Wunknown-pragmas] ignoring #pragma Ospace  [-Wunknown-pragmas]
[Warning] rt_CMSIS.c@1884: 1866:0: warning: ignoring #pragma push
[-Wunknown-pragmas] ignoring #pragma pop  [-Wunknown-pragmas]

Change-Id: Ife657b710d694449b30dc4b3150cd49c883fc080
Signed-off-by: Jun-Ru Chang <jrjang@gmail.com>
---
 libraries/rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c | 4 ++--
 libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/libraries/rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c b/libraries/rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c
index 91a3584a33..8b7b1fad4e 100644
--- a/libraries/rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c
+++ b/libraries/rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c
@@ -2066,7 +2066,7 @@ osStatus osMailPut (osMailQId queue_id, void *mail) {
   return osMessagePut(*((void **)queue_id), (uint32_t)mail, 0);
 }
 
-#ifdef __arm__
+#ifdef __CC_ARM
 #pragma push
 #pragma Ospace
 #endif // __arm__
@@ -2084,6 +2084,6 @@ os_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec) {
 
   return ret;
 }
-#ifdef __arm__
+#ifdef __CC_ARM
 #pragma pop
 #endif // __arm__
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c b/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c
index 13a23458af..3c05b4ed34 100644
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c
@@ -1862,7 +1862,7 @@ osStatus osMailPut (osMailQId queue_id, void *mail) {
   return osMessagePut(*((void **)queue_id), (uint32_t)mail, 0);
 }
 
-#ifdef __arm__
+#ifdef __CC_ARM
 #pragma push
 #pragma Ospace
 #endif // __arm__
@@ -1880,6 +1880,6 @@ os_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec) {
 
   return ret;
 }
-#ifdef __arm__
+#ifdef __CC_ARM
 #pragma pop
 #endif // __arm__

From e54b32015d2413f502ddeb63f22871b24e415ad3 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Fri, 10 Apr 2015 18:11:16 -0500
Subject: [PATCH 03/45] Add GCC_CR to LPC824, fixes LPCXpresso exporter

---
 workspace_tools/build_release.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 9025434860..09ca8f3ebb 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -33,7 +33,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('ARCH_PRO',     ('ARM', 'GCC_ARM', 'GCC_CR', 'GCC_CS', 'IAR')),
     ('LPC2368',      ('ARM', 'GCC_ARM')),
     ('LPC812',       ('uARM','IAR')),
-    ('LPC824',       ('uARM', 'IAR')),
+    ('LPC824',       ('uARM', 'IAR', 'GCC_CR')),
     ('SSCI824',      ('uARM',)),
     ('LPC1347',      ('ARM','IAR')),
     ('LPC4088',      ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),

From 1793b6a80a27dcd7ec9b8c8c67469b654e98ccee Mon Sep 17 00:00:00 2001
From: julbouln <jboulnois@gmail.com>
Date: Sat, 11 Apr 2015 11:17:40 +0200
Subject: [PATCH 04/45] USBMIDI: Add SysEx support

---
 libraries/USBDevice/USBMIDI/MIDIMessage.h | 19 ++++-
 libraries/USBDevice/USBMIDI/USBMIDI.cpp   | 90 +++++++++++++++++++++--
 libraries/USBDevice/USBMIDI/USBMIDI.h     |  5 +-
 3 files changed, 104 insertions(+), 10 deletions(-)

diff --git a/libraries/USBDevice/USBMIDI/MIDIMessage.h b/libraries/USBDevice/USBMIDI/MIDIMessage.h
index 90f695039a..c0be0f869b 100644
--- a/libraries/USBDevice/USBMIDI/MIDIMessage.h
+++ b/libraries/USBDevice/USBMIDI/MIDIMessage.h
@@ -21,6 +21,8 @@
 
 #include "mbed.h"
 
+#define MAX_MIDI_MESSAGE_SIZE 256 // Max message size. SysEx can be up to 65536 but 256 should be fine for most usage
+
 // MIDI Message Format
 //
 // [ msg(4) | channel(4) ] [ 0 | n(7) ] [ 0 | m(7) ]
@@ -49,6 +51,16 @@ public:
             data[i] = buf[i];
     }
 
+    // New constructor, buf is a true MIDI message (not USBMidi message) and buf_len true message length.
+    MIDIMessage(uint8_t *buf, int buf_len) {
+        length=buf_len+1;
+        // first byte keeped for retro-compatibility
+        data[0]=0;
+
+        for (int i = 0; i < buf_len; i++)
+            data[i+1] = buf[i];
+    }
+
     // create messages
 
     /** Create a NoteOff message
@@ -174,7 +186,8 @@ public:
         ProgramChangeType,
         ChannelAftertouchType,
         PitchWheelType,
-        AllNotesOffType
+        AllNotesOffType,
+        SysExType
     };
 
     /** Read the message type
@@ -196,6 +209,7 @@ public:
             case 0xC: return ProgramChangeType;
             case 0xD: return ChannelAftertouchType;
             case 0xE: return PitchWheelType;
+            case 0xF: return SysExType;
             default: return ErrorType;
         }
     }
@@ -245,7 +259,8 @@ public:
         return p - 8192; // 0 - 16383, 8192 is center
     }
 
-    uint8_t data[4];
+    uint8_t data[MAX_MIDI_MESSAGE_SIZE+1];
+    uint8_t length=4;
 };
 
 #endif
diff --git a/libraries/USBDevice/USBMIDI/USBMIDI.cpp b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
index 048ab728bc..042f4f33d3 100644
--- a/libraries/USBDevice/USBMIDI/USBMIDI.cpp
+++ b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
@@ -25,8 +25,41 @@ USBMIDI::USBMIDI(uint16_t vendor_id, uint16_t product_id, uint16_t product_relea
     USBDevice::connect();
 }
 
+// write plain MIDIMessage that will be converted to USBMidi event packet
 void USBMIDI::write(MIDIMessage m) {
-    USBDevice::write(EPBULK_IN, m.data, 4, MAX_PACKET_SIZE_EPBULK);
+    // first byte keeped for retro-compatibility
+    for(int p=1; p < m.length; p+=3) {
+        uint8_t buf[4];
+        // Midi message to USBMidi event packet
+        buf[0]=m.data[p] >> 4;
+        // SysEx
+        if(buf[0] == 0xF) {
+            if(p < m.length-1) {
+                // SysEx start or continue
+                buf[0]=0x4;
+            } else {
+                switch(m.length - p) {
+                    case 1:
+                        // SysEx end with one byte
+                        buf[0]=0x5;
+                        break;
+                    case 2:
+                        // SysEx end with two bytes
+                        buf[0]=0x6;
+                        break;
+                    case 3:
+                        // SysEx end with three bytes
+                        buf[0]=0x7;
+                        break;
+                }
+            }
+        }
+        buf[1]=m.data[p];
+        buf[2]=m.data[p+1];
+        buf[3]=m.data[p+2];
+
+        USBDevice::write(EPBULK_IN, buf, 4, MAX_PACKET_SIZE_EPBULK);
+    }
 }
 
 
@@ -34,16 +67,61 @@ void USBMIDI::attach(void (*fptr)(MIDIMessage)) {
     midi_evt = fptr;
 }
 
-
 bool USBMIDI::EPBULK_OUT_callback() {
     uint8_t buf[64];
     uint32_t len;
     readEP(EPBULK_OUT, buf, &len, 64);
 
     if (midi_evt != NULL) {
-        for (uint32_t i=0; i<len; i+=4) {
-            midi_evt(MIDIMessage(buf+i));
-        }
+        for (uint32_t i=0; i<len; i+=4) {   
+            uint8_t data_read;
+            data_end=true;
+            switch(buf[i]) {
+            case 0x2:
+                // Two-bytes System Common Message - undefined in USBMidi 1.0
+                data_read=2;
+                break;
+            case 0x4:
+                // SysEx start or continue
+                data_end=false;
+                data_read=3;
+                break;
+            case 0x5:
+                 // Single-byte System Common Message or SysEx end with one byte
+                data_read=1;
+                break;
+            case 0x6:
+                // SysEx end with two bytes
+                data_read=2;
+                break;
+            case 0xC:
+                // Program change
+                data_read=2;
+                break;
+            case 0xD:
+                // Channel pressure
+                data_read=2;
+                break;      
+            case 0xF:
+                // Single byte
+                data_read=1;
+                break;    
+            default:
+                // Others three-bytes messages
+                data_read=3;
+                break;      
+            } 
+        
+            for(uint8_t j=1;j<data_read+1;j++) {
+                data[cur_data]=buf[i+j];
+                cur_data++;
+            }
+        
+            if(data_end) {
+                 midi_evt(MIDIMessage(data,cur_data));
+                 cur_data=0;            
+            }
+       }
     }
 
     // We reactivate the endpoint to receive next characters
@@ -51,8 +129,6 @@ bool USBMIDI::EPBULK_OUT_callback() {
     return true;
 }
 
-
-
 // Called in ISR context
 // Set configuration. Return false if the
 // configuration is not supported.
diff --git a/libraries/USBDevice/USBMIDI/USBMIDI.h b/libraries/USBDevice/USBMIDI/USBMIDI.h
index 6b673b63c8..a7818dd8ce 100644
--- a/libraries/USBDevice/USBMIDI/USBMIDI.h
+++ b/libraries/USBDevice/USBMIDI/USBMIDI.h
@@ -102,8 +102,11 @@ protected:
     virtual uint8_t * configurationDesc();
 
 private:
+    uint8_t data[MAX_MIDI_MESSAGE_SIZE+1];
+    uint8_t cur_data=0;
+    bool data_end = true;
+    
     void (*midi_evt)(MIDIMessage);
-
 };
 
 #endif

From 20759f0ff9bc265b467d1c78031ceabc8e555525 Mon Sep 17 00:00:00 2001
From: julbouln <jboulnois@gmail.com>
Date: Sat, 11 Apr 2015 11:22:29 +0200
Subject: [PATCH 05/45] USBMIDI: SysEx message create helper

---
 libraries/USBDevice/USBMIDI/MIDIMessage.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/libraries/USBDevice/USBMIDI/MIDIMessage.h b/libraries/USBDevice/USBMIDI/MIDIMessage.h
index c0be0f869b..d1a2bc58e7 100644
--- a/libraries/USBDevice/USBMIDI/MIDIMessage.h
+++ b/libraries/USBDevice/USBMIDI/MIDIMessage.h
@@ -174,6 +174,16 @@ public:
         return ControlChange(123, 0, channel);
     }
 
+     /** Create a SysEx message
+     * @param data SysEx data (including 0xF0 .. 0xF7)
+     * @param len SysEx data length
+     * @returns A MIDIMessage
+     */
+    static MIDIMessage SysEx(uint8_t *data, int len) {
+        MIDIMessage msg=MIDIMessage(data,len);
+        return msg;
+    }
+
     // decode messages
 
     /** MIDI Message Types */

From d8049d58323c44f901e7361c787819f658137464 Mon Sep 17 00:00:00 2001
From: Toyomasa Watarai <toyomasa.watarai@gmail.com>
Date: Mon, 13 Apr 2015 17:13:02 +0900
Subject: [PATCH 06/45] [LPC824, SSCI824] Add GCC_ARM exporter support

* Correct interrupt vector table for GCC_ARM startup
* Add GCC_ARM build target for SSCI824
* Add GCC_ARM exporter template files
* export_test has been passed
* autometed test has been passed
---
 .../TOOLCHAIN_GCC_ARM/startup_LPC824.s        |  28 ++-
 .../TOOLCHAIN_GCC_ARM/LPC824.ld               | 152 ++++++++++++
 .../TOOLCHAIN_GCC_ARM/startup_LPC824.s        | 228 ++++++++++++++++++
 workspace_tools/build_release.py              |   4 +-
 workspace_tools/export/gcc_arm_lpc824.tmpl    |  77 ++++++
 workspace_tools/export/gcc_arm_ssci824.tmpl   |  77 ++++++
 workspace_tools/export/gccarm.py              |   2 +
 workspace_tools/export_test.py                |   6 +-
 workspace_tools/targets.py                    |   2 +-
 9 files changed, 568 insertions(+), 8 deletions(-)
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/LPC824.ld
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
 create mode 100644 workspace_tools/export/gcc_arm_lpc824.tmpl
 create mode 100644 workspace_tools/export/gcc_arm_ssci824.tmpl

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_ARM/startup_LPC824.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
index cb4f0b092e..c4273d680b 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
@@ -98,16 +98,28 @@ __isr_vector:
 /* LPC824 interrupts */
     .long    SPI0_IRQHandler                         // SPI0 controller
     .long    SPI1_IRQHandler                         // SPI1 controller
+    .long    0                                       // Reserved
     .long    UART0_IRQHandler                        // UART0
     .long    UART1_IRQHandler                        // UART1
     .long    UART2_IRQHandler                        // UART2
-    .long    I2C_IRQHandler                         // I2C controller
+    .long    0                                       // Reserved
+    .long    I2C1_IRQHandler                         // I2C ch1 controller
+    .long    I2C0_IRQHandler                         // I2C ch0 controller
     .long    SCT_IRQHandler                          // Smart Counter Timer
     .long    MRT_IRQHandler                          // Multi-Rate Timer
     .long    CMP_IRQHandler                          // Comparator
     .long    WDT_IRQHandler                          // PIO1 (0:11)
     .long    BOD_IRQHandler                          // Brown Out Detect
+    .long    Flash_IRQHandler                        // Flash interrupt
     .long    WKT_IRQHandler                          // Wakeup timer
+    .long    ADC_SEQA_IRQHandler                     // ADC sequence A completion
+    .long    ADC_SEQB_IRQHandler                     // ADC sequence B completion
+    .long    ADC_THCMP_IRQHandler                    // ADC threshold compare
+    .long    ADC_OVR_IRQHandler                      // ADC overrun
+    .long    DMA_IRQHandler                          // DMA interrupt
+    .long    I2C2_IRQHandler                         // I2C2 controller
+    .long    I2C3_IRQHandler                         // I2C3 controller
+    .long    0                                       // Reserved
     .long    PININT0_IRQHandler                      // PIO INT0
     .long    PININT1_IRQHandler                      // PIO INT1
     .long    PININT2_IRQHandler                      // PIO INT2
@@ -181,18 +193,28 @@ Reset_Handler:
     .weak     \handler_name
     .set      \handler_name, Default_Handler
     .endm
+
     def_irq_default_handler    SPI0_IRQHandler
     def_irq_default_handler    SPI1_IRQHandler
     def_irq_default_handler    UART0_IRQHandler
     def_irq_default_handler    UART1_IRQHandler
     def_irq_default_handler    UART2_IRQHandler
-    def_irq_default_handler    I2C_IRQHandler
+    def_irq_default_handler    I2C0_IRQHandler
+    def_irq_default_handler    I2C1_IRQHandler
+    def_irq_default_handler    I2C2_IRQHandler
+    def_irq_default_handler    I2C3_IRQHandler
     def_irq_default_handler    SCT_IRQHandler
     def_irq_default_handler    MRT_IRQHandler
     def_irq_default_handler    CMP_IRQHandler
     def_irq_default_handler    WDT_IRQHandler
     def_irq_default_handler    BOD_IRQHandler
+    def_irq_default_handler    Flash_IRQHandler
     def_irq_default_handler    WKT_IRQHandler
+    def_irq_default_handler    ADC_SEQA_IRQHandler
+    def_irq_default_handler    ADC_SEQB_IRQHandler
+    def_irq_default_handler    ADC_THCMP_IRQHandler
+    def_irq_default_handler    ADC_OVR_IRQHandler
+    def_irq_default_handler    DMA_IRQHandler
     def_irq_default_handler    PININT0_IRQHandler
     def_irq_default_handler    PININT1_IRQHandler
     def_irq_default_handler    PININT2_IRQHandler
@@ -200,7 +222,7 @@ Reset_Handler:
     def_irq_default_handler    PININT4_IRQHandler
     def_irq_default_handler    PININT5_IRQHandler
     def_irq_default_handler    PININT6_IRQHandler
-    def_irq_default_handler    PININT7_IRQHandler    
+    def_irq_default_handler    PININT7_IRQHandler
 
     .end
 
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/LPC824.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/LPC824.ld
new file mode 100644
index 0000000000..be901736a7
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/LPC824.ld
@@ -0,0 +1,152 @@
+/* Linker script for mbed LPC824-GCC-ARM based on LPC1114-GCC-ARM-LPC1114.ld */
+
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  /* Define each memory region */
+  FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x8000 /* 32K bytes */
+  RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x2000-0xC0 /* 8K bytes */
+
+
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ * 
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+		*(.text.Reset_Handler)
+        *(.text.SystemInit)
+		. = 0x200;
+        *(.text*)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab : 
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+        
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE (__fini_array_end = .);
+
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+
+    } > RAM
+
+    .bss :
+    {
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        __bss_end__ = .;
+    } > RAM
+    
+    .heap :
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy :
+    {
+        *(.stack)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/startup_LPC824.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
new file mode 100644
index 0000000000..c4273d680b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/TOOLCHAIN_GCC_ARM/startup_LPC824.s
@@ -0,0 +1,228 @@
+/* File: startup_ARMCM0.S
+ * Purpose: startup file for Cortex-M0 devices. Should use with 
+ *   GCC for ARM Embedded Processors
+ * Version: V1.2
+ * Date: 15 Nov 2011
+ * 
+ * Copyright (c) 2011, ARM Limited
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    * Neither the name of the ARM Limited nor the
+      names of its contributors may be used to endorse or promote products
+      derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+    .syntax unified
+    .arch armv6-m
+
+/* Memory Model
+   The HEAP starts at the end of the DATA section and grows upward.
+   
+   The STACK starts at the end of the RAM and grows downward.
+   
+   The HEAP and stack STACK are only checked at compile time:
+   (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
+   
+   This is just a check for the bare minimum for the Heap+Stack area before
+   aborting compilation, it is not the run time limit:
+   Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
+ */
+    .section .stack
+    .align 3
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0x80
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+__StackLimit:
+    .space    Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x80
+#endif
+    .globl    __HeapBase
+    .globl    __HeapLimit
+__HeapBase:
+    .space    Heap_Size
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+    
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler         /* Reset Handler */
+    .long    NMI_Handler           /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+/* LPC824 interrupts */
+    .long    SPI0_IRQHandler                         // SPI0 controller
+    .long    SPI1_IRQHandler                         // SPI1 controller
+    .long    0                                       // Reserved
+    .long    UART0_IRQHandler                        // UART0
+    .long    UART1_IRQHandler                        // UART1
+    .long    UART2_IRQHandler                        // UART2
+    .long    0                                       // Reserved
+    .long    I2C1_IRQHandler                         // I2C ch1 controller
+    .long    I2C0_IRQHandler                         // I2C ch0 controller
+    .long    SCT_IRQHandler                          // Smart Counter Timer
+    .long    MRT_IRQHandler                          // Multi-Rate Timer
+    .long    CMP_IRQHandler                          // Comparator
+    .long    WDT_IRQHandler                          // PIO1 (0:11)
+    .long    BOD_IRQHandler                          // Brown Out Detect
+    .long    Flash_IRQHandler                        // Flash interrupt
+    .long    WKT_IRQHandler                          // Wakeup timer
+    .long    ADC_SEQA_IRQHandler                     // ADC sequence A completion
+    .long    ADC_SEQB_IRQHandler                     // ADC sequence B completion
+    .long    ADC_THCMP_IRQHandler                    // ADC threshold compare
+    .long    ADC_OVR_IRQHandler                      // ADC overrun
+    .long    DMA_IRQHandler                          // DMA interrupt
+    .long    I2C2_IRQHandler                         // I2C2 controller
+    .long    I2C3_IRQHandler                         // I2C3 controller
+    .long    0                                       // Reserved
+    .long    PININT0_IRQHandler                      // PIO INT0
+    .long    PININT1_IRQHandler                      // PIO INT1
+    .long    PININT2_IRQHandler                      // PIO INT2
+    .long    PININT3_IRQHandler                      // PIO INT3
+    .long    PININT4_IRQHandler                      // PIO INT4
+    .long    PININT5_IRQHandler                      // PIO INT5
+    .long    PININT6_IRQHandler                      // PIO INT6
+    .long    PININT7_IRQHandler                      // PIO INT7
+    
+    .size    __isr_vector, . - __isr_vector
+
+    .section .text.Reset_Handler
+    .thumb
+    .thumb_func
+    .align 2
+    .globl    Reset_Handler
+    .type    Reset_Handler, %function
+Reset_Handler:
+/*     Loop to copy data from read only memory to RAM. The ranges
+ *      of copy from/to are specified by following symbols evaluated in 
+ *      linker script.
+ *      __etext: End of code section, i.e., begin of data sections to copy from.
+ *      __data_start__/__data_end__: RAM address range that data should be
+ *      copied to. Both must be aligned to 4 bytes boundary.  */
+
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+    subs    r3, r2
+    ble    .Lflash_to_ram_loop_end
+
+    movs    r4, 0
+.Lflash_to_ram_loop:
+    ldr    r0, [r1,r4]
+    str    r0, [r2,r4]
+    adds    r4, 4
+    cmp    r4, r3
+    blt    .Lflash_to_ram_loop
+.Lflash_to_ram_loop_end:
+
+    ldr    r0, =SystemInit
+    blx    r0
+    ldr    r0, =_start
+    bx    r0
+    .pool
+    .size Reset_Handler, . - Reset_Handler
+    
+    .text
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_default_handler    handler_name
+    .align 1
+    .thumb_func
+    .weak    \handler_name
+    .type    \handler_name, %function
+\handler_name :
+    b    .
+    .size    \handler_name, . - \handler_name
+    .endm
+
+    def_default_handler     NMI_Handler
+    def_default_handler     HardFault_Handler
+    def_default_handler     SVC_Handler
+    def_default_handler     PendSV_Handler
+    def_default_handler     SysTick_Handler
+    def_default_handler     Default_Handler
+
+    .macro    def_irq_default_handler    handler_name
+    .weak     \handler_name
+    .set      \handler_name, Default_Handler
+    .endm
+
+    def_irq_default_handler    SPI0_IRQHandler
+    def_irq_default_handler    SPI1_IRQHandler
+    def_irq_default_handler    UART0_IRQHandler
+    def_irq_default_handler    UART1_IRQHandler
+    def_irq_default_handler    UART2_IRQHandler
+    def_irq_default_handler    I2C0_IRQHandler
+    def_irq_default_handler    I2C1_IRQHandler
+    def_irq_default_handler    I2C2_IRQHandler
+    def_irq_default_handler    I2C3_IRQHandler
+    def_irq_default_handler    SCT_IRQHandler
+    def_irq_default_handler    MRT_IRQHandler
+    def_irq_default_handler    CMP_IRQHandler
+    def_irq_default_handler    WDT_IRQHandler
+    def_irq_default_handler    BOD_IRQHandler
+    def_irq_default_handler    Flash_IRQHandler
+    def_irq_default_handler    WKT_IRQHandler
+    def_irq_default_handler    ADC_SEQA_IRQHandler
+    def_irq_default_handler    ADC_SEQB_IRQHandler
+    def_irq_default_handler    ADC_THCMP_IRQHandler
+    def_irq_default_handler    ADC_OVR_IRQHandler
+    def_irq_default_handler    DMA_IRQHandler
+    def_irq_default_handler    PININT0_IRQHandler
+    def_irq_default_handler    PININT1_IRQHandler
+    def_irq_default_handler    PININT2_IRQHandler
+    def_irq_default_handler    PININT3_IRQHandler
+    def_irq_default_handler    PININT4_IRQHandler
+    def_irq_default_handler    PININT5_IRQHandler
+    def_irq_default_handler    PININT6_IRQHandler
+    def_irq_default_handler    PININT7_IRQHandler
+
+    .end
+
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 09ca8f3ebb..156a43021c 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -33,8 +33,8 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('ARCH_PRO',     ('ARM', 'GCC_ARM', 'GCC_CR', 'GCC_CS', 'IAR')),
     ('LPC2368',      ('ARM', 'GCC_ARM')),
     ('LPC812',       ('uARM','IAR')),
-    ('LPC824',       ('uARM', 'IAR', 'GCC_CR')),
-    ('SSCI824',      ('uARM',)),
+    ('LPC824',       ('uARM', 'GCC_ARM', 'IAR', 'GCC_CR')),
+    ('SSCI824',      ('uARM','GCC_ARM')),
     ('LPC1347',      ('ARM','IAR')),
     ('LPC4088',      ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
     ('LPC4088_DM',   ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
diff --git a/workspace_tools/export/gcc_arm_lpc824.tmpl b/workspace_tools/export/gcc_arm_lpc824.tmpl
new file mode 100644
index 0000000000..6fffb9c742
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_lpc824.tmpl
@@ -0,0 +1,77 @@
+# This file was automagically generated by mbed.org. For more information, 
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN = 
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+############################################################################### 
+AS      = $(GCC_BIN)arm-none-eabi-as
+CC      = $(GCC_BIN)arm-none-eabi-gcc
+CPP     = $(GCC_BIN)arm-none-eabi-g++
+LD      = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE 	= $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m0plus -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+  CC_FLAGS += -DDEBUG -O0
+else
+  CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex 
+
+clean:
+	rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+	$(AS) $(CPU) -o $@ $<
+
+.c.o:
+	$(CC)  $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99   $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+	$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+	$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+	@echo ""
+	@echo "*****"
+	@echo "***** You must modify vector checksum value in *.bin and *.hex files."
+	@echo "*****"
+	@echo ""
+	$(SIZE) $@
+
+$(PROJECT).bin: $(PROJECT).elf
+	@$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+	@$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+	@$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+	$(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gcc_arm_ssci824.tmpl b/workspace_tools/export/gcc_arm_ssci824.tmpl
new file mode 100644
index 0000000000..6fffb9c742
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_ssci824.tmpl
@@ -0,0 +1,77 @@
+# This file was automagically generated by mbed.org. For more information, 
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN = 
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+############################################################################### 
+AS      = $(GCC_BIN)arm-none-eabi-as
+CC      = $(GCC_BIN)arm-none-eabi-gcc
+CPP     = $(GCC_BIN)arm-none-eabi-g++
+LD      = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE 	= $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m0plus -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+  CC_FLAGS += -DDEBUG -O0
+else
+  CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex 
+
+clean:
+	rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+	$(AS) $(CPU) -o $@ $<
+
+.c.o:
+	$(CC)  $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99   $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+	$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+	$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+	@echo ""
+	@echo "*****"
+	@echo "***** You must modify vector checksum value in *.bin and *.hex files."
+	@echo "*****"
+	@echo ""
+	$(SIZE) $@
+
+$(PROJECT).bin: $(PROJECT).elf
+	@$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+	@$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+	@$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+	$(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index 563158c495..3d0be4668f 100644
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -40,6 +40,8 @@ class GccArm(Exporter):
         'LPC11U35_401',
         'LPC11U35_501',
         'LPC11U37H_401',
+        'LPC824',
+        'SSCI824',
         'STM32F407',
         'DISCO_F100RB',
         'DISCO_F051R8',
diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py
index 021ad9c458..0f18fe7a79 100755
--- a/workspace_tools/export_test.py
+++ b/workspace_tools/export_test.py
@@ -156,6 +156,8 @@ if __name__ == '__main__':
             ('gcc_arm', 'LPC11U35_501'),
             ('gcc_arm', 'LPCCAPPUCCINO'),
             ('gcc_arm', 'LPC2368'),
+            ('gcc_arm', 'LPC824'),
+            ('gcc_arm', 'SSCI824'),
 
             ('gcc_arm', 'STM32F407'),
             ('gcc_arm', 'DISCO_F100RB'),
@@ -194,8 +196,8 @@ if __name__ == '__main__':
             ('iar', 'MTS_MDOT_F405RG'),
             ('iar', 'MTS_MDOT_F411RE'),
 
-            
-            (None, None),
+            # Removed following item to avoid script error
+            #(None, None),
         ]:
         print '\n=== Exporting to "%s::%s" ===' % (toolchain, target)
         test_export(toolchain, target)
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index facd822090..d3abcc4235 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -280,7 +280,7 @@ class SSCI824(LPCTarget):
         LPCTarget.__init__(self)
         self.core = "Cortex-M0+"
         self.extra_labels = ['NXP', 'LPC82X']
-        self.supported_toolchains = ["uARM"]
+        self.supported_toolchains = ["uARM", "GCC_ARM"]
         self.default_toolchain = "uARM"
         self.is_disk_virtual = True
 

From b8da610a78ee6fa0b39cf95de1380115b82f9db1 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Mon, 13 Apr 2015 16:13:52 +0200
Subject: [PATCH 07/45] Tools - build_release - return 1 if any build fails

---
 workspace_tools/build_release.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 09ca8f3ebb..f14575f8ee 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -126,3 +126,4 @@ if __name__ == '__main__':
     if failures:
         print "\n\nBuild failures:"
         print "\n".join(["  * %s" % f for f in failures])
+        sys.exit(1)

From d65e7bfe3d2a2108722db1d7a79559d4ce779a2c Mon Sep 17 00:00:00 2001
From: Jeremy Brodt <jeremy.brodt@maximintegrated.com>
Date: Fri, 10 Apr 2015 08:36:24 -0500
Subject: [PATCH 08/45] Added copying of library files.

---
 workspace_tools/build_api.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py
index 5e2c854045..9a4bf4e7f0 100644
--- a/workspace_tools/build_api.py
+++ b/workspace_tools/build_api.py
@@ -234,7 +234,7 @@ def build_mbed_libs(target, toolchain_name, options=None, verbose=False, clean=F
     # Target specific sources
     HAL_SRC = join(MBED_TARGETS_PATH, "hal")
     hal_implementation = toolchain.scan_resources(HAL_SRC)
-    toolchain.copy_files(hal_implementation.headers + hal_implementation.hex_files, BUILD_TARGET, HAL_SRC)
+    toolchain.copy_files(hal_implementation.headers + hal_implementation.hex_files + hal_implementation.libraries, BUILD_TARGET, HAL_SRC)
     incdirs = toolchain.scan_resources(BUILD_TARGET).inc_dirs
     objects = toolchain.compile_sources(hal_implementation, TMP_PATH, [MBED_LIBRARIES] + incdirs)
 

From dc5fca2e21df28fa6b6f89f184a2e6b6464dc0f9 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Fri, 20 Mar 2015 11:17:53 -0500
Subject: [PATCH 09/45] added toolchain filter to build_release

---
 workspace_tools/build_release.py | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index f14575f8ee..0e85403bbb 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -98,6 +98,9 @@ if __name__ == '__main__':
                       default=1, help="Number of concurrent jobs (default 1). Use 0 for auto based on host machine's number of CPUs")
     parser.add_option("-v", "--verbose", action="store_true", dest="verbose",
                       default=False, help="Verbose diagnostic output")
+    parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
+
+
     options, args = parser.parse_args()
     start = time()
     failures = []
@@ -107,6 +110,12 @@ if __name__ == '__main__':
             toolchains = (getattr(TARGET_MAP[target_name], 'default_toolchain', 'ARM'),)
         else:
             toolchains = toolchain_list
+
+        if options.toolchains:
+            print "Only building using the following toolchains: %s" % (options.toolchains)
+            toolchainSet = set(toolchains)
+            toolchains = toolchainSet and set((options.toolchains).split(','))
+
         for toolchain in toolchains:
             id = "%s::%s" % (target_name, toolchain)
             try:

From f1c235b1d8baaa3fdd0d8d44e6d1fe6c0a8fd6af Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Fri, 27 Mar 2015 16:56:14 -0500
Subject: [PATCH 10/45] Added Jenkins build reporting option

---
 workspace_tools/build_release.py | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 0e85403bbb..49de1c1d9c 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -100,11 +100,14 @@ if __name__ == '__main__':
                       default=False, help="Verbose diagnostic output")
     parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
 
+    parser.add_option("", "--report-jenkins", dest="report_jenkins_file", help="Output the build results to an xml file that is readable by Jenkins")
+
 
     options, args = parser.parse_args()
     start = time()
     failures = []
     successes = []
+    build_report = []
     for target_name, toolchain_list in OFFICIAL_MBED_LIBRARY_BUILD:
         if options.official_only:
             toolchains = (getattr(TARGET_MAP[target_name], 'default_toolchain', 'ARM'),)
@@ -116,15 +119,23 @@ if __name__ == '__main__':
             toolchainSet = set(toolchains)
             toolchains = toolchainSet and set((options.toolchains).split(','))
 
+
+        cur_target_build_report = { "target": target_name, "successes": [], "failures": []}
+
         for toolchain in toolchains:
             id = "%s::%s" % (target_name, toolchain)
             try:
                 build_mbed_libs(TARGET_MAP[target_name], toolchain, verbose=options.verbose, jobs=options.jobs)
                 successes.append(id)
+                cur_target_build_report["successes"].append(toolchain)
             except Exception, e:
                 failures.append(id)
+                cur_target_build_report["failures"].append(toolchain)
                 print e
 
+        if len(toolchains) > 0:
+            build_report.append(cur_target_build_report)
+
     # Write summary of the builds
     print "\n\nCompleted in: (%.2f)s" % (time() - start)
 

From 1f6b56d060ff94269bc1839a102a0210e1cc2ed4 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Fri, 27 Mar 2015 18:55:50 -0500
Subject: [PATCH 11/45] Moved printing into build_api

---
 workspace_tools/build_api.py     | 33 ++++++++++++++++++++++++++++++++
 workspace_tools/build_release.py |  5 +++++
 2 files changed, 38 insertions(+)

diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py
index 9a4bf4e7f0..843f775ecc 100644
--- a/workspace_tools/build_api.py
+++ b/workspace_tools/build_api.py
@@ -529,3 +529,36 @@ def print_build_results(result_list, build_name):
         result += "\n".join(["  * %s" % f for f in result_list])
         result += "\n"
     return result
+
+def write_build_report(build_report, filename):
+        with open(filename, 'w+') as f:
+            f.write('<section name="Build Summary">\n')
+            f.write('\t<table sorttable="yes">\n')
+
+            f.write('\t\t<tr>\n')
+            f.write('\t\t\t<td value="Target" fontattribute="bold" />\n')
+            f.write('\t\t\t<td value="Successes" fontattribute="bold" />\n')
+            f.write('\t\t\t<td value="Failures" fontattribute="bold" />\n')
+            f.write('\t\t</tr>\n')
+
+            for report in build_report:
+                f.write('\t\t<tr>\n')
+
+                color = "#009933"
+
+                if len(report["failures"]) > 0:
+                    color = "#FF0000"
+
+                target_cell = '\t\t\t<td value="%s" bgcolor="%s"/>\n' % (report["target"], color)
+                f.write(target_cell)
+
+                successes_cell = '\t\t\t<td value="%s" />\n' % ("\n".join(report["successes"]))
+                f.write(successes_cell)
+
+                failures_cell = '\t\t\t<td value="%s" />\n' % ("\n".join(report["failures"]))
+                f.write(failures_cell)
+
+                f.write('\t\t</tr>\n')
+
+            f.write('\t</table>\n')
+            f.write('</section>\n')
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 49de1c1d9c..1e132f50d2 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -24,6 +24,7 @@ ROOT = abspath(join(dirname(__file__), ".."))
 sys.path.insert(0, ROOT)
 
 from workspace_tools.build_api import build_mbed_libs
+from workspace_tools.build_api import write_build_report
 from workspace_tools.targets import TARGET_MAP
 
 OFFICIAL_MBED_LIBRARY_BUILD = (
@@ -137,6 +138,10 @@ if __name__ == '__main__':
             build_report.append(cur_target_build_report)
 
     # Write summary of the builds
+
+    if options.report_jenkins_file:
+        write_build_report(build_report, options.report_jenkins_file)
+
     print "\n\nCompleted in: (%.2f)s" % (time() - start)
 
     if successes:

From 8576f74b3c23ca27edbc9dc47a242901be574c49 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Tue, 31 Mar 2015 17:56:00 -0500
Subject: [PATCH 12/45] Changing Jenkins HTML build output

---
 workspace_tools/build_api.py                  | 89 +++++++++++++------
 workspace_tools/build_release.py              | 10 +--
 .../library_build/build_report.html           | 19 ++++
 .../library_build/build_report_table.html     | 10 +++
 .../ci_templates/library_build/report.html    |  9 ++
 5 files changed, 105 insertions(+), 32 deletions(-)
 create mode 100644 workspace_tools/ci_templates/library_build/build_report.html
 create mode 100644 workspace_tools/ci_templates/library_build/build_report_table.html
 create mode 100644 workspace_tools/ci_templates/library_build/report.html

diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py
index 843f775ecc..76875426f4 100644
--- a/workspace_tools/build_api.py
+++ b/workspace_tools/build_api.py
@@ -29,6 +29,8 @@ from workspace_tools.paths import MBED_TARGETS_PATH, MBED_LIBRARIES, MBED_API, M
 from workspace_tools.targets import TARGET_NAMES, TARGET_MAP
 from workspace_tools.libraries import Library
 from workspace_tools.toolchains import TOOLCHAIN_CLASSES
+from jinja2 import FileSystemLoader
+from jinja2.environment import Environment
 
 
 def build_project(src_path, build_path, target, toolchain_name,
@@ -531,34 +533,67 @@ def print_build_results(result_list, build_name):
     return result
 
 def write_build_report(build_report, filename):
-        with open(filename, 'w+') as f:
-            f.write('<section name="Build Summary">\n')
-            f.write('\t<table sorttable="yes">\n')
+    build_report_failing = []
+    build_report_passing = []
 
-            f.write('\t\t<tr>\n')
-            f.write('\t\t\t<td value="Target" fontattribute="bold" />\n')
-            f.write('\t\t\t<td value="Successes" fontattribute="bold" />\n')
-            f.write('\t\t\t<td value="Failures" fontattribute="bold" />\n')
-            f.write('\t\t</tr>\n')
+    for report in build_report:
+        if len(report["failing"]) > 0:
+            build_report_failing.append(report)
+        else:
+            build_report_passing.append(report)
+            
+    '''build_report_failing = [{
+        "target": "K64F",
+        "passing": [
+            {
+                "toolchain": "GCC_ARM"
+            },
+            {
+                "toolchain": "ARM"
+            }
+        ],
+        "failing": [
+            {
+                "toolchain": "GCC_CS"
+            },
+            {
+                "toolchain": "IAR"
+            }
+        ]
+    },
+    {
+        "target": "KL46Z",
+        "passing": [
+            {
+                "toolchain": "GCC_ARM"
+            }
+        ],
+        "failing": [
+            {
+                "toolchain": "ARM"
+            },
+            {
+                "toolchain": "IAR"
+            }
+        ]
+    }]
 
-            for report in build_report:
-                f.write('\t\t<tr>\n')
+    build_report_passing = [{
+        "target": "LPC1768",
+        "passing": [
+            {
+                "toolchain": "GCC_ARM"
+            },
+            {
+                "toolchain": "ARM"
+            }
+        ],
+        "failing": []
+    }]'''
 
-                color = "#009933"
+    env = Environment(extensions=['jinja2.ext.with_'])
+    env.loader = FileSystemLoader('ci_templates/library_build')
+    template = env.get_template('report.html')
 
-                if len(report["failures"]) > 0:
-                    color = "#FF0000"
-
-                target_cell = '\t\t\t<td value="%s" bgcolor="%s"/>\n' % (report["target"], color)
-                f.write(target_cell)
-
-                successes_cell = '\t\t\t<td value="%s" />\n' % ("\n".join(report["successes"]))
-                f.write(successes_cell)
-
-                failures_cell = '\t\t\t<td value="%s" />\n' % ("\n".join(report["failures"]))
-                f.write(failures_cell)
-
-                f.write('\t\t</tr>\n')
-
-            f.write('\t</table>\n')
-            f.write('</section>\n')
+    with open(filename, 'w+') as f:
+        f.write(template.render(failing_builds=build_report_failing, passing_builds=build_report_passing))
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 1e132f50d2..a74177e37e 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -101,7 +101,7 @@ if __name__ == '__main__':
                       default=False, help="Verbose diagnostic output")
     parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
 
-    parser.add_option("", "--report-jenkins", dest="report_jenkins_file", help="Output the build results to an xml file that is readable by Jenkins")
+    parser.add_option("", "--report-jenkins", dest="report_jenkins_file_name", help="Output the build results to an xml file that is readable by Jenkins")
 
 
     options, args = parser.parse_args()
@@ -121,17 +121,17 @@ if __name__ == '__main__':
             toolchains = toolchainSet and set((options.toolchains).split(','))
 
 
-        cur_target_build_report = { "target": target_name, "successes": [], "failures": []}
+        cur_target_build_report = { "target": target_name, "passing": [], "failing": []}
 
         for toolchain in toolchains:
             id = "%s::%s" % (target_name, toolchain)
             try:
                 build_mbed_libs(TARGET_MAP[target_name], toolchain, verbose=options.verbose, jobs=options.jobs)
                 successes.append(id)
-                cur_target_build_report["successes"].append(toolchain)
+                cur_target_build_report["passing"].append({ "toolchain": toolchain })
             except Exception, e:
                 failures.append(id)
-                cur_target_build_report["failures"].append(toolchain)
+                cur_target_build_report["failing"].append({ "toolchain": toolchain })
                 print e
 
         if len(toolchains) > 0:
@@ -140,7 +140,7 @@ if __name__ == '__main__':
     # Write summary of the builds
 
     if options.report_jenkins_file:
-        write_build_report(build_report, options.report_jenkins_file)
+        write_build_report(build_report, options.report_jenkins_file_name)
 
     print "\n\nCompleted in: (%.2f)s" % (time() - start)
 
diff --git a/workspace_tools/ci_templates/library_build/build_report.html b/workspace_tools/ci_templates/library_build/build_report.html
new file mode 100644
index 0000000000..b459478e42
--- /dev/null
+++ b/workspace_tools/ci_templates/library_build/build_report.html
@@ -0,0 +1,19 @@
+<div>
+  <h3>
+    {% if report.failing|length > 0 %}
+    <span class="redbold">[FAIL]</span>
+    {% else %}
+    <span class="greenbold">[OK]</span>
+    {% endif %}
+
+    {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}</h3>
+  <h4>Failing</h4>
+  {% with build = report.failing %}
+  {% include 'build_report_table.html' %}
+  {% endwith %}
+
+  <h4>Passing</h4>
+  {% with build = report.passing %}
+  {% include 'build_report_table.html' %}
+  {% endwith %}
+</div>
diff --git a/workspace_tools/ci_templates/library_build/build_report_table.html b/workspace_tools/ci_templates/library_build/build_report_table.html
new file mode 100644
index 0000000000..26d87dfb17
--- /dev/null
+++ b/workspace_tools/ci_templates/library_build/build_report_table.html
@@ -0,0 +1,10 @@
+<table>
+  <tr>
+    <th>Toolchain</th>
+  </tr>
+  {% for run in build %}
+  <tr>
+    <td>{{run.toolchain}}</td>
+  </tr>
+  {% endfor %}
+</table>
diff --git a/workspace_tools/ci_templates/library_build/report.html b/workspace_tools/ci_templates/library_build/report.html
new file mode 100644
index 0000000000..3fcfd73094
--- /dev/null
+++ b/workspace_tools/ci_templates/library_build/report.html
@@ -0,0 +1,9 @@
+<h2>Failing Builds</h2>
+{% for report in failing_builds %}
+{% include 'build_report.html' %}
+{% endfor %}
+
+<h2>Passing Builds</h2>
+{% for report in passing_builds %}
+{% include 'build_report.html' %}
+{% endfor %}

From 4b0926fcdb65cf2d88fcc53736ded7b2c80e06ca Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Mon, 13 Apr 2015 17:04:57 -0500
Subject: [PATCH 13/45] Added report templates

---
 .../library_build/build_report.html           | 37 +++++++------
 .../ci_templates/library_build/report.html    | 54 +++++++++++++++++++
 2 files changed, 76 insertions(+), 15 deletions(-)

diff --git a/workspace_tools/ci_templates/library_build/build_report.html b/workspace_tools/ci_templates/library_build/build_report.html
index b459478e42..f3be3f74aa 100644
--- a/workspace_tools/ci_templates/library_build/build_report.html
+++ b/workspace_tools/ci_templates/library_build/build_report.html
@@ -1,19 +1,26 @@
-<div>
+<div class="toggleshow{% if report.failing|length == 0 %} toggleshow-hide{% endif %}">
   <h3>
-    {% if report.failing|length > 0 %}
-    <span class="redbold">[FAIL]</span>
-    {% else %}
-    <span class="greenbold">[OK]</span>
-    {% endif %}
+    <a href="#" class="toggleshow-title">
+      <span class="toggleshow-arrow"></span>
+      {% if report.failing|length > 0 %}
+      <span class="redbold">[FAIL]</span>
+      {% else %}
+      <span class="greenbold">[OK]</span>
+      {% endif %}
 
-    {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}</h3>
-  <h4>Failing</h4>
-  {% with build = report.failing %}
-  {% include 'build_report_table.html' %}
-  {% endwith %}
+      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}
+    </a>
+  </h3>
 
-  <h4>Passing</h4>
-  {% with build = report.passing %}
-  {% include 'build_report_table.html' %}
-  {% endwith %}
+  <div class="toggleshow-body">
+    <h4 class="redbold">Failing</h4>
+    {% with build = report.failing %}
+    {% include 'build_report_table.html' %}
+    {% endwith %}
+
+    <h4 class="greenbold">Passing</h4>
+    {% with build = report.passing %}
+    {% include 'build_report_table.html' %}
+    {% endwith %}
+  </div>
 </div>
diff --git a/workspace_tools/ci_templates/library_build/report.html b/workspace_tools/ci_templates/library_build/report.html
index 3fcfd73094..a42c176cec 100644
--- a/workspace_tools/ci_templates/library_build/report.html
+++ b/workspace_tools/ci_templates/library_build/report.html
@@ -7,3 +7,57 @@
 {% for report in passing_builds %}
 {% include 'build_report.html' %}
 {% endfor %}
+
+<script>
+  var elements = document.querySelectorAll(".toggleshow"),
+      hideClass = 'toggleshow-hide';
+
+  for (var i = 0; i < elements.length; i++) {
+    var arrow = elements[i].querySelector(".toggleshow-arrow");
+    // Initial hide/show based on class
+    // Update arrow as well
+    if (containsClass(elements[i], 'toggleshow-hide')) {
+      toggleDisplay(elements[i]);
+      changeArrow(arrow, false);
+    } else {
+      changeArrow(arrow, true);
+    }
+
+    // Add click handler
+    addClick(elements[i], toggleDisplay);
+  }
+
+  function containsClass(element, className) {
+    var eleClassName = ' ' + elements[i].className + ' ';
+    return eleClassName.indexOf(' ' + className + ' ') > -1;
+  }
+
+  function toggleDisplay(parentElement) {
+    var body = parentElement.querySelector(".toggleshow-body"),
+        arrow = parentElement.querySelector(".toggleshow-arrow");
+
+    if (body.style.display == 'block' || body.style.display == '') {
+      body.style.display = 'none';
+      changeArrow(arrow, false);
+    } else {
+      body.style.display = 'block';
+      changeArrow(arrow, true);
+    }
+  }
+
+  function changeArrow(element, visible) {
+    if (visible) {
+      element.innerHTML = '&#9650';
+    } else {
+      element.innerHTML = '&#9660';
+    }
+  }
+
+  function addClick(parentElement, func) {
+    parentElement.querySelector(".toggleshow-title").addEventListener("click", function(e) {
+      func(parentElement);
+      e.preventDefault();
+      return false;
+    });
+  }
+</script>

From cb4e13c1e35276b3c775db7e877104e91e7385d8 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Mon, 13 Apr 2015 17:07:21 -0500
Subject: [PATCH 14/45] Reorganized test_api.py to build all required libraries
 (RTOS, Ethernet, etc) for tests up front, before any tests are built

---
 workspace_tools/singletest.py |   1 +
 workspace_tools/test_api.py   | 366 +++++++++++++++++++++-------------
 2 files changed, 232 insertions(+), 135 deletions(-)

diff --git a/workspace_tools/singletest.py b/workspace_tools/singletest.py
index 28dc43427a..b88215a977 100644
--- a/workspace_tools/singletest.py
+++ b/workspace_tools/singletest.py
@@ -209,6 +209,7 @@ if __name__ == '__main__':
                                    _opts_log_file_name=opts.log_file_name,
                                    _opts_report_html_file_name=opts.report_html_file_name,
                                    _opts_report_junit_file_name=opts.report_junit_file_name,
+                                   _opts_report_jenkins_file_name=opts.report_jenkins_file_name,
                                    _test_spec=test_spec,
                                    _opts_goanna_for_mbed_sdk=opts.goanna_for_mbed_sdk,
                                    _opts_goanna_for_tests=opts.goanna_for_tests,
diff --git a/workspace_tools/test_api.py b/workspace_tools/test_api.py
index 7b3bc93d80..1b01a1da00 100644
--- a/workspace_tools/test_api.py
+++ b/workspace_tools/test_api.py
@@ -48,6 +48,7 @@ from workspace_tools.targets import TARGET_MAP
 from workspace_tools.test_db import BaseDBAccess
 from workspace_tools.build_api import build_project, build_mbed_libs, build_lib
 from workspace_tools.build_api import get_target_supported_toolchains
+from workspace_tools.build_api import write_build_report
 from workspace_tools.libraries import LIBRARIES, LIBRARY_MAP
 from workspace_tools.toolchains import TOOLCHAIN_BIN_PATH
 from workspace_tools.test_exporters import ReportExporter, ResultExporterType
@@ -153,6 +154,7 @@ class SingleTestRunner(object):
                  _opts_log_file_name=None,
                  _opts_report_html_file_name=None,
                  _opts_report_junit_file_name=None,
+                 _opts_report_jenkins_file_name=None,
                  _test_spec={},
                  _opts_goanna_for_mbed_sdk=None,
                  _opts_goanna_for_tests=None,
@@ -205,6 +207,7 @@ class SingleTestRunner(object):
         self.opts_log_file_name = _opts_log_file_name
         self.opts_report_html_file_name = _opts_report_html_file_name
         self.opts_report_junit_file_name = _opts_report_junit_file_name
+        self.opts_report_jenkins_file_name = _opts_report_jenkins_file_name
         self.opts_goanna_for_mbed_sdk = _opts_goanna_for_mbed_sdk
         self.opts_goanna_for_tests = _opts_goanna_for_tests
         self.opts_shuffle_test_order = _opts_shuffle_test_order
@@ -294,8 +297,17 @@ class SingleTestRunner(object):
     test_summary_ext = {}
     execute_thread_slice_lock = Lock()
 
-    def execute_thread_slice(self, q, target, toolchains, clean, test_ids):
+    def execute_thread_slice(self, q, target, toolchains, clean, test_ids, build_report):
         for toolchain in toolchains:
+            # Toolchain specific build successes and failures
+            build_report[toolchain] = {
+                "mbed_failure": False,
+                "library_failure": False,
+                "library_build_successes": [],
+                "library_build_failures": [],
+                "test_build_successes": [],
+                "test_build_failures": []
+            }
             # print target, toolchain
             # Test suite properties returned to external tools like CI
             test_suite_properties = {}
@@ -306,6 +318,7 @@ class SingleTestRunner(object):
             test_suite_properties['toolchain'] = toolchain
             test_suite_properties['shuffle_random_seed'] = self.shuffle_random_seed
 
+
             # print '=== %s::%s ===' % (target, toolchain)
             # Let's build our test
             if target not in TARGET_MAP:
@@ -328,9 +341,9 @@ class SingleTestRunner(object):
                     continue
             except ToolException:
                 print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building MBED libs for %s using %s'% (target, toolchain))
+                build_report[toolchain]["mbed_failure"] = True
                 #return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
-                q.put(target + '_'.join(toolchains))
-                return
+                continue
 
             build_dir = join(BUILD_DIR, "test", target, toolchain)
 
@@ -340,6 +353,7 @@ class SingleTestRunner(object):
 
             # Enumerate through all tests and shuffle test order if requested
             test_map_keys = sorted(TEST_MAP.keys())
+
             if self.opts_shuffle_test_order:
                 random.shuffle(test_map_keys, self.shuffle_random_func)
                 # Update database with shuffle seed f applicable
@@ -358,148 +372,128 @@ class SingleTestRunner(object):
                     self.db_logger.update_build_id_info(self.db_logger_build_id, _extra=json.dumps(self.dump_options()))
                     self.db_logger.disconnect();
 
-            for test_id in test_map_keys:
+            valid_test_map_keys = self.get_valid_tests(test_map_keys, target, toolchain, test_ids)
+            skipped_test_map_keys = self.get_skipped_tests(test_map_keys, valid_test_map_keys)
+
+            for skipped_test_id in skipped_test_map_keys:
+                test_suite_properties['skipped'].append(skipped_test_id)
+
+
+            # First pass through all tests and determine which libraries need to be built
+            libraries = set()
+            for test_id in valid_test_map_keys:
                 test = TEST_MAP[test_id]
-                if self.opts_test_by_names and test_id not in self.opts_test_by_names.split(','):
+
+                # Detect which lib should be added to test
+                # Some libs have to compiled like RTOS or ETH
+                for lib in LIBRARIES:
+                    if lib['build_dir'] in test.dependencies:
+                        libraries.add(lib['id'])
+
+
+            build_project_options = ["analyze"] if self.opts_goanna_for_tests else None
+            clean_project_options = True if self.opts_goanna_for_tests or clean or self.opts_clean else None
+
+            # Build all required libraries
+            for lib_id in libraries:
+                try:
+                    build_lib(lib_id,
+                              T,
+                              toolchain,
+                              options=build_project_options,
+                              verbose=self.opts_verbose,
+                              clean=clean_mbed_libs_options,
+                              jobs=self.opts_jobs)
+                except ToolException:
+                    print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building library %s'% (lib_id))
+                    build_report[toolchain]["library_failure"] = True
+                    build_report[toolchain]["library_build_failures"].append(lib_id)
+                    #return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
                     continue
 
-                if test_ids and test_id not in test_ids:
+                build_report[toolchain]["library_build_successes"].append(lib_id)
+
+
+            for test_id in valid_test_map_keys:
+                test = TEST_MAP[test_id]
+
+                test_suite_properties['test.libs.%s.%s.%s'% (target, toolchain, test_id)] = ', '.join(libraries)
+
+                # TODO: move this 2 below loops to separate function
+                INC_DIRS = []
+                for lib_id in libraries:
+                    if 'inc_dirs_ext' in LIBRARY_MAP[lib_id] and LIBRARY_MAP[lib_id]['inc_dirs_ext']:
+                        INC_DIRS.extend(LIBRARY_MAP[lib_id]['inc_dirs_ext'])
+
+                MACROS = []
+                for lib_id in libraries:
+                    if 'macros' in LIBRARY_MAP[lib_id] and LIBRARY_MAP[lib_id]['macros']:
+                        MACROS.extend(LIBRARY_MAP[lib_id]['macros'])
+                MACROS.append('TEST_SUITE_TARGET_NAME="%s"'% target)
+                MACROS.append('TEST_SUITE_TEST_ID="%s"'% test_id)
+                test_uuid = uuid.uuid4()
+                MACROS.append('TEST_SUITE_UUID="%s"'% str(test_uuid))
+
+                project_name = self.opts_firmware_global_name if self.opts_firmware_global_name else None
+                try:
+                    path = build_project(test.source_dir,
+                                         join(build_dir, test_id),
+                                         T,
+                                         toolchain,
+                                         test.dependencies,
+                                         options=build_project_options,
+                                         clean=clean_project_options,
+                                         verbose=self.opts_verbose,
+                                         name=project_name,
+                                         macros=MACROS,
+                                         inc_dirs=INC_DIRS,
+                                         jobs=self.opts_jobs)
+                except ToolException:
+                    project_name_str = project_name if project_name is not None else test_id
+                    print "DIS BE MAH ERRRRR: %s" % (str(ToolException))
+                    print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building project %s'% (project_name_str))
+                    build_report[toolchain]["test_build_failures"].append(test_id)
+                    # return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
                     continue
 
-                if self.opts_test_only_peripheral and not test.peripherals:
-                    if self.opts_verbose_skipped_tests:
-                        print self.logger.log_line(self.logger.LogType.INFO, 'Common test skipped for target %s'% (target))
-                    test_suite_properties['skipped'].append(test_id)
+                build_report[toolchain]["test_build_successes"].append(test_id)
+
+                if self.opts_only_build_tests:
+                    # With this option we are skipping testing phase
                     continue
 
-                if self.opts_peripheral_by_names and test.peripherals and not len([i for i in test.peripherals if i in self.opts_peripheral_by_names.split(',')]):
-                    # We will skip tests not forced with -p option
-                    if self.opts_verbose_skipped_tests:
-                        print self.logger.log_line(self.logger.LogType.INFO, 'Common test skipped for target %s'% (target))
-                    test_suite_properties['skipped'].append(test_id)
-                    continue
+                # Test duration can be increased by global value
+                test_duration = test.duration
+                if self.opts_extend_test_timeout is not None:
+                    test_duration += self.opts_extend_test_timeout
 
-                if self.opts_test_only_common and test.peripherals:
-                    if self.opts_verbose_skipped_tests:
-                        print self.logger.log_line(self.logger.LogType.INFO, 'Peripheral test skipped for target %s'% (target))
-                    test_suite_properties['skipped'].append(test_id)
-                    continue
+                # For an automated test the duration act as a timeout after
+                # which the test gets interrupted
+                test_spec = self.shape_test_request(target, path, test_id, test_duration)
+                test_loops = self.get_test_loop_count(test_id)
 
-                if test.automated and test.is_supported(target, toolchain):
-                    if test.peripherals is None and self.opts_only_build_tests:
-                        # When users are using 'build only flag' and test do not have
-                        # specified peripherals we can allow test building by default
-                        pass
-                    elif self.opts_peripheral_by_names and test_id not in self.opts_peripheral_by_names.split(','):
-                        # If we force peripheral with option -p we expect test
-                        # to pass even if peripheral is not in MUTs file.
-                        pass
-                    elif not self.is_peripherals_available(target, test.peripherals):
-                        if self.opts_verbose_skipped_tests:
-                            if test.peripherals:
-                                print self.logger.log_line(self.logger.LogType.INFO, 'Peripheral %s test skipped for target %s'% (",".join(test.peripherals), target))
-                            else:
-                                print self.logger.log_line(self.logger.LogType.INFO, 'Test %s skipped for target %s'% (test_id, target))
-                        test_suite_properties['skipped'].append(test_id)
-                        continue
+                test_suite_properties['test.duration.%s.%s.%s'% (target, toolchain, test_id)] = test_duration
+                test_suite_properties['test.loops.%s.%s.%s'% (target, toolchain, test_id)] = test_loops
+                test_suite_properties['test.path.%s.%s.%s'% (target, toolchain, test_id)] = path
 
-                    build_project_options = ["analyze"] if self.opts_goanna_for_tests else None
-                    clean_project_options = True if self.opts_goanna_for_tests or clean or self.opts_clean else None
+                # read MUTs, test specification and perform tests
+                single_test_result, detailed_test_results = self.handle(test_spec, target, toolchain, test_loops=test_loops)
 
-                    # Detect which lib should be added to test
-                    # Some libs have to compiled like RTOS or ETH
-                    libraries = []
-                    for lib in LIBRARIES:
-                        if lib['build_dir'] in test.dependencies:
-                            libraries.append(lib['id'])
-                    # Build libs for test
-                    for lib_id in libraries:
-                        try:
-                            build_lib(lib_id,
-                                      T,
-                                      toolchain,
-                                      options=build_project_options,
-                                      verbose=self.opts_verbose,
-                                      clean=clean_mbed_libs_options,
-                                      jobs=self.opts_jobs)
-                        except ToolException:
-                            print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building library %s'% (lib_id))
-                            #return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
-                            q.put(target + '_'.join(toolchains))
-                            return
+                # Append test results to global test summary
+                if single_test_result is not None:
+                    self.test_summary.append(single_test_result)
 
-                    test_suite_properties['test.libs.%s.%s.%s'% (target, toolchain, test_id)] = ', '.join(libraries)
-
-                    # TODO: move this 2 below loops to separate function
-                    INC_DIRS = []
-                    for lib_id in libraries:
-                        if 'inc_dirs_ext' in LIBRARY_MAP[lib_id] and LIBRARY_MAP[lib_id]['inc_dirs_ext']:
-                            INC_DIRS.extend(LIBRARY_MAP[lib_id]['inc_dirs_ext'])
-
-                    MACROS = []
-                    for lib_id in libraries:
-                        if 'macros' in LIBRARY_MAP[lib_id] and LIBRARY_MAP[lib_id]['macros']:
-                            MACROS.extend(LIBRARY_MAP[lib_id]['macros'])
-                    MACROS.append('TEST_SUITE_TARGET_NAME="%s"'% target)
-                    MACROS.append('TEST_SUITE_TEST_ID="%s"'% test_id)
-                    test_uuid = uuid.uuid4()
-                    MACROS.append('TEST_SUITE_UUID="%s"'% str(test_uuid))
-
-                    project_name = self.opts_firmware_global_name if self.opts_firmware_global_name else None
-                    try:
-                        path = build_project(test.source_dir,
-                                             join(build_dir, test_id),
-                                             T,
-                                             toolchain,
-                                             test.dependencies,
-                                             options=build_project_options,
-                                             clean=clean_project_options,
-                                             verbose=self.opts_verbose,
-                                             name=project_name,
-                                             macros=MACROS,
-                                             inc_dirs=INC_DIRS,
-                                             jobs=self.opts_jobs)
-                    except ToolException:
-                        project_name_str = project_name if project_name is not None else test_id
-                        print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building project %s'% (project_name_str))
-                        # return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
-                        q.put(target + '_'.join(toolchains))
-                        return
-                    if self.opts_only_build_tests:
-                        # With this option we are skipping testing phase
-                        continue
-
-                    # Test duration can be increased by global value
-                    test_duration = test.duration
-                    if self.opts_extend_test_timeout is not None:
-                        test_duration += self.opts_extend_test_timeout
-
-                    # For an automated test the duration act as a timeout after
-                    # which the test gets interrupted
-                    test_spec = self.shape_test_request(target, path, test_id, test_duration)
-                    test_loops = self.get_test_loop_count(test_id)
-
-                    test_suite_properties['test.duration.%s.%s.%s'% (target, toolchain, test_id)] = test_duration
-                    test_suite_properties['test.loops.%s.%s.%s'% (target, toolchain, test_id)] = test_loops
-                    test_suite_properties['test.path.%s.%s.%s'% (target, toolchain, test_id)] = path
-
-                    # read MUTs, test specification and perform tests
-                    single_test_result, detailed_test_results = self.handle(test_spec, target, toolchain, test_loops=test_loops)
-
-                    # Append test results to global test summary
-                    if single_test_result is not None:
-                        self.test_summary.append(single_test_result)
-
-                    # Prepare extended test results data structure (it can be used to generate detailed test report)
-                    if toolchain not in self.test_summary_ext:
-                        self.test_summary_ext[toolchain] = {}  # test_summary_ext : toolchain
-                    if target not in self.test_summary_ext[toolchain]:
-                        self.test_summary_ext[toolchain][target] = {}    # test_summary_ext : toolchain : target
-                    if target not in self.test_summary_ext[toolchain][target]:
-                        self.test_summary_ext[toolchain][target][test_id] = detailed_test_results    # test_summary_ext : toolchain : target : test_it
+                # Prepare extended test results data structure (it can be used to generate detailed test report)
+                if toolchain not in self.test_summary_ext:
+                    self.test_summary_ext[toolchain] = {}  # test_summary_ext : toolchain
+                if target not in self.test_summary_ext[toolchain]:
+                    self.test_summary_ext[toolchain][target] = {}    # test_summary_ext : toolchain : target
+                if target not in self.test_summary_ext[toolchain][target]:
+                    self.test_summary_ext[toolchain][target][test_id] = detailed_test_results    # test_summary_ext : toolchain : target : test_it
 
             test_suite_properties['skipped'] = ', '.join(test_suite_properties['skipped'])
             self.test_suite_properties_ext[target][toolchain] = test_suite_properties
+
         # return self.test_summary, self.shuffle_random_seed, test_summary_ext, self.test_suite_properties_ext
         q.put(target + '_'.join(toolchains))
         return
@@ -514,6 +508,8 @@ class SingleTestRunner(object):
         if self.opts_shuffle_test_seed is not None and self.is_shuffle_seed_float():
             self.shuffle_random_seed = round(float(self.opts_shuffle_test_seed), self.SHUFFLE_SEED_ROUND)
 
+        build_reports = []
+
         if self.opts_parallel_test_exec:
             ###################################################################
             # Experimental, parallel test execution per singletest instance.
@@ -526,7 +522,9 @@ class SingleTestRunner(object):
             # get information about available MUTs (per target).
             for target, toolchains in self.test_spec['targets'].iteritems():
                 self.test_suite_properties_ext[target] = {}
-                t = threading.Thread(target=self.execute_thread_slice, args = (q, target, toolchains, clean, test_ids))
+                cur_build_report = {}
+                t = threading.Thread(target=self.execute_thread_slice, args = (q, target, toolchains, clean, test_ids, cur_build_report))
+                build_reports.append({ "target": target, "report": cur_build_report})
                 t.daemon = True
                 t.start()
                 execute_threads.append(t)
@@ -538,16 +536,107 @@ class SingleTestRunner(object):
             for target, toolchains in self.test_spec['targets'].iteritems():
                 if target not in self.test_suite_properties_ext:
                     self.test_suite_properties_ext[target] = {}
-                self.execute_thread_slice(q, target, toolchains, clean, test_ids)
+
+                cur_build_report = {}
+                self.execute_thread_slice(q, target, toolchains, clean, test_ids, cur_build_report)
+                build_reports.append({ "target": target, "report": cur_build_report})
                 q.get()
 
+        print build_reports
+
+        build_report = []
+
+        for target_build_report in build_reports:
+            cur_report = {
+                "target": target_build_report["target"],
+                "successes": [],
+                "failures": []
+            }
+
+            for toolchain in sorted(target_build_report["report"], key=target_build_report["report"].get):
+                print "%s - %s" % (target_build_report["target"], toolchain)
+                report = target_build_report["report"][toolchain]
+
+                if report["mbed_failure"]:
+                    cur_report["failures"].append("mbed::%s" % (toolchain))
+                elif report["library_failure"]:
+                    for library in report["library_build_failures"]:
+                        cur_report["failures"].append("Library::%s::%s" % (library, toolchain))
+                else:
+                    cur_report["successes"].append("All Libraries::%s" % (toolchain))
+
+                    if len(report["test_build_failures"]) > 0:
+                        for successful_test in report["test_build_successes"]:
+                            cur_report["successes"].append("Test::%s::%s" % (toolchain, successful_test))
+
+                        for failed_test in report["test_build_failures"]:
+                            cur_report["failures"].append("Test::%s::%s" % (toolchain, failed_test))
+                    else:
+                        cur_report["successes"].append("All Tests::%s" % (toolchain))
+
+
+            build_report.append(cur_report)
+
         if self.db_logger:
             self.db_logger.reconnect();
             if self.db_logger.is_connected():
                 self.db_logger.update_build_id_info(self.db_logger_build_id, _status_fk=self.db_logger.BUILD_ID_STATUS_COMPLETED)
                 self.db_logger.disconnect();
 
-        return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
+        return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext, build_report
+
+    def get_valid_tests(self, test_map_keys, target, toolchain, test_ids):
+        valid_test_map_keys = []
+
+        for test_id in test_map_keys:
+            test = TEST_MAP[test_id]
+            if self.opts_test_by_names and test_id not in self.opts_test_by_names.split(','):
+                continue
+
+            if test_ids and test_id not in test_ids:
+                continue
+
+            if self.opts_test_only_peripheral and not test.peripherals:
+                if self.opts_verbose_skipped_tests:
+                    print self.logger.log_line(self.logger.LogType.INFO, 'Common test skipped for target %s'% (target))
+                continue
+
+            if self.opts_peripheral_by_names and test.peripherals and not len([i for i in test.peripherals if i in self.opts_peripheral_by_names.split(',')]):
+                # We will skip tests not forced with -p option
+                if self.opts_verbose_skipped_tests:
+                    print self.logger.log_line(self.logger.LogType.INFO, 'Common test skipped for target %s'% (target))
+                continue
+
+            if self.opts_test_only_common and test.peripherals:
+                if self.opts_verbose_skipped_tests:
+                    print self.logger.log_line(self.logger.LogType.INFO, 'Peripheral test skipped for target %s'% (target))
+                continue
+
+            if test.automated and test.is_supported(target, toolchain):
+                if test.peripherals is None and self.opts_only_build_tests:
+                    # When users are using 'build only flag' and test do not have
+                    # specified peripherals we can allow test building by default
+                    pass
+                elif self.opts_peripheral_by_names and test_id not in self.opts_peripheral_by_names.split(','):
+                    # If we force peripheral with option -p we expect test
+                    # to pass even if peripheral is not in MUTs file.
+                    pass
+                elif not self.is_peripherals_available(target, test.peripherals):
+                    if self.opts_verbose_skipped_tests:
+                        if test.peripherals:
+                            print self.logger.log_line(self.logger.LogType.INFO, 'Peripheral %s test skipped for target %s'% (",".join(test.peripherals), target))
+                        else:
+                            print self.logger.log_line(self.logger.LogType.INFO, 'Test %s skipped for target %s'% (test_id, target))
+                    continue
+
+                # The test has made it through all the filters, so add it to the valid tests list
+                valid_test_map_keys.append(test_id)
+
+        return valid_test_map_keys
+
+    def get_skipped_tests(self, all_test_map_keys, valid_test_map_keys):
+        # NOTE: This will not preserve order
+        return list(set(all_test_map_keys) - set(valid_test_map_keys))
 
     def generate_test_summary_by_target(self, test_summary, shuffle_seed=None):
         """ Prints well-formed summary with results (SQL table like)
@@ -1314,7 +1403,7 @@ def singletest_in_cli_mode(single_test):
     """
     start = time()
     # Execute tests depending on options and filter applied
-    test_summary, shuffle_seed, test_summary_ext, test_suite_properties_ext = single_test.execute()
+    test_summary, shuffle_seed, test_summary_ext, test_suite_properties_ext, build_report = single_test.execute()
     elapsed_time = time() - start
 
     # Human readable summary
@@ -1333,9 +1422,12 @@ def singletest_in_cli_mode(single_test):
         report_exporter = ReportExporter(ResultExporterType.HTML)
         report_exporter.report_to_file(test_summary_ext, single_test.opts_report_html_file_name, test_suite_properties=test_suite_properties_ext)
     if single_test.opts_report_junit_file_name:
-        # Export results in form of HTML report to separate file
+        # Export results in form of JUnit XML report to separate file
         report_exporter = ReportExporter(ResultExporterType.JUNIT)
         report_exporter.report_to_file(test_summary_ext, single_test.opts_report_junit_file_name, test_suite_properties=test_suite_properties_ext)
+    if single_test.opts_report_jenkins_file_name:
+        # Export build results as Jenkins XML report ti sparate file
+        write_build_report(build_report, single_test.opts_report_jenkins_file_name)
 
 
 class TestLogger():
@@ -1706,6 +1798,10 @@ def get_default_test_options_parser():
                       dest='report_junit_file_name',
                       help='You can log test suite results in form of JUnit compliant XML report')
 
+    parser.add_option("", "--report-jenkins",
+                      dest="report_jenkins_file_name",
+                      help="Output the build results to an xml file that is readable by Jenkins")
+
     parser.add_option('', '--verbose-skipped',
                       dest='verbose_skipped_tests',
                       default=False,

From a574e1f27ecc457cfa8d4e287ca9438f8454227e Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Wed, 1 Apr 2015 13:15:15 -0500
Subject: [PATCH 15/45] Broke apart some template stuff, added tests-build
 report

---
 workspace_tools/build_api.py                  |  8 +-
 .../library_build/build_report.html           |  6 +-
 .../ci_templates/library_build/report.html    | 62 ++-----------
 workspace_tools/ci_templates/scripts.js       | 53 +++++++++++
 .../tests_build/build_report.html             | 26 ++++++
 .../tests_build/build_report_table.html       | 12 +++
 .../ci_templates/tests_build/report.html      | 11 +++
 workspace_tools/test_api.py                   | 88 +++++++++++--------
 8 files changed, 165 insertions(+), 101 deletions(-)
 create mode 100644 workspace_tools/ci_templates/scripts.js
 create mode 100644 workspace_tools/ci_templates/tests_build/build_report.html
 create mode 100644 workspace_tools/ci_templates/tests_build/build_report_table.html
 create mode 100644 workspace_tools/ci_templates/tests_build/report.html

diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py
index 76875426f4..40e378ee9d 100644
--- a/workspace_tools/build_api.py
+++ b/workspace_tools/build_api.py
@@ -532,7 +532,7 @@ def print_build_results(result_list, build_name):
         result += "\n"
     return result
 
-def write_build_report(build_report, filename):
+def write_build_report(build_report, template_filename, filename):
     build_report_failing = []
     build_report_passing = []
 
@@ -541,7 +541,7 @@ def write_build_report(build_report, filename):
             build_report_failing.append(report)
         else:
             build_report_passing.append(report)
-            
+
     '''build_report_failing = [{
         "target": "K64F",
         "passing": [
@@ -592,8 +592,8 @@ def write_build_report(build_report, filename):
     }]'''
 
     env = Environment(extensions=['jinja2.ext.with_'])
-    env.loader = FileSystemLoader('ci_templates/library_build')
-    template = env.get_template('report.html')
+    env.loader = FileSystemLoader('ci_templates')
+    template = env.get_template(template_filename)
 
     with open(filename, 'w+') as f:
         f.write(template.render(failing_builds=build_report_failing, passing_builds=build_report_passing))
diff --git a/workspace_tools/ci_templates/library_build/build_report.html b/workspace_tools/ci_templates/library_build/build_report.html
index f3be3f74aa..24283125a3 100644
--- a/workspace_tools/ci_templates/library_build/build_report.html
+++ b/workspace_tools/ci_templates/library_build/build_report.html
@@ -5,7 +5,7 @@
       {% if report.failing|length > 0 %}
       <span class="redbold">[FAIL]</span>
       {% else %}
-      <span class="greenbold">[OK]</span>
+      <span class="greenbold">[PASS]</span>
       {% endif %}
 
       {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}
@@ -15,12 +15,12 @@
   <div class="toggleshow-body">
     <h4 class="redbold">Failing</h4>
     {% with build = report.failing %}
-    {% include 'build_report_table.html' %}
+    {% include 'library_build/build_report_table.html' %}
     {% endwith %}
 
     <h4 class="greenbold">Passing</h4>
     {% with build = report.passing %}
-    {% include 'build_report_table.html' %}
+    {% include 'library_build/build_report_table.html' %}
     {% endwith %}
   </div>
 </div>
diff --git a/workspace_tools/ci_templates/library_build/report.html b/workspace_tools/ci_templates/library_build/report.html
index a42c176cec..e32f30c604 100644
--- a/workspace_tools/ci_templates/library_build/report.html
+++ b/workspace_tools/ci_templates/library_build/report.html
@@ -1,63 +1,11 @@
-<h2>Failing Builds</h2>
+<h2>{{failing_builds|length}} Failing Builds</h2>
 {% for report in failing_builds %}
-{% include 'build_report.html' %}
+{% include 'library_build/build_report.html' %}
 {% endfor %}
 
-<h2>Passing Builds</h2>
+<h2>{{passing_builds|length}} Passing Builds</h2>
 {% for report in passing_builds %}
-{% include 'build_report.html' %}
+{% include 'library_build/build_report.html' %}
 {% endfor %}
 
-<script>
-  var elements = document.querySelectorAll(".toggleshow"),
-      hideClass = 'toggleshow-hide';
-
-  for (var i = 0; i < elements.length; i++) {
-    var arrow = elements[i].querySelector(".toggleshow-arrow");
-    // Initial hide/show based on class
-    // Update arrow as well
-    if (containsClass(elements[i], 'toggleshow-hide')) {
-      toggleDisplay(elements[i]);
-      changeArrow(arrow, false);
-    } else {
-      changeArrow(arrow, true);
-    }
-
-    // Add click handler
-    addClick(elements[i], toggleDisplay);
-  }
-
-  function containsClass(element, className) {
-    var eleClassName = ' ' + elements[i].className + ' ';
-    return eleClassName.indexOf(' ' + className + ' ') > -1;
-  }
-
-  function toggleDisplay(parentElement) {
-    var body = parentElement.querySelector(".toggleshow-body"),
-        arrow = parentElement.querySelector(".toggleshow-arrow");
-
-    if (body.style.display == 'block' || body.style.display == '') {
-      body.style.display = 'none';
-      changeArrow(arrow, false);
-    } else {
-      body.style.display = 'block';
-      changeArrow(arrow, true);
-    }
-  }
-
-  function changeArrow(element, visible) {
-    if (visible) {
-      element.innerHTML = '&#9650';
-    } else {
-      element.innerHTML = '&#9660';
-    }
-  }
-
-  function addClick(parentElement, func) {
-    parentElement.querySelector(".toggleshow-title").addEventListener("click", function(e) {
-      func(parentElement);
-      e.preventDefault();
-      return false;
-    });
-  }
-</script>
+{% include 'scripts.js' %}
diff --git a/workspace_tools/ci_templates/scripts.js b/workspace_tools/ci_templates/scripts.js
new file mode 100644
index 0000000000..28c0c59381
--- /dev/null
+++ b/workspace_tools/ci_templates/scripts.js
@@ -0,0 +1,53 @@
+<script>
+  var elements = document.querySelectorAll(".toggleshow"),
+      hideClass = 'toggleshow-hide';
+
+  for (var i = 0; i < elements.length; i++) {
+    var arrow = elements[i].querySelector(".toggleshow-arrow");
+    // Initial hide/show based on class
+    // Update arrow as well
+    if (containsClass(elements[i], 'toggleshow-hide')) {
+      toggleDisplay(elements[i]);
+      changeArrow(arrow, false);
+    } else {
+      changeArrow(arrow, true);
+    }
+
+    // Add click handler
+    addClick(elements[i], toggleDisplay);
+  }
+
+  function containsClass(element, className) {
+    var eleClassName = ' ' + elements[i].className + ' ';
+    return eleClassName.indexOf(' ' + className + ' ') > -1;
+  }
+
+  function toggleDisplay(parentElement) {
+    var body = parentElement.querySelector(".toggleshow-body"),
+        arrow = parentElement.querySelector(".toggleshow-arrow");
+
+    if (body.style.display == 'block' || body.style.display == '') {
+      body.style.display = 'none';
+      changeArrow(arrow, false);
+    } else {
+      body.style.display = 'block';
+      changeArrow(arrow, true);
+    }
+  }
+
+  function changeArrow(element, visible) {
+    if (visible) {
+      element.innerHTML = '&#9650';
+    } else {
+      element.innerHTML = '&#9660';
+    }
+  }
+
+  function addClick(parentElement, func) {
+    parentElement.querySelector(".toggleshow-title").addEventListener("click", function(e) {
+      func(parentElement);
+      e.preventDefault();
+      return false;
+    });
+  }
+</script>
diff --git a/workspace_tools/ci_templates/tests_build/build_report.html b/workspace_tools/ci_templates/tests_build/build_report.html
new file mode 100644
index 0000000000..8b20d188cf
--- /dev/null
+++ b/workspace_tools/ci_templates/tests_build/build_report.html
@@ -0,0 +1,26 @@
+<div class="toggleshow{% if report.failing|length == 0 %} toggleshow-hide{% endif %}">
+  <h3>
+    <a href="#" class="toggleshow-title">
+      <span class="toggleshow-arrow"></span>
+      {% if report.failing|length > 0 %}
+      <span class="redbold">[FAIL]</span>
+      {% else %}
+      <span class="greenbold">[PASS]</span>
+      {% endif %}
+
+      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}
+    </a>
+  </h3>
+
+  <div class="toggleshow-body">
+    <h4 class="redbold">Failing</h4>
+    {% with build = report.failing %}
+    {% include 'tests_build/build_report_table.html' %}
+    {% endwith %}
+
+    <h4 class="greenbold">Passing</h4>
+    {% with build = report.passing %}
+    {% include 'tests_build/build_report_table.html' %}
+    {% endwith %}
+  </div>
+</div>
diff --git a/workspace_tools/ci_templates/tests_build/build_report_table.html b/workspace_tools/ci_templates/tests_build/build_report_table.html
new file mode 100644
index 0000000000..e7626b3670
--- /dev/null
+++ b/workspace_tools/ci_templates/tests_build/build_report_table.html
@@ -0,0 +1,12 @@
+<table>
+  <tr>
+    <th>Toolchain</th>
+    <th>Project</th>
+  </tr>
+  {% for run in build %}
+  <tr>
+    <td>{{run.toolchain}}</td>
+    <td>{{run.project}}</td>
+  </tr>
+  {% endfor %}
+</table>
diff --git a/workspace_tools/ci_templates/tests_build/report.html b/workspace_tools/ci_templates/tests_build/report.html
new file mode 100644
index 0000000000..3f262556ef
--- /dev/null
+++ b/workspace_tools/ci_templates/tests_build/report.html
@@ -0,0 +1,11 @@
+<h2>{{failing_builds|length}} Failing Builds</h2>
+{% for report in failing_builds %}
+{% include 'tests_build/build_report.html' %}
+{% endfor %}
+
+<h2>{{passing_builds|length}} Passing Builds</h2>
+{% for report in passing_builds %}
+{% include 'tests_build/build_report.html' %}
+{% endfor %}
+
+{% include 'scripts.js' %}
diff --git a/workspace_tools/test_api.py b/workspace_tools/test_api.py
index 1b01a1da00..cf51683afc 100644
--- a/workspace_tools/test_api.py
+++ b/workspace_tools/test_api.py
@@ -303,10 +303,10 @@ class SingleTestRunner(object):
             build_report[toolchain] = {
                 "mbed_failure": False,
                 "library_failure": False,
-                "library_build_successes": [],
-                "library_build_failures": [],
-                "test_build_successes": [],
-                "test_build_failures": []
+                "library_build_passing": [],
+                "library_build_failing": [],
+                "test_build_passing": [],
+                "test_build_failing": []
             }
             # print target, toolchain
             # Test suite properties returned to external tools like CI
@@ -404,14 +404,17 @@ class SingleTestRunner(object):
                               verbose=self.opts_verbose,
                               clean=clean_mbed_libs_options,
                               jobs=self.opts_jobs)
+
+                    build_report[toolchain]["library_build_passing"].append(lib_id)
+
                 except ToolException:
                     print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building library %s'% (lib_id))
                     build_report[toolchain]["library_failure"] = True
-                    build_report[toolchain]["library_build_failures"].append(lib_id)
+                    build_report[toolchain]["library_build_failing"].append(lib_id)
                     #return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
                     continue
 
-                build_report[toolchain]["library_build_successes"].append(lib_id)
+
 
 
             for test_id in valid_test_map_keys:
@@ -437,27 +440,27 @@ class SingleTestRunner(object):
                 project_name = self.opts_firmware_global_name if self.opts_firmware_global_name else None
                 try:
                     path = build_project(test.source_dir,
-                                         join(build_dir, test_id),
-                                         T,
-                                         toolchain,
-                                         test.dependencies,
-                                         options=build_project_options,
-                                         clean=clean_project_options,
-                                         verbose=self.opts_verbose,
-                                         name=project_name,
-                                         macros=MACROS,
-                                         inc_dirs=INC_DIRS,
-                                         jobs=self.opts_jobs)
+                                     join(build_dir, test_id),
+                                     T,
+                                     toolchain,
+                                     test.dependencies,
+                                     options=build_project_options,
+                                     clean=clean_project_options,
+                                     verbose=self.opts_verbose,
+                                     name=project_name,
+                                     macros=MACROS,
+                                     inc_dirs=INC_DIRS,
+                                     jobs=self.opts_jobs)
+                    build_report[toolchain]["test_build_passing"].append(test_id)
+
                 except ToolException:
                     project_name_str = project_name if project_name is not None else test_id
                     print "DIS BE MAH ERRRRR: %s" % (str(ToolException))
                     print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building project %s'% (project_name_str))
-                    build_report[toolchain]["test_build_failures"].append(test_id)
+                    build_report[toolchain]["test_build_failing"].append(test_id)
                     # return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext
                     continue
 
-                build_report[toolchain]["test_build_successes"].append(test_id)
-
                 if self.opts_only_build_tests:
                     # With this option we are skipping testing phase
                     continue
@@ -542,15 +545,13 @@ class SingleTestRunner(object):
                 build_reports.append({ "target": target, "report": cur_build_report})
                 q.get()
 
-        print build_reports
-
         build_report = []
 
         for target_build_report in build_reports:
             cur_report = {
                 "target": target_build_report["target"],
-                "successes": [],
-                "failures": []
+                "passing": [],
+                "failing": []
             }
 
             for toolchain in sorted(target_build_report["report"], key=target_build_report["report"].get):
@@ -558,21 +559,34 @@ class SingleTestRunner(object):
                 report = target_build_report["report"][toolchain]
 
                 if report["mbed_failure"]:
-                    cur_report["failures"].append("mbed::%s" % (toolchain))
-                elif report["library_failure"]:
-                    for library in report["library_build_failures"]:
-                        cur_report["failures"].append("Library::%s::%s" % (library, toolchain))
+                    cur_report["failing"].append({
+                        "toolchain": toolchain,
+                        "project": "mbed library"
+                    })
                 else:
-                    cur_report["successes"].append("All Libraries::%s" % (toolchain))
+                    for passing_library in report["library_build_failing"]:
+                        cur_report["failing"].append({
+                            "toolchain": toolchain,
+                            "project": "Library::%s" % (passing_library)
+                        })
 
-                    if len(report["test_build_failures"]) > 0:
-                        for successful_test in report["test_build_successes"]:
-                            cur_report["successes"].append("Test::%s::%s" % (toolchain, successful_test))
+                    for failing_library in report["library_build_passing"]:
+                        cur_report["passing"].append({
+                            "toolchain": toolchain,
+                            "project": "Library::%s" % (failing_library)
+                        })
 
-                        for failed_test in report["test_build_failures"]:
-                            cur_report["failures"].append("Test::%s::%s" % (toolchain, failed_test))
-                    else:
-                        cur_report["successes"].append("All Tests::%s" % (toolchain))
+                    for passing_test in report["test_build_passing"]:
+                        cur_report["passing"].append({
+                            "toolchain": toolchain,
+                            "project": "Test::%s" % (passing_test)
+                        })
+
+                    for failing_test in report["test_build_failing"]:
+                        cur_report["failing"].append({
+                            "toolchain": toolchain,
+                            "project": "Test::%s" % (failing_test)
+                        })
 
 
             build_report.append(cur_report)
@@ -1427,7 +1441,7 @@ def singletest_in_cli_mode(single_test):
         report_exporter.report_to_file(test_summary_ext, single_test.opts_report_junit_file_name, test_suite_properties=test_suite_properties_ext)
     if single_test.opts_report_jenkins_file_name:
         # Export build results as Jenkins XML report ti sparate file
-        write_build_report(build_report, single_test.opts_report_jenkins_file_name)
+        write_build_report(build_report, 'tests_build/report.html', single_test.opts_report_jenkins_file_name)
 
 
 class TestLogger():

From 01ff0b32b3aec4de66e15548810906c724cd6396 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Wed, 1 Apr 2015 13:55:01 -0500
Subject: [PATCH 16/45] Removed comments

---
 workspace_tools/build_api.py | 49 ------------------------------------
 1 file changed, 49 deletions(-)

diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py
index 40e378ee9d..0acea152cf 100644
--- a/workspace_tools/build_api.py
+++ b/workspace_tools/build_api.py
@@ -542,55 +542,6 @@ def write_build_report(build_report, template_filename, filename):
         else:
             build_report_passing.append(report)
 
-    '''build_report_failing = [{
-        "target": "K64F",
-        "passing": [
-            {
-                "toolchain": "GCC_ARM"
-            },
-            {
-                "toolchain": "ARM"
-            }
-        ],
-        "failing": [
-            {
-                "toolchain": "GCC_CS"
-            },
-            {
-                "toolchain": "IAR"
-            }
-        ]
-    },
-    {
-        "target": "KL46Z",
-        "passing": [
-            {
-                "toolchain": "GCC_ARM"
-            }
-        ],
-        "failing": [
-            {
-                "toolchain": "ARM"
-            },
-            {
-                "toolchain": "IAR"
-            }
-        ]
-    }]
-
-    build_report_passing = [{
-        "target": "LPC1768",
-        "passing": [
-            {
-                "toolchain": "GCC_ARM"
-            },
-            {
-                "toolchain": "ARM"
-            }
-        ],
-        "failing": []
-    }]'''
-
     env = Environment(extensions=['jinja2.ext.with_'])
     env.loader = FileSystemLoader('ci_templates')
     template = env.get_template(template_filename)

From c71a082d2074cc4e1cf4596d146fff38066de0fb Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Wed, 8 Apr 2015 11:42:34 -0500
Subject: [PATCH 17/45] Added table styleing

---
 .../ci_templates/library_build/build_report_table.html          | 2 +-
 .../ci_templates/tests_build/build_report_table.html            | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/workspace_tools/ci_templates/library_build/build_report_table.html b/workspace_tools/ci_templates/library_build/build_report_table.html
index 26d87dfb17..610f8851e9 100644
--- a/workspace_tools/ci_templates/library_build/build_report_table.html
+++ b/workspace_tools/ci_templates/library_build/build_report_table.html
@@ -1,4 +1,4 @@
-<table>
+<table class="sortable pane bigtable stripped-odd">
   <tr>
     <th>Toolchain</th>
   </tr>
diff --git a/workspace_tools/ci_templates/tests_build/build_report_table.html b/workspace_tools/ci_templates/tests_build/build_report_table.html
index e7626b3670..79d41c1ab8 100644
--- a/workspace_tools/ci_templates/tests_build/build_report_table.html
+++ b/workspace_tools/ci_templates/tests_build/build_report_table.html
@@ -1,4 +1,4 @@
-<table>
+<table class="sortable pane bigtable stripped-odd">
   <tr>
     <th>Toolchain</th>
     <th>Project</th>

From afb331dcff18a22f54b61e44bba61b6b2c824a8b Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Mon, 13 Apr 2015 16:43:10 -0500
Subject: [PATCH 18/45] Fixing arguments

---
 workspace_tools/build_release.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index a74177e37e..37a8bdcc35 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -139,8 +139,8 @@ if __name__ == '__main__':
 
     # Write summary of the builds
 
-    if options.report_jenkins_file:
-        write_build_report(build_report, options.report_jenkins_file_name)
+    if options.report_jenkins_file_name:
+        write_build_report(build_report, 'library_build/report.html', options.report_jenkins_file_name)
 
     print "\n\nCompleted in: (%.2f)s" % (time() - start)
 

From 2198e68f76d9cfdf86b572faa943cda5b66af6b9 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Tue, 14 Apr 2015 13:09:09 +0200
Subject: [PATCH 19/45] mbed header file - mbed lib revision - 97

---
 libraries/mbed/api/mbed.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/mbed/api/mbed.h b/libraries/mbed/api/mbed.h
index 31d746f1e2..51b044d11e 100644
--- a/libraries/mbed/api/mbed.h
+++ b/libraries/mbed/api/mbed.h
@@ -16,7 +16,7 @@
 #ifndef MBED_H
 #define MBED_H
 
-#define MBED_LIBRARY_VERSION 96
+#define MBED_LIBRARY_VERSION 97
 
 #include "platform.h"
 

From 5ada69b73d5a0554e035112894e2b4ec62433d41 Mon Sep 17 00:00:00 2001
From: Jeremy Brodt <jeremy.brodt@maximintegrated.com>
Date: Thu, 9 Oct 2014 11:54:03 -0500
Subject: [PATCH 20/45] [MAX32600MBED] Adding MAX32600MBED platform.

---
 libraries/USBDevice/USBDevice/USBEndpoints.h  |   2 +
 .../USBDevice/USBDevice/USBEndpoints_Maxim.h  |  90 +++
 .../USBDevice/USBDevice/USBHAL_Maxim.cpp      | 473 +++++++++++++
 .../TOOLCHAIN_ARM_STD/MAX32600.sct            |  21 +
 .../TOOLCHAIN_ARM_STD/startup_MAX32600.s      | 255 +++++++
 .../TARGET_MAX32600/TOOLCHAIN_ARM_STD/sys.cpp |  57 ++
 .../TOOLCHAIN_GCC_ARM/max32600.ld             | 182 +++++
 .../TOOLCHAIN_GCC_ARM/startup_max32600.S      | 262 +++++++
 .../TOOLCHAIN_IAR/MAX32600.icf                |  29 +
 .../TOOLCHAIN_IAR/startup_MAX32600.s          | 383 ++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/adc_regs.h   | 466 ++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/aes_regs.h   | 159 +++++
 .../TARGET_Maxim/TARGET_MAX32600/afe_regs.h   | 626 ++++++++++++++++
 .../TARGET_MAX32600/clkman_regs.h             | 493 +++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/cmsis.h      |  40 ++
 .../TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.c |  65 ++
 .../TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.h |  53 ++
 .../TARGET_Maxim/TARGET_MAX32600/crc_regs.h   |  89 +++
 .../TARGET_Maxim/TARGET_MAX32600/dac_regs.h   | 180 +++++
 .../TARGET_Maxim/TARGET_MAX32600/flc_regs.h   | 210 ++++++
 .../TARGET_Maxim/TARGET_MAX32600/gpio_regs.h  | 477 +++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/i2cm_regs.h  | 192 +++++
 .../TARGET_Maxim/TARGET_MAX32600/icc_regs.h   |  96 +++
 .../TARGET_Maxim/TARGET_MAX32600/ioman_regs.h | 508 +++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/lcd_regs.h   |  70 ++
 .../TARGET_Maxim/TARGET_MAX32600/maa_regs.h   | 124 ++++
 .../TARGET_Maxim/TARGET_MAX32600/max32600.h   | 666 ++++++++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/pmu_regs.h   | 111 +++
 .../TARGET_Maxim/TARGET_MAX32600/pt_regs.h    | 175 +++++
 .../TARGET_MAX32600/pwrman_regs.h             | 386 ++++++++++
 .../TARGET_MAX32600/pwrseq_regs.h             | 299 ++++++++
 .../TARGET_Maxim/TARGET_MAX32600/rtc_regs.h   | 246 +++++++
 .../TARGET_Maxim/TARGET_MAX32600/spi_regs.h   | 215 ++++++
 .../TARGET_MAX32600/system_max32600.c         | 144 ++++
 .../TARGET_MAX32600/system_max32600.h         |  53 ++
 .../TARGET_Maxim/TARGET_MAX32600/tmr_regs.h   | 146 ++++
 .../TARGET_Maxim/TARGET_MAX32600/tpu_regs.h   | 108 +++
 .../TARGET_Maxim/TARGET_MAX32600/trim_regs.h  |  92 +++
 .../TARGET_Maxim/TARGET_MAX32600/uart_regs.h  | 175 +++++
 .../TARGET_Maxim/TARGET_MAX32600/usb_regs.h   | 480 +++++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/wdt_regs.h   | 150 ++++
 .../TARGET_MAX32600/PeripheralPins.c          | 268 +++++++
 .../TARGET_MAX32600/PeripheralPins.h          |  65 ++
 .../TARGET_Maxim/TARGET_MAX32600/PortNames.h  |  55 ++
 .../TARGET_MAX32600MBED/PeripheralNames.h     |  86 +++
 .../TARGET_MAX32600MBED/PinNames.h            | 267 +++++++
 .../TARGET_MAX32600MBED/low_level_init.c      |  88 +++
 .../TARGET_MAX32600/analogin_api.c            | 147 ++++
 .../TARGET_MAX32600/analogout_api.c           | 212 ++++++
 .../hal/TARGET_Maxim/TARGET_MAX32600/device.h |  72 ++
 .../TARGET_Maxim/TARGET_MAX32600/gpio_api.c   |  94 +++
 .../TARGET_MAX32600/gpio_irq_api.c            | 167 +++++
 .../TARGET_MAX32600/gpio_object.h             |  71 ++
 .../TARGET_Maxim/TARGET_MAX32600/i2c_api.c    | 405 +++++++++++
 .../TARGET_Maxim/TARGET_MAX32600/objects.h    | 118 ++++
 .../hal/TARGET_Maxim/TARGET_MAX32600/pinmap.c | 105 +++
 .../TARGET_Maxim/TARGET_MAX32600/port_api.c   |  97 +++
 .../TARGET_Maxim/TARGET_MAX32600/pwmout_api.c | 234 ++++++
 .../TARGET_Maxim/TARGET_MAX32600/rtc_api.c    | 190 +++++
 .../TARGET_Maxim/TARGET_MAX32600/serial_api.c | 355 ++++++++++
 .../hal/TARGET_Maxim/TARGET_MAX32600/sleep.c  | 169 +++++
 .../TARGET_Maxim/TARGET_MAX32600/spi_api.c    | 190 +++++
 .../TARGET_Maxim/TARGET_MAX32600/us_ticker.c  | 261 +++++++
 .../rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h     |   2 +-
 .../rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c    |   6 +-
 libraries/tests/mbed/analog/main.cpp          |   4 +
 .../tests/mbed/digitalin_digitalout/main.cpp  |   4 +
 libraries/tests/mbed/digitalinout/main.cpp    |   4 +
 libraries/tests/mbed/interruptin/main.cpp     |   5 +-
 libraries/tests/mbed/portinout/main.cpp       |   9 +
 libraries/tests/mbed/portout/main.cpp         |  27 +-
 libraries/tests/mbed/portout_portin/main.cpp  |   9 +
 libraries/tests/mbed/pwm/main.cpp             |   9 +
 .../export/gcc_arm_max32600mbed.tmpl          |  72 ++
 workspace_tools/export/gccarm.py              |   1 +
 workspace_tools/export_test.py                |   1 +
 workspace_tools/targets.py                    |  10 +
 workspace_tools/tests.py                      |  20 +-
 78 files changed, 12924 insertions(+), 23 deletions(-)
 create mode 100644 libraries/USBDevice/USBDevice/USBEndpoints_Maxim.h
 create mode 100644 libraries/USBDevice/USBDevice/USBHAL_Maxim.cpp
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/MAX32600.sct
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/startup_MAX32600.s
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/sys.cpp
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/max32600.ld
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/startup_max32600.S
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/MAX32600.icf
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/startup_MAX32600.s
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/adc_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/aes_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/clkman_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.c
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/crc_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/flc_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/i2cm_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/icc_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/ioman_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/lcd_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/maa_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pmu_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pt_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrman_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrseq_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/rtc_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tmr_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tpu_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/trim_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/uart_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/usb_regs.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/wdt_regs.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PortNames.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PeripheralNames.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PinNames.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogin_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/device.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_object.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pinmap.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/port_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pwmout_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/rtc_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/sleep.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c
 create mode 100644 libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
 create mode 100644 workspace_tools/export/gcc_arm_max32600mbed.tmpl

diff --git a/libraries/USBDevice/USBDevice/USBEndpoints.h b/libraries/USBDevice/USBDevice/USBEndpoints.h
index e7e78bf018..48950986ae 100644
--- a/libraries/USBDevice/USBDevice/USBEndpoints.h
+++ b/libraries/USBDevice/USBDevice/USBEndpoints.h
@@ -47,6 +47,8 @@ typedef enum {
 #include "USBEndpoints_STM32F4.h"
 #elif defined (TARGET_RZ_A1H)
 #include "USBEndpoints_RZ_A1H.h"
+#elif defined(TARGET_Maxim)
+#include "USBEndpoints_Maxim.h"
 #else
 #error "Unknown target type"
 #endif
diff --git a/libraries/USBDevice/USBDevice/USBEndpoints_Maxim.h b/libraries/USBDevice/USBDevice/USBEndpoints_Maxim.h
new file mode 100644
index 0000000000..5cd3905c9f
--- /dev/null
+++ b/libraries/USBDevice/USBDevice/USBEndpoints_Maxim.h
@@ -0,0 +1,90 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#define NUMBER_OF_LOGICAL_ENDPOINTS   (8)
+#define NUMBER_OF_PHYSICAL_ENDPOINTS  (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
+
+#define DIR_OUT       0x00
+#define DIR_IN        0x01
+#define EP_NUM(ep)    (ep >> 1)
+#define IN_EP(ep)     (ep & DIR_IN)
+#define OUT_EP(ep)    (!(ep & DIR_IN))
+
+/* Define physical endpoint numbers */
+
+/*      Endpoint    No.   */
+/*      ----------------  */
+#define EP0OUT      ((0 << 1) | DIR_OUT)
+#define EP0IN       ((0 << 1) | DIR_IN)
+#define EP1OUT      ((1 << 1) | DIR_OUT)
+#define EP1IN       ((1 << 1) | DIR_IN)
+#define EP2OUT      ((2 << 1) | DIR_OUT)
+#define EP2IN       ((2 << 1) | DIR_IN)
+#define EP3OUT      ((3 << 1) | DIR_OUT)
+#define EP3IN       ((3 << 1) | DIR_IN)
+#define EP4OUT      ((4 << 1) | DIR_OUT)
+#define EP4IN       ((4 << 1) | DIR_IN)
+#define EP5OUT      ((5 << 1) | DIR_OUT)
+#define EP5IN       ((5 << 1) | DIR_IN)
+#define EP6OUT      ((6 << 1) | DIR_OUT)
+#define EP6IN       ((6 << 1) | DIR_IN)
+#define EP7OUT      ((7 << 1) | DIR_OUT)
+#define EP7IN       ((7 << 1) | DIR_IN)
+
+/* Maximum Packet sizes */
+
+#define MAX_PACKET_SIZE_EP0  (64)
+#define MAX_PACKET_SIZE_EP1  (64)
+#define MAX_PACKET_SIZE_EP2  (64)
+#define MAX_PACKET_SIZE_EP3  (64)
+#define MAX_PACKET_SIZE_EP4  (64)
+#define MAX_PACKET_SIZE_EP5  (64)
+#define MAX_PACKET_SIZE_EP6  (64)
+#define MAX_PACKET_SIZE_EP7  (64)
+
+/* Generic endpoints - intended to be portable accross devices */
+/* and be suitable for simple USB devices. */
+
+/* Bulk endpoints */
+#define EPBULK_OUT  (EP1OUT)
+#define EPBULK_IN   (EP2IN)
+#define EPBULK_OUT_callback   EP1_OUT_callback
+#define EPBULK_IN_callback    EP2_IN_callback
+/* Interrupt endpoints */
+#define EPINT_OUT   (EP3OUT)
+#define EPINT_IN    (EP4IN)
+#define EPINT_OUT_callback    EP3_OUT_callback
+#define EPINT_IN_callback     EP4_IN_callback
+
+#define MAX_PACKET_SIZE_EPBULK  (64)
+#define MAX_PACKET_SIZE_EPINT   (64)
diff --git a/libraries/USBDevice/USBDevice/USBHAL_Maxim.cpp b/libraries/USBDevice/USBDevice/USBHAL_Maxim.cpp
new file mode 100644
index 0000000000..13e193cd2c
--- /dev/null
+++ b/libraries/USBDevice/USBDevice/USBHAL_Maxim.cpp
@@ -0,0 +1,473 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#if defined(TARGET_Maxim)
+
+#include "USBHAL.h"
+#include "usb_regs.h"
+#include "clkman_regs.h"
+
+#define CONNECT_INTS    (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
+
+USBHAL *USBHAL::instance;
+
+typedef struct {
+    volatile uint32_t buf0_desc;
+    volatile uint32_t buf0_address;
+    volatile uint32_t buf1_desc;
+    volatile uint32_t buf1_address;
+} ep_buffer_t;
+
+typedef struct {
+    ep_buffer_t out_buffer;
+    ep_buffer_t in_buffer;
+} ep0_buffer_t;
+
+typedef struct {
+    ep0_buffer_t ep0;
+    ep_buffer_t ep[MXC_USB_NUM_EP - 1];
+} ep_buffer_descriptor_t;
+
+// Static storage for endpoint buffer descriptor table. Must be 512 byte alligned for DMA.
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment = 512
+#else
+__attribute__ ((aligned (512))) 
+#endif
+ep_buffer_descriptor_t ep_buffer_descriptor;
+
+// static storage for temporary data buffers. Must be 32 byte alligned.
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment = 4
+#else
+__attribute__ ((aligned (4))) 
+#endif
+static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
+
+// contorl packet state
+static enum {
+    CTRL_NONE = 0,
+    CTRL_SETUP,
+    CTRL_OUT,
+    CTRL_IN,
+} control_state;
+
+USBHAL::USBHAL(void)
+{
+    NVIC_DisableIRQ(USB_IRQn);
+
+    // The PLL must be enabled for USB
+    MBED_ASSERT(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE);
+
+    // Enable the USB clock
+    MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N;
+
+    // reset the device
+    MXC_USB->cn = 0;
+    MXC_USB->cn = 1;
+    MXC_USB->dev_inten = 0;
+    MXC_USB->dev_cn = 0;
+    MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
+    MXC_USB->dev_cn = 0;
+
+    // fill in callback arrays
+    epCallback[EP0OUT] = NULL;
+    epCallback[EP0IN]  = NULL;
+    epCallback[EP1OUT] = &USBHAL::EP1_OUT_callback;
+    epCallback[EP1IN ] = &USBHAL::EP1_IN_callback;
+    epCallback[EP2OUT] = &USBHAL::EP2_OUT_callback;
+    epCallback[EP2IN ] = &USBHAL::EP2_IN_callback;
+    epCallback[EP3OUT] = &USBHAL::EP3_OUT_callback;
+    epCallback[EP3IN ] = &USBHAL::EP3_IN_callback;
+    epCallback[EP4OUT] = &USBHAL::EP4_OUT_callback;
+    epCallback[EP4IN ] = &USBHAL::EP4_IN_callback;
+    epCallback[EP5OUT] = &USBHAL::EP5_OUT_callback;
+    epCallback[EP5IN ] = &USBHAL::EP5_IN_callback;
+    epCallback[EP6OUT] = &USBHAL::EP6_OUT_callback;
+    epCallback[EP6IN ] = &USBHAL::EP6_IN_callback;
+    epCallback[EP7OUT] = &USBHAL::EP7_OUT_callback;
+    epCallback[EP7IN ] = &USBHAL::EP7_IN_callback;
+
+    // clear driver state
+    control_state = CTRL_NONE;
+
+    // set the descriptor location
+    MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
+
+    // attach IRQ handler and enable interrupts
+    instance = this;
+    NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
+    NVIC_EnableIRQ(USB_IRQn);
+}
+
+USBHAL::~USBHAL(void)
+{
+    MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
+    MXC_USB->dev_cn = 0;
+    MXC_USB->cn = 0;
+}
+
+void USBHAL::connect(void)
+{
+    // enable interrupts
+    MXC_USB->dev_inten |= CONNECT_INTS;
+
+    // allow interrupts on ep0
+    MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
+
+    // pullup enable
+    MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
+}
+
+void USBHAL::disconnect(void)
+{
+    // disable interrupts
+    MXC_USB->dev_inten &= ~CONNECT_INTS;
+
+    // disable pullup
+    MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
+}
+
+void USBHAL::configureDevice(void)
+{
+    // do nothing
+}
+
+void USBHAL::unconfigureDevice(void)
+{
+    // reset endpoints
+    for (int i = 0; i < MXC_USB_NUM_EP; i++) {
+        // Disable endpoint and clear the data toggle
+        MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
+        MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
+    }
+}
+
+void USBHAL::setAddress(uint8_t address)
+{
+    // do nothing
+}
+
+void USBHAL::remoteWakeup(void)
+{
+    // do nothing
+}
+
+static ep_buffer_t *get_desc(uint8_t endpoint)
+{
+    uint8_t epnum = EP_NUM(endpoint);
+    ep_buffer_t *desc;
+
+    if (epnum == 0) {
+        if (IN_EP(endpoint)) {
+            desc = &ep_buffer_descriptor.ep0.in_buffer;
+        } else {
+            desc = &ep_buffer_descriptor.ep0.out_buffer;
+        }
+    } else {
+        desc = &ep_buffer_descriptor.ep[epnum - 1];
+    }
+
+    return desc;
+}
+
+void USBHAL::EP0setup(uint8_t *buffer)
+{
+    memcpy(buffer, (void*)&MXC_USB->setup0, 8); // setup packet is fixed at 8 bytes
+}
+
+void USBHAL::EP0read(void)
+{
+    if (control_state == CTRL_IN) {
+        // This is the status stage. ACK.
+        MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
+        control_state = CTRL_NONE;
+        return;
+    }
+
+    control_state = CTRL_OUT;
+
+    endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
+}
+
+void USBHAL::EP0readStage(void)
+{
+    // do nothing
+}
+
+uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
+{
+    uint32_t size;
+
+    if (MXC_USB->out_owner & 1) {
+        return 0;
+    }
+
+    // get the packet length and contents
+    ep_buffer_t *desc = get_desc(EP0OUT);
+    size = desc->buf0_desc;
+    memcpy(buffer, aligned_buffer[0], size);
+
+    return size;
+}
+
+void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
+{
+    if ((size == 0) && (control_state != CTRL_IN)) {
+        // This is a status stage ACK. Handle in hardware.
+        MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
+        control_state = CTRL_NONE;
+        return;
+    }
+
+    control_state = CTRL_IN;
+
+    endpointWrite(EP0IN, buffer, size);
+}
+
+void USBHAL::EP0stall(void)
+{
+    stallEndpoint(0);
+}
+
+EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
+{
+    uint8_t epnum = EP_NUM(endpoint);
+
+    if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
+        return EP_INVALID;
+    }
+
+    if (maximumSize > MXC_USB_MAX_PACKET) {
+        return EP_INVALID;
+    }
+    
+    uint32_t mask = (1 << epnum);
+    if (MXC_USB->out_owner & mask) {
+        return EP_INVALID;
+    }
+
+    ep_buffer_t *desc = get_desc(endpoint);
+    desc->buf0_desc = maximumSize;
+    desc->buf0_address = (uint32_t)aligned_buffer[epnum];
+
+    MXC_USB->out_owner = mask;
+
+    return EP_PENDING;
+}
+
+EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead)
+{
+    if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
+        return EP_INVALID;
+    }
+
+    uint32_t mask = (1 << EP_NUM(endpoint));
+    if (MXC_USB->out_owner & mask) {
+        return EP_PENDING;
+    }
+
+    // get the packet length and contents
+    ep_buffer_t *desc = get_desc(endpoint);
+    *bytesRead = desc->buf0_desc;
+    memcpy(data, aligned_buffer[EP_NUM(endpoint)], *bytesRead);
+
+    return EP_COMPLETED;
+}
+
+EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
+{
+    uint8_t epnum = EP_NUM(endpoint);
+
+    if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || OUT_EP(endpoint)) {
+        return EP_INVALID;
+    }
+
+    if (size > MXC_USB_MAX_PACKET) {
+        return EP_INVALID;
+    }
+
+    uint32_t mask = (1 << epnum);
+    if (MXC_USB->in_owner & mask) {
+        return EP_INVALID;
+    }
+
+    memcpy(aligned_buffer[epnum], data, size);
+
+    ep_buffer_t *desc = get_desc(endpoint);
+    desc->buf0_desc = size;
+    desc->buf0_address = (uint32_t)aligned_buffer[epnum];
+
+    // start the DMA
+    MXC_USB->in_owner = mask;
+
+    return EP_PENDING;
+}
+
+EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
+{
+    uint32_t mask = (1 << EP_NUM(endpoint));
+    if (MXC_USB->in_owner & mask) {
+        return EP_PENDING;
+    }
+
+    return EP_COMPLETED;
+}
+
+void USBHAL::stallEndpoint(uint8_t endpoint)
+{
+    uint8_t epnum = EP_NUM(endpoint);
+
+    if (epnum == 0) {
+        MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
+    }
+
+    MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
+}
+
+void USBHAL::unstallEndpoint(uint8_t endpoint)
+{
+    MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
+}
+
+bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
+{
+    uint8_t epnum = EP_NUM(endpoint);
+    uint32_t ep_ctrl;
+
+    if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
+        return false;
+    }
+
+    if (IN_EP(endpoint)) {
+        ep_ctrl = (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS);
+    } else {
+        ep_ctrl = (MXC_S_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS);
+    }
+
+    ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
+
+    MXC_USB->ep[epnum] = ep_ctrl;
+
+    return true;
+}
+
+bool USBHAL::getEndpointStallState(unsigned char endpoint)
+{
+    return !!(MXC_USB->ep[endpoint] & MXC_F_USB_EP_STALL);
+}
+
+void USBHAL::_usbisr(void)
+{
+    instance->usbisr();
+}
+
+void USBHAL::usbisr(void)
+{
+    // get and clear irqs
+    uint32_t irq_flags = MXC_USB->dev_intfl;
+    MXC_USB->dev_intfl = irq_flags;
+
+    // process only enabled interrupts
+    irq_flags &= MXC_USB->dev_inten;
+
+    // suspend 
+    if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
+        suspendStateChanged(1);
+    }
+
+    // bus reset
+    if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
+
+        // reset endpoints
+        for (int i = 0; i < MXC_USB_NUM_EP; i++) {
+            // Disable endpoint and clear the data toggle
+            MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
+            MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
+        }
+
+        // clear driver state
+        control_state = CTRL_NONE;
+
+        busReset();
+
+        // no need to process events after reset
+        return;
+    }
+
+    // Setup packet
+    if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
+        control_state = CTRL_SETUP;
+        EP0setupCallback();
+    }
+
+    // IN packets
+    if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
+        // get and clear IN irqs
+        uint32_t in_irqs = MXC_USB->in_int;
+        MXC_USB->in_int = in_irqs;
+
+        if (in_irqs & 1) {
+            EP0in();
+        }
+
+        for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
+            uint32_t irq_mask = (1 << epnum);
+            if (in_irqs & irq_mask) {
+                uint8_t endpoint = (epnum << 1) | DIR_IN;
+                (instance->*(epCallback[endpoint]))();
+            }
+        }
+    }
+
+    // OUT packets
+    if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
+        // get and clear OUT irqs
+        uint32_t out_irqs = MXC_USB->out_int;
+        MXC_USB->out_int = out_irqs;
+
+        if (out_irqs & 1) {
+            EP0out();
+        }
+
+        for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
+            uint32_t irq_mask = (1 << epnum);
+            if (out_irqs & irq_mask) {
+                uint8_t endpoint = (epnum << 1) | DIR_OUT;
+                (instance->*(epCallback[endpoint]))();
+            }
+        }
+    }
+}
+
+#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/MAX32600.sct b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/MAX32600.sct
new file mode 100644
index 0000000000..cdc367ab99
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/MAX32600.sct
@@ -0,0 +1,21 @@
+
+; MAX32600
+; 256KB FLASH (0x40000) @ 0x000000000
+; 2KB RAM (0x8000) @ 0x20000000
+
+
+; MAX32600: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
+
+LR_IROM1 0x00000000 0x40000  {    ; load region size_region
+    ER_IROM1 0x00000000 0x40000  {  ; load address = execution address 
+        *.o (RESET, +First)
+        *(InRoot$$Sections)
+        .ANY (+RO)
+    }
+
+    ; [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = (0x140) - alignment
+    RW_IRAM1 (0x20000000+0x140) (0x8000-0x140)  {  ; RW data
+        .ANY (+RW +ZI)
+    }
+
+}
\ No newline at end of file
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/startup_MAX32600.s b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/startup_MAX32600.s
new file mode 100644
index 0000000000..02ece3a3cc
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/startup_MAX32600.s
@@ -0,0 +1,255 @@
+;*******************************************************************************
+; Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+;
+; Permission is hereby granted, free of charge, to any person obtaining a
+; copy of this software and associated documentation files (the "Software"),
+; to deal in the Software without restriction, including without limitation
+; the rights to use, copy, modify, merge, publish, distribute, sublicense,
+; and/or sell copies of the Software, and to permit persons to whom the
+; Software is furnished to do so, subject to the following conditions:
+;
+; The above copyright notice and this permission notice shall be included
+; in all copies or substantial portions of the Software.
+;
+; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+; OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+; IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+; OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+; ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+; OTHER DEALINGS IN THE SOFTWARE.
+;
+; Except as contained in this notice, the name of Maxim Integrated
+; Products, Inc. shall not be used except as stated in the Maxim Integrated
+; Products, Inc. Branding Policy.
+;
+; The mere transfer of this software does not imply any licenses
+; of trade secrets, proprietary technology, copyrights, patents,
+; trademarks, maskwork rights, or any other form of intellectual
+; property whatsoever. Maxim Integrated Products, Inc. retains all
+; ownership rights.
+;*******************************************************************************
+
+__initial_sp        EQU     0x20008000  ; Top of RAM
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     DefaultIRQ_Handler        ; MPU Fault Handler
+                DCD     DefaultIRQ_Handler        ; Bus Fault Handler
+                DCD     DefaultIRQ_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     DefaultIRQ_Handler        ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     DefaultIRQ_Handler        ; PendSV Handler
+                DCD     SysTick_IRQHandler        ; SysTick Handler
+
+                ; Maxim 32600 Externals interrupts
+                DCD     UART0_IRQHandler          ; 16: 1 UART0
+                DCD     UART1_IRQHandler          ; 17: 2 UART1
+                DCD     I2CM0_IRQHandler          ; 18: 3 I2C Master 0
+                DCD     I2CS_IRQHandler           ; 19: 4 I2C Slave
+                DCD     USB_IRQHandler            ; 20: 5 USB
+                DCD     PMU_IRQHandler            ; 21: 6 DMA
+                DCD     AFE_IRQHandler            ; 22: 7 AFE
+                DCD     MAA_IRQHandler            ; 23: 8 MAA
+                DCD     AES_IRQHandler            ; 24: 9 AES
+                DCD     SPI0_IRQHandler           ; 25:10 SPI0
+                DCD     SPI1_IRQHandler           ; 26:11 SPI1
+                DCD     SPI2_IRQHandler           ; 27:12 SPI2
+                DCD     TMR0_IRQHandler           ; 28:13 Timer32-0
+                DCD     TMR1_IRQHandler           ; 29:14 Timer32-1
+                DCD     TMR2_IRQHandler           ; 30:15 Timer32-1
+                DCD     TMR3_IRQHandler           ; 31:16 Timer32-2
+                DCD     RSVD0_IRQHandler          ; 32:17 RSVD
+                DCD     RSVD1_IRQHandler          ; 33:18 RSVD
+                DCD     DAC0_IRQHandler           ; 34:19 DAC0  (12-bit DAC)  
+                DCD     DAC1_IRQHandler           ; 35:20 DAC1  (12-bit DAC)  
+                DCD     DAC2_IRQHandler           ; 36:21 DAC2  (8-bit DAC)
+                DCD     DAC3_IRQHandler           ; 37:22 DAC3  (8-bit DAC)
+                DCD     ADC_IRQHandler            ; 38:23 ADC
+                DCD     FLC_IRQHandler            ; 39:24 Flash Controller
+                DCD     PWRMAN_IRQHandler         ; 40:25 PWRMAN
+                DCD     CLKMAN_IRQHandler         ; 41:26 CLKMAN
+                DCD     RTC0_IRQHandler           ; 42:27 RTC INT0
+                DCD     RTC1_IRQHandler           ; 43:28 RTC INT1
+                DCD     RTC2_IRQHandler           ; 44:29 RTC INT2
+                DCD     RTC3_IRQHandler           ; 45:30 RTC INT3
+                DCD     WDT0_IRQHandler           ; 46:31 WATCHDOG0
+                DCD     WDT0_P_IRQHandler         ; 47:32 WATCHDOG0 PRE-WINDOW
+                DCD     WDT1_IRQHandler           ; 48:33 WATCHDOG1
+                DCD     WDT1_P_IRQHandler         ; 49:34 WATCHDOG1 PRE-WINDOW
+                DCD     GPIO_P0_IRQHandler        ; 50:35 GPIO Port 0 
+                DCD     GPIO_P1_IRQHandler        ; 51:36 GPIO Port 1 
+                DCD     GPIO_P2_IRQHandler        ; 52:37 GPIO Port 2 
+                DCD     GPIO_P3_IRQHandler        ; 53:38 GPIO Port 3 
+                DCD     GPIO_P4_IRQHandler        ; 54:39 GPIO Port 4 
+                DCD     GPIO_P5_IRQHandler        ; 55:40 GPIO Port 5 
+                DCD     GPIO_P6_IRQHandler        ; 56:41 GPIO Port 6 
+                DCD     GPIO_P7_IRQHandler        ; 57:42 GPIO Port 7 
+                DCD     TMR16_0_IRQHandler        ; 58:43 Timer16-s0
+                DCD     TMR16_1_IRQHandler        ; 59:44 Timer16-s1
+                DCD     TMR16_2_IRQHandler        ; 60:45 Timer16-s2
+                DCD     TMR16_3_IRQHandler        ; 61:46 Timer16-s3
+                DCD     I2CM1_IRQHandler          ; 62:47 I2C Master 1
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+Reset_Handler   PROC
+                EXPORT Reset_Handler                    [WEAK]
+                IMPORT SystemInit
+                IMPORT __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler             PROC
+                        EXPORT NMI_Handler                      [WEAK]     
+                        B       NMI_Handler
+                        ENDP
+
+HardFault_Handler       PROC
+                        EXPORT HardFault_Handler                [WEAK]             
+                        B       HardFault_Handler
+                        ENDP
+
+DefaultIRQ_Handler      PROC
+                        EXPORT DefaultIRQ_Handler               [WEAK]             
+                        B       DefaultIRQ_Handler
+                        ENDP
+
+DebugMon_Handler        PROC
+                        EXPORT DebugMon_Handler                 [WEAK]             
+                        B       DebugMon_Handler
+                        ENDP
+
+SysTick_IRQHandler      PROC
+                        EXPORT SysTick_IRQHandler               [WEAK]             
+                        B       SysTick_IRQHandler
+                        ENDP
+
+Default_Handler PROC
+
+        EXPORT UART0_IRQHandler                         [WEAK]                              
+        EXPORT UART1_IRQHandler                         [WEAK]                              
+        EXPORT I2CM0_IRQHandler                         [WEAK]                              
+        EXPORT I2CS_IRQHandler                          [WEAK]                             
+        EXPORT USB_IRQHandler                           [WEAK]             
+        EXPORT PMU_IRQHandler                           [WEAK]             
+        EXPORT AFE_IRQHandler                           [WEAK]                            
+        EXPORT MAA_IRQHandler                           [WEAK]                            
+        EXPORT AES_IRQHandler                           [WEAK]                            
+        EXPORT SPI0_IRQHandler                          [WEAK]                             
+        EXPORT SPI1_IRQHandler                          [WEAK]                             
+        EXPORT SPI2_IRQHandler                          [WEAK]                             
+        EXPORT TMR0_IRQHandler                          [WEAK]                             
+        EXPORT TMR1_IRQHandler                          [WEAK]                             
+        EXPORT TMR2_IRQHandler                          [WEAK]                             
+        EXPORT TMR3_IRQHandler                          [WEAK]                             
+        EXPORT RSVD0_IRQHandler                         [WEAK]                              
+        EXPORT RSVD1_IRQHandler                         [WEAK]                              
+        EXPORT DAC0_IRQHandler                          [WEAK]                             
+        EXPORT DAC1_IRQHandler                          [WEAK]                             
+        EXPORT DAC2_IRQHandler                          [WEAK]                             
+        EXPORT DAC3_IRQHandler                          [WEAK]                             
+        EXPORT ADC_IRQHandler                           [WEAK]             
+        EXPORT FLC_IRQHandler                           [WEAK]             
+        EXPORT PWRMAN_IRQHandler                        [WEAK]                               
+        EXPORT CLKMAN_IRQHandler                        [WEAK]                               
+        EXPORT RTC0_IRQHandler                          [WEAK]                             
+        EXPORT RTC1_IRQHandler                          [WEAK]                             
+        EXPORT RTC2_IRQHandler                          [WEAK]                             
+        EXPORT RTC3_IRQHandler                          [WEAK]                             
+        EXPORT WDT0_IRQHandler                          [WEAK]                             
+        EXPORT WDT0_P_IRQHandler                        [WEAK]                               
+        EXPORT WDT1_IRQHandler                          [WEAK]                             
+        EXPORT WDT1_P_IRQHandler                        [WEAK]                               
+        EXPORT GPIO_P0_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P1_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P2_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P3_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P4_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P5_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P6_IRQHandler                       [WEAK]                                
+        EXPORT GPIO_P7_IRQHandler                       [WEAK]                                
+        EXPORT TMR16_0_IRQHandler                       [WEAK]                                
+        EXPORT TMR16_1_IRQHandler                       [WEAK]                                
+        EXPORT TMR16_2_IRQHandler                       [WEAK]                                
+        EXPORT TMR16_3_IRQHandler                       [WEAK]                                
+        EXPORT I2CM1_IRQHandler                         [WEAK]               
+
+UART0_IRQHandler
+UART1_IRQHandler               
+I2CM0_IRQHandler
+I2CS_IRQHandler
+USB_IRQHandler
+PMU_IRQHandler
+AFE_IRQHandler
+MAA_IRQHandler
+AES_IRQHandler
+SPI0_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+TMR0_IRQHandler
+TMR1_IRQHandler
+TMR2_IRQHandler
+TMR3_IRQHandler
+RSVD0_IRQHandler
+RSVD1_IRQHandler
+DAC0_IRQHandler
+DAC1_IRQHandler
+DAC2_IRQHandler
+DAC3_IRQHandler
+ADC_IRQHandler
+FLC_IRQHandler
+PWRMAN_IRQHandler
+CLKMAN_IRQHandler
+RTC0_IRQHandler
+RTC1_IRQHandler
+RTC2_IRQHandler
+RTC3_IRQHandler
+WDT0_IRQHandler
+WDT0_P_IRQHandler
+WDT1_IRQHandler
+WDT1_P_IRQHandler
+GPIO_P0_IRQHandler
+GPIO_P1_IRQHandler
+GPIO_P2_IRQHandler
+GPIO_P3_IRQHandler
+GPIO_P4_IRQHandler
+GPIO_P5_IRQHandler
+GPIO_P6_IRQHandler
+GPIO_P7_IRQHandler
+TMR16_0_IRQHandler
+TMR16_1_IRQHandler
+TMR16_2_IRQHandler
+TMR16_3_IRQHandler
+I2CM1_IRQHandler
+
+        B .
+        ENDP
+        ALIGN
+        END
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/sys.cpp
new file mode 100644
index 0000000000..90d1391ba3
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_ARM_STD/sys.cpp
@@ -0,0 +1,57 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
+#include <rt_misc.h>
+#include <stdint.h>
+
+extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+    uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+    uint32_t sp_limit = __current_sp();
+
+    zi_limit = (zi_limit + 7) & ~0x7;    // ensure zi_limit is 8-byte aligned
+
+    struct __initial_stackheap r;
+    r.heap_base = zi_limit;
+    r.heap_limit = sp_limit;
+    return r;
+}
+
+#ifdef __cplusplus
+}
+#endif 
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/max32600.ld b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/max32600.ld
new file mode 100644
index 0000000000..2d5c3112e5
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/max32600.ld
@@ -0,0 +1,182 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+/******************************************************************************
+ *
+ * Linker configuration file, default ARM Cortex M3 produced by Maxim Integrated Inc.
+ *
+ *****************************************************************************/
+
+MEMORY
+{
+    FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 /* start from 0x0, fullsize flash, 256k */
+    RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* full-size SRAM, 32k */
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ * 
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+        *(.text*)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+
+    } > RAM
+
+    .bss :
+    {
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        __bss_end__ = .;
+    } > RAM
+
+    .heap :
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy :
+    {
+        *(.stack)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/startup_max32600.S b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/startup_max32600.S
new file mode 100644
index 0000000000..cda4da904b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_GCC_ARM/startup_max32600.S
@@ -0,0 +1,262 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+    .syntax unified
+    .arch armv7-m
+
+/* Memory Model
+   The HEAP starts at the end of the DATA section and grows upward.
+   
+   The STACK starts at the end of the RAM and grows downward.
+   
+   The HEAP and stack STACK are only checked at compile time:
+   (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
+   
+   This is just a check for the bare minimum for the Heap+Stack area before
+   aborting compilation, it is not the run time limit:
+   Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
+ */
+    .section .stack
+    .align 3
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0x00001000
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+__StackLimit:
+    .space    Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x00000C00
+#endif
+    .globl    __HeapBase
+    .globl    __HeapLimit
+__HeapBase:
+    .space    Heap_Size
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler         /* Reset Handler */
+    .long    NMI_Handler           /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    MemManage_Handler     /* MPU Fault Handler */
+    .long    BusFault_Handler      /* Bus Fault Handler */
+    .long    UsageFault_Handler    /* Usage Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    DebugMon_Handler      /* Debug Monitor Handler */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+    /* Externals interrupts */
+    .long UART0_IRQHandler          /* 16: 1 UART0 */
+    .long UART1_IRQHandler          /* 17: 2 UART1 */
+    .long I2CM0_IRQHandler          /* 18: 3 I2C Master 0 */
+    .long I2CS_IRQHandler           /* 19: 4 I2C Slave */
+    .long USB_IRQHandler            /* 20: 5 USB */
+    .long PMU_IRQHandler            /* 21: 6 DMA */
+    .long AFE_IRQHandler            /* 22: 7 AFE */
+    .long MAA_IRQHandler            /* 23: 8 MAA */
+    .long AES_IRQHandler            /* 24: 9 AES */
+    .long SPI0_IRQHandler           /* 25:10 SPI0 */
+    .long SPI1_IRQHandler           /* 26:11 SPI1 */
+    .long SPI2_IRQHandler           /* 27:12 SPI2 */
+    .long TMR0_IRQHandler           /* 28:13 Timer32-0 */
+    .long TMR1_IRQHandler           /* 29:14 Timer32-1 */
+    .long TMR2_IRQHandler           /* 30:15 Timer32-1 */
+    .long TMR3_IRQHandler           /* 31:16 Timer32-2 */
+    .long RSVD0_IRQHandler          /* 32:17 RSVD */
+    .long RSVD1_IRQHandler          /* 33:18 RSVD */
+    .long DAC0_IRQHandler           /* 34:19 DAC0  (12-bit DAC) */  
+    .long DAC1_IRQHandler           /* 35:20 DAC1  (12-bit DAC) */  
+    .long DAC2_IRQHandler           /* 36:21 DAC2  (8-bit DAC) */
+    .long DAC3_IRQHandler           /* 37:22 DAC3  (8-bit DAC) */
+    .long ADC_IRQHandler            /* 38:23 ADC */
+    .long FLC_IRQHandler            /* 39:24 Flash Controller */
+    .long PWRMAN_IRQHandler         /* 40:25 PWRMAN */
+    .long CLKMAN_IRQHandler         /* 41:26 CLKMAN */
+    .long RTC0_IRQHandler           /* 42:27 RTC INT0 */
+    .long RTC1_IRQHandler           /* 43:28 RTC INT1 */
+    .long RTC2_IRQHandler           /* 44:29 RTC INT2 */
+    .long RTC3_IRQHandler           /* 45:30 RTC INT3 */
+    .long WDT0_IRQHandler           /* 46:31 WATCHDOG0 */
+    .long WDT0_P_IRQHandler         /* 47:32 WATCHDOG0 PRE-WINDOW */
+    .long WDT1_IRQHandler           /* 48:33 WATCHDOG1 */
+    .long WDT1_P_IRQHandler         /* 49:34 WATCHDOG1 PRE-WINDOW */
+    .long GPIO_P0_IRQHandler        /* 50:35 GPIO Port 0  */
+    .long GPIO_P1_IRQHandler        /* 51:36 GPIO Port 1  */
+    .long GPIO_P2_IRQHandler        /* 52:37 GPIO Port 2  */
+    .long GPIO_P3_IRQHandler        /* 53:38 GPIO Port 3  */
+    .long GPIO_P4_IRQHandler        /* 54:39 GPIO Port 4  */
+    .long GPIO_P5_IRQHandler        /* 55:40 GPIO Port 5  */
+    .long GPIO_P6_IRQHandler        /* 56:41 GPIO Port 6  */
+    .long GPIO_P7_IRQHandler        /* 57:42 GPIO Port 7  */
+    .long TMR16_0_IRQHandler        /* 58:43 Timer16-s0 */
+    .long TMR16_1_IRQHandler        /* 59:44 Timer16-s1 */
+    .long TMR16_2_IRQHandler        /* 60:45 Timer16-s2 */
+    .long TMR16_3_IRQHandler        /* 61:46 Timer16-s3 */
+    .long I2CM1_IRQHandler          /* 62:47 I2C Master 1 */
+
+	
+    .text 	
+    .thumb
+    .thumb_func
+    .align 2
+    .globl   Reset_Handler
+    .type    Reset_Handler, %function
+Reset_Handler:
+/*     Loop to copy data from read only memory to RAM. The ranges
+ *      of copy from/to are specified by following symbols evaluated in
+ *      linker script.
+ *      __etext: End of code section, i.e., begin of data sections to copy from.
+ *      __data_start__/__data_end__: RAM address range that data should be
+ *      copied to. Both must be aligned to 4 bytes boundary.  */
+
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+.Lflash_to_ram_loop:
+    cmp     r2, r3
+    ittt    lt
+    ldrlt   r0, [r1], #4
+    strlt   r0, [r2], #4
+    blt    .Lflash_to_ram_loop
+
+.Lflash_to_ram_loop_end:
+
+    ldr    r0, =SystemInit
+    blx    r0
+    ldr    r0, =_start
+    bx     r0
+    .pool
+    .size Reset_Handler, . - Reset_Handler
+    
+    .text
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_default_handler    handler_name
+    .align 1
+    .thumb_func
+    .weak    \handler_name
+    .type    \handler_name, %function
+\handler_name :
+    b    .
+    .size    \handler_name, . - \handler_name
+    .endm
+
+    def_default_handler    NMI_Handler
+    def_default_handler    HardFault_Handler
+    def_default_handler    MemManage_Handler
+    def_default_handler    BusFault_Handler
+    def_default_handler    UsageFault_Handler
+    def_default_handler    SVC_Handler
+    def_default_handler    DebugMon_Handler
+    def_default_handler    PendSV_Handler
+    def_default_handler    SysTick_Handler
+    def_default_handler    Default_Handler
+
+    .macro    def_irq_default_handler    handler_name
+    .weak     \handler_name
+    .set      \handler_name, Default_Handler
+    .endm
+ 
+    def_irq_default_handler UART0_IRQHandler          /* 16: 1 UART0 */
+    def_irq_default_handler UART1_IRQHandler          /* 17: 2 UART1 */
+    def_irq_default_handler I2CM0_IRQHandler          /* 18: 3 I2C Master 0 */
+    def_irq_default_handler I2CS_IRQHandler           /* 19: 4 I2C Slave */
+    def_irq_default_handler USB_IRQHandler            /* 20: 5 USB */
+    def_irq_default_handler PMU_IRQHandler            /* 21: 6 DMA */
+    def_irq_default_handler AFE_IRQHandler            /* 22: 7 AFE */
+    def_irq_default_handler MAA_IRQHandler            /* 23: 8 MAA */
+    def_irq_default_handler AES_IRQHandler            /* 24: 9 AES */
+    def_irq_default_handler SPI0_IRQHandler           /* 25:10 SPI0 */
+    def_irq_default_handler SPI1_IRQHandler           /* 26:11 SPI1 */
+    def_irq_default_handler SPI2_IRQHandler           /* 27:12 SPI2 */
+    def_irq_default_handler TMR0_IRQHandler           /* 28:13 Timer32-0 */
+    def_irq_default_handler TMR1_IRQHandler           /* 29:14 Timer32-1 */
+    def_irq_default_handler TMR2_IRQHandler           /* 30:15 Timer32-1 */
+    def_irq_default_handler TMR3_IRQHandler           /* 31:16 Timer32-2 */
+    def_irq_default_handler RSVD0_IRQHandler          /* 32:17 RSVD */
+    def_irq_default_handler RSVD1_IRQHandler          /* 33:18 RSVD */
+    def_irq_default_handler DAC0_IRQHandler           /* 34:19 DAC0  (12-bit DAC) */  
+    def_irq_default_handler DAC1_IRQHandler           /* 35:20 DAC1  (12-bit DAC) */  
+    def_irq_default_handler DAC2_IRQHandler           /* 36:21 DAC2  (8-bit DAC) */
+    def_irq_default_handler DAC3_IRQHandler           /* 37:22 DAC3  (8-bit DAC) */
+    def_irq_default_handler ADC_IRQHandler            /* 38:23 ADC */
+    def_irq_default_handler FLC_IRQHandler            /* 39:24 Flash Controller */
+    def_irq_default_handler PWRMAN_IRQHandler         /* 40:25 PWRMAN */
+    def_irq_default_handler CLKMAN_IRQHandler         /* 41:26 CLKMAN */
+    def_irq_default_handler RTC0_IRQHandler           /* 42:27 RTC INT0 */
+    def_irq_default_handler RTC1_IRQHandler           /* 43:28 RTC INT1 */
+    def_irq_default_handler RTC2_IRQHandler           /* 44:29 RTC INT2 */
+    def_irq_default_handler RTC3_IRQHandler           /* 45:30 RTC INT3 */
+    def_irq_default_handler WDT0_IRQHandler           /* 46:31 WATCHDOG0 */
+    def_irq_default_handler WDT0_P_IRQHandler         /* 47:32 WATCHDOG0 PRE-WINDOW */
+    def_irq_default_handler WDT1_IRQHandler           /* 48:33 WATCHDOG1 */
+    def_irq_default_handler WDT1_P_IRQHandler         /* 49:34 WATCHDOG1 PRE-WINDOW */
+    def_irq_default_handler GPIO_P0_IRQHandler        /* 50:35 GPIO Port 0  */
+    def_irq_default_handler GPIO_P1_IRQHandler        /* 51:36 GPIO Port 1  */
+    def_irq_default_handler GPIO_P2_IRQHandler        /* 52:37 GPIO Port 2  */
+    def_irq_default_handler GPIO_P3_IRQHandler        /* 53:38 GPIO Port 3  */
+    def_irq_default_handler GPIO_P4_IRQHandler        /* 54:39 GPIO Port 4  */
+    def_irq_default_handler GPIO_P5_IRQHandler        /* 55:40 GPIO Port 5  */
+    def_irq_default_handler GPIO_P6_IRQHandler        /* 56:41 GPIO Port 6  */
+    def_irq_default_handler GPIO_P7_IRQHandler        /* 57:42 GPIO Port 7  */
+    def_irq_default_handler TMR16_0_IRQHandler        /* 58:43 Timer16-s0 */
+    def_irq_default_handler TMR16_1_IRQHandler        /* 59:44 Timer16-s1 */
+    def_irq_default_handler TMR16_2_IRQHandler        /* 60:45 Timer16-s2 */
+    def_irq_default_handler TMR16_3_IRQHandler        /* 61:46 Timer16-s3 */
+    def_irq_default_handler I2CM1_IRQHandler          /* 62:47 I2C Master 1 */
+
+    .end
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/MAX32600.icf b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/MAX32600.icf
new file mode 100644
index 0000000000..2b90dc973d
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/MAX32600.icf
@@ -0,0 +1,29 @@
+/* [ROM] */
+define symbol __intvec_start__        = 0x0;
+define symbol __region_ROM_start__    = 0x0;
+define symbol __region_ROM_end__      = 0x0003FFFF;
+
+/* [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = 316 bytes (0x13C) */
+define symbol __NVIC_start__          = 0x00000000;
+define symbol __NVIC_end__            = 0x00000140; /* to be aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x20000000;
+define symbol __region_RAM_end__      = 0x20007FFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __region_ROM_start__   to __region_ROM_end__];
+define region RAM_region      = mem:[from __region_RAM_start__   to __region_RAM_end__];
+
+/* Stack and Heap */
+define symbol __size_cstack__ = 0x800;
+define symbol __size_heap__   = 0x800;
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__intvec_start__ { readonly section .intvec };
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/startup_MAX32600.s b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/startup_MAX32600.s
new file mode 100644
index 0000000000..740a9150b0
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/TOOLCHAIN_IAR/startup_MAX32600.s
@@ -0,0 +1,383 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+                MODULE  ?cstartup
+
+                ;; Forward declaration of sections.
+                SECTION CSTACK:DATA:NOROOT(3)
+
+                SECTION .intvec:CODE:NOROOT(2)
+
+                EXTERN  __iar_program_start
+                EXTERN  SystemInit
+                PUBLIC  __vector_table
+
+                DATA
+__vector_table  DCD     sfe(CSTACK)               /* Top of Stack */
+                DCD     Reset_Handler             /* Reset Handler */
+                DCD     NMI_Handler               /* NMI Handler */
+                DCD     HardFault_Handler         /* Hard Fault Handler */
+                DCD     DefaultIRQ_Handler        /* MPU Fault Handler */
+                DCD     DefaultIRQ_Handler        /* Bus Fault Handler */
+                DCD     DefaultIRQ_Handler        /* Usage Fault Handler */
+                DCD     0                         /* Reserved */
+                DCD     0                         /* Reserved */
+                DCD     0                         /* Reserved */
+                DCD     0                         /* Reserved */
+                DCD     DefaultIRQ_Handler        /* SVCall Handler */
+                DCD     DebugMon_Handler          /* Debug Monitor Handler */
+                DCD     0                         /* Reserved */
+                DCD     DefaultIRQ_Handler        /* PendSV Handler */
+                DCD     SysTick_IRQHandler        /* SysTick Handler */
+
+                /* Maxim 32600 Externals interrupts */
+                DCD     UART0_IRQHandler          /* 16: 1 UART0 */
+                DCD     UART1_IRQHandler          /* 17: 2 UART1 */
+                DCD     I2CM0_IRQHandler          /* 18: 3 I2C Master 0 */
+                DCD     I2CS_IRQHandler           /* 19: 4 I2C Slave */
+                DCD     USB_IRQHandler            /* 20: 5 USB */
+                DCD     PMU_IRQHandler            /* 21: 6 DMA */
+                DCD     AFE_IRQHandler            /* 22: 7 AFE */
+                DCD     MAA_IRQHandler            /* 23: 8 MAA */
+                DCD     AES_IRQHandler            /* 24: 9 AES */
+                DCD     SPI0_IRQHandler           /* 25:10 SPI0 */
+                DCD     SPI1_IRQHandler           /* 26:11 SPI1 */
+                DCD     SPI2_IRQHandler           /* 27:12 SPI2 */
+                DCD     TMR0_IRQHandler           /* 28:13 Timer32-0 */
+                DCD     TMR1_IRQHandler           /* 29:14 Timer32-1 */
+                DCD     TMR2_IRQHandler           /* 30:15 Timer32-1 */
+                DCD     TMR3_IRQHandler           /* 31:16 Timer32-2 */
+                DCD     RSVD0_IRQHandler          /* 32:17 RSVD */
+                DCD     RSVD1_IRQHandler          /* 33:18 RSVD */
+                DCD     DAC0_IRQHandler           /* 34:19 DAC0  (12-bit DAC) */  
+                DCD     DAC1_IRQHandler           /* 35:20 DAC1  (12-bit DAC) */  
+                DCD     DAC2_IRQHandler           /* 36:21 DAC2  (8-bit DAC) */
+                DCD     DAC3_IRQHandler           /* 37:22 DAC3  (8-bit DAC) */
+                DCD     ADC_IRQHandler            /* 38:23 ADC */
+                DCD     FLC_IRQHandler            /* 39:24 Flash Controller */
+                DCD     PWRMAN_IRQHandler         /* 40:25 PWRMAN */
+                DCD     CLKMAN_IRQHandler         /* 41:26 CLKMAN */
+                DCD     RTC0_IRQHandler           /* 42:27 RTC INT0 */
+                DCD     RTC1_IRQHandler           /* 43:28 RTC INT1 */
+                DCD     RTC2_IRQHandler           /* 44:29 RTC INT2 */
+                DCD     RTC3_IRQHandler           /* 45:30 RTC INT3 */
+                DCD     WDT0_IRQHandler           /* 46:31 WATCHDOG0 */
+                DCD     WDT0_P_IRQHandler         /* 47:32 WATCHDOG0 PRE-WINDOW */
+                DCD     WDT1_IRQHandler           /* 48:33 WATCHDOG1 */
+                DCD     WDT1_P_IRQHandler         /* 49:34 WATCHDOG1 PRE-WINDOW */
+                DCD     GPIO_P0_IRQHandler        /* 50:35 GPIO Port 0  */
+                DCD     GPIO_P1_IRQHandler        /* 51:36 GPIO Port 1  */
+                DCD     GPIO_P2_IRQHandler        /* 52:37 GPIO Port 2  */
+                DCD     GPIO_P3_IRQHandler        /* 53:38 GPIO Port 3  */
+                DCD     GPIO_P4_IRQHandler        /* 54:39 GPIO Port 4  */
+                DCD     GPIO_P5_IRQHandler        /* 55:40 GPIO Port 5  */
+                DCD     GPIO_P6_IRQHandler        /* 56:41 GPIO Port 6  */
+                DCD     GPIO_P7_IRQHandler        /* 57:42 GPIO Port 7  */
+                DCD     TMR16_0_IRQHandler        /* 58:43 Timer16-s0 */
+                DCD     TMR16_1_IRQHandler        /* 59:44 Timer16-s1 */
+                DCD     TMR16_2_IRQHandler        /* 60:45 Timer16-s2 */
+                DCD     TMR16_3_IRQHandler        /* 61:46 Timer16-s3 */
+                DCD     I2CM1_IRQHandler          /* 62:47 I2C Master 1 */
+
+                THUMB
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+                PUBWEAK Reset_Handler
+                SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__iar_program_start
+                BX      R0
+	
+                PUBWEAK NMI_Handler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+                B       NMI_Handler
+
+                PUBWEAK HardFault_Handler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+                B       HardFault_Handler
+
+                PUBWEAK DefaultIRQ_Handler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DefaultIRQ_Handler
+                B       DefaultIRQ_Handler
+                   
+                PUBWEAK DebugMon_Handler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+                B       DebugMon_Handler
+
+                PUBWEAK SysTick_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_IRQHandler
+                B       SysTick_IRQHandler
+      
+                PUBWEAK UART0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+UART0_IRQHandler
+                B       UART0_IRQHandler
+    
+                PUBWEAK UART1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+UART1_IRQHandler
+                B       UART1_IRQHandler
+    
+                PUBWEAK I2CM0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+I2CM0_IRQHandler
+                B       I2CM0_IRQHandler
+    
+                PUBWEAK I2CS_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+I2CS_IRQHandler
+                B       I2CS_IRQHandler
+     
+                PUBWEAK USB_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+USB_IRQHandler
+                B       USB_IRQHandler
+      
+                PUBWEAK PMU_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+PMU_IRQHandler
+                B       PMU_IRQHandler
+      
+                PUBWEAK AFE_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+AFE_IRQHandler
+                B       AFE_IRQHandler
+      
+                PUBWEAK MAA_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+MAA_IRQHandler
+                B       MAA_IRQHandler
+      
+                PUBWEAK AES_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+AES_IRQHandler
+                B       AES_IRQHandler
+      
+                PUBWEAK SPI0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+SPI0_IRQHandler
+                B       SPI0_IRQHandler
+     
+                PUBWEAK SPI1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+SPI1_IRQHandler
+                B       SPI1_IRQHandler
+     
+                PUBWEAK SPI2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+SPI2_IRQHandler
+                B       SPI2_IRQHandler
+     
+                PUBWEAK TMR0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR0_IRQHandler
+                B       TMR0_IRQHandler
+     
+                PUBWEAK TMR1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR1_IRQHandler
+                B       TMR1_IRQHandler
+     
+                PUBWEAK TMR2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR2_IRQHandler
+                B       TMR2_IRQHandler
+     
+                PUBWEAK TMR3_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR3_IRQHandler
+                B       TMR3_IRQHandler
+     
+                PUBWEAK RSVD0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RSVD0_IRQHandler
+                B       RSVD0_IRQHandler
+    
+                PUBWEAK RSVD1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RSVD1_IRQHandler
+                B       RSVD1_IRQHandler
+    
+                PUBWEAK DAC0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DAC0_IRQHandler
+                B       DAC0_IRQHandler
+     
+                PUBWEAK DAC1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DAC1_IRQHandler
+                B       DAC1_IRQHandler
+     
+                PUBWEAK DAC2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DAC2_IRQHandler
+                B       DAC2_IRQHandler
+     
+                PUBWEAK DAC3_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+DAC3_IRQHandler
+                B       DAC3_IRQHandler
+     
+                PUBWEAK ADC_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+ADC_IRQHandler
+                B       ADC_IRQHandler
+      
+                PUBWEAK FLC_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+FLC_IRQHandler
+                B       FLC_IRQHandler
+    
+                PUBWEAK PWRMAN_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+PWRMAN_IRQHandler
+                B       PWRMAN_IRQHandler
+ 
+                PUBWEAK CLKMAN_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+CLKMAN_IRQHandler
+                B       CLKMAN_IRQHandler
+ 
+                PUBWEAK RTC0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RTC0_IRQHandler
+                B       RTC0_IRQHandler
+   
+                PUBWEAK RTC1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RTC1_IRQHandler
+                B       RTC1_IRQHandler
+   
+                PUBWEAK RTC2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RTC2_IRQHandler
+                B       RTC2_IRQHandler
+   
+                PUBWEAK RTC3_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+RTC3_IRQHandler
+                B       RTC3_IRQHandler
+   
+                PUBWEAK WDT0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+WDT0_IRQHandler
+                B       WDT0_IRQHandler
+   
+                PUBWEAK WDT0_P_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+WDT0_P_IRQHandler
+                B       WDT0_P_IRQHandler
+ 
+                PUBWEAK WDT1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+WDT1_IRQHandler
+                B       WDT1_IRQHandler
+   
+                PUBWEAK WDT1_P_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+WDT1_P_IRQHandler
+                B       WDT1_P_IRQHandler
+ 
+                PUBWEAK GPIO_P0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P0_IRQHandler
+                B       GPIO_P0_IRQHandler
+
+                PUBWEAK GPIO_P1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P1_IRQHandler
+                B       GPIO_P1_IRQHandler
+
+                PUBWEAK GPIO_P2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P2_IRQHandler
+                B       GPIO_P2_IRQHandler
+
+                PUBWEAK GPIO_P3_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P3_IRQHandler
+                B       GPIO_P3_IRQHandler
+
+                PUBWEAK GPIO_P4_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P4_IRQHandler
+                B       GPIO_P4_IRQHandler
+
+                PUBWEAK GPIO_P5_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P5_IRQHandler
+                B       GPIO_P5_IRQHandler
+
+                PUBWEAK GPIO_P6_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P6_IRQHandler
+                B       GPIO_P6_IRQHandler
+
+                PUBWEAK GPIO_P7_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+GPIO_P7_IRQHandler
+                B       GPIO_P7_IRQHandler
+
+                PUBWEAK TMR16_0_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR16_0_IRQHandler
+                B       TMR16_0_IRQHandler
+
+                PUBWEAK TMR16_1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR16_1_IRQHandler
+                B       TMR16_1_IRQHandler
+
+                PUBWEAK TMR16_2_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR16_2_IRQHandler
+                B       TMR16_2_IRQHandler
+
+                PUBWEAK TMR16_3_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+TMR16_3_IRQHandler
+                B       TMR16_3_IRQHandler
+
+                PUBWEAK I2CM1_IRQHandler
+                SECTION .text:CODE:REORDER:NOROOT(1)
+I2CM1_IRQHandler
+                B       I2CM1_IRQHandler  
+	
+                END
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/adc_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/adc_regs.h
new file mode 100644
index 0000000000..4e4d5299c2
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/adc_regs.h
@@ -0,0 +1,466 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_ADC_REGS_H
+#define _MXC_ADC_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  adc_regs.h
+ * @addtogroup adc ADC
+ * @{
+ */
+
+/**
+ * @brief Defines ADC Modes.
+ */
+typedef enum {
+    /** Single Mode Full Rate */
+    MXC_E_ADC_MODE_SMPLCNT_FULL_RATE = 0,
+    /** Single Mode Low Power */
+    MXC_E_ADC_MODE_SMPLCNT_LOW_POWER = 1,
+    /** Continuous Mode Full Rate */
+    MXC_E_ADC_MODE_CONTINUOUS_FULL_RATE = 2,
+    /** Continuous Mode Low Power */
+    MXC_E_ADC_MODE_CONTINUOUS_LOW_POWER = 3,
+    /** Single Mode Full Rate with Scan Enabled */
+    MXC_E_ADC_MODE_SMPLCNT_SCAN_FULL_RATE = 8,
+    /** Single Mode Low Power with Scan Enabled */
+    MXC_E_ADC_MODE_SMPLCNT_SCAN_LOW_POWER = 9,
+    /** Continuous Mode Full Rate with Scan Enabled */
+    MXC_E_ADC_MODE_CONTINUOUS_SCAN_FULL_RATE = 10,
+    /** Continuous Mode Low Power with Scan Enabled */
+    MXC_E_ADC_MODE_CONTINUOUS_SCAN_LOW_POWER = 11
+} mxc_adc_mode_t;
+
+/**
+ * @brief Defines ADC Range Control.
+ */
+typedef enum {
+    /** Bi-polar Operation (-Vref/2 -> Vref/2) */
+    MXC_E_ADC_RANGE_HALF = 0,
+    /** Bi-polar Operation (-Vref -> Vref) */
+    MXC_E_ADC_RANGE_FULL
+} mxc_adc_range_t;
+
+/**
+ * @brief Defines ADC Bipolar operation.
+ */
+typedef enum {
+    /** Uni-polar operation (0 -> Vref) */
+    MXC_E_ADC_BI_POL_UNIPOLAR = 0,
+    /** Bi-polar operation see ADC Range Control */
+    MXC_E_ADC_BI_POL_BIPOLAR
+} mxc_adc_bi_pol_t;
+
+/**
+ * @brief Defines Decimation Filter Modes.
+ */
+typedef enum {
+    /** Decimation Filter ByPassed */
+    MXC_E_ADC_AVG_MODE_FILTER_BYPASS = 0,
+    /** Output Average Only*/
+    MXC_E_ADC_AVG_MODE_FILTER_OUTPUT,
+    /** Output Average and Raw Data (Test Mode Only) */
+    MXC_E_ADC_AVG_MODE_FILTER_OUTPUT_RAW
+} mxc_adc_avg_mode_t;
+
+/**
+ * @brief Defines ADC StartMode Modes.
+ */
+typedef enum {
+    /** StarMode via Software */
+    MXC_E_ADC_STRT_MODE_SOFTWARE = 0,
+    /** StarMode via PulseTrain */
+    MXC_E_ADC_STRT_MODE_PULSETRAIN
+} mxc_adc_strt_mode_t;
+
+/**
+ * @brief Defines Mux Channel Select for the Positive Input to the ADC.
+ */
+typedef enum {
+    /** Single Mode Input AIN0+; Diff Mode AIN0+/AIN8-  */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN0 = 0,
+    /** Single Mode Input AIN1+; Diff Mode AIN1+/AIN9-  */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN1 = 1,
+    /** Single Mode Input AIN2+; Diff Mode AIN2+/AIN10- */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN2 = 2,
+    /** Single Mode Input AIN3+; Diff Mode AIN3+/AIN11- */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN3 = 3,
+    /** Single Mode Input AIN4+; Diff Mode AIN4+/AIN12- */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN4 = 4,
+    /** Single Mode Input AIN5+; Diff Mode AIN5+/AIN13-  */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN5 = 5,
+    /** Single Mode Input AIN6+; Diff Mode AIN6+/AIN14-  */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN6 = 6,
+    /** Single Mode Input AIN7+; Diff Mode AIN7+/AIN15-  */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN7 = 7,
+    /** Single Mode Input AIN8+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN8 = 8,
+    /** Single Mode Input AIN9+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN9 = 9,
+    /** Single Mode Input AIN10+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN10 = 10,
+    /** Single Mode Input AIN11+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN11 = 11,
+    /** Single Mode Input AIN12+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN12 = 12,
+    /** Single Mode Input AIN13+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN13 = 13,
+    /** Single Mode Input AIN14+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN14 = 14,
+    /** Single Mode Input AIN15+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN15 = 15,
+    /** Positive Input VSSADC */
+    MXC_E_ADC_PGA_MUX_CH_SEL_VSSADC = 16,
+    /** Positive Input TMON_R */
+    MXC_E_ADC_PGA_MUX_CH_SEL_TMON_R = 17,
+    /** Positive Input VDDA/4 */
+    MXC_E_ADC_PGA_MUX_CH_SEL_VDDA4 = 18,
+    /** Positive Input PWRMAN_TST */
+    MXC_E_ADC_PGA_MUX_CH_SEL_PWRMON_TST = 19,
+    /** Positive Input Ain0Div */
+    MXC_E_ADC_PGA_MUX_CH_SEL_AIN0DIV = 20,
+    /** Positive Input OpAmp OUTA */
+    MXC_E_ADC_PGA_MUX_CH_SEL_OUTA = 32,
+    /** Positive Input OpAmp OUTB */
+    MXC_E_ADC_PGA_MUX_CH_SEL_OUTB = 33,
+    /** Positive Input OpAmp OUTC */
+    MXC_E_ADC_PGA_MUX_CH_SEL_OUTC = 34,
+    /** Positive Input OpAmp OUTD */
+    MXC_E_ADC_PGA_MUX_CH_SEL_OUTD = 35,
+    /** Positive INA+ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_INAPLUS = 36,
+    /** Positive SNO_or */
+    MXC_E_ADC_PGA_MUX_CH_SEL_SNO_OR = 37,
+    /** Positive SCM_or */
+    MXC_E_ADC_PGA_MUX_CH_SEL_SCM_OR = 38,
+    /** Positive TPROBE_sense */
+    MXC_E_ADC_PGA_MUX_CH_SEL_TPROBE_SENSE = 48,
+    /** Positive VREFDAC */
+    MXC_E_ADC_PGA_MUX_CH_SEL_VREFDAC = 49,
+    /** Positive VREFADJ */
+    MXC_E_ADC_PGA_MUX_CH_SEL_VREFADJ = 50,
+    /** Positive Vdd3xtal */
+    MXC_E_ADC_PGA_MUX_CH_SEL_VDD3XTAL = 51
+} mxc_adc_pga_mux_ch_sel_t;
+
+/**
+ * @brief Decoded with the MUX Channel Select to enable Differential Mode Input to the ADC.
+ */
+typedef enum {
+    /** Differential Mode Disabled */
+    MXC_E_ADC_PGA_MUX_DIFF_DISABLE = 0,
+    /** Differential Mode Enabled */
+    MXC_E_ADC_PGA_MUX_DIFF_ENABLE
+} mxc_adc_pga_mux_diff_t;
+
+/**
+ * @brief Defines the PGA Gain Options.
+ */
+typedef enum {
+    /** PGA Gain = 1 */
+    MXC_E_ADC_PGA_GAIN_1 = 0,
+    /** PGA Gain = 2 */
+    MXC_E_ADC_PGA_GAIN_2,
+    /** PGA Gain = 4 */
+    MXC_E_ADC_PGA_GAIN_4,
+    /** PGA Gain = 8 */
+    MXC_E_ADC_PGA_GAIN_8,
+} mxc_adc_pga_gain_t;
+
+/**
+ * @brief Defines the Switch Control Mode.
+ */
+typedef enum {
+    /** Switch Control Mode = Software */
+    MXC_E_ADC_SPST_SW_CTRL_SOFTWARE = 0,
+    /** Switch Control Mode = Pulse Train */
+    MXC_E_ADC_SPST_SW_CTRL_PULSETRAIN
+} mxc_adc_spst_sw_ctrl_t;
+
+/**
+ * @brief Defines the number of channels to scan when Scan Mode is enabled.
+ */
+typedef enum {
+    /** Number of Channels to Scan = 1 */
+    MXC_E_ADC_SCAN_CNT_1 = 0,
+    /** Number of Channels to Scan = 2 */
+    MXC_E_ADC_SCAN_CNT_2,
+    /** Number of Channels to Scan = 3 */
+    MXC_E_ADC_SCAN_CNT_3,
+    /** Number of Channels to Scan = 4 */
+    MXC_E_ADC_SCAN_CNT_4,
+    /** Number of Channels to Scan = 5 */
+    MXC_E_ADC_SCAN_CNT_5,
+    /** Number of Channels to Scan = 6 */
+    MXC_E_ADC_SCAN_CNT_6,
+    /** Number of Channels to Scan = 7 */
+    MXC_E_ADC_SCAN_CNT_7,
+    /** Number of Channels to Scan = 8 */
+    MXC_E_ADC_SCAN_CNT_8,
+} mxc_adc_scan_cnt_t;
+
+/*                                              Offset   Register Description
+                                                ======   =================================================== */
+typedef struct {
+    __IO uint32_t ctrl0;                    /*  0x0000   ADC Control Register 0                              */
+    __IO uint32_t pga_ctrl;                 /*  0x0004   PGA Control Register                                */
+    __IO uint32_t tg_ctrl0;                 /*  0x0008   ADC Timing Generator Control 0                      */
+    __IO uint32_t tg_ctrl1;                 /*  0x000C   ADC Timing Generator Control 1                      */
+    __IO uint32_t limit;                    /*  0x0010   ADC Limit Settings                                  */
+    __IO uint32_t intr;                     /*  0x0014   ADC Interrupt Flags and Enable/Disable Controls     */
+    __IO uint32_t out;                      /*  0x0018   ADC Output Register                                 */
+} mxc_adc_regs_t;
+
+/*                                              Offset   Register Description
+                                                ======   =================================================== */
+typedef struct {
+    __IO uint32_t ctrl1;                    /*  0x0000   ADC Control Register 1                              */
+    __IO uint32_t scan1;                    /*  0x0004   ADC Auto-Scan Settings 1                            */
+    __IO uint32_t scan2;                    /*  0x0008   ADC Auto-Scan Settings 2                            */
+    __IO uint32_t ro_cal0;                  /*  0x000C   ADC Ring Osc Calibration 0                          */
+    __IO uint32_t ro_cal1;                  /*  0x0010   ADC Ring Osc Calibration 1                          */
+} mxc_adccfg_regs_t;
+
+typedef struct {
+    __IO uint16_t data;                     /*  0x0000   Read to pull sample data from ADC FIFO              */
+} mxc_adc_fifo_regs_t;
+
+/*
+   Register offsets for module ADC, ADCCFG, ADC_FIFO
+*/
+#define MXC_R_ADC_OFFS_CTRL0                      ((uint32_t)0x00000000UL)
+#define MXC_R_ADC_OFFS_PGA_CTRL                   ((uint32_t)0x00000004UL)
+#define MXC_R_ADC_OFFS_TG_CTRL0                   ((uint32_t)0x00000008UL)
+#define MXC_R_ADC_OFFS_TG_CTRL1                   ((uint32_t)0x0000000CUL)
+#define MXC_R_ADC_OFFS_LIMIT                      ((uint32_t)0x00000010UL)
+#define MXC_R_ADC_OFFS_INTR                       ((uint32_t)0x00000014UL)
+#define MXC_R_ADC_OFFS_OUT                        ((uint32_t)0x00000018UL)
+
+#define MXC_R_ADCCFG_OFFS_CTRL1                   ((uint32_t)0x00000000UL)
+#define MXC_R_ADCCFG_OFFS_SCAN1                   ((uint32_t)0x00000004UL)
+#define MXC_R_ADCCFG_OFFS_SCAN2                   ((uint32_t)0x00000008UL)
+#define MXC_R_ADCCFG_OFFS_RO_CAL0                 ((uint32_t)0x0000000CUL)
+#define MXC_R_ADCCFG_OFFS_RO_CAL1                 ((uint32_t)0x00000010UL)
+#define MXC_R_ADC_FIFO_OFFS_DATA                  ((uint32_t)0x00000000UL)
+
+/*
+   Field positions and masks for module ADC.
+*/
+#define MXC_F_ADC_CTRL0_ADC_WAKE_CNT_POS                    0
+#define MXC_F_ADC_CTRL0_ADC_WAKE_CNT                        ((uint32_t)(0x0000000FUL << MXC_F_ADC_CTRL0_ADC_WAKE_CNT_POS))
+#define MXC_F_ADC_CTRL0_ADC_STRT_MODE_POS                   5
+#define MXC_F_ADC_CTRL0_ADC_STRT_MODE                       ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_STRT_MODE_POS))
+#define MXC_F_ADC_CTRL0_ADC_RANGE_POS                       6
+#define MXC_F_ADC_CTRL0_ADC_RANGE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_RANGE_POS))
+#define MXC_F_ADC_CTRL0_ADC_BI_POL_POS                      7
+#define MXC_F_ADC_CTRL0_ADC_BI_POL                          ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_BI_POL_POS))
+#define MXC_F_ADC_CTRL0_ADC_DV_REG_POS                      8
+#define MXC_F_ADC_CTRL0_ADC_DV_REG                          ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_DV_REG_POS))
+#define MXC_F_ADC_CTRL0_ADC_DV_POS                          9
+#define MXC_F_ADC_CTRL0_ADC_DV                              ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_DV_POS))
+#define MXC_F_ADC_CTRL0_ADC_LMT_DMODE_POS                   10
+#define MXC_F_ADC_CTRL0_ADC_LMT_DMODE                       ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_LMT_DMODE_POS))
+#define MXC_F_ADC_CTRL0_ADC_SMP_EXT_POS                     11
+#define MXC_F_ADC_CTRL0_ADC_SMP_EXT                         ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_SMP_EXT_POS))
+#define MXC_F_ADC_CTRL0_ADC_CLK_EN_POS                      12
+#define MXC_F_ADC_CTRL0_ADC_CLK_EN                          ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_CLK_EN_POS))
+#define MXC_F_ADC_CTRL0_CPU_ADC_RST_POS                     13
+#define MXC_F_ADC_CTRL0_CPU_ADC_RST                         ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_RST_POS))
+#define MXC_F_ADC_CTRL0_CPU_ADC_START_POS                   14
+#define MXC_F_ADC_CTRL0_CPU_ADC_START                       ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_START_POS))
+#define MXC_F_ADC_CTRL0_CPU_ADC_EN_POS                      15
+#define MXC_F_ADC_CTRL0_CPU_ADC_EN                          ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_EN_POS))
+#define MXC_F_ADC_CTRL0_ADC_FIFO_FULL_POS                   18
+#define MXC_F_ADC_CTRL0_ADC_FIFO_FULL                       ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_FIFO_FULL_POS))
+#define MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY_POS                  19
+#define MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY_POS))
+#define MXC_F_ADC_CTRL0_AVG_MODE_POS                        20
+#define MXC_F_ADC_CTRL0_AVG_MODE                            ((uint32_t)(0x00000003UL << MXC_F_ADC_CTRL0_AVG_MODE_POS))
+#define MXC_F_ADC_CTRL0_CPU_DAC_START_POS                   22
+#define MXC_F_ADC_CTRL0_CPU_DAC_START                       ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_DAC_START_POS))
+#define MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS                    24
+#define MXC_F_ADC_CTRL0_ADC_CLK_MODE                        ((uint32_t)(0x00000007UL << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS))
+#define MXC_F_ADC_CTRL0_ADC_MODE_POS                        28
+#define MXC_F_ADC_CTRL0_ADC_MODE                            ((uint32_t)(0x0000000FUL << MXC_F_ADC_CTRL0_ADC_MODE_POS))
+
+#define MXC_F_ADC_PGA_CTRL_PGA_GAIN_POS                     0
+#define MXC_F_ADC_PGA_CTRL_PGA_GAIN                         ((uint32_t)(0x00000003UL << MXC_F_ADC_PGA_CTRL_PGA_GAIN_POS))
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN_POS           2
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN               ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN_POS))
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_POS                  3
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST                      ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_POS))
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY_POS            4
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY                ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY_POS))
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_POS                  5
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK                      ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_POS))
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS_POS               6
+#define MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS                   ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS_POS))
+#define MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT_POS                 8
+#define MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT                     ((uint32_t)(0x0000001FUL << MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT_POS))
+#define MXC_F_ADC_PGA_CTRL_MUX_SW_AIN_POS                   13
+#define MXC_F_ADC_PGA_CTRL_MUX_SW_AIN                       ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_SW_AIN_POS))
+#define MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS                     14
+#define MXC_F_ADC_PGA_CTRL_MUX_DIFF                         ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS))
+#define MXC_F_ADC_PGA_CTRL_MUX_MODE_POS                     15
+#define MXC_F_ADC_PGA_CTRL_MUX_MODE                         ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_MODE_POS))
+#define MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT_POS              20
+#define MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT                  ((uint32_t)(0x0000000FUL << MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT_POS))
+#define MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS                   24
+#define MXC_F_ADC_PGA_CTRL_MUX_CH_SEL                       ((uint32_t)(0x0000003FUL << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS))
+
+#define MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT_POS                  0
+#define MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT                      ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT_POS))
+#define MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS                 16
+#define MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT                     ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS))
+
+#define MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS                  0
+#define MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT                      ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS))
+#define MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT_POS                  4
+#define MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT                      ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT_POS))
+#define MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT_POS                 8
+#define MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT                     ((uint32_t)(0x00000007UL << MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT_POS))
+#define MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS                  12
+#define MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT                      ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS))
+#define MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS                  16
+#define MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT                      ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS))
+
+#define MXC_F_ADC_LIMIT_LO_LIMIT_POS                        0
+#define MXC_F_ADC_LIMIT_LO_LIMIT                            ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_LIMIT_LO_LIMIT_POS))
+#define MXC_F_ADC_LIMIT_HI_LIMIT_POS                        16
+#define MXC_F_ADC_LIMIT_HI_LIMIT                            ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_LIMIT_HI_LIMIT_POS))
+
+#define MXC_F_ADC_INTR_FIFO_AF_POS                          6
+#define MXC_F_ADC_INTR_FIFO_AF                              ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_AF_POS))
+#define MXC_F_ADC_INTR_OUT_RNG_IF_POS                       7
+#define MXC_F_ADC_INTR_OUT_RNG_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_OUT_RNG_IF_POS))
+#define MXC_F_ADC_INTR_HI_RNG_IF_POS                        8
+#define MXC_F_ADC_INTR_HI_RNG_IF                            ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_HI_RNG_IF_POS))
+#define MXC_F_ADC_INTR_LO_RNG_IF_POS                        9
+#define MXC_F_ADC_INTR_LO_RNG_IF                            ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_LO_RNG_IF_POS))
+#define MXC_F_ADC_INTR_DONE_IF_POS                          10
+#define MXC_F_ADC_INTR_DONE_IF                              ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_DONE_IF_POS))
+#define MXC_F_ADC_INTR_FIFO_UF_IF_POS                       11
+#define MXC_F_ADC_INTR_FIFO_UF_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_UF_IF_POS))
+#define MXC_F_ADC_INTR_FIFO_OF_IF_POS                       12
+#define MXC_F_ADC_INTR_FIFO_OF_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_OF_IF_POS))
+#define MXC_F_ADC_INTR_FIFO_3Q_IF_POS                       13
+#define MXC_F_ADC_INTR_FIFO_3Q_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_3Q_IF_POS))
+#define MXC_F_ADC_INTR_FIFO_2Q_IF_POS                       14
+#define MXC_F_ADC_INTR_FIFO_2Q_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_2Q_IF_POS))
+#define MXC_F_ADC_INTR_FIFO_1Q_IF_POS                       15
+#define MXC_F_ADC_INTR_FIFO_1Q_IF                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_1Q_IF_POS))
+#define MXC_F_ADC_INTR_SPST0_CTRL_MODE_POS                  16
+#define MXC_F_ADC_INTR_SPST0_CTRL_MODE                      ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST0_CTRL_MODE_POS))
+#define MXC_F_ADC_INTR_SPST1_CTRL_MODE_POS                  17
+#define MXC_F_ADC_INTR_SPST1_CTRL_MODE                      ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST1_CTRL_MODE_POS))
+#define MXC_F_ADC_INTR_SPST2_CTRL_MODE_POS                  18
+#define MXC_F_ADC_INTR_SPST2_CTRL_MODE                      ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST2_CTRL_MODE_POS))
+#define MXC_F_ADC_INTR_SPST3_CTRL_MODE_POS                  19
+#define MXC_F_ADC_INTR_SPST3_CTRL_MODE                      ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST3_CTRL_MODE_POS))
+#define MXC_F_ADC_INTR_OUT_RNG_IE_POS                       23
+#define MXC_F_ADC_INTR_OUT_RNG_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_OUT_RNG_IE_POS))
+#define MXC_F_ADC_INTR_HI_RNG_IE_POS                        24
+#define MXC_F_ADC_INTR_HI_RNG_IE                            ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_HI_RNG_IE_POS))
+#define MXC_F_ADC_INTR_LO_RNG_IE_POS                        25
+#define MXC_F_ADC_INTR_LO_RNG_IE                            ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_LO_RNG_IE_POS))
+#define MXC_F_ADC_INTR_DONE_IE_POS                          26
+#define MXC_F_ADC_INTR_DONE_IE                              ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_DONE_IE_POS))
+#define MXC_F_ADC_INTR_FIFO_UF_IE_POS                       27
+#define MXC_F_ADC_INTR_FIFO_UF_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_UF_IE_POS))
+#define MXC_F_ADC_INTR_FIFO_OF_IE_POS                       28
+#define MXC_F_ADC_INTR_FIFO_OF_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_OF_IE_POS))
+#define MXC_F_ADC_INTR_FIFO_3Q_IE_POS                       29
+#define MXC_F_ADC_INTR_FIFO_3Q_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_3Q_IE_POS))
+#define MXC_F_ADC_INTR_FIFO_2Q_IE_POS                       30
+#define MXC_F_ADC_INTR_FIFO_2Q_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_2Q_IE_POS))
+#define MXC_F_ADC_INTR_FIFO_1Q_IE_POS                       31
+#define MXC_F_ADC_INTR_FIFO_1Q_IE                           ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_1Q_IE_POS))
+
+#define MXC_F_ADC_OUT_DATA_REG_POS                          0
+#define MXC_F_ADC_OUT_DATA_REG                              ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_OUT_DATA_REG_POS))
+
+#define MXC_F_ADC_CTRL1_ADC_SCAN_CNT_POS                    16
+#define MXC_F_ADC_CTRL1_ADC_SCAN_CNT                        ((uint32_t)(0x00000007UL << MXC_F_ADC_CTRL1_ADC_SCAN_CNT_POS))
+
+#define MXC_F_ADC_SCAN1_ADC_SCAN0_POS                       0
+#define MXC_F_ADC_SCAN1_ADC_SCAN0                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN0_POS))
+#define MXC_F_ADC_SCAN1_ADC_SCAN1_POS                       8
+#define MXC_F_ADC_SCAN1_ADC_SCAN1                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN1_POS))
+#define MXC_F_ADC_SCAN1_ADC_SCAN2_POS                       16
+#define MXC_F_ADC_SCAN1_ADC_SCAN2                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN2_POS))
+#define MXC_F_ADC_SCAN1_ADC_SCAN3_POS                       24
+#define MXC_F_ADC_SCAN1_ADC_SCAN3                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN3_POS))
+
+#define MXC_F_ADC_SCAN2_ADC_SCAN4_POS                       0
+#define MXC_F_ADC_SCAN2_ADC_SCAN4                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN4_POS))
+#define MXC_F_ADC_SCAN2_ADC_SCAN5_POS                       8
+#define MXC_F_ADC_SCAN2_ADC_SCAN5                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN5_POS))
+#define MXC_F_ADC_SCAN2_ADC_SCAN6_POS                       16
+#define MXC_F_ADC_SCAN2_ADC_SCAN6                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN6_POS))
+#define MXC_F_ADC_SCAN2_ADC_SCAN7_POS                       24
+#define MXC_F_ADC_SCAN2_ADC_SCAN7                           ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN7_POS))
+
+#define MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS                     0
+#define MXC_F_ADC_RO_CAL0_RO_CAL_EN                         ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS))
+#define MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS                    1
+#define MXC_F_ADC_RO_CAL0_RO_CAL_RUN                        ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS))
+#define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS                   2
+#define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD                       ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS))
+#define MXC_F_ADC_RO_CAL0_TRM_MU_POS                        8
+#define MXC_F_ADC_RO_CAL0_TRM_MU                            ((uint32_t)(0x00000FFFUL << MXC_F_ADC_RO_CAL0_TRM_MU_POS))
+#define MXC_F_ADC_RO_CAL0_RO_TRM_POS                        23
+#define MXC_F_ADC_RO_CAL0_RO_TRM                            ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL0_RO_TRM_POS))
+
+#define MXC_F_ADC_RO_CAL1_TRM_INIT_POS                      0
+#define MXC_F_ADC_RO_CAL1_TRM_INIT                          ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_INIT_POS))
+#define MXC_F_ADC_RO_CAL1_TRM_MIN_POS                       10
+#define MXC_F_ADC_RO_CAL1_TRM_MIN                           ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MIN_POS))
+#define MXC_F_ADC_RO_CAL1_TRM_MAX_POS                       20
+#define MXC_F_ADC_RO_CAL1_TRM_MAX                           ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MAX_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* _MXC_ADC_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/aes_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/aes_regs.h
new file mode 100644
index 0000000000..cf9995be40
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/aes_regs.h
@@ -0,0 +1,159 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_AES_REGS_H_
+#define _MXC_AES_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  aes_regs.h
+ * @addtogroup aes AES
+ * @{
+ */
+
+/**
+ * @brief  Settings for AES_CTRL.CRYPT_MODE 
+ */
+typedef enum {
+    MXC_E_AES_CTRL_ENCRYPT_MODE = 0,
+    MXC_E_AES_CTRL_DECRYPT_MODE = 1
+} mxc_aes_ctrl_crypt_mode_t;
+
+/**
+ * @brief Settings for AES_CTRL.EXP_KEY_MODE 
+ */
+typedef enum {
+    MXC_E_AES_CTRL_CALC_NEW_EXP_KEY = 0,
+    MXC_E_AES_CTRL_USE_LAST_EXP_KEY = 1
+} mxc_aes_ctrl_exp_key_mode_t;
+
+/**
+ * @brief Settings for AES_CTRL.KEY_SIZE 
+ */
+typedef enum {
+    MXC_E_AES_CTRL_KEY_SIZE_128 = 0,
+    MXC_E_AES_CTRL_KEY_SIZE_192 = 1,
+    MXC_E_AES_CTRL_KEY_SIZE_256 = 2
+} mxc_aes_ctrl_key_size_t;
+
+/*                                       Offset   Register Description
+                                         ======   =========================================================== */
+typedef struct {
+    __IO uint32_t ctrl;              /*  0x0000   AES Control and Status                                      */
+    __I uint32_t rsv004;             /*  0x0004                                                               */
+    __IO uint32_t erase_all;         /*  0x0008   Write to Trigger AES Memory Erase                           */
+} mxc_aes_regs_t;
+
+/*                                       Offset   Register Description
+                                         ======   =========================================================== */
+typedef struct {
+    __IO uint32_t inp[4];            /*  0x0000   AES Input 0..3                                              */
+    __IO uint32_t key[8];            /*  0x0010   AES Key 0..7                                                */
+    __IO uint32_t out[4];            /*  0x0030   AES Output 0..3                                             */
+    __IO uint32_t expkey[8];         /*  0x0040   AES Expanded Key Data 0..7                                  */
+} mxc_aes_mem_regs_t;
+
+/*
+   Register offsets for module AES.
+*/
+#define MXC_R_AES_OFFS_CTRL                       ((uint32_t)0x00000000UL)
+#define MXC_R_AES_OFFS_ERASE_ALL                  ((uint32_t)0x00000008UL)
+#define MXC_R_AES_MEM_OFFS_INP0                   ((uint32_t)0x00000000UL)
+#define MXC_R_AES_MEM_OFFS_INP1                   ((uint32_t)0x00000004UL)
+#define MXC_R_AES_MEM_OFFS_INP2                   ((uint32_t)0x00000008UL)
+#define MXC_R_AES_MEM_OFFS_INP3                   ((uint32_t)0x0000000CUL)
+#define MXC_R_AES_MEM_OFFS_KEY0                   ((uint32_t)0x00000010UL)
+#define MXC_R_AES_MEM_OFFS_KEY1                   ((uint32_t)0x00000014UL)
+#define MXC_R_AES_MEM_OFFS_KEY2                   ((uint32_t)0x00000018UL)
+#define MXC_R_AES_MEM_OFFS_KEY3                   ((uint32_t)0x0000001CUL)
+#define MXC_R_AES_MEM_OFFS_KEY4                   ((uint32_t)0x00000020UL)
+#define MXC_R_AES_MEM_OFFS_KEY5                   ((uint32_t)0x00000024UL)
+#define MXC_R_AES_MEM_OFFS_KEY6                   ((uint32_t)0x00000028UL)
+#define MXC_R_AES_MEM_OFFS_KEY7                   ((uint32_t)0x0000002CUL)
+#define MXC_R_AES_MEM_OFFS_OUT0                   ((uint32_t)0x00000030UL)
+#define MXC_R_AES_MEM_OFFS_OUT1                   ((uint32_t)0x00000034UL)
+#define MXC_R_AES_MEM_OFFS_OUT2                   ((uint32_t)0x00000038UL)
+#define MXC_R_AES_MEM_OFFS_OUT3                   ((uint32_t)0x0000003CUL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY0                ((uint32_t)0x00000040UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY1                ((uint32_t)0x00000044UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY2                ((uint32_t)0x00000048UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY3                ((uint32_t)0x0000004CUL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY4                ((uint32_t)0x00000050UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY5                ((uint32_t)0x00000054UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY6                ((uint32_t)0x00000058UL)
+#define MXC_R_AES_MEM_OFFS_EXPKEY7                ((uint32_t)0x0000005CUL)
+
+#define MXC_F_AES_CTRL_START_POS                  0
+#define MXC_F_AES_CTRL_START                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_START_POS))
+#define MXC_F_AES_CTRL_CRYPT_MODE_POS             1
+#define MXC_F_AES_CTRL_CRYPT_MODE                 ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_CRYPT_MODE_POS))
+#define MXC_F_AES_CTRL_EXP_KEY_MODE_POS           2
+#define MXC_F_AES_CTRL_EXP_KEY_MODE               ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
+#define MXC_F_AES_CTRL_KEY_SIZE_POS               3
+#define MXC_F_AES_CTRL_KEY_SIZE                   ((uint32_t)(0x00000003UL << MXC_F_AES_CTRL_KEY_SIZE_POS))
+#define MXC_F_AES_CTRL_INTEN_POS                  5
+#define MXC_F_AES_CTRL_INTEN                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTEN_POS))
+#define MXC_F_AES_CTRL_INTFL_POS                  6
+#define MXC_F_AES_CTRL_INTFL                      ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTFL_POS))
+
+#define MXC_V_AES_CTRL_ENCRYPT_MODE               0
+#define MXC_V_AES_CTRL_DECRYPT_MODE               1
+#define MXC_S_AES_CTRL_ENCRYPT_MODE               ((uint32_t)(MXC_V_AES_CTRL_ENCRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
+#define MXC_S_AES_CTRL_DECRYPT_MODE               ((uint32_t)(MXC_V_AES_CTRL_DECRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
+
+#define MXC_V_AES_CTRL_CALC_NEW_EXP_KEY           0
+#define MXC_V_AES_CTRL_USE_LAST_EXP_KEY           1
+#define MXC_S_AES_CTRL_CALC_NEW_EXP_KEY           ((uint32_t)(MXC_V_AES_CTRL_CALC_NEW_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
+#define MXC_S_AES_CTRL_USE_LAST_EXP_KEY           ((uint32_t)(MXC_V_AES_CTRL_USE_LAST_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
+
+#define MXC_V_AES_CTRL_KEY_SIZE_128               0
+#define MXC_V_AES_CTRL_KEY_SIZE_192               1
+#define MXC_V_AES_CTRL_KEY_SIZE_256               2
+#define MXC_S_AES_CTRL_KEY_SIZE_128               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_128 << MXC_F_AES_CTRL_KEY_SIZE_POS))
+#define MXC_S_AES_CTRL_KEY_SIZE_192               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_192 << MXC_F_AES_CTRL_KEY_SIZE_POS))
+#define MXC_S_AES_CTRL_KEY_SIZE_256               ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_256 << MXC_F_AES_CTRL_KEY_SIZE_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_AES_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h
new file mode 100644
index 0000000000..31a3f7cb80
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h
@@ -0,0 +1,626 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_AFE_REGS_H
+#define _MXC_AFE_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  afe_regs.h
+ * @addtogroup afe AFE
+ * @{
+ */
+
+/**
+ * @brief Defines Configure Options for the LED Ports.
+ */
+typedef enum {
+    /** LED Sink Port 0 with OpAmp A, LED Sink Port 1 with OpAmp C */
+    MXC_E_AFE_LED_CFG_PORT_OPAMP_A_C = 0,
+    /** LED Sink Port 0 with OpAmp B, LED Sink Port 1 with OpAmp D */
+    MXC_E_AFE_LED_CFG_PORT_OPAMP_B_D,
+    /** Disable LED Sink Port 0,Disable LED Sink Port 1 */
+    MXC_E_AFE_LED_CFG_PORT_DISABLED,
+} mxc_afe_led_cfg_port_t;
+
+/**
+ * @brief Setup of Wake Up Detector for LPCs.
+ */
+typedef enum {
+    /** IDLE */
+    MXC_E_AFE_EN_WUD_COMP_IDLE = 0,
+    /** Activate WUD for falling edges */
+    MXC_E_AFE_EN_WUD_COMP_FALLING_EDGE = 2,
+    /** Activate WUD for rising edges */
+    MXC_E_AFE_EN_WUD_COMP_RISING_EDGE = 3
+} mxc_afe_en_wud_comp_t;
+
+/**
+ * @brief LPC InMode.
+ */
+typedef enum {
+    /** InMode: both Nch and Pch */
+    MXC_E_AFE_IN_MODE_COMP_NCH_PCH = 0,
+    /** InMode: only Nch  */
+    MXC_E_AFE_IN_MODE_COMP_NCH,
+    /** InMode: only Pch  */
+    MXC_E_AFE_IN_MODE_COMP_PCH,
+} mxc_afe_in_mode_comp_t;
+
+/**
+ * @brief LPC Bias.
+ */
+typedef enum {
+    /** BIAS 0.52uA Delay 4.0us  */
+    MXC_E_AFE_BIAS_MODE_COMP_0 = 0,
+    /** BIAS 1.4uA Delay 1.7us  */
+    MXC_E_AFE_BIAS_MODE_COMP_1,
+    /** BIAS 2.8uA Delay 1.1us  */
+    MXC_E_AFE_BIAS_MODE_COMP_2,
+    /** BIAS 5.1uA Delay 0.7us  */
+    MXC_E_AFE_BIAS_MODE_COMP_3
+} mxc_afe_bias_mode_comp_t;
+
+/**
+ * @brief TMON Current Value.
+ */
+typedef enum {
+    /** TMON Current 4uA  */
+    MXC_E_AFE_TMON_CURRENT_VAL_0 = 0,
+    /** TMON Current 60uA  */
+    MXC_E_AFE_TMON_CURRENT_VAL_1,
+    /** TMON Current 64uA  */
+    MXC_E_AFE_TMON_CURRENT_VAL_2,
+    /** TMON Current 120uA  */
+    MXC_E_AFE_TMON_CURRENT_VAL_3
+} mxc_afe_tmon_current_t;
+
+/**
+ * @brief REFADC and REFDAC Voltage Select.
+ */
+typedef enum {
+    /** Voltage Reference = 1.024 V */
+    MXC_E_AFE_REF_VOLT_SEL_1024 = 0,
+    /** Voltage Reference = 1.5 V */
+    MXC_E_AFE_REF_VOLT_SEL_1500,
+    /** Voltage Reference = 2.048 V */
+    MXC_E_AFE_REF_VOLT_SEL_2048,
+    /** Voltage Reference = 2.5 V */
+    MXC_E_AFE_REF_VOLT_SEL_2500
+} mxc_afe_ref_volt_sel_t;
+
+/**
+ * @brief Selection for DAC VOltage Reference, REFADC or REFDAC.
+ */
+typedef enum {
+    /** DAC Voltage Reference = REFADC */
+    MXC_E_AFE_DAC_REF_REFADC = 0,
+    /** DAC Voltage Reference = REFDAC */
+    MXC_E_AFE_DAC_REF_REFDAC
+} mxc_afe_dac_ref_t;
+
+/**
+ * @brief Selection for LPC Hysteresis.
+ */
+typedef enum {
+    /** LPC Hysteresis = 0 mV */
+    MXC_E_AFE_HYST_COMP_0 = 0,
+    /** LPC Hysteresis = 7.5 mV */
+    MXC_E_AFE_HYST_COMP_1,
+    /** LPC Hysteresis = 15 mV */
+    MXC_E_AFE_HYST_COMP_2,
+    /** LPC Hysteresis = 30 mV */
+    MXC_E_AFE_HYST_COMP_3
+} mxc_afe_hyst_comp_t;
+
+/**
+ * @brief Selection for MUX for  SCM_or_sel.
+ */
+typedef enum {
+    /** SCM_or = HIZ */
+    MXC_E_AFE_SCM_OR_SEL_HIZ = 0,
+    /** SCM_or = SCM0 */
+    MXC_E_AFE_SCM_OR_SEL_SCM0,
+    /** SCM_or = SCM1 */
+    MXC_E_AFE_SCM_OR_SEL_SCM1,
+    /** SCM_or = SCM2 */
+    MXC_E_AFE_SCM_OR_SEL_SCM2,
+    /** SCM_or = SCM3 */
+    MXC_E_AFE_SCM_OR_SEL_SCM3
+} mxc_afe_scm_or_sel_t;
+
+/**
+ * @brief Selection for MUX for  SNO_or_sel.
+ */
+typedef enum {
+    /** SNO_or = HIZ */
+    MXC_E_AFE_SNO_OR_SEL_HIZ = 0,
+    /** SNO_or = SNO0 */
+    MXC_E_AFE_SNO_OR_SEL_SNO0,
+    /** SNO_or = SNO1 */
+    MXC_E_AFE_SNO_OR_SEL_SNO1,
+    /** SNO_or = SNO2 */
+    MXC_E_AFE_SNO_OR_SEL_SNO2,
+    /** SNO_or = SNO3 */
+    MXC_E_AFE_SNO_OR_SEL_SNO3
+} mxc_afe_sno_or_sel_t;
+
+/**
+ * @brief Selection for MUX  DACx_sel.
+ */
+typedef enum {
+    /** dacx  = DACOP */
+    MXC_E_AFE_DACX_SEL_P = 0,
+    /** dacx  = DACON */
+    MXC_E_AFE_DACX_SEL_N
+} mxc_afe_dacx_sel_t;
+
+/**
+ * @brief Selection for state of Switch.
+ */
+typedef enum {
+    /** Switch is OPEN */
+    MXC_E_AFE_CLOSE_SPST_SWITCH_OPEN = 0,
+    /** Switch is CLOSED */
+    MXC_E_AFE_CLOSE_SPST_SWITCH_CLOSE
+} mxc_afe_close_spst_t;
+
+/**
+ * @brief Switch to Connect Positive Pad to GND.
+ */
+typedef enum {
+    /** Positive Pad GND Switch OPEN */
+    MXC_E_AFE_GND_SEL_OPAMP_SWITCH_OPEN = 0,
+    /** Positive Pad GND Switch CLOSED */
+    MXC_E_AFE_GND_SEL_OPAMP_SWITCH_CLOSED
+} mxc_afe_gnd_sel_opamp_t;
+
+/**
+ * @brief MUX Selection for OpPsel.
+ */
+typedef enum {
+    /** OpPsel = INx+ */
+    MXC_E_AFE_P_IN_SEL_OPAMP_INPLUS = 0,
+    /** OpPsel = DAC_or */
+    MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR,
+    /** OpPsel = SNO_or */
+    MXC_E_AFE_P_IN_SEL_OPAMP_SNO_OR,
+    /** OpPsel = DAC_or also output on INx+ */
+    MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR_AND_INPLUS
+} mxc_afe_p_in_sel_opamp_t;
+
+/**
+ * @brief MUX Selection for OpNsel.
+ */
+typedef enum {
+    /** OpNsel = INx- */
+    MXC_E_AFE_N_IN_SEL_OPAMP_INMINUS = 0,
+    /** OpNsel = OUTx */
+    MXC_E_AFE_N_IN_SEL_OPAMP_OUT,
+    /** OpNsel = SCM_or */
+    MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR,
+    /**OpNsel = SCM_or also output on INx- */
+    MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR_AND_INMINUS,
+} mxc_afe_n_in_sel_opamp_t;
+
+/**
+ * @brief MUX Selection for DAC_sel.
+ */
+typedef enum {
+    /** DAC_or = DAC0 */
+    MXC_E_AFE_DAC_SEL_DAC0 = 0,
+    /** DAC_or = DAC1 */
+    MXC_E_AFE_DAC_SEL_DAC1,
+    /** DAC_or = DAC2P */
+    MXC_E_AFE_DAC_SEL_DAC2P,
+    /** DAC_or = DAC3P */
+    MXC_E_AFE_DAC_SEL_DAC3P
+} mxc_afe_dac_sel_t;
+
+/**
+ * @brief MUX Selection for NPAD_sel.
+ */
+typedef enum {
+    /** NPAD_Sel = HIZ */
+    MXC_E_AFE_NPAD_SEL_HIZ = 0,
+    /** NPAD_Sel = LED Observe Port */
+    MXC_E_AFE_NPAD_SEL_LED_OBS_PORT,
+    /** NPAD_Sel = DAC_or */
+    MXC_E_AFE_NPAD_SEL_DAC_OR,
+    /** NPAD_Sel = DAC_or and LED Observe Port */
+    MXC_E_AFE_NPAD_SEL_DAC_OR_AND_LED_OBS_PORT
+} mxc_afe_npad_sel_t;
+
+/**
+ * @brief MUX Selection for CmpPSel.
+ */
+typedef enum {
+    /** CmpPSel = INx+ */
+    MXC_E_AFE_POS_IN_SEL_COMP_INPLUS = 0,
+    /** CmpPSel = SCM */
+    MXC_E_AFE_POS_IN_SEL_COMP_SCM,
+    /** CmpPSel = dac1 */
+    MXC_E_AFE_POS_IN_SEL_COMP_DAC1,
+    /** CmpPSel = DAC3P */
+    MXC_E_AFE_POS_IN_SEL_COMP_DAC3P,
+    /** CmpPSel = LED Observe Port */
+    MXC_E_AFE_POS_IN_SEL_COMP_LED_OBS_PORT,
+    /** CmpPSel = dac1 also output on INx+ */
+    MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_INPLUS,
+    /** CmpPSel = DAC3P also output on INx+ */
+    MXC_E_AFE_POS_IN_SEL_COMP_DAC3P_AND_INPLUS,
+    /** CmpPSel = dac1 also output on SCM */
+    MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_SCM
+} mxc_afe_pos_in_sel_comp_t;
+
+/**
+ * @brief MUX Selection for CmpNSel.
+ */
+typedef enum {
+    /** CmpNSel = INx- */
+    MXC_E_AFE_NEG_IN_SEL_COMP_INMINUS = 0,
+    /** CmpNSel = SNO */
+    MXC_E_AFE_NEG_IN_SEL_COMP_SNO,
+    /** CmpNSel = dac0 */
+    MXC_E_AFE_NEG_IN_SEL_COMP_DAC0,
+    /** CmpNSel = DAC2P */
+    MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P,
+    /** CmpNSel = LED Observation Port */
+    MXC_E_AFE_NEG_IN_SEL_COMP_LED_OBS_PORT,
+    /** CmpNSel = dac0 also output on INx- */
+    MXC_E_AFE_NEG_IN_SEL_COMP_DAC0_AND_INMINUS,
+    /** CmpNSel = DAC2 also output on INx- */
+    MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_INMINUS,
+    /** CmpNSel = DAC2 also output on SNO */
+    MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_SNO
+} mxc_afe_neg_in_sel_comp_t;
+
+/*                                      Offset   Register Description
+                                        ======   ==================================================== */
+typedef struct {
+    __IO uint32_t intr;             /*  0x0000   Analog Front End Interrupt Flags and Enable/Disable  */
+    __IO uint32_t ctrl0;            /*  0x0004   Analog Front End Control 0                           */
+    __IO uint32_t ctrl1;            /*  0x0008   Analog Front End Control 1                           */
+    __IO uint32_t ctrl2;            /*  0x000C   Analog Front End Control 2                           */
+    __IO uint32_t ctrl3;            /*  0x0010   Analog Front End Control 3                           */
+    __IO uint32_t ctrl4;            /*  0x0014   Analog Front End Control 4                           */
+    __IO uint32_t ctrl5;            /*  0x0018   Analog Front End Control 5                           */
+} mxc_afe_regs_t;
+
+/*
+   Register offsets for module AFE.
+*/
+#define MXC_R_AFE_OFFS_INTR                   ((uint32_t)0x00000000UL)
+#define MXC_R_AFE_OFFS_CTRL0                  ((uint32_t)0x00000004UL)
+#define MXC_R_AFE_OFFS_CTRL1                  ((uint32_t)0x00000008UL)
+#define MXC_R_AFE_OFFS_CTRL2                  ((uint32_t)0x0000000CUL)
+#define MXC_R_AFE_OFFS_CTRL3                  ((uint32_t)0x00000010UL)
+#define MXC_R_AFE_OFFS_CTRL4                  ((uint32_t)0x00000014UL)
+#define MXC_R_AFE_OFFS_CTRL5                  ((uint32_t)0x00000018UL)
+
+/*
+   Field positions and masks for module AFE.
+*/
+#define MXC_F_AFE_INTR_OP_COMP0_IF_POS                      0
+#define MXC_F_AFE_INTR_OP_COMP0_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IF_POS))
+#define MXC_F_AFE_INTR_OP_COMP1_IF_POS                      1
+#define MXC_F_AFE_INTR_OP_COMP1_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IF_POS))
+#define MXC_F_AFE_INTR_OP_COMP2_IF_POS                      2
+#define MXC_F_AFE_INTR_OP_COMP2_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IF_POS))
+#define MXC_F_AFE_INTR_OP_COMP3_IF_POS                      3
+#define MXC_F_AFE_INTR_OP_COMP3_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IF_POS))
+#define MXC_F_AFE_INTR_LP_COMP0_IF_POS                      4
+#define MXC_F_AFE_INTR_LP_COMP0_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IF_POS))
+#define MXC_F_AFE_INTR_LP_COMP1_IF_POS                      5
+#define MXC_F_AFE_INTR_LP_COMP1_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IF_POS))
+#define MXC_F_AFE_INTR_LP_COMP2_IF_POS                      6
+#define MXC_F_AFE_INTR_LP_COMP2_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IF_POS))
+#define MXC_F_AFE_INTR_LP_COMP3_IF_POS                      7
+#define MXC_F_AFE_INTR_LP_COMP3_IF                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IF_POS))
+#define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS                 8
+#define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS                 9
+#define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS                 10
+#define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS                 11
+#define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS                 12
+#define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS                 13
+#define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS                 14
+#define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS                 15
+#define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU                     ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS))
+#define MXC_F_AFE_INTR_OP_COMP0_POL_POS                     16
+#define MXC_F_AFE_INTR_OP_COMP0_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_POL_POS))
+#define MXC_F_AFE_INTR_OP_COMP1_POL_POS                     17
+#define MXC_F_AFE_INTR_OP_COMP1_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_POL_POS))
+#define MXC_F_AFE_INTR_OP_COMP2_POL_POS                     18
+#define MXC_F_AFE_INTR_OP_COMP2_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_POL_POS))
+#define MXC_F_AFE_INTR_OP_COMP3_POL_POS                     19
+#define MXC_F_AFE_INTR_OP_COMP3_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_POL_POS))
+#define MXC_F_AFE_INTR_LP_COMP0_POL_POS                     20
+#define MXC_F_AFE_INTR_LP_COMP0_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_POL_POS))
+#define MXC_F_AFE_INTR_LP_COMP1_POL_POS                     21
+#define MXC_F_AFE_INTR_LP_COMP1_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_POL_POS))
+#define MXC_F_AFE_INTR_LP_COMP2_POL_POS                     22
+#define MXC_F_AFE_INTR_LP_COMP2_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_POL_POS))
+#define MXC_F_AFE_INTR_LP_COMP3_POL_POS                     23
+#define MXC_F_AFE_INTR_LP_COMP3_POL                         ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_POL_POS))
+#define MXC_F_AFE_INTR_OP_COMP0_IE_POS                      24
+#define MXC_F_AFE_INTR_OP_COMP0_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IE_POS))
+#define MXC_F_AFE_INTR_OP_COMP1_IE_POS                      25
+#define MXC_F_AFE_INTR_OP_COMP1_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IE_POS))
+#define MXC_F_AFE_INTR_OP_COMP2_IE_POS                      26
+#define MXC_F_AFE_INTR_OP_COMP2_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IE_POS))
+#define MXC_F_AFE_INTR_OP_COMP3_IE_POS                      27
+#define MXC_F_AFE_INTR_OP_COMP3_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IE_POS))
+#define MXC_F_AFE_INTR_LP_COMP0_IE_POS                      28
+#define MXC_F_AFE_INTR_LP_COMP0_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IE_POS))
+#define MXC_F_AFE_INTR_LP_COMP1_IE_POS                      29
+#define MXC_F_AFE_INTR_LP_COMP1_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IE_POS))
+#define MXC_F_AFE_INTR_LP_COMP2_IE_POS                      30
+#define MXC_F_AFE_INTR_LP_COMP2_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IE_POS))
+#define MXC_F_AFE_INTR_LP_COMP3_IE_POS                      31
+#define MXC_F_AFE_INTR_LP_COMP3_IE                          ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IE_POS))
+
+#define MXC_F_AFE_CTRL0_LED_CFG_POS                         0
+#define MXC_F_AFE_CTRL0_LED_CFG                             ((uint32_t)(0x0000000FUL << MXC_F_AFE_CTRL0_LED_CFG_POS))
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS                 4
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS))
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS                 5
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS))
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS                 6
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS))
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS                 7
+#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS))
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS                    8
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP0                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS))
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS                    10
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP1                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS))
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS                    12
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP2                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS))
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS                    14
+#define MXC_F_AFE_CTRL0_EN_WUD_COMP3                        ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS))
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS                   16
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP0                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS))
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS                   18
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP1                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS))
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS                   20
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP2                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS))
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS                   22
+#define MXC_F_AFE_CTRL0_IN_MODE_COMP3                       ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS))
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS                 24
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS))
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS                 26
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS))
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS                 28
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS))
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS                 30
+#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS))
+
+#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS           0
+#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS))
+#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS          1
+#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL              ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS))
+#define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS           3
+#define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS))
+#define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS           4
+#define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN               ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS))
+#define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS                 5
+#define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS))
+#define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS                6
+#define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL                    ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))
+#define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS                8
+#define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL                    ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS))
+#define MXC_F_AFE_CTRL1_REF_SEL_POS                         10
+#define MXC_F_AFE_CTRL1_REF_SEL                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_SEL_POS))
+#define MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS                 11
+#define MXC_F_AFE_CTRL1_REF_ADC_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS))
+#define MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS                 12
+#define MXC_F_AFE_CTRL1_REF_DAC_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS))
+#define MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS                 13
+#define MXC_F_AFE_CTRL1_REF_BLK_POWERUP                     ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS))
+#define MXC_F_AFE_CTRL1_REF_ADC_COMP_POS                    14
+#define MXC_F_AFE_CTRL1_REF_ADC_COMP                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_COMP_POS))
+#define MXC_F_AFE_CTRL1_REF_DAC_COMP_POS                    15
+#define MXC_F_AFE_CTRL1_REF_DAC_COMP                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_COMP_POS))
+#define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS               16
+#define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN                   ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS))
+#define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS               18
+#define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN                   ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS))
+#define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS                   20
+#define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0                       ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS))
+#define MXC_F_AFE_CTRL1_PLL_TST_EN_POS                      23
+#define MXC_F_AFE_CTRL1_PLL_TST_EN                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_PLL_TST_EN_POS))
+#define MXC_F_AFE_CTRL1_V1EXTADJ_POS                        25
+#define MXC_F_AFE_CTRL1_V1EXTADJ                            ((uint32_t)(0x0000001FUL << MXC_F_AFE_CTRL1_V1EXTADJ_POS))
+#define MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS                    30
+#define MXC_F_AFE_CTRL1_TMON_CUR_SEL                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS))
+
+#define MXC_F_AFE_CTRL2_HYST_COMP0_POS                      0
+#define MXC_F_AFE_CTRL2_HYST_COMP0                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP0_POS))
+#define MXC_F_AFE_CTRL2_HYST_COMP1_POS                      2
+#define MXC_F_AFE_CTRL2_HYST_COMP1                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP1_POS))
+#define MXC_F_AFE_CTRL2_HYST_COMP2_POS                      4
+#define MXC_F_AFE_CTRL2_HYST_COMP2                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP2_POS))
+#define MXC_F_AFE_CTRL2_HYST_COMP3_POS                      6
+#define MXC_F_AFE_CTRL2_HYST_COMP3                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP3_POS))
+#define MXC_F_AFE_CTRL2_HY_POL_COMP0_POS                    8
+#define MXC_F_AFE_CTRL2_HY_POL_COMP0                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP0_POS))
+#define MXC_F_AFE_CTRL2_HY_POL_COMP1_POS                    9
+#define MXC_F_AFE_CTRL2_HY_POL_COMP1                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP1_POS))
+#define MXC_F_AFE_CTRL2_HY_POL_COMP2_POS                    10
+#define MXC_F_AFE_CTRL2_HY_POL_COMP2                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP2_POS))
+#define MXC_F_AFE_CTRL2_HY_POL_COMP3_POS                    11
+#define MXC_F_AFE_CTRL2_HY_POL_COMP3                        ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP3_POS))
+#define MXC_F_AFE_CTRL2_POWERUP_COMP0_POS                   12
+#define MXC_F_AFE_CTRL2_POWERUP_COMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP0_POS))
+#define MXC_F_AFE_CTRL2_POWERUP_COMP1_POS                   13
+#define MXC_F_AFE_CTRL2_POWERUP_COMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP1_POS))
+#define MXC_F_AFE_CTRL2_POWERUP_COMP2_POS                   14
+#define MXC_F_AFE_CTRL2_POWERUP_COMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP2_POS))
+#define MXC_F_AFE_CTRL2_POWERUP_COMP3_POS                   15
+#define MXC_F_AFE_CTRL2_POWERUP_COMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP3_POS))
+#define MXC_F_AFE_CTRL2_DACOUT_EN0_POS                      16
+#define MXC_F_AFE_CTRL2_DACOUT_EN0                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN0_POS))
+#define MXC_F_AFE_CTRL2_DACOUT_EN1_POS                      17
+#define MXC_F_AFE_CTRL2_DACOUT_EN1                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN1_POS))
+#define MXC_F_AFE_CTRL2_DACOUT_EN2_POS                      18
+#define MXC_F_AFE_CTRL2_DACOUT_EN2                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN2_POS))
+#define MXC_F_AFE_CTRL2_DACOUT_EN3_POS                      19
+#define MXC_F_AFE_CTRL2_DACOUT_EN3                          ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN3_POS))
+#define MXC_F_AFE_CTRL2_SCM_OR_SEL_POS                      20
+#define MXC_F_AFE_CTRL2_SCM_OR_SEL                          ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SCM_OR_SEL_POS))
+#define MXC_F_AFE_CTRL2_SNO_OR_SEL_POS                      23
+#define MXC_F_AFE_CTRL2_SNO_OR_SEL                          ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SNO_OR_SEL_POS))
+#define MXC_F_AFE_CTRL2_DAC0_SEL_POS                        26
+#define MXC_F_AFE_CTRL2_DAC0_SEL                            ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC0_SEL_POS))
+#define MXC_F_AFE_CTRL2_DAC1_SEL_POS                        27
+#define MXC_F_AFE_CTRL2_DAC1_SEL                            ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC1_SEL_POS))
+
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS                  12
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP0                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS))
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS                  13
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP1                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS))
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS                  14
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP2                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS))
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS                  15
+#define MXC_F_AFE_CTRL3_POWERUP_OPAMP3                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS))
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS                  16
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS))
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS                  17
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS))
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS                  18
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS))
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS                  19
+#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3                      ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS))
+#define MXC_F_AFE_CTRL3_CLOSE_SPST0_POS                     20
+#define MXC_F_AFE_CTRL3_CLOSE_SPST0                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST0_POS))
+#define MXC_F_AFE_CTRL3_CLOSE_SPST1_POS                     21
+#define MXC_F_AFE_CTRL3_CLOSE_SPST1                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST1_POS))
+#define MXC_F_AFE_CTRL3_CLOSE_SPST2_POS                     22
+#define MXC_F_AFE_CTRL3_CLOSE_SPST2                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST2_POS))
+#define MXC_F_AFE_CTRL3_CLOSE_SPST3_POS                     23
+#define MXC_F_AFE_CTRL3_CLOSE_SPST3                         ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST3_POS))
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS                   24
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS))
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS                   25
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS))
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS                   26
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS))
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS                   27
+#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS))
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS                   28
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS))
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS                   29
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS))
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS                   30
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS))
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS                   31
+#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3                       ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS))
+
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS                 0
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS))
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS                 2
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS))
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS                 4
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS))
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS                 6
+#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS))
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS                 8
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS))
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS                 10
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS))
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS                 12
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS))
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS                 14
+#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3                     ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS))
+#define MXC_F_AFE_CTRL4_DAC_SEL_A_POS                       16
+#define MXC_F_AFE_CTRL4_DAC_SEL_A                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_A_POS))
+#define MXC_F_AFE_CTRL4_DAC_SEL_B_POS                       18
+#define MXC_F_AFE_CTRL4_DAC_SEL_B                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_B_POS))
+#define MXC_F_AFE_CTRL4_DAC_SEL_C_POS                       20
+#define MXC_F_AFE_CTRL4_DAC_SEL_C                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_C_POS))
+#define MXC_F_AFE_CTRL4_DAC_SEL_D_POS                       22
+#define MXC_F_AFE_CTRL4_DAC_SEL_D                           ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_D_POS))
+#define MXC_F_AFE_CTRL4_NPAD_SEL_A_POS                      24
+#define MXC_F_AFE_CTRL4_NPAD_SEL_A                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_A_POS))
+#define MXC_F_AFE_CTRL4_NPAD_SEL_B_POS                      26
+#define MXC_F_AFE_CTRL4_NPAD_SEL_B                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_B_POS))
+#define MXC_F_AFE_CTRL4_NPAD_SEL_C_POS                      28
+#define MXC_F_AFE_CTRL4_NPAD_SEL_C                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_C_POS))
+#define MXC_F_AFE_CTRL4_NPAD_SEL_D_POS                      30
+#define MXC_F_AFE_CTRL4_NPAD_SEL_D                          ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_D_POS))
+
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS               0
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS))
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS               3
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS))
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS               6
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS))
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS               9
+#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS))
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS               12
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS))
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS               15
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS))
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS               18
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS))
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS               21
+#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3                   ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS))
+#define MXC_F_AFE_CTRL5_OP_CMP0_POS                         24
+#define MXC_F_AFE_CTRL5_OP_CMP0                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP0_POS))
+#define MXC_F_AFE_CTRL5_OP_CMP1_POS                         25
+#define MXC_F_AFE_CTRL5_OP_CMP1                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP1_POS))
+#define MXC_F_AFE_CTRL5_OP_CMP2_POS                         26
+#define MXC_F_AFE_CTRL5_OP_CMP2                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP2_POS))
+#define MXC_F_AFE_CTRL5_OP_CMP3_POS                         27
+#define MXC_F_AFE_CTRL5_OP_CMP3                             ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP3_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_AFE_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/clkman_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/clkman_regs.h
new file mode 100644
index 0000000000..28a258b999
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/clkman_regs.h
@@ -0,0 +1,493 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_CLKMAN_REGS_H_
+#define _MXC_CLKMAN_REGS_H_ 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  clkman_regs.h
+ * @addtogroup clkman CLKMAN
+ * @{
+ */
+
+/**
+ * @brief Defines clock input selections for the phase locked loop.
+ */
+typedef enum {
+    /** Input select for high frequency crystal oscillator */
+    MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX = 0,
+    /** Input select for 24MHz ring oscillator */
+    MXC_E_CLKMAN_PLL_INPUT_SELECT_24MHZ_RO,
+} mxc_clkman_pll_input_select_t;
+
+/**
+ * @brief Defines clock input frequency for the phase locked loop.
+ */
+typedef enum {
+    /** Input frequency of 24MHz */
+    MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ = 0,
+    /** Input frequency of 12MHz */
+    MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ,
+    /** Input frequency of 8MHz */
+    MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ,
+} mxc_clkman_pll_divisor_select_t;
+
+/**
+ * @brief Defines terminal count for PLL stable.
+ */
+typedef enum {
+    /** Clock stable after 2^8 = 256 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_8_CLKS = 0,
+    /** Clock stable after 2^9 = 512 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_9_CLKS,
+    /** Clock stable after 2^10 = 1024 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_10_CLKS,
+    /** Clock stable after 2^11 = 2048 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_11_CLKS,
+    /** Clock stable after 2^12 = 4096 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_12_CLKS,
+    /** Clock stable after 2^13 = 8192 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS,
+    /** Clock stable after 2^14 = 16384 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_14_CLKS,
+    /** Clock stable after 2^15 = 32768 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_15_CLKS,
+    /** Clock stable after 2^16 = 65536 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_16_CLKS,
+    /** Clock stable after 2^17 = 131072 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_17_CLKS,
+    /** Clock stable after 2^18 = 262144 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_18_CLKS,
+    /** Clock stable after 2^19 = 524288 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_19_CLKS,
+    /** Clock stable after 2^20 = 1048576 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_20_CLKS,
+    /** Clock stable after 2^21 = 2097152 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_21_CLKS,
+    /** Clock stable after 2^22 = 4194304 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_22_CLKS,
+    /** Clock stable after 2^23 = 8388608 clock cycles */
+    MXC_E_CLKMAN_STABILITY_COUNT_2_23_CLKS
+} mxc_clkman_stability_count_t;
+
+/**
+ * @brief Defines clock source selections for system clock.
+ */
+typedef enum {
+    /** Clock select for 24MHz ring oscillator divided by 8 (3MHz) */
+    MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8 = 0,
+    /** Clock select for 24MHz ring oscillator */
+    MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO,
+    /** Clock select for high frequency crystal oscillator */
+    MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX,
+    /** Clock select for 48MHz phase locked loop output divided by 2 (24MHz) */
+    MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2
+} mxc_clkman_system_source_select_t;
+
+/**
+ * @brief Defines clock source selections for analog to digital converter clock.
+ */
+typedef enum {
+    /** Clock select for system clock frequency */
+    MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM = 0,
+    /** Clock select for 8MHz phase locked loop output */
+    MXC_E_CLKMAN_ADC_SOURCE_SELECT_PLL_8MHZ,
+    /** Clock select for high frequency crystal oscillator */
+    MXC_E_CLKMAN_ADC_SOURCE_SELECT_HFX,
+    /** Clock select for 24MHz ring oscillator */
+    MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO,
+} mxc_clkman_adc_source_select_t;
+
+/**
+ * @brief Defines clock source selections for watchdog timer clock.
+ */
+typedef enum {
+    /** Clock select for system clock frequency */
+    MXC_E_CLKMAN_WDT_SOURCE_SELECT_SYSTEM = 0,
+    /** Clock select for 8MHz phase locked loop output */
+    MXC_E_CLKMAN_WDT_SOURCE_SELECT_RTC,
+    /** Clock select for high frequency crystal oscillator */
+    MXC_E_CLKMAN_WDT_SOURCE_SELECT_24MHZ_RO,
+    /** Clock select for 24MHz ring oscillator */
+    MXC_E_CLKMAN_WDT_SOURCE_SELECT_NANO,
+} mxc_clkman_wdt_source_select_t;
+
+/**
+ * @brief Defines clock scales for various clocks.
+ */
+typedef enum {
+    /** Clock disabled */
+    MXC_E_CLKMAN_CLK_SCALE_DISABLED = 0,
+    /** Clock enabled */
+    MXC_E_CLKMAN_CLK_SCALE_ENABLED,
+    /** Clock scale for dividing by 2 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_2,
+    /** Clock scale for dividing by 4 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_4,
+    /** Clock scale for dividing by 8 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_8,
+    /** Clock scale for dividing by 16 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_16,
+    /** Clock scale for dividing by 32 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_32,
+    /** Clock scale for dividing by 64 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_64,
+    /** Clock scale for dividing by 128 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_128,
+    /** Clock scale for dividing by 256 */
+    MXC_E_CLKMAN_CLK_SCALE_DIV_256
+} mxc_clkman_clk_scale_t;
+
+/**
+ * @brief Defines Setting of the Clock Gates .
+ */
+typedef enum {
+    /** Clock Gater is Off */
+    MXC_E_CLKMAN_CLK_GATE_OFF  = 0,
+    /** Clock Gater is Dynamic */
+    MXC_E_CLKMAN_CLK_GATE_DYNAMIC,
+    /** Clock Gater is On */
+    MXC_E_CLKMAN_CLK_GATE_ON
+} mxc_clkman_clk_gate_t;
+
+/*                                               Offset   Register Description
+                                                 ======   ===================================================================== */
+typedef struct {
+    __IO uint32_t clk_config;                /*  0x0000   System Clock Configuration                                  */
+    __IO uint32_t clk_ctrl;                  /*  0x0004   System Clock Controls                                                 */
+    __IO uint32_t intfl;                     /*  0x0008   Interrupt Flags                                             */
+    __IO uint32_t inten;                     /*  0x000C   Interrupt Enable/Disable Controls                           */
+    __IO uint32_t trim_calc;                 /*  0x0010   Trim Calculation Controls                                   */
+    __I uint32_t rsv0014[4];                 /*  0x0014                                                               */
+    __IO uint32_t i2c_timer_ctrl;            /*  0x0024   I2C Timer Control                                           */
+    __I uint32_t rsv0028[6];                 /*  0x0028                                                               */
+    __IO uint32_t clk_ctrl_0_system;         /*  0x0040   Control Settings for CLK0 - System Clock                    */
+    __IO uint32_t clk_ctrl_1_gpio;           /*  0x0044   Control Settings for CLK1 - GPIO Module Clock               */
+    __IO uint32_t clk_ctrl_2_pt;             /*  0x0048   Control Settings for CLK2 - Pulse Train Module Clock        */
+    __IO uint32_t clk_ctrl_3_spi0;           /*  0x004C   Control Settings for CLK3 - SPI0 Master Clock               */
+    __IO uint32_t clk_ctrl_4_spi1;           /*  0x0050   Control Settings for CLK4 - SPI1 Master Clock               */
+    __IO uint32_t clk_ctrl_5_spi2;           /*  0x0054   Control Settings for CLK5 - SPI2 Master Clock               */
+    __IO uint32_t clk_ctrl_6_i2cm;           /*  0x0058   Control Settings for CLK6 - Clock for all I2C Masters       */
+    __IO uint32_t clk_ctrl_7_i2cs;           /*  0x005C   Control Settings for CLK7 - I2C Slave Clock                 */
+    __IO uint32_t clk_ctrl_8_lcd_chpump;     /*  0x0060   Control Settings for CLK8 - LCD Charge Pump Clock           */
+    __IO uint32_t clk_ctrl_9_puf;            /*  0x0064   Control Settings for CLK9 - PUF Clock                       */
+    __IO uint32_t clk_ctrl_10_prng;          /*  0x0068   Control Settings for CLK10 - PRNG Clock                     */
+    __IO uint32_t clk_ctrl_11_wdt0;          /*  0x006C   Control Settings for CLK11 - Watchdog Timer 0 ScaledSysClk  */
+    __IO uint32_t clk_ctrl_12_wdt1;          /*  0x0070   Control Settings for CLK12 - Watchdog Timer 1 ScaledSysClk  */
+    __IO uint32_t clk_ctrl_13_rtc_int_sync;  /*  0x0074   Control Settings for CLK13 - RTC Interrupt Sync Clock       */
+    __IO uint32_t clk_ctrl_14_dac0;          /*  0x0078   Control Settings for CLK14 - 12-bit DAC 0 Clock             */
+    __IO uint32_t clk_ctrl_15_dac1;          /*  0x007C   Control Settings for CLK15 - 12-bit DAC 1 Clock             */
+    __IO uint32_t clk_ctrl_16_dac2;          /*  0x0080   Control Settings for CLK16 - 8-bit DAC 0 Clock              */
+    __IO uint32_t clk_ctrl_17_dac3;          /*  0x0084   Control Settings for CLK17 - 8-bit DAC 1 Clock              */
+    __I uint32_t rsv0088[30];                /*  0x0088                                                               */
+    __IO uint32_t crypt_clk_ctrl_0_aes;      /*  0x0100   Control Settings for Crypto Clock 0 - AES                   */
+    __IO uint32_t crypt_clk_ctrl_1_maa;      /*  0x0104   Control Settings for Crypto Clock 1 - MAA                   */
+    __IO uint32_t crypt_clk_ctrl_2_prng;     /*  0x0108   Control Settings for Crypto Clock 2 - PRNG                  */
+    __I uint32_t rsv010C[13];                /*  0x010C                                                               */
+    __IO uint32_t clk_gate_ctrl0;            /*  0x0140   Dynamic Clock Gating Control Register 0                     */
+    __IO uint32_t clk_gate_ctrl1;            /*  0x0144   Dynamic Clock Gating Control Register 1                     */
+    __IO uint32_t clk_gate_ctrl2;            /*  0x0148   Dynamic Clock Gating Control Register 2                     */
+} mxc_clkman_regs_t;
+
+/*
+   Register offsets for module CLKMAN.
+*/
+#define MXC_R_CLKMAN_OFFS_CLK_CONFIG                ((uint32_t)0x00000000UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL                  ((uint32_t)0x00000004UL)
+#define MXC_R_CLKMAN_OFFS_INTFL                     ((uint32_t)0x00000008UL)
+#define MXC_R_CLKMAN_OFFS_INTEN                     ((uint32_t)0x0000000CUL)
+#define MXC_R_CLKMAN_OFFS_TRIM_CALC                 ((uint32_t)0x00000010UL)
+#define MXC_R_CLKMAN_OFFS_I2C_TIMER_CTRL            ((uint32_t)0x00000024UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_0_SYSTEM         ((uint32_t)0x00000040UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_1_GPIO           ((uint32_t)0x00000044UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_2_PT             ((uint32_t)0x00000048UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_3_SPI0           ((uint32_t)0x0000004CUL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_4_SPI1           ((uint32_t)0x00000050UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_5_SPI2           ((uint32_t)0x00000054UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_6_I2CM           ((uint32_t)0x00000058UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_7_I2CS           ((uint32_t)0x0000005CUL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_8_LCD_CHPUMP     ((uint32_t)0x00000060UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_9_PUF            ((uint32_t)0x00000064UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_10_PRNG          ((uint32_t)0x00000068UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_11_WDT0          ((uint32_t)0x0000006CUL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_12_WDT1          ((uint32_t)0x00000070UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_13_RTC_INT_SYNC  ((uint32_t)0x00000074UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_14_DAC0          ((uint32_t)0x00000078UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_15_DAC1          ((uint32_t)0x0000007CUL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_16_DAC2          ((uint32_t)0x00000080UL)
+#define MXC_R_CLKMAN_OFFS_CLK_CTRL_17_DAC3          ((uint32_t)0x00000084UL)
+#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_0_AES      ((uint32_t)0x00000100UL)
+#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_1_MAA      ((uint32_t)0x00000104UL)
+#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_2_PRNG     ((uint32_t)0x00000108UL)
+#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL0            ((uint32_t)0x00000140UL)
+#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL1            ((uint32_t)0x00000144UL)
+#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL2            ((uint32_t)0x00000148UL)
+
+/*
+   Field positions and masks for module CLKMAN.
+*/
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS                  0
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE                      ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS                  1
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS                      ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS             2
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE                 ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS               4
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST                   ((uint32_t)(0x0000001FUL << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS              9
+#define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL                  ((uint32_t)(0x00000007UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS                  12
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE                      ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS                 13
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N                     ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS            14
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT                ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS          16
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS             18
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE                 ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS                  19
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS                      ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS         20
+#define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS               24
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE                   ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS              25
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N                  ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS))
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS      28
+#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT          ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS          1
+#define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS              3
+#define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE                  ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS                    4
+#define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N                        ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS                    8
+#define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N                        ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS             9
+#define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT                 ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS                 12
+#define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N                     ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS              16
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N                  ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS       17
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT           ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS              20
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N                  ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS       21
+#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT           ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS))
+#define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS                     24
+#define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE                         ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS))
+
+#define MXC_F_CLKMAN_INTFL_RING_STABLE_POS                      0
+#define MXC_F_CLKMAN_INTFL_RING_STABLE                          ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_RING_STABLE_POS))
+#define MXC_F_CLKMAN_INTFL_PLL_STABLE_POS                       1
+#define MXC_F_CLKMAN_INTFL_PLL_STABLE                           ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_PLL_STABLE_POS))
+#define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS                    2
+#define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE                        ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS))
+
+#define MXC_F_CLKMAN_INTEN_RING_STABLE_POS                      0
+#define MXC_F_CLKMAN_INTEN_RING_STABLE                          ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_RING_STABLE_POS))
+#define MXC_F_CLKMAN_INTEN_PLL_STABLE_POS                       1
+#define MXC_F_CLKMAN_INTEN_PLL_STABLE                           ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_PLL_STABLE_POS))
+#define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS                    2
+#define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE                        ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS))
+
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS                 0
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL                     ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS))
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS              1
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START                  ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS))
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS          2
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED              ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS))
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS                  3
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE                      ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS))
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS            16
+#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS                ((uint32_t)(0x000003FFUL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS))
+
+#define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS        0
+#define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN            ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS    0
+#define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE        ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS         0
+#define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE             ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS    0
+#define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE        ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS           0
+#define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE               ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS   0
+#define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE       ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS   0
+#define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE       ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS 0
+#define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE     ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS        0
+#define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE            ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS     0
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE         ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS    0
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE        ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS   0
+#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE       ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS))
+
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS           0
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS        2
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS        4
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS         6
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER             ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS          8
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS    10
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER        ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS        12
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS         14
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER             ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS         16
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER             ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS        18
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS        20
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS        22
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS        24
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS     26
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER         ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS     28
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER         ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS           30
+#define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS))
+
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS       0
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER           ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS           2
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS       4
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER           ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS       6
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER           ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS        8
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS        10
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS           12
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS           14
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS          16
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS    18
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER        ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS          20
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS          22
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS          24
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS         26
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER             ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS         28
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER             ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS          30
+#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER              ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS))
+
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS           0
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS           2
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS        4
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER            ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS))
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS           6
+#define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER               ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_CLKMAN_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis.h
new file mode 100644
index 0000000000..cce733185e
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_CMSIS_H
+#define MBED_CMSIS_H
+
+#include "max32600.h"
+#include "cmsis_nvic.h"
+
+#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.c
new file mode 100644
index 0000000000..3694273047
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.c
@@ -0,0 +1,65 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "cmsis_nvic.h"
+
+#if defined(TOOLCHAIN_GCC_ARM) || defined(TOOLCHAIN_ARM_STD)
+__attribute__((aligned(256)))
+#endif
+#if defined(TOOLCHAIN_IAR)
+#pragma data_alignment=256
+#endif
+static void (*ramVectorTable[MXC_IRQ_COUNT])(void);
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+    uint32_t *vectors = (uint32_t*)SCB->VTOR;
+    uint32_t i;
+
+    // Copy and switch to dynamic vectors if the first time called
+    if (SCB->VTOR != (uint32_t)ramVectorTable) {
+        uint32_t *old_vectors = (uint32_t*)SCB->VTOR;
+        vectors = (uint32_t*)ramVectorTable;
+        for (i = 0; i < NVIC_NUM_VECTORS; i++) {
+            vectors[i] = old_vectors[i];
+        }
+        SCB->VTOR = (uint32_t)ramVectorTable;
+    }
+    vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+}
+
+uint32_t NVIC_GetVector(IRQn_Type IRQn)
+{
+    uint32_t *vectors = (uint32_t*)SCB->VTOR;
+    return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.h
new file mode 100644
index 0000000000..d3e5447614
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/cmsis_nvic.h
@@ -0,0 +1,53 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+#include "cmsis.h"
+
+#define NVIC_NUM_VECTORS      MXC_IRQ_COUNT
+#define NVIC_USER_IRQ_OFFSET  16
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
+uint32_t NVIC_GetVector(IRQn_Type IRQn);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MBED_CMSIS_NVIC_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/crc_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/crc_regs.h
new file mode 100644
index 0000000000..6acec11048
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/crc_regs.h
@@ -0,0 +1,89 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_CRC_REGS_H_
+#define _MXC_CRC_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  crc_regs.h
+ * @addtogroup crc CRC
+ * @{
+ */
+
+/*                                             Offset   Register Description
+                                               ======   ======================================================= */
+typedef struct {
+    __IO uint32_t reseed;                  /*  0x0000   CRC-16/CRC-32 Reseed Controls                           */
+    __IO uint32_t seed16;                  /*  0x0004   Reseed Value for CRC-16 Calculations                    */
+    __IO uint32_t seed32;                  /*  0x0008   Reseed Value for CRC-32 Calculations                    */
+} mxc_crc_regs_t;
+
+/*                                             Offset   Register Description
+                                               ======   ======================================================= */
+typedef struct {
+    __IO uint32_t value16[512];            /*  0x0000   Write Next CRC-16 Data Value / Read CRC-16 Result Value */
+    __IO uint32_t value32[512];            /*  0x0800   Write Next CRC-32 Data Value / Read CRC-32 Result Value */
+} mxc_crc_data_regs_t;
+
+/*
+   Register offsets for module CRC.
+*/
+#define MXC_R_CRC_OFFS_RESEED           ((uint32_t)0x00000000UL)
+#define MXC_R_CRC_OFFS_SEED16           ((uint32_t)0x00000004UL)
+#define MXC_R_CRC_OFFS_SEED32           ((uint32_t)0x00000008UL)
+#define MXC_R_CRC_DATA_OFFS_VALUE16     ((uint32_t)0x00000000UL)
+#define MXC_R_CRC_DATA_OFFS_VALUE32     ((uint32_t)0x00000800UL)
+
+/*
+   Field positions and masks for module CRC.
+*/
+#define MXC_F_CRC_RESEED_CRC16_POS      0
+#define MXC_F_CRC_RESEED_CRC16          ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC16_POS))
+#define MXC_F_CRC_RESEED_CRC32_POS      1
+#define MXC_F_CRC_RESEED_CRC32          ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC32_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_CRC_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h
new file mode 100644
index 0000000000..2f0f4bd8c5
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h
@@ -0,0 +1,180 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_DAC_REGS_H
+#define _MXC_DAC_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  dac_regs.h
+ * @addtogroup dac DAC
+ * @{
+ */
+
+/**
+ * @brief Defines the DAC Operational Modes.
+ */
+typedef enum {
+    /** DAC OpMode FIFO */
+    MXC_E_DAC_OP_MODE_FIFO = 0,
+    /** DAC OpMode Sample Count */
+    MXC_E_DAC_OP_MODE_DACSMPLCNT,
+    /** DAC OpMode DAC_REG Control */
+    MXC_E_DAC_OP_MODE_DAC_REG,
+    /** DAC OpMode Continuous */
+    MXC_E_DAC_OP_MODE_CONTINUOUS
+} mxc_dac_op_mode_t;
+
+/**
+ * @brief Defines the DAC Interpolation Options.
+ */
+typedef enum {
+    /** DAC Interpolation is Disabled */
+    MXC_E_DAC_INTERP_MODE_DISABLED = 0,
+    /** DAC Interpolation 2:1 */
+    MXC_E_DAC_INTERP_MODE_2_TO_1,
+    /** DAC Interpolation 4:1 */
+    MXC_E_DAC_INTERP_MODE_4_TO_1,
+    /** DAC Interpolation 8:1 */
+    MXC_E_DAC_INTERP_MODE_8_TO_1
+} mxc_dac_interp_mode_t;
+
+/**
+ * @brief Defines the DAC Start Modes.
+ */
+typedef enum {
+    /** Start on FIFO Not Empty */
+    MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY = 0,
+    /** Start on ADC generated Start Strobe */
+    MXC_E_DAC_START_MODE_ADC_STROBE,
+    /** Start on DAC generated Start Strobe */
+    MXC_E_DAC_START_MODE_DAC_STROBE
+} mxc_dac_start_mode_t;
+
+/*                                                  Offset   Register Description
+                                                    ======   ================================================== */
+typedef struct {
+    __IO uint32_t ctrl0;                        /*  0x0000   DAC Control Register 0                             */
+    __IO uint32_t rate;                         /*  0x0004   DAC Output Rate Control                            */
+    __IO uint32_t ctrl1_int;                    /*  0x0008   DAC Control Register 1, Interrupt Flags and Enable */
+    __IO uint32_t reg;                          /*  0x000C   DAC Data Register                                  */
+    __IO uint32_t trm;                          /*  0x0010   DAC Trim Register */
+} mxc_dac_regs_t;
+
+/*                                                  Offset   Register Description
+                                                    ======   ================================================== */
+typedef struct {
+    union {
+        __IO uint8_t output_8;                  /*  0x0000   Write to push values to DAC output FIFO            */
+        __IO uint16_t output_16;                /*  0x0000   Write to push values to DAC output FIFO            */
+    };
+} mxc_dac_fifo_t;
+
+/*
+   Register offsets for module DAC12.
+*/
+#define MXC_R_DAC_OFFS_CTRL0                    ((uint32_t)0x00000000UL)
+#define MXC_R_DAC_OFFS_RATE                     ((uint32_t)0x00000004UL)
+#define MXC_R_DAC_OFFS_CTRL1_INT                ((uint32_t)0x00000008UL)
+#define MXC_R_DAC_FIFO_OFFS_OUTPUT              ((uint32_t)0x00000000UL)
+
+/*
+   Field positions and masks for module DAC.
+*/
+#define MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS         0
+#define MXC_F_DAC_CTRL0_FIFO_AE_CNT             ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS))
+#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS    5
+#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS))
+#define MXC_F_DAC_CTRL0_FIFO_EMPTY_POS          6
+#define MXC_F_DAC_CTRL0_FIFO_EMPTY              ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_EMPTY_POS))
+#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS   7
+#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY       ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS))
+#define MXC_F_DAC_CTRL0_INTERP_MODE_POS         8
+#define MXC_F_DAC_CTRL0_INTERP_MODE             ((uint32_t)(0x00000007UL << MXC_F_DAC_CTRL0_INTERP_MODE_POS))
+#define MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS         12
+#define MXC_F_DAC_CTRL0_FIFO_AF_CNT             ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS))
+#define MXC_F_DAC_CTRL0_START_MODE_POS          16
+#define MXC_F_DAC_CTRL0_START_MODE              ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_START_MODE_POS))
+#define MXC_F_DAC_CTRL0_CPU_START_POS           20
+#define MXC_F_DAC_CTRL0_CPU_START               ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CPU_START_POS))
+#define MXC_F_DAC_CTRL0_OP_MODE_POS             24
+#define MXC_F_DAC_CTRL0_OP_MODE                 ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_OP_MODE_POS))
+#define MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS      26
+#define MXC_F_DAC_CTRL0_POWER_MODE_1_0          ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS))
+#define MXC_F_DAC_CTRL0_POWER_ON_POS            28
+#define MXC_F_DAC_CTRL0_POWER_ON                ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_ON_POS))
+#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS       29
+#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN           ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS))
+#define MXC_F_DAC_CTRL0_POWER_MODE_2_POS        30
+#define MXC_F_DAC_CTRL0_POWER_MODE_2            ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_MODE_2_POS))
+#define MXC_F_DAC_CTRL0_RESET_POS               31
+#define MXC_F_DAC_CTRL0_RESET                   ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_RESET_POS))
+
+#define MXC_F_DAC_RATE_RATE_CNT_POS             0
+#define MXC_F_DAC_RATE_RATE_CNT                 ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_RATE_CNT_POS))
+#define MXC_F_DAC_RATE_SAMPLE_CNT_POS           16
+#define MXC_F_DAC_RATE_SAMPLE_CNT               ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_SAMPLE_CNT_POS))
+
+#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS     0
+#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF         ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS))
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS    1
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS))
+#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS 2
+#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF     ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS))
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS       3
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW           ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS))
+#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS     16
+#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE         ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS))
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS    17
+#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE        ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS))
+#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS 18
+#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE     ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS))
+#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS  28
+#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE      ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS))
+#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS  29
+#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE      ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _DAC12_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/flc_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/flc_regs.h
new file mode 100644
index 0000000000..864c8c9b97
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/flc_regs.h
@@ -0,0 +1,210 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_FLC_REGS_H
+#define _MXC_FLC_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  flc_regs.h
+ * @addtogroup flc FLC
+ * @{
+ */
+/*                                          Offset   Register Description
+                                            ======   ======================================================= */
+typedef struct {
+    __IO uint32_t faddr;                /*  0x0000   Flash Operation Address                                 */
+    __IO uint32_t fckdiv;               /*  0x0004   Flash Clock Rate Divisor                                */
+    __IO uint32_t ctrl;                 /*  0x0008   Flash Control Register                                  */
+    __I uint32_t rsv000C[6];            /*  0x000C                                                           */
+    __IO uint32_t intr;                 /*  0x0024   Flash Controller Interrupt Flags and Enable/Disable 0   */
+    __I uint32_t rsv0028[2];            /*  0x0028                                                           */
+    __IO uint32_t fdata;                /*  0x0030   Flash Operation Data Register                           */
+    __I uint32_t rsv0034[7];            /*  0x0034                                                           */
+    __IO uint32_t perform;              /*  0x0050   Flash Performance Settings                              */
+    __I uint32_t rsv0054[11];           /*  0x0054                                                           */
+    __IO uint32_t status;               /*  0x0080   Security Status Flags                                   */
+    __I uint32_t rsv0084;               /*  0x0084                                                           */
+    __IO uint32_t security;             /*  0x0088   Flash Controller Security Settings                      */
+    __I uint32_t rsv008C[4];            /*  0x008C                                                           */
+    __IO uint32_t bypass;               /*  0x009C   Status Flags for DSB Operations                         */
+    __IO uint32_t user_option;          /*  0x0100   Used to set DSB Access code and Auto-Lock in info block */
+    __I uint32_t rsv0104[15];           /*  0x0104                                                           */
+    __IO uint32_t ctrl2;                /*  0x0140   Flash Control Register 2                                */
+    __IO uint32_t intfl1;               /*  0x0144   Interrupt Flags Register 1                              */
+    __IO uint32_t inten1;               /*  0x0148   Interrupt Enable/Disable Register 1                     */
+    __I uint32_t rsv014C;               /*  0x014C                                                           */
+    __IO uint32_t disable_xr0;          /*  0x0150   Disable Flash Page Exec/Read Register 0                 */
+    __IO uint32_t disable_xr1;          /*  0x0154   Disable Flash Page Exec/Read Register 1                 */
+    __IO uint32_t disable_xr2;          /*  0x0158   Disable Flash Page Exec/Read Register 2                 */
+    __IO uint32_t disable_xr3;          /*  0x015C   Disable Flash Page Exec/Read Register 3                 */
+    __IO uint32_t disable_we0;          /*  0x0160   Disable Flash Page Write/Erase Register 0               */
+    __IO uint32_t disable_we1;          /*  0x0164   Disable Flash Page Write/Erase Register 1               */
+    __IO uint32_t disable_we2;          /*  0x0168   Disable Flash Page Write/Erase Register 2               */
+    __IO uint32_t disable_we3;          /*  0x016C   Disable Flash Page Write/Erase Register 3               */
+} mxc_flc_regs_t;
+
+/*
+   Register offsets for module FLC.
+*/
+#define MXC_R_FLC_OFFS_FADDR                          ((uint32_t)0x00000000UL)
+#define MXC_R_FLC_OFFS_FCKDIV                         ((uint32_t)0x00000004UL)
+#define MXC_R_FLC_OFFS_CTRL                           ((uint32_t)0x00000008UL)
+#define MXC_R_FLC_OFFS_INTR                           ((uint32_t)0x00000024UL)
+#define MXC_R_FLC_OFFS_FDATA                          ((uint32_t)0x00000030UL)
+#define MXC_R_FLC_OFFS_PERFORM                        ((uint32_t)0x00000050UL)
+#define MXC_R_FLC_OFFS_STATUS                         ((uint32_t)0x00000080UL)
+#define MXC_R_FLC_OFFS_SECURITY                       ((uint32_t)0x00000088UL)
+#define MXC_R_FLC_OFFS_BYPASS                         ((uint32_t)0x0000009CUL)
+#define MXC_R_FLC_OFFS_USER_OPTION                    ((uint32_t)0x00000100UL)
+#define MXC_R_FLC_OFFS_CTRL2                          ((uint32_t)0x00000140UL)
+#define MXC_R_FLC_OFFS_INTFL1                         ((uint32_t)0x00000144UL)
+#define MXC_R_FLC_OFFS_INTEN1                         ((uint32_t)0x00000148UL)
+#define MXC_R_FLC_OFFS_DISABLE_XR0                    ((uint32_t)0x00000150UL)
+#define MXC_R_FLC_OFFS_DISABLE_XR1                    ((uint32_t)0x00000154UL)
+#define MXC_R_FLC_OFFS_DISABLE_XR2                    ((uint32_t)0x00000158UL)
+#define MXC_R_FLC_OFFS_DISABLE_XR3                    ((uint32_t)0x0000015CUL)
+#define MXC_R_FLC_OFFS_DISABLE_WE0                    ((uint32_t)0x00000160UL)
+#define MXC_R_FLC_OFFS_DISABLE_WE1                    ((uint32_t)0x00000164UL)
+#define MXC_R_FLC_OFFS_DISABLE_WE2                    ((uint32_t)0x00000168UL)
+#define MXC_R_FLC_OFFS_DISABLE_WE3                    ((uint32_t)0x0000016CUL)
+
+#define MXC_V_FLC_ERASE_CODE_PAGE_ERASE               ((uint8_t)0x55)
+#define MXC_V_FLC_ERASE_CODE_MASS_ERASE               ((uint8_t)0xAA)
+
+#define MXC_V_FLC_FLSH_UNLOCK_KEY                     ((uint8_t)0x2)
+
+/*
+   Field positions and masks for module FLC.
+*/
+#define MXC_F_FLC_FADDR_FADDR_POS                     0
+#define MXC_F_FLC_FADDR_FADDR                         ((uint32_t)(0x0003FFFFUL << MXC_F_FLC_FADDR_FADDR_POS))
+
+#define MXC_F_FLC_FCKDIV_FCKDIV_POS                   0
+#define MXC_F_FLC_FCKDIV_FCKDIV                       ((uint32_t)(0x0000001FUL << MXC_F_FLC_FCKDIV_FCKDIV_POS))
+
+#define MXC_F_FLC_CTRL_WRITE_POS                      0
+#define MXC_F_FLC_CTRL_WRITE                          ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_POS))
+#define MXC_F_FLC_CTRL_MASS_ERASE_POS                 1
+#define MXC_F_FLC_CTRL_MASS_ERASE                     ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_MASS_ERASE_POS))
+#define MXC_F_FLC_CTRL_PAGE_ERASE_POS                 2
+#define MXC_F_FLC_CTRL_PAGE_ERASE                     ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PAGE_ERASE_POS))
+#define MXC_F_FLC_CTRL_ERASE_CODE_POS                 8
+#define MXC_F_FLC_CTRL_ERASE_CODE                     ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS))
+#define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS          16
+#define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK              ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS))
+#define MXC_F_FLC_CTRL_WRITE_ENABLE_POS               17
+#define MXC_F_FLC_CTRL_WRITE_ENABLE                   ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_ENABLE_POS))
+#define MXC_F_FLC_CTRL_PENDING_POS                    24
+#define MXC_F_FLC_CTRL_PENDING                        ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PENDING_POS))
+#define MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS           25
+#define MXC_F_FLC_CTRL_INFO_BLOCK_VALID               ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS))
+#define MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS            27
+#define MXC_F_FLC_CTRL_AUTO_INCRE_MODE                ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS))
+#define MXC_F_FLC_CTRL_FLSH_UNLOCK_POS                28
+#define MXC_F_FLC_CTRL_FLSH_UNLOCK                    ((uint32_t)(0x0000000FUL << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS))
+
+#define MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS           0
+#define MXC_F_FLC_INTR_FLASH_OP_DONE_IF               ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS))
+#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS         1
+#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF             ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS))
+#define MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS           9
+#define MXC_F_FLC_INTR_FLASH_OP_DONE_IE               ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS))
+#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS         10
+#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE             ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS))
+
+#define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS       8
+#define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN           ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS))
+#define MXC_F_FLC_PERFORM_DELAY_SE_EN_POS             0
+#define MXC_F_FLC_PERFORM_DELAY_SE_EN                 ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_DELAY_SE_EN_POS))
+
+#define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS        0
+#define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW            ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS))
+#define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS        1
+#define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC            ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS))
+#define MXC_F_FLC_STATUS_AUTO_LOCK_POS                3
+#define MXC_F_FLC_STATUS_AUTO_LOCK                    ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_AUTO_LOCK_POS))
+
+#define MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS          0
+#define MXC_F_FLC_SECURITY_DEBUG_DISABLE              ((uint32_t)(0x000000FFUL << MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS))
+#define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS        8
+#define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK            ((uint32_t)(0x0000000FUL << MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS))
+#define MXC_F_FLC_SECURITY_SECURITY_LOCK_POS          31
+#define MXC_F_FLC_SECURITY_SECURITY_LOCK              ((uint32_t)(0x00000001UL << MXC_F_FLC_SECURITY_SECURITY_LOCK_POS))
+
+#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS    0
+#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE        ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS))
+#define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS          1
+#define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE              ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS))
+#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS 2
+#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE     ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS))
+#define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS       3
+#define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE           ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS))
+
+#define MXC_F_FLC_CTRL2_FLASH_LVE_POS                 0
+#define MXC_F_FLC_CTRL2_FLASH_LVE                     ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_FLASH_LVE_POS))
+#define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS           8
+#define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL               ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS))
+
+#define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS        0
+#define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED            ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS))
+#define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS       1
+#define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR           ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS))
+#define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS        2
+#define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED            ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS))
+#define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS         3
+#define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE             ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS))
+
+#define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS        0
+#define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED            ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS))
+#define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS       1
+#define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR           ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS))
+#define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS        2
+#define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED            ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS))
+#define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS         3
+#define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE             ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_FLC_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h
new file mode 100644
index 0000000000..8a8122d8cc
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h
@@ -0,0 +1,477 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_GPIO_REGS_H_
+#define _MXC_GPIO_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  gpio_regs.h
+ * @addtogroup gpio GPIO
+ * @{
+ */
+
+/*                                             Offset          Register Description
+                                            =============   ========================================== */
+typedef struct {
+    __I uint32_t rsv000[16];            /*  0x0000-0x003C                                              */
+
+    __IO uint32_t free[8];              /*  0x0040-0x005C   Port P[0..7] Free for GPIO Operation Flags */
+    __I uint32_t rsv060[8];             /*  0x0060-0x007C                                              */
+
+    __IO uint32_t out_mode[8];          /*  0x0080-0x009C   Port P[0..7] GPIO Output Drive Mode        */
+    __I uint32_t rsv0A0[8];             /*  0x00A0-0x00BC                                              */
+
+    __IO uint32_t out_val[8];           /*  0x00C0-0x00DC   Port P[0..7] GPIO Output Value             */
+    __I uint32_t rsv0E0[8];             /*  0x00E0-0x00FC                                              */
+
+    __IO uint32_t func_sel[8];          /*  0x0100-0x011C   Port P[0..7] GPIO Function Select          */
+    __I uint32_t rsv120[8];             /*  0x0120-0x013C                                              */
+
+    __IO uint32_t in_mode[8];           /*  0x0140-0x015C   Port P[0..7] GPIO Input Monitoring Mode    */
+    __I uint32_t rsv160[8];             /*  0x0160-0x017C                                              */
+
+    __IO uint32_t in_val[8];            /*  0x0180-0x019C   Port P[0..7] GPIO Input Value              */
+    __I uint32_t rsv1A0[8];             /*  0x01A0-0x01BC                                              */
+
+    __IO uint32_t int_mode[8];          /*  0x01C0-0x01DC   Port P[0..7] Interrupt Detection Mode      */
+    __I uint32_t rsv1E0[8];             /*  0x01E0-0x01FC                                              */
+
+    __IO uint32_t intfl[8];             /*  0x0200-0x021C   Port P[0..7] Interrupt Flags               */
+    __I uint32_t rsv220[8];             /*  0x0220-0x023C                                              */
+
+    __IO uint32_t inten[8];             /*  0x0240-0x025C   Port P[0..7] Interrupt Enables             */
+} mxc_gpio_regs_t;
+
+/*
+   Register offsets for module GPIO.
+*/
+#define MXC_R_GPIO_OFFS_FREE_P0                   ((uint32_t)0x00000040UL)
+#define MXC_R_GPIO_OFFS_FREE_P1                   ((uint32_t)0x00000044UL)
+#define MXC_R_GPIO_OFFS_FREE_P2                   ((uint32_t)0x00000048UL)
+#define MXC_R_GPIO_OFFS_FREE_P3                   ((uint32_t)0x0000004CUL)
+#define MXC_R_GPIO_OFFS_FREE_P4                   ((uint32_t)0x00000050UL)
+#define MXC_R_GPIO_OFFS_FREE_P5                   ((uint32_t)0x00000054UL)
+#define MXC_R_GPIO_OFFS_FREE_P6                   ((uint32_t)0x00000058UL)
+#define MXC_R_GPIO_OFFS_FREE_P7                   ((uint32_t)0x0000005CUL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P0               ((uint32_t)0x00000080UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P1               ((uint32_t)0x00000084UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P2               ((uint32_t)0x00000088UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P3               ((uint32_t)0x0000008CUL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P4               ((uint32_t)0x00000090UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P5               ((uint32_t)0x00000094UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P6               ((uint32_t)0x00000098UL)
+#define MXC_R_GPIO_OFFS_OUT_MODE_P7               ((uint32_t)0x0000009CUL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P0                ((uint32_t)0x000000C0UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P1                ((uint32_t)0x000000C4UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P2                ((uint32_t)0x000000C8UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P3                ((uint32_t)0x000000CCUL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P4                ((uint32_t)0x000000D0UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P5                ((uint32_t)0x000000D4UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P6                ((uint32_t)0x000000D8UL)
+#define MXC_R_GPIO_OFFS_OUT_VAL_P7                ((uint32_t)0x000000DCUL)
+#define MXC_R_GPIO_OFFS_FUNC_SEL_P0               ((uint32_t)0x00000100UL)
+#define MXC_R_GPIO_OFFS_FUNC_SEL_P1               ((uint32_t)0x00000104UL)
+#define MXC_R_GPIO_OFFS_FUNC_SEL_P2               ((uint32_t)0x00000108UL)
+#define MXC_R_GPIO_OFFS_FUNC_SEL_P6               ((uint32_t)0x00000118UL)
+#define MXC_R_GPIO_OFFS_FUNC_SEL_P7               ((uint32_t)0x0000011CUL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P0                ((uint32_t)0x00000140UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P1                ((uint32_t)0x00000144UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P2                ((uint32_t)0x00000148UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P3                ((uint32_t)0x0000014CUL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P4                ((uint32_t)0x00000150UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P5                ((uint32_t)0x00000154UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P6                ((uint32_t)0x00000158UL)
+#define MXC_R_GPIO_OFFS_IN_MODE_P7                ((uint32_t)0x0000015CUL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P0                 ((uint32_t)0x00000180UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P1                 ((uint32_t)0x00000184UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P2                 ((uint32_t)0x00000188UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P3                 ((uint32_t)0x0000018CUL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P4                 ((uint32_t)0x00000190UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P5                 ((uint32_t)0x00000194UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P6                 ((uint32_t)0x00000198UL)
+#define MXC_R_GPIO_OFFS_IN_VAL_P7                 ((uint32_t)0x0000019CUL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P0               ((uint32_t)0x000001C0UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P1               ((uint32_t)0x000001C4UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P2               ((uint32_t)0x000001C8UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P3               ((uint32_t)0x000001CCUL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P4               ((uint32_t)0x000001D0UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P5               ((uint32_t)0x000001D4UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P6               ((uint32_t)0x000001D8UL)
+#define MXC_R_GPIO_OFFS_INT_MODE_P7               ((uint32_t)0x000001DCUL)
+#define MXC_R_GPIO_OFFS_INTFL_P0                  ((uint32_t)0x00000200UL)
+#define MXC_R_GPIO_OFFS_INTFL_P1                  ((uint32_t)0x00000204UL)
+#define MXC_R_GPIO_OFFS_INTFL_P2                  ((uint32_t)0x00000208UL)
+#define MXC_R_GPIO_OFFS_INTFL_P3                  ((uint32_t)0x0000020CUL)
+#define MXC_R_GPIO_OFFS_INTFL_P4                  ((uint32_t)0x00000210UL)
+#define MXC_R_GPIO_OFFS_INTFL_P5                  ((uint32_t)0x00000214UL)
+#define MXC_R_GPIO_OFFS_INTFL_P6                  ((uint32_t)0x00000218UL)
+#define MXC_R_GPIO_OFFS_INTFL_P7                  ((uint32_t)0x0000021CUL)
+#define MXC_R_GPIO_OFFS_INTEN_P0                  ((uint32_t)0x00000240UL)
+#define MXC_R_GPIO_OFFS_INTEN_P1                  ((uint32_t)0x00000244UL)
+#define MXC_R_GPIO_OFFS_INTEN_P2                  ((uint32_t)0x00000248UL)
+#define MXC_R_GPIO_OFFS_INTEN_P3                  ((uint32_t)0x0000024CUL)
+#define MXC_R_GPIO_OFFS_INTEN_P4                  ((uint32_t)0x00000250UL)
+#define MXC_R_GPIO_OFFS_INTEN_P5                  ((uint32_t)0x00000254UL)
+#define MXC_R_GPIO_OFFS_INTEN_P6                  ((uint32_t)0x00000258UL)
+#define MXC_R_GPIO_OFFS_INTEN_P7                  ((uint32_t)0x0000025CUL)
+
+
+/*
+   Field positions and masks for module GPIO.
+*/
+#define MXC_F_GPIO_FREE_PIN0_POS                             0
+#define MXC_F_GPIO_FREE_PIN0                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN0_POS))
+#define MXC_F_GPIO_FREE_PIN1_POS                             1
+#define MXC_F_GPIO_FREE_PIN1                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN1_POS))
+#define MXC_F_GPIO_FREE_PIN2_POS                             2
+#define MXC_F_GPIO_FREE_PIN2                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN2_POS))
+#define MXC_F_GPIO_FREE_PIN3_POS                             3
+#define MXC_F_GPIO_FREE_PIN3                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN3_POS))
+#define MXC_F_GPIO_FREE_PIN4_POS                             4
+#define MXC_F_GPIO_FREE_PIN4                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN4_POS))
+#define MXC_F_GPIO_FREE_PIN5_POS                             5
+#define MXC_F_GPIO_FREE_PIN5                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN5_POS))
+#define MXC_F_GPIO_FREE_PIN6_POS                             6
+#define MXC_F_GPIO_FREE_PIN6                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN6_POS))
+#define MXC_F_GPIO_FREE_PIN7_POS                             7
+#define MXC_F_GPIO_FREE_PIN7                                ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN7_POS))
+
+#define MXC_F_GPIO_OUT_MODE_PIN0_POS                         0
+#define MXC_F_GPIO_OUT_MODE_PIN0                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN1_POS                         4
+#define MXC_F_GPIO_OUT_MODE_PIN1                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN2_POS                         8
+#define MXC_F_GPIO_OUT_MODE_PIN2                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN3_POS                        12
+#define MXC_F_GPIO_OUT_MODE_PIN3                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN4_POS                        16
+#define MXC_F_GPIO_OUT_MODE_PIN4                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN5_POS                        20
+#define MXC_F_GPIO_OUT_MODE_PIN5                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN6_POS                        24
+#define MXC_F_GPIO_OUT_MODE_PIN6                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_F_GPIO_OUT_MODE_PIN7_POS                        28
+#define MXC_F_GPIO_OUT_MODE_PIN7                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+
+#define MXC_F_GPIO_OUT_VAL_PIN0_POS                          0
+#define MXC_F_GPIO_OUT_VAL_PIN0                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN0_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN1_POS                          1
+#define MXC_F_GPIO_OUT_VAL_PIN1                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN1_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN2_POS                          2
+#define MXC_F_GPIO_OUT_VAL_PIN2                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN2_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN3_POS                          3
+#define MXC_F_GPIO_OUT_VAL_PIN3                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN3_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN4_POS                          4
+#define MXC_F_GPIO_OUT_VAL_PIN4                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN4_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN5_POS                          5
+#define MXC_F_GPIO_OUT_VAL_PIN5                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN5_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN6_POS                          6
+#define MXC_F_GPIO_OUT_VAL_PIN6                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN6_POS))
+#define MXC_F_GPIO_OUT_VAL_PIN7_POS                          7
+#define MXC_F_GPIO_OUT_VAL_PIN7                             ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN7_POS))
+
+#define MXC_F_GPIO_FUNC_SEL_PIN0_POS                         0
+#define MXC_F_GPIO_FUNC_SEL_PIN0                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN0_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN1_POS                         4
+#define MXC_F_GPIO_FUNC_SEL_PIN1                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN1_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN2_POS                         8
+#define MXC_F_GPIO_FUNC_SEL_PIN2                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN2_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN3_POS                        12
+#define MXC_F_GPIO_FUNC_SEL_PIN3                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN3_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN4_POS                        16
+#define MXC_F_GPIO_FUNC_SEL_PIN4                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN4_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN5_POS                        20
+#define MXC_F_GPIO_FUNC_SEL_PIN5                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN5_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN6_POS                        24
+#define MXC_F_GPIO_FUNC_SEL_PIN6                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN6_POS))
+#define MXC_F_GPIO_FUNC_SEL_PIN7_POS                        28
+#define MXC_F_GPIO_FUNC_SEL_PIN7                            ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN7_POS))
+
+#define MXC_F_GPIO_IN_MODE_PIN0_POS                          0
+#define MXC_F_GPIO_IN_MODE_PIN0                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN0_POS))
+#define MXC_F_GPIO_IN_MODE_PIN1_POS                          4
+#define MXC_F_GPIO_IN_MODE_PIN1                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN1_POS))
+#define MXC_F_GPIO_IN_MODE_PIN2_POS                          8
+#define MXC_F_GPIO_IN_MODE_PIN2                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN2_POS))
+#define MXC_F_GPIO_IN_MODE_PIN3_POS                         12
+#define MXC_F_GPIO_IN_MODE_PIN3                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN3_POS))
+#define MXC_F_GPIO_IN_MODE_PIN4_POS                         16
+#define MXC_F_GPIO_IN_MODE_PIN4                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN4_POS))
+#define MXC_F_GPIO_IN_MODE_PIN5_POS                         20
+#define MXC_F_GPIO_IN_MODE_PIN5                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN5_POS))
+#define MXC_F_GPIO_IN_MODE_PIN6_POS                         24
+#define MXC_F_GPIO_IN_MODE_PIN6                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN6_POS))
+#define MXC_F_GPIO_IN_MODE_PIN7_POS                         28
+#define MXC_F_GPIO_IN_MODE_PIN7                             ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN7_POS))
+
+#define MXC_F_GPIO_IN_VAL_PIN0_POS                           0
+#define MXC_F_GPIO_IN_VAL_PIN0                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN0_POS))
+#define MXC_F_GPIO_IN_VAL_PIN1_POS                           1
+#define MXC_F_GPIO_IN_VAL_PIN1                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN1_POS))
+#define MXC_F_GPIO_IN_VAL_PIN2_POS                           2
+#define MXC_F_GPIO_IN_VAL_PIN2                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN2_POS))
+#define MXC_F_GPIO_IN_VAL_PIN3_POS                           3
+#define MXC_F_GPIO_IN_VAL_PIN3                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN3_POS))
+#define MXC_F_GPIO_IN_VAL_PIN4_POS                           4
+#define MXC_F_GPIO_IN_VAL_PIN4                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN4_POS))
+#define MXC_F_GPIO_IN_VAL_PIN5_POS                           5
+#define MXC_F_GPIO_IN_VAL_PIN5                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN5_POS))
+#define MXC_F_GPIO_IN_VAL_PIN6_POS                           6
+#define MXC_F_GPIO_IN_VAL_PIN6                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN6_POS))
+#define MXC_F_GPIO_IN_VAL_PIN7_POS                           7
+#define MXC_F_GPIO_IN_VAL_PIN7                              ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN7_POS))
+
+#define MXC_F_GPIO_INT_MODE_PIN0_POS                         0
+#define MXC_F_GPIO_INT_MODE_PIN0                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN0_POS))
+#define MXC_F_GPIO_INT_MODE_PIN1_POS                         4
+#define MXC_F_GPIO_INT_MODE_PIN1                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN1_POS))
+#define MXC_F_GPIO_INT_MODE_PIN2_POS                         8
+#define MXC_F_GPIO_INT_MODE_PIN2                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN2_POS))
+#define MXC_F_GPIO_INT_MODE_PIN3_POS                        12
+#define MXC_F_GPIO_INT_MODE_PIN3                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN3_POS))
+#define MXC_F_GPIO_INT_MODE_PIN4_POS                        16
+#define MXC_F_GPIO_INT_MODE_PIN4                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN4_POS))
+#define MXC_F_GPIO_INT_MODE_PIN5_POS                        20
+#define MXC_F_GPIO_INT_MODE_PIN5                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN5_POS))
+#define MXC_F_GPIO_INT_MODE_PIN6_POS                        24
+#define MXC_F_GPIO_INT_MODE_PIN6                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN6_POS))
+#define MXC_F_GPIO_INT_MODE_PIN7_POS                        28
+#define MXC_F_GPIO_INT_MODE_PIN7                            ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN7_POS))
+
+#define MXC_F_GPIO_INTFL_PIN0_POS                            0
+#define MXC_F_GPIO_INTFL_PIN0                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN0_POS))
+#define MXC_F_GPIO_INTFL_PIN1_POS                            1
+#define MXC_F_GPIO_INTFL_PIN1                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN1_POS))
+#define MXC_F_GPIO_INTFL_PIN2_POS                            2
+#define MXC_F_GPIO_INTFL_PIN2                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN2_POS))
+#define MXC_F_GPIO_INTFL_PIN3_POS                            3
+#define MXC_F_GPIO_INTFL_PIN3                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN3_POS))
+#define MXC_F_GPIO_INTFL_PIN4_POS                            4
+#define MXC_F_GPIO_INTFL_PIN4                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN4_POS))
+#define MXC_F_GPIO_INTFL_PIN5_POS                            5
+#define MXC_F_GPIO_INTFL_PIN5                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN5_POS))
+#define MXC_F_GPIO_INTFL_PIN6_POS                            6
+#define MXC_F_GPIO_INTFL_PIN6                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN6_POS))
+#define MXC_F_GPIO_INTFL_PIN7_POS                            7
+#define MXC_F_GPIO_INTFL_PIN7                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN7_POS))
+
+#define MXC_F_GPIO_INTEN_PIN0_POS                            0
+#define MXC_F_GPIO_INTEN_PIN0                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN0_POS))
+#define MXC_F_GPIO_INTEN_PIN1_POS                            1
+#define MXC_F_GPIO_INTEN_PIN1                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN1_POS))
+#define MXC_F_GPIO_INTEN_PIN2_POS                            2
+#define MXC_F_GPIO_INTEN_PIN2                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN2_POS))
+#define MXC_F_GPIO_INTEN_PIN3_POS                            3
+#define MXC_F_GPIO_INTEN_PIN3                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN3_POS))
+#define MXC_F_GPIO_INTEN_PIN4_POS                            4
+#define MXC_F_GPIO_INTEN_PIN4                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN4_POS))
+#define MXC_F_GPIO_INTEN_PIN5_POS                            5
+#define MXC_F_GPIO_INTEN_PIN5                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN5_POS))
+#define MXC_F_GPIO_INTEN_PIN6_POS                            6
+#define MXC_F_GPIO_INTEN_PIN6                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN6_POS))
+#define MXC_F_GPIO_INTEN_PIN7_POS                            7
+#define MXC_F_GPIO_INTEN_PIN7                               ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN7_POS))
+
+
+/*
+   Field values and shifted values for module GPIO.
+*/
+#define MXC_V_GPIO_FREE_PIN0_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN0_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN0_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN0_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN0_POS))
+#define MXC_S_GPIO_FREE_PIN0_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN0_AVAILABLE      << MXC_F_GPIO_FREE_PIN0_POS))
+
+#define MXC_V_GPIO_FREE_PIN1_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN1_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN1_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN1_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN1_POS))
+#define MXC_S_GPIO_FREE_PIN1_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN1_AVAILABLE      << MXC_F_GPIO_FREE_PIN1_POS))
+
+#define MXC_V_GPIO_FREE_PIN2_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN2_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN2_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN2_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN2_POS))
+#define MXC_S_GPIO_FREE_PIN2_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN2_AVAILABLE      << MXC_F_GPIO_FREE_PIN2_POS))
+
+#define MXC_V_GPIO_FREE_PIN3_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN3_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN3_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN3_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN3_POS))
+#define MXC_S_GPIO_FREE_PIN3_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN3_AVAILABLE      << MXC_F_GPIO_FREE_PIN3_POS))
+
+#define MXC_V_GPIO_FREE_PIN4_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN4_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN4_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN4_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN4_POS))
+#define MXC_S_GPIO_FREE_PIN4_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN4_AVAILABLE      << MXC_F_GPIO_FREE_PIN4_POS))
+
+#define MXC_V_GPIO_FREE_PIN5_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN5_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN5_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN5_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN5_POS))
+#define MXC_S_GPIO_FREE_PIN5_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN5_AVAILABLE      << MXC_F_GPIO_FREE_PIN5_POS))
+
+#define MXC_V_GPIO_FREE_PIN6_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN6_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN6_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN6_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN6_POS))
+#define MXC_S_GPIO_FREE_PIN6_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN6_AVAILABLE      << MXC_F_GPIO_FREE_PIN6_POS))
+
+#define MXC_V_GPIO_FREE_PIN7_NOT_AVAILABLE                                      ((uint32_t)(0x0x00000000UL))
+#define MXC_V_GPIO_FREE_PIN7_AVAILABLE                                          ((uint32_t)(0x0x00000001UL))
+
+#define MXC_S_GPIO_FREE_PIN7_NOT_AVAILABLE                                      ((uint32_t)(MXC_V_GPIO_FREE_PIN7_NOT_AVAILABLE  << MXC_F_GPIO_FREE_PIN7_POS))
+#define MXC_S_GPIO_FREE_PIN7_AVAILABLE                                          ((uint32_t)(MXC_V_GPIO_FREE_PIN7_AVAILABLE      << MXC_F_GPIO_FREE_PIN7_POS))
+
+#define MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP                                  ((uint32_t)(0x00000000UL))
+#define MXC_V_GPIO_OUT_MODE_OPEN_DRAIN                                          ((uint32_t)(0x00000001UL))
+#define MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP                              ((uint32_t)(0x00000002UL))
+#define MXC_V_GPIO_OUT_MODE_HIGH_Z                                              ((uint32_t)(0x00000003UL))
+#define MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z                                       ((uint32_t)(0x00000004UL))
+#define MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE                                        ((uint32_t)(0x00000005UL))
+#define MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z                                         ((uint32_t)(0x00000006UL))
+#define MXC_V_GPIO_OUT_MODE_SLOW_DRIVE                                          ((uint32_t)(0x00000007UL))
+#define MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z                                         ((uint32_t)(0x00000008UL))
+#define MXC_V_GPIO_OUT_MODE_FAST_DRIVE                                          ((uint32_t)(0x00000009UL))
+
+#define MXC_S_GPIO_OUT_MODE_PIN0_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN0_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN0_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN1_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN1_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN1_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN2_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN2_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN2_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN3_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN3_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN3_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN4_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN4_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN4_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN5_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN5_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN5_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN6_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN6_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN6_POS))
+
+#define MXC_S_GPIO_OUT_MODE_PIN7_HIGH_Z_WEAK_PULLUP                             ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP      << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_OPEN_DRAIN                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN              << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_OPEN_DRAIN_WEAK_PULLUP                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP  << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_HIGH_Z                                         ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z                  << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_NORMAL_HIGH_Z                                  ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z           << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_NORMAL_DRIVE                                   ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE            << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_SLOW_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_SLOW_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z                                    ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z             << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE                                     ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE              << MXC_F_GPIO_OUT_MODE_PIN7_POS))
+
+#define MXC_V_GPIO_INT_MODE_DISABLED                                            ((uint32_t)(0x00000000UL))
+#define MXC_V_GPIO_INT_MODE_FALLING_EDGE                                        ((uint32_t)(0x00000001UL))
+#define MXC_V_GPIO_INT_MODE_RISING_EDGE                                         ((uint32_t)(0x00000002UL))
+#define MXC_V_GPIO_INT_MODE_BOTH_EDGES                                          ((uint32_t)(0x00000003UL))
+#define MXC_V_GPIO_INT_MODE_LOW_LEVEL                                           ((uint32_t)(0x00000004UL))
+#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL                                          ((uint32_t)(0x00000005UL))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_GPIO_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/i2cm_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/i2cm_regs.h
new file mode 100644
index 0000000000..173d3107a3
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/i2cm_regs.h
@@ -0,0 +1,192 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_I2CM_REGS_H_
+#define _MXC_I2CM_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  i2cm_regs.h
+ * @addtogroup i2cm I2CM
+ * @{
+ */
+
+/*                                      Offset   Register Description
+                                        ======   ================================================ */
+typedef struct {
+    __IO uint32_t fs_clk_div;       /*  0x0000   Full Speed SCL Clock Settings                    */
+    __IO uint32_t hs_clk_div;       /*  0x0004   High Speed SCL Clock Settings                    */
+    __I uint32_t rsv0008;           /*  0x0008                                                    */
+    __IO uint32_t timeout;          /*  0x000C   [TO_CNTL] Timeout and Auto-Stop Settings         */
+    __IO uint32_t ctrl;             /*  0x0010   [EN_CNTL] I2C Master Control Register            */
+    __IO uint32_t trans;            /*  0x0014   [MSTR_CNTL] I2C Master Tx Start and Status Flags */
+    __IO uint32_t intfl;            /*  0x0018   Interrupt Flags                                  */
+    __IO uint32_t inten;            /*  0x001C   Interrupt Enable/Disable Controls                */
+    __I uint32_t rsv0020[2];        /*  0x0020                                                    */
+    __IO uint32_t bb;               /*  0x0028   Bit-Bang Control Register                        */
+} mxc_i2cm_regs_t;
+
+/*                                      Offset   Register Description
+                                        ======   ================================================ */
+typedef struct {
+    __IO uint32_t trans[512];       /*  0x0000   I2C Master Transaction FIFO                      */
+    __IO uint32_t rslts[512];       /*  0x0800   I2C Master Results FIFO                          */
+} mxc_i2cm_fifo_regs_t;
+
+/*
+   Register offsets for module I2CM.
+*/
+#define MXC_R_I2CM_OFFS_FS_CLK_DIV                ((uint32_t)0x00000000UL)
+#define MXC_R_I2CM_OFFS_HS_CLK_DIV                ((uint32_t)0x00000004UL)
+#define MXC_R_I2CM_OFFS_TIMEOUT                   ((uint32_t)0x0000000CUL)
+#define MXC_R_I2CM_OFFS_CTRL                      ((uint32_t)0x00000010UL)
+#define MXC_R_I2CM_OFFS_TRANS                     ((uint32_t)0x00000014UL)
+#define MXC_R_I2CM_OFFS_INTFL                     ((uint32_t)0x00000018UL)
+#define MXC_R_I2CM_OFFS_INTEN                     ((uint32_t)0x0000001CUL)
+#define MXC_R_I2CM_OFFS_BB                        ((uint32_t)0x00000028UL)
+#define MXC_R_I2CM_OFFS_AHB_RETRY                 ((uint32_t)0x00000030UL)
+
+#define MXC_R_I2CM_FIFO_OFFS_TRANS                ((uint32_t)0x00000000UL)
+#define MXC_R_I2CM_FIFO_OFFS_RSLTS                ((uint32_t)0x00000800UL)
+
+/*
+   Field positions and masks for module I2CM.
+*/
+#define MXC_S_I2CM_TRANS_TAG_START                0x000
+#define MXC_S_I2CM_TRANS_TAG_TXDATA_ACK           0x100
+#define MXC_S_I2CM_TRANS_TAG_TXDATA_NACK          0x200
+#define MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT         0x400
+#define MXC_S_I2CM_TRANS_TAG_RXDATA_NACK          0x500
+#define MXC_S_I2CM_TRANS_TAG_STOP                 0x700
+#define MXC_S_I2CM_RSTLS_TAG_DATA                 0x100
+#define MXC_S_I2CM_RSTLS_TAG_EMPTY                0x200
+
+#define MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS               0
+#define MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV                   ((uint32_t)(0x000000FFUL << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS))
+#define MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS                   8
+#define MXC_F_I2CM_CLK_DIV_SCL_LO_CNT                       ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS))
+#define MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS                   20
+#define MXC_F_I2CM_CLK_DIV_SCL_HI_CNT                       ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS))
+
+#define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS                   16
+#define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT                       ((uint32_t)(0x000000FFUL << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS))
+#define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS                 24
+#define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN                     ((uint32_t)(0x00000001UL << MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS))
+
+#define MXC_F_I2CM_CTRL_TX_FIFO_EN_POS                      2
+#define MXC_F_I2CM_CTRL_TX_FIFO_EN                          ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_TX_FIFO_EN_POS))
+#define MXC_F_I2CM_CTRL_RX_FIFO_EN_POS                      3
+#define MXC_F_I2CM_CTRL_RX_FIFO_EN                          ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_RX_FIFO_EN_POS))
+#define MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS                   7
+#define MXC_F_I2CM_CTRL_MSTR_RESET_EN                       ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS))
+
+#define MXC_F_I2CM_TRANS_TX_START_POS                       0
+#define MXC_F_I2CM_TRANS_TX_START                           ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_START_POS))
+#define MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS                 1
+#define MXC_F_I2CM_TRANS_TX_IN_PROGRESS                     ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS))
+#define MXC_F_I2CM_TRANS_TX_DONE_POS                        2
+#define MXC_F_I2CM_TRANS_TX_DONE                            ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_DONE_POS))
+#define MXC_F_I2CM_TRANS_TX_NACKED_POS                      3
+#define MXC_F_I2CM_TRANS_TX_NACKED                          ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_NACKED_POS))
+#define MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS                 4
+#define MXC_F_I2CM_TRANS_TX_LOST_ARBITR                     ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS))
+#define MXC_F_I2CM_TRANS_TX_TIMEOUT_POS                     5
+#define MXC_F_I2CM_TRANS_TX_TIMEOUT                         ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_TIMEOUT_POS))
+
+#define MXC_F_I2CM_INTFL_TX_DONE_POS                        0
+#define MXC_F_I2CM_INTFL_TX_DONE                            ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_DONE_POS))
+#define MXC_F_I2CM_INTFL_TX_NACKED_POS                      1
+#define MXC_F_I2CM_INTFL_TX_NACKED                          ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_NACKED_POS))
+#define MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS                 2
+#define MXC_F_I2CM_INTFL_TX_LOST_ARBITR                     ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS))
+#define MXC_F_I2CM_INTFL_TX_TIMEOUT_POS                     3
+#define MXC_F_I2CM_INTFL_TX_TIMEOUT                         ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_TIMEOUT_POS))
+#define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS                  4
+#define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS))
+#define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS               5
+#define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY                   ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS))
+#define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS              6
+#define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY                  ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS))
+#define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS                7
+#define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL                    ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS))
+#define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS                8
+#define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL                    ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS))
+#define MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS                   9
+#define MXC_F_I2CM_INTFL_RX_FIFO_FULL                       ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS))
+
+#define MXC_F_I2CM_INTEN_TX_DONE_POS                        0
+#define MXC_F_I2CM_INTEN_TX_DONE                            ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_DONE_POS))
+#define MXC_F_I2CM_INTEN_TX_NACKED_POS                      1
+#define MXC_F_I2CM_INTEN_TX_NACKED                          ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_NACKED_POS))
+#define MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS                 2
+#define MXC_F_I2CM_INTEN_TX_LOST_ARBITR                     ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS))
+#define MXC_F_I2CM_INTEN_TX_TIMEOUT_POS                     3
+#define MXC_F_I2CM_INTEN_TX_TIMEOUT                         ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_TIMEOUT_POS))
+#define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS                  4
+#define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS))
+#define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS               5
+#define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY                   ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS))
+#define MXC_F_I2CM_INTEN_RX_FIFO_EMPTY_POS                  6
+#define MXC_F_I2CM_INTEN_RX_FIFO_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_EMPTY_POS))
+#define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS                7
+#define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL                    ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS))
+#define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS                8
+#define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL                    ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS))
+#define MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS                   9
+#define MXC_F_I2CM_INTEN_RX_FIFO_FULL                       ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS))
+
+#define MXC_F_I2CM_BB_BB_SCL_OUT_POS                        0
+#define MXC_F_I2CM_BB_BB_SCL_OUT                            ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_OUT_POS))
+#define MXC_F_I2CM_BB_BB_SDA_OUT_POS                        1
+#define MXC_F_I2CM_BB_BB_SDA_OUT                            ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_OUT_POS))
+#define MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS                     2
+#define MXC_F_I2CM_BB_BB_SCL_IN_VAL                         ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS))
+#define MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS                     3
+#define MXC_F_I2CM_BB_BB_SDA_IN_VAL                         ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS))
+#define MXC_F_I2CM_BB_RX_FIFO_CNT_POS                       16
+#define MXC_F_I2CM_BB_RX_FIFO_CNT                           ((uint32_t)(0x0000001FUL << MXC_F_I2CM_BB_RX_FIFO_CNT_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/icc_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/icc_regs.h
new file mode 100644
index 0000000000..c8407a843c
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/icc_regs.h
@@ -0,0 +1,96 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_ICC_REGS_H_
+#define _MXC_ICC_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  icc_regs.h
+ * @addtogroup icc ICC
+ * @{
+ */
+
+/*                                              Offset   Register Description
+                                                ======   =================================================== */
+typedef struct {
+    __IO uint32_t id;                       /*  0x0000   Device ID Register                                  */
+    __IO uint32_t mem_cfg;                  /*  0x0004   Memory Configuration                                */
+    __I uint32_t rsv0008[62];               /*  0x0008                                                       */
+    __IO uint32_t ctrl_stat;                /*  0x0100   Control and Status                                  */
+    __I uint32_t rsv0104[383];              /*  0x0104                                                       */
+    __IO uint32_t invdt_all;                /*  0x0700   Invalidate (Clear) Cache Control                    */
+} mxc_icc_regs_t;
+
+/*
+   Register offsets for module ICC.
+*/
+#define MXC_R_ICC_OFFS_ID                       ((uint32_t)0x00000000UL)
+#define MXC_R_ICC_OFFS_MEM_CFG                  ((uint32_t)0x00000004UL)
+#define MXC_R_ICC_OFFS_CTRL_STAT                ((uint32_t)0x00000100UL)
+#define MXC_R_ICC_OFFS_INVDT_ALL                ((uint32_t)0x00000700UL)
+
+/*
+   Field positions and masks for module ICC.
+*/
+#define MXC_F_ICC_ID_RTL_VERSION_POS            0
+#define MXC_F_ICC_ID_RTL_VERSION                ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS))
+#define MXC_F_ICC_ID_PART_NUM_POS               6
+#define MXC_F_ICC_ID_PART_NUM                   ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS))
+#define MXC_F_ICC_ID_CACHE_ID_POS               10
+#define MXC_F_ICC_ID_CACHE_ID                   ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS))
+
+#define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS        0
+#define MXC_F_ICC_MEM_CFG_CACHE_SIZE            ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS))
+#define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS  16
+#define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE      ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS))
+
+#define MXC_F_ICC_CTRL_STAT_ENABLE_POS          0
+#define MXC_F_ICC_CTRL_STAT_ENABLE              ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS))
+#define MXC_F_ICC_CTRL_STAT_READY_POS           16
+#define MXC_F_ICC_CTRL_STAT_READY               ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_ICC_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/ioman_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/ioman_regs.h
new file mode 100644
index 0000000000..930a181595
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/ioman_regs.h
@@ -0,0 +1,508 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_IOMAN_REGS_H_
+#define _MXC_IOMAN_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  ioman_regs.h
+ * @addtogroup ioman IO MUX Manager
+ * @{
+ */
+
+typedef enum {
+    /** Pin Mapping 'A' */
+    MXC_E_IOMAN_MAPPING_A = 0,
+    /** Pin Mapping 'B' */
+    MXC_E_IOMAN_MAPPING_B,
+    /** Pin Mapping 'C' */
+    MXC_E_IOMAN_MAPPING_C,
+    /** Pin Mapping 'D' */
+    MXC_E_IOMAN_MAPPING_D,
+    /** Pin Mapping 'E' */
+    MXC_E_IOMAN_MAPPING_E,
+    /** Pin Mapping 'F' */
+    MXC_E_IOMAN_MAPPING_F,
+    /** Pin Mapping 'G' */
+    MXC_E_IOMAN_MAPPING_G,
+    /** Pin Mapping 'H' */
+    MXC_E_IOMAN_MAPPING_H,
+} ioman_mapping_t;
+
+/*                                      Offset   Register Description
+                                        ======   ========================================== */
+typedef struct {
+    __IO uint32_t wud_req0;         /*  0x0000   Wakeup Detect Mode Request Register 0      */
+    __IO uint32_t wud_req1;         /*  0x0004   Wakeup Detect Mode Request Register 1      */
+    __IO uint32_t wud_ack0;         /*  0x0008   Wakeup Detect Mode Acknowledge Register 0  */
+    __IO uint32_t wud_ack1;         /*  0x000C   Wakeup Detect Mode Acknowledge Register 1  */
+    __IO uint32_t ali_req0;         /*  0x0010   Analog Input Request Register 0            */
+    __IO uint32_t ali_req1;         /*  0x0014   Analog Input Request Register 1            */
+    __IO uint32_t ali_ack0;         /*  0x0018   Analog Input Acknowledge Register 0        */
+    __IO uint32_t ali_ack1;         /*  0x001C   Analog Input Acknowledge Register 1        */
+    __IO uint32_t spi0_req;         /*  0x0020   SPI0 I/O Mode Request                      */
+    __IO uint32_t spi0_ack;         /*  0x0024   SPI0 I/O Mode Acknowledge                  */
+    __IO uint32_t spi1_req;         /*  0x0028   SPI1 I/O Mode Request                      */
+    __IO uint32_t spi1_ack;         /*  0x002C   SPI1 I/O Mode Acknowledge                  */
+    __IO uint32_t spi2_req;         /*  0x0030   SPI2 I/O Mode Request                      */
+    __IO uint32_t spi2_ack;         /*  0x0034   SPI2 I/O Mode Acknowledge                  */
+    __IO uint32_t uart0_req;        /*  0x0038   UART0 I/O Mode Request                     */
+    __IO uint32_t uart0_ack;        /*  0x003C   UART0 I/O Mode Acknowledge                 */
+    __IO uint32_t uart1_req;        /*  0x0040   UART1 I/O Mode Request                     */
+    __IO uint32_t uart1_ack;        /*  0x0044   UART1 I/O Mode Acknowledge                 */
+    __IO uint32_t i2cm0_req;        /*  0x0048   I2C Master 0 I/O Request                   */
+    __IO uint32_t i2cm0_ack;        /*  0x004C   I2C Master 0 I/O Acknowledge               */
+    __IO uint32_t i2cs0_req;        /*  0x0050   I2C Slave 0 I/O Request                    */
+    __IO uint32_t i2s0_ack;         /*  0x0054   I2C Slave 0 I/O Acknowledge                */
+    __IO uint32_t lcd_com_req;      /*  0x0058   LCD COM Driver I/O Request                 */
+    __IO uint32_t lcd_com_ack;      /*  0x005C   LCD COM Driver I/O Acknowledge             */
+    __IO uint32_t lcd_seg_req0;     /*  0x0060   LCD SEG Driver I/O Request Register 0      */
+    __IO uint32_t lcd_seg_req1;     /*  0x0064   LCD SEG Driver I/O Request Register 1      */
+    __IO uint32_t lcd_seg_ack0;     /*  0x0068   LCD SEG Driver I/O Acknowledge Register 0  */
+    __IO uint32_t lcd_seg_ack1;     /*  0x006C   LCD SEG Driver I/O Acknowledge Register 1  */
+    __IO uint32_t crnt_req;         /*  0x0070   Current Drive I/O Request Register         */
+    __IO uint32_t io_crnt_ack;      /*  0x0074   Current Drive I/O Acknowledge Register     */
+    __IO uint32_t crnt_mode;        /*  0x0078   Current Drive I/O Mode Control             */
+    __IO uint32_t ali_connect0;     /*  0x007C   Analog I/O Connection Control Register 0   */
+    __IO uint32_t ali_connect1;     /*  0x0080   Analog I/O Connection Control Register 1   */
+    __IO uint32_t i2cm1_req;        /*  0x0084   I2C Master 1 I/O Request                   */
+    __IO uint32_t i2cm1_ack;        /*  0x0088   I2C Master 1 I/O Acknowledge               */
+    __IO uint32_t padx_control;     /*  0x008C   PADX Control                               */
+} mxc_ioman_regs_t;
+
+
+/*
+   Register offsets for module IOMAN.
+*/
+#define MXC_R_IOMAN_OFFS_WUD_REQ0                 ((uint32_t)0x00000000UL)
+#define MXC_R_IOMAN_OFFS_WUD_REQ1                 ((uint32_t)0x00000004UL)
+#define MXC_R_IOMAN_OFFS_WUD_ACK0                 ((uint32_t)0x00000008UL)
+#define MXC_R_IOMAN_OFFS_WUD_ACK1                 ((uint32_t)0x0000000CUL)
+#define MXC_R_IOMAN_OFFS_ALI_REQ0                 ((uint32_t)0x00000010UL)
+#define MXC_R_IOMAN_OFFS_ALI_REQ1                 ((uint32_t)0x00000014UL)
+#define MXC_R_IOMAN_OFFS_ALI_ACK0                 ((uint32_t)0x00000018UL)
+#define MXC_R_IOMAN_OFFS_ALI_ACK1                 ((uint32_t)0x0000001CUL)
+#define MXC_R_IOMAN_OFFS_SPI0_REQ                 ((uint32_t)0x00000020UL)
+#define MXC_R_IOMAN_OFFS_SPI0_ACK                 ((uint32_t)0x00000024UL)
+#define MXC_R_IOMAN_OFFS_SPI1_REQ                 ((uint32_t)0x00000028UL)
+#define MXC_R_IOMAN_OFFS_SPI1_ACK                 ((uint32_t)0x0000002CUL)
+#define MXC_R_IOMAN_OFFS_SPI2_REQ                 ((uint32_t)0x00000030UL)
+#define MXC_R_IOMAN_OFFS_SPI2_ACK                 ((uint32_t)0x00000034UL)
+#define MXC_R_IOMAN_OFFS_UART0_REQ                ((uint32_t)0x00000038UL)
+#define MXC_R_IOMAN_OFFS_UART0_ACK                ((uint32_t)0x0000003CUL)
+#define MXC_R_IOMAN_OFFS_UART1_REQ                ((uint32_t)0x00000040UL)
+#define MXC_R_IOMAN_OFFS_UART1_ACK                ((uint32_t)0x00000044UL)
+#define MXC_R_IOMAN_OFFS_I2CM0_REQ                ((uint32_t)0x00000048UL)
+#define MXC_R_IOMAN_OFFS_I2CM0_ACK                ((uint32_t)0x0000004CUL)
+#define MXC_R_IOMAN_OFFS_I2CS0_REQ                ((uint32_t)0x00000050UL)
+#define MXC_R_IOMAN_OFFS_I2SC0_ACK                ((uint32_t)0x00000054UL)
+#define MXC_R_IOMAN_OFFS_LCD_COM_REQ              ((uint32_t)0x00000058UL)
+#define MXC_R_IOMAN_OFFS_LCD_COM_ACK              ((uint32_t)0x0000005CUL)
+#define MXC_R_IOMAN_OFFS_LCD_SEG_REQ0             ((uint32_t)0x00000060UL)
+#define MXC_R_IOMAN_OFFS_LCD_SEG_REQ1             ((uint32_t)0x00000064UL)
+#define MXC_R_IOMAN_OFFS_LCD_SEG_ACK0             ((uint32_t)0x00000068UL)
+#define MXC_R_IOMAN_OFFS_LCD_SEG_ACK1             ((uint32_t)0x0000006CUL)
+#define MXC_R_IOMAN_OFFS_IO_CRNT_REQ              ((uint32_t)0x00000070UL)
+#define MXC_R_IOMAN_OFFS_IO_CRNT_ACK              ((uint32_t)0x00000074UL)
+#define MXC_R_IOMAN_OFFS_IO_CRNT_MODE             ((uint32_t)0x00000078UL)
+#define MXC_R_IOMAN_OFFS_ALI_CONNECT0             ((uint32_t)0x0000007CUL)
+#define MXC_R_IOMAN_OFFS_ALI_CONNECT1             ((uint32_t)0x00000080UL)
+#define MXC_R_IOMAN_OFFS_I2CM1_REQ                ((uint32_t)0x00000084UL)
+#define MXC_R_IOMAN_OFFS_I2CM1_ACK                ((uint32_t)0x00000088UL)
+#define MXC_R_IOMAN_OFFS_PADX_CONTROL             ((uint32_t)0x0000008CUL)
+
+
+/*
+   Field positions and masks for module IOMAN.
+*/
+#define MXC_F_IOMAN_WUD_REQ0_PORT0_POS                      0
+#define MXC_F_IOMAN_WUD_REQ0_PORT0                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ0_PORT0_POS))
+#define MXC_F_IOMAN_WUD_REQ0_PORT1_POS                      8
+#define MXC_F_IOMAN_WUD_REQ0_PORT1                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ0_PORT1_POS))
+#define MXC_F_IOMAN_WUD_REQ0_PORT2_POS                      16
+#define MXC_F_IOMAN_WUD_REQ0_PORT2                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ0_PORT2_POS))
+#define MXC_F_IOMAN_WUD_REQ0_PORT3_POS                      24
+#define MXC_F_IOMAN_WUD_REQ0_PORT3                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ0_PORT3_POS))
+
+#define MXC_F_IOMAN_WUD_REQ1_PORT4_POS                      0
+#define MXC_F_IOMAN_WUD_REQ1_PORT4                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ1_PORT4_POS))
+#define MXC_F_IOMAN_WUD_REQ1_PORT5_POS                      8
+#define MXC_F_IOMAN_WUD_REQ1_PORT5                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ1_PORT5_POS))
+#define MXC_F_IOMAN_WUD_REQ1_PORT6_POS                      16
+#define MXC_F_IOMAN_WUD_REQ1_PORT6                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ1_PORT6_POS))
+#define MXC_F_IOMAN_WUD_REQ1_PORT7_POS                      24
+#define MXC_F_IOMAN_WUD_REQ1_PORT7                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_REQ1_PORT7_POS))
+
+#define MXC_F_IOMAN_WUD_ACK0_PORT0_POS                      0
+#define MXC_F_IOMAN_WUD_ACK0_PORT0                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK0_PORT0_POS))
+#define MXC_F_IOMAN_WUD_ACK0_PORT1_POS                      8
+#define MXC_F_IOMAN_WUD_ACK0_PORT1                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK0_PORT1_POS))
+#define MXC_F_IOMAN_WUD_ACK0_PORT2_POS                      16
+#define MXC_F_IOMAN_WUD_ACK0_PORT2                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK0_PORT2_POS))
+#define MXC_F_IOMAN_WUD_ACK0_PORT3_POS                      24
+#define MXC_F_IOMAN_WUD_ACK0_PORT3                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK0_PORT3_POS))
+
+#define MXC_F_IOMAN_WUD_ACK1_PORT4_POS                      0
+#define MXC_F_IOMAN_WUD_ACK1_PORT4                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK1_PORT4_POS))
+#define MXC_F_IOMAN_WUD_ACK1_PORT5_POS                      8
+#define MXC_F_IOMAN_WUD_ACK1_PORT5                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK1_PORT5_POS))
+#define MXC_F_IOMAN_WUD_ACK1_PORT6_POS                      16
+#define MXC_F_IOMAN_WUD_ACK1_PORT6                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK1_PORT6_POS))
+#define MXC_F_IOMAN_WUD_ACK1_PORT7_POS                      24
+#define MXC_F_IOMAN_WUD_ACK1_PORT7                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_WUD_ACK1_PORT7_POS))
+
+#define MXC_F_IOMAN_ALI_REQ0_PORT0_POS                      0
+#define MXC_F_IOMAN_ALI_REQ0_PORT0                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ0_PORT0_POS))
+#define MXC_F_IOMAN_ALI_REQ0_PORT1_POS                      8
+#define MXC_F_IOMAN_ALI_REQ0_PORT1                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ0_PORT1_POS))
+#define MXC_F_IOMAN_ALI_REQ0_PORT2_POS                      16
+#define MXC_F_IOMAN_ALI_REQ0_PORT2                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ0_PORT2_POS))
+#define MXC_F_IOMAN_ALI_REQ0_PORT3_POS                      24
+#define MXC_F_IOMAN_ALI_REQ0_PORT3                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ0_PORT3_POS))
+
+#define MXC_F_IOMAN_ALI_REQ1_PORT4_POS                      0
+#define MXC_F_IOMAN_ALI_REQ1_PORT4                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ1_PORT4_POS))
+#define MXC_F_IOMAN_ALI_REQ1_PORT5_POS                      8
+#define MXC_F_IOMAN_ALI_REQ1_PORT5                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ1_PORT5_POS))
+#define MXC_F_IOMAN_ALI_REQ1_PORT6_POS                      16
+#define MXC_F_IOMAN_ALI_REQ1_PORT6                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ1_PORT6_POS))
+#define MXC_F_IOMAN_ALI_REQ1_PORT7_POS                      24
+#define MXC_F_IOMAN_ALI_REQ1_PORT7                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_REQ1_PORT7_POS))
+
+#define MXC_F_IOMAN_ALI_ACK0_PORT0_POS                      0
+#define MXC_F_IOMAN_ALI_ACK0_PORT0                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK0_PORT0_POS))
+#define MXC_F_IOMAN_ALI_ACK0_PORT1_POS                      8
+#define MXC_F_IOMAN_ALI_ACK0_PORT1                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK0_PORT1_POS))
+#define MXC_F_IOMAN_ALI_ACK0_PORT2_POS                      16
+#define MXC_F_IOMAN_ALI_ACK0_PORT2                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK0_PORT2_POS))
+#define MXC_F_IOMAN_ALI_ACK0_PORT3_POS                      24
+#define MXC_F_IOMAN_ALI_ACK0_PORT3                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK0_PORT3_POS))
+
+#define MXC_F_IOMAN_ALI_ACK1_PORT4_POS                      0
+#define MXC_F_IOMAN_ALI_ACK1_PORT4                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK1_PORT4_POS))
+#define MXC_F_IOMAN_ALI_ACK1_PORT5_POS                      8
+#define MXC_F_IOMAN_ALI_ACK1_PORT5                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK1_PORT5_POS))
+#define MXC_F_IOMAN_ALI_ACK1_PORT6_POS                      16
+#define MXC_F_IOMAN_ALI_ACK1_PORT6                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK1_PORT6_POS))
+#define MXC_F_IOMAN_ALI_ACK1_PORT7_POS                      24
+#define MXC_F_IOMAN_ALI_ACK1_PORT7                          ((uint32_t)(0x000000FFUL << MXC_F_IOMAN_ALI_ACK1_PORT7_POS))
+
+#define MXC_F_IOMAN_SPI_MAPPING_POS                         0
+#define MXC_F_IOMAN_SPI_MAPPING                             ((uint32_t)(0x00000003UL << MXC_F_IOMAN_SPI_MAPPING_POS))
+#define MXC_F_IOMAN_SPI_CORE_IO_POS                         4
+#define MXC_F_IOMAN_SPI_CORE_IO                             ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_CORE_IO_POS))
+#define MXC_F_IOMAN_SPI_SS0_IO_POS                          8
+#define MXC_F_IOMAN_SPI_SS0_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SS0_IO_POS))
+#define MXC_F_IOMAN_SPI_SS1_IO_POS                          9
+#define MXC_F_IOMAN_SPI_SS1_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SS1_IO_POS))
+#define MXC_F_IOMAN_SPI_SS2_IO_POS                          10
+#define MXC_F_IOMAN_SPI_SS2_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SS2_IO_POS))
+#define MXC_F_IOMAN_SPI_SS3_IO_POS                          11
+#define MXC_F_IOMAN_SPI_SS3_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SS3_IO_POS))
+#define MXC_F_IOMAN_SPI_SS4_IO_POS                          12
+#define MXC_F_IOMAN_SPI_SS4_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SS4_IO_POS))
+#define MXC_F_IOMAN_SPI_SR0_IO_POS                          16
+#define MXC_F_IOMAN_SPI_SR0_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SR0_IO_POS))
+#define MXC_F_IOMAN_SPI_SR1_IO_POS                          17
+#define MXC_F_IOMAN_SPI_SR1_IO                              ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_SR1_IO_POS))
+#define MXC_F_IOMAN_SPI_QUAD_IO_POS                         20
+#define MXC_F_IOMAN_SPI_QUAD_IO                             ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_QUAD_IO_POS))
+#define MXC_F_IOMAN_SPI_FAST_MODE_POS                       24
+#define MXC_F_IOMAN_SPI_FAST_MODE                           ((uint32_t)(0x00000001UL << MXC_F_IOMAN_SPI_FAST_MODE_POS))
+
+#define MXC_F_IOMAN_UART_MAPPING_POS                        0
+#define MXC_F_IOMAN_UART_MAPPING                            ((uint32_t)(0x00000003UL << MXC_F_IOMAN_UART_MAPPING_POS))
+#define MXC_F_IOMAN_UART_CORE_IO_POS                        4
+#define MXC_F_IOMAN_UART_CORE_IO                            ((uint32_t)(0x00000001UL << MXC_F_IOMAN_UART_CORE_IO_POS))
+#define MXC_F_IOMAN_UART_CTS_IO_POS                         5
+#define MXC_F_IOMAN_UART_CTS_IO                             ((uint32_t)(0x00000001UL << MXC_F_IOMAN_UART_CTS_IO_POS))
+#define MXC_F_IOMAN_UART_RTS_IO_POS                         6
+#define MXC_F_IOMAN_UART_RTS_IO                             ((uint32_t)(0x00000001UL << MXC_F_IOMAN_UART_RTS_IO_POS))
+
+#define MXC_F_IOMAN_I2CM_MAPPING_POS                        0
+#define MXC_F_IOMAN_I2CM_MAPPING                            ((uint32_t)(0x00000003UL << MXC_F_IOMAN_I2CM_MAPPING_POS))
+#define MXC_F_IOMAN_I2CM_CORE_IO_POS                        4
+#define MXC_F_IOMAN_I2CM_CORE_IO                            ((uint32_t)(0x00000001UL << MXC_F_IOMAN_I2CM_CORE_IO_POS))
+
+#define MXC_F_IOMAN_I2CS_MAPPING_POS                        0
+#define MXC_F_IOMAN_I2CS_MAPPING                            ((uint32_t)(0x00000003UL << MXC_F_IOMAN_I2CS_MAPPING_POS))
+#define MXC_F_IOMAN_I2CS_CORE_IO_POS                        4
+#define MXC_F_IOMAN_I2CS_CORE_IO                            ((uint32_t)(0x00000001UL << MXC_F_IOMAN_I2CS_CORE_IO_POS))
+
+#define MXC_F_IOMAN_LCD_COM_REQ_COM_IO_POS                  0
+#define MXC_F_IOMAN_LCD_COM_REQ_COM_IO                      ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_COM_REQ_COM_IO_POS))
+
+#define MXC_F_IOMAN_LCD_COM_ACK_COM_IO_POS                  0
+#define MXC_F_IOMAN_LCD_COM_ACK_COM_IO                      ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_COM_ACK_COM_IO_POS))
+
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_24_POS              0
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_24                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_24_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_25_POS              1
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_25                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_25_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_26_POS              2
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_26                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_26_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_27_POS              3
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_27                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_27_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_28_POS              4
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_28                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_28_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_29_POS              5
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_29                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_29_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_30_POS              6
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_30                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_30_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_31_POS              7
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_31                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_31_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_32_POS              8
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_32                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_32_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_33_POS              9
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_33                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_33_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_34_POS              10
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_34                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_34_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_35_POS              11
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_35                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_35_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_36_POS              12
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_36                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_36_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_37_POS              13
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_37                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_37_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_38_POS              14
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_38                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_38_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_39_POS              15
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_39                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_39_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_40_POS              16
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_40                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_40_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_41_POS              17
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_41                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_41_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_42_POS              18
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_42                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_42_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_43_POS              19
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_43                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_43_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_44_POS              20
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_44                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_44_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_45_POS              21
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_45                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_45_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_46_POS              22
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_46                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_46_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_47_POS              23
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_47                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_47_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_48_POS              24
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_48                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_48_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_49_POS              25
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_49                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_49_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_50_POS              26
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_50                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_50_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_51_POS              27
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_51                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_51_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_52_POS              28
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_52                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_52_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_53_POS              29
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_53                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_53_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_54_POS              30
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_54                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_54_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_55_POS              31
+#define MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_55                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ0_IO_REQ_55_POS))
+
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_56_POS              0
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_56                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_56_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_57_POS              1
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_57                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_57_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_58_POS              2
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_58                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_58_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_59_POS              3
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_59                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_59_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_60_POS              4
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_60                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_60_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_61_POS              5
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_61                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_61_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_62_POS              6
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_62                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_62_POS))
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_63_POS              7
+#define MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_63                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_REQ1_IO_REQ_63_POS))
+
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_24_POS              0
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_24                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_24_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_25_POS              1
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_25                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_25_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_26_POS              2
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_26                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_26_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_27_POS              3
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_27                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_27_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_28_POS              4
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_28                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_28_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_29_POS              5
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_29                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_29_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_30_POS              6
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_30                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_30_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_31_POS              7
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_31                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_31_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_32_POS              8
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_32                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_32_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_33_POS              9
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_33                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_33_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_34_POS              10
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_34                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_34_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_35_POS              11
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_35                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_35_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_36_POS              12
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_36                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_36_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_37_POS              13
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_37                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_37_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_38_POS              14
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_38                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_38_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_39_POS              15
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_39                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_39_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_40_POS              16
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_40                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_40_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_41_POS              17
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_41                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_41_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_42_POS              18
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_42                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_42_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_43_POS              19
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_43                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_43_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_44_POS              20
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_44                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_44_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_45_POS              21
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_45                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_45_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_46_POS              22
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_46                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_46_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_47_POS              23
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_47                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_47_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_48_POS              24
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_48                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_48_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_49_POS              25
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_49                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_49_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_50_POS              26
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_50                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_50_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_51_POS              27
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_51                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_51_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_52_POS              28
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_52                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_52_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_53_POS              29
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_53                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_53_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_54_POS              30
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_54                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_54_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_55_POS              31
+#define MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_55                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK0_IO_ACK_55_POS))
+
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_56_POS              0
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_56                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_56_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_57_POS              1
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_57                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_57_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_58_POS              2
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_58                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_58_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_59_POS              3
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_59                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_59_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_60_POS              4
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_60                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_60_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_61_POS              5
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_61                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_61_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_62_POS              6
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_62                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_62_POS))
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_63_POS              7
+#define MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_63                  ((uint32_t)(0x00000001UL << MXC_F_IOMAN_LCD_SEG_ACK1_IO_ACK_63_POS))
+
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT0_POS               0
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT0                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT0_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT1_POS               1
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT1                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT1_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT2_POS               2
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT2                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT2_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT3_POS               3
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT3                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT3_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT4_POS               4
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT4                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT4_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT5_POS               5
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT5                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT5_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT6_POS               6
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT6                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT6_POS))
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT7_POS               7
+#define MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT7                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_REQ_IO_REQ_CRNT7_POS))
+
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT0_POS               0
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT0                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT0_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT1_POS               1
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT1                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT1_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT2_POS               2
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT2                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT2_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT3_POS               3
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT3                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT3_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT4_POS               4
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT4                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT4_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT5_POS               5
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT5                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT5_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT6_POS               6
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT6                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT6_POS))
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT7_POS               7
+#define MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT7                   ((uint32_t)(0x00000001UL << MXC_F_IOMAN_CRNT_ACK_IO_ACK_CRNT7_POS))
+
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT0_POS                  0
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT0                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT0_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT1_POS                  4
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT1                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT1_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT2_POS                  8
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT2                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT2_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT3_POS                  12
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT3                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT3_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT4_POS                  16
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT4                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT4_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT5_POS                  20
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT5                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT5_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT6_POS                  24
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT6                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT6_POS))
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT7_POS                  28
+#define MXC_F_IOMAN_CRNT_MODE_IO_CRNT7                      ((uint32_t)(0x0000000FUL << MXC_F_IOMAN_CRNT_MODE_IO_CRNT7_POS))
+
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_POWER_CONTROL_POS     0
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_POWER_CONTROL         ((uint32_t)(0x00000001UL << MXC_F_IOMAN_PADX_CONTROL_PADX_POWER_CONTROL_POS))
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_OUT_MODE_POS    4
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_OUT_MODE        ((uint32_t)(0x00000003UL << MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_OUT_MODE_POS))
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_INPUT_STATE_POS 6
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_INPUT_STATE     ((uint32_t)(0x00000001UL << MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO0_INPUT_STATE_POS))
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_OUT_MODE_POS    8
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_OUT_MODE        ((uint32_t)(0x00000003UL << MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_OUT_MODE_POS))
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_INPUT_STATE_POS 10
+#define MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_INPUT_STATE     ((uint32_t)(0x00000001UL << MXC_F_IOMAN_PADX_CONTROL_PADX_GPIO1_INPUT_STATE_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_IOMAN_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/lcd_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/lcd_regs.h
new file mode 100644
index 0000000000..db8223fdf8
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/lcd_regs.h
@@ -0,0 +1,70 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_LCD_REGS_H
+#define _MXC_LCD_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  lcd_regs.h
+ * @addtogroup lcd LCD
+ * @{
+ */
+
+#define MXC_LCD_ADDRESS_SEGS 21
+
+/*                                 Offset   Register Description
+                                   ======   ======================================================= */
+typedef struct {    
+    __IO uint32_t lcfg;         /* 0x0000                                                           */
+    __IO uint32_t lcra;         /* 0x0004                                                           */
+    __IO uint32_t lpcf;         /* 0x0008  LCD Port Configuration Register                          */
+    __IO uint32_t lcaddr;       /* 0x000C                                                           */
+    __IO uint32_t lcdata;       /* 0x0010  LCD Memory Data Read / Write                             */
+    __IO uint32_t lpwrctrl;     /* 0x0014  LCD Power Control                                        */
+} mxc_lcd_regs_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* _MXC_LCD_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/maa_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/maa_regs.h
new file mode 100644
index 0000000000..e8c80c712b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/maa_regs.h
@@ -0,0 +1,124 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_MAA_REGS_H_
+#define _MXC_MAA_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  maa_regs.h
+ * @addtogroup maa MAA
+ * @{
+ */
+
+/*                                    Offset   Register Description
+                                      ======   ========================================================== */
+typedef struct {
+    __IO uint32_t ctrl;           /*  0x0000   MAA Control, Configuration and Status                      */
+    __IO uint32_t maws;           /*  0x0004   MAA Word (Operand) Size, Big/Little Endian Mode Select     */
+} mxc_maa_regs_t;
+
+/*                                    Offset   Register Description
+                                      ======   ========================================================== */
+typedef struct {
+    __IO uint32_t seg0[16];        /*  0x0000   [64 bytes] MAA Memory Segment 0                            */
+    __IO uint32_t seg1[16];        /*  0x0040   [64 bytes] MAA Memory Segment 1                            */
+    __IO uint32_t seg2[16];        /*  0x0080   [64 bytes] MAA Memory Segment 2                            */
+    __IO uint32_t seg3[16];        /*  0x00C0   [64 bytes] MAA Memory Segment 3                            */
+    __IO uint32_t seg4[16];        /*  0x0100   [64 bytes] MAA Memory Segment 4                            */
+    __IO uint32_t seg5[16];        /*  0x0140   [64 bytes] MAA Memory Segment 5                            */
+} mxc_maa_mem_regs_t;
+
+/*
+   Register offsets for module MAA.
+*/
+#define MXC_R_MAA_OFFS_CTRL         ((uint32_t)0x00000000UL)
+#define MXC_R_MAA_OFFS_MAWS         ((uint32_t)0x00000004UL)
+#define MXC_R_MAA_MEM_OFFS_SEG0     ((uint32_t)0x00000000UL)
+#define MXC_R_MAA_MEM_OFFS_SEG1     ((uint32_t)0x00000040UL)
+#define MXC_R_MAA_MEM_OFFS_SEG2     ((uint32_t)0x00000080UL)
+#define MXC_R_MAA_MEM_OFFS_SEG3     ((uint32_t)0x000000C0UL)
+#define MXC_R_MAA_MEM_OFFS_SEG4     ((uint32_t)0x00000100UL)
+#define MXC_R_MAA_MEM_OFFS_SEG5     ((uint32_t)0x00000140UL)
+
+/*
+   Field positions and masks for module MAA.
+*/
+#define MXC_F_MAA_CTRL_START_POS    0
+#define MXC_F_MAA_CTRL_START        ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_START_POS))
+#define MXC_F_MAA_CTRL_OPSEL_POS    1
+#define MXC_F_MAA_CTRL_OPSEL        ((uint32_t)(0x00000007UL << MXC_F_MAA_CTRL_OPSEL_POS))
+#define MXC_F_MAA_CTRL_OCALC_POS    4
+#define MXC_F_MAA_CTRL_OCALC        ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_OCALC_POS))
+#define MXC_F_MAA_CTRL_INTEN_POS    5
+#define MXC_F_MAA_CTRL_INTEN        ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_INTEN_POS))
+#define MXC_F_MAA_CTRL_IF_DONE_POS  6
+#define MXC_F_MAA_CTRL_IF_DONE      ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_DONE_POS))
+#define MXC_F_MAA_CTRL_IF_ERROR_POS 7
+#define MXC_F_MAA_CTRL_IF_ERROR     ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_ERROR_POS))
+#define MXC_F_MAA_CTRL_OFS_A_POS    8
+#define MXC_F_MAA_CTRL_OFS_A        ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_A_POS))
+#define MXC_F_MAA_CTRL_OFS_B_POS    10
+#define MXC_F_MAA_CTRL_OFS_B        ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_B_POS))
+#define MXC_F_MAA_CTRL_OFS_EXP_POS  12
+#define MXC_F_MAA_CTRL_OFS_EXP      ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_EXP_POS))
+#define MXC_F_MAA_CTRL_OFS_MOD_POS  14
+#define MXC_F_MAA_CTRL_OFS_MOD      ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_MOD_POS))
+#define MXC_F_MAA_CTRL_SEG_A_POS    16
+#define MXC_F_MAA_CTRL_SEG_A        ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_A_POS))
+#define MXC_F_MAA_CTRL_SEG_B_POS    20
+#define MXC_F_MAA_CTRL_SEG_B        ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_B_POS))
+#define MXC_F_MAA_CTRL_SEG_RES_POS  24
+#define MXC_F_MAA_CTRL_SEG_RES      ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_RES_POS))
+#define MXC_F_MAA_CTRL_SEG_TMP_POS  28
+#define MXC_F_MAA_CTRL_SEG_TMP      ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_TMP_POS))
+
+#define MXC_F_MAA_MAWS_MODLEN_POS   0
+#define MXC_F_MAA_MAWS_MODLEN       ((uint32_t)(0x000003FFUL << MXC_F_MAA_MAWS_MODLEN_POS))
+#define MXC_F_MAA_MAWS_BYTESWAP_POS 16
+#define MXC_F_MAA_MAWS_BYTESWAP     ((uint32_t)(0x00000001UL << MXC_F_MAA_MAWS_BYTESWAP_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_MAA_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h
new file mode 100644
index 0000000000..5b50a7aabe
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h
@@ -0,0 +1,666 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MAX32600_H_
+#define _MAX32600_H_
+
+#include <stdint.h>
+
+typedef enum IRQn_Type {
+    NonMaskableInt_IRQn = -14,
+    HardFault_IRQn = -13,
+    MemoryManagement_IRQn = -12,
+    BusFault_IRQn = -11,
+    UsageFault_IRQn = -10,
+    SVCall_IRQn = -5,
+    DebugMonitor_IRQn = -4,
+    PendSV_IRQn = -2,
+    SysTick_IRQn = -1,
+
+    /* Externals interrupts */
+    UART0_IRQn = 0,      /* 16:01 UART0 */
+    UART1_IRQn,          /* 17: 2 UART1 */
+    I2CM0_IRQn,          /* 18: 3 I2C Master 0 */
+    I2CS_IRQn,           /* 19: 4 I2C Slave */
+    USB_IRQn,            /* 20: 5 USB */
+    PMU_IRQn,            /* 21: 6 DMA */
+    AFE_IRQn,            /* 22: 7 AFE */
+    MAA_IRQn,            /* 23: 8 MAA */
+    AES_IRQn,            /* 24: 9 AES */
+    SPI0_IRQn,           /* 25:10 SPI0 */
+    SPI1_IRQn,           /* 26:11 SPI1 */
+    SPI2_IRQn,           /* 27:12 SPI2 */
+    TMR0_IRQn,           /* 28:13 Timer32-0 */
+    TMR1_IRQn,           /* 29:14 Timer32-1 */
+    TMR2_IRQn,           /* 30:15 Timer32-1 */
+    TMR3_IRQn,           /* 31:16 Timer32-2 */
+    RSVD0_IRQn,          /* 32:17 RSVD */
+    RSVD1_IRQn,          /* 33:18 RSVD */
+    DAC0_IRQn,           /* 34:19 DAC0  (12-bit DAC) */
+    DAC1_IRQn,           /* 35:20 DAC1  (12-bit DAC) */
+    DAC2_IRQn,           /* 36:21 DAC2  (8-bit DAC) */
+    DAC3_IRQn,           /* 37:22 DAC3  (8-bit DAC) */
+    ADC_IRQn,            /* 38:23 ADC */
+    FLC_IRQn,            /* 39:24 Flash Controller */
+    PWRMAN_IRQn,         /* 40:25 PWRMAN */
+    CLKMAN_IRQn,         /* 41:26 CLKMAN */
+    RTC0_IRQn,           /* 42:27 RTC INT0 */
+    RTC1_IRQn,           /* 43:28 RTC INT1 */
+    RTC2_IRQn,           /* 44:29 RTC INT2 */
+    RTC3_IRQn,           /* 45:30 RTC INT3 */
+    WDT0_IRQn,           /* 46:31 WATCHDOG0 */
+    WDT0_P_IRQn,         /* 47:32 WATCHDOG0 PRE-WINDOW */
+    WDT1_IRQn,           /* 48:33 WATCHDOG1 */
+    WDT1_P_IRQn,         /* 49:34 WATCHDOG1 PRE-WINDOW */
+    GPIO_P0_IRQn,        /* 50:35 GPIO Port 0  */
+    GPIO_P1_IRQn,        /* 51:36 GPIO Port 1  */
+    GPIO_P2_IRQn,        /* 52:37 GPIO Port 2  */
+    GPIO_P3_IRQn,        /* 53:38 GPIO Port 3  */
+    GPIO_P4_IRQn,        /* 54:39 GPIO Port 4  */
+    GPIO_P5_IRQn,        /* 55:40 GPIO Port 5  */
+    GPIO_P6_IRQn,        /* 56:41 GPIO Port 6  */
+    GPIO_P7_IRQn,        /* 57:42 GPIO Port 7  */
+    TMR16_0_IRQn,        /* 58:43 Timer16-s0 */
+    TMR16_1_IRQn,        /* 59:44 Timer16-s1 */
+    TMR16_2_IRQn,        /* 60:45 Timer16-s2 */
+    TMR16_3_IRQn,        /* 61:46 Timer16-s3 */
+    I2CM1_IRQn,          /* 62:47 I2C Master 1 */
+    MXC_IRQ_EXT_COUNT,
+} IRQn_Type;
+
+#define MXC_IRQ_COUNT (MXC_IRQ_EXT_COUNT + 16)
+
+/* ================================================================================ */
+/* ================      Processor and Core Peripheral Section     ================ */
+/* ================================================================================ */
+
+#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */
+
+#include <core_cm3.h>                       /* Processor and core peripherals */
+#include "system_max32600.h"                /* System Header */
+
+/* ================================================================================ */
+/* ==================       Device Specific Memory Section       ================== */
+/* ================================================================================ */
+
+#define MXC_FLASH_MEM_BASE    0x00000000UL
+#define MXC_FLASH_PAGE_SIZE   0x1000        // 256 x 128b = 4KB
+#define MXC_FLASH_MEM_SIZE    0x00040000UL
+#define MXC_SYS_MEM_BASE      0x20000000UL
+
+/* ================================================================================ */
+/* ================       Device Specific Peripheral Section       ================ */
+/* ================================================================================ */
+
+/*******************************************************************************/
+/*                                            General Purpose I/O Ports (GPIO) */
+
+#define MXC_BASE_GPIO                   ((uint32_t)0x40000000UL)
+#define MXC_GPIO                        ((mxc_gpio_regs_t *)MXC_BASE_GPIO)
+#define MXC_BASE_GPIO_BITBAND           ((uint32_t)0x42000000UL)
+
+#define MXC_GPIO_GET_IRQ(i)             (((unsigned int)i) + GPIO_P0_IRQn)
+
+
+/*******************************************************************************/
+/*                                                      Pulse Train Generation */
+
+#define MXC_CFG_PT_INSTANCES             (13)
+
+#define MXC_BASE_PTG                     ((uint32_t)0x40001000UL)
+#define MXC_PTG                          ((mxc_ptg_regs_t *)MXC_BASE_PTG)
+#define MXC_BASE_PT                      ((uint32_t)0x40001008UL)
+#define MXC_PT                           ((mxc_pt_regs_t *)MXC_BASE_PT)
+#define MXC_BASE_PT0                     ((uint32_t)0x40001008UL)
+#define MXC_PT0                          ((mxc_pt_regs_t *)MXC_BASE_PT0)
+#define MXC_BASE_PT1                     ((uint32_t)0x40001010UL)
+#define MXC_PT1                          ((mxc_pt_regs_t *)MXC_BASE_PT1)
+#define MXC_BASE_PT2                     ((uint32_t)0x40001018UL)
+#define MXC_PT2                          ((mxc_pt_regs_t *)MXC_BASE_PT2)
+#define MXC_BASE_PT3                     ((uint32_t)0x40001020UL)
+#define MXC_PT3                          ((mxc_pt_regs_t *)MXC_BASE_PT3)
+#define MXC_BASE_PT4                     ((uint32_t)0x40001028UL)
+#define MXC_PT4                          ((mxc_pt_regs_t *)MXC_BASE_PT4)
+#define MXC_BASE_PT5                     ((uint32_t)0x40001030UL)
+#define MXC_PT5                          ((mxc_pt_regs_t *)MXC_BASE_PT5)
+#define MXC_BASE_PT6                     ((uint32_t)0x40001038UL)
+#define MXC_PT6                          ((mxc_pt_regs_t *)MXC_BASE_PT6)
+#define MXC_BASE_PT7                     ((uint32_t)0x40001040UL)
+#define MXC_PT7                          ((mxc_pt_regs_t *)MXC_BASE_PT7)
+#define MXC_BASE_PT8                     ((uint32_t)0x40001048UL)
+#define MXC_PT8                          ((mxc_pt_regs_t *)MXC_BASE_PT8)
+#define MXC_BASE_PT9                     ((uint32_t)0x40001050UL)
+#define MXC_PT9                          ((mxc_pt_regs_t *)MXC_BASE_PT9)
+#define MXC_BASE_PT10                    ((uint32_t)0x40001058UL)
+#define MXC_PT10                         ((mxc_pt_regs_t *)MXC_BASE_PT10)
+#define MXC_BASE_PT11                    ((uint32_t)0x40001060UL)
+#define MXC_PT11                         ((mxc_pt_regs_t *)MXC_BASE_PT11)
+
+/*                                       PT12, PT13, PT14 are not used         */
+
+/*******************************************************************************/
+/*                                                        CRC-16/CRC-32 Engine */
+
+#define MXC_BASE_CRC                    ((uint32_t)0x40010000UL)
+#define MXC_CRC_REGS                    ((mxc_crc_regs_t *)MXC_BASE_CRC)
+
+#define MXC_BASE_CRC_DATA               ((uint32_t)0x4010B000UL)
+#define MXC_CRC_DATA                    ((mxc_crc_data_regs_t *)MXC_BASE_CRC_DATA)
+
+/*******************************************************************************/
+/*                                                 Trust Protection Unit (TPU) */
+
+#define MXC_BASE_TPU                     ((uint32_t)0x40011000UL)
+#define MXC_TPU                          ((mxc_tpu_regs_t *)MXC_BASE_TPU)
+
+#define MXC_BASE_TPU_TSR                 ((uint32_t)0x40011C00UL)
+#define MXC_TPU_TSR                      ((mxc_tpu_tsr_regs_t *)MXC_BASE_TPU_TSR)
+
+/*******************************************************************************/
+/*                                                    AES Cryptographic Engine */
+
+#define MXC_BASE_AES                     ((uint32_t)0x40011400UL)
+#define MXC_AES                          ((mxc_aes_regs_t *)MXC_BASE_AES)
+
+#define MXC_BASE_AES_MEM                 ((uint32_t)0x4010A000UL)
+#define MXC_AES_MEM                      ((mxc_aes_mem_regs_t *)MXC_BASE_AES_MEM)
+
+
+/*******************************************************************************/
+/*                                                    MAA Cryptographic Engine */
+
+#define MXC_BASE_MAA                     ((uint32_t)0x40011800UL)
+#define MXC_MAA                          ((mxc_maa_regs_t *)MXC_BASE_MAA)
+
+#define MXC_BASE_MAA_MEM                 ((uint32_t)0x4010A800UL)
+#define MXC_MAA_MEM                      ((mxc_maa_mem_regs_t *)MXC_BASE_MAA_MEM)
+
+/*******************************************************************************/
+/*                                                    32-Bit PWM Timer/Counter */
+
+#define MXC_CFG_TMR_INSTANCES            (4)
+
+#define MXC_BASE_TMR0                    ((uint32_t)0x40012000UL)
+#define MXC_BASE_TMR0_BITBAND            ((uint32_t)0x42240000UL)
+#define MXC_TMR0                         ((mxc_tmr_regs_t *) MXC_BASE_TMR0)
+
+#define MXC_BASE_TMR1                    ((uint32_t)0x40013000UL)
+#define MXC_BASE_TMR1_BITBAND            ((uint32_t)0x42260000UL)
+#define MXC_TMR1                         ((mxc_tmr_regs_t *) MXC_BASE_TMR1)
+
+#define MXC_BASE_TMR2                    ((uint32_t)0x40014000UL)
+#define MXC_BASE_TMR2_BITBAND            ((uint32_t)0x42280000UL)
+#define MXC_TMR2                         ((mxc_tmr_regs_t *) MXC_BASE_TMR2)
+
+#define MXC_BASE_TMR3                    ((uint32_t)0x40015000UL)
+#define MXC_BASE_TMR3_BITBAND            ((uint32_t)0x422A0000UL)
+#define MXC_TMR3                         ((mxc_tmr_regs_t *) MXC_BASE_TMR3)
+
+
+#define MXC_TMR_GET_IRQ_32(i)            ((i) == 0 ? TMR0_IRQn :    \
+                                          (i) == 1 ? TMR1_IRQn :    \
+                                          (i) == 2 ? TMR2_IRQn :    \
+                                          (i) == 3 ? TMR3_IRQn : 0)
+
+#define MXC_TMR_GET_IRQ_16(i)            ((i) == 0 ? TMR0_IRQn :    \
+                                          (i) == 1 ? TMR1_IRQn :    \
+                                          (i) == 2 ? TMR2_IRQn :    \
+                                          (i) == 3 ? TMR3_IRQn :    \
+                                          (i) == 4 ? TMR16_0_IRQn :    \
+                                          (i) == 5 ? TMR16_1_IRQn :    \
+                                          (i) == 6 ? TMR16_2_IRQn :    \
+                                          (i) == 7 ? TMR16_3_IRQn : 0)
+
+#define MXC_TMR_GET_BASE(i)              ((i) == 0 ? MXC_BASE_TMR0 : \
+                                          (i) == 1 ? MXC_BASE_TMR1 : \
+                                          (i) == 2 ? MXC_BASE_TMR2 : \
+                                          (i) == 3 ? MXC_BASE_TMR3 : 0)
+
+#define MXC_TMR_GET_TMR(i)               ((i) == 0 ? MXC_TMR0 : \
+                                          (i) == 1 ? MXC_TMR1 : \
+                                          (i) == 2 ? MXC_TMR2 : \
+                                          (i) == 3 ? MXC_TMR3 : 0)
+/*******************************************************************************/
+/*                                                              Watchdog Timer */
+
+#define MXC_CFG_WDT_INSTANCES            (2)
+
+#define MXC_BASE_WDT0                    ((uint32_t)0x40021000UL)
+#define MXC_BASE_WDT0_BITBAND            ((uint32_t)0x42420000UL)
+#define MXC_WDT0                         ((mxc_wdt_regs_t *)MXC_BASE_WDT0)
+
+#define MXC_BASE_WDT1                    ((uint32_t)0x40022000UL)
+#define MXC_BASE_WDT1_BITBAND            ((uint32_t)0x42440000UL)
+#define MXC_WDT1                         ((mxc_wdt_regs_t *)MXC_BASE_WDT1)
+
+#define MXC_WDT_GET_IRQ(i)               ((i) == 0 ? WDT0_IRQn : \
+                                          (i) == 1 ? WDT1_IRQn : 0)
+
+#define MXC_WDT_GET_IRQ_P(i)             ((i) == 0 ? WDT0_P_IRQn : \
+                                          (i) == 1 ? WDT1_P_IRQn : 0)
+
+#define MXC_WDT_GET_BASE(i)              ((i) == 0 ? MXC_BASE_WDT0 : \
+                                          (i) == 1 ? MXC_BASE_WDT1 : 0)
+
+#define MXC_WDT_GET_WDT(i)               ((i) == 0 ? MXC_WDT0 : \
+                                          (i) == 1 ? MXC_WDT1 : 0)
+
+/*******************************************************************************/
+/*                                                               SPI Interface */
+
+#define MXC_CFG_SPI_INSTANCES            (3)
+#define MXC_CFG_SPI_FIFO_DEPTH           (16)
+
+#define MXC_BASE_SPI0                    ((uint32_t)0x40030000UL)
+#define MXC_SPI0                         ((mxc_spi_regs_t *)MXC_BASE_SPI0)
+
+#define MXC_BASE_SPI0_TXFIFO             ((uint32_t)0x40100000UL)
+#define MXC_SPI0_TXFIFO                  ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI0_TXFIFO)
+#define MXC_BASE_SPI0_RXFIFO             ((uint32_t)0x40100800UL)
+#define MXC_SPI0_RXFIFO                  ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI0_RXFIFO)
+
+#define MXC_BASE_SPI1                    ((uint32_t)0x40031000UL)
+#define MXC_SPI1                         ((mxc_spi_regs_t *)MXC_BASE_SPI1)
+
+#define MXC_BASE_SPI1_TXFIFO             ((uint32_t)0x40101000UL)
+#define MXC_SPI1_TXFIFO                  ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI1_TXFIFO)
+#define MXC_BASE_SPI1_RXFIFO             ((uint32_t)0x40101800UL)
+#define MXC_SPI1_RXFIFO                  ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI1_RXFIFO)
+
+#define MXC_BASE_SPI2                    ((uint32_t)0x40032000UL)
+#define MXC_SPI2                         ((mxc_spi_regs_t *)MXC_BASE_SPI2)
+
+#define MXC_BASE_SPI2_TXFIFO             ((uint32_t)0x40102000UL)
+#define MXC_SPI2_TXFIFO                  ((mxc_spi_txfifo_regs_t *)MXC_BASE_SPI2_TXFIFO)
+#define MXC_BASE_SPI2_RXFIFO             ((uint32_t)0x40102800UL)
+#define MXC_SPI2_RXFIFO                  ((mxc_spi_rxfifo_regs_t *)MXC_BASE_SPI2_RXFIFO)
+
+
+#define MXC_SPI_GET_IRQ(i)               ((i) == 0 ? SPI0_IRQn :       \
+                                          (i) == 1 ? SPI1_IRQn :       \
+                                          (i) == 2 ? SPI2_IRQn : 0)
+
+#define MXC_SPI_GET_BASE(i)              ((i) == 0 ? MXC_BASE_SPI0 :      \
+                                          (i) == 1 ? MXC_BASE_SPI1 :      \
+                                          (i) == 2 ? MXC_BASE_SPI2 : 0)
+
+#define MXC_SPI_GET_SPI(i)               ((i) == 0 ? MXC_SPI0 :      \
+                                          (i) == 1 ? MXC_SPI1 :      \
+                                          (i) == 2 ? MXC_SPI2 : 0)
+
+#define MXC_SPI_GET_RXFIFO(i)            ((i) == 0 ? MXC_SPI0_RXFIFO :      \
+                                          (i) == 1 ? MXC_SPI1_RXFIFO :      \
+                                          (i) == 2 ? MXC_SPI2_RXFIFO : 0)
+
+#define MXC_SPI_GET_TXFIFO(i)            ((i) == 0 ? MXC_SPI0_TXFIFO :      \
+                                          (i) == 1 ? MXC_SPI1_TXFIFO :      \
+                                          (i) == 2 ? MXC_SPI2_TXFIFO : 0)
+
+#define MXC_SPI_INSTANCE_TO_BASE(instance) (((uint32_t)(instance) << 12) + MXC_BASE_SPI0)
+#define MXC_SPI_BASE_TO_INSTANCE(base)     (((uint32_t)(base) & 0x00003000) >> 12)
+
+
+/*******************************************************************************/
+/*                                                              UART Interface */
+
+#define MXC_CFG_UART_INSTANCES           (2)
+
+#define MXC_BASE_UART0                   ((uint32_t)0x40038000UL)
+#define MXC_BASE_UART0_BITBAND           ((uint32_t)0x42700000UL)
+#define MXC_UART0                        ((mxc_uart_regs_t *)MXC_BASE_UART0)
+
+#define MXC_BASE_UART1                   ((uint32_t)0x40039000UL)
+#define MXC_BASE_UART1_BITBAND           ((uint32_t)0x42720000UL)
+#define MXC_UART1                        ((mxc_uart_regs_t *)MXC_BASE_UART1)
+
+
+#define MXC_UART_GET_IRQ(i)              ((i) == 0 ? UART0_IRQn :      \
+                                          (i) == 1 ? UART1_IRQn : 0)
+
+#define MXC_UART_GET_BASE(i)             ((i) == 0 ? MXC_BASE_UART0 :     \
+                                          (i) == 1 ? MXC_BASE_UART1 : 0)
+
+#define MXC_UART_GET_UART(i)             ((i) == 0 ? MXC_UART0 :     \
+                                          (i) == 1 ? MXC_UART1 : 0)
+
+#define MXC_UART_INSTANCE_TO_BASE(instance) (((uint32_t)(instance) << 12) + MXC_BASE_UART0)
+#define MXC_UART_BASE_TO_INSTANCE(base)     (((uint32_t)(base) & 0x00001000) >> 12)
+
+
+/*******************************************************************************/
+/*                                                        I2C Master Interface */
+
+#define MXC_CFG_I2CM_INSTANCES           (2)
+
+#define MXC_BASE_I2CM0                   ((uint32_t)0x40040000UL)
+#define MXC_BASE_I2CM0_BITBAND           ((uint32_t)0x42800000UL)
+#define MXC_I2CM0                        ((mxc_i2cm_regs_t *)MXC_BASE_I2CM0)
+#define MXC_BASE_I2CM0_TX_FIFO           ((uint32_t)0x40103000UL)
+#define MXC_BASE_I2CM0_RX_FIFO           ((uint32_t)0x40103800UL)
+
+#define MXC_BASE_I2CM1                   ((uint32_t)0x40042000UL)
+#define MXC_BASE_I2CM1_BITBAND           ((uint32_t)0x42840000UL)
+#define MXC_I2CM1                        ((mxc_i2cm_regs_t *)MXC_BASE_I2CM1)
+#define MXC_BASE_I2CM1_TX_FIFO           ((uint32_t)0x4010D000UL)
+#define MXC_BASE_I2CM1_RX_FIFO           ((uint32_t)0x4010D800UL)
+
+#define MXC_I2CM_GET_IRQ(i)              ((i) == 0 ? I2CM0_IRQn :      \
+                                          (i) == 1 ? I2CM1_IRQn : 0)
+
+#define MXC_I2CM_GET_BASE(i)             ((i) == 0 ? MXC_BASE_I2CM0 :     \
+                                          (i) == 1 ? MXC_BASE_I2CM1 : 0)
+
+#define MXC_I2CM_GET_I2CM(i)             ((i) == 0 ? MXC_I2CM0 :     \
+                                          (i) == 1 ? MXC_I2CM1 : 0)
+
+#define MXC_I2CM_GET_BASE_TX_FIFO(i)     ((i) == 0 ? MXC_BASE_I2CM0_TX_FIFO :  \
+                                          (i) == 1 ? MXC_BASE_I2CM1_TX_FIFO : 0)
+
+#define MXC_I2CM_GET_BASE_RX_FIFO(i)     ((i) == 0 ? MXC_BASE_I2CM0_RX_FIFO :  \
+                                          (i) == 1 ? MXC_BASE_I2CM1_RX_FIFO : 0)
+
+#define MXC_I2CM_INSTANCE_TO_BASE(instance)   (((uint32_t)(instance) << 13) + MXC_BASE_I2CM0)
+#define MXC_I2CM_BASE_TO_INSTANCE(base)       (((uint32_t)(base) & 0x00002000) >> 13)
+
+
+/*******************************************************************************/
+/*                                                         I2C Slave Interface */
+
+#define MXC_CFG_I2CS_INSTANCES           (1)
+
+#define MXC_BASE_I2CS0                   ((uint32_t)0x40041000UL)
+#define MXC_BASE_I2CS0_BITBAND           ((uint32_t)0x42820000UL)
+#define MXC_I2CS0                        ((mxc_i2cs_regs_t *)MXC_BASE_I2CS0)
+
+#define MXC_BASE_I2CS0_FIFO              ((uint32_t)0x40104000UL)
+#define MXC_I2CS0_FIFO                   ((mxc_i2cs_fifo_regs_t *)MXC_BASE_I2CS0)
+
+
+
+/*******************************************************************************/
+/*                                                                        DACs */
+
+#define MXC_CFG_DAC_INSTANCES            (4)
+#define MXC_CFG_DAC_FIFO_DEPTH           (32)
+
+#define MXC_BASE_DAC0                    ((uint32_t)0x40050000UL)
+#define MXC_DAC0                         ((mxc_dac_regs_t *)MXC_BASE_DAC0)
+#define MXC_BASE_DAC0_FIFO               ((uint32_t)0x40105000UL)
+#define MXC_DAC0_FIFO                    ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC0_FIFO)
+#define MXC_DAC0_WIDTH                   ((uint8_t)(2))
+
+#define MXC_BASE_DAC1                    ((uint32_t)0x40051000UL)
+#define MXC_DAC1                         ((mxc_dac_regs_t *)MXC_BASE_DAC1)
+#define MXC_BASE_DAC1_FIFO               ((uint32_t)0x40106000UL)
+#define MXC_DAC1_FIFO                    ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC1_FIFO)
+#define MXC_DAC1_WIDTH                   ((uint8_t)(2))
+
+#define MXC_BASE_DAC2                    ((uint32_t)0x40052000UL)
+#define MXC_DAC2                         ((mxc_dac_regs_t *)MXC_BASE_DAC2)
+#define MXC_BASE_DAC2_FIFO               ((uint32_t)0x40107000UL)
+#define MXC_DAC2_FIFO                    ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC2_FIFO)
+#define MXC_DAC2_WIDTH                   ((uint8_t)(1))
+
+#define MXC_BASE_DAC3                    ((uint32_t)0x40053000UL)
+#define MXC_DAC3                         ((mxc_dac_regs_t *)MXC_BASE_DAC3)
+#define MXC_BASE_DAC3_FIFO               ((uint32_t)0x40108000UL)
+#define MXC_DAC3_FIFO                    ((mxc_dac_fifo_regs_t *)MXC_BASE_DAC3_FIFO)
+#define MXC_DAC3_WIDTH                   ((uint8_t)(1))
+
+
+#define MXC_DAC_GET_IRQ(i)               ((i) == 0 ? DAC0_IRQn :     \
+                                          (i) == 1 ? DAC1_IRQn :     \
+                                          (i) == 2 ? DAC2_IRQn :     \
+                                          (i) == 3 ? DAC3_IRQn : 0)
+
+
+#define MXC_DAC_GET_BASE(i) (i == 0 ? MXC_BASE_DAC0 : \
+                             i == 1 ? MXC_BASE_DAC1 : \
+                             i == 2 ? MXC_BASE_DAC2 : \
+                             i == 3 ? MXC_BASE_DAC3 : 0)
+
+#define MXC_DAC_GET_FIFO(i) (i == 0 ? MXC_BASE_DAC0_FIFO : \
+                             i == 1 ? MXC_BASE_DAC1_FIFO : \
+                             i == 2 ? MXC_BASE_DAC2_FIFO  : \
+                             i == 3 ? MXC_BASE_DAC3_FIFO  : 0)
+
+#define MXC_DAC_GET_PMU_FIFO_IRQ(i) (i == 0 ? PMU_IRQ_DAC0_FIFO_AE : \
+                                     i == 1 ? PMU_IRQ_DAC1_FIFO_AE : \
+                                     i == 2 ? PMU_IRQ_DAC2_FIFO_AE  : \
+                                     i == 3 ? PMU_IRQ_DAC3_FIFO_AE  : 0)
+
+#define MXC_DAC_GET_DAC(i)  (i == 0 ? MXC_DAC0 : \
+                             i == 1 ? MXC_DAC1 : \
+                             i == 2 ? MXC_DAC2 : \
+                             i == 3 ? MXC_DAC3 : 0)
+
+#define MXC_DAC_GET_WIDTH(i)  (i == 0 ? MXC_DAC0_WIDTH : \
+                               i == 1 ? MXC_DAC1_WIDTH : \
+                               i == 2 ? MXC_DAC2_WIDTH : \
+                               i == 3 ? MXC_DAC3_WIDTH : 0)
+
+
+/*******************************************************************************/
+/*                                                            Analog Front End */
+
+#define MXC_BASE_AFE                     ((uint32_t)0x4005401CUL)
+#define MXC_AFE                          ((mxc_afe_regs_t *)MXC_BASE_AFE)
+
+
+
+/*******************************************************************************/
+/*                                                                         ADC */
+
+#define MXC_CFG_ADC_FIFO_DEPTH           ((uint32_t)(32))
+
+#define MXC_BASE_ADC                     ((uint32_t)0x40054000UL)
+#define MXC_ADC                          ((mxc_adc_regs_t *)MXC_BASE_ADC)
+
+#define MXC_BASE_ADCCFG                  ((uint32_t)0x40054038UL)
+#define MXC_ADCCFG                       ((mxc_adccfg_regs_t *)MXC_BASE_ADCCFG)
+
+#define MXC_BASE_ADC_FIFO                ((uint32_t)0x40109000UL)
+#define MXC_ADC_FIFO                     ((mxc_adc_fifo_regs_t *)MXC_BASE_ADC_FIFO)
+
+
+
+/*******************************************************************************/
+/*                                                                         LCD */
+#define MXC_BASE_LCD                     ((uint32_t)0x40060000)
+#define MXC_LCD                          ((mxc_lcd_regs_t *)MXC_BASE_LCD)
+
+/*******************************************************************************/
+/*                  Peripheral Management Unit (PMU) - formerly DMA Controller */
+
+#define MXC_CFG_PMU_CHANNELS             (6)
+
+#define MXC_BASE_PMU0                    ((uint32_t)0x40070000UL)
+#define MXC_PMU0                         ((mxc_pmu_regs_t *)MXC_BASE_PMU0)
+#define MXC_BASE_PMU1                    ((uint32_t)0x40070020UL)
+#define MXC_PMU1                         ((mxc_pmu_regs_t *)MXC_BASE_PMU1)
+#define MXC_BASE_PMU2                    ((uint32_t)0x40070040UL)
+#define MXC_PMU2                         ((mxc_pmu_regs_t *)MXC_BASE_PMU2)
+#define MXC_BASE_PMU3                    ((uint32_t)0x40070060UL)
+#define MXC_PMU3                         ((mxc_pmu_regs_t *)MXC_BASE_PMU3)
+#define MXC_BASE_PMU4                    ((uint32_t)0x40070080UL)
+#define MXC_PMU4                         ((mxc_pmu_regs_t *)MXC_BASE_PMU4)
+#define MXC_BASE_PMU5                    ((uint32_t)0x400700A0UL)
+#define MXC_PMU5                         ((mxc_pmu_regs_t *)MXC_BASE_PMU5)
+
+#define MXC_BASE_PMU_BITBAND            ((uint32_t)0x42E00000UL)
+#define MXC_BASE_PMU_BITBAND_CHOFFSET   ((uint32_t)0x00000400UL)
+/*******************************************************************************/
+
+typedef enum {
+    PMU_IRQ_DAC0_FIFO_AE,
+    PMU_IRQ_DAC1_FIFO_AE,
+    PMU_IRQ_DAC2_FIFO_AE,
+    PMU_IRQ_DAC3_FIFO_AE,
+    PMU_IRQ_DAC0_DONE,
+    PMU_IRQ_DAC1_DONE,
+    PMU_IRQ_DAC2_DONE,
+    PMU_IRQ_DAC3_DONE,
+    PMU_IRQ_ADC_FIFO_AF,
+    PMU_IRQ_ADC_DONE,
+    PMU_IRQ_I2C_MST0_DONE,
+    PMU_IRQ_I2C_MST1_DONE,
+    PMU_IRQ_SPI0_RSLTS_DONE,
+    PMU_IRQ_SPI1_RSLTS_DONE,
+    PMU_IRQ_SPI2_RSLTS_DONE,
+    PMU_IRQ_MAA_DONE,
+    PMU_IRQ_SPI0_TX_FIFO_AE,
+    PMU_IRQ_SPI0_RSLTS_FIFO_AF,
+    PMU_IRQ_SPI1_TX_FIFO_AE,
+    PMU_IRQ_SPI1_RSLTS_FIFO_AF,
+    PMU_IRQ_SPI2_TX_FIFO_AE,
+    PMU_IRQ_SPI3_RSLTS_FIFO_AF,
+    PMU_IRQ_I2C_MST0_TRANS_FIFO,
+    PMU_IRQ_I2C_MST0_RSLT_FIFO,
+    PMU_IRQ_I2C_MST1_TRANS_FIFO,
+    PMU_IRQ_I2C_MST2_RSLT_FIFO,
+    PMU_IRQ_I2C_SLV_TRANS_FIFO,
+    PMU_IRQ_I2C_SLV_RSLT_FIFO,
+    PMU_IRQ_UART0_TX_FIFO,
+    PMU_IRQ_UART0_RX_FIFO,
+    PMU_IRQ_UART1_TX_FIFO,
+    PMU_IRQ_UART1_RX_FIFO,
+    PMU_IRQ_SPI0_EXCP,
+    PMU_IRQ_SPI1_EXCP,
+    PMU_IRQ_SPI2_EXCP,
+    PMU_IRQ_RSVD0,
+    PMU_IRQ_I2C_MST0_EXCP,
+    PMU_IRQ_I2C_MST1_EXCP,
+    PMU_IRQ_I2C_SLV_EXCP,
+    PMU_IRQ_RSVD1,
+    PMU_IRQ_GPIO0,
+    PMU_IRQ_GPIO1,
+    PMU_IRQ_GPIO2,
+    PMU_IRQ_GPIO3,
+    PMU_IRQ_GPIO4,
+    PMU_IRQ_GPIO5,
+    PMU_IRQ_GPIO6,
+    PMU_IRQ_GPIO7,
+    PMU_IRQ_GPIO8,
+    PMU_IRQ_AFE_COMP_NMI,
+    PMU_IRQ_AES_ENGINE,
+} pmu_int_mask_t;
+
+/*******************************************************************************/
+/*                                                                         USB */
+
+#define MXC_BASE_USB                     ((uint32_t)0x4010C000UL)
+#define MXC_USB                          ((mxc_usb_regs_t *)MXC_BASE_USB)
+
+#define MXC_USB_MAX_PACKET               (64)
+#define MXC_USB_NUM_EP                   (8)
+
+
+/*******************************************************************************/
+/*                                                Instruction Cache Controller */
+
+#define MXC_BASE_ICC                     ((uint32_t)0x40080000UL)
+#define MXC_ICC                          ((mxc_icc_regs_t *)MXC_BASE_ICC)
+
+/*                                                              System Manager */
+
+#define MXC_BASE_SYSMAN                 ((uint32_t)0x40090000UL)
+
+/*******************************************************************************/
+/*                                                               Clock Manager */
+
+#define MXC_BASE_CLKMAN                  ((uint32_t)0x40090400UL)
+#define MXC_CLKMAN                       ((mxc_clkman_regs_t *)MXC_BASE_CLKMAN)
+
+
+/*******************************************************************************/
+/*                                                               Power Manager */
+
+#define MXC_BASE_PWRMAN                  ((uint32_t)0x40090800UL)
+#define MXC_PWRMAN                       ((mxc_pwrman_regs_t *)MXC_BASE_PWRMAN)
+
+/*******************************************************************************/
+/*                                                                 I/O Manager */
+
+#define MXC_BASE_IOMAN                   ((uint32_t)0x40090C00UL)
+#define MXC_IOMAN                        ((mxc_ioman_regs_t *)MXC_BASE_IOMAN)
+
+
+/*******************************************************************************/
+/*                                                           RTC: Timer/Alarms */
+
+#define MXC_BASE_RTCTMR                 ((uint32_t)0x40090A00UL)
+#define MXC_RTCTMR                       ((mxc_rtctmr_regs_t *)MXC_BASE_RTCTMR)
+
+#define MXC_RTCTMR_GET_IRQ(i) (i == 0 ? RTC0_IRQn :    \
+                               i == 1 ? RTC1_IRQn :    \
+                               i == 2 ? RTC2_IRQn :    \
+                               i == 3 ? RTC3_IRQn : 0)
+
+#define MXC_BASE_RTCCFG                  ((uint32_t)0x40090A70UL)
+#define MXC_RTCCFG                       ((mxc_rtccfg_regs_t *)MXC_BASE_RTCCFG)
+/*******************************************************************************/
+/*                                                        RTC: Power Sequencer */
+
+#define MXC_BASE_PWRSEQ                  ((uint32_t)0x40090A30UL)
+#define MXC_PWRSEQ                       ((mxc_pwrseq_regs_t *)MXC_BASE_PWRSEQ)
+
+/*******************************************************************************/
+/*                                                       Trim Shadow Registers */
+
+#define MXC_BASE_TRIM                    ((uint32_t)0x400E0000UL)
+#define MXC_TRIM                         ((mxc_ftr_regs_t *)MXC_BASE_TRIM)
+
+/*******************************************************************************/
+/*                                          Flash Memory Controller / Security */
+
+#define MXC_BASE_FLC                     ((uint32_t)0x400F0000UL)
+#define MXC_FLC                          ((mxc_flc_regs_t *)MXC_BASE_FLC)
+#define MXC_BASE_FLC_BITBAND             ((uint32_t)0x43E00000UL)
+#define MXC_FLC_PAGE_SIZE_SHIFT          11
+#define MXC_FLC_PAGE_SIZE                (1 << MXC_FLC_PAGE_SIZE_SHIFT)
+#define MXC_FLC_PAGE_ERASE_MSK           ((~(1 << (MXC_FLC_PAGE_SIZE_SHIFT - 1))) >> MXC_FLC_PAGE_SIZE_SHIFT) << MXC_FLC_PAGE_SIZE_SHIFT
+
+/*******************************************************************************/
+
+#define MXC_SET_FIELD(reg, clr, set) (*(volatile uint32_t *)reg = ((*(volatile uint32_t *)reg & ~clr) | set))
+
+/*******************************************************************************/
+
+#define BITBAND(reg, bit)        ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2))
+#define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0
+#define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1
+#define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit))
+
+/*******************************************************************************/
+
+#endif  /* _MAX32600_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pmu_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pmu_regs.h
new file mode 100644
index 0000000000..e36b9b04e6
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pmu_regs.h
@@ -0,0 +1,111 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_PMU_REGS_H_
+#define _MXC_PMU_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  pmu_regs.h
+ * @addtogroup pmu PMU
+ * @{
+ */
+
+/*                                     Offset   Register Description
+                                       ======   ======================================================== */
+typedef struct {
+    __IO uint32_t dscadr;          /*  0x0000   Starting Descriptor Address                              */
+    __IO uint32_t cfg;             /*  0x0004   Channel Configuration                                    */
+    __IO uint32_t loop;            /*  0x0008   Channel Loop Counters                                    */
+    __IO uint32_t op;              /*  0x000C   Current Descriptor DWORD 0 (OP)                          */
+    __IO uint32_t dsc1;            /*  0x0010   Current Descriptor DWORD 1                               */
+    __IO uint32_t dsc2;            /*  0x0014   Current Descriptor DWORD 2                               */
+    __IO uint32_t dsc3;            /*  0x0018   Current Descriptor DWORD 3                               */
+    __IO uint32_t dsc4;            /*  0x001C   Current Descriptor DWORD 4                               */
+} mxc_pmu_regs_t;
+
+/*
+   Register offsets for module PMU.
+*/
+#define MXC_R_PMU_OFFS_DSCADR                     ((uint32_t)0x00000000UL)
+#define MXC_R_PMU_OFFS_CFG                        ((uint32_t)0x00000004UL)
+#define MXC_R_PMU_OFFS_LOOP                       ((uint32_t)0x00000008UL)
+#define MXC_R_PMU_OFFS_OP                         ((uint32_t)0x0000000CUL)
+#define MXC_R_PMU_OFFS_DSC1                       ((uint32_t)0x00000010UL)
+#define MXC_R_PMU_OFFS_DSC2                       ((uint32_t)0x00000014UL)
+#define MXC_R_PMU_OFFS_DSC3                       ((uint32_t)0x00000018UL)
+#define MXC_R_PMU_OFFS_DSC4                       ((uint32_t)0x0000001CUL)
+
+/*
+   Field positions and masks for module PMU.
+*/
+#define MXC_F_PMU_CFG_ENABLE_POS                            0
+#define MXC_F_PMU_CFG_ENABLE                                ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_ENABLE_POS))
+#define MXC_F_PMU_CFG_LL_STOPPED_POS                        2
+#define MXC_F_PMU_CFG_LL_STOPPED                            ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_LL_STOPPED_POS))
+#define MXC_F_PMU_CFG_MANUAL_POS                            3
+#define MXC_F_PMU_CFG_MANUAL                                ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_MANUAL_POS))
+#define MXC_F_PMU_CFG_BUS_ERROR_POS                         4
+#define MXC_F_PMU_CFG_BUS_ERROR                             ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_BUS_ERROR_POS))
+#define MXC_F_PMU_CFG_TO_STAT_POS                           6
+#define MXC_F_PMU_CFG_TO_STAT                               ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_TO_STAT_POS))
+#define MXC_F_PMU_CFG_TO_SEL_POS                            11
+#define MXC_F_PMU_CFG_TO_SEL                                ((uint32_t)(0x00000007UL << MXC_F_PMU_CFG_TO_SEL_POS))
+#define MXC_F_PMU_CFG_PS_SEL_POS                            14
+#define MXC_F_PMU_CFG_PS_SEL                                ((uint32_t)(0x00000003UL << MXC_F_PMU_CFG_PS_SEL_POS))
+#define MXC_F_PMU_CFG_INTERRUPT_POS                         16
+#define MXC_F_PMU_CFG_INTERRUPT                             ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_INTERRUPT_POS))
+#define MXC_F_PMU_CFG_INT_EN_POS                            17
+#define MXC_F_PMU_CFG_INT_EN                                ((uint32_t)(0x00000001UL << MXC_F_PMU_CFG_INT_EN_POS))
+#define MXC_F_PMU_CFG_BURST_SIZE_POS                        24
+#define MXC_F_PMU_CFG_BURST_SIZE                            ((uint32_t)(0x0000001FUL << MXC_F_PMU_CFG_BURST_SIZE_POS))
+
+#define MXC_F_PMU_LOOP_COUNTER_0_POS                        0
+#define MXC_F_PMU_LOOP_COUNTER_0                            ((uint32_t)(0x0000FFFFUL << MXC_F_PMU_LOOP_COUNTER_0_POS))
+#define MXC_F_PMU_LOOP_COUNTER_1_POS                        16
+#define MXC_F_PMU_LOOP_COUNTER_1                            ((uint32_t)(0x0000FFFFUL << MXC_F_PMU_LOOP_COUNTER_1_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_PMU_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pt_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pt_regs.h
new file mode 100644
index 0000000000..53936e390f
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pt_regs.h
@@ -0,0 +1,175 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_PT_REGS_H_
+#define _MXC_PT_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  pt_regs.h
+ * @addtogroup pt PT
+ * @{
+ */
+
+typedef struct {
+    __IO uint32_t ctrl;
+    __IO uint32_t resync;
+} mxc_ptg_regs_t;
+
+/*                                      Offset   Register Description
+                                        ======   ================================================== */
+typedef struct {
+    __IO uint32_t rate_length;      /*  0x0000   Pulse train Output length and rate                 */
+    __IO uint32_t train;            /*  0x0004   Pulse Train Output Pattern                         */
+} mxc_pt_regs_t;
+
+/*
+   Register offsets for module PT.
+*/
+#define MXC_R_PTG_OFFS_CTRL                         ((uint32_t)0x00000000UL)
+#define MXC_R_PTG_OFFS_RESYNC                       ((uint32_t)0x00000004UL)
+#define MXC_R_PT_OFFS_RATE_LENGTH                   ((uint32_t)0x00000000UL)
+#define MXC_R_PT_OFFS_TRAIN                         ((uint32_t)0x00000004UL)
+
+
+/*
+   Field positions and masks for module PT.
+*/
+#define MXC_F_PT_CTRL_ENABLE_ALL_POS                1
+#define MXC_F_PT_CTRL_ENABLE_ALL                    ((uint32_t)(0x00000001UL << MXC_F_PT_CTRL_ENABLE_ALL_POS))
+
+#define MXC_F_PT_RESYNC_PT0_POS                     0
+#define MXC_F_PT_RESYNC_PT0                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT0_POS))
+#define MXC_F_PT_RESYNC_PT1_POS                     1
+#define MXC_F_PT_RESYNC_PT1                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT1_POS))
+#define MXC_F_PT_RESYNC_PT2_POS                     2
+#define MXC_F_PT_RESYNC_PT2                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT2_POS))
+#define MXC_F_PT_RESYNC_PT3_POS                     3
+#define MXC_F_PT_RESYNC_PT3                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT3_POS))
+#define MXC_F_PT_RESYNC_PT4_POS                     4
+#define MXC_F_PT_RESYNC_PT4                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT4_POS))
+#define MXC_F_PT_RESYNC_PT5_POS                     5
+#define MXC_F_PT_RESYNC_PT5                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT5_POS))
+#define MXC_F_PT_RESYNC_PT6_POS                     6
+#define MXC_F_PT_RESYNC_PT6                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT6_POS))
+#define MXC_F_PT_RESYNC_PT7_POS                     7
+#define MXC_F_PT_RESYNC_PT7                         ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT7_POS))
+
+#define MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS       0
+#define MXC_F_PT_RATE_LENGTH_RATE_CONTROL           ((uint32_t)(0x07FFFFFFUL << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS))
+#define MXC_F_PT_RATE_LENGTH_MODE_POS               27
+#define MXC_F_PT_RATE_LENGTH_MODE                   ((uint32_t)(0x0000001FUL << MXC_F_PT_RATE_LENGTH_MODE_POS))
+
+/*
+   Field values and shifted values for module PT.
+*/
+#define MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN    ((uint32_t)(0x0x00000000UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE       ((uint32_t)(0x0x00000001UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN     ((uint32_t)(0x0x00000002UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN     ((uint32_t)(0x0x00000003UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN     ((uint32_t)(0x0x00000004UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN     ((uint32_t)(0x0x00000005UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN     ((uint32_t)(0x0x00000006UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN     ((uint32_t)(0x0x00000007UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN     ((uint32_t)(0x0x00000008UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN     ((uint32_t)(0x0x00000009UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN    ((uint32_t)(0x0x00000010UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN    ((uint32_t)(0x0x00000011UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN    ((uint32_t)(0x0x00000012UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN    ((uint32_t)(0x0x00000013UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN    ((uint32_t)(0x0x00000014UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN    ((uint32_t)(0x0x00000015UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN    ((uint32_t)(0x0x00000016UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN    ((uint32_t)(0x0x00000017UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN    ((uint32_t)(0x0x00000018UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN    ((uint32_t)(0x0x00000019UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN    ((uint32_t)(0x0x00000020UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN    ((uint32_t)(0x0x00000021UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN    ((uint32_t)(0x0x00000022UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN    ((uint32_t)(0x0x00000023UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN    ((uint32_t)(0x0x00000024UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN    ((uint32_t)(0x0x00000025UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN    ((uint32_t)(0x0x00000026UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN    ((uint32_t)(0x0x00000027UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN    ((uint32_t)(0x0x00000028UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN    ((uint32_t)(0x0x00000029UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN    ((uint32_t)(0x0x00000030UL))
+#define MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN    ((uint32_t)(0x0x00000031UL))
+
+#define MXC_S_PT_RATE_LENGTH_MODE_32_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_SQUARE_WAVE       ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE      << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_2_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_3_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_4_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_5_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_6_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_7_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_8_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_9_BIT_PATTERN     ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN    << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_10_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_11_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_12_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_13_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_14_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_15_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_16_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_17_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_18_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_19_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_20_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_21_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_22_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_23_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_24_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_25_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_26_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_27_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_28_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_29_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_30_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+#define MXC_S_PT_RATE_LENGTH_MODE_31_BIT_PATTERN    ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN   << MXC_F_PT_RATE_LENGTH_MODE_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_PT_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrman_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrman_regs.h
new file mode 100644
index 0000000000..cc717dd659
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrman_regs.h
@@ -0,0 +1,386 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_PWRMAN_REGS_H_
+#define _MXC_PWRMAN_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  pwrman_regs.h
+ * @addtogroup pwrman PWRMAN
+ * @{
+ */
+
+/**
+ * @brief Defines PAD Modes for Wake Up Detection.
+ */
+typedef enum {
+    /** WUD Mode for Selected PAD = Clear/Activate */
+    MXC_E_PWRMAN_PAD_MODE_CLEAR_SET,
+    /** WUD Mode for Selected PAD = Set WUD Act Hi/Set WUD Act Lo */
+    MXC_E_PWRMAN_PAD_MODE_ACT_HI_LO,
+    /** WUD Mode for Selected PAD = Set Weak Hi/ Set Weak Lo */
+    MXC_E_PWRMAN_PAD_MODE_WEAK_HI_LO,
+    /** WUD Mode for Selected PAD = No pad state change */
+    MXC_E_PWRMAN_PAD_MODE_NONE
+} mxc_pwrman_pad_mode_t;
+
+/*                                          Offset   Register Description
+                                            ======   =========================================== */
+typedef struct {
+    __IO uint32_t pwr_rst_ctrl;         /*  0x0000   Power Reset Control and Status              */
+    __IO uint32_t intfl;                /*  0x0004   Interrupt Flags                             */
+    __IO uint32_t inten;                /*  0x0008   Interrupt Enable/Disable Controls           */
+    __IO uint32_t svm_events;           /*  0x000C   SVM Event Status Flags (read-only)          */
+    __IO uint32_t wud_ctrl;             /*  0x0010   Wake-Up Detect Control                      */
+    __IO uint32_t wud_pulse0;           /*  0x0014   WUD Pulse To Mode Bit 0                     */
+    __IO uint32_t wud_pulse1;           /*  0x0018   WUD Pulse To Mode Bit 1                     */
+    __I uint32_t rsv001C[5];            /*  0x001C                                               */
+
+    __IO uint32_t wud_seen0;            /*  0x0030   Wake-up Detect Status for P0/P1/P2/P3       */
+    __IO uint32_t wud_seen1;            /*  0x0034   Wake-up Detect Status for P4/P5/P6/P7       */
+    __IO uint32_t die_type;             /*  0x0038   Die ID Register (Device Type)               */
+    __IO uint32_t base_part_num;        /*  0x003C   Base Part Number                            */
+    __IO uint32_t mask_id0;             /*  0x0040   Mask ID Register 0                          */
+    __IO uint32_t mask_id1;             /*  0x0044   Mask ID Register 1                          */
+    __IO uint32_t peripheral_reset;     /*  0x0048   Peripheral Reset Control Register           */
+} mxc_pwrman_regs_t;
+
+/*
+   Register offsets for module PWRMAN.
+*/
+#define MXC_R_PWRMAN_OFFS_PWR_RST_CTRL          ((uint32_t)0x00000000UL)
+#define MXC_R_PWRMAN_OFFS_INTFL                 ((uint32_t)0x00000004UL)
+#define MXC_R_PWRMAN_OFFS_INTEN                 ((uint32_t)0x00000008UL)
+#define MXC_R_PWRMAN_OFFS_SVM_EVENTS            ((uint32_t)0x0000000CUL)
+#define MXC_R_PWRMAN_OFFS_WUD_CTRL              ((uint32_t)0x00000010UL)
+#define MXC_R_PWRMAN_OFFS_WUD_PULSE0            ((uint32_t)0x00000014UL)
+#define MXC_R_PWRMAN_OFFS_WUD_PULSE1            ((uint32_t)0x00000018UL)
+#define MXC_R_PWRMAN_OFFS_WUD_SEEN0             ((uint32_t)0x00000030UL)
+#define MXC_R_PWRMAN_OFFS_WUD_SEEN1             ((uint32_t)0x00000034UL)
+#define MXC_R_PWRMAN_OFFS_DIE_TYPE              ((uint32_t)0x00000038UL)
+#define MXC_R_PWRMAN_OFFS_BASE_PART_NUM         ((uint32_t)0x0000003CUL)
+#define MXC_R_PWRMAN_OFFS_MASK_ID0              ((uint32_t)0x00000040UL)
+#define MXC_R_PWRMAN_OFFS_MASK_ID1              ((uint32_t)0x00000044UL)
+#define MXC_R_PWRMAN_OFFS_PERIPHERAL_RESET      ((uint32_t)0x00000048UL)
+
+/*
+   Field positions and masks for module PWRMAN.
+*/
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE_POS          0
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE              ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE_POS           1
+#define MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE               ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED_POS           2
+#define MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED               ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE_POS             3
+#define MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED_POS           4
+#define MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED               ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED_POS       5
+#define MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED           ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET_POS        8
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET            ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET_POS      9
+#define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET          ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR_POS             12
+#define MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT_POS         16
+#define MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT             ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN_POS     17
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN         ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT_POS      18
+#define MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT          ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM_POS        19
+#define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM            ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_POS            20
+#define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION_POS       21
+#define MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION           ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_POR_POS                   22
+#define MXC_F_PWRMAN_PWR_RST_CTRL_POR                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_POR_POS))
+#define MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE_POS        31
+#define MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE            ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE_POS))
+
+#define MXC_F_PWRMAN_INTFL_V1_8_WARNING_POS                 0
+#define MXC_F_PWRMAN_INTFL_V1_8_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V1_8_WARNING_POS))
+#define MXC_F_PWRMAN_INTFL_V3_3_WARNING_POS                 1
+#define MXC_F_PWRMAN_INTFL_V3_3_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V3_3_WARNING_POS))
+#define MXC_F_PWRMAN_INTFL_RTC_WARNING_POS                  2
+#define MXC_F_PWRMAN_INTFL_RTC_WARNING                      ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_RTC_WARNING_POS))
+#define MXC_F_PWRMAN_INTFL_V3_3_RESET_POS                   3
+#define MXC_F_PWRMAN_INTFL_V3_3_RESET                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V3_3_RESET_POS))
+#define MXC_F_PWRMAN_INTFL_VDDA_WARNING_POS                 4
+#define MXC_F_PWRMAN_INTFL_VDDA_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_VDDA_WARNING_POS))
+
+#define MXC_F_PWRMAN_INTEN_V1_8_WARNING_POS                 0
+#define MXC_F_PWRMAN_INTEN_V1_8_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V1_8_WARNING_POS))
+#define MXC_F_PWRMAN_INTEN_V3_3_WARNING_POS                 1
+#define MXC_F_PWRMAN_INTEN_V3_3_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V3_3_WARNING_POS))
+#define MXC_F_PWRMAN_INTEN_RTC_WARNING_POS                  2
+#define MXC_F_PWRMAN_INTEN_RTC_WARNING                      ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_RTC_WARNING_POS))
+#define MXC_F_PWRMAN_INTEN_V3_3_RESET_POS                   3
+#define MXC_F_PWRMAN_INTEN_V3_3_RESET                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V3_3_RESET_POS))
+#define MXC_F_PWRMAN_INTEN_VDDA_WARNING_POS                 4
+#define MXC_F_PWRMAN_INTEN_VDDA_WARNING                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_VDDA_WARNING_POS))
+
+#define MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING_POS            0
+#define MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING_POS))
+#define MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING_POS            1
+#define MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING_POS))
+#define MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING_POS             2
+#define MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING_POS))
+#define MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET_POS              3
+#define MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET_POS))
+#define MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING_POS            4
+#define MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING_POS))
+
+#define MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT_POS                0
+#define MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT                    ((uint32_t)(0x0000003FUL << MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT_POS))
+#define MXC_F_PWRMAN_WUD_CTRL_PAD_MODE_POS                  8
+#define MXC_F_PWRMAN_WUD_CTRL_PAD_MODE                      ((uint32_t)(0x00000003UL << MXC_F_PWRMAN_WUD_CTRL_PAD_MODE_POS))
+#define MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL_POS                 12
+#define MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL                     ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL_POS))
+
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO0_POS                    0
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO0                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO0_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO1_POS                    1
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO1                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO1_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO2_POS                    2
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO2                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO2_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO3_POS                    3
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO3                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO3_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO4_POS                    4
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO4                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO4_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO5_POS                    5
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO5                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO5_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO6_POS                    6
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO6                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO6_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO7_POS                    7
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO7                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO7_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO8_POS                    8
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO8                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO8_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO9_POS                    9
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO9                        ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO9_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO10_POS                   10
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO10                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO10_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO11_POS                   11
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO11                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO11_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO12_POS                   12
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO12                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO12_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO13_POS                   13
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO13                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO13_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO14_POS                   14
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO14                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO14_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO15_POS                   15
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO15                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO15_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO16_POS                   16
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO16                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO16_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO17_POS                   17
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO17                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO17_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO18_POS                   18
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO18                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO18_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO19_POS                   19
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO19                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO19_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO20_POS                   20
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO20                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO20_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO21_POS                   21
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO21                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO21_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO22_POS                   22
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO22                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO22_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO23_POS                   23
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO23                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO23_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO24_POS                   24
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO24                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO24_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO25_POS                   25
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO25                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO25_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO26_POS                   26
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO26                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO26_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO27_POS                   27
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO27                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO27_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO28_POS                   28
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO28                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO28_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO29_POS                   29
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO29                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO29_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO30_POS                   30
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO30                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO30_POS))
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO31_POS                   31
+#define MXC_F_PWRMAN_WUD_SEEN0_GPIO31                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO31_POS))
+
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO32_POS                   0
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO32                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO32_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO33_POS                   1
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO33                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO33_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO34_POS                   2
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO34                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO34_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO35_POS                   3
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO35                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO35_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO36_POS                   4
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO36                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO36_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO37_POS                   5
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO37                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO37_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO38_POS                   6
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO38                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO38_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO39_POS                   7
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO39                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO39_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO40_POS                   8
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO40                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO40_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO41_POS                   9
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO41                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO41_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO42_POS                   10
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO42                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO42_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO43_POS                   11
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO43                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO43_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO44_POS                   12
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO44                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO44_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO45_POS                   13
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO45                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO45_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO46_POS                   14
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO46                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO46_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO47_POS                   15
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO47                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO47_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO48_POS                   16
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO48                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO48_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO49_POS                   17
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO49                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO49_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO50_POS                   18
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO50                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO50_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO51_POS                   19
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO51                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO51_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO52_POS                   20
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO52                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO52_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO53_POS                   21
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO53                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO53_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO54_POS                   22
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO54                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO54_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO55_POS                   23
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO55                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO55_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO56_POS                   24
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO56                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO56_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO57_POS                   25
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO57                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO57_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO58_POS                   26
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO58                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO58_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO59_POS                   27
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO59                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO59_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO60_POS                   28
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO60                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO60_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO61_POS                   29
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO61                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO61_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO62_POS                   30
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO62                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO62_POS))
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO63_POS                   31
+#define MXC_F_PWRMAN_WUD_SEEN1_GPIO63                       ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO63_POS))
+
+#define MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER_POS     0
+#define MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER         ((uint32_t)(0x0000FFFFUL << MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER_POS))
+#define MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT_POS       28
+#define MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT           ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT_POS))
+
+#define MXC_F_PWRMAN_MASK_ID0_REVISION_ID_POS               0
+#define MXC_F_PWRMAN_MASK_ID0_REVISION_ID                   ((uint32_t)(0x0000000FUL << MXC_F_PWRMAN_MASK_ID0_REVISION_ID_POS))
+#define MXC_F_PWRMAN_MASK_ID0_MASK_ID_POS                   4
+#define MXC_F_PWRMAN_MASK_ID0_MASK_ID                       ((uint32_t)(0x0FFFFFFFUL << MXC_F_PWRMAN_MASK_ID0_MASK_ID_POS))
+
+#define MXC_F_PWRMAN_MASK_ID1_MASK_ID_POS                   0
+#define MXC_F_PWRMAN_MASK_ID1_MASK_ID                       ((uint32_t)(0x7FFFFFFFUL << MXC_F_PWRMAN_MASK_ID1_MASK_ID_POS))
+#define MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE_POS            31
+#define MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE_POS))
+
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_UART0_POS             0
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_UART0                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_UART0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_UART1_POS             1
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_UART1                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_UART1_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0_POS            2
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1_POS            3
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2_POS            4
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3_POS            5
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3                ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0_POS         6
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0             ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_USB_POS               7
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_USB                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_USB_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_ADC_POS               8
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_ADC                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_ADC_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0_POS              9
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1_POS              10
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2_POS              11
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3_POS              12
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DMA_POS               13
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_DMA                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DMA_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_LCD_POS               14
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_LCD                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_LCD_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO_POS              15
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN_POS       16
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN           ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0_POS              17
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1_POS              18
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2_POS              19
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0_POS             20
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1_POS             21
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1                 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS_POS              22
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS                  ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_CRC_POS               23
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_CRC                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_CRC_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TPU_POS               24
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_TPU                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TPU_POS))
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SSB_POS               25
+#define MXC_F_PWRMAN_PERIPHERAL_RESET_SSB                   ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SSB_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_PWRMAN_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrseq_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrseq_regs.h
new file mode 100644
index 0000000000..506b11bda1
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/pwrseq_regs.h
@@ -0,0 +1,299 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_PWRSEQ_REGS_H
+#define _MXC_PWRSEQ_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  pwrseq_regs.h
+ * @addtogroup pwrseq PWRSEQ
+ * @{
+ */
+
+/*                                      Offset   Register Description
+                                        ======   ================================================= */
+typedef struct {
+    __IO uint32_t reg0;             /*  0x0000   Power Sequencer Control Register 0                */
+    __IO uint32_t reg1;             /*  0x0004   Power Sequencer Control Register 1                */
+    __IO uint32_t reg2;             /*  0x0008   Power Sequencer Control Register 2                */
+    __IO uint32_t reg3;             /*  0x000C   Power Sequencer Control Register 3                */
+    __IO uint32_t reg4;             /*  0x0010   Power Sequencer Control Register 4                */
+    __IO uint32_t reg5;             /*  0x0014   Power Sequencer Control Register 5 (Trim 0)       */
+    __IO uint32_t reg6;             /*  0x0018   Power Sequencer Control Register 6 (Trim 1)       */
+    __I uint32_t rsv001C;           /*  0x001C                                                     */
+    __IO uint32_t flags;            /*  0x0020   Power Sequencer Flags                             */
+    __IO uint32_t msk_flags;        /*  0x0024   Power Sequencer Flags Mask Register               */
+} mxc_pwrseq_regs_t;
+
+
+/*
+   Register offsets for module PWRSEQ.
+*/
+#define MXC_R_PWRSEQ_OFFS_REG0                    ((uint32_t)0x00000000UL)
+#define MXC_R_PWRSEQ_OFFS_REG1                    ((uint32_t)0x00000004UL)
+#define MXC_R_PWRSEQ_OFFS_REG2                    ((uint32_t)0x00000008UL)
+#define MXC_R_PWRSEQ_OFFS_REG3                    ((uint32_t)0x0000000CUL)
+#define MXC_R_PWRSEQ_OFFS_REG4                    ((uint32_t)0x00000010UL)
+#define MXC_R_PWRSEQ_OFFS_REG5                    ((uint32_t)0x00000014UL)
+#define MXC_R_PWRSEQ_OFFS_REG6                    ((uint32_t)0x00000018UL)
+#define MXC_R_PWRSEQ_OFFS_FLAGS                   ((uint32_t)0x00000020UL)
+#define MXC_R_PWRSEQ_OFFS_MSK_FLAGS               ((uint32_t)0x00000024UL)
+
+
+/*
+   Field positions and masks for module PWRSEQ.
+*/
+#define MXC_F_PWRSEQ_REG0_PWR_LP1_POS                       0
+#define MXC_F_PWRSEQ_REG0_PWR_LP1                           ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LP1_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT_POS                1
+#define MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT_POS                2
+#define MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN_POS                 3
+#define MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP_POS                 4
+#define MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN_POS                5
+#define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP_POS                6
+#define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN_POS                  7
+#define MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP_POS                  8
+#define MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_NREN_RUN_POS                  9
+#define MXC_F_PWRSEQ_REG0_PWR_NREN_RUN                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_NREN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_NREN_SLP_POS                  10
+#define MXC_F_PWRSEQ_REG0_PWR_NREN_SLP                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_NREN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN_POS                 11
+#define MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP_POS                 12
+#define MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN_POS                13
+#define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP_POS                14
+#define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN_POS                15
+#define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP_POS                16
+#define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN_POS              17
+#define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP_POS              18
+#define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP_POS))
+#define MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN_POS                19
+#define MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN_POS))
+
+#define MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG_POS                0
+#define MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG                    ((uint32_t)(0x000000FFUL << MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3_POS                  8
+#define MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD_POS            9
+#define MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO_POS                  10
+#define MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO                      ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW_POS              11
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2_POS             12
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1_POS             13
+#define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1_POS))
+#define MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE_POS               14
+#define MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE_POS))
+
+#define MXC_F_PWRSEQ_REG2_PWR_RST3_POS                      0
+#define MXC_F_PWRSEQ_REG2_PWR_RST3                          ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_RST3_POS))
+#define MXC_F_PWRSEQ_REG2_PWR_W3_POS                        5
+#define MXC_F_PWRSEQ_REG2_PWR_W3                            ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W3_POS))
+#define MXC_F_PWRSEQ_REG2_PWR_W1_POS                        10
+#define MXC_F_PWRSEQ_REG2_PWR_W1                            ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W1_POS))
+#define MXC_F_PWRSEQ_REG2_PWR_W1_LOW_POS                    15
+#define MXC_F_PWRSEQ_REG2_PWR_W1_LOW                        ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W1_LOW_POS))
+#define MXC_F_PWRSEQ_REG2_PWR_WRTC_POS                      20
+#define MXC_F_PWRSEQ_REG2_PWR_WRTC                          ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_WRTC_POS))
+#define MXC_F_PWRSEQ_REG2_PWR_WVDDA3_POS                    25
+#define MXC_F_PWRSEQ_REG2_PWR_WVDDA3                        ((uint32_t)(0x0000003FUL << MXC_F_PWRSEQ_REG2_PWR_WVDDA3_POS))
+
+#define MXC_F_PWRSEQ_REG3_PWR_ROSEL_POS                     0
+#define MXC_F_PWRSEQ_REG3_PWR_ROSEL                         ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_ROSEL_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK_POS               3
+#define MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK                   ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_SVMSEL_POS                    5
+#define MXC_F_PWRSEQ_REG3_PWR_SVMSEL                        ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_SVMSEL_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO_POS            8
+#define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO                ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL_POS              10
+#define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL                  ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX_POS               13
+#define MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX                   ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX_POS                15
+#define MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT_POS                 16
+#define MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT_POS))
+#define MXC_F_PWRSEQ_REG3_PWR_BO_TC_POS                     17
+#define MXC_F_PWRSEQ_REG3_PWR_BO_TC                         ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_BO_TC_POS))
+
+#define MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO_POS              0
+#define MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS_POS            1
+#define MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM_POS             2
+#define MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP_POS              3
+#define MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST_POS           4
+#define MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST               ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF_POS               5
+#define MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF_POS))
+#define MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD_POS               6
+#define MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD_POS))
+
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG_POS               0
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG                   ((uint32_t)(0x0000003FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG_POS))
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8_POS               6
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8                   ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8_POS))
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3_POS               10
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3                   ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3_POS))
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS             15
+#define MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF                 ((uint32_t)(0x0000007FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS))
+
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS_POS             0
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS                 ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS_POS))
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES_POS           3
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES               ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES_POS))
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES_POS           7
+#define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES               ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES_POS))
+
+#define MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT_POS               0
+#define MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT_POS               1
+#define MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL_POS             2
+#define MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL_POS            3
+#define MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP_POS              4
+#define MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP                  ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP_POS                5
+#define MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST_POS                 6
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN_POS                7
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST_POS                 8
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST_POS             9
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN_POS                10
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN_POS                11
+#define MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL_POS               12
+#define MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL_POS))
+#define MXC_F_PWRSEQ_FLAGS_RTC_CMPR0_POS                    13
+#define MXC_F_PWRSEQ_FLAGS_RTC_CMPR0                        ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_CMPR0_POS))
+#define MXC_F_PWRSEQ_FLAGS_RTC_CMPR1_POS                    14
+#define MXC_F_PWRSEQ_FLAGS_RTC_CMPR1                        ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_CMPR1_POS))
+#define MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP_POS             15
+#define MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP_POS))
+#define MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER_POS                 16
+#define MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER                     ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET_POS             17
+#define MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP_POS          18
+#define MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP              ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP_POS        19
+#define MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP            ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST_POS                20
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST_POS))
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST_POS               21
+#define MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST                   ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST_POS))
+
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT_POS           1
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT               ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL_POS         2
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL             ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL_POS        3
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL            ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP_POS          4
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP              ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP_POS            5
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST_POS             6
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN_POS            7
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST_POS             8
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST_POS         9
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST             ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN_POS            10
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN_POS            11
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL_POS           12
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL               ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0_POS                13
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1_POS                14
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1                    ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP_POS         15
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP             ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER_POS             16
+#define MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER                 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET_POS         17
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET             ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP_POS      18
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP          ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP_POS    19
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP        ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST_POS            20
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST                ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST_POS))
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST_POS           21
+#define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST               ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_PWRSEQ_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/rtc_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/rtc_regs.h
new file mode 100644
index 0000000000..3c947b028f
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/rtc_regs.h
@@ -0,0 +1,246 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_RTC_REGS_H
+#define _MXC_RTC_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  rtc_regs.h
+ * @addtogroup rtc RTCTMR
+ * @{
+ */
+
+/**
+ * @brief Defines clock divider for 4096Hz input clock.
+ */
+typedef enum {
+    /** (4kHz) divide input clock by 2^0 = 1 */
+    MXC_E_RTC_PRESCALE_DIV_2_0 = 0,
+    /** (2kHz) divide input clock by 2^1 = 2 */
+    MXC_E_RTC_PRESCALE_DIV_2_1,
+    /** (1kHz) divide input clock by 2^2 = 4 */
+    MXC_E_RTC_PRESCALE_DIV_2_2,
+    /** (512Hz) divide input clock by 2^3 = 8 */
+    MXC_E_RTC_PRESCALE_DIV_2_3,
+    /** (256Hz) divide input clock by 2^4 = 16 */
+    MXC_E_RTC_PRESCALE_DIV_2_4,
+    /** (128Hz) divide input clock by 2^5 = 32 */
+    MXC_E_RTC_PRESCALE_DIV_2_5,
+    /** (64Hz) divide input clock by 2^6 = 64 */
+    MXC_E_RTC_PRESCALE_DIV_2_6,
+    /** (32Hz) divide input clock by 2^7 = 128 */
+    MXC_E_RTC_PRESCALE_DIV_2_7,
+    /** (16Hz) divide input clock by 2^8 = 256 */
+    MXC_E_RTC_PRESCALE_DIV_2_8,
+    /** (8Hz) divide input clock by 2^9 = 512 */
+    MXC_E_RTC_PRESCALE_DIV_2_9,
+    /** (4Hz) divide input clock by 2^10 = 1024 */
+    MXC_E_RTC_PRESCALE_DIV_2_10,
+    /** (2Hz) divide input clock by 2^11 = 2048 */
+    MXC_E_RTC_PRESCALE_DIV_2_11,
+    /** (1Hz) divide input clock by 2^12 = 4096 */
+    MXC_E_RTC_PRESCALE_DIV_2_12,
+} mxc_rtc_prescale_t;
+
+/*                                          Offset   Register Description
+                                            ======   ========================================= */
+typedef struct {
+    __IO uint32_t ctrl;                 /*  0x0000   RTC Timer Control                         */
+    __IO uint32_t timer;                /*  0x0004   RTC Timer Count Value                     */
+    __IO uint32_t comp[2];              /*  0x0008   RTC Alarm (0..1) Compare Registers        */
+    __IO uint32_t flags;                /*  0x0010   CPU Interrupt and RTC Domain Flags        */
+    __I uint32_t rsv0014;               /*  0x0014                                             */
+    __IO uint32_t inten;                /*  0x0018   Interrupt Enable Controls                 */
+    __IO uint32_t prescale;             /*  0x001C   RTC Timer Prescale Setting                */
+    __I uint32_t rsv0020;               /*  0x0020                                             */
+    __IO uint32_t prescale_mask;        /*  0x0024   RTC Timer Prescale Compare Mask           */
+    __IO uint32_t trim_ctrl;            /*  0x0028   RTC Timer Trim Controls                   */
+    __IO uint32_t trim_value;           /*  0x002C   RTC Timer Trim Adjustment Interval        */
+} mxc_rtctmr_regs_t;
+
+/*
+   Register offsets for module RTCTMR.
+*/
+#define MXC_R_RTCTMR_OFFS_CTRL                    ((uint32_t)0x00000000UL)
+#define MXC_R_RTCTMR_OFFS_TIMER                   ((uint32_t)0x00000004UL)
+#define MXC_R_RTCTMR_OFFS_COMP_0                  ((uint32_t)0x00000008UL)
+#define MXC_R_RTCTMR_OFFS_COMP_1                  ((uint32_t)0x0000000CUL)
+#define MXC_R_RTCTMR_OFFS_FLAGS                   ((uint32_t)0x00000010UL)
+#define MXC_R_RTCTMR_OFFS_INTEN                   ((uint32_t)0x00000018UL)
+#define MXC_R_RTCTMR_OFFS_PRESCALE                ((uint32_t)0x0000001CUL)
+#define MXC_R_RTCTMR_OFFS_PRESCALE_MASK           ((uint32_t)0x00000024UL)
+#define MXC_R_RTCTMR_OFFS_TRIM_CTRL               ((uint32_t)0x00000028UL)
+#define MXC_R_RTCTMR_OFFS_TRIM_VALUE              ((uint32_t)0x0000002CUL)
+
+/*
+   Field positions and masks for module RTCTMR.
+*/
+#define MXC_F_RTC_CTRL_ENABLE_POS                           0
+#define MXC_F_RTC_CTRL_ENABLE                               ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ENABLE_POS))
+#define MXC_F_RTC_CTRL_CLEAR_POS                            1
+#define MXC_F_RTC_CTRL_CLEAR                                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLEAR_POS))
+#define MXC_F_RTC_CTRL_PENDING_POS                          2
+#define MXC_F_RTC_CTRL_PENDING                              ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PENDING_POS))
+#define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS                  3
+#define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS                      ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS))
+#define MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS                   4
+#define MXC_F_RTC_CTRL_AGGRESSIVE_RST                       ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS))
+#define MXC_F_RTC_CTRL_EN_ACTIVE_POS                        16
+#define MXC_F_RTC_CTRL_EN_ACTIVE                            ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_EN_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS              17
+#define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE                  ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS            18
+#define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS               19
+#define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE                   ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_SET_ACTIVE_POS                       20
+#define MXC_F_RTC_CTRL_SET_ACTIVE                           ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_SET_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_CLR_ACTIVE_POS                       21
+#define MXC_F_RTC_CTRL_CLR_ACTIVE                           ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLR_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS              22
+#define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE                  ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS            23
+#define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS           24
+#define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE               ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS                 25
+#define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE                     ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS))
+#define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS                 26
+#define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE                     ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS))
+
+#define MXC_F_RTC_FLAGS_COMP0_POS                           0
+#define MXC_F_RTC_FLAGS_COMP0                               ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_POS))
+#define MXC_F_RTC_FLAGS_COMP1_POS                           1
+#define MXC_F_RTC_FLAGS_COMP1                               ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_POS))
+#define MXC_F_RTC_FLAGS_PRESCALE_COMP_POS                   2
+#define MXC_F_RTC_FLAGS_PRESCALE_COMP                       ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCALE_COMP_POS))
+#define MXC_F_RTC_FLAGS_OVERFLOW_POS                        3
+#define MXC_F_RTC_FLAGS_OVERFLOW                            ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_POS))
+#define MXC_F_RTC_FLAGS_TRIM_POS                            4
+#define MXC_F_RTC_FLAGS_TRIM                                ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_POS))
+#define MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS                    8
+#define MXC_F_RTC_FLAGS_COMP0_FLAG_A                        ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS))
+#define MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS                    9
+#define MXC_F_RTC_FLAGS_COMP1_FLAG_A                        ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS))
+#define MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS                   10
+#define MXC_F_RTC_FLAGS_PRESCL_FLAG_A                       ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS))
+#define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS                 11
+#define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A                     ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS))
+#define MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS                     12
+#define MXC_F_RTC_FLAGS_TRIM_FLAG_A                         ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS))
+#define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS                 31
+#define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS                     ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS))
+
+#define MXC_F_RTC_INTEN_COMP0_POS                           0
+#define MXC_F_RTC_INTEN_COMP0                               ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP0_POS))
+#define MXC_F_RTC_INTEN_COMP1_POS                           1
+#define MXC_F_RTC_INTEN_COMP1                               ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP1_POS))
+#define MXC_F_RTC_INTEN_PRESCALE_COMP_POS                   2
+#define MXC_F_RTC_INTEN_PRESCALE_COMP                       ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_PRESCALE_COMP_POS))
+#define MXC_F_RTC_INTEN_OVERFLOW_POS                        3
+#define MXC_F_RTC_INTEN_OVERFLOW                            ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_OVERFLOW_POS))
+#define MXC_F_RTC_INTEN_TRIM_POS                            4
+#define MXC_F_RTC_INTEN_TRIM                                ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_TRIM_POS))
+
+#define MXC_F_RTC_PRESCALE_WIDTH_SELECTION_POS              0
+#define MXC_F_RTC_PRESCALE_WIDTH_SELECTION                  ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_WIDTH_SELECTION_POS))
+
+#define MXC_F_RTC_PRESCALE_MASK_COMP_MASK_POS               0
+#define MXC_F_RTC_PRESCALE_MASK_COMP_MASK                   ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_MASK_COMP_MASK_POS))
+
+#define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS               0
+#define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R                   ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS))
+#define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS           1
+#define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R               ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS))
+#define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS               2
+#define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R                   ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS))
+
+#define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS                 0
+#define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE                     ((uint32_t)(0x0003FFFFUL << MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS))
+#define MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL_POS               18
+#define MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL                   ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_VALUE_TRIM_CONTROL_POS))
+
+#define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS            0
+#define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER                ((uint32_t)(0x0000FFFFUL << MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS))
+
+#define MXC_F_RTC_CLK_CTRL_OSC1_EN_POS                      0
+#define MXC_F_RTC_CLK_CTRL_OSC1_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC1_EN_POS))
+#define MXC_F_RTC_CLK_CTRL_OSC2_EN_POS                      1
+#define MXC_F_RTC_CLK_CTRL_OSC2_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC2_EN_POS))
+#define MXC_F_RTC_CLK_CTRL_NANO_EN_POS                      2
+#define MXC_F_RTC_CLK_CTRL_NANO_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_NANO_EN_POS))
+
+#define MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE_POS                0
+#define MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE                    ((uint32_t)(0x00000001UL << MXC_F_RTC_DSEN_CTRL_DSEN_DISABLE_POS))
+
+#define MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS                   0
+#define MXC_F_RTC_OSC_CTRL_OSC_BYPASS                       ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS))
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS                1
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R                    ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS))
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS              2
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL                  ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS))
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS                3
+#define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O                    ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS))
+
+/*                                      Offset   Register Description
+                                        ======   ===================================================================== */
+typedef struct {
+    __IO uint32_t nano_counter;     /*  0x0000   Nanoring Counter Read Register                                        */
+    __IO uint32_t clk_ctrl;         /*  0x0004   RTC Clock Control Settings                                            */
+    __IO uint32_t dsen_ctrl;        /*  0x0008   Dynamic Tamper Sensor Control                                         */
+    __IO uint32_t osc_ctrl;         /*  0x000C   RTC Oscillator Control                                                */
+} mxc_rtccfg_regs_t;
+
+/*
+   Register offsets for module RTCCFG.
+*/
+#define MXC_R_RTCCFG_OFFS_NANO_COUNTER            ((uint32_t)0x00000000UL)
+#define MXC_R_RTCCFG_OFFS_CLK_CTRL                ((uint32_t)0x00000004UL)
+#define MXC_R_RTCCFG_OFFS_DSEN_CTRL               ((uint32_t)0x00000008UL)
+#define MXC_R_RTCCFG_OFFS_OSC_CTRL                ((uint32_t)0x0000000CUL)
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_RTC_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h
new file mode 100644
index 0000000000..645178ca37
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h
@@ -0,0 +1,215 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_SPI_REGS_H
+#define _MXC_SPI_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  spi_regs.h
+ * @addtogroup spi SPI
+ * @{
+ */
+
+/*                                       Offset   Register Description
+                                         ======   ============================================ */
+typedef struct {
+    __IO uint32_t mstr_cfg;          /*  0x0000   SPI Master Configuration Register            */
+    __IO uint32_t ss_sr_polarity;    /*  0x0004   Polarity Control for SS and SR Signals       */
+    __IO uint32_t gen_ctrl;          /*  0x0008   SPI Master General Control Register          */
+    __IO uint32_t fifo_ctrl;         /*  0x000C   SPI Master FIFO Control Register             */
+    __IO uint32_t spcl_ctrl;         /*  0x0010   SPI Master Special Mode Controls             */
+    __IO uint32_t intfl;             /*  0x0014   SPI Master Interrupt Flags                   */
+    __IO uint32_t inten;             /*  0x0018   SPI Master Interrupt Enable/Disable Settings */
+    __I uint32_t rsv001C;            /*  0x001C   Deprecated - was SPI_AHB_RETRY               */
+} mxc_spi_regs_t;
+
+/**
+ * @brief TX FIFO register. Can do 8, 16, or 32 bit access.
+ */
+typedef struct {
+    union {
+        __O uint8_t txfifo_8;
+        __O uint16_t txfifo_16;
+        __O uint32_t txfifo_32;
+    };
+} mxc_spi_txfifo_regs_t;
+
+/**
+ * @brief RX FIFO register. Can do 8, 16, or 32 bit access.
+ */
+typedef struct {
+    union {
+        __I uint8_t rxfifo_8;
+        __I uint16_t rxfifo_16;
+        __I uint32_t rxfifo_32;
+    };
+} mxc_spi_rxfifo_regs_t;
+
+/*
+   Register offsets for module SPI.
+*/
+#define MXC_R_SPI_OFFS_MSTR_CFG                   ((uint32_t)0x00000000UL)
+#define MXC_R_SPI_OFFS_SS_SR_POLARITY             ((uint32_t)0x00000004UL)
+#define MXC_R_SPI_OFFS_GEN_CTRL                   ((uint32_t)0x00000008UL)
+#define MXC_R_SPI_OFFS_FIFO_CTRL                  ((uint32_t)0x0000000CUL)
+#define MXC_R_SPI_OFFS_SPCL_CTRL                  ((uint32_t)0x00000010UL)
+#define MXC_R_SPI_OFFS_INTFL                      ((uint32_t)0x00000014UL)
+#define MXC_R_SPI_OFFS_INTEN                      ((uint32_t)0x00000018UL)
+
+#define MXC_R_SPI_FIFO_OFFS_TRANS                 ((uint32_t)0x00000000UL)
+#define MXC_R_SPI_FIFO_OFFS_RSLTS                 ((uint32_t)0x00000800UL)
+
+/*
+   Field positions and masks for module SPI.
+*/
+#define MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS                    0
+#define MXC_F_SPI_MSTR_CFG_SLAVE_SEL                        ((uint32_t)(0x00000007UL << MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS))
+#define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS              3
+#define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE                  ((uint32_t)(0x00000001UL << MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS))
+#define MXC_F_SPI_MSTR_CFG_SPI_MODE_POS                     4
+#define MXC_F_SPI_MSTR_CFG_SPI_MODE                         ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS))
+#define MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS                    6
+#define MXC_F_SPI_MSTR_CFG_PAGE_SIZE                        ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS))
+#define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS                   8
+#define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK                       ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS))
+#define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS                   12
+#define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK                       ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS))
+#define MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS                    16
+#define MXC_F_SPI_MSTR_CFG_ACT_DELAY                        ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS))
+#define MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS                  18
+#define MXC_F_SPI_MSTR_CFG_INACT_DELAY                      ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS))
+#define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS               20
+#define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK                   ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS))
+#define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS               24
+#define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK                   ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS))
+
+#define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS            0
+#define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY                ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS))
+#define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS            8
+#define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY                ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS))
+
+#define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS                  0
+#define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN                      ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS))
+#define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS                   1
+#define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN                       ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS))
+#define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS                   2
+#define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN                       ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS))
+#define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS                3
+#define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE                    ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS                 4
+#define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT                     ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS                     5
+#define MXC_F_SPI_GEN_CTRL_BB_SR_IN                         ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS                6
+#define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT                    ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS                   8
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN                       ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS                  12
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT                      ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS))
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS                16
+#define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN                    ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS))
+
+#define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS              0
+#define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL                  ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
+#define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS                8
+#define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED                    ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS))
+#define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS              16
+#define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL                  ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
+#define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS                24
+#define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED                    ((uint32_t)(0x0000003FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS))
+
+#define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS              0
+#define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE                  ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS))
+#define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS                  1
+#define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN                      ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS))
+#define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS              4
+#define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT                  ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS))
+#define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS            8
+#define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN                ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS))
+
+#define MXC_F_SPI_INTFL_TX_STALLED_POS                      0
+#define MXC_F_SPI_INTFL_TX_STALLED                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_STALLED_POS))
+#define MXC_F_SPI_INTFL_RX_STALLED_POS                      1
+#define MXC_F_SPI_INTFL_RX_STALLED                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_STALLED_POS))
+#define MXC_F_SPI_INTFL_TX_READY_POS                        2
+#define MXC_F_SPI_INTFL_TX_READY                            ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_READY_POS))
+#define MXC_F_SPI_INTFL_RX_DONE_POS                         3
+#define MXC_F_SPI_INTFL_RX_DONE                             ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_DONE_POS))
+#define MXC_F_SPI_INTFL_TX_FIFO_AE_POS                      4
+#define MXC_F_SPI_INTFL_TX_FIFO_AE                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_FIFO_AE_POS))
+#define MXC_F_SPI_INTFL_RX_FIFO_AF_POS                      5
+#define MXC_F_SPI_INTFL_RX_FIFO_AF                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_FIFO_AF_POS))
+
+#define MXC_F_SPI_INTEN_TX_STALLED_POS                      0
+#define MXC_F_SPI_INTEN_TX_STALLED                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_STALLED_POS))
+#define MXC_F_SPI_INTEN_RX_STALLED_POS                      1
+#define MXC_F_SPI_INTEN_RX_STALLED                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_STALLED_POS))
+#define MXC_F_SPI_INTEN_TX_READY_POS                        2
+#define MXC_F_SPI_INTEN_TX_READY                            ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_READY_POS))
+#define MXC_F_SPI_INTEN_RX_DONE_POS                         3
+#define MXC_F_SPI_INTEN_RX_DONE                             ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_DONE_POS))
+#define MXC_F_SPI_INTEN_TX_FIFO_AE_POS                      4
+#define MXC_F_SPI_INTEN_TX_FIFO_AE                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_FIFO_AE_POS))
+#define MXC_F_SPI_INTEN_RX_FIFO_AF_POS                      5
+#define MXC_F_SPI_INTEN_RX_FIFO_AF                          ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_FIFO_AF_POS))
+
+#define MXC_F_SPI_FIFO_DIR_POS                              0
+#define MXC_F_SPI_FIFO_DIR                                  ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_DIR_POS))
+#define MXC_F_SPI_FIFO_UNIT_POS                             2
+#define MXC_F_SPI_FIFO_UNIT                                 ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_UNIT_POS))
+#define MXC_F_SPI_FIFO_SIZE_POS                             4
+#define MXC_F_SPI_FIFO_SIZE                                 ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_SIZE_POS))
+#define MXC_F_SPI_FIFO_WIDTH_POS                            9
+#define MXC_F_SPI_FIFO_WIDTH                                ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_WIDTH_POS))
+#define MXC_F_SPI_FIFO_ALT_POS                              11
+#define MXC_F_SPI_FIFO_ALT                                  ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_ALT_POS))
+#define MXC_F_SPI_FIFO_FLOW_POS                             12
+#define MXC_F_SPI_FIFO_FLOW                                 ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_FLOW_POS))
+#define MXC_F_SPI_FIFO_DASS_POS                             13
+#define MXC_F_SPI_FIFO_DASS                                 ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_DASS_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_SPI_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
new file mode 100644
index 0000000000..539f7ac5f4
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
@@ -0,0 +1,144 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "max32600.h"
+#include "clkman_regs.h"
+#include "pwrman_regs.h"
+#include "ioman_regs.h"
+#include "trim_regs.h"
+#include "flc_regs.h"
+#include "pwrseq_regs.h"
+#include "dac_regs.h"
+#include "icc_regs.h"
+
+/* Application developer should override where necessary with different external HFX source */
+#ifndef __SYSTEM_HFX
+#define __SYSTEM_HFX 8000000
+#endif
+
+uint32_t SystemCoreClock = 24000000;
+
+void SystemCoreClockUpdate(void)
+{
+    switch ((MXC_CLKMAN->clk_ctrl & MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) >> MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS) {
+        case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8:
+            SystemCoreClock = 3000000;
+            break;
+        case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO:
+        case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2:
+            SystemCoreClock = 24000000;
+            break;
+        case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX:
+            SystemCoreClock = __SYSTEM_HFX;
+            break;
+    }
+
+    uint32_t shift = MXC_CLKMAN->clk_ctrl_0_system;
+    if (shift) {
+        SystemCoreClock = SystemCoreClock >> (shift - 1);
+    }
+}
+
+/* power seq registers */
+static void set_pwr_regs(void)
+{
+    uint32_t dac2trim =  MXC_DAC2->reg & 0xff00ffff;
+    uint32_t dac3trim =  MXC_DAC3->reg & 0xff00ffff;
+    dac2trim = dac2trim + MXC_TRIM->trim_reg_36;
+    dac3trim = dac3trim + MXC_TRIM->trim_reg_37;
+    MXC_PWRSEQ->reg5 = MXC_TRIM->trim_reg_13;
+    MXC_PWRSEQ->reg6 = MXC_TRIM->trim_reg_14;
+    MXC_DAC0->trm = MXC_TRIM->trim_reg_34;
+    MXC_DAC1->trm = MXC_TRIM->trim_reg_35;
+    MXC_DAC2->reg = dac2trim;
+    MXC_DAC3->reg = dac3trim;
+}
+
+void ICC_Enable(void)
+{
+    /* clock gater must be 'on' not 'dynamic' for cache control */
+    uint32_t temp = MXC_CLKMAN->clk_gate_ctrl0;
+    temp &= ~MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER;
+    temp |= (MXC_E_CLKMAN_CLK_GATE_ON << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS);
+    MXC_CLKMAN->clk_gate_ctrl0 = temp;
+
+
+    /* invalidate, wait, enable */
+    MXC_ICC->invdt_all = 0xFFFF;
+    while(!(MXC_ICC->ctrl_stat & MXC_F_ICC_CTRL_STAT_READY));
+    MXC_ICC->ctrl_stat |= MXC_F_ICC_CTRL_STAT_ENABLE;
+
+    /* must invalidate a second time for proper use */
+    MXC_ICC->invdt_all = 1;
+
+    /* clock gater 'dynamic' safe again */
+    temp = MXC_CLKMAN->clk_gate_ctrl0;
+    temp &= ~MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER;
+    temp |= (MXC_E_CLKMAN_CLK_GATE_DYNAMIC << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS);
+    MXC_CLKMAN->clk_gate_ctrl0 = temp;
+}
+
+// This function to be implemented by the hal
+extern void low_level_init();
+
+void SystemInit(void)
+{
+    set_pwr_regs();
+
+    // enable instruction cache
+    ICC_Enable();
+
+    low_level_init();
+
+    // Clear IO Active
+    MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE);
+
+    // Set WUD Clear
+    MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR);
+
+    // Set IO Active
+    MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE |
+                                MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED);
+
+    MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN;
+
+    // set systick to the RTC input 32.768kHz clock, not system clock; this is needed to keep JTAG alive during sleep
+    MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE;
+
+    SystemCoreClockUpdate();
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.h
new file mode 100644
index 0000000000..9bbd239f13
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.h
@@ -0,0 +1,53 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef SYSTEM_MAX32600_H_
+#define SYSTEM_MAX32600_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
+extern void SystemInit (void);
+
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_MAX32600_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tmr_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tmr_regs.h
new file mode 100644
index 0000000000..1803814ee5
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tmr_regs.h
@@ -0,0 +1,146 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_TMR_REGS_H
+#define _MXC_TMR_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  tmr_regs.h
+ * @addtogroup tmr TMR
+ * @{
+ */
+
+/**
+ * @brief Defines timer modes for 16 and 32-bit timers
+ */
+typedef enum {
+    /** 32-bit or 16-bit timer one-shot mode */
+    MXC_E_TMR_MODE_ONE_SHOT = 0,
+    /** 32-bit or 16-bit timer one-shot mode */
+    MXC_E_TMR_MODE_CONTINUOUS,
+    /** 32-bit timer counter mode */
+    MXC_E_TMR_MODE_COUNTER,
+    /** 32-bit timer pulse width modulation mode */
+    MXC_E_TMR_MODE_PWM,
+    /** 32-bit timer capture mode */
+    MXC_E_TMR_MODE_CAPTURE,
+    /** 32-bit timer compare mode */
+    MXC_E_TMR_MODE_COMPARE,
+    /** 32-bit timer gated mode */
+    MXC_E_TMR_MODE_GATED,
+    /** 32-bit timer measure mode */
+    MXC_E_TMR_MODE_MEASURE
+} mxc_tmr_mode_t;
+
+/*                                          Offset   Register Description
+                                            ======   ============================================== */
+typedef struct {
+    __IO uint32_t ctrl;                 /*  0x0000   Timer Control Register                         */
+    __IO uint32_t count32;              /*  0x0004   [32 bit] Current Count Value                   */
+    __IO uint32_t term_cnt32;           /*  0x0008   [32 bit] Terminal Count Setting                */
+    __IO uint32_t pwm_cap32;            /*  0x000C   [32 bit] PWM Compare Setting or Capture/Measure Value */
+    __IO uint32_t count16_0;            /*  0x0010   [16 bit] Current Count Value, 16-bit Timer0    */
+    __IO uint32_t term_cnt16_0;         /*  0x0014   [16 bit] Terminal Count Setting, 16-bit Timer0 */
+    __IO uint32_t count16_1;            /*  0x0018   [16 bit] Current Count Value, 16-bit Timer1    */
+    __IO uint32_t term_cnt16_1;         /*  0x001C   [16 bit] Terminal Count Setting, 16-bit Timer1 */
+    __IO uint32_t intfl;                /*  0x0020   Timer Module Interrupt Flags                   */
+    __IO uint32_t inten;                /*  0x0024   Timer Module Interrupt Enable/Disable Settings */
+} mxc_tmr_regs_t;
+
+/*
+   Register offsets for module TMR.
+*/
+#define MXC_R_TMR_OFFS_CTRL                       ((uint32_t)0x00000000UL)
+#define MXC_R_TMR_OFFS_COUNT32                    ((uint32_t)0x00000004UL)
+#define MXC_R_TMR_OFFS_TERM_CNT32                 ((uint32_t)0x00000008UL)
+#define MXC_R_TMR_OFFS_PWM_CAP32                  ((uint32_t)0x0000000CUL)
+#define MXC_R_TMR_OFFS_COUNT16_0                  ((uint32_t)0x00000010UL)
+#define MXC_R_TMR_OFFS_TERM_CNT16_0               ((uint32_t)0x00000014UL)
+#define MXC_R_TMR_OFFS_COUNT16_1                  ((uint32_t)0x00000018UL)
+#define MXC_R_TMR_OFFS_TERM_CNT16_1               ((uint32_t)0x0000001CUL)
+#define MXC_R_TMR_OFFS_INTFL                      ((uint32_t)0x00000020UL)
+#define MXC_R_TMR_OFFS_INTEN                      ((uint32_t)0x00000024UL)
+
+/*
+   Field positions and masks for module TMR.
+*/
+#define MXC_F_TMR_CTRL_MODE_POS                             0
+#define MXC_F_TMR_CTRL_MODE                                 ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS))
+#define MXC_F_TMR_CTRL_TMR2X16_POS                          3
+#define MXC_F_TMR_CTRL_TMR2X16                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS))
+#define MXC_F_TMR_CTRL_PRESCALE_POS                         4
+#define MXC_F_TMR_CTRL_PRESCALE                             ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS))
+#define MXC_F_TMR_CTRL_POLARITY_POS                         8
+#define MXC_F_TMR_CTRL_POLARITY                             ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS))
+#define MXC_F_TMR_CTRL_ENABLE0_POS                          12
+#define MXC_F_TMR_CTRL_ENABLE0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS))
+#define MXC_F_TMR_CTRL_ENABLE1_POS                          13
+#define MXC_F_TMR_CTRL_ENABLE1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS))
+
+#define MXC_F_TMR_COUNT16_0_VALUE_POS                       0
+#define MXC_F_TMR_COUNT16_0_VALUE                           ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS))
+
+#define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS               0
+#define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT                   ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS))
+
+#define MXC_F_TMR_COUNT16_1_VALUE_POS                       0
+#define MXC_F_TMR_COUNT16_1_VALUE                           ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS))
+
+#define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS               0
+#define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT                   ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS))
+
+#define MXC_F_TMR_INTFL_TIMER0_POS                          0
+#define MXC_F_TMR_INTFL_TIMER0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS))
+#define MXC_F_TMR_INTFL_TIMER1_POS                          1
+#define MXC_F_TMR_INTFL_TIMER1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS))
+
+#define MXC_F_TMR_INTEN_TIMER0_POS                          0
+#define MXC_F_TMR_INTEN_TIMER0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS))
+#define MXC_F_TMR_INTEN_TIMER1_POS                          1
+#define MXC_F_TMR_INTEN_TIMER1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_TMR_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tpu_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tpu_regs.h
new file mode 100644
index 0000000000..1a0c8f49b0
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/tpu_regs.h
@@ -0,0 +1,108 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_TPU_REGS_H_
+#define _MXC_TPU_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  tpu_regs.h
+ * @addtogroup tpu TPU
+ * @{
+ */
+
+/*                                               Offset   Register Description
+                                                 ======   ================================================== */
+typedef struct {
+    __I uint32_t rsv0000;                    /*  0x0000   Reserved                                          */
+    __I uint32_t rsv0004;                    /*  0x0004   Reserved - PUF Control (Deprecated)               */
+    __I uint32_t rsv0008;                    /*  0x0008   Reserved - PUF Output (Deprecated)                */
+    __I uint32_t rsv000C[125];               /*  0x000C                                                     */
+    __IO uint32_t prng_user_entropy;         /*  0x0200   PRNG User Entropy Value                           */
+    __IO uint32_t prng_rnd_num;              /*  0x0204   PRNG Random Number Output                         */
+} mxc_tpu_regs_t;
+
+/*                                               Offset   Register Description
+                                                 ======   ================================================= */
+typedef struct {
+    __IO uint32_t status;                    /*  0x0000   Dynamic Tamper Sensor Status                      */
+    __IO uint32_t ctrl0;                     /*  0x0004   Dynamic Tamper Sensor Control 0                   */
+    __IO uint32_t ctrl1;                     /*  0x0008   Dynamic Tamper Sensor Control 1                   */
+    __IO uint32_t sks0;                      /*  0x0010   TPU Secure Key Storage Register 0                 */
+    __IO uint32_t sks1;                      /*  0x0014   TPU Secure Key Storage Register 0                 */
+    __IO uint32_t sks2;                      /*  0x0018   TPU Secure Key Storage Register 0                 */
+    __IO uint32_t sks3;                      /*  0x001C   TPU Secure Key Storage Register 0                 */
+} mxc_tpu_tsr_regs_t;
+
+/*
+   Register offsets for module TPU.
+*/
+#define MXC_R_TPU_OFFS_PRNG_USER_ENTROPY    ((uint32_t)0x00000200UL)
+#define MXC_R_TPU_OFFS_PRNG_RND_NUM         ((uint32_t)0x00000204UL)
+#define MXC_R_TPU_TSR_OFFS_STATUS           ((uint32_t)0x00000000UL)
+#define MXC_R_TPU_TSR_OFFS_CTRL0            ((uint32_t)0x00000004UL)
+#define MXC_R_TPU_TSR_OFFS_CTRL1            ((uint32_t)0x00000008UL)
+#define MXC_R_TPU_TSR_OFFS_SKS0             ((uint32_t)0x00000010UL)
+#define MXC_R_TPU_TSR_OFFS_SKS1             ((uint32_t)0x00000014UL)
+#define MXC_R_TPU_TSR_OFFS_SKS2             ((uint32_t)0x00000018UL)
+#define MXC_R_TPU_TSR_OFFS_SKS3             ((uint32_t)0x0000001CUL)
+
+
+/*
+   Field positions and masks for module TPU.
+*/
+#define MXC_F_TPU_CTRL0_ERR_THR_POS         0
+#define MXC_F_TPU_CTRL0_ERR_THR             ((uint32_t)(0x0000001FUL << MXC_F_TPU_CTRL0_ERR_THR_POS))
+#define MXC_F_TPU_CTRL0_OUT_FREQ_POS        5
+#define MXC_F_TPU_CTRL0_OUT_FREQ            ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_OUT_FREQ_POS))
+#define MXC_F_TPU_CTRL0_CLOCK_DIV_POS       8
+#define MXC_F_TPU_CTRL0_CLOCK_DIV           ((uint32_t)(0x00000007UL << MXC_F_TPU_CTRL0_CLOCK_DIV_POS))
+#define MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS     14
+#define MXC_F_TPU_CTRL0_RTC_TX_BUSY         ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_RTC_TX_BUSY_POS))
+#define MXC_F_TPU_CTRL0_LOCK_POS            15
+#define MXC_F_TPU_CTRL0_LOCK                ((uint32_t)(0x00000001UL << MXC_F_TPU_CTRL0_LOCK_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_TPU_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/trim_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/trim_regs.h
new file mode 100644
index 0000000000..2c6ecac55c
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/trim_regs.h
@@ -0,0 +1,92 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_TRIM_REGS_H
+#define _MXC_TRIM_REGS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef struct {
+    __IO uint32_t trim_reg_00;
+    __IO uint32_t trim_reg_01;
+    __IO uint32_t trim_reg_02;
+    __IO uint32_t trim_reg_03;
+    __IO uint32_t trim_reg_04;
+    __IO uint32_t trim_reg_05;
+    __IO uint32_t trim_reg_06;
+    __IO uint32_t trim_reg_07;
+    __IO uint32_t trim_reg_08;
+    __IO uint32_t trim_reg_09;
+    __IO uint32_t trim_reg_10;
+    __IO uint32_t trim_reg_11;
+    __IO uint32_t trim_reg_12;
+    __IO uint32_t trim_reg_13;
+    __IO uint32_t trim_reg_14;
+    __IO uint32_t trim_reg_15;
+    __IO uint32_t trim_reg_16;
+    __IO uint32_t trim_reg_17;
+    __IO uint32_t trim_reg_18;
+    __IO uint32_t trim_reg_19;
+    __IO uint32_t trim_reg_20;
+    __IO uint32_t trim_reg_21;
+    __IO uint32_t trim_reg_22;
+    __IO uint32_t trim_reg_23;
+    __IO uint32_t trim_reg_24;
+    __IO uint32_t trim_reg_25;
+    __IO uint32_t trim_reg_26;
+    __IO uint32_t trim_reg_27;
+    __IO uint32_t trim_reg_28;
+    __IO uint32_t trim_reg_29;
+    __IO uint32_t trim_reg_30;
+    __IO uint32_t trim_reg_31;
+    __IO uint32_t trim_reg_32;
+    __IO uint32_t trim_reg_33;
+    __IO uint32_t trim_reg_34;
+    __IO uint32_t trim_reg_35;
+    __IO uint32_t trim_reg_36;
+    __IO uint32_t trim_reg_37;
+    __IO uint32_t trim_reg_38;
+    __IO uint32_t trim_reg_39;
+    __IO uint32_t trim_reg_40;
+    __IO uint32_t trim_reg_41;
+} mxc_ftr_regs_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _MXC_TRIM_REGS_H */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/uart_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/uart_regs.h
new file mode 100644
index 0000000000..49fbe5d967
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/uart_regs.h
@@ -0,0 +1,175 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_UART_REGS_H_
+#define _MXC_UART_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  uart_regs.h
+ * @addtogroup uart UART
+ * @{
+ */
+
+/*                                      Offset   Register Description
+                                        ======   ============================================== */
+typedef struct {
+    __IO uint32_t ctrl;             /*  0x0000   UART Control Register                          */
+    __IO uint32_t status;           /*  0x0004   UART Status Register                           */
+    __IO uint32_t inten;            /*  0x0008   Interrupt Enable/Disable Controls              */
+    __IO uint32_t intfl;            /*  0x000C   Interrupt Flags                                */
+    __IO uint32_t baud_int;         /*  0x0010   Baud Rate Setting (Integer Portion)            */
+    __IO uint32_t baud_div_128;     /*  0x0014   Baud Rate Setting                              */
+    __IO uint32_t tx_fifo_out;      /*  0x0018   TX FIFO Output End (read-only)                 */
+    __IO uint32_t hw_flow_ctrl;     /*  0x001C   Hardware Flow Control Register                 */
+    __IO uint32_t tx_rx_fifo;       /*  0x0020   Write to load TX FIFO, Read to unload RX FIFO  */
+} mxc_uart_regs_t;
+
+
+/*
+    Register offsets for module UART.
+*/
+#define MXC_R_UART_OFFS_CTRL                      ((uint32_t)0x00000000UL)
+#define MXC_R_UART_OFFS_STATUS                    ((uint32_t)0x00000004UL)
+#define MXC_R_UART_OFFS_INTEN                     ((uint32_t)0x00000008UL)
+#define MXC_R_UART_OFFS_INTFL                     ((uint32_t)0x0000000CUL)
+#define MXC_R_UART_OFFS_BAUD_INT                  ((uint32_t)0x00000010UL)
+#define MXC_R_UART_OFFS_BAUD_DIV_128              ((uint32_t)0x00000014UL)
+#define MXC_R_UART_OFFS_TX_FIFO_OUT               ((uint32_t)0x00000018UL)
+#define MXC_R_UART_OFFS_HW_FLOW_CTRL              ((uint32_t)0x0000001CUL)
+#define MXC_R_UART_OFFS_TX_RX_FIFO                ((uint32_t)0x00000020UL)
+
+/*
+   Field positions and masks for module UART.
+*/
+#define MXC_F_UART_CTRL_RX_THRESHOLD_POS                    0
+#define MXC_F_UART_CTRL_RX_THRESHOLD                        ((uint32_t)(0x00000007UL << MXC_F_UART_CTRL_RX_THRESHOLD_POS))
+#define MXC_F_UART_CTRL_PARITY_ENABLE_POS                   4
+#define MXC_F_UART_CTRL_PARITY_ENABLE                       ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_ENABLE_POS))
+#define MXC_F_UART_CTRL_PARITY_MODE_POS                     5
+#define MXC_F_UART_CTRL_PARITY_MODE                         ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_MODE_POS))
+#define MXC_F_UART_CTRL_PARITY_BIAS_POS                     6
+#define MXC_F_UART_CTRL_PARITY_BIAS                         ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_BIAS_POS))
+#define MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS                   8
+#define MXC_F_UART_CTRL_TX_FIFO_FLUSH                       ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS))
+#define MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS                   9
+#define MXC_F_UART_CTRL_RX_FIFO_FLUSH                       ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS))
+#define MXC_F_UART_CTRL_CHAR_LENGTH_POS                     10
+#define MXC_F_UART_CTRL_CHAR_LENGTH                         ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_CHAR_LENGTH_POS))
+#define MXC_F_UART_CTRL_STOP_BIT_MODE_POS                   12
+#define MXC_F_UART_CTRL_STOP_BIT_MODE                       ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_STOP_BIT_MODE_POS))
+#define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS                 13
+#define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN                     ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS))
+#define MXC_F_UART_CTRL_BAUD_CLK_EN_POS                     14
+#define MXC_F_UART_CTRL_BAUD_CLK_EN                         ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_BAUD_CLK_EN_POS))
+
+#define MXC_F_UART_STATUS_TX_BUSY_POS                       0
+#define MXC_F_UART_STATUS_TX_BUSY                           ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_BUSY_POS))
+#define MXC_F_UART_STATUS_RX_BUSY_POS                       1
+#define MXC_F_UART_STATUS_RX_BUSY                           ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_BUSY_POS))
+#define MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS                 4
+#define MXC_F_UART_STATUS_RX_FIFO_EMPTY                     ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS))
+#define MXC_F_UART_STATUS_RX_FIFO_FULL_POS                  5
+#define MXC_F_UART_STATUS_RX_FIFO_FULL                      ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_FULL_POS))
+#define MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS                 6
+#define MXC_F_UART_STATUS_TX_FIFO_EMPTY                     ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS))
+#define MXC_F_UART_STATUS_TX_FIFO_FULL_POS                  7
+#define MXC_F_UART_STATUS_TX_FIFO_FULL                      ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_FULL_POS))
+#define MXC_F_UART_STATUS_RX_FIFO_CHARS_POS                 8
+#define MXC_F_UART_STATUS_RX_FIFO_CHARS                     ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_RX_FIFO_CHARS_POS))
+#define MXC_F_UART_STATUS_TX_FIFO_CHARS_POS                 12
+#define MXC_F_UART_STATUS_TX_FIFO_CHARS                     ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_TX_FIFO_CHARS_POS))
+
+#define MXC_F_UART_INTEN_RX_FRAME_ERROR_POS                 0
+#define MXC_F_UART_INTEN_RX_FRAME_ERROR                     ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAME_ERROR_POS))
+#define MXC_F_UART_INTEN_RX_PARITY_ERROR_POS                1
+#define MXC_F_UART_INTEN_RX_PARITY_ERROR                    ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERROR_POS))
+#define MXC_F_UART_INTEN_CTS_CHANGE_POS                     2
+#define MXC_F_UART_INTEN_CTS_CHANGE                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_CTS_CHANGE_POS))
+#define MXC_F_UART_INTEN_RX_OVERRUN_POS                     3
+#define MXC_F_UART_INTEN_RX_OVERRUN                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVERRUN_POS))
+#define MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS              4
+#define MXC_F_UART_INTEN_RX_OVER_THRESHOLD                  ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS))
+#define MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS                5
+#define MXC_F_UART_INTEN_TX_ALMOST_EMPTY                    ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS))
+#define MXC_F_UART_INTEN_TX_HALF_EMPTY_POS                  6
+#define MXC_F_UART_INTEN_TX_HALF_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_HALF_EMPTY_POS))
+
+#define MXC_F_UART_INTFL_RX_FRAME_ERROR_POS                 0
+#define MXC_F_UART_INTFL_RX_FRAME_ERROR                     ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAME_ERROR_POS))
+#define MXC_F_UART_INTFL_RX_PARITY_ERROR_POS                1
+#define MXC_F_UART_INTFL_RX_PARITY_ERROR                    ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERROR_POS))
+#define MXC_F_UART_INTFL_CTS_CHANGE_POS                     2
+#define MXC_F_UART_INTFL_CTS_CHANGE                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_CTS_CHANGE_POS))
+#define MXC_F_UART_INTFL_RX_OVERRUN_POS                     3
+#define MXC_F_UART_INTFL_RX_OVERRUN                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVERRUN_POS))
+#define MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS              4
+#define MXC_F_UART_INTFL_RX_OVER_THRESHOLD                  ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS))
+#define MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS                5
+#define MXC_F_UART_INTFL_TX_ALMOST_EMPTY                    ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS))
+#define MXC_F_UART_INTFL_TX_HALF_EMPTY_POS                  6
+#define MXC_F_UART_INTFL_TX_HALF_EMPTY                      ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_HALF_EMPTY_POS))
+
+#define MXC_F_UART_BAUD_INT_FBAUD_POS                       0
+#define MXC_F_UART_BAUD_INT_FBAUD                           ((uint32_t)(0x00000FFFUL << MXC_F_UART_BAUD_INT_FBAUD_POS))
+
+#define MXC_F_UART_BAUD_DIV_128_DIV_POS                     0
+#define MXC_F_UART_BAUD_DIV_128_DIV                         ((uint32_t)(0x0000007FUL << MXC_F_UART_BAUD_DIV_128_DIV_POS))
+
+#define MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS                  0
+#define MXC_F_UART_TX_FIFO_OUT_TX_FIFO                      ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS))
+
+#define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS               0
+#define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT                   ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS))
+#define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS              1
+#define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT                  ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS))
+
+#define MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS                 0
+#define MXC_F_UART_TX_RX_FIFO_FIFO_DATA                     ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS))
+#define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS              8
+#define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR                  ((uint32_t)(0x00000001UL << MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_UART_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/usb_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/usb_regs.h
new file mode 100644
index 0000000000..6f2b9b8e03
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/usb_regs.h
@@ -0,0 +1,480 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_USB_REGS_H_
+#define _MXC_USB_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  usb_regs.h
+ * @addtogroup usb USB
+ * @{
+ */
+
+/*                                                Offset   Register Description
+                                                  ======   ================================================ */
+typedef struct {
+    __IO uint32_t cn;                         /*  0x0000   USB Control Register                             */
+    __I uint32_t rsv0004[127];                /*  0x0004                                                    */
+    __IO uint32_t dev_addr;                   /*  0x0200   USB Device Address Register                      */
+    __IO uint32_t dev_cn;                     /*  0x0204   USB Device Control Register                      */
+    __IO uint32_t dev_intfl;                  /*  0x0208   USB Device Interrupt                             */
+    __IO uint32_t dev_inten;                  /*  0x020C   USB Device Interrupt Enable                      */
+    __I uint32_t rsv0210[4];                  /*  0x0210                                                    */
+    __IO uint32_t ep_base;                    /*  0x0220   USB Endpoint Descriptor Table Base Address       */
+    __IO uint32_t cur_buf;                    /*  0x0224   USB Current Endpoint Buffer Register             */
+    __IO uint32_t in_owner;                   /*  0x0228   USB IN Endpoint Buffer Owner Register            */
+    __IO uint32_t out_owner;                  /*  0x022C   USB OUT Endpoint Buffer Owner Register           */
+    __IO uint32_t in_int;                     /*  0x0230   USB IN Endpoint Buffer Available Interrupt       */
+    __IO uint32_t out_int;                    /*  0x0234   USB OUT Endpoint Data Available Interrupt        */
+    __IO uint32_t nak_int;                    /*  0x0238   USB IN Endpoint NAK Interrupt                    */
+    __IO uint32_t dma_err_int;                /*  0x023C   USB DMA Error Interrupt                          */
+    __IO uint32_t buf_ovr_int;                /*  0x0240   USB Buffer Overflow Interrupt                    */
+    __I uint32_t rsv0244[7];                  /*  0x0244                                                    */
+    __IO uint32_t setup0;                     /*  0x0260   USB SETUP Packet Bytes 0 to 3                    */
+    __IO uint32_t setup1;                     /*  0x0264   USB SETUP Packet Bytes 4 to 7                    */
+    __I uint32_t rsv0268[6];                  /*  0x0268                                                    */
+    __IO uint32_t ep[MXC_USB_NUM_EP];         /*  0x0280   USB Endpoint Control Registers                   */
+} mxc_usb_regs_t;
+
+
+/*
+   Register offsets for module USB.
+*/
+#define MXC_R_USB_OFFS_CN                       ((uint32_t)0x00000000UL)
+#define MXC_R_USB_OFFS_DEV_ADDR                 ((uint32_t)0x00000200UL)
+#define MXC_R_USB_OFFS_DEV_CN                   ((uint32_t)0x00000204UL)
+#define MXC_R_USB_OFFS_DEV_INTFL                ((uint32_t)0x00000208UL)
+#define MXC_R_USB_OFFS_DEV_INTEN                ((uint32_t)0x0000020CUL)
+#define MXC_R_USB_OFFS_EP_BASE                  ((uint32_t)0x00000220UL)
+#define MXC_R_USB_OFFS_CUR_BUF                  ((uint32_t)0x00000224UL)
+#define MXC_R_USB_OFFS_IN_OWNER                 ((uint32_t)0x00000228UL)
+#define MXC_R_USB_OFFS_OUT_OWNER                ((uint32_t)0x0000022CUL)
+#define MXC_R_USB_OFFS_IN_INT                   ((uint32_t)0x00000230UL)
+#define MXC_R_USB_OFFS_OUT_INT                  ((uint32_t)0x00000234UL)
+#define MXC_R_USB_OFFS_NAK_INT                  ((uint32_t)0x00000238UL)
+#define MXC_R_USB_OFFS_DMA_ERR_INT              ((uint32_t)0x0000023CUL)
+#define MXC_R_USB_OFFS_BUF_OVR_INT              ((uint32_t)0x00000240UL)
+#define MXC_R_USB_OFFS_SETUP0                   ((uint32_t)0x00000260UL)
+#define MXC_R_USB_OFFS_SETUP1                   ((uint32_t)0x00000264UL)
+#define MXC_R_USB_OFFS_EP0                      ((uint32_t)0x00000280UL)
+#define MXC_R_USB_OFFS_EP1                      ((uint32_t)0x00000284UL)
+#define MXC_R_USB_OFFS_EP2                      ((uint32_t)0x00000288UL)
+#define MXC_R_USB_OFFS_EP3                      ((uint32_t)0x0000028CUL)
+#define MXC_R_USB_OFFS_EP4                      ((uint32_t)0x00000290UL)
+#define MXC_R_USB_OFFS_EP5                      ((uint32_t)0x00000294UL)
+#define MXC_R_USB_OFFS_EP6                      ((uint32_t)0x00000298UL)
+#define MXC_R_USB_OFFS_EP7                      ((uint32_t)0x0000029CUL)
+
+
+/*
+   Field positions and masks for module USB.
+*/
+#define MXC_F_USB_CN_USB_EN_POS                 0
+#define MXC_F_USB_CN_USB_EN                     ((uint32_t)(0x00000001UL << MXC_F_USB_CN_USB_EN_POS))
+
+#define MXC_F_USB_DEV_ADDR_DEV_ADDR_POS         0
+#define MXC_F_USB_DEV_ADDR_DEV_ADDR             ((uint32_t)(0x0000007FUL << MXC_F_USB_DEV_ADDR_DEV_ADDR_POS))
+
+#define MXC_F_USB_DEV_CN_SIGRWU_POS             2
+#define MXC_F_USB_DEV_CN_SIGRWU                 ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_SIGRWU_POS))
+#define MXC_F_USB_DEV_CN_CONNECT_POS            3
+#define MXC_F_USB_DEV_CN_CONNECT                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_CONNECT_POS))
+#define MXC_F_USB_DEV_CN_ULPM_POS               4
+#define MXC_F_USB_DEV_CN_ULPM                   ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_ULPM_POS))
+#define MXC_F_USB_DEV_CN_URST_POS               5
+#define MXC_F_USB_DEV_CN_URST                   ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_URST_POS))
+#define MXC_F_USB_DEV_CN_VBGATE_POS             6
+#define MXC_F_USB_DEV_CN_VBGATE                 ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_VBGATE_POS))
+#define MXC_F_USB_DEV_CN_FIFO_MODE_POS          9
+#define MXC_F_USB_DEV_CN_FIFO_MODE              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_FIFO_MODE_POS))
+
+#define MXC_F_USB_DEV_INTFL_DPACT_POS           0
+#define MXC_F_USB_DEV_INTFL_DPACT               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DPACT_POS))
+#define MXC_F_USB_DEV_INTFL_RWU_DN_POS          1
+#define MXC_F_USB_DEV_INTFL_RWU_DN              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_RWU_DN_POS))
+#define MXC_F_USB_DEV_INTFL_BACT_POS            2
+#define MXC_F_USB_DEV_INTFL_BACT                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BACT_POS))
+#define MXC_F_USB_DEV_INTFL_BRST_POS            3
+#define MXC_F_USB_DEV_INTFL_BRST                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_POS))
+#define MXC_F_USB_DEV_INTFL_SUSP_POS            4
+#define MXC_F_USB_DEV_INTFL_SUSP                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SUSP_POS))
+#define MXC_F_USB_DEV_INTFL_NO_VBUS_POS         5
+#define MXC_F_USB_DEV_INTFL_NO_VBUS             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_NO_VBUS_POS))
+#define MXC_F_USB_DEV_INTFL_VBUS_POS            6
+#define MXC_F_USB_DEV_INTFL_VBUS                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_POS))
+#define MXC_F_USB_DEV_INTFL_BRST_DN_POS         7
+#define MXC_F_USB_DEV_INTFL_BRST_DN             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_DN_POS))
+#define MXC_F_USB_DEV_INTFL_SETUP_POS           8
+#define MXC_F_USB_DEV_INTFL_SETUP               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SETUP_POS))
+#define MXC_F_USB_DEV_INTFL_EP_IN_POS           9
+#define MXC_F_USB_DEV_INTFL_EP_IN               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_IN_POS))
+#define MXC_F_USB_DEV_INTFL_EP_OUT_POS          10
+#define MXC_F_USB_DEV_INTFL_EP_OUT              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_OUT_POS))
+#define MXC_F_USB_DEV_INTFL_EP_NAK_POS          11
+#define MXC_F_USB_DEV_INTFL_EP_NAK              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_NAK_POS))
+#define MXC_F_USB_DEV_INTFL_DMA_ERR_POS         12
+#define MXC_F_USB_DEV_INTFL_DMA_ERR             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DMA_ERR_POS))
+#define MXC_F_USB_DEV_INTFL_BUF_OVR_POS         13
+#define MXC_F_USB_DEV_INTFL_BUF_OVR             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BUF_OVR_POS))
+#define MXC_F_USB_DEV_INTFL_VBUS_ST_POS         16
+#define MXC_F_USB_DEV_INTFL_VBUS_ST             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_ST_POS))
+
+#define MXC_F_USB_DEV_INTEN_DPACT_POS           0
+#define MXC_F_USB_DEV_INTEN_DPACT               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DPACT_POS))
+#define MXC_F_USB_DEV_INTEN_RWU_DN_POS          1
+#define MXC_F_USB_DEV_INTEN_RWU_DN              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_RWU_DN_POS))
+#define MXC_F_USB_DEV_INTEN_BACT_POS            2
+#define MXC_F_USB_DEV_INTEN_BACT                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BACT_POS))
+#define MXC_F_USB_DEV_INTEN_BRST_POS            3
+#define MXC_F_USB_DEV_INTEN_BRST                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_POS))
+#define MXC_F_USB_DEV_INTEN_SUSP_POS            4
+#define MXC_F_USB_DEV_INTEN_SUSP                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SUSP_POS))
+#define MXC_F_USB_DEV_INTEN_NO_VBUS_POS         5
+#define MXC_F_USB_DEV_INTEN_NO_VBUS             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_NO_VBUS_POS))
+#define MXC_F_USB_DEV_INTEN_VBUS_POS            6
+#define MXC_F_USB_DEV_INTEN_VBUS                ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_VBUS_POS))
+#define MXC_F_USB_DEV_INTEN_BRST_DN_POS         7
+#define MXC_F_USB_DEV_INTEN_BRST_DN             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_DN_POS))
+#define MXC_F_USB_DEV_INTEN_SETUP_POS           8
+#define MXC_F_USB_DEV_INTEN_SETUP               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SETUP_POS))
+#define MXC_F_USB_DEV_INTEN_EP_IN_POS           9
+#define MXC_F_USB_DEV_INTEN_EP_IN               ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_IN_POS))
+#define MXC_F_USB_DEV_INTEN_EP_OUT_POS          10
+#define MXC_F_USB_DEV_INTEN_EP_OUT              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_OUT_POS))
+#define MXC_F_USB_DEV_INTEN_EP_NAK_POS          11
+#define MXC_F_USB_DEV_INTEN_EP_NAK              ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_NAK_POS))
+#define MXC_F_USB_DEV_INTEN_DMA_ERR_POS         12
+#define MXC_F_USB_DEV_INTEN_DMA_ERR             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DMA_ERR_POS))
+#define MXC_F_USB_DEV_INTEN_BUF_OVR_POS         13
+#define MXC_F_USB_DEV_INTEN_BUF_OVR             ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BUF_OVR_POS))
+
+#define MXC_F_USB_EP_BASE_EP_BASE_POS           9
+#define MXC_F_USB_EP_BASE_EP_BASE               ((uint32_t)(0x007FFFFFUL << MXC_F_USB_EP_BASE_EP_BASE_POS))
+
+#define MXC_F_USB_CUR_BUF_OUT_BUF_POS           0
+#define MXC_F_USB_CUR_BUF_OUT_BUF               ((uint32_t)(0x000000FFUL << MXC_F_USB_CUR_BUF_OUT_BUF_POS))
+#define MXC_F_USB_CUR_BUF_IN_BUF_POS            16
+#define MXC_F_USB_CUR_BUF_IN_BUF                ((uint32_t)(0x000000FFUL << MXC_F_USB_CUR_BUF_IN_BUF_POS))
+
+#define MXC_F_USB_IN_OWNER_BUF0_OWNER_POS       0
+#define MXC_F_USB_IN_OWNER_BUF0_OWNER           ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_OWNER_BUF0_OWNER_POS))
+#define MXC_F_USB_IN_OWNER_BUF1_OWNER_POS       16
+#define MXC_F_USB_IN_OWNER_BUF1_OWNER           ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_OWNER_BUF1_OWNER_POS))
+
+#define MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS      0
+#define MXC_F_USB_OUT_OWNER_BUF0_OWNER          ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS))
+#define MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS      16
+#define MXC_F_USB_OUT_OWNER_BUF1_OWNER          ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS))
+
+#define MXC_F_USB_IN_INT_INBAV0_POS             0
+#define MXC_F_USB_IN_INT_INBAV0                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV0_POS))
+#define MXC_F_USB_IN_INT_INBAV1_POS             1
+#define MXC_F_USB_IN_INT_INBAV1                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV1_POS))
+#define MXC_F_USB_IN_INT_INBAV2_POS             2
+#define MXC_F_USB_IN_INT_INBAV2                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV2_POS))
+#define MXC_F_USB_IN_INT_INBAV3_POS             3
+#define MXC_F_USB_IN_INT_INBAV3                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV3_POS))
+#define MXC_F_USB_IN_INT_INBAV4_POS             4
+#define MXC_F_USB_IN_INT_INBAV4                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV4_POS))
+#define MXC_F_USB_IN_INT_INBAV5_POS             5
+#define MXC_F_USB_IN_INT_INBAV5                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV5_POS))
+#define MXC_F_USB_IN_INT_INBAV6_POS             6
+#define MXC_F_USB_IN_INT_INBAV6                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV6_POS))
+#define MXC_F_USB_IN_INT_INBAV7_POS             7
+#define MXC_F_USB_IN_INT_INBAV7                 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV7_POS))
+
+#define MXC_F_USB_OUT_INT_OUTDAV0_POS           0
+#define MXC_F_USB_OUT_INT_OUTDAV0               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV0_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV1_POS           1
+#define MXC_F_USB_OUT_INT_OUTDAV1               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV1_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV2_POS           2
+#define MXC_F_USB_OUT_INT_OUTDAV2               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV2_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV3_POS           3
+#define MXC_F_USB_OUT_INT_OUTDAV3               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV3_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV4_POS           4
+#define MXC_F_USB_OUT_INT_OUTDAV4               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV4_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV5_POS           5
+#define MXC_F_USB_OUT_INT_OUTDAV5               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV5_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV6_POS           6
+#define MXC_F_USB_OUT_INT_OUTDAV6               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV6_POS))
+#define MXC_F_USB_OUT_INT_OUTDAV7_POS           7
+#define MXC_F_USB_OUT_INT_OUTDAV7               ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV7_POS))
+
+#define MXC_F_USB_NAK_INT_NAK0_POS              0
+#define MXC_F_USB_NAK_INT_NAK0                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK0_POS))
+#define MXC_F_USB_NAK_INT_NAK1_POS              1
+#define MXC_F_USB_NAK_INT_NAK1                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK1_POS))
+#define MXC_F_USB_NAK_INT_NAK2_POS              2
+#define MXC_F_USB_NAK_INT_NAK2                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK2_POS))
+#define MXC_F_USB_NAK_INT_NAK3_POS              3
+#define MXC_F_USB_NAK_INT_NAK3                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK3_POS))
+#define MXC_F_USB_NAK_INT_NAK4_POS              4
+#define MXC_F_USB_NAK_INT_NAK4                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK4_POS))
+#define MXC_F_USB_NAK_INT_NAK5_POS              5
+#define MXC_F_USB_NAK_INT_NAK5                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK5_POS))
+#define MXC_F_USB_NAK_INT_NAK6_POS              6
+#define MXC_F_USB_NAK_INT_NAK6                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK6_POS))
+#define MXC_F_USB_NAK_INT_NAK7_POS              7
+#define MXC_F_USB_NAK_INT_NAK7                  ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK7_POS))
+
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR0_POS      0
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR0          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR0_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR1_POS      1
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR1          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR1_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR2_POS      2
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR2          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR2_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR3_POS      3
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR3          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR3_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR4_POS      4
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR4          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR4_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR5_POS      5
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR5          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR5_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR6_POS      6
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR6          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR6_POS))
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR7_POS      7
+#define MXC_F_USB_DMA_ERR_INT_DMA_ERR7          ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR7_POS))
+
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR0_POS      0
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR0          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR0_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR1_POS      1
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR1          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR1_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR2_POS      2
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR2          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR2_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR3_POS      3
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR3          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR3_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR4_POS      4
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR4          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR4_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR5_POS      5
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR5          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR5_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR6_POS      6
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR6          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR6_POS))
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR7_POS      7
+#define MXC_F_USB_BUF_OVR_INT_BUF_OVR7          ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR7_POS))
+
+#define MXC_F_USB_SETUP0_BYTE0_POS              0
+#define MXC_F_USB_SETUP0_BYTE0                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE0_POS))
+#define MXC_F_USB_SETUP0_BYTE1_POS              8
+#define MXC_F_USB_SETUP0_BYTE1                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE1_POS))
+#define MXC_F_USB_SETUP0_BYTE2_POS              16
+#define MXC_F_USB_SETUP0_BYTE2                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE2_POS))
+#define MXC_F_USB_SETUP0_BYTE3_POS              24
+#define MXC_F_USB_SETUP0_BYTE3                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE3_POS))
+
+#define MXC_F_USB_SETUP1_BYTE4_POS              0
+#define MXC_F_USB_SETUP1_BYTE4                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE4_POS))
+#define MXC_F_USB_SETUP1_BYTE5_POS              8
+#define MXC_F_USB_SETUP1_BYTE5                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE5_POS))
+#define MXC_F_USB_SETUP1_BYTE6_POS              16
+#define MXC_F_USB_SETUP1_BYTE6                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE6_POS))
+#define MXC_F_USB_SETUP1_BYTE7_POS              24
+#define MXC_F_USB_SETUP1_BYTE7                  ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE7_POS))
+
+#define MXC_F_USB_EP0_EP_DIR_POS                0
+#define MXC_F_USB_EP0_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP0_EP_DIR_POS))
+#define MXC_F_USB_EP0_EP_BUF2_POS               3
+#define MXC_F_USB_EP0_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_BUF2_POS))
+#define MXC_F_USB_EP0_EP_INT_EN_POS             4
+#define MXC_F_USB_EP0_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_INT_EN_POS))
+#define MXC_F_USB_EP0_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP0_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_NAK_EN_POS))
+#define MXC_F_USB_EP0_EP_DT_POS                 6
+#define MXC_F_USB_EP0_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_DT_POS))
+#define MXC_F_USB_EP0_EP_STALL_POS              8
+#define MXC_F_USB_EP0_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_STALL_POS))
+#define MXC_F_USB_EP0_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP0_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_ST_STALL_POS))
+#define MXC_F_USB_EP0_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP0_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP1_EP_DIR_POS                0
+#define MXC_F_USB_EP1_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP1_EP_DIR_POS))
+#define MXC_F_USB_EP1_EP_BUF2_POS               3
+#define MXC_F_USB_EP1_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_BUF2_POS))
+#define MXC_F_USB_EP1_EP_INT_EN_POS             4
+#define MXC_F_USB_EP1_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_INT_EN_POS))
+#define MXC_F_USB_EP1_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP1_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_NAK_EN_POS))
+#define MXC_F_USB_EP1_EP_DT_POS                 6
+#define MXC_F_USB_EP1_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_DT_POS))
+#define MXC_F_USB_EP1_EP_STALL_POS              8
+#define MXC_F_USB_EP1_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_STALL_POS))
+#define MXC_F_USB_EP1_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP1_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_ST_STALL_POS))
+#define MXC_F_USB_EP1_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP1_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP2_EP_DIR_POS                0
+#define MXC_F_USB_EP2_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP2_EP_DIR_POS))
+#define MXC_F_USB_EP2_EP_BUF2_POS               3
+#define MXC_F_USB_EP2_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_BUF2_POS))
+#define MXC_F_USB_EP2_EP_INT_EN_POS             4
+#define MXC_F_USB_EP2_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_INT_EN_POS))
+#define MXC_F_USB_EP2_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP2_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_NAK_EN_POS))
+#define MXC_F_USB_EP2_EP_DT_POS                 6
+#define MXC_F_USB_EP2_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_DT_POS))
+#define MXC_F_USB_EP2_EP_STALL_POS              8
+#define MXC_F_USB_EP2_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_STALL_POS))
+#define MXC_F_USB_EP2_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP2_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_ST_STALL_POS))
+#define MXC_F_USB_EP2_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP2_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP3_EP_DIR_POS                0
+#define MXC_F_USB_EP3_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP3_EP_DIR_POS))
+#define MXC_F_USB_EP3_EP_BUF2_POS               3
+#define MXC_F_USB_EP3_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_BUF2_POS))
+#define MXC_F_USB_EP3_EP_INT_EN_POS             4
+#define MXC_F_USB_EP3_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_INT_EN_POS))
+#define MXC_F_USB_EP3_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP3_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_NAK_EN_POS))
+#define MXC_F_USB_EP3_EP_DT_POS                 6
+#define MXC_F_USB_EP3_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_DT_POS))
+#define MXC_F_USB_EP3_EP_STALL_POS              8
+#define MXC_F_USB_EP3_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_STALL_POS))
+#define MXC_F_USB_EP3_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP3_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_ST_STALL_POS))
+#define MXC_F_USB_EP3_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP3_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP4_EP_DIR_POS                0
+#define MXC_F_USB_EP4_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP4_EP_DIR_POS))
+#define MXC_F_USB_EP4_EP_BUF2_POS               3
+#define MXC_F_USB_EP4_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_BUF2_POS))
+#define MXC_F_USB_EP4_EP_INT_EN_POS             4
+#define MXC_F_USB_EP4_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_INT_EN_POS))
+#define MXC_F_USB_EP4_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP4_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_NAK_EN_POS))
+#define MXC_F_USB_EP4_EP_DT_POS                 6
+#define MXC_F_USB_EP4_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_DT_POS))
+#define MXC_F_USB_EP4_EP_STALL_POS              8
+#define MXC_F_USB_EP4_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_STALL_POS))
+#define MXC_F_USB_EP4_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP4_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_ST_STALL_POS))
+#define MXC_F_USB_EP4_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP4_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP5_EP_DIR_POS                0
+#define MXC_F_USB_EP5_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP5_EP_DIR_POS))
+#define MXC_F_USB_EP5_EP_BUF2_POS               3
+#define MXC_F_USB_EP5_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_BUF2_POS))
+#define MXC_F_USB_EP5_EP_INT_EN_POS             4
+#define MXC_F_USB_EP5_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_INT_EN_POS))
+#define MXC_F_USB_EP5_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP5_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_NAK_EN_POS))
+#define MXC_F_USB_EP5_EP_DT_POS                 6
+#define MXC_F_USB_EP5_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_DT_POS))
+#define MXC_F_USB_EP5_EP_STALL_POS              8
+#define MXC_F_USB_EP5_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_STALL_POS))
+#define MXC_F_USB_EP5_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP5_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_ST_STALL_POS))
+#define MXC_F_USB_EP5_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP5_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP6_EP_DIR_POS                0
+#define MXC_F_USB_EP6_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP6_EP_DIR_POS))
+#define MXC_F_USB_EP6_EP_BUF2_POS               3
+#define MXC_F_USB_EP6_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_BUF2_POS))
+#define MXC_F_USB_EP6_EP_INT_EN_POS             4
+#define MXC_F_USB_EP6_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_INT_EN_POS))
+#define MXC_F_USB_EP6_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP6_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_NAK_EN_POS))
+#define MXC_F_USB_EP6_EP_DT_POS                 6
+#define MXC_F_USB_EP6_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_DT_POS))
+#define MXC_F_USB_EP6_EP_STALL_POS              8
+#define MXC_F_USB_EP6_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_STALL_POS))
+#define MXC_F_USB_EP6_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP6_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_ST_STALL_POS))
+#define MXC_F_USB_EP6_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP6_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP7_EP_DIR_POS                0
+#define MXC_F_USB_EP7_EP_DIR                    ((uint32_t)(0x00000003UL << MXC_F_USB_EP7_EP_DIR_POS))
+#define MXC_F_USB_EP7_EP_BUF2_POS               3
+#define MXC_F_USB_EP7_EP_BUF2                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_BUF2_POS))
+#define MXC_F_USB_EP7_EP_INT_EN_POS             4
+#define MXC_F_USB_EP7_EP_INT_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_INT_EN_POS))
+#define MXC_F_USB_EP7_EP_NAK_EN_POS             5
+#define MXC_F_USB_EP7_EP_NAK_EN                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_NAK_EN_POS))
+#define MXC_F_USB_EP7_EP_DT_POS                 6
+#define MXC_F_USB_EP7_EP_DT                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_DT_POS))
+#define MXC_F_USB_EP7_EP_STALL_POS              8
+#define MXC_F_USB_EP7_EP_STALL                  ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_STALL_POS))
+#define MXC_F_USB_EP7_EP_ST_STALL_POS           9
+#define MXC_F_USB_EP7_EP_ST_STALL               ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_STALL_POS))
+#define MXC_F_USB_EP7_EP_ST_ACK_POS             10
+#define MXC_F_USB_EP7_EP_ST_ACK                 ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_ACK_POS))
+
+#define MXC_F_USB_EP_DIR_POS                    (0)
+#define MXC_F_USB_EP_DIR                        ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS))
+
+#define MXC_V_USB_EP_DIR_DISABLE                ((uint32_t)0x00000000UL)
+#define MXC_V_USB_EP_DIR_OUT                    ((uint32_t)0x00000001UL)
+#define MXC_V_USB_EP_DIR_IN                     ((uint32_t)0x00000002UL)
+#define MXC_V_USB_EP_DIR_CONTROL                ((uint32_t)0x00000003UL)
+
+#define MXC_S_USB_EP_DIR_DISABLE                (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS)
+#define MXC_S_USB_EP_DIR_OUT                    (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS)
+#define MXC_S_USB_EP_DIR_IN                     (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS)
+#define MXC_S_USB_EP_DIR_CONTROL                (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS)
+
+#define MXC_F_USB_EP_BUF2_POS                   (3)
+#define MXC_F_USB_EP_BUF2                       ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS))
+#define MXC_F_USB_EP_INTEN_POS                  (4)
+#define MXC_F_USB_EP_INT_EN                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INTEN_POS))
+#define MXC_F_USB_EP_NAK_EN_POS                 (5)
+#define MXC_F_USB_EP_NAK_EN                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS))
+#define MXC_F_USB_EP_DT_POS                     (6)
+#define MXC_F_USB_EP_DT                         ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS))
+#define MXC_F_USB_EP_STALL_POS                  (8)
+#define MXC_F_USB_EP_STALL                      ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS))
+#define MXC_F_USB_EP_ST_STALL_POS               (9)
+#define MXC_F_USB_EP_ST_STALL                   ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS))
+#define MXC_F_USB_EP_ST_ACK_POS                 (10)
+#define MXC_F_USB_EP_ST_ACK                     ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif /* _MXC_USB_REGS_H_ */
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/wdt_regs.h b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/wdt_regs.h
new file mode 100644
index 0000000000..906e801460
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/wdt_regs.h
@@ -0,0 +1,150 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#ifndef _MXC_WDT_REGS_H_
+#define _MXC_WDT_REGS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @file  wdt_regs.h
+ * @addtogroup wdt WDT
+ * @{
+ */
+
+/**
+ * @brief Defines watchdog timer periods
+ */
+typedef enum {
+    /** 2^31 cycle period */
+    MXC_E_WDT_PERIOD_2_31_CLKS = 0,
+    /** 2^30 cycle period */
+    MXC_E_WDT_PERIOD_2_30_CLKS,
+    /** 2^29 cycle period */
+    MXC_E_WDT_PERIOD_2_29_CLKS,
+    /** 2^28 cycle period */
+    MXC_E_WDT_PERIOD_2_28_CLKS,
+    /** 2^27 cycle period */
+    MXC_E_WDT_PERIOD_2_27_CLKS,
+    /** 2^26 cycle period */
+    MXC_E_WDT_PERIOD_2_26_CLKS,
+    /** 2^25 cycle period */
+    MXC_E_WDT_PERIOD_2_25_CLKS,
+    /** 2^24 cycle period */
+    MXC_E_WDT_PERIOD_2_24_CLKS,
+    /** 2^23 cycle period */
+    MXC_E_WDT_PERIOD_2_23_CLKS,
+    /** 2^22 cycle period */
+    MXC_E_WDT_PERIOD_2_22_CLKS,
+    /** 2^21 cycle period */
+    MXC_E_WDT_PERIOD_2_21_CLKS,
+    /** 2^20 cycle period */
+    MXC_E_WDT_PERIOD_2_20_CLKS,
+    /** 2^19 cycle period */
+    MXC_E_WDT_PERIOD_2_19_CLKS,
+    /** 2^18 cycle period */
+    MXC_E_WDT_PERIOD_2_18_CLKS,
+    /** 2^17 cycle period */
+    MXC_E_WDT_PERIOD_2_17_CLKS,
+    /** 2^16 cycle period */
+    MXC_E_WDT_PERIOD_2_16_CLKS,
+} mxc_wdt_period_t;
+
+/*                                  Offset   Register Description
+                                    ======   ================================================ */
+typedef struct {
+    __IO uint32_t ctrl;         /*  0x0000   Watchdog Timer Control Register                  */
+    __IO uint32_t clear;        /*  0x0004   Watchdog Clear Register (Feed Dog)               */
+    __IO uint32_t int_rst_fl;   /*  0x0008   Watchdog Interrupt/Reset Flags                   */
+    __IO uint32_t int_rst_en;   /*  0x000C   Interrupt/Reset Enable/Disable Controls          */
+    __I uint32_t rsv0010;       /*  0x0010                                                    */
+    __IO uint32_t lock_ctrl;    /*  0x0014   Lock Register Setting for WDT CTRL               */
+} mxc_wdt_regs_t;
+
+/*
+   Register offsets for module WDT.
+*/
+#define MXC_R_WDT_OFFS_CTRL                       ((uint32_t)0x00000000UL)
+#define MXC_R_WDT_OFFS_CLEAR                      ((uint32_t)0x00000004UL)
+#define MXC_R_WDT_OFFS_INT_RST_FL                 ((uint32_t)0x00000008UL)
+#define MXC_R_WDT_OFFS_INT_RST_EN                 ((uint32_t)0x0000000CUL)
+#define MXC_R_WDT_OFFS_LOCK_CTRL                  ((uint32_t)0x00000014UL)
+
+#define MXC_V_WDT_WDLOCK_LOCK_KEY                 ((uint8_t)0x24)
+#define MXC_V_WDT_WDLOCK_UNLOCK_KEY               ((uint8_t)0x42)
+
+
+/*
+   Field positions and masks for module WDT.
+*/
+#define MXC_F_WDT_CTRL_INT_PERIOD_POS       0
+#define MXC_F_WDT_CTRL_INT_PERIOD           ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))
+#define MXC_F_WDT_CTRL_RST_PERIOD_POS       4
+#define MXC_F_WDT_CTRL_RST_PERIOD           ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))
+#define MXC_F_WDT_CTRL_EN_TIMER_POS         8
+#define MXC_F_WDT_CTRL_EN_TIMER             ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_TIMER_POS))
+#define MXC_F_WDT_CTRL_EN_CLOCK_POS         9
+#define MXC_F_WDT_CTRL_EN_CLOCK             ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_CLOCK_POS))
+#define MXC_F_WDT_CTRL_WAIT_PERIOD_POS      12
+#define MXC_F_WDT_CTRL_WAIT_PERIOD          ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_WAIT_PERIOD_POS))
+
+#define MXC_F_WDT_FLAGS_TIMEOUT_POS         0
+#define MXC_F_WDT_FLAGS_TIMEOUT             ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_TIMEOUT_POS))
+#define MXC_F_WDT_FLAGS_PRE_WIN_POS         1
+#define MXC_F_WDT_FLAGS_PRE_WIN             ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_PRE_WIN_POS))
+#define MXC_F_WDT_FLAGS_RESET_OUT_POS       2
+#define MXC_F_WDT_FLAGS_RESET_OUT           ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_RESET_OUT_POS))
+
+#define MXC_F_WDT_ENABLE_TIMEOUT_POS        0
+#define MXC_F_WDT_ENABLE_TIMEOUT            ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_TIMEOUT_POS))
+#define MXC_F_WDT_ENABLE_PRE_WIN_POS        1
+#define MXC_F_WDT_ENABLE_PRE_WIN            ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_PRE_WIN_POS))
+#define MXC_F_WDT_ENABLE_RESET_OUT_POS      2
+#define MXC_F_WDT_ENABLE_RESET_OUT          ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_RESET_OUT_POS))
+
+#define MXC_F_WDT_LOCK_CTRL_WDLOCK_POS      0
+#define MXC_F_WDT_LOCK_CTRL_WDLOCK          ((uint32_t)(0x000000FFUL << MXC_F_WDT_LOCK_CTRL_WDLOCK_POS))
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+* @}
+*/
+
+#endif   /* _MXC_WDT_REGS_H_ */
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.c
new file mode 100644
index 0000000000..f32942d57f
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.c
@@ -0,0 +1,268 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "device.h"
+#include "PeripheralPins.h"
+#include "ioman_regs.h"
+
+/*
+ * To select a peripheral function on Maxim microcontrollers, multiple
+ * configurations must be made. The mbed PinMap structure only includes one
+ * data member to hold this information. To extend the configuration storage,
+ * the "function" data member is used as a pointer to a pin_function_t
+ * structure. This structure is defined in objects.h. The definitions below
+ * include the creation of the pin_function_t structures and the assignment of
+ * the pointers to the "function" data members.
+ */
+
+/************I2C***************/
+const PinMap PinMap_I2C_SDA[] = {
+    { P2_4,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P2_6,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P1_6,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P2_2,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_4,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_6,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_4,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_6,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P0_4,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P0_6,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { NC,    NC,    0 }
+};
+
+const PinMap PinMap_I2C_SCL[] = {
+    { P2_5,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P2_7,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P1_7,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P2_3,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_5,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_7,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_5,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P7_7,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P0_5,  I2C_0, (int)&((pin_function_t){&MXC_IOMAN->i2cm0_req, &MXC_IOMAN->i2cm0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { P0_7,  I2C_1, (int)&((pin_function_t){&MXC_IOMAN->i2cm1_req, &MXC_IOMAN->i2cm1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_I2CM_CORE_IO), (MXC_F_IOMAN_I2CM_MAPPING | MXC_F_IOMAN_I2CM_CORE_IO)}) },
+    { NC,    NC,    0 }
+};
+
+/************UART***************/
+const PinMap PinMap_UART_TX[] = {
+    { P1_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P1_3, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P2_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P2_5, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P7_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P7_3, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P0_1, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P1_7, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { NC,   NC,     0 }
+};
+
+const PinMap PinMap_UART_RX[] = {
+    { P1_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P1_2, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P2_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P2_4, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P7_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P7_2, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P0_0, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { P1_6, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_CORE_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CORE_IO)}) },
+    { NC,   NC,     0 }
+};
+
+const PinMap PinMap_UART_CTS[] = {
+    { P1_2, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P2_6, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P1_4, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P1_6, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P7_2, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P7_6, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { P0_2, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_CTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_CTS_IO)}) },
+    { NC,   NC,     0 }
+};
+
+const PinMap PinMap_UART_RTS[] = {
+    { P1_3, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P2_7, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P1_5, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P1_7, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P7_3, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P7_7, UART_1, (int)&((pin_function_t){&MXC_IOMAN->uart1_req, &MXC_IOMAN->uart1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { P0_3, UART_0, (int)&((pin_function_t){&MXC_IOMAN->uart0_req, &MXC_IOMAN->uart0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_D | MXC_F_IOMAN_UART_RTS_IO), (MXC_F_IOMAN_UART_MAPPING | MXC_F_IOMAN_UART_RTS_IO)}) },
+    { NC,   NC,     0 }
+};
+
+/************SPI***************/
+const PinMap PinMap_SPI_SCLK[] = {
+    { P0_0, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P0_4, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_0, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P1_0, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_4, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_0, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_0, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_4, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { NC,   NC,    0}
+};
+
+const PinMap PinMap_SPI_MOSI[] = {
+    { P0_1, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P0_5, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_1, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P1_1, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_5, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_1, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_1, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_5, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { NC,   NC,    0}
+};
+
+const PinMap PinMap_SPI_MISO[] = {
+    { P0_2, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P0_6, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_2, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P1_2, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_6, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P2_2, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_2, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { P6_6, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_CORE_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_CORE_IO)}) },
+    { NC,   NC,    0}
+};
+
+const PinMap PinMap_SPI_SSEL[] = {
+#if (defined(EM9301_CSN) && (EM9301_CSN == P0_3))
+    { P0_3, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_SS0_IO | MXC_F_IOMAN_SPI_SR0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO | MXC_F_IOMAN_SPI_SR0_IO)}) },
+#else
+    { P0_3, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+#endif
+    { P0_7, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+    { P2_3, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+    { P1_3, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+    { P2_7, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+#if (defined(EM9301_CSN) && (EM9301_CSN == P2_3))
+    { P2_3, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_A | MXC_F_IOMAN_SPI_SS0_IO | MXC_F_IOMAN_SPI_SR0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO | MXC_F_IOMAN_SPI_SR0_IO)}) },
+#else
+    { P2_3, SPI_2, (int)&((pin_function_t){&MXC_IOMAN->spi2_req, &MXC_IOMAN->spi2_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_B | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+#endif
+    { P6_3, SPI_0, (int)&((pin_function_t){&MXC_IOMAN->spi0_req, &MXC_IOMAN->spi0_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+    { P6_7, SPI_1, (int)&((pin_function_t){&MXC_IOMAN->spi1_req, &MXC_IOMAN->spi1_ack, ((uint32_t)MXC_E_IOMAN_MAPPING_C | MXC_F_IOMAN_SPI_SS0_IO), (MXC_F_IOMAN_SPI_MAPPING | MXC_F_IOMAN_SPI_SS0_IO)}) },
+    { NC,   NC,    0}
+};
+
+/************PWM***************/
+const PinMap PinMap_PWM[] = {
+    {P0_0, PWM_0, 1}, {P0_0, PWM_0, 2}, {P0_0, PWM_4, 3},
+    {P0_1, PWM_0, 3}, {P0_1, PWM_1, 1}, {P0_1, PWM_4, 2},
+    {P0_2, PWM_1, 2}, {P0_2, PWM_2, 1}, {P0_2, PWM_5, 3},
+    {P0_3, PWM_1, 3}, {P0_3, PWM_3, 1}, {P0_3, PWM_5, 2},
+    {P0_4, PWM_2, 2}, {P0_4, PWM_4, 1}, {P0_4, PWM_6, 3},
+    {P0_5, PWM_2, 3}, {P0_5, PWM_5, 1}, {P0_5, PWM_6, 2},
+    {P0_6, PWM_3, 2}, {P0_6, PWM_6, 1}, {P0_6, PWM_7, 3},
+    {P0_7, PWM_3, 3}, {P0_7, PWM_7, 1}, {P0_7, PWM_7, 2},
+
+    {P1_0, PWM_0, 1}, {P1_0, PWM_0, 2}, {P1_0, PWM_4, 3},
+    {P1_1, PWM_0, 3}, {P1_1, PWM_1, 1}, {P1_1, PWM_4, 2},
+    {P1_2, PWM_1, 2}, {P1_2, PWM_2, 1}, {P1_2, PWM_5, 3},
+    {P1_3, PWM_1, 3}, {P1_3, PWM_3, 1}, {P1_3, PWM_5, 2},
+    {P1_4, PWM_2, 2}, {P1_4, PWM_4, 1}, {P1_4, PWM_6, 3},
+    {P1_5, PWM_2, 3}, {P1_5, PWM_5, 1}, {P1_5, PWM_6, 2},
+    {P1_6, PWM_3, 2}, {P1_6, PWM_6, 1}, {P1_6, PWM_7, 3},
+    {P1_7, PWM_3, 3}, {P1_7, PWM_7, 1}, {P1_7, PWM_7, 2},
+
+    {P2_0, PWM_0, 1}, {P2_0, PWM_0, 2}, {P2_0, PWM_4, 3},
+    {P2_1, PWM_0, 3}, {P2_1, PWM_1, 1}, {P2_1, PWM_4, 2},
+    {P2_2, PWM_1, 2}, {P2_2, PWM_2, 1}, {P2_2, PWM_5, 3},
+    {P2_3, PWM_1, 3}, {P2_3, PWM_3, 1}, {P2_3, PWM_5, 2},
+    {P2_4, PWM_2, 2}, {P2_4, PWM_4, 1}, {P2_4, PWM_6, 3},
+    {P2_5, PWM_2, 3}, {P2_5, PWM_5, 1}, {P2_5, PWM_6, 2},
+    {P2_6, PWM_3, 2}, {P2_6, PWM_6, 1}, {P2_6, PWM_7, 3},
+    {P2_7, PWM_3, 3}, {P2_7, PWM_7, 1}, {P2_7, PWM_7, 2},
+
+    {P6_0, PWM_0, 1}, {P6_0, PWM_0, 2}, {P6_0, PWM_4, 3},
+    {P6_1, PWM_0, 3}, {P6_1, PWM_1, 1}, {P6_1, PWM_4, 2},
+    {P6_2, PWM_1, 2}, {P6_2, PWM_2, 1}, {P6_2, PWM_5, 3},
+    {P6_3, PWM_1, 3}, {P6_3, PWM_3, 1}, {P6_3, PWM_5, 2},
+    {P6_4, PWM_2, 2}, {P6_4, PWM_4, 1}, {P6_4, PWM_6, 3},
+    {P6_5, PWM_2, 3}, {P6_5, PWM_5, 1}, {P6_5, PWM_6, 2},
+    {P6_6, PWM_3, 2}, {P6_6, PWM_6, 1}, {P6_6, PWM_7, 3},
+    {P6_7, PWM_3, 3}, {P6_7, PWM_7, 1}, {P6_7, PWM_7, 2},
+    
+    {P7_0, PWM_0, 1}, {P7_0, PWM_0, 2}, {P7_0, PWM_4, 3},
+    {P7_1, PWM_0, 3}, {P7_1, PWM_1, 1}, {P7_1, PWM_4, 2},
+    {P7_2, PWM_1, 2}, {P7_2, PWM_2, 1}, {P7_2, PWM_5, 3},
+    {P7_3, PWM_1, 3}, {P7_3, PWM_3, 1}, {P7_3, PWM_5, 2},
+    {P7_4, PWM_2, 2}, {P7_4, PWM_4, 1}, {P7_4, PWM_6, 3},
+    {P7_5, PWM_2, 3}, {P7_5, PWM_5, 1}, {P7_5, PWM_6, 2},
+    {P7_6, PWM_3, 2}, {P7_6, PWM_6, 1}, {P7_6, PWM_7, 3},
+    {P7_7, PWM_3, 3}, {P7_7, PWM_7, 1}, {P7_7, PWM_7, 2},
+    {NC,   NC,    0}
+};
+
+/************ADC***************/
+const PinMap PinMap_ADC[] = {
+    {AIN_0P, ADC, 0},
+    {AIN_1P, ADC, 0},
+    {AIN_2P, ADC, 0},
+    {AIN_3P, ADC, 0},
+    {AIN_4P, ADC, 0},
+    {AIN_5P, ADC, 0},
+    {AIN_6P, ADC, 0},
+    {AIN_7P, ADC, 0},
+
+    {AIN_0N, ADC, 0},
+    {AIN_1N, ADC, 0},
+    {AIN_2N, ADC, 0},
+    {AIN_3N, ADC, 0},
+    {AIN_4N, ADC, 0},
+    {AIN_5N, ADC, 0},
+    {AIN_6N, ADC, 0},
+    {AIN_7N, ADC, 0},
+    
+    {AIN_0D, ADC, 1},
+    {AIN_1D, ADC, 1},
+    {AIN_2D, ADC, 1},
+    {AIN_3D, ADC, 1},
+    {AIN_4D, ADC, 1},
+    {AIN_5D, ADC, 1},
+    {AIN_6D, ADC, 1},
+    {AIN_7D, ADC, 1},
+    {NC,     NC,  0}
+};
+
+/************DAC***************/
+const PinMap PinMap_DAC[] = {
+    {AOUT_AO, DAC0, 0},
+    {AOUT_BO, DAC1, 0},
+    {AOUT_CO, DAC2, 0},
+    {AOUT_DO, DAC3, 0},
+    {NC,      NC,   0}
+};
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.h
new file mode 100644
index 0000000000..c06ab368b6
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PeripheralPins.h
@@ -0,0 +1,65 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_PERIPHERALPINS_H
+#define MBED_PERIPHERALPINS_H
+
+#include "pinmap.h"
+#include "PeripheralNames.h"
+
+/************I2C***************/
+extern const PinMap PinMap_I2C_SDA[];
+extern const PinMap PinMap_I2C_SCL[];
+
+/************UART***************/
+extern const PinMap PinMap_UART_TX[];
+extern const PinMap PinMap_UART_RX[];
+extern const PinMap PinMap_UART_CTS[];
+extern const PinMap PinMap_UART_RTS[];
+
+/************SPI***************/
+extern const PinMap PinMap_SPI_SCLK[];
+extern const PinMap PinMap_SPI_MOSI[];
+extern const PinMap PinMap_SPI_MISO[];
+extern const PinMap PinMap_SPI_SSEL[];
+
+/************PWM***************/
+extern const PinMap PinMap_PWM[];
+
+/************ADC***************/
+extern const PinMap PinMap_ADC[];
+
+/************DAC***************/
+extern const PinMap PinMap_DAC[];
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PortNames.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PortNames.h
new file mode 100644
index 0000000000..3327949078
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/PortNames.h
@@ -0,0 +1,55 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_PORTNAMES_H
+#define MBED_PORTNAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    Port0 = 0,
+    Port1 = 1,
+    Port2 = 2,
+    Port3 = 3,
+    Port4 = 4,
+    Port5 = 5,
+    Port6 = 6,
+    Port7 = 7
+} PortName;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PeripheralNames.h
new file mode 100644
index 0000000000..150331bae2
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PeripheralNames.h
@@ -0,0 +1,86 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    UART_0 = MXC_BASE_UART0,
+    UART_1 = MXC_BASE_UART1,
+    STDIO_UART = UART_1
+} UARTName;
+
+typedef enum {
+    I2C_0 = MXC_BASE_I2CM0,
+    I2C_1 = MXC_BASE_I2CM1
+} I2CName;
+
+typedef enum {
+    SPI_0 = MXC_BASE_SPI0,
+    SPI_1 = MXC_BASE_SPI1,
+    SPI_2 = MXC_BASE_SPI2
+} SPIName;
+
+typedef enum {
+    PWM_0 = MXC_BASE_PT0,
+    PWM_1 = MXC_BASE_PT1,
+    PWM_2 = MXC_BASE_PT2,
+    PWM_3 = MXC_BASE_PT3,
+    PWM_4 = MXC_BASE_PT4,
+    PWM_5 = MXC_BASE_PT5,
+    PWM_6 = MXC_BASE_PT6,
+    PWM_7 = MXC_BASE_PT7
+} PWMName;
+
+typedef enum {
+    ADC = MXC_BASE_ADC
+} ADCName;
+
+typedef enum {
+    DAC0 = MXC_BASE_DAC0,
+    DAC1 = MXC_BASE_DAC1,
+    DAC2 = MXC_BASE_DAC2,
+    DAC3 = MXC_BASE_DAC3,
+} DACName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PinNames.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PinNames.h
new file mode 100644
index 0000000000..ae9cf84df7
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/PinNames.h
@@ -0,0 +1,267 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+#include "gpio_regs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PIN_INPUT  = MXC_V_GPIO_OUT_MODE_HIGH_Z,
+    PIN_OUTPUT = MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE
+} PinDirection;
+
+#define PORT_SHIFT  12
+#define PINNAME_TO_PORT(name)   ((unsigned int)(name) >> PORT_SHIFT)
+#define PINNAME_TO_PIN(name)    ((unsigned int)(name) & ~(0xFFFFFFFF << PORT_SHIFT))
+
+typedef enum {
+    P0_0 = (0 << PORT_SHIFT) | 0,
+    P0_1 = (0 << PORT_SHIFT) | 1,
+    P0_2 = (0 << PORT_SHIFT) | 2,
+    P0_3 = (0 << PORT_SHIFT) | 3,
+    P0_4 = (0 << PORT_SHIFT) | 4,
+    P0_5 = (0 << PORT_SHIFT) | 5,
+    P0_6 = (0 << PORT_SHIFT) | 6,
+    P0_7 = (0 << PORT_SHIFT) | 7,
+
+    P1_0 = (1 << PORT_SHIFT) | 0,
+    P1_1 = (1 << PORT_SHIFT) | 1,
+    P1_2 = (1 << PORT_SHIFT) | 2,
+    P1_3 = (1 << PORT_SHIFT) | 3,
+    P1_4 = (1 << PORT_SHIFT) | 4,
+    P1_5 = (1 << PORT_SHIFT) | 5,
+    P1_6 = (1 << PORT_SHIFT) | 6,
+    P1_7 = (1 << PORT_SHIFT) | 7,
+
+    P2_0 = (2 << PORT_SHIFT) | 0,
+    P2_1 = (2 << PORT_SHIFT) | 1,
+    P2_2 = (2 << PORT_SHIFT) | 2,
+    P2_3 = (2 << PORT_SHIFT) | 3,
+    P2_4 = (2 << PORT_SHIFT) | 4,
+    P2_5 = (2 << PORT_SHIFT) | 5,
+    P2_6 = (2 << PORT_SHIFT) | 6,
+    P2_7 = (2 << PORT_SHIFT) | 7,
+
+    P3_0 = (3 << PORT_SHIFT) | 0,
+    P3_1 = (3 << PORT_SHIFT) | 1,
+    P3_2 = (3 << PORT_SHIFT) | 2,
+    P3_3 = (3 << PORT_SHIFT) | 3,
+    P3_4 = (3 << PORT_SHIFT) | 4,
+    P3_5 = (3 << PORT_SHIFT) | 5,
+    P3_6 = (3 << PORT_SHIFT) | 6,
+    P3_7 = (3 << PORT_SHIFT) | 7,
+
+    P4_0 = (4 << PORT_SHIFT) | 0,
+    P4_1 = (4 << PORT_SHIFT) | 1,
+    P4_2 = (4 << PORT_SHIFT) | 2,
+    P4_3 = (4 << PORT_SHIFT) | 3,
+    P4_4 = (4 << PORT_SHIFT) | 4,
+    P4_5 = (4 << PORT_SHIFT) | 5,
+    P4_6 = (4 << PORT_SHIFT) | 6,
+    P4_7 = (4 << PORT_SHIFT) | 7,
+
+    P5_0 = (5 << PORT_SHIFT) | 0,
+    P5_1 = (5 << PORT_SHIFT) | 1,
+    P5_2 = (5 << PORT_SHIFT) | 2,
+    P5_3 = (5 << PORT_SHIFT) | 3,
+    P5_4 = (5 << PORT_SHIFT) | 4,
+    P5_5 = (5 << PORT_SHIFT) | 5,
+    P5_6 = (5 << PORT_SHIFT) | 6,
+    P5_7 = (5 << PORT_SHIFT) | 7,
+
+    P6_0 = (6 << PORT_SHIFT) | 0,
+    P6_1 = (6 << PORT_SHIFT) | 1,
+    P6_2 = (6 << PORT_SHIFT) | 2,
+    P6_3 = (6 << PORT_SHIFT) | 3,
+    P6_4 = (6 << PORT_SHIFT) | 4,
+    P6_5 = (6 << PORT_SHIFT) | 5,
+    P6_6 = (6 << PORT_SHIFT) | 6,
+    P6_7 = (6 << PORT_SHIFT) | 7,
+
+    P7_0 = (7 << PORT_SHIFT) | 0,
+    P7_1 = (7 << PORT_SHIFT) | 1,
+    P7_2 = (7 << PORT_SHIFT) | 2,
+    P7_3 = (7 << PORT_SHIFT) | 3,
+    P7_4 = (7 << PORT_SHIFT) | 4,
+    P7_5 = (7 << PORT_SHIFT) | 5,
+    P7_6 = (7 << PORT_SHIFT) | 6,
+    P7_7 = (7 << PORT_SHIFT) | 7,
+
+    // Analog ADC pins
+    AIN_0P = (0xA << PORT_SHIFT) | 0,
+    AIN_1P = (0xA << PORT_SHIFT) | 1,
+    AIN_2P = (0xA << PORT_SHIFT) | 2,
+    AIN_3P = (0xA << PORT_SHIFT) | 3,
+    AIN_4P = (0xA << PORT_SHIFT) | 4,
+    AIN_5P = (0xA << PORT_SHIFT) | 5,
+    AIN_6P = (0xA << PORT_SHIFT) | 6,
+    AIN_7P = (0xA << PORT_SHIFT) | 7,
+
+    AIN_0N = (0xB << PORT_SHIFT) | 0,
+    AIN_1N = (0xB << PORT_SHIFT) | 1,
+    AIN_2N = (0xB << PORT_SHIFT) | 2,
+    AIN_3N = (0xB << PORT_SHIFT) | 3,
+    AIN_4N = (0xB << PORT_SHIFT) | 4,
+    AIN_5N = (0xB << PORT_SHIFT) | 5,
+    AIN_6N = (0xB << PORT_SHIFT) | 6,
+    AIN_7N = (0xB << PORT_SHIFT) | 7,
+
+    // Analog differential ADC
+    AIN_0D = (0xC << PORT_SHIFT) | 0,
+    AIN_1D = (0xC << PORT_SHIFT) | 1,
+    AIN_2D = (0xC << PORT_SHIFT) | 2,
+    AIN_3D = (0xC << PORT_SHIFT) | 3,
+    AIN_4D = (0xC << PORT_SHIFT) | 4,
+    AIN_5D = (0xC << PORT_SHIFT) | 5,
+    AIN_6D = (0xC << PORT_SHIFT) | 6,
+    AIN_7D = (0xC << PORT_SHIFT) | 7,
+
+    // OPAMP Positive supply pins
+    AOUT_AP = (0xD << PORT_SHIFT) | 0,
+    AOUT_BP = (0xD << PORT_SHIFT) | 1,
+    AOUT_CP = (0xD << PORT_SHIFT) | 2,
+    AOUT_DP = (0xD << PORT_SHIFT) | 3,
+
+    // OPAMP Negative supply pins
+    AOUT_AN = (0xE << PORT_SHIFT) | 0,
+    AOUT_BN = (0xE << PORT_SHIFT) | 1,
+    AOUT_CN = (0xE << PORT_SHIFT) | 2,
+    AOUT_DN = (0xE << PORT_SHIFT) | 3,
+
+    // DAC Output pins
+    AOUT_AO = (0xF << PORT_SHIFT) | 0,
+    AOUT_BO = (0xF << PORT_SHIFT) | 1,
+    AOUT_CO = (0xF << PORT_SHIFT) | 2,
+    AOUT_DO = (0xF << PORT_SHIFT) | 3,
+
+    LED_GREEN  = P7_4,
+    LED_RED    = P7_0,
+    LED_YELLOW = P6_6,
+    LED_BLUE   = P7_6,
+
+    // mbed original LED naming
+    LED1 = LED_RED,
+    LED2 = LED_GREEN,
+    LED3 = LED_BLUE,
+    LED4 = LED_YELLOW,
+
+    // Push button
+    SW2 = P6_4,
+    SW3 = P6_5,
+
+    // UART pins
+    USBTX = P7_3,
+    USBRX = P7_2,
+    STDIO_UART_TX = USBTX,
+    STDIO_UART_RX = USBRX,
+
+    // I2C pins
+    I2C0_SCL = P2_4,
+    I2C0_SDA = P2_5,
+
+    I2C1_SCL = P2_7,
+    I2C1_SDA = P2_6,
+
+    // UART pins
+    UART0_RX  = P1_0,
+    UART0_TX  = P1_1,
+    UART0_CTS = P1_2,
+    UART0_RTS = P1_3,
+
+    UART1_RX  = P1_2,
+    UART1_TX  = P1_3,
+    UART1_CTS = P2_6,
+    UART1_RTS = P2_7,
+
+    // SPI pins
+    SPI0_SCK  = P6_0,
+    SPI0_MOSI = P6_1,
+    SPI0_MISO = P6_2,
+    SPI0_SS   = P6_3,
+
+    SPI2_SCK  = P2_0,
+    SPI2_MOSI = P2_1,
+    SPI2_MISO = P2_2,
+    SPI2_SS   = P2_3,
+
+    // Arduino Headers
+    D0  = P1_0,
+    D1  = P1_1,
+    D2  = P1_2,
+    D3  = P1_3,
+    D4  = P1_4,
+    D5  = P1_5,
+    D6  = P1_6,
+    D7  = P1_7,
+    D8  = P2_5,
+    D9  = P2_4,
+    D10 = P2_3,
+    D11 = P2_1,
+    D12 = P2_2,
+    D13 = P2_0,
+    D14 = P2_6,
+    D15 = P2_7,
+    A0  = AIN_0P,
+    A1  = AIN_1P,
+    A2  = AIN_2P,
+    A3  = AIN_3P,
+    A4  = AIN_4P,
+    A5  = AIN_5P,
+
+    // Not connected
+    NC = (int)0xFFFFFFFF
+} PinName;
+
+typedef enum {
+    PullUp,
+    OpenDrain,
+    PullNone,
+    PullDefault = PullUp
+} PinMode;
+
+typedef enum {
+    LED_ON = 0,
+    LED_OFF = 1
+} LedStates;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
new file mode 100644
index 0000000000..0130c5f0a3
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
@@ -0,0 +1,88 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "cmsis.h"
+#include "gpio_regs.h"
+#include "clkman_regs.h"
+
+/* Application developer should override where necessary with different external HFX source */
+#ifndef __SYSTEM_HFX
+#define __SYSTEM_HFX 24000000
+#endif
+
+//******************************************************************************
+// This function will get called early in system initialization
+void low_level_init(void)
+{
+    /* wait for the RO to stabilize */
+    while (!(MXC_CLKMAN->intfl & MXC_F_CLKMAN_INTFL_RING_STABLE));
+
+    /* Configure and enable the oscillator */
+    if (!(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE)) {
+
+        MXC_CLKMAN->clk_config = (0x4 << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS);
+
+        /* Enable the external crystal */
+        MXC_CLKMAN->clk_config |= MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE;
+    }
+
+    /* Wait for external crystal to stabilize */
+    for (volatile int waitcnt = 0; waitcnt < 0x4000; waitcnt++);    // 0x4000 ~10ms 0x10000 ~35ms, 0x20000 ~75ms
+
+    /* Configure the PLL */
+    uint32_t clk_config = MXC_CLKMAN->clk_config;
+    clk_config  = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT) | (MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS);
+
+#if (__SYSTEM_HFX == 8000000)
+    clk_config  = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
+#elif (__SYSTEM_HFX == 12000000)
+    clk_config  = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
+#elif (__SYSTEM_HFX == 24000000)
+    clk_config  = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT) | (MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS);
+#else
+#error Invalid __SYSTEM_HFX setting
+#endif
+
+    clk_config |=  MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE;
+    clk_config &= ~MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS;
+    clk_config  = (clk_config & ~MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT) | (MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS);
+    MXC_CLKMAN->clk_config = clk_config;
+
+    /* Enable the PLL and wait for stable */
+    MXC_CLKMAN->clk_config |= (MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE | MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N);
+    while (!(MXC_CLKMAN->intfl & MXC_F_CLKMAN_INTFL_PLL_STABLE));
+
+    /* Switch to the PLL */
+    MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) |
+                           ((MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2 << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS));
+}
\ No newline at end of file
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogin_api.c
new file mode 100644
index 0000000000..e7d89bb6f2
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogin_api.c
@@ -0,0 +1,147 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "mbed_assert.h"
+#include "analogin_api.h"
+#include "clkman_regs.h"
+#include "pwrman_regs.h"
+#include "afe_regs.h"
+#include "PeripheralPins.h"
+
+#define PGA_TRK_CNT     0x1F
+#define ADC_ACT_CNT     0x1
+#define ADC_PGA_CNT     0x1
+#define ADC_ACQ_CNT     0x1
+#define ADC_SLP_CNT     0x1
+ 
+//******************************************************************************
+void analogin_init(analogin_t *obj, PinName pin)
+{
+    // Make sure pin is an analog pin we can use for ADC
+    MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC);
+
+    // Set the object pointer
+    obj->adc = MXC_ADC;
+    obj->adccfg = MXC_ADCCFG;
+    obj->adc_fifo = MXC_ADC_FIFO;
+    obj->adc_pin = pin;
+
+    // Set the ADC clock to the system clock frequency
+    MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT,
+        (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM << 
+        MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)));
+
+    // Enable AFE power
+    MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
+
+    // Setup and hold window
+    MXC_SET_FIELD(&obj->adc->tg_ctrl0, MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT, PGA_TRK_CNT);
+
+    // Setup sampling count and timing
+    MXC_SET_FIELD(&obj->adc->tg_ctrl1, (MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT | 
+        MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT | MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT),
+        ((ADC_PGA_CNT << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS) | 
+        (ADC_ACQ_CNT << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS) |
+        (ADC_SLP_CNT << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS) |
+        (MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT)));
+}
+
+//******************************************************************************
+float analogin_read(analogin_t *obj)
+{
+    // Convert integer to float
+    return (((float)analogin_read_u16(obj)/(float)0xFFFF));
+}
+
+//******************************************************************************
+uint16_t analogin_read_u16(analogin_t *obj)
+{
+    // Set the pin to take readings from
+    unsigned mux_pos;
+    unsigned diff = 0;
+    if(obj->adc_pin >> PORT_SHIFT == 0xB) {
+        mux_pos = (obj->adc_pin & 0xF) + 8;
+    } else {
+        mux_pos = (obj->adc_pin & 0xF);
+    }
+
+    if(obj->adc_pin >> PORT_SHIFT == 0xC) {
+        diff = 1;
+        mux_pos = (obj->adc_pin & 0xF) + 8;
+    }
+
+    // Reset the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
+
+    // Enable the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
+
+    // Setup the ADC clock
+    MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
+        MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
+        ((MXC_E_ADC_MODE_SMPLCNT_FULL_RATE << MXC_F_ADC_CTRL0_ADC_MODE_POS) | 
+        (MXC_E_ADC_AVG_MODE_FILTER_OUTPUT << MXC_F_ADC_CTRL0_AVG_MODE_POS) |
+        (0x2 << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS) |
+        MXC_F_ADC_CTRL0_ADC_CLK_EN));
+
+    // Setup the input multiplexor
+    MXC_SET_FIELD(&obj->adc->pga_ctrl, (MXC_F_ADC_PGA_CTRL_MUX_CH_SEL | 
+        MXC_F_ADC_PGA_CTRL_MUX_DIFF | MXC_F_ADC_PGA_CTRL_PGA_GAIN),
+        ((mux_pos << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS) |
+        (diff << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS)));
+
+    // Setup voltage reference
+    MXC_SET_FIELD(&MXC_AFE->ctrl1, MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL, 
+        (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
+        (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
+
+    // Clear the done bit
+    obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
+
+    // Take one sample
+    obj->adc->tg_ctrl0 |= (1 << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS);
+
+    // Set the start bit to take the sample
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_START;
+
+    // Wait for the conversion to complete
+    while(!(obj->adc->intr & MXC_F_ADC_INTR_DONE_IF)) {}
+
+    // Get sample from the fifo
+    uint16_t sample = (uint16_t)(obj->adc->out & 0xFFFF);
+    
+    // Disable ADC
+    obj->adc->ctrl0 &= ~MXC_F_ADC_CTRL0_CPU_ADC_EN;
+
+    return (sample - 1);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c
new file mode 100644
index 0000000000..c17b06e8b5
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c
@@ -0,0 +1,212 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "mbed_assert.h"
+#include "analogout_api.h"
+#include "clkman_regs.h"
+#include "pwrman_regs.h"
+#include "afe_regs.h"
+#include "PeripheralPins.h"
+
+//******************************************************************************
+void analogout_init(dac_t *obj, PinName pin)
+{
+    // Make sure pin is an analog pin we can use for ADC
+    DACName dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
+    MBED_ASSERT((DACName)dac != (DACName)NC);
+
+    // Set the object pointer
+    obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3)));
+    obj->dac_fifo = ((mxc_dac_fifo_t*)MXC_DAC_GET_FIFO((pin & 0x3)));
+    obj->index = (pin & 0x3);
+
+    // Set the ADC clock to the system clock frequency
+    MXC_SET_FIELD(&MXC_CLKMAN->clk_ctrl, MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT,
+        (MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N | (MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM << 
+        MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)));
+
+    
+    // Setup the OPAMP in follower mode
+    switch(obj->index) {
+        case 0:
+            // Enable DAC clock
+            MXC_CLKMAN->clk_ctrl_14_dac0 = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+            // Enable OPAMP
+            MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP0;
+
+            // Set the positive and negative inputs
+            MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_A | 
+                MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0), 
+                ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS) |
+                (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS) |
+                (0x0 << MXC_F_AFE_CTRL4_DAC_SEL_A_POS)));
+
+            // Enable N and P channel inputs
+            MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP0 | 
+                MXC_F_AFE_CTRL3_EN_NCH_OPAMP0);
+        break;
+        case 1:
+            // Enable DAC clock
+            MXC_CLKMAN->clk_ctrl_15_dac1 = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+            // Enable OPAMP
+            MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP1;
+
+            // Set the positive and negative inputs
+            MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_B | 
+                MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1), 
+                ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS) |
+                (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS) |
+                (0x1 << MXC_F_AFE_CTRL4_DAC_SEL_B_POS)));
+
+            // Enable N and P channel inputs
+            MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP1 | 
+                MXC_F_AFE_CTRL3_EN_NCH_OPAMP1);
+
+        break;
+        case 2:
+            // Enable DAC clock
+            MXC_CLKMAN->clk_ctrl_16_dac2 = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+            // Enable OPAMP
+            MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP2;
+
+            // Set the positive and negative inputs
+            MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_C | 
+                MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2), 
+                ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS) |
+                (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS) |
+                (0x2 << MXC_F_AFE_CTRL4_DAC_SEL_C_POS)));
+
+            // Enable N and P channel inputs
+            MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP2 | 
+                MXC_F_AFE_CTRL3_EN_NCH_OPAMP2);
+        break;
+        case 3:
+            // Enable DAC clock
+            MXC_CLKMAN->clk_ctrl_17_dac3 = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+            // Enable OPAMP
+            MXC_AFE->ctrl5 &= ~MXC_F_AFE_CTRL5_OP_CMP3;
+
+            // Set the positive and negative inputs
+            MXC_SET_FIELD(&MXC_AFE->ctrl4, (MXC_F_AFE_CTRL4_DAC_SEL_D | 
+                MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3 | MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3), 
+                ((0x1 << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS) |
+                (0x1 << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS) |
+                (0x3 << MXC_F_AFE_CTRL4_DAC_SEL_D_POS)));
+
+            // Enable N and P channel inputs
+            MXC_AFE->ctrl3 |= (MXC_F_AFE_CTRL3_EN_PCH_OPAMP3 | 
+                MXC_F_AFE_CTRL3_EN_NCH_OPAMP3);
+        break;
+    }
+
+    // Enable AFE power
+    MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
+
+    // Setup internal voltage references
+    MXC_SET_FIELD(&MXC_AFE->ctrl1, (MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL | MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL), 
+        (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
+        (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
+
+    // Disable interpolation
+    obj->dac->ctrl0 &= MXC_F_DAC_CTRL0_INTERP_MODE;
+}
+
+//******************************************************************************
+void analogout_write(dac_t *obj, float value)
+{
+    analogout_write_u16(obj, (uint16_t)((value/1.0) * 0xFFFF));
+}
+
+//******************************************************************************
+void analogout_write_u16(dac_t *obj, uint16_t value)
+{
+    // Enable the OPAMP
+        // Setup the OPAMP in follower mode
+    switch(obj->index) {
+        case 0:
+            MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP0;
+        break;
+        case 1:
+            MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP1;
+        break;
+        case 2:
+            MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP2;
+        break;
+        case 3:
+            MXC_AFE->ctrl3 |= MXC_F_AFE_CTRL3_POWERUP_OPAMP3;
+        break;
+    }
+
+    // Output 1 sample with minimal delay
+    obj->dac->rate |= 0x1;
+
+    // Set the start mode to output once data is in the FIFO
+    obj->dac->ctrl0 &= ~(MXC_F_DAC_CTRL0_START_MODE | MXC_F_DAC_CTRL0_OP_MODE);
+
+    // Enable the DAC
+    obj->dac->ctrl0 |= (MXC_F_DAC_CTRL0_POWER_MODE_2 | 
+        MXC_F_DAC_CTRL0_POWER_MODE_1_0 | MXC_F_DAC_CTRL0_POWER_ON | 
+        MXC_F_DAC_CTRL0_CLOCK_GATE_EN | MXC_F_DAC_CTRL0_CPU_START);
+
+    if(obj->index < 2) {
+        obj->out = (value);
+        obj->dac_fifo->output_16 = (obj->out);
+
+    } else {
+        // Convert 16 bits to 8 bits
+        obj->out = (value >> 8);
+        obj->dac_fifo->output_8 = (obj->out);
+    }
+}
+
+//******************************************************************************
+float analogout_read(dac_t *obj)
+{
+    return (((float)analogout_read_u16(obj) / (float)0xFFFF) * 1.5);
+}
+
+//******************************************************************************
+uint16_t analogout_read_u16(dac_t *obj)
+{
+    if(obj->index < 2) {
+        // Convert 12 bits to 16 bits
+        return (obj->out << 4);
+    } else {
+        // Convert 8 bits to 16 bits
+        return (obj->out << 8);
+    }
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/device.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/device.h
new file mode 100644
index 0000000000..59ff712fe9
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/device.h
@@ -0,0 +1,72 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#define DEVICE_PORTIN           1
+#define DEVICE_PORTOUT          1
+#define DEVICE_PORTINOUT        1
+ 
+#define DEVICE_INTERRUPTIN      1
+
+#define DEVICE_SERIAL           1
+
+#define DEVICE_SERIAL_FC        1
+
+#define DEVICE_SPI              1
+
+#define DEVICE_I2C              1
+
+#define DEVICE_SERIAL           1
+
+#define DEVICE_PWMOUT           1
+
+#define DEVICE_ANALOGIN         1
+
+#define DEVICE_ANALOGOUT        1
+
+#define DEVICE_RTC              1
+
+#define DEVICE_SLEEP            1
+
+#define DEVICE_STDIO_MESSAGES   1
+
+#define DEVICE_ERROR_PATTERN    1
+
+#define DEVICE_CAN              0
+#define DEVICE_ETHERNET         0
+
+#include "objects.h"
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_api.c
new file mode 100644
index 0000000000..2b1c1986ec
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_api.c
@@ -0,0 +1,94 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "mbed_assert.h"
+#include "gpio_api.h"
+#include "pinmap.h"
+#include "gpio_regs.h"
+#include "clkman_regs.h"
+
+uint32_t gpio_set(PinName name)
+{
+    MBED_ASSERT(name != (PinName)NC);
+    pin_function(name, 0);
+    return 1 << PINNAME_TO_PIN(name);
+}
+
+void gpio_init(gpio_t *obj, PinName name)
+{
+    obj->name = name;
+    if (name == (PinName)NC) {
+        return;
+    }
+
+    unsigned int port = PINNAME_TO_PORT(name);
+    unsigned int pin = PINNAME_TO_PIN(name);
+
+    obj->reg_out = (uint32_t*)BITBAND(&MXC_GPIO->out_val[port], pin);
+    obj->reg_in = (uint32_t*)BITBAND(&MXC_GPIO->in_val[port], pin);
+
+    /* Ensure that the GPIO clock is enabled */
+    if (MXC_CLKMAN->clk_ctrl_1_gpio == MXC_E_CLKMAN_CLK_SCALE_DISABLED) {
+        MXC_CLKMAN->clk_ctrl_1_gpio = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+    }
+}
+
+void gpio_mode(gpio_t *obj, PinMode mode)
+{
+    pin_mode(obj->name, mode);
+}
+
+void pin_dir(PinName name, PinDirection direction)
+{
+    MBED_ASSERT(name != (PinName)NC);
+
+    unsigned int port = PINNAME_TO_PORT(name);
+    unsigned int pin = PINNAME_TO_PIN(name);
+
+    /* Set function */
+    MXC_GPIO->func_sel[port] &= ~(0xF << (4 * pin));
+
+    /* Normal input is always enabled */
+    MXC_GPIO->in_mode[port] &= ~(0xF << (4 * pin));
+
+    /* Set requested output mode */
+    uint32_t out_mode = MXC_GPIO->out_mode[port];
+    out_mode &= ~(0xF << (4 * pin));
+    out_mode |= (direction << (4 * pin));
+    MXC_GPIO->out_mode[port] = out_mode;
+}
+
+void gpio_dir(gpio_t *obj, PinDirection direction)
+{
+    pin_dir(obj->name, direction);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
new file mode 100644
index 0000000000..d592319f86
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
@@ -0,0 +1,167 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include <stddef.h>
+#include "cmsis.h"
+#include "gpio_irq_api.h"
+#include "mbed_error.h"
+
+#define NUM_PORTS           8
+#define NUM_PINS_PER_PORT   8
+
+static uint32_t ids[NUM_PORTS][NUM_PINS_PER_PORT] = {{0}};
+static gpio_irq_handler irq_handler;
+
+static void handle_irq(unsigned int port)
+{
+    uint32_t intfl, in_val;
+    uint32_t mask;
+    unsigned int pin;
+
+    /* Read pin state */
+    in_val = MXC_GPIO->in_val[port];
+
+    /* Read interrupts */
+    intfl = MXC_GPIO->intfl[port] & MXC_GPIO->inten[port];
+    
+    mask = 1;
+
+    for (pin = 0; pin < NUM_PINS_PER_PORT; pin++) {
+        if (intfl & mask) {
+            if (ids[port][pin]) {
+                if (in_val & mask) {
+                    irq_handler(ids[port][pin], IRQ_RISE);
+                } else {
+                    irq_handler(ids[port][pin], IRQ_FALL);
+                }
+            }
+            MXC_GPIO->intfl[port] = mask;    /* clear interrupt */
+        }
+        mask <<= 1;
+    }
+}
+
+void gpio_irq_0(void) { handle_irq(0); }
+void gpio_irq_1(void) { handle_irq(1); }
+void gpio_irq_2(void) { handle_irq(2); }
+void gpio_irq_3(void) { handle_irq(3); }
+void gpio_irq_4(void) { handle_irq(4); }
+void gpio_irq_5(void) { handle_irq(5); }
+void gpio_irq_6(void) { handle_irq(6); }
+void gpio_irq_7(void) { handle_irq(7); }
+
+int gpio_irq_init(gpio_irq_t *obj, PinName name, gpio_irq_handler handler, uint32_t id)
+{
+    if (name == NC)
+        return -1;
+
+    uint8_t port = PINNAME_TO_PORT(name);
+    uint8_t pin = PINNAME_TO_PIN(name);
+
+    if ((port > NUM_PORTS) || (pin > NUM_PINS_PER_PORT)) {
+        return 1;
+    }
+
+    obj->port = port;
+    obj->pin = pin;
+
+    irq_handler = handler;
+
+    ids[port][pin] = id;
+
+    /* register handlers */
+    NVIC_SetVector(GPIO_P0_IRQn, (uint32_t)gpio_irq_0);
+    NVIC_SetVector(GPIO_P1_IRQn, (uint32_t)gpio_irq_1);
+    NVIC_SetVector(GPIO_P2_IRQn, (uint32_t)gpio_irq_2);
+    NVIC_SetVector(GPIO_P3_IRQn, (uint32_t)gpio_irq_3);
+    NVIC_SetVector(GPIO_P4_IRQn, (uint32_t)gpio_irq_4);
+    NVIC_SetVector(GPIO_P5_IRQn, (uint32_t)gpio_irq_5);
+    NVIC_SetVector(GPIO_P6_IRQn, (uint32_t)gpio_irq_6);
+    NVIC_SetVector(GPIO_P7_IRQn, (uint32_t)gpio_irq_7);
+
+    /* disable the interrupt locally */
+    MXC_GPIO->int_mode[port] &= ~(0xF << (pin*4));
+
+    /* clear a pending request */
+    MXC_GPIO->intfl[port] = 1 << pin;
+
+    /* enable the requested interrupt */
+    MXC_GPIO->inten[port] |= (1 << pin);
+    NVIC_EnableIRQ(GPIO_P0_IRQn + port);
+
+    return 0;
+}
+
+void gpio_irq_free(gpio_irq_t *obj)
+{
+    /* disable interrupt */
+    MXC_GPIO->inten[obj->port] &= ~(1 << obj->pin);
+    MXC_GPIO->int_mode[obj->port] &= ~(0xF << (obj->pin*4));
+
+    ids[obj->port][obj->pin] = 0;
+}
+
+void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
+{
+    uint32_t int_mode = MXC_GPIO->int_mode[obj->port];
+    uint32_t curr_mode = (int_mode >> (obj->pin*4)) & 0x3;   /* only supporting edge interrupts */
+
+    uint32_t new_mode = curr_mode;
+    if (event == IRQ_FALL) {
+        if (enable) {
+            new_mode |= 0x1;
+        } else {
+            new_mode &= ~0x1;
+        }
+    } else if (event == IRQ_RISE) {
+        if (enable) {
+            new_mode |= 0x2;
+        } else {
+            new_mode &= ~0x2;
+        }
+    }
+
+    int_mode &= ~(0xF << (obj->pin*4));
+    int_mode |= (new_mode << (obj->pin*4));
+    MXC_GPIO->int_mode[obj->port] = int_mode;
+}
+
+void gpio_irq_enable(gpio_irq_t *obj)
+{
+    MXC_GPIO->inten[obj->port] |= (1 << obj->pin);
+}
+
+void gpio_irq_disable(gpio_irq_t *obj)
+{
+    MXC_GPIO->inten[obj->port] &= ~(1 << obj->pin);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_object.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_object.h
new file mode 100644
index 0000000000..0c064f9068
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_object.h
@@ -0,0 +1,71 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_GPIO_OBJECT_H
+#define MBED_GPIO_OBJECT_H
+
+#include "mbed_assert.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    PinName name;
+    __IO uint32_t *reg_out;
+    __I  uint32_t *reg_in;
+} gpio_t;
+
+static inline void gpio_write(gpio_t *obj, int value)
+{
+    MBED_ASSERT(obj->name != (PinName)NC);
+    *obj->reg_out = !!value;
+}
+
+static inline int gpio_read(gpio_t *obj)
+{
+    MBED_ASSERT(obj->name != (PinName)NC);
+    return *obj->reg_in;
+}
+
+void pin_dir(PinName name, PinDirection direction);
+
+static inline int gpio_is_connected(const gpio_t *obj) {
+    return obj->name != (PinName)NC;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c
new file mode 100644
index 0000000000..cb986662db
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c
@@ -0,0 +1,405 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "mbed_assert.h"
+#include "i2c_api.h"
+#include "cmsis.h"
+#include "i2cm_regs.h"
+#include "clkman_regs.h"
+#include "ioman_regs.h"
+#include "PeripheralPins.h"
+
+#define I2C_SLAVE_ADDR_READ_BIT     0x0001
+
+#ifndef MXC_I2CM_TX_TIMEOUT
+#define MXC_I2CM_TX_TIMEOUT         0x5000
+#endif
+
+#ifndef MXC_I2CM_RX_TIMEOUT
+#define MXC_I2CM_RX_TIMEOUT         0x5000
+#endif
+
+typedef enum {
+    /** 100KHz */
+    MXC_E_I2CM_SPEED_100KHZ = 0,
+    /** 400KHz */
+    MXC_E_I2CM_SPEED_400KHZ,
+    /** 1MHz */
+    MXC_E_I2CM_SPEED_1MHZ
+} i2cm_speed_t;
+
+/* Clock divider lookup table */
+static const uint32_t clk_div_table[3][8] = {
+    /* MXC_E_I2CM_SPEED_100KHZ */
+    {
+        /* 0:       */ 0, /* not supported */
+        /* 1: 6MHz  */ (( 3 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | ( 7 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | ( 36 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 2: 8MHz  */ (( 4 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (10 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | ( 48 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 3: 12MHz */ (( 6 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (17 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | ( 72 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 4: 16MHz */ (( 8 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (24 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | ( 96 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 5:       */ 0, /* not supported */
+        /* 6:       */ 0, /* not supported */
+        /* 7: 24MHz */ ((12 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (38 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | (144 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+    },
+    /* MXC_E_I2CM_SPEED_400KHZ */
+    {
+        /* 0:       */ 0, /* not supported */
+        /* 1:       */ 0, /* not supported */
+        /* 2:       */ 0, /* not supported */
+        /* 3: 12MHz */ ((2 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (1 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | (18 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 4: 16MHz */ ((2 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (2 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | (24 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+        /* 5:       */ 0, /* not supported */
+        /* 6:       */ 0, /* not supported */
+        /* 7: 24MHz */ ((3 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (5 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | (36 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+    },
+    /* MXC_E_I2CM_SPEED_1MHZ */
+    {
+        /* 0:       */ 0, /* not supported */
+        /* 1:       */ 0, /* not supported */
+        /* 2:       */ 0, /* not supported */
+        /* 3:       */ 0, /* not supported */
+        /* 4:       */ 0, /* not supported */
+        /* 5:       */ 0, /* not supported */
+        /* 6:       */ 0, /* not supported */
+        /* 7: 24MHz */ ((1 << MXC_F_I2CM_CLK_DIV_FILTER_CLK_DIV_POS) | (0 << MXC_F_I2CM_CLK_DIV_SCL_HI_CNT_POS) | (14 << MXC_F_I2CM_CLK_DIV_SCL_LO_CNT_POS)),
+    },
+};
+
+void i2c_init(i2c_t *obj, PinName sda, PinName scl)
+{
+    // determine the I2C to use
+    I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
+    I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
+    mxc_i2cm_regs_t *i2c = (mxc_i2cm_regs_t*)pinmap_merge(i2c_sda, i2c_scl);
+    MBED_ASSERT((int)i2c != NC);
+
+    obj->i2c = i2c;
+    obj->txfifo = (uint16_t*)MXC_I2CM_GET_BASE_TX_FIFO(MXC_I2CM_BASE_TO_INSTANCE(i2c));
+    obj->rxfifo = (uint16_t*)MXC_I2CM_GET_BASE_RX_FIFO(MXC_I2CM_BASE_TO_INSTANCE(i2c));
+    obj->start_pending = 0;
+	obj->stop_pending = 0;
+
+    // configure the pins
+    pinmap_pinout(sda, PinMap_I2C_SDA);
+    pinmap_pinout(scl, PinMap_I2C_SCL);
+
+    // enable the clock
+    MXC_CLKMAN->clk_ctrl_6_i2cm = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+    // reset module
+    i2c->ctrl = MXC_F_I2CM_CTRL_MSTR_RESET_EN;
+    i2c->ctrl = 0;
+
+    // set default frequency at 100k
+    i2c_frequency(obj, 100000);
+
+    // set timeout to 255 ms and turn on the auto-stop option
+    i2c->timeout = (0xFF << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS) | MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN;
+
+    // enable tx_fifo and rx_fifo
+    i2c->ctrl |= (MXC_F_I2CM_CTRL_TX_FIFO_EN | MXC_F_I2CM_CTRL_RX_FIFO_EN);
+}
+
+void i2c_frequency(i2c_t *obj, int hz)
+{
+    // compute clock array index
+    int clki = ((SystemCoreClock + 1500000) / 3000000) - 1;
+
+    // get clock divider settings from lookup table
+    if ((hz < 400000) && (clk_div_table[MXC_E_I2CM_SPEED_100KHZ][clki] > 0)) {
+        obj->i2c->fs_clk_div = clk_div_table[MXC_E_I2CM_SPEED_100KHZ][clki];
+    } else if ((hz < 1000000) && (clk_div_table[MXC_E_I2CM_SPEED_400KHZ][clki] > 0)) {
+        obj->i2c->fs_clk_div = clk_div_table[MXC_E_I2CM_SPEED_400KHZ][clki];
+    } else if ((hz >= 1000000) && (clk_div_table[MXC_E_I2CM_SPEED_1MHZ][clki] > 0)) {
+        obj->i2c->hs_clk_div = clk_div_table[MXC_E_I2CM_SPEED_1MHZ][clki];
+    }
+}
+
+static int write_tx_fifo(i2c_t *obj, const uint16_t data)
+{
+    int timeout = MXC_I2CM_TX_TIMEOUT;
+
+    while (*obj->txfifo) {
+        uint32_t intfl = obj->i2c->intfl;
+        if (intfl & MXC_F_I2CM_INTFL_TX_NACKED) {
+            return I2C_ERROR_NO_SLAVE;
+        }
+        if (!timeout || (intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR))) {
+            return I2C_ERROR_BUS_BUSY;
+        }
+        timeout--;
+    }
+    *obj->txfifo = data;
+
+    return 0;
+}
+
+static int wait_tx_in_progress(i2c_t *obj)
+{
+    int timeout = MXC_I2CM_TX_TIMEOUT;
+
+    while ((obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS) && --timeout);
+
+    uint32_t intfl = obj->i2c->intfl;
+
+    if (intfl & MXC_F_I2CM_INTFL_TX_NACKED) {
+        i2c_reset(obj);
+        return I2C_ERROR_NO_SLAVE;
+    }
+
+    if (!timeout || (intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR))) {
+        i2c_reset(obj);
+        return I2C_ERROR_BUS_BUSY;
+    }
+
+    return 0;
+}
+
+int i2c_start(i2c_t *obj)
+{
+    obj->start_pending = 1;
+    return 0;
+}
+
+int i2c_stop(i2c_t *obj)
+{
+    obj->start_pending = 0;
+    write_tx_fifo(obj, MXC_S_I2CM_TRANS_TAG_STOP);
+
+    return wait_tx_in_progress(obj);
+}
+
+void i2c_reset(i2c_t *obj)
+{
+    obj->i2c->ctrl = MXC_F_I2CM_CTRL_MSTR_RESET_EN;
+    obj->i2c->intfl = 0x3FF; // clear all interrupts
+    obj->i2c->ctrl = MXC_F_I2CM_CTRL_TX_FIFO_EN | MXC_F_I2CM_CTRL_RX_FIFO_EN;
+    obj->start_pending = 0;
+}
+
+int i2c_byte_write(i2c_t *obj, int data)
+{
+    int err;
+
+    // clear all interrupts
+    obj->i2c->intfl = 0x3FF;
+
+    if (obj->start_pending) {
+        obj->start_pending = 0;
+        data = (data & 0xFF) | MXC_S_I2CM_TRANS_TAG_START;
+    } else {
+        data = (data & 0xFF) | MXC_S_I2CM_TRANS_TAG_TXDATA_ACK;
+    }
+
+    if ((err = write_tx_fifo(obj, data)) != 0) {
+        return err;
+    }
+
+    obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START;
+
+    return 0;
+}
+
+int i2c_byte_read(i2c_t *obj, int last)
+{
+    uint16_t fifo_value;
+    int err;
+
+    // clear all interrupts
+    obj->i2c->intfl = 0x3FF;
+
+    if (last) {
+        fifo_value = MXC_S_I2CM_TRANS_TAG_RXDATA_NACK;
+    } else {
+        fifo_value = MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT;
+    }
+
+    if ((err = write_tx_fifo(obj, fifo_value)) != 0) {
+        return err;
+    }
+
+    obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START;
+
+    int timeout = MXC_I2CM_RX_TIMEOUT;
+    while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) &&
+            (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) {
+        if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
+            break;
+        }
+    }
+
+    if (obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) {
+        obj->i2c->intfl = MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY;
+        return *obj->rxfifo;
+    }
+
+    return -1;
+}
+
+int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
+{
+    int err, retval = 0;
+    int i;
+
+    if (!(obj->stop_pending) && (obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
+        return 0;
+    }
+
+    // clear all interrupts
+    obj->i2c->intfl = 0x3FF;
+
+    // write the address to the fifo
+    if ((err = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_START | address))) != 0) { // start + addr (write)
+        return err;
+    }
+    obj->start_pending = 0;
+
+    // start the transaction
+    obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START;
+
+    // load as much of the cmd into the FIFO as possible
+    for (i = 0; i < length; i++) {
+        if ((err = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_TXDATA_ACK | data[i]))) != 0) { // cmd (expect ACK)
+            retval = (retval ? retval : err);
+            break;
+        }
+    }
+
+    if (stop) {
+		obj->stop_pending = 0;
+        if ((err = write_tx_fifo(obj, MXC_S_I2CM_TRANS_TAG_STOP)) != 0) { // stop condition
+            retval = (retval ? retval : err);
+        }
+
+        if ((err = wait_tx_in_progress(obj)) != 0) {
+            retval = (retval ? retval : err);
+        }
+    } else {
+        obj->stop_pending = 1;
+        int timeout = MXC_I2CM_TX_TIMEOUT;
+        // Wait for TX fifo to be empty
+        while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--) {}
+    }
+
+    if (retval == 0) {
+        return length;
+    }
+
+    return retval;
+}
+
+int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
+{
+    int err, retval = 0;
+    int i = length;
+    int timeout;
+
+    if (!(obj->stop_pending) && (obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
+        return 0;
+    }
+
+    // clear all interrupts
+    obj->i2c->intfl = 0x3FF;
+
+    // start + addr (read)
+    if ((retval = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_START | address | I2C_SLAVE_ADDR_READ_BIT))) != 0) {
+        goto read_done;
+    }
+    obj->start_pending = 0;
+
+    while (i > 256) {
+        if ((retval = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT | 255))) != 0) {
+            goto read_done;
+        }
+        i -= 256;
+    }
+
+    if (i > 1) {
+        if ((retval = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT | (i - 2)))) != 0) {
+            goto read_done;
+        }
+    }
+
+    // start the transaction
+    obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START;
+
+    if ((retval = write_tx_fifo(obj, MXC_S_I2CM_TRANS_TAG_RXDATA_NACK)) != 0) { // NACK last data byte
+        goto read_done;
+    }
+
+    if (stop) {
+        if ((retval = write_tx_fifo(obj, MXC_S_I2CM_TRANS_TAG_STOP)) != 0) { // stop condition
+            goto read_done;
+        }
+    }
+
+    timeout = MXC_I2CM_RX_TIMEOUT;
+    i = 0;
+    while (i < length) {
+        while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) &&
+                (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) {
+            if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) {
+                retval = -3;
+                goto read_done;
+            }
+        }
+
+        timeout = MXC_I2CM_RX_TIMEOUT;
+
+        obj->i2c->intfl = MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY;
+
+        uint16_t temp = *obj->rxfifo;
+
+        if (temp & MXC_S_I2CM_RSTLS_TAG_EMPTY) {
+            continue;
+        }
+        data[i++] = (uint8_t) temp;
+    }
+
+read_done:
+
+    if (stop) {
+        obj->stop_pending = 0;
+        if ((err = wait_tx_in_progress(obj)) != 0) {
+            retval = (retval ? retval : err);
+        }
+    } else {
+        obj->stop_pending = 1;
+    }
+
+    if (retval == 0) {
+        return length;
+    }
+
+    return retval;
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h
new file mode 100644
index 0000000000..442ab5e248
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h
@@ -0,0 +1,118 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
+
+#include "cmsis.h"
+#include "PortNames.h"
+#include "PeripheralNames.h"
+#include "PinNames.h"
+#include "gpio_object.h"
+#include "gpio_regs.h"
+#include "uart_regs.h"
+#include "i2cm_regs.h"
+#include "spi_regs.h"
+#include "pt_regs.h"
+#include "adc_regs.h"
+#include "dac_regs.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct port_s {
+    PortName port;
+    uint32_t mask;
+    __IO uint32_t *reg_out;
+    __I  uint32_t *reg_in;
+};
+
+struct gpio_irq_s {
+    uint8_t port;
+    uint8_t pin;
+};
+
+struct serial_s {
+    int index;
+    mxc_uart_regs_t *uart;
+};
+
+struct i2c_s {
+    int index;
+    mxc_i2cm_regs_t *i2c;
+    volatile uint16_t *txfifo;
+    volatile uint16_t *rxfifo;
+    int start_pending;
+    int stop_pending;
+};
+
+struct spi_s {
+    int index;
+    mxc_spi_regs_t *spi;
+    mxc_spi_rxfifo_regs_t *rxfifo;
+    mxc_spi_txfifo_regs_t *txfifo;
+};
+
+struct pwmout_s {
+    mxc_pt_regs_t *pwm;
+    int period;
+    int pulse_width;
+};
+
+struct analogin_s {
+    mxc_adc_regs_t *adc;
+    mxc_adccfg_regs_t *adccfg;
+    mxc_adc_fifo_regs_t * adc_fifo;
+    PinName adc_pin;
+};
+
+struct dac_s {
+    int index;
+    uint16_t out;
+    mxc_dac_regs_t *dac;
+    mxc_dac_fifo_t * dac_fifo;
+};
+
+typedef struct {
+    volatile uint32_t *reg_req;
+    volatile uint32_t *reg_ack;
+    uint32_t req_val;
+    uint32_t ack_mask;
+} pin_function_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pinmap.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pinmap.c
new file mode 100644
index 0000000000..099c77a307
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pinmap.c
@@ -0,0 +1,105 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "mbed_assert.h"
+#include "pinmap.h"
+#include "objects.h"
+#include "gpio_regs.h"
+#include "ioman_regs.h"
+
+void pin_function(PinName name, int function)
+{
+    MBED_ASSERT(name != (PinName)NC);
+
+    if ((function >= 0) && (function <= 0xF)) {
+        unsigned int port = PINNAME_TO_PORT(name);
+        unsigned int pin = PINNAME_TO_PIN(name);
+        uint32_t temp = MXC_GPIO->func_sel[port] & ~(0xF << (pin*4));
+        MXC_GPIO->func_sel[port] = temp | ((uint32_t)function << (pin*4));
+    } else {
+        /* Assume this is a pointer to a pin function object */
+        pin_function_t *obj = (pin_function_t*)function;
+
+        if ((*obj->reg_ack & obj->ack_mask) != obj->req_val) {
+            /* Request pin mapping */
+            *obj->reg_req |= obj->req_val;
+
+            /* Check for acknowledgment */
+            MBED_ASSERT((*obj->reg_ack & obj->ack_mask) == obj->req_val);
+        }
+    }
+}
+
+void pin_mode(PinName name, PinMode mode)
+{
+    MBED_ASSERT(name != (PinName)NC);
+    unsigned int port = PINNAME_TO_PORT(name);
+    unsigned int pin = PINNAME_TO_PIN(name);
+
+    /* Must set mode while retaining direction */
+
+    /* Get the current direction */
+    uint32_t out_mode = MXC_GPIO->out_mode[port];
+    uint32_t curr_mode = (out_mode >> (pin*4)) & 0xF;
+    PinDirection dir = PIN_OUTPUT;
+    if ((curr_mode == MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP) || (curr_mode == MXC_V_GPIO_OUT_MODE_HIGH_Z)) {
+        dir = PIN_INPUT;
+    }
+
+    /* Set mode based on current direction */
+    uint32_t new_mode;
+    if (dir == PIN_OUTPUT) {
+        // PullUp      = not valid,
+        // OpenDrain   = MXC_V_GPIO_OUT_MODE_OD,
+        // PullNone    = MXC_V_GPIO_OUT_MODE_NORMAL,
+        if (mode == OpenDrain) {
+            new_mode = MXC_V_GPIO_OUT_MODE_OPEN_DRAIN;
+        } else {
+            new_mode = MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE;
+        }
+    } else {
+        // PullUp      = MXC_V_GPIO_OUT_MODE_HIZPU,
+        // OpenDrain   = not valid,
+        // PullNone    = MXC_V_GPIO_OUT_MODE_HIZ,
+        if (mode == PullUp) {
+            new_mode = MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP;
+        } else {
+            new_mode = MXC_V_GPIO_OUT_MODE_HIGH_Z;
+        }
+    }
+
+    /* Set new mode */
+    out_mode &= ~(0xF << (pin*4));
+    out_mode |= (new_mode << (pin*4));
+    MXC_GPIO->out_mode[port] = out_mode;
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/port_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/port_api.c
new file mode 100644
index 0000000000..f8b7e0884c
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/port_api.c
@@ -0,0 +1,97 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "port_api.h"
+#include "pinmap.h"
+#include "gpio_api.h"
+#include "gpio_regs.h"
+#include "clkman_regs.h"
+
+PinName port_pin(PortName port, int pin_n)
+{
+    return (PinName)((port << PORT_SHIFT) | pin_n);
+}
+
+void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
+{
+    obj->port = port;
+    obj->mask = mask;
+    obj->reg_out = &MXC_GPIO->out_val[port];
+    obj->reg_in  = &MXC_GPIO->in_val[port];
+
+    /* Ensure that the GPIO clock is enabled */
+    if (MXC_CLKMAN->clk_ctrl_1_gpio == MXC_E_CLKMAN_CLK_SCALE_DISABLED) {
+        MXC_CLKMAN->clk_ctrl_1_gpio = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+    }
+
+    uint32_t i;
+    // The function is set per pin: reuse gpio logic
+    for (i=0; i<32; i++) {
+        if (obj->mask & (1<<i)) {
+            gpio_set(port_pin(obj->port, i));
+            pin_dir(port_pin(obj->port, i), dir);
+        }
+    }
+}
+
+void port_mode(port_t *obj, PinMode mode)
+{
+    uint32_t i;
+    // The mode is set per pin: reuse pinmap logic
+    for (i=0; i<32; i++) {
+        if (obj->mask & (1<<i)) {
+            pin_mode(port_pin(obj->port, i), mode);
+        }
+    }
+}
+
+void port_dir(port_t *obj, PinDirection dir)
+{
+    uint32_t i;
+    // The mode is set per pin: reuse gpio logic
+    for (i=0; i<32; i++) {
+        if (obj->mask & (1<<i)) {
+            pin_dir(port_pin(obj->port, i), dir);
+        }
+    }
+}
+
+void port_write(port_t *obj, int value)
+{
+    *obj->reg_out = (*obj->reg_out & ~obj->mask) | (value & obj->mask);
+}
+
+int port_read(port_t *obj)
+{
+    return (*obj->reg_in & obj->mask);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pwmout_api.c
new file mode 100644
index 0000000000..1a412248de
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pwmout_api.c
@@ -0,0 +1,234 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "mbed_assert.h"
+#include "cmsis.h"
+#include "pwmout_api.h"
+#include "pinmap.h"
+#include "ioman_regs.h"
+#include "clkman_regs.h"
+#include "PeripheralPins.h"
+
+//******************************************************************************
+void pwmout_init(pwmout_t* obj, PinName pin)
+{
+    // Make sure the pin is free for GPIO use
+    unsigned int port = (unsigned int)pin >> PORT_SHIFT;
+    unsigned int port_pin = (unsigned int)pin & ~(0xFFFFFFFF << PORT_SHIFT);
+    MBED_ASSERT(MXC_GPIO->free[port] & (0x1 << port_pin));
+
+    int i = 0;
+    PinMap pwm = PinMap_PWM[0];
+
+    // Check if there is a pulse train already active on this port
+    int pin_func = (MXC_GPIO->func_sel[port] & (0xF << (port_pin*4))) >> (port_pin*4);
+    if((pin_func > 0) && (pin_func < 4)) {
+        // Search through PinMap_PWM to find the active PT
+        while(pwm.pin != (PinName)NC) {
+            if((pwm.pin == pin) && (pwm.function == pin_func)) {
+                break;
+            }
+            pwm = PinMap_PWM[++i];
+        }
+
+    } else {
+       // Search through PinMap_PWM to find an available PT
+        int i = 0;
+        while(pwm.pin != (PinName)NC && (i > -1)) {
+            pwm = PinMap_PWM[i++];
+            if(pwm.pin == pin) {
+                // Check each instance of PT
+                while(1) {
+                    // Check to see if this PT instance is already in use
+                    if((((mxc_pt_regs_t*)pwm.peripheral)->rate_length & 
+                        MXC_F_PT_RATE_LENGTH_MODE)) {
+                        i = -1;
+                        break;
+                    } 
+
+                    // If all instances are in use, overwrite the last 
+                    pwm = PinMap_PWM[++i];
+                    if(pwm.pin != pin) {
+                        pwm = PinMap_PWM[--i];
+                        i = -1; 
+                        break;
+                    }
+
+                }
+            }
+        } 
+    }
+
+    // Make sure we found an available PWM generator
+    MBED_ASSERT(pwm.pin != (PinName)NC);
+
+    // Disable all pwm output
+    MXC_PTG->ctrl = 0;
+
+    // Enable the clock
+    MXC_CLKMAN->clk_ctrl_2_pt = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+    // Set the drive mode to normal
+    MXC_SET_FIELD(&MXC_GPIO->out_mode[port], (0x7 << (port_pin*4)), (MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << (port_pin*4)));
+
+    // Set the obj pointer to the propper PWM instance
+    obj->pwm = (mxc_pt_regs_t*)pwm.peripheral;
+
+    // Initialize object period and pulse width
+    obj->period = -1; 
+    obj->pulse_width = -1;
+
+    // Disable the output
+    obj->pwm->train = 0x0;
+    obj->pwm->rate_length = 0x0;
+
+    // Configure the pin
+    pin_mode(pin, (PinMode)PullNone);
+    pin_function(pin, pwm.function);
+
+    // default to 20ms: standard for servos, and fine for e.g. brightness control
+    pwmout_period_us(obj, 20000);
+    pwmout_write    (obj, 0);
+
+    // Enable the global pwm
+    MXC_PTG->ctrl = MXC_F_PT_CTRL_ENABLE_ALL;
+}
+
+//******************************************************************************
+void pwmout_free(pwmout_t* obj)
+{
+    // Set the registers to the reset value
+    obj->pwm->train = 0;
+    obj->pwm->rate_length = 0x08000000;
+}
+
+//******************************************************************************
+static void pwmout_update(pwmout_t* obj)
+{
+    // Calculate and set the divider ratio
+    int div = (obj->period * (SystemCoreClock/1000000))/32;
+    if (div < 2){
+        div = 2;
+    }
+    MXC_SET_FIELD(&obj->pwm->rate_length, MXC_F_PT_RATE_LENGTH_RATE_CONTROL, div);
+
+    // Change the duty cycle to adjust the pulse width
+    obj->pwm->train = (0xFFFFFFFF << (32-((32*obj->pulse_width)/obj->period)));
+}
+
+
+//******************************************************************************
+void pwmout_write(pwmout_t* obj, float percent)
+{
+    // Saturate percent if outside of range
+    if(percent < 0.0) {
+        percent = 0.0;
+    } else if(percent > 1.0) {
+        percent = 1.0;
+    }
+
+    // Resize the pulse width to set the duty cycle
+    pwmout_pulsewidth_us(obj, (int)(percent*obj->period));
+}
+
+//******************************************************************************
+float pwmout_read(pwmout_t* obj)
+{
+    // Check for when pulsewidth or period equals 0
+    if((obj->pulse_width == 0) || (obj->period == 0)){
+        return 0;
+    }
+
+    // Return the duty cycle
+    return ((float)obj->pulse_width / (float)obj->period);
+}
+
+//******************************************************************************
+void pwmout_period(pwmout_t* obj, float seconds)
+{
+    pwmout_period_us(obj, (int)(seconds * 1000000.0));
+}
+
+//******************************************************************************
+void pwmout_period_ms(pwmout_t* obj, int ms)
+{
+    pwmout_period_us(obj, ms*1000);
+}
+
+//******************************************************************************
+void pwmout_period_us(pwmout_t* obj, int us)
+{
+    // Check the range of the period
+    MBED_ASSERT((us >= 0) && (us <= (int)(SystemCoreClock/32)));
+
+    // Set pulse width to half the period if uninitialized
+    if(obj->pulse_width == -1){
+        obj->pulse_width = us/2;
+    }
+
+    // Save the period
+    obj->period = us;
+
+    // Update the registers
+    pwmout_update(obj);
+}
+
+//******************************************************************************
+void pwmout_pulsewidth(pwmout_t* obj, float seconds)
+{
+    pwmout_pulsewidth_us(obj, (int)(seconds * 1000000.0));
+}
+
+//******************************************************************************
+void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
+{
+    pwmout_pulsewidth_us(obj, ms*1000);
+}
+
+//******************************************************************************
+void pwmout_pulsewidth_us(pwmout_t* obj, int us)
+{
+    // Check the range of the pulsewidth
+    MBED_ASSERT((us >= 0) && (us <= (int)(SystemCoreClock/32)));
+
+    // Initialize period to double the pulsewidth if uninitialized
+    if(obj->period == -1){
+        obj->period = 2*us;
+    }
+
+    // Save the pulsewidth
+    obj->pulse_width = us;
+
+    // Update the register
+    pwmout_update(obj);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/rtc_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/rtc_api.c
new file mode 100644
index 0000000000..033420d4ad
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/rtc_api.c
@@ -0,0 +1,190 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include "rtc_api.h"
+#include "cmsis.h"
+#include "rtc_regs.h"
+#include "pwrseq_regs.h"
+#include "clkman_regs.h"
+
+static int rtc_inited = 0;
+static volatile uint32_t overflow_cnt = 0;
+static uint32_t overflow_alarm = 0;
+
+//******************************************************************************
+static void overflow_handler(void)
+{
+    MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS;
+    overflow_cnt++;
+
+    if (overflow_cnt == overflow_alarm) {
+        // Enable the comparator interrupt for the alarm
+        MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0;
+    }
+}
+
+//******************************************************************************
+static void alarm_handler(void)
+{
+    MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
+    MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS;
+}
+
+//******************************************************************************
+void rtc_init(void)
+{
+    if(rtc_inited) {
+        return;
+    }
+    rtc_inited = 1;
+
+    // Enable the clock to the synchronizer
+    MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
+
+    // Enable the clock to the RTC
+    MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN;
+
+    // Set the divider from the 4kHz clock
+    MXC_RTCTMR->prescale = MXC_E_RTC_PRESCALE_DIV_2_0;
+
+    // Enable the overflow interrupt
+    MXC_RTCTMR->inten |= MXC_F_RTC_FLAGS_OVERFLOW;
+
+    // Prepare interrupt handlers
+    NVIC_SetVector(RTC0_IRQn, (uint32_t)alarm_handler);
+    NVIC_EnableIRQ(RTC0_IRQn);
+    NVIC_SetVector(RTC3_IRQn, (uint32_t)overflow_handler);
+    NVIC_EnableIRQ(RTC3_IRQn);
+
+    // Enable the RTC
+    MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE;
+}
+
+//******************************************************************************
+void rtc_free(void)
+{
+    if (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE) {
+        // Clear and disable RTC
+        MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_CLEAR;
+        MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE;
+
+        // Wait for pending transactions
+        while(MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
+    }
+
+    // Disable the clock to the RTC
+    MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP);
+
+    // Disable the clock to the synchronizer
+    MXC_CLKMAN->clk_ctrl_13_rtc_int_sync = MXC_E_CLKMAN_CLK_SCALE_DISABLED;
+}
+
+//******************************************************************************
+int rtc_isenabled(void)
+{
+    return (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_ENABLE);
+}
+
+//******************************************************************************
+time_t rtc_read(void)
+{
+    unsigned int shift_amt;
+    uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
+
+    // Account for a change in the default prescaler
+    shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
+
+    // Ensure coherency between overflow_cnt and timer
+    do {
+        ovf_cnt_1 = overflow_cnt;
+        timer_cnt = MXC_RTCTMR->timer;
+        ovf_cnt_2 = overflow_cnt;
+    } while (ovf_cnt_1 != ovf_cnt_2);
+
+    return (timer_cnt >> shift_amt) + (ovf_cnt_1 << (32 - shift_amt));
+}
+
+//******************************************************************************
+uint64_t rtc_read_us(void)
+{
+    unsigned int shift_amt;
+    uint32_t ovf_cnt_1, ovf_cnt_2, timer_cnt;
+    uint64_t currentUs;
+
+    // Account for a change in the default prescaler
+    shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
+
+    // Ensure coherency between overflow_cnt and timer
+    do {
+        ovf_cnt_1 = overflow_cnt;
+        timer_cnt = MXC_RTCTMR->timer;
+        ovf_cnt_2 = overflow_cnt;
+    } while (ovf_cnt_1 != ovf_cnt_2);
+
+    currentUs = (((uint64_t)timer_cnt * 1000000) >> shift_amt) + (((uint64_t)ovf_cnt_1 * 1000000) << (32 - shift_amt));
+
+    return currentUs;
+}
+
+//******************************************************************************
+void rtc_write(time_t t)
+{
+    // Account for a change in the default prescaler
+    unsigned int shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
+
+    MXC_RTCTMR->ctrl &= ~MXC_F_RTC_CTRL_ENABLE; // disable the timer while updating
+    MXC_RTCTMR->timer = t << shift_amt;
+    overflow_cnt = t >> (32 - shift_amt);
+    MXC_RTCTMR->ctrl |= MXC_F_RTC_CTRL_ENABLE;  // enable the timer while updating
+}
+
+//******************************************************************************
+void rtc_set_wakeup(uint64_t wakeupUs)
+{
+    // Account for a change in the default prescaler
+    unsigned int shift_amt = MXC_E_RTC_PRESCALE_DIV_2_12 - MXC_RTCTMR->prescale;
+
+    // Disable the alarm while it is prepared
+    MXC_RTCTMR->inten &= ~MXC_F_RTC_INTEN_COMP0;
+    MXC_RTCTMR->flags = MXC_F_RTC_FLAGS_COMP0;      // clear interrupt
+
+    overflow_alarm = (wakeupUs >> (32 - shift_amt)) / 1000000;
+
+    if (overflow_alarm == overflow_cnt) {
+        MXC_RTCTMR->comp[0] = (wakeupUs << shift_amt) / 1000000;
+        MXC_RTCTMR->inten |= MXC_F_RTC_INTEN_COMP0;
+    }
+
+    // Enable wakeup from RTC
+    MXC_PWRSEQ->msk_flags &= ~(MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER | MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c
new file mode 100644
index 0000000000..34fc49ce8a
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c
@@ -0,0 +1,355 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include <string.h>
+#include "mbed_assert.h"
+#include "cmsis.h"
+#include "serial_api.h"
+#include "uart_regs.h"
+#include "PeripheralPins.h"
+
+#define UART_NUM 2
+#define DEFAULT_BAUD 9600
+#define DEFAULT_STOP 1
+#define DEFAULT_PARITY ParityNone
+
+#define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAME_ERROR | \
+                     MXC_F_UART_INTFL_RX_PARITY_ERROR | \
+                     MXC_F_UART_INTFL_RX_OVERRUN)
+
+// Variables for managing the stdio UART
+int stdio_uart_inited;
+serial_t stdio_uart;
+
+// Variables for interrupt driven
+static uart_irq_handler irq_handler;
+static uint32_t serial_irq_ids[UART_NUM];
+
+//******************************************************************************
+void serial_init(serial_t *obj, PinName tx, PinName rx)
+{
+    // Determine which uart is associated with each pin
+    UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
+    UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
+    UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
+
+    // Make sure that both pins are pointing to the same uart
+    MBED_ASSERT(uart != (UARTName)NC);
+
+    // Set the obj pointer to the proper uart
+    obj->uart = (mxc_uart_regs_t*)uart;
+
+    // Set the uart index
+    obj->index = MXC_UART_BASE_TO_INSTANCE(obj->uart);
+
+    // Configure the pins
+    pinmap_pinout(tx, PinMap_UART_TX);
+    pinmap_pinout(rx, PinMap_UART_RX);
+
+    // Flush the RX and TX FIFOs, clear the settings
+    obj->uart->ctrl = ( MXC_F_UART_CTRL_TX_FIFO_FLUSH |  MXC_F_UART_CTRL_RX_FIFO_FLUSH);
+
+    // Disable interrupts
+    obj->uart->inten = 0;
+    obj->uart->intfl = 0;
+
+    // Configure to default settings
+    serial_baud(obj, DEFAULT_BAUD);
+    serial_format(obj, 8, ParityNone, 1);
+
+    // Manage stdio UART
+    if(uart == STDIO_UART) {
+        stdio_uart_inited = 1;
+        memcpy(&stdio_uart, obj, sizeof(serial_t));
+    }
+}
+
+//******************************************************************************
+void serial_baud(serial_t *obj, int baudrate)
+{
+    uint32_t idiv = 0, ddiv = 0, div = 0;
+
+    // Calculate the integer and decimal portions
+    div = SystemCoreClock / ((baudrate / 100) * 128);
+    idiv = (div / 100);
+    ddiv = (div - idiv * 100) * 128 / 100;
+
+    obj->uart->baud_int = idiv;
+    obj->uart->baud_div_128 = ddiv;
+
+    // Enable the baud clock
+    obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
+}
+
+//******************************************************************************
+void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
+{
+
+    // Check the validity of the inputs
+    MBED_ASSERT((data_bits > 4) && (data_bits < 9));
+    MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) ||
+                (parity == ParityEven) || (parity == ParityForced1) ||
+                (parity == ParityForced0));
+    MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
+
+    // Adjust the stop and data bits
+    stop_bits -= 1;
+    data_bits -= 5;
+
+    // Adjust the parity setting
+    int paren = 0, mode = 0;
+    switch (parity) {
+        case ParityNone:
+            paren = 0;
+            mode = 0;
+            break;
+        case ParityOdd :
+            paren = 1;
+            mode = 0;
+            break;
+        case ParityEven:
+            paren = 1;
+            mode = 1;
+            break;
+        case ParityForced1:
+            // Hardware does not support forced parity
+            MBED_ASSERT(0);
+            break;
+        case ParityForced0:
+            // Hardware does not support forced parity
+            MBED_ASSERT(0);
+            break;
+        default:
+            paren = 1;
+            mode = 0;
+            break;
+    }
+
+    obj->uart->ctrl |= ((data_bits << MXC_F_UART_CTRL_CHAR_LENGTH_POS) |
+                        (stop_bits << MXC_F_UART_CTRL_STOP_BIT_MODE_POS) |
+                        (paren << MXC_F_UART_CTRL_PARITY_ENABLE_POS) |
+                        (mode << MXC_F_UART_CTRL_PARITY_MODE_POS));
+}
+
+//******************************************************************************
+void uart_handler(mxc_uart_regs_t* uart, int id)
+{
+    // Check for errors or RX Threshold
+    if(uart->intfl & (MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS)) {
+        irq_handler(serial_irq_ids[id], RxIrq);
+        uart->intfl &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS);
+    }
+
+    // Check for TX Threshold
+    if(uart->intfl & MXC_F_UART_INTFL_TX_ALMOST_EMPTY) {
+        irq_handler(serial_irq_ids[id], TxIrq);
+        uart->intfl &= ~(MXC_F_UART_INTFL_TX_ALMOST_EMPTY);
+    }
+}
+
+void uart0_handler(void)
+{
+    uart_handler(MXC_UART0, 0);
+}
+void uart1_handler(void)
+{
+    uart_handler(MXC_UART1, 1);
+}
+
+//******************************************************************************
+void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
+{
+    irq_handler = handler;
+    serial_irq_ids[obj->index] = id;
+}
+
+//******************************************************************************
+void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
+{
+    if(obj->index == 0) {
+        NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
+        NVIC_EnableIRQ(UART0_IRQn);
+    } else {
+        NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
+        NVIC_EnableIRQ(UART1_IRQn);
+    }
+
+    if(irq == RxIrq) {
+        // Set the RX FIFO Threshold to 1
+        obj->uart->ctrl &= ~MXC_F_UART_CTRL_RX_THRESHOLD;
+        obj->uart->ctrl |= 0x1;
+        // Enable RX FIFO Threshold Interrupt
+        if(enable) {
+            // Clear pending interrupts
+            obj->uart->intfl = 0;
+            obj->uart->inten |= (MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
+                                 UART_ERRORS);
+        } else {
+            // Clear pending interrupts
+            obj->uart->intfl = 0;
+            obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
+                                  UART_ERRORS);
+        }
+
+    } else if (irq == TxIrq) {
+        // Enable TX Almost empty Interrupt
+        if(enable) {
+            // Clear pending interrupts
+            obj->uart->intfl = 0;
+            obj->uart->inten |= MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
+        } else {
+            // Clear pending interrupts
+            obj->uart->intfl = 0;
+            obj->uart->inten &= ~MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
+        }
+
+    } else {
+        MBED_ASSERT(0);
+    }
+}
+
+
+//******************************************************************************
+int serial_getc(serial_t *obj)
+{
+    int c;
+
+    // Wait for data to be available
+    while(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY) {}
+    c = obj->uart->tx_rx_fifo & 0xFF;
+
+    // Echo characters for stdio
+    if (obj->uart == (mxc_uart_regs_t*)STDIO_UART) {
+        obj->uart->tx_rx_fifo = c;
+    }
+    
+    return c;
+}
+
+//******************************************************************************
+void serial_putc(serial_t *obj, int c)
+{
+    // Append a carriage return for stdio
+    if ((c == (int)'\n') && (obj->uart == (mxc_uart_regs_t*)STDIO_UART)) {
+        while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
+        obj->uart->tx_rx_fifo = '\r';
+    }
+
+    // Wait for TXFIFO to not be full
+    while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
+    obj->uart->tx_rx_fifo = c;
+
+}
+
+//******************************************************************************
+int serial_readable(serial_t *obj)
+{
+    return (!(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY));
+}
+
+//******************************************************************************
+int serial_writable(serial_t *obj)
+{
+    return (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL));
+}
+
+//******************************************************************************
+void serial_clear(serial_t *obj)
+{
+    // Clear the rx and tx fifos
+    obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH  | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
+}
+
+
+//******************************************************************************
+void serial_break_set(serial_t *obj)
+{
+    // Make sure that nothing is being sent
+    while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
+
+    // Disable the clock to pause any transmission
+    obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
+}
+
+//******************************************************************************
+void serial_break_clear(serial_t *obj)
+{
+    obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
+}
+
+
+//******************************************************************************
+void serial_pinout_tx(PinName tx)
+{
+    pinmap_pinout(tx, PinMap_UART_TX);
+}
+
+
+//******************************************************************************
+void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
+{
+    if(FlowControlNone == type) {
+        // Disable hardware flow control
+        obj->uart->ctrl &= ~(MXC_F_UART_CTRL_HW_FLOW_CTRL_EN);
+        return;
+    }
+
+    // Check to see if we can use HW flow control
+    UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
+    UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
+    UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
+
+    if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
+        // Make sure pin is in the PinMap
+        MBED_ASSERT(uart_cts != (UARTName)NC);
+
+        // Enable the pin for CTS function
+        pinmap_pinout(txflow, PinMap_UART_CTS);
+    }
+
+    if((FlowControlRTS == type) || (FlowControlRTSCTS== type))  {
+        // Make sure pin is in the PinMap
+        MBED_ASSERT(uart_rts != (UARTName)NC);
+
+        // Enable the pin for RTS function
+        pinmap_pinout(rxflow, PinMap_UART_RTS);
+    }
+
+    if(FlowControlRTSCTS == type){ 
+        // Make sure that the pins are pointing to the same UART
+        MBED_ASSERT(uart != (UARTName)NC);
+    }
+
+    // Enable hardware flow control
+    obj->uart->ctrl |= MXC_F_UART_CTRL_HW_FLOW_CTRL_EN;
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/sleep.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/sleep.c
new file mode 100644
index 0000000000..3eb9154f03
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/sleep.c
@@ -0,0 +1,169 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "sleep_api.h"
+#include "us_ticker_api.h"
+#include "cmsis.h"
+#include "pwrman_regs.h"
+#include "pwrseq_regs.h"
+#include "ioman_regs.h"
+#include "rtc_regs.h"
+
+#define MIN_DEEP_SLEEP_US       500
+
+uint64_t rtc_read_us(void);
+void rtc_set_wakeup(uint64_t wakeupUs);
+void us_ticker_deinit(void);
+void us_ticker_set(timestamp_t timestamp);
+
+static mxc_uart_regs_t *stdio_uart = (mxc_uart_regs_t*)STDIO_UART;
+
+// Normal wait mode
+void sleep(void)
+{
+    // Normal sleep mode for ARM core
+    SCB->SCR = 0;
+
+    __DSB();
+    __WFI();
+}
+
+// Work-around for issue of clearing power sequencer I/O flag
+static void clearAllGPIOWUD(void)
+{
+    uint32_t wud_req0 = MXC_IOMAN->wud_req0;
+    uint32_t wud_req1 = MXC_IOMAN->wud_req1;
+
+    // I/O must be a wakeup detect to clear
+    MXC_IOMAN->wud_req0 = 0xffffffff;
+    MXC_IOMAN->wud_req1 = 0xffffffff;
+
+    // Clear all WUDs
+    MXC_PWRMAN->wud_ctrl = (MXC_E_PWRMAN_PAD_MODE_CLEAR_SET << MXC_F_PWRMAN_WUD_CTRL_PAD_MODE_POS) | MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL;
+    MXC_PWRMAN->wud_pulse0 = 1;
+
+    // Restore WUD requests
+    MXC_IOMAN->wud_req0 = wud_req0;
+    MXC_IOMAN->wud_req1 = wud_req1;
+}
+
+// Low-power stop mode
+void deepsleep(void)
+{
+    uint64_t sleepStartRtcUs;
+    uint32_t sleepStartTickerUs;
+    int32_t sleepDurationUs;
+    uint64_t sleepEndRtcUs;
+    uint64_t elapsedUs;
+
+    __disable_irq();
+
+    // Wait for all STDIO characters to be sent. The UART clock will stop.
+    while (stdio_uart->status & MXC_F_UART_STATUS_TX_BUSY);
+
+    // Record the current times
+    sleepStartRtcUs = rtc_read_us();
+    sleepStartTickerUs = us_ticker_read();
+
+    // Get the next mbed timer expiration
+    timestamp_t next_event = 0;
+    us_ticker_get_next_timestamp(&next_event);
+    sleepDurationUs = next_event - sleepStartTickerUs;
+
+    if (sleepDurationUs < MIN_DEEP_SLEEP_US) {
+        /* The next wakeup is too soon. */
+        __enable_irq();
+        return;
+    }
+
+    // Disable the us_ticker. It won't be clocked in DeepSleep
+    us_ticker_deinit();
+
+    // Prepare to wakeup from the RTC
+    rtc_set_wakeup(sleepStartRtcUs + sleepDurationUs);
+
+    // Prepare for LP1
+    uint32_t reg0 = MXC_PWRSEQ->reg0;
+    reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP;  // disable VDD3 SVM during sleep mode
+    reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP;  // disable VREG18 SVM during sleep mode
+    if (reg0 & MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN) {   // if real-time clock enabled during run
+        reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP;    // enable real-time clock during sleep mode
+    } else {
+        reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP;   // disable real-time clock during sleep mode
+    }
+    reg0 |= MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP;   // enable CHZY regulator during sleep mode
+    reg0 |= MXC_F_PWRSEQ_REG0_PWR_LP1;          // go into LP1
+    reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT;  // clear first boot flag
+    MXC_PWRSEQ->reg0 = reg0;
+
+    MXC_PWRSEQ->reg3 = (MXC_PWRSEQ->reg3 & ~MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK) | (3 << MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK_POS);
+
+    // Deep sleep for ARM core
+    SCB->SCR = SCB_SCR_SLEEPDEEP_Msk;
+
+    // clear latches for wakeup detect
+    MXC_PWRSEQ->flags = MXC_PWRSEQ->flags;
+    if (MXC_PWRSEQ->flags & MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP) {
+        // attempt work-around for I/O flag clearing issue
+        clearAllGPIOWUD();
+        MXC_PWRSEQ->flags = MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP;
+    }
+
+    // Wait for pending RTC transaction
+    while (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
+
+    // Ensure that the event register is clear
+    __SEV();    // set event
+    __WFE();    // clear event
+
+    // Enter LP1
+    __WFE();
+    // Woke up from LP1
+
+    // The RTC timer does not update until the next tick
+    uint64_t tempUs = rtc_read_us();
+    do {
+        sleepEndRtcUs = rtc_read_us();
+    } while(sleepEndRtcUs == tempUs);
+
+    // Get the elapsed time from the RTC. Wakeup could have been from some other event.
+    elapsedUs = sleepEndRtcUs - sleepStartRtcUs;
+
+    // Update the us_ticker. It was not clocked during DeepSleep
+    us_ticker_init();
+    us_ticker_set(sleepStartTickerUs + elapsedUs);
+    us_ticker_get_next_timestamp(&next_event);
+    us_ticker_set_interrupt(next_event);
+
+    __enable_irq();
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c
new file mode 100644
index 0000000000..0dda7cdd0c
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c
@@ -0,0 +1,190 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+#include <string.h>
+#include "mbed_assert.h"
+#include "cmsis.h"
+#include "spi_api.h"
+#include "pinmap.h"
+#include "ioman_regs.h"
+#include "clkman_regs.h"
+#include "PeripheralPins.h"
+
+#define DEFAULT_CHAR	8
+#define DEFAULT_MODE	0
+#define DEFAULT_FREQ 	1000000
+
+// Formatting settings
+static int spi_bits;
+
+//******************************************************************************
+void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
+{
+    // Make sure pins are pointing to the same SPI instance
+    SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
+    SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
+    SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
+    SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
+
+    SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
+    SPIName spi_cntl;
+
+    // Give the application the option to manually control Slave Select
+    if((SPIName)spi_ssel != (SPIName)NC) {
+        spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
+    } else {
+        spi_cntl = spi_sclk;
+    }
+
+    SPIName spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
+
+    MBED_ASSERT((SPIName)spi != (SPIName)NC);
+
+    // Set the obj pointer to the proper SPI Instance
+    obj->spi = (mxc_spi_regs_t*)spi;
+
+    // Set the SPI index and FIFOs
+    obj->index = MXC_SPI_BASE_TO_INSTANCE(obj->spi);
+    obj->rxfifo = MXC_SPI_GET_RXFIFO(obj->index);
+    obj->txfifo = MXC_SPI_GET_TXFIFO(obj->index);
+
+    // Configure the pins
+    pinmap_pinout(mosi, PinMap_SPI_MOSI);
+    pinmap_pinout(miso, PinMap_SPI_MISO);
+    pinmap_pinout(sclk, PinMap_SPI_SCLK);
+    pinmap_pinout(ssel, PinMap_SPI_SSEL);
+
+    // Enable SPI and FIFOs
+    obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
+                          MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
+                          MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
+
+    // Give instance the default settings
+    spi_format(obj, DEFAULT_CHAR, DEFAULT_MODE, 0);
+    spi_frequency(obj, DEFAULT_FREQ);
+}
+
+//******************************************************************************
+void spi_format(spi_t *obj, int bits, int mode, int slave)
+{
+    // Check the validity of the inputs
+    MBED_ASSERT(((bits >= 1) && (bits <= 32)) && ((mode >= 0) && (mode <= 3)));
+
+    // Only supports master mode
+    MBED_ASSERT(!slave);
+
+    // Save formatting data
+    spi_bits = bits;
+
+    // Set the mode
+    obj->spi->mstr_cfg &= ~(MXC_F_SPI_MSTR_CFG_SPI_MODE);
+    obj->spi->mstr_cfg |= (mode << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS);
+}
+
+//******************************************************************************
+void spi_frequency(spi_t *obj, int hz)
+{
+    // Maximum frequency is half the system frequency
+    MBED_ASSERT((unsigned int)hz < (SystemCoreClock / 2));
+    unsigned clocks = ((SystemCoreClock/2)/(hz));
+
+    // Figure out the divider ratio
+    int clk_div = 1;
+    while(clk_div < 10) {
+        if(clocks < 0x10) {
+            break;
+        }
+        clk_div++;
+        clocks = clocks >> 1;
+    }
+
+    // Turn on the SPI clock
+    if(obj->index == 0) {
+        MXC_CLKMAN->clk_ctrl_3_spi0 = clk_div;
+    } else if(obj->index == 1) {
+        MXC_CLKMAN->clk_ctrl_4_spi1 = clk_div;
+    } else if(obj->index == 2) {
+        MXC_CLKMAN->clk_ctrl_5_spi2 = clk_div;
+    } else {
+        MBED_ASSERT(0);
+    }
+
+    // Set the number of clocks to hold sclk high and low
+    MXC_SET_FIELD(&obj->spi->mstr_cfg, (MXC_F_SPI_MSTR_CFG_SCK_HI_CLK | MXC_F_SPI_MSTR_CFG_SCK_LO_CLK),
+        ((clocks << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS) | (clocks << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS)));
+}
+
+//******************************************************************************
+int spi_master_write(spi_t *obj, int value)
+{
+    int bits = spi_bits;
+    if(spi_bits == 32) {
+        bits = 0;
+    }
+    // Create the header
+    uint16_t header = ((0x3 << MXC_F_SPI_FIFO_DIR_POS ) |  // TX and RX
+                       (0x0 << MXC_F_SPI_FIFO_UNIT_POS) | // Send bits
+                       (bits << MXC_F_SPI_FIFO_SIZE_POS) | // Number of units
+                       (0x1 << MXC_F_SPI_FIFO_DASS_POS));      // Deassert SS
+
+    // Send the message header
+    obj->txfifo->txfifo_16 = header;
+
+    // Send the data
+    if(spi_bits < 17) {
+        obj->txfifo->txfifo_16 = (uint16_t)value;
+    } else {
+        obj->txfifo->txfifo_32 = (uint32_t)value;
+    }
+
+    // Get the data
+    bits = spi_bits;
+    int result = 0;
+    int i = 0;
+    while(bits > 0) {
+        // Wait for data
+        while(((obj->spi->fifo_ctrl & MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED)
+                >> MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS) < 1) {}
+
+        result |= (obj->rxfifo->rxfifo_8 << (i++*8));
+        bits-=8;
+    }
+
+    return result;
+}
+
+//******************************************************************************
+int spi_busy(spi_t *obj)
+{
+    return !(obj->spi->intfl & MXC_F_SPI_INTFL_TX_READY);
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
new file mode 100644
index 0000000000..b129ae5b69
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
@@ -0,0 +1,261 @@
+/*******************************************************************************
+ * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+ 
+#include "mbed_error.h"
+#include "us_ticker_api.h"
+#include "PeripheralNames.h"
+#include "tmr_regs.h"
+
+#define US_TIMER        MXC_TMR0
+#define US_TIMER_IRQn   TMR0_IRQn
+
+static int us_ticker_inited = 0;
+static uint32_t ticks_per_us;
+static uint32_t tick_win;
+static volatile uint64_t current_cnt;   // Hold the current ticks
+static volatile uint64_t event_cnt;     // Holds the value of the next event
+
+#define ticks_to_us(ticks)  ((ticks) / ticks_per_us);
+#define MAX_TICK_VAL    ((uint64_t)0xFFFFFFFF * ticks_per_us)
+
+//******************************************************************************
+static inline void inc_current_cnt(uint32_t inc) {
+
+    // Overflow the ticker when the us ticker overflows
+    current_cnt += inc;
+    if(current_cnt > MAX_TICK_VAL) {
+        current_cnt -= (MAX_TICK_VAL + 1);
+    }
+}
+
+//******************************************************************************
+static inline int event_passed(uint64_t current, uint64_t event) {
+
+    // Determine if the event has already happened.
+    // If the event is behind the current ticker, within a window,
+    // then the event has already happened.
+    if(((current < tick_win) && ((event < current) || 
+        (event > (MAX_TICK_VAL - (tick_win - current))))) || 
+        ((event < current) && (event > (current - tick_win)))) {
+        return 1;
+    }
+
+    return 0;
+}
+
+//******************************************************************************
+static inline uint64_t event_diff(uint64_t current, uint64_t event) {
+
+    // Check to see if the ticker will overflow before the event
+    if(current <= event) {
+        return (event - current);
+    }
+
+    return ((MAX_TICK_VAL - current) + event);
+}
+
+//******************************************************************************
+static void tmr_handler(void)
+{
+    uint32_t term_cnt32 = US_TIMER->term_cnt32;
+    US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
+    US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
+    NVIC_ClearPendingIRQ(US_TIMER_IRQn);
+
+    inc_current_cnt(term_cnt32);
+
+    if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
+        // the timestamp has expired
+        event_cnt = -1;                   // reset to max value
+        us_ticker_irq_handler();
+    } else {
+
+        uint64_t diff = event_diff(current_cnt, event_cnt);
+        if (diff < (uint64_t)0xFFFFFFFF) {
+            // the event occurs before the next overflow
+            US_TIMER->term_cnt32 = diff;
+
+            // Since the timer keeps counting after the terminal value is reached, it is possible that the new
+            // terminal value is in the past.    
+            if (US_TIMER->term_cnt32 < US_TIMER->count32) {
+                // the timestamp has expired
+                US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
+                US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
+                NVIC_ClearPendingIRQ(US_TIMER_IRQn);
+                event_cnt = -1;                   // reset to max value
+                us_ticker_irq_handler();
+            }
+        }
+    }
+}
+
+//******************************************************************************
+void us_ticker_init(void)
+{
+    if (us_ticker_inited)
+        return;
+    us_ticker_inited = 1;
+
+    current_cnt = 0;
+    event_cnt = -1;       // initialize to max value
+
+    if (SystemCoreClock <= 1000000) {
+        error("us_ticker cannot operate at this SystemCoreClock");
+        return;
+    }
+
+    // Configure timer for 32-bit continuous mode with /1 prescaler
+    US_TIMER->ctrl = MXC_E_TMR_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS | (0 << MXC_F_TMR_CTRL_PRESCALE_POS);
+    ticks_per_us = SystemCoreClock / 1000000;
+
+    // Set the tick window to 10ms
+    tick_win = SystemCoreClock/100;
+
+    // Set timer overflow to the max
+    US_TIMER->term_cnt32 = 0xFFFFFFFF;
+    US_TIMER->pwm_cap32 = 0xFFFFFFFF;
+    US_TIMER->count32 = 0;
+
+    US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear pending interrupts
+
+    NVIC_SetVector(US_TIMER_IRQn, (uint32_t)tmr_handler);
+    NVIC_EnableIRQ(US_TIMER_IRQn);
+
+    US_TIMER->inten |= MXC_F_TMR_INTEN_TIMER0;  // enable interrupts
+    US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0;   // enable timer
+}
+
+//******************************************************************************
+void us_ticker_deinit(void)
+{
+    US_TIMER->ctrl = 0;     // disable timer
+    US_TIMER->inten = 0;    // disable interrupts
+    US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupts
+    us_ticker_inited = 0;
+}
+
+//******************************************************************************
+uint32_t us_ticker_read(void)
+{
+    uint64_t current_cnt1, current_cnt2;
+    uint32_t term_cnt, tmr_cnt;
+    int intfl1, intfl2;
+
+    if (!us_ticker_inited)
+        us_ticker_init();
+
+    // Ensure coherency between current_cnt and US_TIMER->count32
+    do {
+        current_cnt1 = current_cnt;
+        intfl1 = US_TIMER->intfl;
+        term_cnt = US_TIMER->term_cnt32;
+        tmr_cnt = US_TIMER->count32;
+        intfl2 = US_TIMER->intfl;
+        current_cnt2 = current_cnt;
+    } while ((current_cnt1 != current_cnt2) || (intfl1 != intfl2));
+
+    if (intfl1) {
+        current_cnt1 += term_cnt;
+    }
+
+    current_cnt1 += tmr_cnt;
+
+    return (current_cnt1 / ticks_per_us);
+}
+
+//******************************************************************************
+void us_ticker_set_interrupt(timestamp_t timestamp)
+{
+    // Note: interrupts are disabled before this function is called.
+    US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0;  // disable timer
+
+    if (US_TIMER->intfl) {
+        US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
+        NVIC_ClearPendingIRQ(US_TIMER_IRQn);
+        inc_current_cnt(US_TIMER->term_cnt32);
+    }
+
+    // add and reset the current count value
+    inc_current_cnt(US_TIMER->count32);
+    US_TIMER->count32 = 0;
+
+    // add the number of cycles that the timer is disabled here for 
+    inc_current_cnt(200);
+
+    event_cnt = (uint64_t)timestamp * ticks_per_us;
+
+    // Check to see if the event has already passed
+    if (!event_passed(current_cnt, event_cnt)) {
+        uint64_t diff = event_diff(current_cnt, event_cnt);
+        if (diff < (uint64_t)0xFFFFFFFF) {
+            // the event occurs before the next overflow
+            US_TIMER->term_cnt32 = diff;
+        } else {
+            // the event occurs after the next overflow 
+            US_TIMER->term_cnt32 = 0xFFFFFFFF;  // set to max
+        }
+    } else {
+        // the requested timestamp occurs in the past
+        // set the timer up to immediately expire
+        US_TIMER->term_cnt32 = 1;
+    }
+    US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0;   // enable timer
+}
+
+//******************************************************************************
+void us_ticker_disable_interrupt(void)
+{
+    // There are no more events, set timer overflow to the max
+    US_TIMER->term_cnt32 = 0xFFFFFFFF;
+}
+
+//******************************************************************************
+void us_ticker_clear_interrupt(void)
+{
+    // cleared in the local handler
+}
+
+//******************************************************************************
+void us_ticker_set(timestamp_t timestamp)
+{
+    US_TIMER->ctrl &= ~MXC_F_TMR_CTRL_ENABLE0;  // disable timer
+    current_cnt = (uint64_t)timestamp * ticks_per_us;
+    US_TIMER->count32 = 0;
+    US_TIMER->term_cnt32 = 0xFFFFFFFF;
+    US_TIMER->ctrl |= MXC_F_TMR_CTRL_ENABLE0;   // enable timer
+
+    if (((uint64_t)timestamp * ticks_per_us) >= event_cnt) {
+        // The next timestamp has elapsed. Trigger the interrupt to handle it.
+        NVIC_SetPendingIRQ(US_TIMER_IRQn);
+    }
+}
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
index 530046c741..23d72be0ee 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
@@ -301,7 +301,7 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
 #elif defined(TARGET_STM32F303RE)
 #define INITIAL_SP            (0x20010000UL)
 
-#elif defined(TARGET_MAX32610)
+#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
 #define INITIAL_SP            (0x20008000UL)
 
 #else
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
index 0b836cd419..f6c5de83c5 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
@@ -51,7 +51,7 @@
 #ifndef OS_TASKCNT
 #  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
    || defined(TARGET_KL46Z) || defined(TARGET_KL43Z)  || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
-   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610)
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
 #    define OS_TASKCNT         14
 #  elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
    || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
@@ -67,7 +67,7 @@
 #ifndef OS_SCHEDULERSTKSIZE
 #  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347)  || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
    || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
-   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610)
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
 #      define OS_SCHEDULERSTKSIZE    256
 #  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) \
    || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
@@ -168,7 +168,7 @@
 #elif defined(TARGET_STM32F401VC)
 #    define OS_CLOCK       84000000
 
-#elif defined(TARGET_MAX32610)
+#elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
 #    define OS_CLOCK       24000000
 
 #  else
diff --git a/libraries/tests/mbed/analog/main.cpp b/libraries/tests/mbed/analog/main.cpp
index 7af87699b0..88f65ef042 100644
--- a/libraries/tests/mbed/analog/main.cpp
+++ b/libraries/tests/mbed/analog/main.cpp
@@ -49,6 +49,10 @@ AnalogOut out(PA_4);
 AnalogIn in(PC_3);
 AnalogOut out(PA_5);
 
+#elif defined(TARGET_MAX32600MBED)
+AnalogIn in(AIN_7P);
+AnalogOut out(AOUT_DO);
+
 #else
 AnalogIn in(p17);
 AnalogOut out(p18);
diff --git a/libraries/tests/mbed/digitalin_digitalout/main.cpp b/libraries/tests/mbed/digitalin_digitalout/main.cpp
index 075744b2a1..08fc12b784 100644
--- a/libraries/tests/mbed/digitalin_digitalout/main.cpp
+++ b/libraries/tests/mbed/digitalin_digitalout/main.cpp
@@ -41,6 +41,10 @@ DigitalIn in(D0);
 DigitalOut out(TP3);
 DigitalIn in(TP4);
 
+#elif defined(TARGET_MAX32600MBED)
+DigitalOut out(P1_0);
+DigitalIn in(P4_7);
+
 #else
 DigitalOut out(p5);
 DigitalIn in(p25);
diff --git a/libraries/tests/mbed/digitalinout/main.cpp b/libraries/tests/mbed/digitalinout/main.cpp
index fafb415474..9335651769 100644
--- a/libraries/tests/mbed/digitalinout/main.cpp
+++ b/libraries/tests/mbed/digitalinout/main.cpp
@@ -41,6 +41,10 @@ DigitalInOut d2(D7);
 DigitalInOut d1(TP3);
 DigitalInOut d2(TP4);
 
+#elif defined(TARGET_MAX32600MBED)
+DigitalInOut d1(P1_0);
+DigitalInOut d2(P4_7);
+
 #else
 DigitalInOut d1(p5);
 DigitalInOut d2(p25);
diff --git a/libraries/tests/mbed/interruptin/main.cpp b/libraries/tests/mbed/interruptin/main.cpp
index 610c07b07d..53da68f5b6 100644
--- a/libraries/tests/mbed/interruptin/main.cpp
+++ b/libraries/tests/mbed/interruptin/main.cpp
@@ -62,7 +62,6 @@ void in_handler() {
 #define PIN_OUT    D1
 #define PIN_IN     D5
 
-
 #elif defined(TARGET_FF_ARDUINO)
 #define PIN_OUT    D0
 #define PIN_IN     D7
@@ -71,6 +70,10 @@ void in_handler() {
 #define PIN_OUT    P0_0
 #define PIN_IN     P0_1
 
+#elif defined(TARGET_MAX32600MBED)
+#define PIN_OUT    P1_0
+#define PIN_IN     P4_7
+
 #else
 #define PIN_IN      (p5)
 #define PIN_OUT     (p25)
diff --git a/libraries/tests/mbed/portinout/main.cpp b/libraries/tests/mbed/portinout/main.cpp
index 1a30f42561..22f2c66b3b 100644
--- a/libraries/tests/mbed/portinout/main.cpp
+++ b/libraries/tests/mbed/portinout/main.cpp
@@ -72,6 +72,15 @@
 #define P2_2    (1 << 1)
 #define PORT_2  Port1
 
+#elif defined(TARGET_MAX32600MBED)
+#define P1_1    (1 << 0)  // P1_0
+#define P1_2    (1 << 1)  // P1_1
+#define PORT_1  Port1
+
+#define P2_1    (1 << 7)  // P4_7
+#define P2_2    (1 << 6)  // P4_6
+#define PORT_2  Port4
+
 #elif defined(TARGET_NUCLEO_F030R8) || \
       defined(TARGET_NUCLEO_F070RB) || \
       defined(TARGET_NUCLEO_F072RB) || \
diff --git a/libraries/tests/mbed/portout/main.cpp b/libraries/tests/mbed/portout/main.cpp
index 3c30032493..cf8f4d2ba6 100644
--- a/libraries/tests/mbed/portout/main.cpp
+++ b/libraries/tests/mbed/portout/main.cpp
@@ -1,20 +1,29 @@
 #include "mbed.h"
 
 # if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088)
-#     define LED1   (1 << 18) // P1.18
-#     define LED2   (1 << 20) // P1.20
-#     define LED3   (1 << 21) // P1.21
-#     define LED4   (1 << 23) // P1.23
+#     define LED_PORT   Port1
+#     define LED1       (1 << 18) // P1.18
+#     define LED2       (1 << 20) // P1.20
+#     define LED3       (1 << 21) // P1.21
+#     define LED4       (1 << 23) // P1.23
 # elif defined(TARGET_LPC11U24) || defined(TARGET_LPC1114)
-#     define LED1   (1 <<  8) // P1.8
-#     define LED2   (1 <<  9) // P1.9
-#     define LED3   (1 << 10) // P1.10
-#     define LED4   (1 << 11) // P1.11
+#     define LED_PORT   Port1
+#     define LED1       (1 <<  8) // P1.8
+#     define LED2       (1 <<  9) // P1.9
+#     define LED3       (1 << 10) // P1.10
+#     define LED4       (1 << 11) // P1.11
 # elif defined(TARGET_MAXWSNENV)
+#     define LED_PORT   Port1
 #     define LED1   (1 <<  4) // P1.4
 #     define LED2   (1 <<  6) // P1.6
 #     define LED3   (1 <<  7) // P1.7
 #     define LED4   0
+# elif defined(TARGET_MAX32600MBED)
+#     define LED_PORT   Port7
+#     define LED1       (1 <<  0) // P7.0
+#     define LED2       (1 <<  6) // P7.6
+#     define LED3       (1 <<  4) // P7.4
+#     define LED4       0
 # endif
 
 #define LED_MASK    (LED1|LED2|LED3|LED4)
@@ -26,7 +35,7 @@ int mask[4] = {
     (LED3 | LED4)
 };
 
-PortOut ledport(Port1, LED_MASK);
+PortOut ledport(LED_PORT, LED_MASK);
 
 int main() {
     while (1) {
diff --git a/libraries/tests/mbed/portout_portin/main.cpp b/libraries/tests/mbed/portout_portin/main.cpp
index 222c3c414a..6fb02990e6 100644
--- a/libraries/tests/mbed/portout_portin/main.cpp
+++ b/libraries/tests/mbed/portout_portin/main.cpp
@@ -72,6 +72,15 @@
 #define P2_2    (1 << 1)
 #define PORT_2  Port1
 
+#elif defined(TARGET_MAX32600MBED)
+#define P1_1    (1 << 0)  // P1_0
+#define P1_2    (1 << 1)  // P1_1
+#define PORT_1  Port1
+
+#define P2_1    (1 << 7)  // P4_7
+#define P2_2    (1 << 6)  // P4_6
+#define PORT_2  Port4
+
 #elif defined(TARGET_NUCLEO_F030R8) || \
       defined(TARGET_NUCLEO_F070RB) || \
       defined(TARGET_NUCLEO_F072RB) || \
diff --git a/libraries/tests/mbed/pwm/main.cpp b/libraries/tests/mbed/pwm/main.cpp
index 99bb908b24..b7b3550098 100644
--- a/libraries/tests/mbed/pwm/main.cpp
+++ b/libraries/tests/mbed/pwm/main.cpp
@@ -157,6 +157,15 @@ int main() {
     printf("Initialize PWM on pin PD_12 with duty cycle: %.2f\n", result);
 
     notify_completion(result == value ? true : false);
+#elif defined(TARGET_MAX32600MBED)
+    PwmOut pwm_1(P1_2);
+    PwmOut pwm_2(P1_3);
+
+    pwm_1.write(0.75);
+    pwm_2.write(0.50);
+
+    printf("Initialize PWM on pin P1.2 with duty cycle: %.2f\n", pwm_1.read());
+    printf("Initialize PWM on pin P1.3 with duty cycle: %.2f\n", pwm_2.read());
 #else
 #error This test is not supported on this target.
 #endif
diff --git a/workspace_tools/export/gcc_arm_max32600mbed.tmpl b/workspace_tools/export/gcc_arm_max32600mbed.tmpl
new file mode 100644
index 0000000000..68a5847a58
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_max32600mbed.tmpl
@@ -0,0 +1,72 @@
+# This file was automagically generated by mbed.org. For more information, 
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN = 
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+############################################################################### 
+AS      = $(GCC_BIN)arm-none-eabi-as
+CC      = $(GCC_BIN)arm-none-eabi-gcc
+CPP     = $(GCC_BIN)arm-none-eabi-g++
+LD      = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE 	= $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m3 -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+  CC_FLAGS += -DDEBUG -O0
+else
+  CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex 
+
+clean:
+	rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+	$(AS) $(CPU) -o $@ $<
+
+.c.o:
+	$(CC)  $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99   $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+	$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+	$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+	$(SIZE) $@
+
+$(PROJECT).bin: $(PROJECT).elf
+	@$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+	@$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+	@$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+	$(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index 563158c495..6922b55455 100644
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -71,6 +71,7 @@ class GccArm(Exporter):
         'NUCLEO_L053R8',
         'NUCLEO_L073RZ',
         'DISCO_F334C8',
+        'MAX32600MBED',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
         'NUCLEO_L152RE',
diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py
index 021ad9c458..9271a1ebb1 100755
--- a/workspace_tools/export_test.py
+++ b/workspace_tools/export_test.py
@@ -168,6 +168,7 @@ if __name__ == '__main__':
             ('gcc_arm', 'NUCLEO_F411RE'),
             ('gcc_arm', 'DISCO_F429ZI'),
             ('gcc_arm', 'NUCLEO_F334R8'),
+            ('gcc_arm', 'MAX32600MBED'),
             ('gcc_arm', 'MTS_MDOT_F405RG'),
             ('gcc_arm', 'MTS_MDOT_F411RE'),
             ('gcc_arm', 'RZ_A1H'),
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index facd822090..597fc72e81 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -1113,6 +1113,15 @@ class MAXWSNENV(Target):
         self.supported_toolchains = ["GCC_ARM", "IAR", "ARM"]
         self.default_toolchain = "ARM"
 
+class MAX32600MBED(Target):
+    def __init__(self):
+        Target.__init__(self)
+        self.core = "Cortex-M3"
+        self.extra_labels = ['Maxim', 'MAX32600']
+        self.macros = ['__SYSTEM_HFX=24000000']
+        self.supported_toolchains = ["GCC_ARM", "IAR", "ARM"]
+        self.default_toolchain = "ARM"
+
 # Get a single instance for each target
 TARGETS = [
 
@@ -1224,6 +1233,7 @@ TARGETS = [
 
     ### Maxim Integrated ###
     MAXWSNENV(),
+    MAX32600MBED(),
 ]
 
 # Map each target name to its unique instance
diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py
index 34f9d0c7d8..55c326cae2 100644
--- a/workspace_tools/tests.py
+++ b/workspace_tools/tests.py
@@ -48,6 +48,7 @@ Wiring:
       * KL25Z: (PTA5<-> PTC6)
       * NUCLEO_F103RB: (PC_6 <-> PB_8)
       * MAXWSNENV: (TP3 <-> TP4)
+      * MAX32600MBED: (P1_0 <-> P4_7)
 
   * port_loop (Port(In|Out|InOut)):
       * Arduino headers: (D0 <-> D7), (D1 <-> D6)
@@ -55,6 +56,7 @@ Wiring:
       * KL25Z: (PTA5 <-> PTC6), (PTA4 <-> PTC5)
       * NUCLEO_F103RB: (PC_6 <-> PB_8), (PC_5 <-> PB_9)
       * MAXWSNENV: (TP1 <-> TP3), (TP2 <-> TP4)
+      * MAX32600MBED: (P1_0 <-> P4_7), (P1_1 <-> P4_6)
 
   * analog_loop (AnalogIn, AnalogOut):
       * Arduino headers: (A0 <-> A5)
@@ -139,7 +141,7 @@ TESTS = [
         "mcu": ["LPC1768", "LPC2368", "KL25Z", "K64F", "K22F", "LPC4088", "LPC1549",
                 "NUCLEO_F072RB", "NUCLEO_F091RC", "NUCLEO_F302R8", "NUCLEO_F303RE",
                 "NUCLEO_F334R8", "NUCLEO_L053R8", "NUCLEO_L073RZ", "NUCLEO_L152RE",
-                "NUCLEO_F411RE","DISCO_F407VG","ARCH_MAX"]
+                "NUCLEO_F411RE", "DISCO_F407VG", "ARCH_MAX", "MAX32600MBED"]
     },
     {
         "id": "MBED_A9", "description": "Serial Echo at 115200",
@@ -616,7 +618,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_2", "description": "Mutex resource lock",
@@ -629,7 +631,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_3", "description": "Semaphore resource lock",
@@ -642,7 +644,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_4", "description": "Signals messaging",
@@ -654,7 +656,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_5", "description": "Queue messaging",
@@ -666,7 +668,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_6", "description": "Mail messaging",
@@ -678,7 +680,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_7", "description": "Timer",
@@ -692,7 +694,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_8", "description": "ISR (Queue)",
@@ -704,7 +706,7 @@ TESTS = [
                 "RZ_A1H", "DISCO_F407VG", "DISCO_F429ZI", "NUCLEO_F411RE",
                 "NUCLEO_F401RE", "NUCLEO_F334R8", "DISCO_F334C8", "NUCLEO_F302R8",
                 "NUCLEO_L053R8", "DISCO_L053C8", "NUCLEO_L073RZ", "NUCLEO_F072RB", "NUCLEO_F091RC",
-                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV"],
+                "DISCO_F401VC", "NUCLEO_F303RE", "MAXWSNENV", "MAX32600MBED"],
     },
     {
         "id": "RTOS_9", "description": "SD File write-read",

From a14683a62a4127fa7ec2eafc21eab5e8f60a91a0 Mon Sep 17 00:00:00 2001
From: Kevin Gillespie <kevin.gillespie@maximintegrated.com>
Date: Tue, 14 Apr 2015 10:07:21 -0500
Subject: [PATCH 21/45] [MAXWSNENV] Adjusting hal analog.

---
 .../hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c | 13 ++++++++-----
 .../TARGET_Maxim/TARGET_MAX32610/analogout_api.c    |  3 +--
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c
index 2d64a187e0..e7d89bb6f2 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogin_api.c
@@ -38,11 +38,11 @@
 #include "afe_regs.h"
 #include "PeripheralPins.h"
 
-#define PGA_TRK_CNT     0x8
+#define PGA_TRK_CNT     0x1F
 #define ADC_ACT_CNT     0x1
 #define ADC_PGA_CNT     0x1
 #define ADC_ACQ_CNT     0x1
-#define ADC_SLP_CNT     0x0
+#define ADC_SLP_CNT     0x1
  
 //******************************************************************************
 void analogin_init(analogin_t *obj, PinName pin)
@@ -100,6 +100,12 @@ uint16_t analogin_read_u16(analogin_t *obj)
         mux_pos = (obj->adc_pin & 0xF) + 8;
     }
 
+    // Reset the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_RST;
+
+    // Enable the ADC
+    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
+
     // Setup the ADC clock
     MXC_SET_FIELD(&obj->adc->ctrl0, (MXC_F_ADC_CTRL0_ADC_MODE | MXC_F_ADC_CTRL0_AVG_MODE |
         MXC_F_ADC_CTRL0_ADC_CLK_MODE | MXC_F_ADC_CTRL0_ADC_BI_POL),
@@ -119,9 +125,6 @@ uint16_t analogin_read_u16(analogin_t *obj)
         (MXC_F_AFE_CTRL1_REF_ADC_POWERUP | MXC_F_AFE_CTRL1_REF_BLK_POWERUP |
         (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS)));
 
-    // Enable the ADC
-    obj->adc->ctrl0 |= MXC_F_ADC_CTRL0_CPU_ADC_EN;
-
     // Clear the done bit
     obj->adc->intr = MXC_F_ADC_INTR_DONE_IF;
 
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c
index 00ca4e9936..c17b06e8b5 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c
@@ -183,8 +183,7 @@ void analogout_write_u16(dac_t *obj, uint16_t value)
         MXC_F_DAC_CTRL0_CLOCK_GATE_EN | MXC_F_DAC_CTRL0_CPU_START);
 
     if(obj->index < 2) {
-        // Convert 16 bits to 12 bits
-        obj->out = (value >> 4);
+        obj->out = (value);
         obj->dac_fifo->output_16 = (obj->out);
 
     } else {

From 5eb4894e7145a9ea49016a587eb70e1bac10671c Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Tue, 14 Apr 2015 13:39:29 -0500
Subject: [PATCH 22/45] Added skipped mbed library build reporting and removed
 unnecessary print

---
 workspace_tools/build_release.py              | 20 +++++++++++++++----
 .../library_build/build_report.html           |  7 ++++++-
 .../tests_build/build_report.html             |  7 ++++++-
 workspace_tools/test_api.py                   |  1 -
 4 files changed, 28 insertions(+), 7 deletions(-)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 37a8bdcc35..3acaaf1d53 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -108,6 +108,7 @@ if __name__ == '__main__':
     start = time()
     failures = []
     successes = []
+    skips = []
     build_report = []
     for target_name, toolchain_list in OFFICIAL_MBED_LIBRARY_BUILD:
         if options.official_only:
@@ -121,14 +122,21 @@ if __name__ == '__main__':
             toolchains = toolchainSet and set((options.toolchains).split(','))
 
 
-        cur_target_build_report = { "target": target_name, "passing": [], "failing": []}
+        cur_target_build_report = { "target": target_name, "passing": [], "failing": [], "skipped": []}
 
         for toolchain in toolchains:
             id = "%s::%s" % (target_name, toolchain)
             try:
-                build_mbed_libs(TARGET_MAP[target_name], toolchain, verbose=options.verbose, jobs=options.jobs)
-                successes.append(id)
-                cur_target_build_report["passing"].append({ "toolchain": toolchain })
+                built_mbed_lib = build_mbed_libs(TARGET_MAP[target_name], toolchain, verbose=options.verbose, jobs=options.jobs)
+
+                if built_mbed_lib:
+                    successes.append(id)
+                    cur_target_build_report["passing"].append({ "toolchain": toolchain })
+                else:
+                    skips.append(id)
+                    cur_target_build_report["skipped"].append({ "toolchain": toolchain })
+
+
             except Exception, e:
                 failures.append(id)
                 cur_target_build_report["failing"].append({ "toolchain": toolchain })
@@ -148,6 +156,10 @@ if __name__ == '__main__':
         print "\n\nBuild successes:"
         print "\n".join(["  * %s" % s for s in successes])
 
+    if skips:
+        print "\n\nBuild skips:"
+        print "\n".join(["  * %s" % s for s in skips])
+
     if failures:
         print "\n\nBuild failures:"
         print "\n".join(["  * %s" % f for f in failures])
diff --git a/workspace_tools/ci_templates/library_build/build_report.html b/workspace_tools/ci_templates/library_build/build_report.html
index 24283125a3..1b2b693884 100644
--- a/workspace_tools/ci_templates/library_build/build_report.html
+++ b/workspace_tools/ci_templates/library_build/build_report.html
@@ -8,7 +8,7 @@
       <span class="greenbold">[PASS]</span>
       {% endif %}
 
-      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}
+      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}, Skipped: {{report.skipped|length}}
     </a>
   </h3>
 
@@ -22,5 +22,10 @@
     {% with build = report.passing %}
     {% include 'library_build/build_report_table.html' %}
     {% endwith %}
+
+    <h4>Skipped</h4>
+    {% with build = report.skipped %}
+    {% include 'library_build/build_report_table.html' %}
+    {% endwith %}
   </div>
 </div>
diff --git a/workspace_tools/ci_templates/tests_build/build_report.html b/workspace_tools/ci_templates/tests_build/build_report.html
index 8b20d188cf..1e2ae7d5c9 100644
--- a/workspace_tools/ci_templates/tests_build/build_report.html
+++ b/workspace_tools/ci_templates/tests_build/build_report.html
@@ -8,7 +8,7 @@
       <span class="greenbold">[PASS]</span>
       {% endif %}
 
-      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}
+      {{report.target}} - Passing: {{report.passing|length}}, Failing: {{report.failing|length}}, Skipped: {{report.skipped|length}}
     </a>
   </h3>
 
@@ -22,5 +22,10 @@
     {% with build = report.passing %}
     {% include 'tests_build/build_report_table.html' %}
     {% endwith %}
+
+    <h4>Skipped</h4>
+    {% with build = report.skipped %}
+    {% include 'tests_build/build_report_table.html' %}
+    {% endwith %}
   </div>
 </div>
diff --git a/workspace_tools/test_api.py b/workspace_tools/test_api.py
index cf51683afc..f29fdd65e4 100644
--- a/workspace_tools/test_api.py
+++ b/workspace_tools/test_api.py
@@ -455,7 +455,6 @@ class SingleTestRunner(object):
 
                 except ToolException:
                     project_name_str = project_name if project_name is not None else test_id
-                    print "DIS BE MAH ERRRRR: %s" % (str(ToolException))
                     print self.logger.log_line(self.logger.LogType.ERROR, 'There were errors while building project %s'% (project_name_str))
                     build_report[toolchain]["test_build_failing"].append(test_id)
                     # return self.test_summary, self.shuffle_random_seed, self.test_summary_ext, self.test_suite_properties_ext

From 8dab8c4751106afd950e9b8b47af73b835987944 Mon Sep 17 00:00:00 2001
From: julbouln <jboulnois@gmail.com>
Date: Tue, 14 Apr 2015 20:57:56 +0200
Subject: [PATCH 23/45] Added USBMIDI tests + bugfix MIDI OUT

---
 libraries/USBDevice/USBMIDI/USBMIDI.cpp  | 16 ++++--
 libraries/tests/usb/device/midi/main.cpp | 63 +++++++++++++++++++++
 workspace_tools/host_tests/midi.py       | 72 ++++++++++++++++++++++++
 3 files changed, 147 insertions(+), 4 deletions(-)
 create mode 100644 workspace_tools/host_tests/midi.py

diff --git a/libraries/USBDevice/USBMIDI/USBMIDI.cpp b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
index 042f4f33d3..a46f9ae77d 100644
--- a/libraries/USBDevice/USBMIDI/USBMIDI.cpp
+++ b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
@@ -31,10 +31,10 @@ void USBMIDI::write(MIDIMessage m) {
     for(int p=1; p < m.length; p+=3) {
         uint8_t buf[4];
         // Midi message to USBMidi event packet
-        buf[0]=m.data[p] >> 4;
+        buf[0]=m.data[1] >> 4;
         // SysEx
         if(buf[0] == 0xF) {
-            if(p < m.length-1) {
+            if((m.length - p) > 3) {
                 // SysEx start or continue
                 buf[0]=0x4;
             } else {
@@ -55,8 +55,16 @@ void USBMIDI::write(MIDIMessage m) {
             }
         }
         buf[1]=m.data[p];
-        buf[2]=m.data[p+1];
-        buf[3]=m.data[p+2];
+
+        if(p+1 < m.length)
+            buf[2]=m.data[p+1];
+        else
+            buf[2]=0;
+
+        if(p+2 < m.length)
+            buf[3]=m.data[p+2];
+        else
+            buf[3]=0;
 
         USBDevice::write(EPBULK_IN, buf, 4, MAX_PACKET_SIZE_EPBULK);
     }
diff --git a/libraries/tests/usb/device/midi/main.cpp b/libraries/tests/usb/device/midi/main.cpp
index 6160215c30..b0a6cd381e 100644
--- a/libraries/tests/usb/device/midi/main.cpp
+++ b/libraries/tests/usb/device/midi/main.cpp
@@ -4,7 +4,70 @@
 USBMIDI midi;
 Serial pc(USBTX, USBRX);
 
+// MIDI IN
+void transmitMessage(MIDIMessage msg) {
+ 	switch (msg.type()) {
+        case MIDIMessage::NoteOnType:
+        	wait(0.1);
+			midi.write(MIDIMessage::NoteOn(msg.key()));
+            break;
+        case MIDIMessage::NoteOffType:
+        	wait(0.1);
+			midi.write(MIDIMessage::NoteOff(msg.key()));
+            break;
+        case MIDIMessage::ProgramChangeType:
+        	wait(0.1);
+        	midi.write(MIDIMessage::ProgramChange(msg.program()));
+            break;
+        case MIDIMessage::SysExType:
+        	wait(0.1);
+        	unsigned char tmp[64];
+            for(int i=0;i<msg.length-1;i++) {
+	            tmp[i]=msg.data[i+1];
+            }
+            midi.write(MIDIMessage::SysEx(tmp,msg.length-1));
+            break;
+        default:
+            break;
+    }    
+}
+
 int main(void)
 {
+	wait(5);
+	// MIDI OUT
+
+	// set piano
+	midi.write(MIDIMessage::ProgramChange(1));
+	wait(0.1);
+
+	// play A
+	midi.write(MIDIMessage::NoteOn(21));
+	wait(0.1);
+	midi.write(MIDIMessage::NoteOff(21));
+	wait(0.1);
+
+	// GM reset
+	unsigned char gm_reset[]={0xF0,0x7E,0x7F,0x09,0x01,0xF7};
+	midi.write(MIDIMessage::SysEx(gm_reset,6));
+	wait(0.1);
+
+	// GM Master volume max
+	unsigned char gm_master_vol_max[]={0xF0,0x7F,0x7F,0x04,0x01,0x7F,0x7F,0xF7};
+	midi.write(MIDIMessage::SysEx(gm_master_vol_max,8));
+	wait(0.1);
+
+	// GS reset
+	unsigned char gs_reset[]={0xF0,0x41,0x10,0x42,0x12,0x40,0x00,0x7F,0x00,0x41,0xF7};
+	midi.write(MIDIMessage::SysEx(gs_reset,11));
+	wait(0.1);
+
+	// GS Master volume max
+	unsigned char gs_master_vol_max[]={0xF0,0x41,0x10,0x42,0x12,0x40,0x00,0x04,0x7F,0x3D,0xF7};
+	midi.write(MIDIMessage::SysEx(gs_master_vol_max,11));
+	wait(0.1);
+
+	midi.attach(transmitMessage);
+
     while(1);
 }
diff --git a/workspace_tools/host_tests/midi.py b/workspace_tools/host_tests/midi.py
new file mode 100644
index 0000000000..67f34ea6f8
--- /dev/null
+++ b/workspace_tools/host_tests/midi.py
@@ -0,0 +1,72 @@
+from __future__ import print_function
+import sys
+import re
+import time
+import mido
+from mido import Message
+
+
+def test_midi_in(port):
+	expected_messages_count=0
+	while expected_messages_count < 7:
+		for message in port.iter_pending():
+			if message.type in ('note_on', 'note_off', 'program_change', 'sysex'):
+				yield message
+				expected_messages_count+=1
+		time.sleep(0.1)
+
+def test_midi_loopback(input_port):
+	expected_messages_count=0
+	while expected_messages_count < 1:
+		for message in input_port.iter_pending():
+			print('Test MIDI OUT loopback received {}'.format(message.hex()))
+			expected_messages_count+=1
+
+def test_midi_out_loopback(output_port,input_port):
+	print("Test MIDI OUT loopback")
+	output_port.send(Message('program_change', program=1))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('note_on', note=21))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('note_off', note=21))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('sysex', data=[0x7E,0x7F,0x09,0x01]))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('sysex', data=[0x7F,0x7F,0x04,0x01,0x7F,0x7F]))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('sysex', data=[0x41,0x10,0x42,0x12,0x40,0x00,0x7F,0x00,0x41]))
+	test_midi_loopback(input_port)
+
+	output_port.send(Message('sysex', data=[0x41,0x10,0x42,0x12,0x40,0x00,0x04,0x7F,0x3D]))
+	test_midi_loopback(input_port)
+
+portname=""
+
+while portname=="":
+	print("Wait for MIDI IN plug ...")
+	for name in mido.get_input_names():
+		matchObj = re.match( r'Mbed', name)
+
+		if matchObj:
+			portname=name
+	time.sleep( 1 )
+
+try:
+	input_port = mido.open_input(portname)
+	output_port = mido.open_output(portname)
+	
+	print('Using {}'.format(input_port))
+
+	print("Test MIDI IN")
+
+	for message in test_midi_in(input_port):
+		print('Test MIDI IN received {}'.format(message.hex()))
+
+	test_midi_out_loopback(output_port,input_port)
+except KeyboardInterrupt:
+    pass
\ No newline at end of file

From ec8ac75e8849ee73a762863ce9760018241ab0f7 Mon Sep 17 00:00:00 2001
From: bsilvereagle <bsilvereagle@gmail.com>
Date: Wed, 15 Apr 2015 09:11:39 -0400
Subject: [PATCH 24/45] Replaced SPI pin definitions for K64F in SD tests

The old pin definitions were all for Port D pins, which are incorrect. These improper pin mappings caused all tests to fail.

Pin definitions were replaced with the definitions as stated here -
http://developer.mbed.org/media/uploads/sam_grove/xk64f_sensors.jpg.pagespeed.ic.RCpM8talCK.webp

Tests now pass on the K64F Sch Rev D1
---
 libraries/tests/mbed/sd/main.cpp              | 2 +-
 libraries/tests/mbed/sd_perf_fatfs/main.cpp   | 2 +-
 libraries/tests/mbed/sd_perf_fhandle/main.cpp | 2 +-
 libraries/tests/mbed/sd_perf_stdio/main.cpp   | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/libraries/tests/mbed/sd/main.cpp b/libraries/tests/mbed/sd/main.cpp
index eb23347c99..2d1b5a19cf 100644
--- a/libraries/tests/mbed/sd/main.cpp
+++ b/libraries/tests/mbed/sd/main.cpp
@@ -9,7 +9,7 @@ SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
 
 #elif defined(TARGET_K64F)
-SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
+SDFileSystem sd(PTE3, PTE1, PTE2, PTE4, "sd");
 
 #elif defined(TARGET_K22F)
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
diff --git a/libraries/tests/mbed/sd_perf_fatfs/main.cpp b/libraries/tests/mbed/sd_perf_fatfs/main.cpp
index 5b5e83b953..6e95fec97a 100644
--- a/libraries/tests/mbed/sd_perf_fatfs/main.cpp
+++ b/libraries/tests/mbed/sd_perf_fatfs/main.cpp
@@ -11,7 +11,7 @@ SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
 
 #elif defined(TARGET_K64F)
-SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
+SDFileSystem sd(PTE3, PTE1, PTE2, PTE4, "sd");
 
 #elif defined(TARGET_K22F)
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
diff --git a/libraries/tests/mbed/sd_perf_fhandle/main.cpp b/libraries/tests/mbed/sd_perf_fhandle/main.cpp
index 5d16b71b4d..209c948145 100644
--- a/libraries/tests/mbed/sd_perf_fhandle/main.cpp
+++ b/libraries/tests/mbed/sd_perf_fhandle/main.cpp
@@ -11,7 +11,7 @@ SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
 
 #elif defined(TARGET_K64F)
-SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
+SDFileSystem sd(PTE3, PTE1, PTE2, PTE4, "sd");
 
 #elif defined(TARGET_K22F)
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
diff --git a/libraries/tests/mbed/sd_perf_stdio/main.cpp b/libraries/tests/mbed/sd_perf_stdio/main.cpp
index c7ee9f35a0..46c14bcb66 100644
--- a/libraries/tests/mbed/sd_perf_stdio/main.cpp
+++ b/libraries/tests/mbed/sd_perf_stdio/main.cpp
@@ -11,7 +11,7 @@ SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
 
 #elif defined(TARGET_K64F)
-SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
+SDFileSystem sd(PTE3, PTE1, PTE2, PTE4, "sd");
 
 #elif defined(TARGET_K22F)
 SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");

From 250ce08712cabb52d7136bb4dfd3e0db6a83782f Mon Sep 17 00:00:00 2001
From: porkybrain <holmes.odin@gmail.com>
Date: Wed, 15 Apr 2015 17:07:40 +0200
Subject: [PATCH 25/45] Changed CircBuffer to take its size as a template
 parameters. This results in smaller code size and less ram usage because the
 optimizer knows the size at compile time and it does not need to be stored in
 ram. It should also be faster because there is no indirection to the heap. I
 have not tested this code!

---
 libraries/USBDevice/USBSerial/CircBuffer.h | 21 +++++----------------
 libraries/USBDevice/USBSerial/USBSerial.h  |  4 ++--
 2 files changed, 7 insertions(+), 18 deletions(-)

diff --git a/libraries/USBDevice/USBSerial/CircBuffer.h b/libraries/USBDevice/USBSerial/CircBuffer.h
index 78d5eecc6c..b784a72019 100644
--- a/libraries/USBDevice/USBSerial/CircBuffer.h
+++ b/libraries/USBDevice/USBSerial/CircBuffer.h
@@ -19,20 +19,9 @@
 #ifndef CIRCBUFFER_H
 #define CIRCBUFFER_H
 
-template <class T>
+template <class T, int Size>
 class CircBuffer {
 public:
-    CircBuffer(int length) {
-        write = 0;
-        read = 0;
-        size = length + 1;
-        buf = (T *)malloc(size * sizeof(T));
-    };
-
-    ~CircBuffer() {
-        free(buf);
-     }
-
     bool isFull() {
         return ((write + 1) % size == read);
     };
@@ -64,10 +53,10 @@ public:
     };
 
 private:
-    volatile uint16_t write;
-    volatile uint16_t read;
-    uint16_t size;
-    T * buf;
+    volatile uint16_t write{0};				//in case older compilers are targeted this should be done in a constructor
+    volatile uint16_t read{0};
+    static constexpr int size{Size+1};
+    T buf[Size];
 };
 
 #endif
diff --git a/libraries/USBDevice/USBSerial/USBSerial.h b/libraries/USBDevice/USBSerial/USBSerial.h
index e83aea6b18..164cf9bc7d 100644
--- a/libraries/USBDevice/USBSerial/USBSerial.h
+++ b/libraries/USBDevice/USBSerial/USBSerial.h
@@ -56,7 +56,7 @@ public:
     * @param connect_blocking define if the connection must be blocked if USB not plugged in
     *
     */
-    USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking), buf(128){
+    USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking){
         settingsChangedCallback = 0;
     };
 
@@ -154,7 +154,7 @@ protected:
 
 private:
     FunctionPointer rx;
-    CircBuffer<uint8_t> buf;
+    CircBuffer<uint8_t,128> buf;
     void (*settingsChangedCallback)(int baud, int bits, int parity, int stop);
 };
 

From e34e16d31183128f2869d24a66fcb9e133e4febc Mon Sep 17 00:00:00 2001
From: Marcus Chang <marcus.chang@arm.com>
Date: Thu, 16 Apr 2015 13:27:49 +0100
Subject: [PATCH 26/45] Fixed interrupt handler in serial_api.c for the Nordic
 NRF51. The last byte sent in a sequence would not correctly clear the
 interrupt flag.

---
 .../TARGET_MCU_NRF51822/serial_api.c          | 41 ++++++++++++++-----
 1 file changed, 30 insertions(+), 11 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
index 8e3e8c34c7..4cf1819f60 100755
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
@@ -76,7 +76,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     obj->uart->TXD = 0;
 
     obj->index = 0;
-    
+
     obj->uart->PSELRTS = RTS_PIN_NUMBER;
     obj->uart->PSELTXD = tx; //TX_PIN_NUMBER;
     obj->uart->PSELCTS = CTS_PIN_NUMBER;
@@ -162,14 +162,20 @@ extern "C" {
 #endif
 void UART0_IRQHandler()
 {
-    uint32_t irtype = 0;
+    if((NRF_UART0->INTENSET & UART_INTENSET_TXDRDY_Msk) && NRF_UART0->EVENTS_TXDRDY)
+    {
+        uart_irq(1, 0);
 
-    if((NRF_UART0->INTENSET & 0x80) && NRF_UART0->EVENTS_TXDRDY) {
-        irtype = 1;
-    } else if((NRF_UART0->INTENSET & 0x04) && NRF_UART0->EVENTS_RXDRDY) {
-        irtype = 2;
+        /*  Explicitly clear TX flag to prevent interrupt from firing
+            immediately after returning from ISR. This ensures that the
+            last interrupt in a transmission sequence is correcly handled.
+        */
+        NRF_UART0->EVENTS_TXDRDY = 0;
+    }
+    else if((NRF_UART0->INTENSET & UART_INTENSET_RXDRDY_Msk) && NRF_UART0->EVENTS_RXDRDY)
+    {
+        uart_irq(2, 0);
     }
-    uart_irq(irtype, 0);
 }
 
 #ifdef __cplusplus
@@ -239,11 +245,24 @@ int serial_getc(serial_t *obj)
 
 void serial_putc(serial_t *obj, int c)
 {
-    while (!serial_writable(obj)) {
-    }
+    /*  In interrupt mode, send character immediately. Otherwise, block until
+        UART is ready to receive next character before sending.
 
-    obj->uart->EVENTS_TXDRDY = 0;
-    obj->uart->TXD = (uint8_t)c;
+        The TXDRDY flag is cleared in interrupt handler to ensure that it is
+        cleared even if there are no more characters to send.
+    */
+    if (NRF_UART0->INTENSET & UART_INTENSET_TXDRDY_Msk)
+    {
+        obj->uart->TXD = (uint8_t)c;
+    }
+    else
+    {
+        while (!serial_writable(obj)) {
+        }
+
+        obj->uart->EVENTS_TXDRDY = 0;
+        obj->uart->TXD = (uint8_t)c;
+    }
 }
 
 int serial_readable(serial_t *obj)

From cad87d11d4beb8d1b81f9d63cf86bbe9478d42d3 Mon Sep 17 00:00:00 2001
From: porkybrain <holmes.odin@gmail.com>
Date: Thu, 16 Apr 2015 15:57:30 +0200
Subject: [PATCH 27/45] moved initialization into constructor for compatibility
 with c++03

---
 libraries/USBDevice/USBSerial/CircBuffer.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/libraries/USBDevice/USBSerial/CircBuffer.h b/libraries/USBDevice/USBSerial/CircBuffer.h
index b784a72019..f581f9d2df 100644
--- a/libraries/USBDevice/USBSerial/CircBuffer.h
+++ b/libraries/USBDevice/USBSerial/CircBuffer.h
@@ -22,6 +22,7 @@
 template <class T, int Size>
 class CircBuffer {
 public:
+    CircBuffer():write(0), read(0){}
     bool isFull() {
         return ((write + 1) % size == read);
     };
@@ -53,9 +54,9 @@ public:
     };
 
 private:
-    volatile uint16_t write{0};				//in case older compilers are targeted this should be done in a constructor
-    volatile uint16_t read{0};
-    static constexpr int size{Size+1};
+    volatile uint16_t write;
+    volatile uint16_t read;
+    static const int size = Size+1;
     T buf[Size];
 };
 

From c48e5ea445697afb23a1e83a92aae940e00b10fe Mon Sep 17 00:00:00 2001
From: Odin Holmes <holmes.odin@gmail.com>
Date: Thu, 16 Apr 2015 17:39:18 +0200
Subject: [PATCH 28/45] Update CircBuffer.h

---
 libraries/USBDevice/USBSerial/CircBuffer.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/USBDevice/USBSerial/CircBuffer.h b/libraries/USBDevice/USBSerial/CircBuffer.h
index f581f9d2df..ea46bdfe6f 100644
--- a/libraries/USBDevice/USBSerial/CircBuffer.h
+++ b/libraries/USBDevice/USBSerial/CircBuffer.h
@@ -56,7 +56,7 @@ public:
 private:
     volatile uint16_t write;
     volatile uint16_t read;
-    static const int size = Size+1;
+    static const int size = Size+1;  //a modern optimizer should be able to remove this so it uses no ram.
     T buf[Size];
 };
 

From 72d62f783b162d69d116c001a9ca9750dbaa6d61 Mon Sep 17 00:00:00 2001
From: bsilvereagle <bsilvereagle@gmail.com>
Date: Thu, 16 Apr 2015 11:47:51 -0400
Subject: [PATCH 29/45] Mentioned the Contributor Agreement in Contributing.md

---
 CONTRIBUTING.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 5a588ed021..353cd58c0f 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -10,6 +10,8 @@ You can for example read more in our ```docs``` section in [mbedmicro/mbed/doc](
 # How to contribute
 We really appreciate your contributions! We are Open Source project and we need your help. We want to keep it as easy as possible to contribute changes that get things working in your environment. There are a few guidelines that we need contributors to follow so that we can have a chance of keeping on top of things.
 
+Before a pull request will be merged, the [mbed Contributor Agreement](http://developer.mbed.org/contributor_agreement/) must be signed.
+
 You can pick up existing [mbed GitHub Issue](https://github.com/mbedmicro/mbed/issues) and solve it or implement new feature you find important, attractive or just necessary. We will review your proposal via pull request mechanism, give you comments and merge your changes if we decide your contribution satisfy criteria such as quality.
 
 # Enhancements vs Bugs

From 2044135c1964265b26291c8e37ed5c56f35beb69 Mon Sep 17 00:00:00 2001
From: Kevin Gillespie <kevin.gillespie@maximintegrated.com>
Date: Thu, 9 Apr 2015 12:55:08 -0500
Subject: [PATCH 30/45] Adding export support for MAXWSNENV and MAX32600MBED.

---
 .../TARGET_MAX32600/system_max32600.c         |    2 +-
 .../TARGET_MAX32610/system_max32610.c         |    2 +-
 .../TARGET_MAX32600MBED/low_level_init.c      |    2 +-
 .../TARGET_MAX32600/gpio_irq_api.c            |    2 +-
 .../TARGET_Maxim/TARGET_MAX32600/us_ticker.c  |    6 +-
 .../TARGET_MAX32610/gpio_irq_api.c            |    2 +-
 .../TARGET_Maxim/TARGET_MAX32610/us_ticker.c  |    6 +-
 workspace_tools/export/gcc_arm_maxwsnenv.tmpl |   72 +
 workspace_tools/export/gccarm.py              |    1 +
 workspace_tools/export/iar.py                 |    2 +
 .../export/iar_max32600mbed.ewd.tmpl          | 1370 +++++++++++++++++
 .../export/iar_max32600mbed.ewp.tmpl          |  957 ++++++++++++
 workspace_tools/export/iar_maxwsnenv.ewd.tmpl | 1370 +++++++++++++++++
 workspace_tools/export/iar_maxwsnenv.ewp.tmpl |  957 ++++++++++++
 workspace_tools/export/uvision4.py            |    4 +-
 .../export/uvision4_max32600mbed.uvopt.tmpl   |  177 +++
 .../export/uvision4_max32600mbed.uvproj.tmpl  |  420 +++++
 .../export/uvision4_maxwsnenv.uvopt.tmpl      |  177 +++
 .../export/uvision4_maxwsnenv.uvproj.tmpl     |  420 +++++
 workspace_tools/export_test.py                |    6 +
 20 files changed, 5943 insertions(+), 12 deletions(-)
 create mode 100644 workspace_tools/export/gcc_arm_maxwsnenv.tmpl
 create mode 100644 workspace_tools/export/iar_max32600mbed.ewd.tmpl
 create mode 100644 workspace_tools/export/iar_max32600mbed.ewp.tmpl
 create mode 100644 workspace_tools/export/iar_maxwsnenv.ewd.tmpl
 create mode 100644 workspace_tools/export/iar_maxwsnenv.ewp.tmpl
 create mode 100644 workspace_tools/export/uvision4_max32600mbed.uvopt.tmpl
 create mode 100644 workspace_tools/export/uvision4_max32600mbed.uvproj.tmpl
 create mode 100644 workspace_tools/export/uvision4_maxwsnenv.uvopt.tmpl
 create mode 100644 workspace_tools/export/uvision4_maxwsnenv.uvproj.tmpl

diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
index 539f7ac5f4..5357f31b37 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c
@@ -109,7 +109,7 @@ void ICC_Enable(void)
 }
 
 // This function to be implemented by the hal
-extern void low_level_init();
+extern void low_level_init(void);
 
 void SystemInit(void)
 {
diff --git a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c
index 36a77b601d..6915b24338 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c
+++ b/libraries/mbed/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c
@@ -109,7 +109,7 @@ void ICC_Enable(void)
 }
 
 // This function to be implemented by the hal
-extern void low_level_init();
+extern void low_level_init(void);
 
 void SystemInit(void)
 {
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
index 0130c5f0a3..66dc6462eb 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/TARGET_MAX32600MBED/low_level_init.c
@@ -85,4 +85,4 @@ void low_level_init(void)
     /* Switch to the PLL */
     MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) |
                            ((MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2 << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS));
-}
\ No newline at end of file
+}
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
index d592319f86..f629079567 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/gpio_irq_api.c
@@ -117,7 +117,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName name, gpio_irq_handler handler, uint3
 
     /* enable the requested interrupt */
     MXC_GPIO->inten[port] |= (1 << pin);
-    NVIC_EnableIRQ(GPIO_P0_IRQn + port);
+    NVIC_EnableIRQ((IRQn_Type)((uint32_t)GPIO_P0_IRQn + port));
 
     return 0;
 }
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
index b129ae5b69..17690d5da4 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/us_ticker.c
@@ -96,7 +96,7 @@ static void tmr_handler(void)
 
     if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
         // the timestamp has expired
-        event_cnt = -1;                   // reset to max value
+        event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
         us_ticker_irq_handler();
     } else {
 
@@ -112,7 +112,7 @@ static void tmr_handler(void)
                 US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
                 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
                 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
-                event_cnt = -1;                   // reset to max value
+                event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
                 us_ticker_irq_handler();
             }
         }
@@ -127,7 +127,7 @@ void us_ticker_init(void)
     us_ticker_inited = 1;
 
     current_cnt = 0;
-    event_cnt = -1;       // initialize to max value
+    event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
 
     if (SystemCoreClock <= 1000000) {
         error("us_ticker cannot operate at this SystemCoreClock");
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c
index 4e153cd01a..083f064d9a 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/gpio_irq_api.c
@@ -118,7 +118,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName name, gpio_irq_handler handler, uint3
 
     /* enable the requested interrupt */
     MXC_GPIO->inten[port] |= (1 << pin);
-    NVIC_EnableIRQ(GPIO_P0_IRQn + port);
+    NVIC_EnableIRQ((IRQn_Type)((uint32_t)GPIO_P0_IRQn + port));
 
     return 0;
 }
diff --git a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c
index b129ae5b69..17690d5da4 100644
--- a/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/us_ticker.c
@@ -96,7 +96,7 @@ static void tmr_handler(void)
 
     if (event_passed(current_cnt + US_TIMER->count32, event_cnt )) {
         // the timestamp has expired
-        event_cnt = -1;                   // reset to max value
+        event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
         us_ticker_irq_handler();
     } else {
 
@@ -112,7 +112,7 @@ static void tmr_handler(void)
                 US_TIMER->term_cnt32 = 0xFFFFFFFF;  // reset to max value to prevent further interrupts
                 US_TIMER->intfl = (MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1);    // clear interrupt
                 NVIC_ClearPendingIRQ(US_TIMER_IRQn);
-                event_cnt = -1;                   // reset to max value
+                event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
                 us_ticker_irq_handler();
             }
         }
@@ -127,7 +127,7 @@ void us_ticker_init(void)
     us_ticker_inited = 1;
 
     current_cnt = 0;
-    event_cnt = -1;       // initialize to max value
+    event_cnt = 0xFFFFFFFFFFFFFFFFULL;  // reset to max value
 
     if (SystemCoreClock <= 1000000) {
         error("us_ticker cannot operate at this SystemCoreClock");
diff --git a/workspace_tools/export/gcc_arm_maxwsnenv.tmpl b/workspace_tools/export/gcc_arm_maxwsnenv.tmpl
new file mode 100644
index 0000000000..68a5847a58
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_maxwsnenv.tmpl
@@ -0,0 +1,72 @@
+# This file was automagically generated by mbed.org. For more information, 
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN = 
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+############################################################################### 
+AS      = $(GCC_BIN)arm-none-eabi-as
+CC      = $(GCC_BIN)arm-none-eabi-gcc
+CPP     = $(GCC_BIN)arm-none-eabi-g++
+LD      = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE 	= $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m3 -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+  CC_FLAGS += -DDEBUG -O0
+else
+  CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex 
+
+clean:
+	rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+	$(AS) $(CPU) -o $@ $<
+
+.c.o:
+	$(CC)  $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99   $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+	$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+	$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+	$(SIZE) $@
+
+$(PROJECT).bin: $(PROJECT).elf
+	@$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+	@$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+	@$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+	$(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index a0e642dde6..a803e1451b 100644
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -74,6 +74,7 @@ class GccArm(Exporter):
         'NUCLEO_L073RZ',
         'DISCO_F334C8',
         'MAX32600MBED',
+        'MAXWSNENV',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
         'NUCLEO_L152RE',
diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py
index d13cdc9473..a0ca0afcd6 100644
--- a/workspace_tools/export/iar.py
+++ b/workspace_tools/export/iar.py
@@ -60,6 +60,8 @@ class IAREmbeddedWorkbench(Exporter):
         'NUCLEO_L073RZ',
         'NUCLEO_L152RE',
         #'STM32F407', Fails to build same for GCC
+        'MAXWSNENV',
+        'MAX32600MBED',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
         'MTS_DRAGONFLY_F411RE',
diff --git a/workspace_tools/export/iar_max32600mbed.ewd.tmpl b/workspace_tools/export/iar_max32600mbed.ewd.tmpl
new file mode 100644
index 0000000000..c99d125078
--- /dev/null
+++ b/workspace_tools/export/iar_max32600mbed.ewd.tmpl
@@ -0,0 +1,1370 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>C-SPY</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>26</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCVariant</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>MemOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MemFile</name>
+          <state>$TOOLKIT_DIR$\CONFIG\debugger\Maxim\MAX32600x85.ddf</state>
+        </option>
+        <option>
+          <name>RunToEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RunToName</name>
+          <state>main</state>
+        </option>
+        <option>
+          <name>CExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDDFArgumentProducer</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCDownloadSuppressDownload</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDownloadVerifyAll</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCProductVersion</name>
+          <state>7.30.4.8186</state>
+        </option>
+        <option>
+          <name>OCDynDriverList</name>
+          <state>CMSISDAP_ID</state>
+        </option>
+        <option>
+          <name>OCLastSavedByProductVersion</name>
+          <state>7.30.4.8186</state>
+        </option>
+        <option>
+          <name>OCDownloadAttachToProgram</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>UseFlashLoader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CLowLevel</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacFile2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CDevice</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>FlashLoadersV3</name>
+          <state>$TOOLKIT_DIR$\config\flashloader\Maxim\FlashMAX32600x85.board</state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OverrideDefFlashBoard</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesOffset1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesUse1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDeviceConfigMacroFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDebuggerExtraOption</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCAllMTBOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreNrOfCores</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreMaster</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCMulticorePort</name>
+          <state>53461</state>
+        </option>
+        <option>
+          <name>OCMulticoreWorkspace</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveProject</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveConfiguration</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ARMSIM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCSimDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCSimEnablePSP</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspOverrideConfig</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspConfigFile</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ANGEL_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCAngelHeartbeat</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommunication</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommBaud</name>
+          <version>0</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CAngelCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ANGELTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoAngelLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AngelLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CMSISDAP_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPResetList</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>CMSISDAPDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceRadio</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CMSISDAPProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPSelectedCPUBehaviour</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>GDBSERVER_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARROM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CRomLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CRomCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomCommBaud</name>
+          <version>0</version>
+          <state>7</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IJET_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>5</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetResetList</name>
+          <version>1</version>
+          <state>10</state>
+        </option>
+        <option>
+          <name>IjetHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>IjetHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>IjetPowerFromProbe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetPowerRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>IjetInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetProtocolRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSwoPin</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>IjetSwoPrescalerList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IjetProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSelectedCPUBehaviour</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetPreferETB</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetTraceSettingsList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetTraceSizeList</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>JLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>15</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>JLinkSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCJLinkDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJLinkHWResetDelay</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>JLinkInitialSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCDoJlinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkCommRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>CCJLinkSpeedRadioV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCUSBDevice</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkResetList</name>
+          <version>6</version>
+          <state>5</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchMMERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchNOCPERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCHRERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchSTATERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchBUSERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchINTERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchHARDERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkUsbSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCTcpIpAlt</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTcpIpSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSourceDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkDeviceName</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>LMIFTDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>LmiftdiSpeed</name>
+          <state>500</state>
+        </option>
+        <option>
+          <name>CCLmiftdiDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiftdiLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>MACRAIGOR_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>3</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>jtag</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuSpeed</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>DoEmuMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuMultiTarget</name>
+          <state>0@ARM7TDMI</state>
+        </option>
+        <option>
+          <name>EmuHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CEmuCommBaud</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>CEmuCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>jtago</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>UnusedAddr</name>
+          <state>0x00800000</state>
+        </option>
+        <option>
+          <name>CCMacraigorHWResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>PEMICRO_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCPEMicroAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroInterfaceList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPEMicroJtagSpeed</name>
+          <state>#UNINITIALIZED#</state>
+        </option>
+        <option>
+          <name>CCJPEMicroShowSettings</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCPEMicroUSBDevice</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroSerialPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJPEMicroTCPIPAutoScanNetwork</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroTCPIP</name>
+          <state>10.0.0.1</state>
+        </option>
+        <option>
+          <name>CCPEMicroCommCmdLineProducer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>RDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CRDIDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CRDILogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRDILogFileEdit</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCRDIHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>STLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkResetList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>THIRDPARTY_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CThirdPartyDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>XDS100_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCXDS100AttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TIPackageOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>TIPackage</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCXds100InterfaceList</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>BoardFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+      </data>
+    </settings>
+    <debuggerPlugins>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+    </debuggerPlugins>
+  </configuration>
+</project>
+
+
diff --git a/workspace_tools/export/iar_max32600mbed.ewp.tmpl b/workspace_tools/export/iar_max32600mbed.ewp.tmpl
new file mode 100644
index 0000000000..be7d8093e3
--- /dev/null
+++ b/workspace_tools/export/iar_max32600mbed.ewp.tmpl
@@ -0,0 +1,957 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>22</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>5.10.5.252</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.30.1.7765</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>MAX32600x85	Maxim MAX32600x85</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          {% for s in symbols %}
+            <state>{{s}}</state>
+          {% endfor %}
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state>Pa050,Pa084,Pa093,Pa082</state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+        {% for path in include_paths %}
+          <state>$PROJ_DIR$\{{path}}</state>
+        {% endfor %}
+          <state></state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>{{name}}.bin</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cpp.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\{{linker_script}}</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state>--skip_dynamic_initialization</state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+        {% for library in libraries %}
+          <state>$PROJ_DIR$\{{library}}</state>
+        {% endfor %}
+        {% for object in object_files %}
+          <state>$PROJ_DIR$\{{object}}</state>
+        {% endfor %}
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  {{source_files}}
+</project>
diff --git a/workspace_tools/export/iar_maxwsnenv.ewd.tmpl b/workspace_tools/export/iar_maxwsnenv.ewd.tmpl
new file mode 100644
index 0000000000..c99d125078
--- /dev/null
+++ b/workspace_tools/export/iar_maxwsnenv.ewd.tmpl
@@ -0,0 +1,1370 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>C-SPY</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>26</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCVariant</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>MemOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MemFile</name>
+          <state>$TOOLKIT_DIR$\CONFIG\debugger\Maxim\MAX32600x85.ddf</state>
+        </option>
+        <option>
+          <name>RunToEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RunToName</name>
+          <state>main</state>
+        </option>
+        <option>
+          <name>CExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDDFArgumentProducer</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCDownloadSuppressDownload</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDownloadVerifyAll</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCProductVersion</name>
+          <state>7.30.4.8186</state>
+        </option>
+        <option>
+          <name>OCDynDriverList</name>
+          <state>CMSISDAP_ID</state>
+        </option>
+        <option>
+          <name>OCLastSavedByProductVersion</name>
+          <state>7.30.4.8186</state>
+        </option>
+        <option>
+          <name>OCDownloadAttachToProgram</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>UseFlashLoader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CLowLevel</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacFile2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CDevice</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>FlashLoadersV3</name>
+          <state>$TOOLKIT_DIR$\config\flashloader\Maxim\FlashMAX32600x85.board</state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OverrideDefFlashBoard</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesOffset1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesUse1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDeviceConfigMacroFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDebuggerExtraOption</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCAllMTBOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreNrOfCores</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreMaster</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCMulticorePort</name>
+          <state>53461</state>
+        </option>
+        <option>
+          <name>OCMulticoreWorkspace</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveProject</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveConfiguration</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ARMSIM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCSimDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCSimEnablePSP</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspOverrideConfig</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspConfigFile</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ANGEL_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCAngelHeartbeat</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommunication</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommBaud</name>
+          <version>0</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CAngelCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ANGELTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoAngelLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AngelLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CMSISDAP_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPResetList</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>CMSISDAPDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceRadio</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CMSISDAPProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPSelectedCPUBehaviour</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>GDBSERVER_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARROM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CRomLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CRomCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomCommBaud</name>
+          <version>0</version>
+          <state>7</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IJET_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>5</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetResetList</name>
+          <version>1</version>
+          <state>10</state>
+        </option>
+        <option>
+          <name>IjetHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>IjetHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>IjetPowerFromProbe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetPowerRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>IjetInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetProtocolRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSwoPin</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>IjetSwoPrescalerList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IjetProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSelectedCPUBehaviour</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetPreferETB</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetTraceSettingsList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetTraceSizeList</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>JLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>15</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>JLinkSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCJLinkDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJLinkHWResetDelay</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>JLinkInitialSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCDoJlinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkCommRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>CCJLinkSpeedRadioV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCUSBDevice</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkResetList</name>
+          <version>6</version>
+          <state>5</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchMMERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchNOCPERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCHRERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchSTATERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchBUSERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchINTERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchHARDERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkUsbSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCTcpIpAlt</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTcpIpSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSourceDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkDeviceName</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>LMIFTDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>LmiftdiSpeed</name>
+          <state>500</state>
+        </option>
+        <option>
+          <name>CCLmiftdiDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiftdiLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>MACRAIGOR_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>3</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>jtag</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuSpeed</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>DoEmuMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuMultiTarget</name>
+          <state>0@ARM7TDMI</state>
+        </option>
+        <option>
+          <name>EmuHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CEmuCommBaud</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>CEmuCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>jtago</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>UnusedAddr</name>
+          <state>0x00800000</state>
+        </option>
+        <option>
+          <name>CCMacraigorHWResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>PEMICRO_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCPEMicroAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroInterfaceList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPEMicroJtagSpeed</name>
+          <state>#UNINITIALIZED#</state>
+        </option>
+        <option>
+          <name>CCJPEMicroShowSettings</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCPEMicroUSBDevice</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroSerialPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJPEMicroTCPIPAutoScanNetwork</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroTCPIP</name>
+          <state>10.0.0.1</state>
+        </option>
+        <option>
+          <name>CCPEMicroCommCmdLineProducer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>RDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CRDIDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CRDILogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRDILogFileEdit</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCRDIHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>STLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkResetList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>THIRDPARTY_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CThirdPartyDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>XDS100_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCXDS100AttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TIPackageOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>TIPackage</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCXds100InterfaceList</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>BoardFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+      </data>
+    </settings>
+    <debuggerPlugins>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+    </debuggerPlugins>
+  </configuration>
+</project>
+
+
diff --git a/workspace_tools/export/iar_maxwsnenv.ewp.tmpl b/workspace_tools/export/iar_maxwsnenv.ewp.tmpl
new file mode 100644
index 0000000000..be7d8093e3
--- /dev/null
+++ b/workspace_tools/export/iar_maxwsnenv.ewp.tmpl
@@ -0,0 +1,957 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>22</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>5.10.5.252</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.30.1.7765</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>MAX32600x85	Maxim MAX32600x85</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          {% for s in symbols %}
+            <state>{{s}}</state>
+          {% endfor %}
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state>Pa050,Pa084,Pa093,Pa082</state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+        {% for path in include_paths %}
+          <state>$PROJ_DIR$\{{path}}</state>
+        {% endfor %}
+          <state></state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>{{name}}.bin</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cpp.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\{{linker_script}}</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state>--skip_dynamic_initialization</state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+        {% for library in libraries %}
+          <state>$PROJ_DIR$\{{library}}</state>
+        {% endfor %}
+        {% for object in object_files %}
+          <state>$PROJ_DIR$\{{object}}</state>
+        {% endfor %}
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  {{source_files}}
+</project>
diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
index 1ea95a91e2..1f1c053829 100644
--- a/workspace_tools/export/uvision4.py
+++ b/workspace_tools/export/uvision4.py
@@ -72,7 +72,9 @@ class Uvision4(Exporter):
         'NRF51_DONGLE',
         'SEEED_TINY_BLE',
         'LPC11U37H_401',
-		'DELTA_DFCM_NNN40',
+        'DELTA_DFCM_NNN40',
+        'MAXWSNENV',
+        'MAX32600MBED',
     ]
 
     USING_MICROLIB = [
diff --git a/workspace_tools/export/uvision4_max32600mbed.uvopt.tmpl b/workspace_tools/export/uvision4_max32600mbed.uvopt.tmpl
new file mode 100644
index 0000000000..2f5a7b5fa0
--- /dev/null
+++ b/workspace_tools/export/uvision4_max32600mbed.uvopt.tmpl
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>MAX32600MBED</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>24000000</CLKADS>
+      <OPTTT>
+        <gFlags></gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>8</CpuCode>
+      <DllOpt>
+        <SimDllName>SARMCM3.DLL</SimDllName>
+        <SimDllArguments></SimDllArguments>
+        <SimDlgDllName>DCM.DLL</SimDlgDllName>
+        <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+        <TargetDllName>SARMCM3.DLL</TargetDllName>
+        <TargetDllArguments></TargetDllArguments>
+        <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+        <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+      </DllOpt>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>src</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>8</FileType>
+      <tvExp>0</tvExp>
+      <Focus>0</Focus>
+      <ColumnNumber>0</ColumnNumber>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <TopLine>1</TopLine>
+      <CurrentLine>2</CurrentLine>
+      <bDave2>0</bDave2>
+      <PathWithFileName>main.cpp</PathWithFileName>
+      <FilenameWithoutPath>main.cpp</FilenameWithoutPath>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/workspace_tools/export/uvision4_max32600mbed.uvproj.tmpl b/workspace_tools/export/uvision4_max32600mbed.uvproj.tmpl
new file mode 100644
index 0000000000..638f80a2a1
--- /dev/null
+++ b/workspace_tools/export/uvision4_max32600mbed.uvproj.tmpl
@@ -0,0 +1,420 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
+
+  <Targets>
+    <Target>
+      <TargetName>MAX32600MBED</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>MAX32600</Device>
+          <Vendor>Maxim Integrated</Vendor>
+          <Cpu>IRAM(0x20000000, 0x8000) IROM(0, 0x40000) CLOCK(24000000) CPUTYPE("Cortex-M3")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>{{name}}</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin -o build\{{name}}_max32600.bin build\{{name}}.axf</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection></TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+            <Driver></Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll></UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection></DriverSelection>
+          </Flash1>
+          <bUseTDR>0</bUseTDR>
+          <Flash2></Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <VariousControls>
+              <MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
+              <Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
+              <Undefine></Undefine>
+              <IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x10000000</DataAddressRange>
+            <ScatterFile>{{scatter_file}}</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc>
+            {% for file in object_files %}
+              {{file}}
+            {% endfor %}
+            </Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        {% for group,files in source_files %}
+        <Group>
+          <GroupName>{{group}}</GroupName>
+          <Files>
+            {% for file in files %}
+            <File>
+              <FileName>{{file.name}}</FileName>
+              <FileType>{{file.type}}</FileType>
+              <FilePath>{{file.path}}</FilePath>
+              {%if file.type == "1" %}
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls>--c99</MiscControls>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+              {% endif %}
+            </File>
+          {% endfor %}
+          </Files>
+        </Group>
+        {% endfor %}
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>
diff --git a/workspace_tools/export/uvision4_maxwsnenv.uvopt.tmpl b/workspace_tools/export/uvision4_maxwsnenv.uvopt.tmpl
new file mode 100644
index 0000000000..9b10a4f775
--- /dev/null
+++ b/workspace_tools/export/uvision4_maxwsnenv.uvopt.tmpl
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>MAXWSNENV</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>24000000</CLKADS>
+      <OPTTT>
+        <gFlags></gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>8</CpuCode>
+      <DllOpt>
+        <SimDllName>SARMCM3.DLL</SimDllName>
+        <SimDllArguments></SimDllArguments>
+        <SimDlgDllName>DCM.DLL</SimDlgDllName>
+        <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+        <TargetDllName>SARMCM3.DLL</TargetDllName>
+        <TargetDllArguments></TargetDllArguments>
+        <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+        <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+      </DllOpt>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>src</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>8</FileType>
+      <tvExp>0</tvExp>
+      <Focus>0</Focus>
+      <ColumnNumber>0</ColumnNumber>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <TopLine>1</TopLine>
+      <CurrentLine>2</CurrentLine>
+      <bDave2>0</bDave2>
+      <PathWithFileName>main.cpp</PathWithFileName>
+      <FilenameWithoutPath>main.cpp</FilenameWithoutPath>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/workspace_tools/export/uvision4_maxwsnenv.uvproj.tmpl b/workspace_tools/export/uvision4_maxwsnenv.uvproj.tmpl
new file mode 100644
index 0000000000..8566a7ee91
--- /dev/null
+++ b/workspace_tools/export/uvision4_maxwsnenv.uvproj.tmpl
@@ -0,0 +1,420 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
+
+  <Targets>
+    <Target>
+      <TargetName>MAXWSNENV</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>MAX32610</Device>
+          <Vendor>Maxim Integrated</Vendor>
+          <Cpu>IRAM(0x20000000, 0x8000) IROM(0, 0x40000) CLOCK(24000000) CPUTYPE("Cortex-M3")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>{{name}}</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin -o build\{{name}}_max32610.bin build\{{name}}.axf</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection></TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+            <Driver></Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll></UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection></DriverSelection>
+          </Flash1>
+          <bUseTDR>0</bUseTDR>
+          <Flash2></Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x8000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <VariousControls>
+              <MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
+              <Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
+              <Undefine></Undefine>
+              <IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x10000000</DataAddressRange>
+            <ScatterFile>{{scatter_file}}</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc>
+            {% for file in object_files %}
+              {{file}}
+            {% endfor %}
+            </Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        {% for group,files in source_files %}
+        <Group>
+          <GroupName>{{group}}</GroupName>
+          <Files>
+            {% for file in files %}
+            <File>
+              <FileName>{{file.name}}</FileName>
+              <FileType>{{file.type}}</FileType>
+              <FilePath>{{file.path}}</FilePath>
+              {%if file.type == "1" %}
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls>--c99</MiscControls>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+              {% endif %}
+            </File>
+          {% endfor %}
+          </Files>
+        </Group>
+        {% endfor %}
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>
diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py
index 0066d12b23..188811b89b 100755
--- a/workspace_tools/export_test.py
+++ b/workspace_tools/export_test.py
@@ -132,6 +132,8 @@ if __name__ == '__main__':
             ('uvision', 'NUCLEO_L073RZ'),
             ('uvision', 'NUCLEO_L152RE'),
             ('uvision', 'MTS_MDOT_F405RG'),
+            ('uvision', 'MAXWSNENV'),
+            ('uvision', 'MAX32600MBED'),
 
             ('lpcxpresso', 'LPC1768'),
             ('lpcxpresso', 'LPC4088'),
@@ -174,6 +176,8 @@ if __name__ == '__main__':
             ('gcc_arm', 'MTS_MDOT_F405RG'),
             ('gcc_arm', 'MTS_MDOT_F411RE'),
             ('gcc_arm', 'RZ_A1H'),
+            ('gcc_arm', 'MAXWSNENV'),
+            ('gcc_arm', 'MAX32600MBED'),
 
             ('ds5_5', 'LPC1768'), ('ds5_5', 'LPC11U24'),
 
@@ -196,6 +200,8 @@ if __name__ == '__main__':
             ('iar', 'STM32F407'),
             ('iar', 'MTS_MDOT_F405RG'),
             ('iar', 'MTS_MDOT_F411RE'),
+            ('iar', 'MAXWSNENV'),
+            ('iar', 'MAX32600MBED'),
 
             # Removed following item to avoid script error
             #(None, None),

From 478aa7ef33942eff6bac60ad033b8add2e773c6b Mon Sep 17 00:00:00 2001
From: porkybrain <holmes.odin@gmail.com>
Date: Fri, 17 Apr 2015 01:56:35 +0200
Subject: [PATCH 31/45] free memory afer disabling the usb ISR solves race
 condition which could corrupt the heap. (issue #1049)

---
 libraries/USBDevice/USBMSD/USBMSD.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/USBDevice/USBMSD/USBMSD.cpp b/libraries/USBDevice/USBMSD/USBMSD.cpp
index f2b6e3d791..ee5ad24733 100644
--- a/libraries/USBDevice/USBMSD/USBMSD.cpp
+++ b/libraries/USBDevice/USBMSD/USBMSD.cpp
@@ -135,10 +135,10 @@ bool USBMSD::connect(bool blocking) {
 }
 
 void USBMSD::disconnect() {
+    USBDevice::disconnect();
     //De-allocate MSD page size:
     free(page);
     page = NULL;
-    USBDevice::disconnect();
 }
 
 void USBMSD::reset() {

From e753aa2d9ef632e8ebf9e56eca7f56dcd464d779 Mon Sep 17 00:00:00 2001
From: Toyomasa Watarai <toyomasa.watarai@gmail.com>
Date: Fri, 17 Apr 2015 15:39:15 +0900
Subject: [PATCH 32/45] [NXP's HAL] Fix PwmOut period using SCT

* Some targets which use SCT timer for PwmOut have a bug which PWM
signal does not come out when period set more than 65536us. (issue
#1050)
* Fix SCT counter mode from 16-bit Low to 32-bit Unified mode
* Fix wrong cast size (uint64_t) for 32-bit register
* Some TABs convert to white spaces
* Affected with LPC812, LPC824, LPC1549 and LPC11U68
---
 .../TARGET_NXP/TARGET_LPC11U6X/pwmout_api.c   | 11 +++--
 .../TARGET_NXP/TARGET_LPC15XX/pwmout_api.c    | 43 +++++++++----------
 .../hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c | 31 ++++++-------
 .../hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c | 13 +++---
 4 files changed, 48 insertions(+), 50 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/pwmout_api.c
index d23a98b07f..71f9aaa41b 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/pwmout_api.c
@@ -77,9 +77,8 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     pinmap_pinout(pin, PinMap_PWM);
     LPC_SCT0_Type* pwm = obj->pwm;
     
-    // Two 16-bit counters, autolimit
-    pwm->CONFIG &= ~(0x1);
-    pwm->CONFIG |= (1 << 17);
+    // Unified 32-bit counter, autolimit
+    pwm->CONFIG |= ((0x3 << 17) | 0x01);
     
     // halt and clear the counter
     pwm->CTRL |= (1 << 2) | (1 << 3);
@@ -170,8 +169,8 @@ void pwmout_period_us(pwmout_t* obj, int us) {
     uint32_t t_off = obj->pwm->MATCHREL0;
     uint32_t t_on  = obj->pwm->MATCHREL1;
     float v = (float)t_on/(float)t_off;
-    obj->pwm->MATCHREL0 = (uint64_t)us;
-    obj->pwm->MATCHREL1 = (uint64_t)((float)us * (float)v);
+    obj->pwm->MATCHREL0 = (uint32_t)us;
+    obj->pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
 }
 
 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
@@ -183,7 +182,7 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 }
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
-    obj->pwm->MATCHREL1 = (uint64_t)us;
+    obj->pwm->MATCHREL1 = (uint32_t)us;
 }
 
 #endif
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c
index 0f32764d01..8a17f4be48 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c
@@ -59,33 +59,32 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
     
     switch(obj->pwm_ch) {
-    	case 0:
+        case 0:
             // SCT0_OUT0
             LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
             LPC_SWM->PINASSIGN[7] |= (pin << 8);
-    		break;
-    	case 1:
+            break;
+        case 1:
             // SCT1_OUT0
             LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
             LPC_SWM->PINASSIGN[8] |= (pin);
-    		break;
-    	case 2:
+            break;
+        case 2:
             // SCT2_OUT0
             LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
             LPC_SWM->PINASSIGN[8] |= (pin << 24);
-    		break;
-    	case 3:
+            break;
+        case 3:
             // SCT3_OUT0
             LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
             LPC_SWM->PINASSIGN[9] |= (pin << 16);
-    		break;
-    	default:
-    		break;
+            break;
+        default:
+            break;
     }
     
-    // Two 16-bit counters, autolimit
-    pwm->CONFIG &= ~(0x1);
-    pwm->CONFIG |= (1 << 17);
+    // Unified 32-bit counter, autolimit
+    pwm->CONFIG |= ((0x3 << 17) | 0x01);
     
     // halt and clear the counter
     pwm->CTRL |= (1 << 2) | (1 << 3);
@@ -101,10 +100,10 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     pwm->OUT0_SET = (1 << 0); // event 0
     pwm->OUT0_CLR = (1 << 1); // event 1
 
-	pwm->EV0_CTRL  = (1 << 12);
-	pwm->EV0_STATE = 0xFFFFFFFF;
-	pwm->EV1_CTRL  = (1 << 12) | (1 << 0);
-	pwm->EV1_STATE = 0xFFFFFFFF;
+    pwm->EV0_CTRL  = (1 << 12);
+    pwm->EV0_STATE = 0xFFFFFFFF;
+    pwm->EV1_CTRL  = (1 << 12) | (1 << 0);
+    pwm->EV1_STATE = 0xFFFFFFFF;
 
     // unhalt the counter:
     //    - clearing bit 2 of the CTRL register
@@ -135,7 +134,7 @@ void pwmout_write(pwmout_t* obj, float value) {
 float pwmout_read(pwmout_t* obj) {
     uint32_t t_off = obj->pwm->MATCHREL0;
     uint32_t t_on  = obj->pwm->MATCHREL1;
-	float v = (float)t_on/(float)t_off;
+    float v = (float)t_on/(float)t_off;
     return (v > 1.0f) ? (1.0f) : (v);
 }
 
@@ -152,9 +151,9 @@ void pwmout_period_us(pwmout_t* obj, int us) {
     LPC_SCT0_Type* pwm = obj->pwm;
     uint32_t t_off = pwm->MATCHREL0;
     uint32_t t_on  = pwm->MATCHREL1;
-	float v = (float)t_on/(float)t_off;
-    pwm->MATCHREL0 = (uint64_t)us;
-    pwm->MATCHREL1 = (uint64_t)((float)us * (float)v);
+    float v = (float)t_on/(float)t_off;
+    pwm->MATCHREL0 = (uint32_t)us;
+    pwm->MATCHREL1 = (uint32_t)((float)us * (float)v);
 }
 
 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
@@ -166,6 +165,6 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 }
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
-    obj->pwm->MATCHREL1 = (uint64_t)us;
+    obj->pwm->MATCHREL1 = (uint32_t)us;
 }
 
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c
index 7866df5629..393d51981a 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pwmout_api.c
@@ -72,22 +72,23 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
       LPC_SYSCON->PRESETCTRL |=  (1 << 8);
 
       // Two 16-bit counters, autolimit (ie reset on Match_0)
-      pwm->CONFIG &= ~(0x1);
-      pwm->CONFIG |= (1 << 17);
+      //pwm->CONFIG &= ~(0x1);
+      //pwm->CONFIG |= (1 << 17);
+      pwm->CONFIG |= ((0x3 << 17) | 0x01);
 
       // halt and clear the counter
-      pwm->CTRL_L |= (1 << 2) | (1 << 3);
+      pwm->CTRL_U |= (1 << 2) | (1 << 3);
 
       // System Clock (30 Mhz) -> Prescaler -> us_ticker (1 MHz)
-      pwm->CTRL_L &= ~(0x7F << 5);
-      pwm->CTRL_L |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
+      pwm->CTRL_U &= ~(0x7F << 5);
+      pwm->CTRL_U |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5);
 
       pwm->EVENT[0].CTRL  = (1 << 12) | 0;                     // Event_0 on Match_0
       pwm->EVENT[0].STATE = 0xFFFFFFFF;                        // All states
     
       // unhalt the counter:
       //    - clearing bit 2 of the CTRL register
-      pwm->CTRL_L &= ~(1 << 2);
+      pwm->CTRL_U &= ~(1 << 2);
       
       // Not using IRQs 
       //NVIC_SetVector(PWM_IRQn, (uint32_t)pwm_irq_handler);
@@ -154,20 +155,20 @@ void pwmout_write(pwmout_t* obj, float value) {
     }
      
     // Match_0 is PWM period. Compute new endtime of pulse for current channel
-    uint32_t t_off = (uint32_t)((float)(obj->pwm->MATCHREL[0].L) * value);
-    obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L = t_off; // New endtime
+    uint32_t t_off = (uint32_t)((float)(obj->pwm->MATCHREL[0].U) * value);
+    obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = t_off; // New endtime
 }
 
 // Get dutycycle (0.0 .. 1.0)
 float pwmout_read(pwmout_t* obj) {
-    uint32_t t_period = obj->pwm->MATCHREL[0].L;
+    uint32_t t_period = obj->pwm->MATCHREL[0].U;
 
     //Sanity check
     if (t_period == 0) {
      return 0.0;
     };
      
-    uint32_t t_off  = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L;
+    uint32_t t_off  = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U;
     float v = (float)t_off/(float)t_period;
     //Sanity check    
     return (v > 1.0f) ? (1.0f) : (v);
@@ -186,8 +187,8 @@ void pwmout_period_ms(pwmout_t* obj, int ms) {
 // Set the PWM period, keeping the duty cycle the same (for this channel only!).
 void pwmout_period_us(pwmout_t* obj, int us) {
     
-    uint32_t t_period = obj->pwm->MATCHREL[0].L;  // Current PWM period
-    obj->pwm->MATCHREL[0].L = (uint64_t)us;       // New PWM period
+    uint32_t t_period = obj->pwm->MATCHREL[0].U;  // Current PWM period
+    obj->pwm->MATCHREL[0].U = (uint32_t)us;       // New PWM period
 
     //Keep the dutycycle for the new PWM period
     //Should really do this for all active channels!!
@@ -199,9 +200,9 @@ void pwmout_period_us(pwmout_t* obj, int us) {
 //      obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L = 0; // New endtime for this channel     
     }
     else {    
-      uint32_t t_off  = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L;
+      uint32_t t_off  = obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U;
       float v = (float)t_off/(float)t_period;
-      obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L = (uint64_t)((float)us * (float)v); // New endtime for this channel
+      obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = (uint32_t)((float)us * (float)v); // New endtime for this channel
     }   
 }
 
@@ -220,7 +221,7 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms){
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
 
 //Should add Sanity check to make sure pulsewidth < period!
-    obj->pwm->MATCHREL[(obj->pwm_ch) + 1].L = (uint64_t)us; // New endtime for this channel
+    obj->pwm->MATCHREL[(obj->pwm_ch) + 1].U = (uint32_t)us; // New endtime for this channel
 }
 
 #endif
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c
index dcfd96656c..05c5113e46 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/pwmout_api.c
@@ -48,7 +48,7 @@ void pwmout_init(pwmout_t* obj, PinName pin)
     obj->pwm =  (LPC_SCT_Type*)LPC_SCT;
     obj->pwm_ch = sct_n;
 
-   LPC_SCT_Type* pwm = obj->pwm;
+    LPC_SCT_Type* pwm = obj->pwm;
 
     // Enable the SCT clock
     LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
@@ -81,9 +81,8 @@ void pwmout_init(pwmout_t* obj, PinName pin)
             break;
     }
 
-    // Two 16-bit counters, autolimit
-    pwm->CONFIG &= ~(0x1);
-    pwm->CONFIG |= (1 << 17);
+    // Unified 32-bit counter, autolimit
+    pwm->CONFIG |= ((0x3 << 17) | 0x01);
 
     // halt and clear the counter
     pwm->CTRL |= (1 << 2) | (1 << 3);
@@ -151,8 +150,8 @@ void pwmout_period_us(pwmout_t* obj, int us)
     uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0];
     uint32_t t_on  = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1];
     float v = (float)t_on/(float)t_off;
-    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] = (uint64_t)us;
-    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint64_t)((float)us * (float)v);
+    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] = (uint32_t)us;
+    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)((float)us * (float)v);
 }
 
 void pwmout_pulsewidth(pwmout_t* obj, float seconds)
@@ -167,7 +166,7 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us)
 {
-    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint64_t)us;
+    obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)us;
 }
 
 #endif

From 2f4d6683827c192cab49f004223f9e42da5a3a89 Mon Sep 17 00:00:00 2001
From: Brian Daniels <brian.daniels@arm.com>
Date: Tue, 14 Apr 2015 13:45:56 -0500
Subject: [PATCH 33/45] Renamed Jenkins specific options to general "Build"
 options

---
 .travis.yml                      |  7 ++++---
 workspace_tools/build_release.py |  6 +++---
 workspace_tools/singletest.py    |  2 +-
 workspace_tools/test_api.py      | 16 ++++++++--------
 4 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index 4f4d70d811..a26edf15aa 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -1,8 +1,9 @@
---- 
-python: 
+---
+python:
   - "2.7"
 script: "python workspace_tools/build_travis.py"
 install:
   - "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null"
   - sudo pip install colorama
-  - sudo pip install prettytable
\ No newline at end of file
+  - sudo pip install prettytable
+  - sudo pip install jinja2
diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 3acaaf1d53..b5d79a0886 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -101,7 +101,7 @@ if __name__ == '__main__':
                       default=False, help="Verbose diagnostic output")
     parser.add_option("-t", "--toolchains", dest="toolchains", help="Use toolchains names separated by comma")
 
-    parser.add_option("", "--report-jenkins", dest="report_jenkins_file_name", help="Output the build results to an xml file that is readable by Jenkins")
+    parser.add_option("", "--report-build", dest="report_build_file_name", help="Output the build results to an html file")
 
 
     options, args = parser.parse_args()
@@ -147,8 +147,8 @@ if __name__ == '__main__':
 
     # Write summary of the builds
 
-    if options.report_jenkins_file_name:
-        write_build_report(build_report, 'library_build/report.html', options.report_jenkins_file_name)
+    if options.report_build_file_name:
+        write_build_report(build_report, 'library_build/report.html', options.report_build_file_name)
 
     print "\n\nCompleted in: (%.2f)s" % (time() - start)
 
diff --git a/workspace_tools/singletest.py b/workspace_tools/singletest.py
index b88215a977..e1ee3a449f 100644
--- a/workspace_tools/singletest.py
+++ b/workspace_tools/singletest.py
@@ -209,7 +209,7 @@ if __name__ == '__main__':
                                    _opts_log_file_name=opts.log_file_name,
                                    _opts_report_html_file_name=opts.report_html_file_name,
                                    _opts_report_junit_file_name=opts.report_junit_file_name,
-                                   _opts_report_jenkins_file_name=opts.report_jenkins_file_name,
+                                   _opts_report_build_file_name=opts.report_build_file_name,
                                    _test_spec=test_spec,
                                    _opts_goanna_for_mbed_sdk=opts.goanna_for_mbed_sdk,
                                    _opts_goanna_for_tests=opts.goanna_for_tests,
diff --git a/workspace_tools/test_api.py b/workspace_tools/test_api.py
index f29fdd65e4..bca2da5270 100644
--- a/workspace_tools/test_api.py
+++ b/workspace_tools/test_api.py
@@ -154,7 +154,7 @@ class SingleTestRunner(object):
                  _opts_log_file_name=None,
                  _opts_report_html_file_name=None,
                  _opts_report_junit_file_name=None,
-                 _opts_report_jenkins_file_name=None,
+                 _opts_report_build_file_name=None,
                  _test_spec={},
                  _opts_goanna_for_mbed_sdk=None,
                  _opts_goanna_for_tests=None,
@@ -207,7 +207,7 @@ class SingleTestRunner(object):
         self.opts_log_file_name = _opts_log_file_name
         self.opts_report_html_file_name = _opts_report_html_file_name
         self.opts_report_junit_file_name = _opts_report_junit_file_name
-        self.opts_report_jenkins_file_name = _opts_report_jenkins_file_name
+        self.opts_report_build_file_name = _opts_report_build_file_name
         self.opts_goanna_for_mbed_sdk = _opts_goanna_for_mbed_sdk
         self.opts_goanna_for_tests = _opts_goanna_for_tests
         self.opts_shuffle_test_order = _opts_shuffle_test_order
@@ -1438,9 +1438,9 @@ def singletest_in_cli_mode(single_test):
         # Export results in form of JUnit XML report to separate file
         report_exporter = ReportExporter(ResultExporterType.JUNIT)
         report_exporter.report_to_file(test_summary_ext, single_test.opts_report_junit_file_name, test_suite_properties=test_suite_properties_ext)
-    if single_test.opts_report_jenkins_file_name:
-        # Export build results as Jenkins XML report ti sparate file
-        write_build_report(build_report, 'tests_build/report.html', single_test.opts_report_jenkins_file_name)
+    if single_test.opts_report_build_file_name:
+        # Export build results as html report to sparate file
+        write_build_report(build_report, 'tests_build/report.html', single_test.opts_report_build_file_name)
 
 
 class TestLogger():
@@ -1811,9 +1811,9 @@ def get_default_test_options_parser():
                       dest='report_junit_file_name',
                       help='You can log test suite results in form of JUnit compliant XML report')
 
-    parser.add_option("", "--report-jenkins",
-                      dest="report_jenkins_file_name",
-                      help="Output the build results to an xml file that is readable by Jenkins")
+    parser.add_option("", "--report-build",
+                      dest="report_build_file_name",
+                      help="Output the build results to an html file")
 
     parser.add_option('', '--verbose-skipped',
                       dest='verbose_skipped_tests',

From 8348517bbba5964b8addec295478a5652940fbc0 Mon Sep 17 00:00:00 2001
From: Christoph Plank <chrisistuff@gmail.com>
Date: Sun, 22 Mar 2015 00:15:27 +0100
Subject: [PATCH 34/45] Fixed section names in linker script for TEENSY3_1 when
 using GCC_ARM

---
 .../TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld        | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld
index 71925fc817..3a40be8642 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld
@@ -42,10 +42,11 @@ SECTIONS
 {
     .isr_vector :
     {
-        __vector_table = .;
-        KEEP(*(.vector_table))
+        . = 0;
+        __isr_vector = .;
+        KEEP(*(.isr_vector))
         *(.text.Reset_Handler)
-        *(.text.System_Init)
+        *(.text.SystemInit)
          . = ALIGN(4);
     } > VECTORS
 

From e66f9ff0aadd4cbf49eb735fc4cb166fcc0ea577 Mon Sep 17 00:00:00 2001
From: Christoph Plank <chrisistuff@gmail.com>
Date: Sun, 22 Mar 2015 00:16:51 +0100
Subject: [PATCH 35/45] Call SystemInit before loading the .data section for
 TEENSY3.1 when using GCC_ARM

This is needed because it seems the watchdog otherwise resets the board
before SystemInit is reached even though I'm not sure why the watchdog
timer expires so early.
---
 .../TOOLCHAIN_GCC_ARM/startup_MK20DX256.s                | 9 +++++++--
 .../TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c     | 2 ++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s
index c2eaa33f46..e54559a4dc 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s
@@ -192,6 +192,13 @@ __isr_vector:
     .globl    Reset_Handler
     .type    Reset_Handler, %function
 Reset_Handler:
+/*
+ *    Call SystemInit before loading the .data section to prevent the watchdog
+ *    from resetting the board.
+ */
+    ldr    r0, =SystemInit
+    blx    r0
+
 /*     Loop to copy data from read only memory to RAM. The ranges
  *      of copy from/to are specified by following symbols evaluated in
  *      linker script.
@@ -212,8 +219,6 @@ Reset_Handler:
 
 .Lflash_to_ram_loop_end:
 
-    ldr    r0, =SystemInit
-    blx    r0
     ldr    r0, =_start
     bx    r0
     .pool
diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
index 4b45c719f0..4f34cc76c1 100644
--- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
+++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/system_MK20DX256.c
@@ -100,6 +100,8 @@ uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
    -- SystemInit()
    ---------------------------------------------------------------------------- */
 void SystemInit (void) {
+  /* SystemInit MUST NOT use any variables from the .data section, as this section is not loaded yet! */
+
 #if (DISABLE_WDOG)
   /* Disable the WDOG module */
   /* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */

From bd1bfb5c4b539160e5a85a97c4c65031268cdbb9 Mon Sep 17 00:00:00 2001
From: Christoph Plank <chrisistuff@gmail.com>
Date: Sat, 18 Apr 2015 16:32:59 +0200
Subject: [PATCH 36/45] Fixed RTOS support for Cortex-M4 without FPU

---
 .../TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s            | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s b/libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s
index cebb80e8e8..ce3242bcbb 100644
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s
@@ -210,8 +210,12 @@ SVC_Handler_Veneer:
 
         CBZ     R1,SVC_Next             /* Runtask deleted? */
         TST     LR,#0x10                /* is it extended frame? */
+        #ifdef  __FPU_PRESENT
         ITTE    EQ
         VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */
+        #else
+        ITE    EQ
+        #endif
         MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */
         MOVNE   R0,#0x00
         STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */
@@ -229,8 +233,12 @@ SVC_Next:
         LDMIA   R12!,{R4-R11}           /* Restore New Context */
         LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */
         CMP     R0,#0                   /* Basic/Extended Stack Frame */
+        #ifdef  __FPU_PRESENT
         ITTE    NE
         VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */
+        #else
+        ITE    NE
+        #endif
         MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */
         MVNEQ   LR,#~0xFFFFFFFD
         MSR     PSP,R12                 /* Write PSP */
@@ -303,8 +311,12 @@ Sys_Switch:
 
         MRS     R12,PSP                 /* Read PSP */
         TST     LR,#0x10                /* is it extended frame? */
+        #ifdef  __FPU_PRESENT
         ITTE    EQ
         VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */
+        #else
+        ITE    EQ
+        #endif
         MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */
         MOVNE   R0,#0x00
         STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */
@@ -321,8 +333,12 @@ Sys_Switch:
         LDMIA   R12!,{R4-R11}           /* Restore New Context */
         LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */
         CMP     R0,#0                   /* Basic/Extended Stack Frame */
+        #ifdef  __FPU_PRESENT
         ITTE    NE
         VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */
+        #else
+        ITE    NE
+        #endif
         MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */
         MVNEQ   LR,#~0xFFFFFFFD
         MSR     PSP,R12                 /* Write PSP */

From 82b7d9d3f7e5b80f4f7e1542158c7017c459edba Mon Sep 17 00:00:00 2001
From: Christoph Plank <chrisistuff@gmail.com>
Date: Sat, 18 Apr 2015 16:33:20 +0200
Subject: [PATCH 37/45] Added RTOS support for TEENSY3_1 target

---
 libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h  | 3 +++
 libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c | 6 +++---
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
index 23d72be0ee..62bc31ce27 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
@@ -304,6 +304,9 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
 #elif defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
 #define INITIAL_SP            (0x20008000UL)
 
+#elif defined(TARGET_TEENSY3_1)
+#define INITIAL_SP            (0x20008000UL)
+
 #else
 #error "no target defined"
 
diff --git a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
index f6c5de83c5..af69c9cde9 100755
--- a/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
+++ b/libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
@@ -51,7 +51,7 @@
 #ifndef OS_TASKCNT
 #  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
    || defined(TARGET_KL46Z) || defined(TARGET_KL43Z)  || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
-   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_TEENSY3_1)
 #    define OS_TASKCNT         14
 #  elif defined(TARGET_LPC11U24) || defined(TARGET_STM32F303RE) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
    || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
@@ -67,7 +67,7 @@
 #ifndef OS_SCHEDULERSTKSIZE
 #  if   defined(TARGET_LPC1768) || defined(TARGET_LPC2368)   || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347)  || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
    || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG)  || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
-   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600)
+   || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_MAX32610) || defined(TARGET_MAX32600) || defined(TARGET_TEENSY3_1)
 #      define OS_SCHEDULERSTKSIZE    256
 #  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) \
    || defined(TARGET_LPC812)   || defined(TARGET_KL25Z)         || defined(TARGET_KL05Z)        || defined(TARGET_STM32F100RB)  || defined(TARGET_STM32F051R8) \
@@ -119,7 +119,7 @@
 #  if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
 #    define OS_CLOCK       96000000
 
-#  elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE)
+#  elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_STM32F303RE) || defined(TARGET_TEENSY3_1)
 #    define OS_CLOCK       72000000
 
 #  elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)  || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)  || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) \

From 5b74eed7da7af522dd384280bff8d54bc0c9622d Mon Sep 17 00:00:00 2001
From: Toyomasa Watarai <toyomasa.watarai@gmail.com>
Date: Mon, 20 Apr 2015 14:34:47 +0900
Subject: [PATCH 38/45] [USBMIDI] Fix compile error

* Member variables in USBMIDIMessage and USBMIDI class wrongly
initialized in class declaration
* Add member initialization in constructor
---
 libraries/USBDevice/USBMIDI/MIDIMessage.h | 6 +++---
 libraries/USBDevice/USBMIDI/USBMIDI.cpp   | 4 +++-
 libraries/USBDevice/USBMIDI/USBMIDI.h     | 4 ++--
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/libraries/USBDevice/USBMIDI/MIDIMessage.h b/libraries/USBDevice/USBMIDI/MIDIMessage.h
index d1a2bc58e7..9cfcf13635 100644
--- a/libraries/USBDevice/USBMIDI/MIDIMessage.h
+++ b/libraries/USBDevice/USBMIDI/MIDIMessage.h
@@ -44,9 +44,9 @@
 /** A MIDI message container */
 class MIDIMessage {
 public:
-    MIDIMessage() {}
+    MIDIMessage() : length(4) {}
 
-    MIDIMessage(uint8_t *buf) {
+    MIDIMessage(uint8_t *buf) : length(4) {
         for (int i = 0; i < 4; i++)
             data[i] = buf[i];
     }
@@ -270,7 +270,7 @@ public:
     }
 
     uint8_t data[MAX_MIDI_MESSAGE_SIZE+1];
-    uint8_t length=4;
+    uint8_t length;
 };
 
 #endif
diff --git a/libraries/USBDevice/USBMIDI/USBMIDI.cpp b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
index a46f9ae77d..084574a790 100644
--- a/libraries/USBDevice/USBMIDI/USBMIDI.cpp
+++ b/libraries/USBDevice/USBMIDI/USBMIDI.cpp
@@ -20,7 +20,9 @@
 #include "USBMIDI.h"
 
 
-USBMIDI::USBMIDI(uint16_t vendor_id, uint16_t product_id, uint16_t product_release): USBDevice(vendor_id, product_id, product_release) {
+USBMIDI::USBMIDI(uint16_t vendor_id, uint16_t product_id, uint16_t product_release)
+ : USBDevice(vendor_id, product_id, product_release), cur_data(0), data_end(true)
+{
     midi_evt = NULL;
     USBDevice::connect();
 }
diff --git a/libraries/USBDevice/USBMIDI/USBMIDI.h b/libraries/USBDevice/USBMIDI/USBMIDI.h
index a7818dd8ce..cc5be5b7d8 100644
--- a/libraries/USBDevice/USBMIDI/USBMIDI.h
+++ b/libraries/USBDevice/USBMIDI/USBMIDI.h
@@ -103,8 +103,8 @@ protected:
 
 private:
     uint8_t data[MAX_MIDI_MESSAGE_SIZE+1];
-    uint8_t cur_data=0;
-    bool data_end = true;
+    uint8_t cur_data;
+    bool data_end;
     
     void (*midi_evt)(MIDIMessage);
 };

From c3da63092360d95a0402955c008b033eb0e28e4e Mon Sep 17 00:00:00 2001
From: Rohit Grover <rohit.grover@arm.com>
Date: Mon, 30 Mar 2015 08:24:03 +0100
Subject: [PATCH 39/45] attempt at upgrading to v8.0 of the SDK

---
 .../TARGET_MCU_NORDIC_16K/nRF51822.sct        |    7 +-
 .../TARGET_MCU_NORDIC_32K/nRF51822.sct        |    7 +-
 .../TARGET_MCU_NORDIC_16K/NRF51822.ld         |    2 +-
 .../TARGET_MCU_NORDIC_32K/NRF51822.ld         |    2 +-
 .../components/libraries/crc16/crc16.h        |   13 +-
 .../components/libraries/util/app_error.h     |    8 +
 .../components/libraries/util/app_util.h      |    2 +
 .../s110_nrf51822_7.1.0_API/doc/ble_api.dox   | 1334 ----
 .../s110_nrf51822_7.1.0_API/include/ble.h     |  419 --
 .../s110_nrf51822_7.1.0_API/include/ble_err.h |   54 -
 .../s110_nrf51822_7.1.0_API/include/ble_gap.h | 1035 ---
 .../include/ble_gatt.h                        |  171 -
 .../include/ble_gattc.h                       |  406 --
 .../include/ble_gatts.h                       |  566 --
 .../s110_nrf51822_7.1.0_API/include/ble_hci.h |   96 -
 .../include/ble_l2cap.h                       |  144 -
 .../include/ble_ranges.h                      |   89 -
 .../include/ble_types.h                       |  169 -
 .../include/nrf_error.h                       |   51 -
 .../include/nrf_error_sdm.h                   |   33 -
 .../include/nrf_error_soc.h                   |   49 -
 .../s110_nrf51822_7.1.0_API/include/nrf_mbr.h |  155 -
 .../s110_nrf51822_7.1.0_API/include/nrf_sdm.h |  167 -
 .../s110_nrf51822_7.1.0_API/include/nrf_soc.h |  958 ---
 .../s110_nrf51822_7.1.0_API/include/nrf_svc.h |   33 -
 .../include/softdevice_assert.h               |   46 -
 .../s110_nrf51822_7.1.0_licence_agreement.pdf |  Bin 5553 -> 0 bytes
 .../s110_nrf51822_7.1.0_readme.txt            |   16 -
 .../s110_nrf51822_7.1.0_releasenotes.pdf      |  Bin 41671 -> 0 bytes
 .../s110_nrf51822_7.1.0_softdevice.hex        | 5280 ---------------
 .../s110_nrf51822_8.0.0_softdevice.hex        | 5649 +++++++++++++++++
 workspace_tools/targets.py                    |   16 +-
 32 files changed, 5681 insertions(+), 11296 deletions(-)
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/doc/ble_api.dox
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_err.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gap.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatt.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gattc.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatts.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_hci.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_l2cap.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_ranges.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_types.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_sdm.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_soc.h
 delete mode 100755 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_mbr.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_sdm.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_soc.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_svc.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/softdevice_assert.h
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_licence_agreement.pdf
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_readme.txt
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_releasenotes.pdf
 delete mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
 create mode 100644 libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex

diff --git a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct
index bccc79bda6..62638400f2 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct
+++ b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct
@@ -12,8 +12,8 @@
 ;
 ;WITH SOFTDEVICE:
 
-LR_IROM1 0x16000 0x002A000  {
-  ER_IROM1 0x16000 0x002A000  {
+LR_IROM1 0x18000 0x0028000  {
+  ER_IROM1 0x18000 0x0028000  {
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
@@ -22,6 +22,3 @@ LR_IROM1 0x16000 0x002A000  {
    .ANY (+RW +ZI)
   }
 }
-
-
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
index 20a31ef141..6dd0642fd1 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
+++ b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
@@ -12,8 +12,8 @@
 ;
 ;WITH SOFTDEVICE:
 
-LR_IROM1 0x16000 0x002A000  {
-  ER_IROM1 0x16000 0x002A000  {
+LR_IROM1 0x18000 0x0028000  {
+  ER_IROM1 0x18000 0x0028000  {
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
@@ -22,6 +22,3 @@ LR_IROM1 0x16000 0x002A000  {
    .ANY (+RW +ZI)
   }
 }
-
-
-
diff --git a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld
index 43e0ac80da..cb472e5640 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld
@@ -2,7 +2,7 @@
 
 MEMORY
 {
-  FLASH (rx) : ORIGIN = 0x00016000, LENGTH = 0x2A000
+  FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
   RAM (rwx) :  ORIGIN = 0x20002000, LENGTH = 0x2000
 }
 
diff --git a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld
index db71363817..812a86d4e3 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld
@@ -2,7 +2,7 @@
 
 MEMORY
 {
-  FLASH (rx) : ORIGIN = 0x00016000, LENGTH = 0x2A000
+  FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
   RAM (rwx) :  ORIGIN = 0x20002000, LENGTH = 0x6000
 }
 
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h
index e4e82ceed3..57f6251354 100644
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h
@@ -9,7 +9,7 @@
  * the file.
  *
  */
-
+ 
 /** @file
  *
  * @defgroup crc_compute CRC compute
@@ -18,7 +18,7 @@
  *
  * @brief    This module implements the CRC-16 calculation in the blocks.
  */
-
+ 
 #ifndef CRC16_H__
 #define CRC16_H__
 
@@ -30,13 +30,13 @@ extern "C" {
 
 /**@brief Function for calculating CRC-16 in blocks.
  *
- * Feed each consecutive data block into this function, along with the current value of p_crc as
- * returned by the previous call of this function. The first call of this function should pass NULL
+ * Feed each consecutive data block into this function, along with the current value of p_crc as 
+ * returned by the previous call of this function. The first call of this function should pass NULL 
  * as the initial value of the crc in p_crc.
  *
  * @param[in] p_data The input data block for computation.
  * @param[in] size   The size of the input data block in bytes.
- * @param[in] p_crc  The previous calculated CRC-16 value or NULL if first call.
+ * @param[in] p_crc  The previous calculated CRC-16 value or NULL if first call.  
  *
  * @return The updated CRC-16 value, based on the input supplied.
  */
@@ -46,7 +46,6 @@ uint16_t crc16_compute(const uint8_t * p_data, uint32_t size, const uint16_t * p
 }
 #endif
 
-
 #endif // CRC16_H__
-
+ 
 /** @} */
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h
index 616634c887..2711170419 100644
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h
@@ -26,6 +26,10 @@
 #include <stdbool.h>
 #include "nrf_error.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**@brief Function for error handling, which is called when an error has occurred. 
  *
  * @param[in] error_code  Error code supplied to the handler.
@@ -34,6 +38,10 @@
  */
 void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name);
 
+#ifdef __cplusplus
+}
+#endif
+
 /**@brief Macro for calling error handler function. 
  *
  * @param[in] ERR_CODE Error code supplied to the error handler.
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h
index c4b1022eb1..7b0ef5a06a 100644
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h
@@ -50,6 +50,8 @@ enum
 
 #if defined(__GNUC__)
 #define STATIC_ASSERT(EXPR) typedef char __attribute__((unused)) static_assert_failed[(EXPR) ? 1 : -1]
+#elif defined(__ICCARM__)
+#define STATIC_ASSERT(EXPR) extern char static_assert_failed[(EXPR) ? 1 : -1] 
 #else
 #define STATIC_ASSERT(EXPR) typedef char static_assert_failed[(EXPR) ? 1 : -1]
 #endif
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/doc/ble_api.dox b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/doc/ble_api.dox
deleted file mode 100644
index 9adbffe39a..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/doc/ble_api.dox
+++ /dev/null
@@ -1,1334 +0,0 @@
-/**
- * @addtogroup BLE_COMMON 
- * @{
- * @defgroup BLE_COMMON_MSC Message Sequence Charts
- * @{
- * @defgroup BLE_COMMON_IRQ_EVT_MSC Interrupt-driven Event Retrieval
- * @msc
- * hscale = "1.5";
- * APP,SD;
- * |||;
- * APP=>SD [label = "sd_softdevice_enable(clock, assertion_handler);"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_nvic_EnableIRQ(SD_EVENT_IRQn)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * APP rbox SD [label="Application runs and uses SD API"];
- * |||;
- * SD rbox SD [label="Event Available for the App"];
- * |||;
- * APP<-SD [label = "SD_EVENT_IRQn", textcolor="#800080", linecolor="#800080"];
- * APP=>APP [label = "SD_EVENT_IRQHandler()"];
- * APP=>SD [label = "sd_ble_evt_get(buffer);"];
- * APP<<SD [label = "{NRF_SUCCESS, event}"];
- * |||;
- * @endmsc
- *
- * @defgroup BLE_COMMON_THREAD_EVT_MSC Thread Mode Event Retrieval
- * @msc
- * hscale = "1.5";
- * APP,SD;
- * |||;
- * APP=>SD [label = "sd_softdevice_enable(clock, assertion_handler);"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * APP=>SD [label = "sd_app_evt_wait(void);"];
- * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"];
- * |||;
- * ...;
- * |||;
- * SD rbox SD [label="Event Available for the App"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_evt_get(buffer);"];
- * APP<<SD [label = "{NRF_SUCCESS, event}"];
- * APP=>SD [label = "sd_app_evt_wait(void);"];
- * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"];
- * |||;
- * ...;
- * |||;
- * SD rbox SD [label="Event Available for the App"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_evt_get(buffer);"];
- * APP<<SD [label = "{NRF_SUCCESS, event}"];
- * APP=>SD [label = "sd_app_evt_wait(void);"];
- * APP rbox APP [label="App Thread Mode blocked, CPU in low power mode"];
- * |||;
- * ...;
- * |||;
- * @endmsc
- *
- * @defgroup BLE_COMMON_APP_BUFF_MSC App Buffer Management
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP=>SD [label = "sd_ble_tx_buffer_count_get();"];
- * APP<<SD [label = "{NRF_SUCCESS, N}"];
- * APP rbox APP [label="available = N"];
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_write(handle, value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP rbox APP [label="available--"];
- * SD:>PEER [label = "ATT Write Command", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_TX_COMPLETE {1}"];
- * APP rbox APP [label="available += 1"];
- * |||;
- * ...;
- * |||;
- * APP=>SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP rbox APP [label="available--"];
- * SD:>PEER [label = "ATT Handle Value Notification", textcolor="#000080", linecolor="#000080"];
- * APP=>SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP rbox APP [label="available--"];
- * SD:>PEER [label = "ATT Handle Value Notification", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_TX_COMPLETE {2}"];
- * APP rbox APP [label="available += 2"];
- * |||;
- * ...;
- * |||;
- * APP rbox PEER [label="Terminate Connection"];
- * |||;
- * APP rbox APP [label="available = N"];
- * |||;
- * @endmsc
- * @}
- * @}
- */
-
-/**
- * @addtogroup BLE_GAP 
- * @{
- * @defgroup BLE_GAP_MSC Message Sequence Charts
- * @{
- * @defgroup BLE_GAP_ADV_MSC GAP Advertisement
- * @msc
- * hscale = "1.5";
- * APP,SD,SCANNERS;
- * |||;
- * APP=>SD [label = "sd_ble_gap_address_set(addr)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_gap_adv_data_set(adv, sr)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_gap_adv_start(params)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * SD->SCANNERS [label = "ADV packet", textcolor="#000080", linecolor="#000080"];
- * SD->SCANNERS [label = "ADV packet", textcolor="#000080", linecolor="#000080"];
- * SD->SCANNERS [label = "ADV packet", textcolor="#000080", linecolor="#000080"];
- * ...;
- * SD->SCANNERS [label = "ADV packet", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #1 App Stops Advertisement "];
- * APP=>SD [label = "sd_ble_gap_adv_stop()"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * --- [label = " Variant #2 Advertisement Timeout "];
- * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT"];
- * @endmsc
- *
- * @defgroup BLE_GAP_CONN_MSC GAP Connection Establishment and Termination
- * @msc
- * hscale = "1.5";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Start Advertising"];
- * |||;
- * SD<:>CENTRAL [label = "Connection Establishment", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONNECTED"];
- * |||;
- * --- [label = " Variant #1 Local Disconnection "];
- * APP=>SD [label = "sd_ble_gap_disconnect(reason)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "Connection Termination", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"];
- * |||;
- * --- [label = " Variant #2 Remote Disconnection "];
- * SD<:CENTRAL [label = "Connection Termination", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"];
- * @endmsc
- *
- * @defgroup BLE_GAP_CPU_MSC GAP Connection Parameter Update
- * @msc
- * hscale = "1.5";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established with conn. params. CP#1"];
- * |||;
- * APP=>SD [label = "sd_ble_gap_conn_param_update(CP#2)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "L2CAP CPU Request", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #1 Central Accepts "];
- * |||;
- * SD<:CENTRAL [label = "L2CAP CPU Response: Accepted", textcolor="#000080", linecolor="#000080"];
- * |||;
- * SD<:CENTRAL [label = "Connection Update", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#2}"];
- * |||;
- * --- [label = " Variant #2 Central Rejects "];
- * |||;
- * SD<:CENTRAL [label = "L2CAP CPU Response: Rejected", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#1}"];
- * --- [label = " Variant #3 Central Ignores "];
- * |||;
- * ...;
- * |||;
- * SD box SD [label="Timeout"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_PARAM_UPDATE {CP#1}"];
- * @endmsc
- *
- * @defgroup BLE_GAP_RSSI_MSC GAP RSSI
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gap_rssi_start()"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * SD<-PEER [label = "RSSI Sample", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_RSSI_CHANGED {RSSI#1}"];
- * |||;
- * SD<-PEER [label = "RSSI Sample", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_RSSI_CHANGED {RSSI#2}"];
- * |||;
- * SD<-PEER [label = "RSSI Sample", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_RSSI_CHANGED {RSSI#3}"];
- * |||;
- * APP=>SD [label = "sd_ble_gap_rssi_stop()"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_JW_MSC GAP Pairing: Just Works
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: no_bond, no_mitm, no_io_caps}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: no_bond, no_mitm, no_io_caps)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 2", textbgcolor="#7f7fff"];
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS}"];
- * APP rbox CENTRAL [label = "Encrypted with STK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"];
- * @endmsc
- *
- * @defgroup BLE_GAP_BONDING_JW_MSC GAP Bonding: Just Works
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: bond, no_mitm, no_io_caps}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: bond, no_mitm, no_io_caps)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 2", textbgcolor="#7f7fff"];
- * |||;
- * APP rbox CENTRAL [label = "Encrypted with STK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_NO_MITM}"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"];
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS, periph_keys}"];
- * APP rbox APP [label = "Store Peripheral Keys"];
- * @endmsc
- *
- * @defgroup BLE_GAP_BONDING_PK_PERIPH_MSC GAP Bonding: Passkey Entry, Peripheral displays
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: bond, mitm, keyboard}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: bond, mitm, display)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey}"];
- * APP rbox APP [label="Passkey displayed to the user"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 2", textbgcolor="#7f7fff"];
- * |||;
- * APP rbox CENTRAL [label = "Encrypted with STK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"];
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS, periph_keys}"];
- * APP rbox APP [label = "Store Peripheral Keys"];
- * @endmsc
- *
- * @defgroup BLE_GAP_BONDING_PK_CENTRAL_OOB_MSC GAP Bonding: Passkey Entry (Central display) or OOB MSC
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: bond, mitm, display}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: bond, mitm, keyboard)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_KEY_REQUEST {type}"];
- * APP rbox APP [label="User enters Passkey or data received Out Of Band"];
- * APP=>SD [label = "sd_ble_gap_auth_key_reply(passkey or OOB)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 2", textbgcolor="#7f7fff"];
- * |||;
- * APP rbox CENTRAL [label = "Encrypted with STK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"];
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS, periph_keys}"];
- * APP rbox APP [label = "Store Peripheral Keys"];
- * @endmsc
- *
- * @defgroup BLE_GAP_BONDING_STATIC_PK_PERIPHERAL GAP Bonding: Passkey Entry (Peripheral uses static passkey) MSC
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP=>SD [label = "sd_ble_opt_set(opt_id = BLE_GAP_OPT_PASSKEY, p_opt->p_passkey=passkey)"];
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: bond, mitm, keyboard}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: bond, mitm, io_caps = display)"];
- *
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_PASSKEY_DISPLAY {passkey}"];
- * APP rbox APP [label="Passkey displayed to the user"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 2", textbgcolor="#7f7fff"];
- * |||;
- * APP rbox CENTRAL [label = "Encrypted with STK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE {ENC_MITM}"];
- * |||;
- * SD abox CENTRAL [label="SMP Pairing Phase 3", textbgcolor="#7f7fff"];
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {SUCCESS, periph_keys}"];
- * APP rbox APP [label = "Store Peripheral Keys"];
- * @endmsc
- *
- * @defgroup BLE_GAP_SEC_MSC GAP Security Establishment using stored keys
- * @msc
- * hscale = "1.5";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "LL Encryption Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_INFO_REQUEST {addr, div}"];
- * |||;
- * --- [label = " Variant #1 App Replies with Keys "];
- * |||;
- * APP rbox APP [label = "Load Peripheral Keys"];
- * APP=>SD [label = "sd_ble_gap_sec_info_reply(div, LTK)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "LL Encryption Response", textcolor="#000080", linecolor="#000080"];
- * APP rbox CENTRAL [label = "Encrypted with LTK"];
- * APP<<=SD [label = "BLE_GAP_EVT_CONN_SEC_UPDATE"];
- * |||;
- * --- [label = " Variant #2 App Replies without Keys "];
- * |||;
- * APP=>SD [label = "sd_ble_gap_sec_info_reply(NULL)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "LL Reject Ind: Pin or Key Missing", textcolor="#000080", linecolor="#000080"];
- * APP rbox CENTRAL [label = "Link Not Encrypted"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PERIPH_SEC_MSC GAP Peripheral Initiated Security Establishment
- * @msc
- * hscale = "1.5";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gap_authenticate(params)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Security Request", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #1 Central initiates Security Establishment "];
- * |||;
- * APP rbox CENTRAL [label="Encryption or Pairing/Bonding initiated by Central"];
- * |||;
- * --- [label = " Variant #2 Central ignores "];
- * |||;
- * ...;
- * |||;
- * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT"];
- * |||;
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_KS_OUT_OF_RANGE_MSC GAP Failed Pairing: Keysize out of supported range
- * This occurs if the min key size offered by the peer is above 16, or max key size below 7.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Invalid params, error_src: local}"];
- * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_KS_TOO_SMALL_MSC GAP Failed Pairing: Keysize too small
- * This occurs if the max key size offered by the peer is below the min key size specified by
- * the app.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * SD<:CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Enc key size, error_src: local}"];
- * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_APP_ERROR_MSC GAP Failed Pairing: Pairing aborted by the application
- * When the application detects that the pairing should not be performed, for example an
- * insufficient IO combination, it can use sd_ble_gap_sec_params_reply() to send
- * SMP Pairing failed to the peer.
- *
- * When the stack handles the response from the application it will also validate 
- * the passkey (SMP_STC_PASSKEY_ENTRY_FAILED). If any error is detected it will be
- * reported when sd_ble_gap_sec_params_reply() is called. 
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"];
- * SD abox APP [label="Stack looks for errors", textbgcolor="#7f7fff"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(<code from application>)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: <code from application>, error_src: local}"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_CONFIRM_FAIL_MSC GAP Failed Pairing: Confirm failed
- * This occurs if the random value doesn't match, usually because the user entered a wrong pin
- * or out of band data was missing.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST {central_params: mitm, display}"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS, periph_params: mitm, keyboard)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * SD<:CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"];
- * SD:>CENTRAL [label = "SMP Pairing Confirm", textcolor="#000080", linecolor="#000080"];
- * SD<:CENTRAL [label = "SMP Pairing Random", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Confirm value, error_src: local}"];
- * SD:>CENTRAL [label = "SMP Pairing failed", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_REMOTE_PAIRING_FAIL_MSC GAP Failed Pairing: Pairing failed from master
- * SMP Pairing Failed may be sent from the master at various times. The application should
- * prepare for this and gracefully handle the event.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * SD<:CENTRAL [label = "SMP Pairing Failed", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: <remote_reason>, error_src: remote}"];
- * @endmsc
- *
- * @defgroup BLE_GAP_PAIRING_TIMEOUT_MSC GAP Failed Pairing: Timeout
- * This occurs if the central device doesn't continue the pairing sequence within 30 seconds.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * SD<:CENTRAL [label = "SMP Pairing Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GAP_EVT_SEC_PARAMS_REQUEST"];
- * APP=>SD [label = "sd_ble_gap_sec_params_reply(SUCCESS)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "SMP Pairing Response", textcolor="#000080", linecolor="#000080"];
- * ---  [ label = "Wait 30 sec" ];
- * APP<<=SD [label = "BLE_GAP_EVT_AUTH_STATUS {auth_status: Timeout, error_src: local}"];
-
- * @endmsc
- *
- * @defgroup BLE_GAP_SECURITY_TIMEOUT_MSC GAP Authenticate request: Timeout
- * This occurs if the central device doesn't continue the pairing sequence after
- * the security procedure timeout.
- * @msc
- * hscale = "2";
- * APP,SD,CENTRAL;
- * |||;
- * APP rbox CENTRAL [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gap_authenticate(..., ble_gap_sec_params_t*)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>CENTRAL [label = "Security Request", textcolor="#000080", linecolor="#000080"];
-  ---  [ label = "After req_timeout (in ble_gap_sec_params_t)" ];
- * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {error_src: BLE_GAP_TIMEOUT_SRC_SECURITY_REQUEST}"];
- * @endmsc
- *
- * @}
- * @}
- */
-
-/**
- * @addtogroup BLE_GATTC 
- * @{
- * @defgroup BLE_GATTC_MSC Message Sequence Charts
- * @{
- * @defgroup BLE_GATTC_PRIM_SRVC_DISC_MSC GATTC Primary Service Discovery
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * --- [label = " Variant #1 Discover All Services "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle, NULL)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Group Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"];
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N, NULL)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Group Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"];
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N + M, NULL)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Group Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"];
- * |||;
- * --- [label = " Variant #2 Discover a Specific Service "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle, uuid)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Find By Type Value Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"];
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N, uuid)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Find By Type Value Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {SUCCESS, services}"];
- * APP=>SD [label = "sd_ble_gattc_primary_services_discover(handle + N + M, uuid)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find By Type Value Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_REL_DISC_MSC GATTC Relationship Discovery
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {SUCCESS, includes}"];
- * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range + N)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {SUCCESS, includes}"];
- * APP=>SD [label = "sd_ble_gattc_relationships_discover(handle_range + N + M)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_REL_DISC_RSP {ATTRIBUTE_NOT_FOUND}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_CHAR_DISC_MSC GATTC Characteristic Discovery
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {SUCCESS, chars}"];
- * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range + N)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {SUCCESS, chars}"];
- * APP=>SD [label = "sd_ble_gattc_characteristics_discover(handle_range + N + M)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_DISC_RSP {ATTRIBUTE_NOT_FOUND}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_DESC_DISC_MSC GATTC Descriptor Discovery
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Find Information Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {SUCCESS, descs}"];
- * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range + N)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Find Information Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {SUCCESS, descs}"];
- * APP=>SD [label = "sd_ble_gattc_descriptors_discover(handle_range + N + M)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Find Information Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_DESC_DISC_RSP {ATTRIBUTE_NOT_FOUND}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_READ_UUID_MSC GATTC Read Characteristic Value by UUID
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {SUCCESS, char_values}"];
- * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range + N)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read By Type Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {SUCCESS, char_values}"];
- * APP=>SD [label = "sd_ble_gattc_char_value_by_uuid_read(uuid, handle_range + N + M)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read By Type Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Attribute Not Found", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP {ATTRIBUTE_NOT_FOUND}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_VALUE_READ_MSC GATTC Characteristic or Descriptor Value Read
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * --- [label = " Variant #1 offset == 0 "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_read(handle, 0)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"];
- * |||;
- * --- [label = " Variant #2 offset != 0 "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_read(handle, offset)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read Blob Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"];
- * APP=>SD [label = "sd_ble_gattc_read(handle, offset + N)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read Blob Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {SUCCESS, value}"];
- * APP=>SD [label = "sd_ble_gattc_read(handle, offset + N + M + 1)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Blob Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Invalid Offset", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_READ_RSP {INVALID_OFFSET}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_READ_MULT_MSC GATTC Read Multiple Characteristic Values
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * --- [label = " Variant #1 Successful request "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_char_values_read(handles)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Multiple Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Read Multiple Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VALS_READ_RSP {SUCCESS, char_values}"];
- * |||;
- * --- [label = " Variant #2 Failing request (invalid handle) "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_char_values_read(handles)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Multiple Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Error Response: Invalid Handle", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_CHAR_VALS_READ_RSP {INVALID_HANDLE, error_handle=<invalid handle>}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_VALUE_WRITE_MSC GATTC Characteristic or Descriptor Value Write
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * --- [label = " Variant #1 write_op == BLE_GATT_OP_WRITE_CMD "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_write(handle, value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Write Command", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_TX_COMPLETE"];
- * |||;
- * --- [label = " Variant #2 write_op == BLE_GATT_OP_WRITE_REQ "];
- * |||;
- * APP=>SD [label = "sd_ble_gattc_write(handle, value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Write Request", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_WRITE_RSP {SUCCESS}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_HVI_MSC GATTC Handle Value Indication
- * <b> GATTC Handle Value Indication MSC </b>
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD<:PEER [label = "ATT Handle Value Indication", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_HVX {INDICATION, data}"];
- * APP=>SD [label = "sd_ble_gattc_hv_confirm(handle)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_HVN_MSC GATTC Handle Value Notification
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD<:PEER [label = "ATT Handle Value Notification", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTC_EVT_HVX {NOTIFICATION, data}"];
- * @endmsc
- *
- * @defgroup BLE_GATTC_TIMEOUT_MSC GATTC Timeout
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox PEER [label="Any GATTC API used"];
- * SD:>PEER [label = "ATT Packet", textcolor="#000080", linecolor="#000080"];
- * APP note PEER [label = "No Response from Peer"];
- * |||;
- * ...;
- * |||;
- * SD box SD [label="Timeout"];
- * APP<<=SD [label = "BLE_GATTC_EVT_TIMEOUT {source}"];
- * APP rbox PEER [label="No additional ATT Traffic Allowed", textbgcolour="#ff7f7f"];
- * APP=>SD [label = "Any API call"];
- * APP<<SD [label = "NRF_ERROR_BUSY"];
- * @endmsc
- * @}
- * @}
- */
-
-/**
- * @addtogroup BLE_GATTS 
- * @{
- * @defgroup BLE_GATTS_MSC Message Sequence Charts
- * @{
- * @defgroup BLE_GATTS_ATT_TABLE_POP_MSC GATTS ATT Table Population
- * @msc
- * hscale = "1.5";
- * APP,SD;
- * |||;
- * APP=>SD [label = "sd_ble_gatts_service_add(uuid#1)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_srvc#1}"];
- * APP=>SD [label = "sd_ble_gatts_characteristic_add(handle_srvc#1, char_md, value)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_char#1, ...}"];
- * APP=>SD [label = "sd_ble_gatts_descriptor_add(handle_char#1, value)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_desc#1}"];
- * APP=>SD [label = "sd_ble_gatts_descriptor_add(handle_char#1, value)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_desc#2}"];
- * APP=>SD [label = "sd_ble_gatts_characteristic_add(handle_srvc#1, char_md, value)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_char#2, ...}"];
- * APP=>SD [label = "sd_ble_gatts_descriptor_add(handle_char#2, value)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_desc#3}"];
- * APP=>SD [label = "sd_ble_gatts_service_add(uuid#2)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_srvc#2}"];
- * APP=>SD [label = "sd_ble_gatts_include_add(handle_srvc#2, handle_srvc#1)"];
- * APP<<SD [label = "{NRF_SUCCESS, handle_inc#1}"];
- * |||;
- * ...;
- * |||;
- * @endmsc
- *
- * @defgroup BLE_GATTS_READ_REQ_NO_AUTH_MSC Read Request without Authorization
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD<:PEER [label = "ATT Read Request", textcolor="#000080", linecolor="#000080"];
- * SD:>PEER [label = "ATT Read Response", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_WRITE_REQ_NO_AUTH_MSC GATTS Write Request without Authorization
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD<:PEER [label = "ATT Write Request", textcolor="#000080", linecolor="#000080"];
- * SD:>PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {WRITE_REQ, data}"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_WRITE_CMD_NO_AUTH_MSC GATTS Write Command with or without Authorization
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD<:PEER [label = "ATT Write Command", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {WRITE_CMD, data}"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_READ_REQ_AUTH_MSC GATTS Read Request with Authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * SD<:PEER [label = "ATT Read Request", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {READ, current_value}"];
- * --- [label = " Variant #1 App Authorizes "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(SUCCESS, app_value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD rbox SD [label="Value in ATT Table: app_value"];
- * SD:>PEER [label = "ATT Read Response {app_value}", textcolor="#000080", linecolor="#000080"];
- * --- [label = " Variant #2 App Disallows "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(READ_NOT_PERMITTED)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Error Response", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_WRITE_REQ_AUTH_MSC GATTS Write Request with Authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * SD<:PEER [label = "ATT Write Request {peer_data}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, peer_value}"];
- * --- [label = " Variant #1 App Authorizes "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(SUCCESS)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD rbox SD [label="Value in ATT Table: peer_data"];
- * SD:>PEER [label = "ATT Write Response", textcolor="#000080", linecolor="#000080"];
- * --- [label = " Variant #2 App Disallows "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE_NOT_PERMITTED)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Error Response", textcolor="#000080", linecolor="#000080"];
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC GATTS Queued Writes: Stack handled, no attributes require authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"];
- * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #1 Attribute Values validation passed "];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"];
- * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="App parses the memory it provided"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * --- [label = " Variant #2 Attribute Values validation failed "];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Error Response {Invalid Value Length / Offset}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * --- [label = " Variant #3 Peer cancels operation "];
- * SD<:PEER [label = "ATT Execute Write Request {CANCEL}", textcolor="#000080", linecolor="#000080"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * @endmsc
- *
- * @defgroup BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC GATTS Queued Writes: Stack handled, one or more attributes require authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"];
- * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"];
- * |||;
- * --- [label = " Variant #1 App Authorizes both Prepare Write and Execute Write"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="App parses the memory it provided"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * --- [label = " Variant #2 App Disallows Prepare Write and Authorizes Execute Write "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INSUF_AUTHORIZATION)"];
- * SD:>PEER [label = "ATT Error Response {Insufficient Authorization}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="App parses the memory it provided"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * --- [label = " Variant #3 App Authorizes Prepare Write and Disallows Execute Write "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="App parses the memory it provided"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, APP_ERROR_CODE)"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Error Response {APP_ERROR_CODE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC GATTS Queued Writes: App handled, no attributes require authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"];
- * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"];
- * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"];
- * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * |||;
- * --- [label = " Variant #1 Attribute values in stack memory (VLOC_STACK), attribute values validation passed "];
- * APP=>SD [label = "sd_ble_gatts_value_set {handle_1, offset_1, peer_value_1}"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_gatts_value_set {handle_2, offset_2, peer_value_2}"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #2 Attribute values in user memory (VLOC_USER), attribute values validation passed "];
- * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"];
- * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #3 Attribute values validation failed "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INVALID_OFFSET)"];
- * APP rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Error Response {Invalid Offset}", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC GATTS Queued Writes: App handled, one or more attributes require authorization
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox APP [label="Values in ATT Table (in user memory):\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"];
- * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"];
- * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"];
- * |||;
- * --- [label = " Variant #1 App Authorizes both Prepare Write and Execute Write"];
- * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"];
- * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: peer_value_2"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #2 App Disallows Prepare Write and Authorizes Execute Write "];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, INSUF_AUTHORIZATION)"];
- * SD:>PEER [label = "ATT Error Response {Insufficient Authorization}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="Application traverses its queue and executes the write operations (memcpy)"];
- * APP rbox APP [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * |||;
- * --- [label = " Variant #3 App Authorizes Prepare Write and Disallows Execute Write "];
- * APP rbox APP [label="App queues {handle_2, offset_2, peer_value_2}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, APP_ERROR_CODE)"];
- * APP rbox APP [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Error Response {APP_ERROR_CODE}", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC GATTS Queued Writes: Prepare Queue Full
- * @msc
- * hscale = "2";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: current_value_1\nhandle_2: current_value_2"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_REQUEST {BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES}"];
- * |||;
- * --- [label = " Variant #1 Stack handled "];
- * APP=>SD [label = "sd_ble_user_mem_reply {user_mem_block}"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * SD:>PEER [label = "ATT Error Response {Prepare Queue Full}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"];
- * APP<<=SD [label = "BLE_GATTS_EVT_WRITE {EXEC_WRITE_REQ_NOW}"];
- * APP rbox APP [label="App parses the memory it provided"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_USER_MEM_RELEASE {user_mem_block}"];
- * |||;
- * --- [label = " Variant #2 App handled "];
- * APP=>SD [label = "sd_ble_user_mem_reply {NULL}"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_1, offset_1, peer_value_1}"];
- * APP rbox APP [label="App queues {handle_1, offset_1, peer_value_1}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD:>PEER [label = "ATT Prepare Write Response {handle_1, offset_1, peer_value_1}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Prepare Write Request {handle_2, offset_2, peer_value_2}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, PREP_WRITE_REQ, handle_2, offset_2, peer_value_2}"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, PREPARE_QUEUE_FULL)"];
- * SD:>PEER [label = "ATT Error Response {Prepare Queue Full}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Execute Write Request {WRITE}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST {WRITE, EXEC_WRITE_REQ_NOW}"];
- * APP=>SD [label = "sd_ble_gatts_value_set {handle_1, offset_1, peer_value_1}"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * APP=>SD [label = "sd_ble_gatts_rw_authorize_reply(WRITE, SUCCESS)"];
- * SD rbox SD [label="Values in ATT Table:\nhandle_1: peer_value_1\nhandle_2: current_value_2"];
- * SD:>PEER [label = "ATT Execute Write Response", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_HVI_MSC GATTS Handle Value Indication
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox PEER [label="Indications Enabled in CCCD"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * APP=>SD [label = "sd_ble_gatts_hvx(INDICATION, app_value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD rbox SD [label="Value in ATT Table: app_value"];
- * SD:>PEER [label = "ATT Handle Value Indication {app_value}", textcolor="#000080", linecolor="#000080"];
- * --- [label = " Variant #1 Peer Confirms "];
- * SD<:PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_HVC"];
- * --- [label = " Variant #2 Peer Ignores "];
- * |||;
- * ...;
- * |||;
- * SD box SD [label="Timeout"];
- * APP<<=SD [label = "BLE_GATTS_EVT_TIMEOUT"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_HVN_MSC GATTS Handle Value Notification
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox PEER [label="Notifications Enabled in CCCD"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * APP=>SD [label = "sd_ble_gatts_hvx(NOTIFICATION, app_value)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD rbox SD [label="Value in ATT Table: app_value"];
- * SD:>PEER [label = "ATT Handle Value Notification {app_value}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_TX_COMPLETE"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_HVX_DISABLED_MSC GATTS Handle Value Indication or Notification disabled
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox PEER [label="Indications and Notifications Disabled in CCCD"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * APP=>SD [label = "sd_ble_gatts_hvx(INDICATION or NOTIFICATION, app_value)"];
- * APP<<SD [label = "NRF_ERROR_INVALID_STATE"];
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC GATTS Handle Value Indication or Notification with System Attributes Missing
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP rbox PEER [label="System Attributes Uninitialized"];
- * |||;
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * APP=>SD [label = "sd_ble_gatts_hvx(INDICATION or NOTIFICATION, app_value)"];
- * APP<<SD [label = "BLE_ERROR_GATTS_SYS_ATTR_MISSING"];
- * SD rbox SD [label="Value in ATT Table: current_value"];
- * APP=>SD [label = "sd_ble_gatts_sys_attr_set()"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * ...;
- * @endmsc
- *
- * @defgroup BLE_GATTS_SC_MSC GATTS Service Changed
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox SD [label="Entries added to the ATT Table between handles N and M"];
- * |||;
- * APP rbox PEER [label="Connection Established with a Bonded Peer"];
- * |||;
- * APP=>SD [label = "sd_ble_gatts_service_changed(N, M)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Handle Value Indication {N, M}", textcolor="#000080", linecolor="#000080"];
- * SD<:PEER [label = "ATT Handle Value Confirmation", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_SC_CONFIRM"];
- * |||;
- * SD rbox PEER [label="Service Discovery"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC GATTS System Attributes Handling: Unknown Peer
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established with an Unknown Peer"];
- * |||;
- * SD<:PEER [label = "ATT Read Request {sys_attr_handle}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_SYS_ATTR_MISSING"];
- * APP=>SD [label = "sd_ble_gatts_sys_attr_set(NULL)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Response {sys_attr_value}", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- *
- * @defgroup BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC GATTS System Attributes Handling: Bonded Peer
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP rbox PEER [label="Connection Established with a Bonded Peer"];
- * |||;
- * APP rbox PEER [label="ATT Traffic"];
- * |||;
- * APP rbox PEER [label="Connection Terminated"];
- * APP<<=SD [label = "BLE_GAP_EVT_DISCONNECTED {reason}"];
- * |||;
- * APP=>SD [label = "sd_ble_gatts_sys_attr_get()"];
- * APP<<SD [label = "{NRF_SUCCESS, sys_attr_data}"];
- * APP rbox APP [label="Store System Attributes"];
- * |||;
- * APP rbox SD [label="Shut down IC"];
- * |||;
- * APP rbox SD [label="Power up IC"];
- * |||;
- * APP rbox PEER [label="Connection Established with the Bonded Peer"];
- * SD<:PEER [label = "ATT Read Request {sys_attr_handle}", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_GATTS_EVT_SYS_ATTR_MISSING"];
- * APP rbox APP [label="Load System Attributes"];
- * APP=>SD [label = "sd_ble_gatts_sys_attr_set(sys_attr_data)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "ATT Read Response {sys_attr_value}", textcolor="#000080", linecolor="#000080"];
- * @endmsc
- * @}
- *
- * @addtogroup BLE_GATTS_QUEUED_WRITES_USER_MEM User memory layout for Queued Writes
- * @{ 
- *  The following table shows the memory layout used by the SoftDevice to queue a Queued Write operation (Prepare Write ATT packet) in user memory:
- *
- *  <table style="border:1px solid black;border-collapse:collapse;">
- *  <caption>Queued Write</caption>
- *  <tr>
- *  <th style="border:1px solid black;padding:5px;">Parameter</th>
- *  <th style="border:1px solid black;padding:5px;">Size (octets)</th>
- *  <th style="border:1px solid black;padding:5px;">Description</th>
- *  </tr>
- *  <tr>
- *  <td style="border:1px solid black;padding:5px;">Handle</td>
- *  <td style="border:1px solid black;padding:5px;">2</td>
- *  <td style="border:1px solid black;padding:5px;">Attribute Handle</td>
- *  </tr>
- *  <tr>
- *  <td style="border:1px solid black;padding:5px;">Offset</td>
- *  <td style="border:1px solid black;padding:5px;">2</td>
- *  <td style="border:1px solid black;padding:5px;">Value Offset</td>
- *  </tr>
- *  <tr>
- *  <td style="border:1px solid black;padding:5px;">Length</td>
- *  <td style="border:1px solid black;padding:5px;">2</td>
- *  <td style="border:1px solid black;padding:5px;">Value Length</td>
- *  </tr>
- *  <tr>
- *  <td style="border:1px solid black;padding:5px;">Value</td>
- *  <td style="border:1px solid black;padding:5px;">Length</td>
- *  <td style="border:1px solid black;padding:5px;">Attribute Value</td>
- *  </tr>
- *  </table>
- *
- *  The application can parse the array of Queued Write instances at any time, but it is recommended to do so whenever an Execute Write ATT packet 
- *  has been received over the air. See the GATT Server Queued Writes MSCs for more details.
- *  The array will be terminated by an Queued Write instance with its handle set to @ref BLE_GATT_HANDLE_INVALID.
- * @}
- * @}
- */
-
-/**
- * @addtogroup BLE_L2CAP 
- * @{
- * @defgroup BLE_L2CAP_MSC Message Sequence Charts
- * @{
- * @defgroup BLE_L2CAP_API_MSC L2CAP API
- * @msc
- * hscale = "1.5";
- * APP,SD,PEER;
- * |||;
- * APP=>SD [label = "sd_ble_l2cap_cid_register(cid)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * |||;
- * APP rbox PEER [label="Connection Established"];
- * |||;
- * APP=>SD [label = "sd_ble_l2cap_tx(data)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "L2CAP packet", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_EVT_TX_COMPLETE"];
- * SD<:PEER [label = "L2CAP packet", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_L2CAP_EVT_RX"];
- * SD<:PEER [label = "L2CAP packet", textcolor="#000080", linecolor="#000080"];
- * APP<<=SD [label = "BLE_L2CAP_EVT_RX"];
- * |||;
- * APP=>SD [label = "sd_ble_l2cap_tx(data)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * SD:>PEER [label = "L2CAP packet", textcolor="#000080", linecolor="#000080"];
- * SD=>>APP [label = "BLE_EVT_TX_COMPLETE"];
- * |||;
- * APP rbox PEER [label="Terminate Connection"];
- * |||;
- * APP=>SD [label = "sd_ble_l2cap_cid_unregister(cid)"];
- * APP<<SD [label = "NRF_SUCCESS"];
- * @endmsc
- * @}
- * @}
- */
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble.h
deleted file mode 100644
index 86d5075983..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble.h
+++ /dev/null
@@ -1,419 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_COMMON BLE SoftDevice Common
-  @{
-  @defgroup ble_api Events, type definitions and API calls
-  @{
-
-  @brief Module independent events, type definitions and API calls for the S110 SoftDevice.
-
- */
-
-#ifndef BLE_H__
-#define BLE_H__
-
-#include "ble_ranges.h"
-#include "ble_types.h"
-#include "ble_gap.h"
-#include "ble_l2cap.h"
-#include "ble_gatt.h"
-#include "ble_gattc.h"
-#include "ble_gatts.h"
-
-/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations
- * @{ */
-
-/**
- * @brief Common API SVC numbers.
- */
-enum BLE_COMMON_SVCS
-{
-  SD_BLE_ENABLE = BLE_SVC_BASE,         /**< Enable and initialize the BLE stack */
-  SD_BLE_EVT_GET,                       /**< Get an event from the pending events queue. */
-  SD_BLE_TX_BUFFER_COUNT_GET,           /**< Get the total number of available application transmission buffers from the stack. */
-  SD_BLE_UUID_VS_ADD,                   /**< Add a Vendor Specific UUID. */
-  SD_BLE_UUID_DECODE,                   /**< Decode UUID bytes. */
-  SD_BLE_UUID_ENCODE,                   /**< Encode UUID bytes. */
-  SD_BLE_VERSION_GET,                   /**< Get the local version information (company id, Link Layer Version, Link Layer Subversion). */
-  SD_BLE_USER_MEM_REPLY,                /**< User Memory Reply. */
-  SD_BLE_OPT_SET,                       /**< Set a BLE option. */
-  SD_BLE_OPT_GET,                       /**< Get a BLE option. */
-};
-
-/**@brief Common Option IDs.
- * IDs that uniquely identify a common option.
- */
-enum BLE_COMMON_OPTS
-{
-  BLE_COMMON_OPT_RADIO_CPU_MUTEX = BLE_OPT_BASE    /**< Radio CPU mutex option. @ref ble_common_opt_radio_cpu_mutex_t */
-};
-/** @} */
-
-/** @addtogroup BLE_COMMON_DEFINES Defines
- * @{ */
-
-/** @brief  Required pointer alignment for BLE Events.
-*/
-#define BLE_EVTS_PTR_ALIGNMENT    4
-
-/** @defgroup BLE_USER_MEM_TYPES User Memory Types
- * @{ */
-#define BLE_USER_MEM_TYPE_INVALID               0x00  /**< Invalid User Memory Types. */
-#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES   0x01  /**< User Memory for GATTS queued writes. */
-/** @} */
-
-/** @brief  Maximum number of Vendor Specific UUIDs.
-*/
-#define BLE_UUID_VS_MAX_COUNT     10
-
-/** @} */
-
-/** @addtogroup BLE_COMMON_STRUCTURES Structures
- * @{ */
-
-/**
- * @brief BLE Module Independent Event IDs.
- */
-enum BLE_COMMON_EVTS
-{
-  BLE_EVT_TX_COMPLETE  = BLE_EVT_BASE,  /**< Transmission Complete. */
-  BLE_EVT_USER_MEM_REQUEST,             /**< User Memory request. */
-  BLE_EVT_USER_MEM_RELEASE              /**< User Memory release. */
-};
-
-/**@brief User Memory Block. */
-typedef struct
-{
-  uint8_t*          p_mem;      /**< Pointer to the start of the user memory block. */
-  uint16_t          len;        /**< Length in bytes of the user memory block. */
-} ble_user_mem_block_t;
-
-/**
- * @brief TX complete event.
- */
-typedef struct
-{
-  uint8_t count;                        /**< Number of packets transmitted. */
-} ble_evt_tx_complete_t;
-
-/**@brief Event structure for BLE_EVT_USER_MEM_REQUEST. */
-typedef struct
-{
-  uint8_t                     type;     /**< User memory type, see @ref BLE_USER_MEM_TYPES. */
-} ble_evt_user_mem_request_t;
-
-/**@brief Event structure for BLE_EVT_USER_MEM_RELEASE. */
-typedef struct
-{
-  uint8_t                     type;       /**< User memory type, see @ref BLE_USER_MEM_TYPES. */
-  ble_user_mem_block_t        mem_block;  /**< User memory block */
-} ble_evt_user_mem_release_t;
-
-
-/**@brief Event structure for events not associated with a specific function module. */
-typedef struct
-{
-  uint16_t conn_handle;                 /**< Connection Handle on which this event occured. */
-  union
-  {
-    ble_evt_tx_complete_t           tx_complete;        /**< Transmission Complete. */
-    ble_evt_user_mem_request_t      user_mem_request;   /**< User Memory Request Event Parameters. */
-    ble_evt_user_mem_release_t      user_mem_release;   /**< User Memory Release Event Parameters. */
-  } params;
-} ble_common_evt_t;
-
-/**@brief BLE Event header. */
-typedef struct
-{
-  uint16_t evt_id;                      /**< Value from a BLE_<module>_EVT series. */
-  uint16_t evt_len;                     /**< Length in octets excluding this header. */
-} ble_evt_hdr_t;
-
-/**@brief Common BLE Event type, wrapping the module specific event reports. */
-typedef struct
-{
-  ble_evt_hdr_t header;                 /**< Event header. */
-  union
-  {
-    ble_common_evt_t  common_evt;         /**< Common Event, evt_id in BLE_EVT_* series. */
-    ble_gap_evt_t     gap_evt;            /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */
-    ble_l2cap_evt_t   l2cap_evt;          /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */
-    ble_gattc_evt_t   gattc_evt;          /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */
-    ble_gatts_evt_t   gatts_evt;          /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */
-  } evt;
-} ble_evt_t;
-
-
-/**
- * @brief Version Information.
- */
-typedef struct
-{
-  uint8_t   version_number;             /**< Link Layer Version number for BT 4.1 spec is 7 (https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer). */
-  uint16_t  company_id;                 /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */
-  uint16_t  subversion_number;          /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */
-} ble_version_t;
-
-/**@brief Mutual exclusion of radio activity and CPU execution.
- *
- *        This option configures the application's access to the CPU when the radio is active. The
- *        application can configure itself to have access to the CPU while the radio is active.
- *        By default, the application will be not able to share CPU time with the SoftDevice
- *        during radio activity. This parameter structure is used together with @ref sd_ble_opt_set
- *        to configure the @ref BLE_COMMON_OPT_RADIO_CPU_MUTEX option.
- *
- * @note  Note that the mutual exclusion of radio activity and CPU execution should remain enabled
- *        when running the SoftDevice on hardware affected by PAN #44 "CCM may exceed real time 
- *        requirements"and PAN #45 "AAR may exceed real time requirements".
- *
- * @note  @ref sd_ble_opt_get is not supported for this option.
- *
- */
-typedef struct
-{
-  uint8_t enable : 1;                          /**< Enable mutual exclusion of radio activity and the CPU execution. */
-} ble_common_opt_radio_cpu_mutex_t;
-
-/**@brief Option structure for common options. */
-typedef union
-{
-  ble_common_opt_radio_cpu_mutex_t  radio_cpu_mutex;        /**< Parameters for the option for the mutual exclusion of radio activity and CPU execution. */
-} ble_common_opt_t;
-
-/**@brief Common BLE Option type, wrapping the module specific options. */
-typedef union
-{
-  ble_common_opt_t  common_opt;         /**< Common option, opt_id in BLE_COMMON_OPT_* series. */
-  ble_gap_opt_t     gap;                /**< GAP option, opt_id in BLE_GAP_OPT_* series. */
-} ble_opt_t;
-
-/**
- * @brief BLE GATTS init options
- */
-typedef struct
-{
-  ble_gatts_enable_params_t  gatts_enable_params; /**< GATTS init options @ref ble_gatts_enable_params_t. */
-} ble_enable_params_t;
-
-/** @} */
-
-/** @addtogroup BLE_COMMON_FUNCTIONS Functions
- * @{ */
-
-/**@brief Enable the bluetooth stack
- *
- * @param[in] p_ble_enable_params Pointer to ble_enable_params_t
- *
- * @details This call initializes the bluetooth stack, no other BLE related call can be called before this one has been executed.
- *
- * @return @ref NRF_SUCCESS BLE stack has been initialized successfully
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied.
- */
-SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(ble_enable_params_t * p_ble_enable_params));
-
-/**@brief Get an event from the pending events queue.
- *
- * @param[in] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. This buffer <b>must be 4-byte aligned in memory</b>.
- * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length.
- *
- * @details This call allows the application to pull a BLE event from the BLE stack. The application is signalled that an event is
- * available from the BLE Stack by the triggering of the SD_EVT_IRQn interrupt (mapped to IRQ 22).
- * The application is free to choose whether to call this function from thread mode (main context) or directly from the Interrupt Service Routine
- * that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher priority than the application, this function should be called
- * in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the stack.
- * Failure to do so could potentially leave events in the internal queue without the application being aware of this fact.
- * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to be copied into
- * application memory. If the buffer provided is not large enough to fit the entire contents of the event, @ref NRF_ERROR_DATA_SIZE will be returned
- * and the application can then call again with a larger buffer size.
- * Please note that because of the variable length nature of some events, sizeof(ble_evt_t) will not always be large enough to fit certain events,
- * and so it is the application's responsability to provide an amount of memory large enough so that the relevant event is copied in full.
- * The application may "peek" the event length by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return.
- *
- * @note The pointer supplied must be aligned to the extend defined by @ref BLE_EVTS_PTR_ALIGNMENT
- *
- * @return @ref NRF_SUCCESS Event pulled and stored into the supplied buffer.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied.
- * @return @ref NRF_ERROR_NOT_FOUND No events ready to be pulled.
- * @return @ref NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer.
- */
-SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t* p_dest, uint16_t *p_len));
-
-
-/**@brief Get the total number of available application transmission buffers in the BLE stack.
- *
- * @details This call allows the application to obtain the total number of
- *          transmission buffers available for application data. Please note that
- *          this does not give the number of free buffers, but rather the total amount of them.
- *          The application has two options to handle its own application transmission buffers:
- *          - Use a simple arithmetic calculation: at boot time the application should use this function
- *          to find out the total amount of buffers available to it and store it in a variable.
- *          Every time a packet that consumes an application buffer is sent using any of the
- *          exposed functions in this BLE API, the application should decrement that variable.
- *          Conversely, whenever a @ref BLE_EVT_TX_COMPLETE event is received by the application
- *          it should retrieve the count field in such event and add that number to the same
- *          variable storing the number of available packets.
- *          This mechanism allows the application to be aware at any time of the number of
- *          application packets available in the BLE stack's internal buffers, and therefore
- *          it can know with certainty whether it is possible to send more data or it has to
- *          wait for a @ref BLE_EVT_TX_COMPLETE event before it proceeds.
- *          - Choose to simply not keep track of available buffers at all, and instead handle the
- *          @ref BLE_ERROR_NO_TX_BUFFERS error by queueing the packet to be transmitted and
- *          try again as soon as a @ref BLE_EVT_TX_COMPLETE event arrives.
- *
- *          The API functions that <b>may</b> consume an application buffer depending on
- *          the parameters supplied to them can be found below:
- *
- *          - @ref sd_ble_gattc_write (write witout response only)
- *          - @ref sd_ble_gatts_hvx (notifications only)
- *          - @ref sd_ble_l2cap_tx (all packets)
- *
- * @param[out] p_count Pointer to a uint8_t which will contain the number of application transmission buffers upon
- *                     successful return.
- *
- * @return @ref NRF_SUCCESS Number of application transmission buffers retrieved successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- */
-SVCALL(SD_BLE_TX_BUFFER_COUNT_GET, uint32_t, sd_ble_tx_buffer_count_get(uint8_t* p_count));
-
-
-/**@brief Add a Vendor Specific UUID.
- *
- * @details This call enables the application to add a vendor specific UUID to the BLE stack's table,
- *          for later use all other modules and APIs. This then allows the application to use the shorter,
- *          24-bit @ref ble_uuid_t format when dealing with both 16-bit and 128-bit UUIDs without having to
- *          check for lengths and having split code paths. The way that this is accomplished is by extending the
- *          grouping mechanism that the Bluetooth SIG standard base UUID uses for all other 128-bit UUIDs. The
- *          type field in the @ref ble_uuid_t structure is an index (relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN)
- *          to the table populated by multiple calls to this function, and the uuid field in the same structure
- *          contains the 2 bytes at indices 12 and 13. The number of possible 128-bit UUIDs available to the
- *          application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536,
- *          although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array.
- *
- * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by
- * the 16-bit uuid field in @ref ble_uuid_t.
- *
- *
- * @param[in]  p_vs_uuid    Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding
- *                          bytes 12 and 13.
- * @param[out] p_uuid_type  Pointer where the type field in @ref ble_uuid_t corresponding to this UUID will be stored.
- *
- * @return @ref NRF_SUCCESS Successfully added the Vendor Specific UUID.
- * @return @ref NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid.
- * @return @ref NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs.
- * @return @ref NRF_ERROR_FORBIDDEN If p_vs_uuid has already been added to the VS UUID table.
- */
-SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const * const p_vs_uuid, uint8_t * const p_uuid_type));
-
-
-/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure.
- *
- * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared
- * to the corresponding ones in each entry of the table of vendor specific UUIDs pouplated with @ref sd_ble_uuid_vs_add
- * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index
- * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type.
- *
- * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE.
- *
- * @param[in]      uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes).
- * @param[in]      p_uuid_le   Pointer pointing to little endian raw UUID bytes.
- * @param[in,out]  p_uuid      Pointer to a @ref ble_uuid_t structure to be filled in.
- *
- * @return @ref NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_LENGTH Invalid UUID length.
- * @return @ref NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs.
- */
-SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const * const p_uuid_le, ble_uuid_t * const p_uuid));
-
-
-/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit).
- *
- * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validitiy and size of p_uuid is computed.
- *
- * @param[in]      p_uuid        Pointer to a @ref ble_uuid_t structure that will be encoded into bytes.
- * @param[out]     p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes).
- * @param[out]     p_uuid_le     Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored.
- *
- * @return @ref NRF_SUCCESS Successfully encoded into the buffer.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid UUID type.
- */
-SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const * const p_uuid, uint8_t * const  p_uuid_le_len, uint8_t * const p_uuid_le));
-
-
-/**@brief Get Version Information.
- *
- * @details This call allows the application to get the BLE stack version information.
- *
- * @param[in] p_version Pointer to ble_version_t structure to be filled in.
- *
- * @return @ref NRF_SUCCESS  Version information stored successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY The stack is busy (typically doing a locally-initiated disconnection procedure).
- */
-SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t * p_version));
-
-
-/**@brief Provide a user memory block.
- *
- * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application.
- *
- * @param[in] conn_handle                 Connection handle.
- * @param[in] p_block                     Pointer to a user memory block structure.
- *
- * @return @ref NRF_SUCCESS               Successfully queued a response to the peer.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_STATE   No execute write request pending.
- */
-SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t *p_block));
-
-
-/**@brief Set a BLE option.
- *
- * @details This call allows the application to set the value of an option.
- *
- * @param[in] opt_id Option ID.
- * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value.
- *
- * @retval ::NRF_SUCCESS  Option set successfully.
- * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints.
- * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time.
- * @retval ::NRF_ERROR_BUSY The stack is busy or the previous procedure has not completed.
- */
-SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt));
-
-
-/**@brief Get a BLE option.
- *
- * @details This call allows the application to retrieve the value of an option.
- *
- * @param[in] opt_id Option ID.
- * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in.
- *
- * @retval ::NRF_SUCCESS  Option retrieved successfully.
- * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints.
- * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time.
- * @retval ::NRF_ERROR_BUSY The stack is busy or the previous procedure has not completed.
- * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported.
- *
- */
-SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt));
-
-/** @} */
-
-#endif /* BLE_H__ */
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_err.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_err.h
deleted file mode 100644
index 19f43a9275..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_err.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- /**
-  @addtogroup BLE_COMMON
-  @{
-  @addtogroup  nrf_error
-  @{
-    @ingroup BLE_COMMON
-  @}
-
-  @defgroup ble_err General error codes
-  @{
-
-  @brief General error code definitions for the BLE API.
-
-  @ingroup BLE_COMMON
-*/
-#ifndef NRF_BLE_ERR_H__
-#define NRF_BLE_ERR_H__
-
-#include "nrf_error.h"
-
-/* @defgroup BLE_ERRORS Error Codes
- * @{ */
-#define BLE_ERROR_NOT_ENABLED            (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */
-#define BLE_ERROR_INVALID_CONN_HANDLE    (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */
-#define BLE_ERROR_INVALID_ATTR_HANDLE    (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */
-#define BLE_ERROR_NO_TX_BUFFERS          (NRF_ERROR_STK_BASE_NUM+0x004) /**< Buffer capacity exceeded. */
-/** @} */
-
-
-/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges
- *  @brief Assignment of subranges for module specific error codes.
- *  @note For specific error codes, see ble_<module>.h or ble_error_<module>.h.
- * @{ */
-#define NRF_L2CAP_ERR_BASE             (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */
-#define NRF_GAP_ERR_BASE               (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */
-#define NRF_GATTC_ERR_BASE             (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */
-#define NRF_GATTS_ERR_BASE             (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */
-/** @} */
-
-#endif
-
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gap.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gap.h
deleted file mode 100644
index 4e508cacc3..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gap.h
+++ /dev/null
@@ -1,1035 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_GAP Generic Access Profile (GAP)
-  @{
-  @brief Definitions and prototypes for the GAP interface.
- */
-
-#ifndef BLE_GAP_H__
-#define BLE_GAP_H__
-
-#include "ble_types.h"
-#include "ble_ranges.h"
-#include "nrf_svc.h"
-
-
-/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations
- * @{ */
-
-/**@brief GAP API SVC numbers.
- */
-enum BLE_GAP_SVCS
-{
-  SD_BLE_GAP_ADDRESS_SET  = BLE_GAP_SVC_BASE,  /**< Set own Bluetooth Address. */
-  SD_BLE_GAP_ADDRESS_GET,                      /**< Get own Bluetooth Address. */
-  SD_BLE_GAP_ADV_DATA_SET,                     /**< Set Advertisement Data. */
-  SD_BLE_GAP_ADV_START,                        /**< Start Advertising. */
-  SD_BLE_GAP_ADV_STOP,                         /**< Stop Advertising. */
-  SD_BLE_GAP_CONN_PARAM_UPDATE,                /**< Connection Parameter Update. */
-  SD_BLE_GAP_DISCONNECT,                       /**< Disconnect. */
-  SD_BLE_GAP_TX_POWER_SET,                     /**< Set TX Power. */
-  SD_BLE_GAP_APPEARANCE_SET,                   /**< Set Appearance. */
-  SD_BLE_GAP_APPEARANCE_GET,                   /**< Get Appearance. */
-  SD_BLE_GAP_PPCP_SET,                         /**< Set PPCP. */
-  SD_BLE_GAP_PPCP_GET,                         /**< Get PPCP. */
-  SD_BLE_GAP_DEVICE_NAME_SET,                  /**< Set Device Name. */
-  SD_BLE_GAP_DEVICE_NAME_GET,                  /**< Get Device Name. */
-  SD_BLE_GAP_AUTHENTICATE,                     /**< Initiate Pairing/Bonding. */
-  SD_BLE_GAP_SEC_PARAMS_REPLY,                 /**< Reply with Security Parameters. */
-  SD_BLE_GAP_AUTH_KEY_REPLY,                   /**< Reply with an authentication key. */
-  SD_BLE_GAP_SEC_INFO_REPLY,                   /**< Reply with Security Information. */
-  SD_BLE_GAP_CONN_SEC_GET,                     /**< Obtain connection security level. */
-  SD_BLE_GAP_RSSI_START,                       /**< Start reporting of changes in RSSI. */
-  SD_BLE_GAP_RSSI_STOP,                        /**< Stop reporting of changes in RSSI. */
-};
-/**@} */
-
-/**@addtogroup BLE_GAP_DEFINES Defines
- * @{ */
-
-/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP
- * @{ */
-#define BLE_ERROR_GAP_UUID_LIST_MISMATCH            (NRF_GAP_ERR_BASE + 0x000)  /**< UUID list does not contain an integral number of UUIDs. */
-#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST   (NRF_GAP_ERR_BASE + 0x001)  /**< Use of Whitelist not permitted with discoverable advertising. */
-#define BLE_ERROR_GAP_INVALID_BLE_ADDR              (NRF_GAP_ERR_BASE + 0x002)  /**< The upper two bits of the address do not correspond to the specified address type. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ROLES GAP Roles
- * @note Not explicitly used in peripheral API, but will be relevant for central API.
- * @{ */
-#define BLE_GAP_ROLE_INVALID     0x0            /**< Invalid Role. */
-#define BLE_GAP_ROLE_PERIPH      0x1            /**< Peripheral Role. */
-#define BLE_GAP_ROLE_CENTRAL     0x2            /**< Central Role. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources
- * @{ */
-#define BLE_GAP_TIMEOUT_SRC_ADVERTISEMENT              0x00 /**< Advertisement timeout. */
-#define BLE_GAP_TIMEOUT_SRC_SECURITY_REQUEST           0x01 /**< Security request timeout. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types
- * @{ */
-#define BLE_GAP_ADDR_TYPE_PUBLIC                        0x00 /**< Public address. */
-#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC                 0x01 /**< Random Static address. */
-#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE     0x02 /**< Private Resolvable address. */
-#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Private Non-Resolvable address. */
-/**@} */
-
-/**@defgroup BLE_GAP_ADDR_CYCLE_MODES GAP Address cycle modes
- * @{ */
-#define BLE_GAP_ADDR_CYCLE_MODE_NONE      0x00 /**< Set addresses directly, no automatic address cycling. */
-#define BLE_GAP_ADDR_CYCLE_MODE_AUTO      0x01 /**< Automatically generate and update private addresses. */
-/** @} */
-
-/**@brief The default interval in seconds at which a private address is refreshed when address cycle mode is @ref BLE_GAP_ADDR_CYCLE_MODE_AUTO.  */
-#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (60 * 15)
-
-/** @brief BLE address length. */
-#define BLE_GAP_ADDR_LEN            6
-
-
-/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format
- * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm
- * @{ */
-#define BLE_GAP_AD_TYPE_FLAGS                               0x01 /**< Flags for discoverability. */
-#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE   0x02 /**< Partial list of 16 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE         0x03 /**< Complete list of 16 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE   0x04 /**< Partial list of 32 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE         0x05 /**< Complete list of 32 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE  0x06 /**< Partial list of 128 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE        0x07 /**< Complete list of 128 bit service UUIDs. */
-#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME                    0x08 /**< Short local device name. */
-#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME                 0x09 /**< Complete local device name. */
-#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL                      0x0A /**< Transmit power level. */
-#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE                     0x0D /**< Class of device. */
-#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C               0x0E /**< Simple Pairing Hash C. */
-#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R         0x0F /**< Simple Pairing Randomizer R. */
-#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE           0x10 /**< Security Manager TK Value. */
-#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS          0x11 /**< Security Manager Out Of Band Flags. */
-#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE     0x12 /**< Slave Connection Interval Range. */
-#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT       0x14 /**< List of 16-bit Service Solicitation UUIDs. */
-#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT      0x15 /**< List of 128-bit Service Solicitation UUIDs. */
-#define BLE_GAP_AD_TYPE_SERVICE_DATA                        0x16 /**< Service Data - 16-bit UUID. */
-#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS               0x17 /**< Public Target Address. */
-#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS               0x18 /**< Random Target Address. */
-#define BLE_GAP_AD_TYPE_APPEARANCE                          0x19 /**< Appearance. */
-#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL                0x1A /**< Advertising Interval. */
-#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS         0x1B /**< LE Bluetooth Device Address. */
-#define BLE_GAP_AD_TYPE_LE_ROLE                             0x1C /**< LE Role. */
-#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256            0x1D /**< Simple Pairing Hash C-256. */
-#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256      0x1E /**< Simple Pairing Randomizer R-256. */
-#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID             0x20 /**< Service Data - 32-bit UUID. */
-#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID            0x21 /**< Service Data - 128-bit UUID. */
-#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA                 0x3D /**< 3D Information Data. */
-#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA          0xFF /**< Manufacturer Specific Data. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags
- * @{ */
-#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE         (0x01)   /**< LE Limited Discoverable Mode. */
-#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE         (0x02)   /**< LE General Discoverable Mode. */
-#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED         (0x04)   /**< BR/EDR not supported. */
-#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER         (0x08)   /**< Simultaneous LE and BR/EDR, Controller. */
-#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST               (0x10)   /**< Simultaneous LE and BR/EDR, Host. */
-#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE   (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED)   /**< LE Limited Discoverable Mode, BR/EDR not supported. */
-#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE   (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED)   /**< LE General Discoverable Mode, BR/EDR not supported. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min
- * @{ */
-#define BLE_GAP_ADV_INTERVAL_MIN        0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */
-#define BLE_GAP_ADV_NONCON_INTERVAL_MIN 0x00A0 /**< Minimum Advertising interval in 625 us units for non connectable mode, i.e. 100 ms. */
-#define BLE_GAP_ADV_INTERVAL_MAX        0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */
- /**@}  */
-
-
-/**@brief Maximum size of advertising data in octets. */
-#define  BLE_GAP_ADV_MAX_SIZE       31
-
-
-/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types
- * @{ */
-#define BLE_GAP_ADV_TYPE_ADV_IND          0x00   /**< Connectable undirected. */
-#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND   0x01   /**< Connectable directed. */
-#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND     0x02   /**< Scannable undirected. */
-#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND  0x03   /**< Non connectable undirected. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies
- * @{ */
-#define BLE_GAP_ADV_FP_ANY                0x00   /**< Allow scan requests and connect requests from any device. */
-#define BLE_GAP_ADV_FP_FILTER_SCANREQ     0x01   /**< Filter scan requests with whitelist. */
-#define BLE_GAP_ADV_FP_FILTER_CONNREQ     0x02   /**< Filter connect requests with whitelist. */
-#define BLE_GAP_ADV_FP_FILTER_BOTH        0x03   /**< Filter both scan and connect requests with whitelist. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values
- * @{ */
-#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX      180 /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180s in spec (Addendum 2)). */
-#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED  0 /**< Unlimited advertising in general discoverable mode. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes
- * @{ */
-#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE  0x00   /**< Not discoverable discovery Mode. */
-#define BLE_GAP_DISC_MODE_LIMITED           0x01   /**< Limited Discovery Mode. */
-#define BLE_GAP_DISC_MODE_GENERAL           0x02   /**< General Discovery Mode. */
-/**@} */
-
-/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities
- * @{ */
-#define BLE_GAP_IO_CAPS_DISPLAY_ONLY      0x00   /**< Display Only. */
-#define BLE_GAP_IO_CAPS_DISPLAY_YESNO     0x01   /**< Display and Yes/No entry. */
-#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY     0x02   /**< Keyboard Only. */
-#define BLE_GAP_IO_CAPS_NONE              0x03   /**< No I/O capabilities. */
-#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY  0x04   /**< Keyboard and Display. */
-/**@} */
-
-
-/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types
- * @{ */
-#define BLE_GAP_AUTH_KEY_TYPE_NONE        0x00   /**< No key (may be used to reject). */
-#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY     0x01   /**< 6-digit Passkey. */
-#define BLE_GAP_AUTH_KEY_TYPE_OOB         0x02   /**< Out Of Band data. */
-/**@} */
-
-/**@defgroup BLE_GAP_SEC_STATUS GAP Security status
- * @{ */
-#define BLE_GAP_SEC_STATUS_SUCCESS                0x00  /**< Successful parameters. */
-#define BLE_GAP_SEC_STATUS_TIMEOUT                0x01  /**< Procedure timed out. */
-#define BLE_GAP_SEC_STATUS_PDU_INVALID            0x02  /**< Invalid PDU received. */
-#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED   0x81  /**< Passkey entry failed (user cancelled or other). */
-#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE      0x82  /**< Out of Band Key not available. */
-#define BLE_GAP_SEC_STATUS_AUTH_REQ               0x83  /**< Authentication requirements not met. */
-#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE          0x84  /**< Confirm value failed. */
-#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP       0x85  /**< Pairing not supported.  */
-#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE           0x86  /**< Encryption key size. */
-#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED    0x87  /**< Unsupported SMP command. */
-#define BLE_GAP_SEC_STATUS_UNSPECIFIED            0x88  /**< Unspecified reason. */
-#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS      0x89  /**< Too little time elapsed since last attempt. */
-#define BLE_GAP_SEC_STATUS_INVALID_PARAMS         0x8A  /**< Invalid parameters. */
-/**@} */
-
-/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources
- * @{ */
-#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL           0x00  /**< Local failure. */
-#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE          0x01  /**< Remote failure. */
-/**@} */
-
-/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits
- * @{ */
-#define BLE_GAP_CP_MIN_CONN_INTVL_NONE           0xFFFF  /**< No new minimum connction interval specified in connect parameters. */
-#define BLE_GAP_CP_MIN_CONN_INTVL_MIN            0x0006  /**< Lowest mimimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */
-#define BLE_GAP_CP_MIN_CONN_INTVL_MAX            0x0C80  /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */
-#define BLE_GAP_CP_MAX_CONN_INTVL_NONE           0xFFFF  /**< No new maximum connction interval specified in connect parameters. */
-#define BLE_GAP_CP_MAX_CONN_INTVL_MIN            0x0006  /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */
-#define BLE_GAP_CP_MAX_CONN_INTVL_MAX            0x0C80  /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */
-#define BLE_GAP_CP_SLAVE_LATENCY_MAX             0x03E8  /**< Highest slave latency permitted, in connection events. */
-#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE         0xFFFF  /**< No new supervision timeout specified in connect parameters. */
-#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN          0x000A  /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */
-#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX          0x0C80  /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */
-/**@} */
-
-
-/**@brief GAP device name maximum length. */
-#define BLE_GAP_DEVNAME_MAX_LEN           31
-
-
-/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters
- *
- * See @ref ble_gap_conn_sec_mode_t.
- * @{ */
-/**@brief Set sec_mode pointed to by ptr to have no access rights.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr)         do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0)
-/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr)              do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0)
-/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr)       do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0)
-/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr)     do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0)
-/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr)    do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0)
-/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/
-#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr)  do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0)
-/**@} */
-
-
-/**@brief GAP Security Key Length. */
-#define BLE_GAP_SEC_KEY_LEN 16
-
-/**@brief GAP Passkey Length. */
-#define BLE_GAP_PASSKEY_LEN 6
-
-/**@brief Maximum amount of addresses in a whitelist. */
-#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8)
-
-/**@brief Maximum amount of IRKs in a whitelist.
- * @note  The number of IRKs is limited to 8, even if the hardware supports more.
- */
-#define BLE_GAP_WHITELIST_IRK_MAX_COUNT (8)
-
-/**@defgroup GAP_SEC_MODES GAP Security Modes
- * @{ */
-#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */
-/**@} */
-
-/**@} */
-
-/**@addtogroup BLE_GAP_STRUCTURES Structures
- * @{ */
-
-/**@brief Bluetooth Low Energy address. */
-typedef struct
-{
-  uint8_t addr_type;                    /**< See @ref BLE_GAP_ADDR_TYPES. */
-  uint8_t addr[BLE_GAP_ADDR_LEN];       /**< 48-bit address, LSB format. */
-} ble_gap_addr_t;
-
-
-/**@brief GAP connection parameters.
- *
- * @note  When ble_conn_params_t is received in an event, both min_conn_interval and
- *        max_conn_interval will be equal to the connection interval set by the central.
- */
-typedef struct
-{
-  uint16_t min_conn_interval;         /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/
-  uint16_t max_conn_interval;         /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/
-  uint16_t slave_latency;             /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/
-  uint16_t conn_sup_timeout;          /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/
-} ble_gap_conn_params_t;
-
-
-/**@brief GAP link requirements.
- *
- * See Bluetooth Core specification, Volume 3 Part C 10.2 for details.
- *
- * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n
- * Security Mode 1 Level 1: No security is needed (aka open link).\n
- * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n
- * Security Mode 1 Level 3: MITM protected encrypted link required.\n
- * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n
- * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n
- */
-typedef struct
-{
-  uint8_t sm : 4;                     /**< Security Mode (1 or 2), 0 for no permissions at all. */
-  uint8_t lv : 4;                     /**< Level (1, 2 or 3), 0 for no permissions at all. */
-
-} ble_gap_conn_sec_mode_t;
-
-
-/**@brief GAP connection security status.*/
-typedef struct
-{
-  ble_gap_conn_sec_mode_t sec_mode;           /**< Currently active security mode for this connection.*/
-  uint8_t                 encr_key_size;      /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */
-} ble_gap_conn_sec_t;
-
-
-/**@brief Identity Resolving Key. */
-typedef struct
-{
-  uint8_t irk[BLE_GAP_SEC_KEY_LEN];   /**< Array containing IRK. */
-} ble_gap_irk_t;
-
-
-/**@brief Whitelist structure. */
-typedef struct
-{
-  ble_gap_addr_t   ** pp_addrs;        /**< Pointer to array of device address pointers, pointing to addresses to be used in whitelist. NULL if none are given. */
-  uint8_t             addr_count;      /**< Count of device addresses in array, up to @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. */
-  ble_gap_irk_t    ** pp_irks;         /**< Pointer to array of Identity Resolving Key (IRK) pointers, each pointing to an IRK in the whitelist. NULL if none are given. */
-  uint8_t             irk_count;       /**< Count of IRKs in array, up to @ref BLE_GAP_WHITELIST_IRK_MAX_COUNT. */
-} ble_gap_whitelist_t;
-
-
-/**@brief GAP advertising parameters.*/
-typedef struct
-{
-  uint8_t               type;                 /**< See @ref BLE_GAP_ADV_TYPES. */
-  ble_gap_addr_t*       p_peer_addr;          /**< For BLE_GAP_CONN_MODE_DIRECTED mode only, known peer address. */
-  uint8_t               fp;                   /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */
-  ble_gap_whitelist_t * p_whitelist;          /**< Pointer to whitelist, NULL if none is given. */
-  uint16_t              interval;             /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20ms to 10.24s), see @ref BLE_GAP_ADV_INTERVALS.
-                                                   - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising.
-                                                   - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising */
-  uint16_t              timeout;              /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */
-} ble_gap_adv_params_t;
-
-
-/**@brief GAP scanning parameters. */
-typedef struct
-{
-  uint8_t    filter;                    /**< Filter based on discovery mode, see @ref BLE_GAP_DISC_MODES. */
-  uint8_t    active    : 1;             /**< If 1, perform active scanning (scan requests). */
-  uint8_t    selective : 1;             /**< If 1, ignore unknown devices (non whitelisted). */
-  uint16_t   interval;                  /**< Scan interval between 0x0020 and 0x4000 in 0.625ms units (20ms to 10.24s). */
-  uint16_t   window;                    /**< Scan window between 0x0004 and 0x4000 in 0.625ms units (2.5ms to 10.24s). */
-  uint16_t   timeout;                   /**< Scan timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. */
-} ble_gap_scan_params_t;
-
-
-/**@brief GAP security parameters. */
-typedef struct
-{
-  uint16_t   timeout;                   /**< Timeout for SMP transactions or Security Request in seconds, see @ref sd_ble_gap_authenticate and @ref sd_ble_gap_sec_params_reply for more information. */
-  uint8_t    bond    : 1;               /**< Perform bonding. */
-  uint8_t    mitm    : 1;               /**< Man In The Middle protection required. */
-  uint8_t    io_caps : 3;               /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */
-  uint8_t    oob     : 1;               /**< Out Of Band data available. */
-  uint8_t    min_key_size;              /**< Minimum encryption key size in octets between 7 and 16. */
-  uint8_t    max_key_size;              /**< Maximum encryption key size in octets between min_key_size and 16. */
-} ble_gap_sec_params_t;
-
-
-/**@brief GAP Encryption Information. */
-typedef struct
-{
-  uint16_t  div;                        /**< Encryption Diversifier. */
-  uint8_t   ltk[BLE_GAP_SEC_KEY_LEN];   /**< Long Term Key. */
-  uint8_t   auth : 1;                   /**< Authenticated Key. */
-  uint8_t   ltk_len : 7;                /**< LTK length in octets. */
-} ble_gap_enc_info_t;
-
-
-/**@brief GAP Master Identification. */
-typedef struct
-{
-  uint16_t  ediv;                       /**< Encrypted Diversifier. */
-  uint8_t   rand[8];                    /**< Random Number. */
-} ble_gap_master_id_t;
-
-
-/**@brief GAP Identity Information. */
-typedef struct
-{
-  ble_gap_addr_t  addr;                       /**< Bluetooth address to which this key applies. */
-  uint8_t         irk[BLE_GAP_SEC_KEY_LEN];   /**< Identity Resolution Key. */
-} ble_gap_id_info_t;
-
-
-/**@brief GAP Signing Information. */
-typedef struct
-{
-  uint8_t   csrk[BLE_GAP_SEC_KEY_LEN]; /* Connection Signature Resolving Key. */
-} ble_gap_sign_info_t;
-
-
-/**@brief GAP Event IDs.
- * Those IDs uniquely identify an event coming from the stack to the application.
- */
-enum BLE_GAP_EVTS
-{
-  BLE_GAP_EVT_CONNECTED  = BLE_GAP_EVT_BASE,    /**< Connection established. */
-  BLE_GAP_EVT_DISCONNECTED,                     /**< Disconnected from peer. */
-  BLE_GAP_EVT_CONN_PARAM_UPDATE,                /**< Connection Parameters updated. */
-  BLE_GAP_EVT_SEC_PARAMS_REQUEST,               /**< Request to provide security parameters. */
-  BLE_GAP_EVT_SEC_INFO_REQUEST,                 /**< Request to provide security information. */
-  BLE_GAP_EVT_PASSKEY_DISPLAY,                  /**< Request to display a passkey to the user. */
-  BLE_GAP_EVT_AUTH_KEY_REQUEST,                 /**< Request to provide an authentication key. */
-  BLE_GAP_EVT_AUTH_STATUS,                      /**< Authentication procedure completed with status. */
-  BLE_GAP_EVT_CONN_SEC_UPDATE,                  /**< Connection security updated. */
-  BLE_GAP_EVT_TIMEOUT,                          /**< Timeout expired. */
-  BLE_GAP_EVT_RSSI_CHANGED,                     /**< Signal strength measurement report. */
-};
-
-
-/**
- * @brief GAP Option IDs.
- * IDs that uniquely identify a GAP option.
- */
-enum BLE_GAP_OPTS
-{
-  BLE_GAP_OPT_LOCAL_CONN_LATENCY  = BLE_GAP_OPT_BASE,    /**< Local connection latency. */
-  BLE_GAP_OPT_PASSKEY,                                   /**< Set passkey to be used during pairing. This option can be used to make the SoftDevice use an application provided passkey instead of generating a random passkey.*/
-  BLE_GAP_OPT_PRIVACY,                                   /**< Set or get custom IRK or custom private address cycle interval. */
-};
-/**@} */
-
-
-/**@brief Event data for connected event. */
-typedef struct
-{
-  ble_gap_addr_t        peer_addr;              /**< Bluetooth address of the peer device. */
-  uint8_t               irk_match :1;           /**< If 1, peer device's address resolved using an IRK. */
-  uint8_t               irk_match_idx  :7;      /**< Index in IRK list where the address was matched. */
-  ble_gap_conn_params_t conn_params;            /**< GAP Connection Parameters. */
-} ble_gap_evt_connected_t;
-
-
-/**@brief Event data for disconnected event. */
-typedef struct
-{
-  uint8_t reason;                               /**< HCI error code. */
-} ble_gap_evt_disconnected_t;
-
-
-/**@brief Event data for connection parameter update event. */
-typedef struct
-{
-  ble_gap_conn_params_t conn_params;            /**<  GAP Connection Parameters. */
-} ble_gap_evt_conn_param_update_t;
-
-
-/**@brief Event data for security parameters request event. */
-typedef struct
-{
-  ble_gap_sec_params_t peer_params;             /**< Initiator Security Parameters. */
-} ble_gap_evt_sec_params_request_t;
-
-
-/**@brief Event data for security info request event. */
-typedef struct
-{
-  ble_gap_addr_t peer_addr;                     /**< Bluetooth address of the peer device. */
-  uint16_t       div;                           /**< Encryption diversifier for LTK lookup. */
-  uint8_t        enc_info  : 1;                 /**< If 1, Encryption Information required. */
-  uint8_t        id_info   : 1;                 /**< If 1, Identity Information required. */
-  uint8_t        sign_info : 1;                 /**< If 1, Signing Information required. */
-} ble_gap_evt_sec_info_request_t;
-
-
-/**@brief Event data for passkey display event. */
-typedef struct
-{
-  uint8_t passkey[BLE_GAP_PASSKEY_LEN];         /**< 6-digit passkey in ASCII ('0'-'9' digits only). */
-} ble_gap_evt_passkey_display_t;
-
-
-/**@brief Event data for authentication key request event. */
-typedef struct
-{
-  uint8_t key_type;                             /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */
-} ble_gap_evt_auth_key_request_t;
-
-
-/**@brief Security levels supported.
- * @note See Bluetooth Specification Version 4.1 Volume 3, Part C, Chapter 10.
-*/
-typedef struct
-{
-  uint8_t lv1 : 1;                              /**< If 1: Level 1 is supported. */
-  uint8_t lv2 : 1;                              /**< If 1: Level 2 is supported. */
-  uint8_t lv3 : 1;                              /**< If 1: Level 3 is supported. */
-} ble_gap_sec_levels_t;
-
-
-/**@brief Keys that have been exchanged. */
-typedef struct
-{
-  uint8_t ltk       : 1;                        /**< Long Term Key. */
-  uint8_t ediv_rand : 1;                        /**< Encrypted Diversifier and Random value. */
-  uint8_t irk       : 1;                        /**< Identity Resolving Key. */
-  uint8_t address   : 1;                        /**< Public or static random address. */
-  uint8_t csrk      : 1;                        /**< Connection Signature Resolving Key. */
-} ble_gap_sec_keys_t;
-
-
-/**@brief Event data for authentication status event. */
-typedef struct
-{
-  uint8_t               auth_status;            /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */
-  uint8_t               error_src;              /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */
-  ble_gap_sec_levels_t  sm1_levels;             /**< Levels supported in Security Mode 1. */
-  ble_gap_sec_levels_t  sm2_levels;             /**< Levels supported in Security Mode 2. */
-  ble_gap_sec_keys_t    periph_kex;             /**< Bitmap stating which keys were exchanged (distributed) by the peripheral. */
-  ble_gap_sec_keys_t    central_kex;            /**< Bitmap stating which keys were exchanged (distributed) by the central. */
-  struct periph_keys_t
-  {
-    ble_gap_enc_info_t    enc_info;             /**< Peripheral's Encryption information. */
-  } periph_keys;                                /**< Actual keys distributed from the Peripheral to the Central. */
-  struct central_keys_t
-  {
-    ble_gap_irk_t         irk;                  /**< Central's IRK. */
-    ble_gap_addr_t        id_info;              /**< Central's Identity Info. */
-  } central_keys;                               /**< Actual keys distributed from the Central to the Peripheral. */
-} ble_gap_evt_auth_status_t;
-
-
-/**@brief Event data for connection security update event. */
-typedef struct
-{
-  ble_gap_conn_sec_t conn_sec;                  /**< Connection security level. */
-} ble_gap_evt_conn_sec_update_t;
-
-
-/**@brief Event data for timeout event. */
-typedef struct
-{
-  uint8_t src;                                  /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */
-} ble_gap_evt_timeout_t;
-
-
-/**@brief Event data for advertisement report event. */
-typedef struct
-{
-  int8_t  rssi;                               /**< Received Signal Strength Indication in dBm. */
-} ble_gap_evt_rssi_changed_t;
-
-
-/**@brief GAP event callback event structure. */
-typedef struct
-{
-  uint16_t conn_handle;                                     /**< Connection Handle on which event occured. */
-  union                                                     /**< union alternative identified by evt_id in enclosing struct. */
-  {
-    ble_gap_evt_connected_t          connected;             /**< Connected Event Parameters. */
-    ble_gap_evt_disconnected_t       disconnected;          /**< Disconnected Event Parameters. */
-    ble_gap_evt_conn_param_update_t  conn_param_update;     /**< Connection Parameter Update Parameters. */
-    ble_gap_evt_sec_params_request_t sec_params_request;    /**< Security Parameters Request Event Parameters. */
-    ble_gap_evt_sec_info_request_t   sec_info_request;      /**< Security Information Request Event Parameters. */
-    ble_gap_evt_passkey_display_t    passkey_display;       /**< Passkey Display Event Parameters. */
-    ble_gap_evt_auth_key_request_t   auth_key_request;      /**< Authentication Key Request Event Parameters. */
-    ble_gap_evt_auth_status_t        auth_status;           /**< Authentication Status Event Parameters. */
-    ble_gap_evt_conn_sec_update_t    conn_sec_update;       /**< Connection Security Update Event Parameters. */
-    ble_gap_evt_timeout_t            timeout;               /**< Timeout Event Parameters. */
-    ble_gap_evt_rssi_changed_t       rssi_changed;          /**< RSSI Event parameters. */
-  } params;
-
-} ble_gap_evt_t;
-
-
-/**@brief Local connection latency option.
- *
- *         Local connection latency is a feature which enables the slave to improve
- *         current consumption by ignoring the slave latency set by the peer. The
- *         local connection latency can only be set to a multiple of the slave latency,
- *         and cannot be longer than half of the supervision timeout.
- *
- *         Used with @ref sd_ble_opt_set to set the local connection latency. The
- *         @ref sd_ble_opt_get is not supported for this option, but the actual
- *         local connection latency (unless set to NULL) is set as a return parameter
- *         when setting the option.
- *
- *  @note  The latency set will be truncated down to the closest slave latency event
- *         multiple, or the nearest multiple before half of the supervision timeout.
- *
- *  @note  The local connection latency is default off, and needs to be set for new
- *         connections and whenever the connection is updated.
- *
- *  @retval ::NRF_SUCCESS Set successfully.
- *  @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported.
- *  @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter.
- */
-typedef struct
-{
-  uint16_t   conn_handle;                       /**< Connection Handle */
-  uint16_t   requested_latency;                 /**< Requested local connection latency. */
-  uint16_t * p_actual_latency;                  /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */
-} ble_gap_opt_local_conn_latency_t;
-
-
-/**@brief Passkey Option.
- *
- *        Structure containing the passkey to be used during pairing. This can be used with @ref
- *        sd_ble_opt_set to make the SoftDevice use a pre-programmed passkey for authentication
- *        instead of generating a random one.
- *
- * @note  @ref sd_ble_opt_get is not supported for this option.
- *
- */
-typedef struct
-{
-  uint8_t * p_passkey;                          /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/
-} ble_gap_opt_passkey_t;
-
-
-/**@brief Custom Privacy Options.
- *
- * @note The specified address cycle interval is used when the address cycle mode is
- * @ref BLE_GAP_ADDR_CYCLE_MODE_AUTO. If 0 is given, the address will not be refreshed at any
- * interval, and not at start of advertising. A new address can be generated manually by calling
- * @ref sd_ble_gap_address_set with the same type again. The default interval is
- * @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S.
- *
- * @note If cycle mode is @ref BLE_GAP_ADDR_CYCLE_MODE_AUTO, the address will immediately be
- * refreshed when this option is set.
- */
-typedef struct
-{
-  ble_gap_irk_t * p_irk;        /**< When input: Pointer to custom IRK, or NULL to use/reset to the device's default IRK. When output: Pointer to where the current IRK is to be stored, or NULL to not read out the IRK. */
-  uint16_t        interval_s;   /**< When input: Custom private address cycle interval in seconds. When output: The current private address cycle interval. */
-} ble_gap_opt_privacy_t;
-
-
-/**@brief Option structure for GAP options. */
-typedef union
-{
-  ble_gap_opt_local_conn_latency_t local_conn_latency;  /**< Local connection latency. */
-  ble_gap_opt_passkey_t            passkey;             /**< Passkey to be used for pairing.*/
-  ble_gap_opt_privacy_t            privacy;             /**< Custom privacy options. */
-} ble_gap_opt_t;
-/**@} */
-
-
-/**@addtogroup BLE_GAP_FUNCTIONS Functions
- * @{ */
-
-/**@brief Set local Bluetooth address.
- *
- * If the address cycle mode is @ref BLE_GAP_ADDR_CYCLE_MODE_AUTO, the address type is required to
- * be @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or
- * @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. The given address is ignored and the
- * SoftDevice will generate a new private address automatically every time advertising is
- * (re)started, and every @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S seconds. If this API
- * call is used again with the same parameters while advertising, the SoftDevice will immediately
- * generate a new private address to replace the current address.
- *
- * If the application wishes to use a @ref BLE_GAP_ADDR_TYPE_PUBLIC or
- * @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC address, the cycle mode must be
- * @ref BLE_GAP_ADDR_CYCLE_MODE_NONE.
- *
- * If this API function is called while advertising, the softdevice will immediately update the
- * advertising address without the need to stop advertising in the following cases:
- *   - If the previously set address is of type @ref BLE_GAP_ADDR_TYPE_PUBLIC and the new address
- *   is also of type @ref BLE_GAP_ADDR_TYPE_PUBLIC
- *   - If the previously set address is not @ref BLE_GAP_ADDR_TYPE_PUBLIC and the new address is
- *   also not @ref BLE_GAP_ADDR_TYPE_PUBLIC.
- *
- * If the address is changed from a @ref BLE_GAP_ADDR_TYPE_PUBLIC address to another type or from
- * another type to a @ref BLE_GAP_ADDR_TYPE_PUBLIC address, the change will take effect the next
- * time advertising is started.
- *
- * @note If the address cycle mode is @ref BLE_GAP_ADDR_CYCLE_MODE_NONE and the application is
- *       using privacy, the application must take care to generate and set new private addresses
- *       periodically to comply with the Privacy specification in Bluetooth Core Spec.
- *
- * @param[in] addr_cycle_mode Address cycle mode, see @ref BLE_GAP_ADDR_CYCLE_MODES.
- * @param[in] p_addr          Pointer to address structure.
- *
- * @return @ref NRF_SUCCESS Address successfully set.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameters.
- * @return @ref BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address.
- * @return @ref NRF_ERROR_BUSY The stack is busy, process pending events and retry.
- */
-SVCALL(SD_BLE_GAP_ADDRESS_SET, uint32_t, sd_ble_gap_address_set(uint8_t addr_cycle_mode, ble_gap_addr_t const * const p_addr));
-
-
-/**@brief Get local Bluetooth address.
- *
- * @param[out] p_addr Pointer to address structure.
- *
- * @return @ref NRF_SUCCESS Address successfully retrieved.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- */
-SVCALL(SD_BLE_GAP_ADDRESS_GET, uint32_t, sd_ble_gap_address_get(ble_gap_addr_t * const p_addr));
-
-
-/**@brief Set, clear or update advertisement and scan response data.
- *
- * @note The format of the advertisement data will be checked by this call to ensure interoperability.
- *       Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and
- *       duplicating the local name in the advertisement data and scan response data.
- *
- * @note: To clear the advertisement data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding
- *        length (dlen/srdlen) set to 0.
- *
- * @note: The call will fail if p_data and p_sr_data are both NULL since this would have no effect.
- *
- * @param[in] p_data    Raw data to be placed in advertisement packet. If NULL, no changes are made to the current advertisement packet data.
- * @param[in] dlen      Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL.
- * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data.
- * @param[in] srdlen    Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL.
- *
- * @return @ref NRF_SUCCESS Advertisement data successfully updated or cleared.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied.
- * @return @ref NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification.
- * @return @ref NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied.
- * @return @ref BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied.
- * @return @ref NRF_ERROR_BUSY The stack is busy, process pending events and retry.
- */
-SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const * const p_data, uint8_t dlen, uint8_t const * const p_sr_data, uint8_t srdlen));
-
-
-/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure).
- *
- * @param[in] p_adv_params Pointer to advertising parameters structure.
- *
- * @return @ref NRF_SUCCESS The BLE stack has started advertising.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits.
- * @return @ref BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied.
- * @return @ref BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible.
- */
-SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const * const p_adv_params));
-
-
-/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure).
- *
- * @return @ref NRF_SUCCESS The BLE stack has stopped advertising.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state).
- */
-SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void));
-
-
-/**@brief Update connection parameters.
- *
- * @details In the central role this will initiate a Link Layer connection parameter update procedure,
- *          otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for
- *          the central to perform the procedure. In both cases, and regardless of success or failure, the application
- *          will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event.
- *
- * @note If both a connection supervision timeout and a maximum connection interval are specified, then the following constraint
- *       applies: (conn_sup_timeout * 8) >= (max_conn_interval * (slave_latency + 1))
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] p_conn_params  Pointer to desired connection parameters. If NULL is provided on a peripheral role,
- *                           the parameters in the PPCP characteristic of the GAP service will be used instead.
- *
- * @return @ref NRF_SUCCESS The Connection Update procedure has been started successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints.
- * @return @ref NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, process pending events and retry.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- */
-SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const * const p_conn_params));
-
-
-/**@brief Disconnect (GAP Link Termination).
- *
- * @details This call initiates the disconnection procedure, and its completion will be communicated to the application
- *          with a BLE_GAP_EVT_DISCONNECTED event.
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are BTLE_REMOTE_USER_TERMINATED_CONNECTION and BTLE_CONN_INTERVAL_UNACCEPTABLE).
- *
- * @return @ref NRF_SUCCESS The disconnection procedure has been started successfully.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress or not connected at all).
- */
-SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code));
-
-
-/**@brief Set the radio's transmit power.
- *
- * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -30, -20, -16, -12, -8, -4, 0, and 4 dBm).
- *
- * @note -40 dBm will not actually give -40 dBm, but will instead be remapped to -30 dBm.
- *
- * @return @ref NRF_SUCCESS Successfully changed the transmit power.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_BUSY The stack is busy, process pending events and retry.
- */
-SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power));
-
-
-/**@brief Set GAP Appearance value.
- *
- * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES.
- *
- * @return @ref NRF_SUCCESS  Appearance value set successfully.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- */
-SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance));
-
-
-/**@brief Get GAP Appearance value.
- *
- * @param[out] p_appearance Appearance (16-bit), see @ref BLE_APPEARANCES.
- *
- * @return @ref NRF_SUCCESS Appearance value retrieved successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- */
-SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t * const p_appearance));
-
-
-/**@brief Set GAP Peripheral Preferred Connection Parameters.
- *
- * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters.
- *
- * @return @ref NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- */
-SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const * const p_conn_params));
-
-
-/**@brief Get GAP Peripheral Preferred Connection Parameters.
- *
- * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored.
- *
- * @return @ref NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- */
-SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t * const p_conn_params));
-
-
-/**@brief Set GAP device name.
- *
- * @param[in] p_write_perm Write permissions for the Device Name characteristic see @ref ble_gap_conn_sec_mode_t.
- * @param[in] p_dev_name Pointer to a UTF-8 encoded, <b>non NULL-terminated</b> string.
- * @param[in] len   Length of the UTF-8, <b>non NULL-terminated</b> string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN).
- *
- * @return @ref NRF_SUCCESS GAP device name and permissions set successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
- */
-SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const * const p_write_perm, uint8_t const * const p_dev_name, uint16_t len));
-
-
-/**@brief Get GAP device name.
- *
- * @param[in]     p_dev_name Pointer to an empty buffer where the UTF-8 <b>non NULL-terminated</b> string will be placed. Set to NULL to obtain the complete device name length.
- * @param[in,out] p_len      Length of the buffer pointed by p_dev_name, complete device name length on output.
- *
- * @note          If the device name is longer than the size of the supplied buffer,
- *                p_len will return the complete device name length,
- *                and not the number of bytes actually returned in p_dev_name.
- *                The application may use this information to allocate a suitable buffer size.
- *
- * @return @ref NRF_SUCCESS GAP device name retrieved successfully.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
- */
-SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t * const p_dev_name, uint16_t * const p_len));
-
-
-/**@brief Initiate GAP Authentication procedure.
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing procedure.
- *
- * @details In the central role, this function will send an SMP Pairing Request, otherwise in the peripheral role, an SMP Security Request will be sent.
- *          In the peripheral role, only the timeout, bond and mitm fields of @ref ble_gap_sec_params_t are used.
- *
- * @note    The GAP Authentication procedure may be triggered by the central without calling this function when accessing a secure service.
- * @note    Calling this function may result in the following events depending on the outcome and parameters: @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST,
- *          @ref BLE_GAP_EVT_SEC_INFO_REQUEST, @ref BLE_GAP_EVT_AUTH_KEY_REQUEST, @ref BLE_GAP_EVT_AUTH_STATUS.
- * @note    The timeout parameter in @ref ble_gap_sec_params_t is interpreted here as the Security Request timeout
- *
- *
- * @return @ref NRF_SUCCESS Successfully initiated authentication procedure.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- * @return @ref NRF_ERROR_TIMEOUT A SMP timeout has occured, and further SMP operations on this link is prohibited.
- */
-SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const * const p_sec_params));
-
-
-/**@brief Reply with GAP security parameters.
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS.
- * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure.
- *
- * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an NRF_ERROR_INVALID_STATE.
- * @note    If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters.
- * @note    The timeout parameter in @ref ble_gap_sec_params_t is interpreted here as the SMP procedure timeout, and must be 30 seconds. The function will fail
- *          if the application supplies a different value.
- *
- * @return @ref NRF_SUCCESS Successfully accepted security parameter from the application.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- */
-SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const * const p_sec_params));
-
-
-/**@brief Reply with an authentication key.
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES.
- * @param[in] key If key type is BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL.
- *                If key type is BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination).
- *                If key type is BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in Little Endian format.
- *
- * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST, calling it at other times will result in an NRF_ERROR_INVALID_STATE.
- * @note    If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters.
- *
- * @return @ref NRF_SUCCESS Authentication key successfully set.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- */
-SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const * const key));
-
-
-/**@brief Reply with GAP security information.
- *
- * @param[in] conn_handle Connection handle.
- * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available.
- * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available.
- *
- * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in NRF_ERROR_INVALID_STATE.
- * @note    If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters.
- * @note    Data signing is not implemented yet. p_sign_info must therefore be NULL.
- *
- * @return @ref NRF_SUCCESS Successfully accepted security information.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- * @return @ref NRF_ERROR_BUSY The stack is busy, process pending events and retry.
- */
-SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const * const p_enc_info, ble_gap_sign_info_t const * const p_sign_info));
-
-
-/**@brief Get the current connection security.
- *
- * @param[in]  conn_handle Connection handle.
- * @param[out] p_conn_sec  Pointer to a @ref ble_gap_conn_sec_t structure to be filled in.
- *
- * @return @ref NRF_SUCCESS Current connection security successfully retrieved.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- */
-SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t * const p_conn_sec));
-
-
-/**@brief Start reporting the received signal strength to the application.
- *
- * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called.
- *
- * @param[in] conn_handle Connection handle.
- *
- * @return @ref NRF_SUCCESS Successfully activated RSSI reporting.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- */
-SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle));
-
-
-/**@brief Stop reporting the received singnal strength.
- *
- * An RSSI change detected before the call but not yet received by the application
- * may be reported after @ref sd_ble_gap_rssi_stop has been called.
- *
- * @param[in] conn_handle Connection handle.
- *
- * @return @ref NRF_SUCCESS Successfully deactivated RSSI reporting.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
- */
-SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle));
-/**@} */
-
-#endif // BLE_GAP_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatt.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatt.h
deleted file mode 100644
index 2ca27ac3ae..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatt.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- /**
-  @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common
-  @{
-  @brief  Common definitions and prototypes for the GATT interfaces.
- */
-
-#ifndef BLE_GATT_H__
-#define BLE_GATT_H__
-
-#include "ble_types.h"
-#include "ble_ranges.h"
-
-
-/** @addtogroup BLE_GATT_DEFINES Defines
- * @{ */
-
-/** @brief Default MTU size. */
-#define GATT_MTU_SIZE_DEFAULT 23
-
-/** @brief Only the default MTU size of 23 is currently supported. */
-#define GATT_RX_MTU 23
-
-
-/**@brief Invalid Attribute Handle. */
-#define BLE_GATT_HANDLE_INVALID            0x0000
-
-/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources
- * @{ */
-#define BLE_GATT_TIMEOUT_SRC_PROTOCOL                  0x00 /**< ATT Protocol timeout. */
-/** @} */
-
-/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations
- * @{ */
-#define BLE_GATT_OP_INVALID                0x00  /**< Invalid Operation. */
-#define BLE_GATT_OP_WRITE_REQ              0x01  /**< Write Request. */
-#define BLE_GATT_OP_WRITE_CMD              0x02  /**< Write Command. */
-#define BLE_GATT_OP_SIGN_WRITE_CMD         0x03  /**< Signed Write Command. */
-#define BLE_GATT_OP_PREP_WRITE_REQ         0x04  /**< Prepare Write Request. */
-#define BLE_GATT_OP_EXEC_WRITE_REQ         0x05  /**< Execute Write Request. */
-/** @} */
-
-/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags
- * @{ */
-#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00
-#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE  0x01
-/** @} */
-
-/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations
- * @{ */
-#define BLE_GATT_HVX_INVALID               0x00  /**< Invalid Operation. */
-#define BLE_GATT_HVX_NOTIFICATION          0x01  /**< Handle Value Notification. */
-#define BLE_GATT_HVX_INDICATION            0x02  /**< Handle Value Indication. */
-/** @} */
-
-/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes
- * @{ */
-#define BLE_GATT_STATUS_SUCCESS                           0x0000  /**< Success. */
-#define BLE_GATT_STATUS_UNKNOWN                           0x0001  /**< Unknown or not applicable status. */
-#define BLE_GATT_STATUS_ATTERR_INVALID                    0x0100  /**< ATT Error: Invalid Error Code. */
-#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE             0x0101  /**< ATT Error: Invalid Attribute Handle. */
-#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED         0x0102  /**< ATT Error: Read not permitted. */
-#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED        0x0103  /**< ATT Error: Write not permitted. */
-#define BLE_GATT_STATUS_ATTERR_INVALID_PDU                0x0104  /**< ATT Error: Used in ATT as Invalid PDU. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION       0x0105  /**< ATT Error: Authenticated link required. */
-#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED      0x0106  /**< ATT Error: Used in ATT as Request Not Supported. */
-#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET             0x0107  /**< ATT Error: Offset specified was past the end of the attribute. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION        0x0108  /**< ATT Error: Used in ATT as Insufficient Authorisation. */
-#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL         0x0109  /**< ATT Error: Used in ATT as Prepare Queue Full. */
-#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND        0x010A  /**< ATT Error: Used in ATT as Attribute not found. */
-#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG         0x010B  /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE         0x010C  /**< ATT Error: Encryption key size used is insufficient. */
-#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH     0x010D  /**< ATT Error: Invalid value size. */
-#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR             0x010E  /**< ATT Error: Very unlikely error. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION           0x010F  /**< ATT Error: Encrypted link required. */
-#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE     0x0110  /**< ATT Error: Attribute type is not a supported grouping attribute. */
-#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES            0x0111  /**< ATT Error: Encrypted link required. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN           0x0112  /**< ATT Error: Reserved for Future Use range #1 begin. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END             0x017F  /**< ATT Error: Reserved for Future Use range #1 end. */
-#define BLE_GATT_STATUS_ATTERR_APP_BEGIN                  0x0180  /**< ATT Error: Application range begin. */
-#define BLE_GATT_STATUS_ATTERR_APP_END                    0x019F  /**< ATT Error: Application range end. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN           0x01A0  /**< ATT Error: Reserved for Future Use range #2 begin. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END             0x01DF  /**< ATT Error: Reserved for Future Use range #2 end. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN           0x01E0  /**< ATT Error: Reserved for Future Use range #3 begin. */
-#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END             0x01FC  /**< ATT Error: Reserved for Future Use range #3 end. */
-#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR      0x01FD  /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */
-#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG       0x01FE  /**< ATT Common Profile and Service Error: Procedure Already in Progress. */
-#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE           0x01FF  /**< ATT Common Profile and Service Error: Out Of Range. */
-/** @} */
-
-
-/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats
- *  @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml
- * @{ */
-#define BLE_GATT_CPF_FORMAT_RFU                 0x00 /**< Reserved For Future Use. */
-#define BLE_GATT_CPF_FORMAT_BOOLEAN             0x01 /**< Boolean. */
-#define BLE_GATT_CPF_FORMAT_2BIT                0x02 /**< Unsigned 2-bit integer. */
-#define BLE_GATT_CPF_FORMAT_NIBBLE              0x03 /**< Unsigned 4-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT8               0x04 /**< Unsigned 8-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT12              0x05 /**< Unsigned 12-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT16              0x06 /**< Unsigned 16-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT24              0x07 /**< Unsigned 24-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT32              0x08 /**< Unsigned 32-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT48              0x09 /**< Unsigned 48-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT64              0x0A /**< Unsigned 64-bit integer. */
-#define BLE_GATT_CPF_FORMAT_UINT128             0x0B /**< Unsigned 128-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT8               0x0C /**< Signed 2-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT12              0x0D /**< Signed 12-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT16              0x0E /**< Signed 16-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT24              0x0F /**< Signed 24-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT32              0x10 /**< Signed 32-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT48              0x11 /**< Signed 48-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT64              0x12 /**< Signed 64-bit integer. */
-#define BLE_GATT_CPF_FORMAT_SINT128             0x13 /**< Signed 128-bit integer. */
-#define BLE_GATT_CPF_FORMAT_FLOAT32             0x14 /**< IEEE-754 32-bit floating point. */
-#define BLE_GATT_CPF_FORMAT_FLOAT64             0x15 /**< IEEE-754 64-bit floating point. */
-#define BLE_GATT_CPF_FORMAT_SFLOAT              0x16 /**< IEEE-11073 16-bit SFLOAT. */
-#define BLE_GATT_CPF_FORMAT_FLOAT               0x17 /**< IEEE-11073 32-bit FLOAT. */
-#define BLE_GATT_CPF_FORMAT_DUINT16             0x18 /**< IEEE-20601 format. */
-#define BLE_GATT_CPF_FORMAT_UTF8S               0x19 /**< UTF-8 string. */
-#define BLE_GATT_CPF_FORMAT_UTF16S              0x1A /**< UTF-16 string. */
-#define BLE_GATT_CPF_FORMAT_STRUCT              0x1B /**< Opaque Structure. */
-/** @} */
-
-/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces
- * @{
- */
-#define BLE_GATT_CPF_NAMESPACE_BTSIG            0x01
-#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000
-/** @} */
-
-/** @} */
-
-/** @addtogroup BLE_GATT_STRUCTURES Structures
- * @{ */
-
-/**@brief GATT Characteristic Properties. */
-typedef struct
-{
-  /* Standard properties */
-  uint8_t broadcast       :1; /**< Broadcasting of value permitted. */
-  uint8_t read            :1; /**< Reading value permitted. */
-  uint8_t write_wo_resp   :1; /**< Writing value with Write Command permitted. */
-  uint8_t write           :1; /**< Writing value with Write Request permitted. */
-  uint8_t notify          :1; /**< Notications of value permitted. */
-  uint8_t indicate        :1; /**< Indications of value permitted. */
-  uint8_t auth_signed_wr  :1; /**< Writing value with Signed Write Command permitted. */
-} ble_gatt_char_props_t;
-
-/**@brief GATT Characteristic Extended Properties. */
-typedef struct
-{
-  /* Extended properties */
-  uint8_t reliable_wr     :1; /**< Writing value with Queued Write Request permitted. */
-  uint8_t wr_aux          :1; /**< Writing the Characteristic User Description permitted. */
-} ble_gatt_char_ext_props_t;
-
-#endif // BLE_GATT_H__
-
-/** @} */
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gattc.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gattc.h
deleted file mode 100644
index 14bad6b1e1..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gattc.h
+++ /dev/null
@@ -1,406 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client
-  @{
-  @brief  Definitions and prototypes for the GATT Client interface.
- */
-
-#ifndef BLE_GATTC_H__
-#define BLE_GATTC_H__
-
-#include "ble_gatt.h"
-#include "ble_types.h"
-#include "ble_ranges.h"
-#include "nrf_svc.h"
-
-/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations
- * @{ */
-
-/**@brief GATTC API SVC numbers. */
-enum BLE_GATTC_SVCS
-{
-  SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */
-  SD_BLE_GATTC_RELATIONSHIPS_DISCOVER,                         /**< Relationship Discovery. */
-  SD_BLE_GATTC_CHARACTERISTICS_DISCOVER,                       /**< Characteristic Discovery. */
-  SD_BLE_GATTC_DESCRIPTORS_DISCOVER,                           /**< Characteristic Descriptor Discovery. */
-  SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ,                        /**< Read Characteristic Value by UUID. */
-  SD_BLE_GATTC_READ,                                           /**< Generic read. */
-  SD_BLE_GATTC_CHAR_VALUES_READ,                               /**< Read multiple Characteristic Values. */
-  SD_BLE_GATTC_WRITE,                                          /**< Generic write. */
-  SD_BLE_GATTC_HV_CONFIRM                                      /**< Handle Value Confirmation. */
-};
-
-/** @} */
-
-/** @addtogroup BLE_GATTC_DEFINES Defines
- * @{ */
-
-/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC
- * @{ */
-#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED    (NRF_GATTC_ERR_BASE + 0x000)
-/** @} */
-
-/**@brief Last Attribute Handle. */
-#define BLE_GATTC_HANDLE_END                0xFFFF
-
-/** @} */
-
-/** @addtogroup BLE_GATTC_STRUCTURES Structures
- * @{ */
-
-/**@brief Operation Handle Range. */
-typedef struct
-{
-  uint16_t          start_handle; /**< Start Handle. */
-  uint16_t          end_handle;   /**< End Handle. */
-} ble_gattc_handle_range_t;
-
-
-/**@brief GATT service. */
-typedef struct
-{
-  ble_uuid_t               uuid;          /**< Service UUID. */
-  ble_gattc_handle_range_t handle_range;  /**< Service Handle Range. */
-} ble_gattc_service_t;
-
-
-/**@brief  GATT include. */
-typedef struct
-{
-  uint16_t            handle;           /**< Include Handle. */
-  ble_gattc_service_t included_srvc;    /**< Handle of the included service. */
-} ble_gattc_include_t;
-
-
-/**@brief GATT characteristic. */
-typedef struct
-{
-  ble_uuid_t              uuid;                 /**< Characteristic UUID. */
-  ble_gatt_char_props_t   char_props;           /**< Characteristic Properties. */
-  uint8_t                 char_ext_props : 1;   /**< Extended properties present. */
-  uint16_t                handle_decl;          /**< Handle of the Characteristic Declaration. */
-  uint16_t                handle_value;         /**< Handle of the Characteristic Value. */
-} ble_gattc_char_t;
-
-
-/**@brief GATT descriptor. */
-typedef struct
-{
-  uint16_t          handle;         /**< Descriptor Handle. */
-  ble_uuid_t        uuid;           /**< Descriptor UUID. */
-} ble_gattc_desc_t;
-
-
-/**@brief Write Parameters. */
-typedef struct
-{
-  uint8_t    write_op;                 /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */
-  uint16_t   handle;                   /**< Handle to the attribute to be written. */
-  uint16_t   offset;                   /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */
-  uint16_t   len;                      /**< Length of data in bytes. */
-  uint8_t*   p_value;                  /**< Pointer to the value data. */
-  uint8_t    flags;                    /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */
-} ble_gattc_write_params_t;
-
-
-/**
- * @brief GATT Client Event IDs.
- */
-enum BLE_GATTC_EVTS
-{
-  BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE,  /**< Primary Service Discovery Response event.  */
-  BLE_GATTC_EVT_REL_DISC_RSP,                             /**< Relationship Discovery Response event. */
-  BLE_GATTC_EVT_CHAR_DISC_RSP,                            /**< Characteristic Discovery Response event. */
-  BLE_GATTC_EVT_DESC_DISC_RSP,                            /**< Descriptor Discovery Response event. */
-  BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP,                /**< Read By UUID Response event. */
-  BLE_GATTC_EVT_READ_RSP,                                 /**< Read Response event. */
-  BLE_GATTC_EVT_CHAR_VALS_READ_RSP,                       /**< Read multiple Response event. */
-  BLE_GATTC_EVT_WRITE_RSP,                                /**< Write Response event. */
-  BLE_GATTC_EVT_HVX,                                      /**< Handle Value Notification or Indication event. */
-  BLE_GATTC_EVT_TIMEOUT                                   /**< Timeout event. */
-};
-
-/**@brief Event structure for BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */
-typedef struct
-{
-  uint16_t             count;           /**< Service count. */
-  ble_gattc_service_t services[1];      /**< Service data, variable length. */
-} ble_gattc_evt_prim_srvc_disc_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_REL_DISC_RSP. */
-typedef struct
-{
-  uint16_t             count;           /**< Include count. */
-  ble_gattc_include_t includes[1];      /**< Include data, variable length. */
-} ble_gattc_evt_rel_disc_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_CHAR_DISC_RSP. */
-typedef struct
-{
-  uint16_t            count;          /**< Characteristic count. */
-  ble_gattc_char_t    chars[1];       /**< Characteristic data, variable length. */
-} ble_gattc_evt_char_disc_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_DESC_DISC_RSP. */
-typedef struct
-{
-  uint16_t            count;          /**< Descriptor count. */
-  ble_gattc_desc_t    descs[1];       /**< Descriptor data, variable length. */
-} ble_gattc_evt_desc_disc_rsp_t;
-
-/**@brief GATT read by UUID handle value pair. */
-typedef struct 
-{
-  uint16_t            handle;          /**< Attribute Handle. */
-  uint8_t             *p_value;        /**< Pointer to value, variable length (length available as value_len in ble_gattc_evt_read_by_uuid_rsp_t). 
-                                            Please note that this pointer is absolute to the memory provided by the user when retrieving the event,
-                                            so it will effectively point to a location inside the handle_value array. */
-} ble_gattc_handle_value_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */
-typedef struct
-{
-  uint16_t                  count;            /**< Handle-Value Pair Count. */
-  uint16_t                  value_len;        /**< Length of the value in Handle-Value(s) list. */
-  ble_gattc_handle_value_t  handle_value[1];  /**< Handle-Value(s) list, variable length. */
-} ble_gattc_evt_char_val_by_uuid_read_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_READ_RSP. */
-typedef struct
-{
-  uint16_t            handle;         /**< Attribute Handle. */
-  uint16_t            offset;         /**< Offset of the attribute data. */
-  uint16_t            len;            /**< Attribute data length. */
-  uint8_t             data[1];        /**< Attribute data, variable length. */
-} ble_gattc_evt_read_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */
-typedef struct
-{
-  uint16_t            len;            /**< Concatenated Attribute values length. */
-  uint8_t             values[1];      /**< Attribute values, variable length. */
-} ble_gattc_evt_char_vals_read_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_WRITE_RSP. */
-typedef struct
-{
-  uint16_t            handle;           /**< Attribute Handle. */
-  uint8_t             write_op;         /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */
-  uint16_t            offset;           /**< Data Offset. */
-  uint16_t            len;              /**< Data length. */
-  uint8_t             data[1];          /**< Data, variable length. */
-} ble_gattc_evt_write_rsp_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_HVX. */
-typedef struct
-{
-  uint16_t            handle;         /**< Handle to which the HVx operation applies. */
-  uint8_t             type;           /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */
-  uint16_t            len;            /**< Attribute data length. */
-  uint8_t             data[1];        /**< Attribute data, variable length. */
-} ble_gattc_evt_hvx_t;
-
-/**@brief Event structure for BLE_GATTC_EVT_TIMEOUT. */
-typedef struct
-{
-  uint8_t          src;                       /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */
-} ble_gattc_evt_timeout_t;
-
-/**@brief GATTC event type. */
-typedef struct
-{
-  uint16_t            conn_handle;                /**< Connection Handle on which event occured. */
-  uint16_t            gatt_status;                /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */
-  uint16_t            error_handle;               /**< In case of error: The handle causing the error. In all other cases BLE_GATT_HANDLE_INVALID. */
-  union
-  {
-    ble_gattc_evt_prim_srvc_disc_rsp_t          prim_srvc_disc_rsp;         /**< Primary Service Discovery Response Event Parameters. */
-    ble_gattc_evt_rel_disc_rsp_t                rel_disc_rsp;               /**< Relationship Discovery Response Event Parameters. */
-    ble_gattc_evt_char_disc_rsp_t               char_disc_rsp;              /**< Characteristic Discovery Response Event Parameters. */
-    ble_gattc_evt_desc_disc_rsp_t               desc_disc_rsp;              /**< Descriptor Discovery Response Event Parameters. */
-    ble_gattc_evt_char_val_by_uuid_read_rsp_t   char_val_by_uuid_read_rsp;  /**< Characteristic Value Read by UUID Response Event Parameters. */
-    ble_gattc_evt_read_rsp_t                    read_rsp;                   /**< Read Response Event Parameters. */
-    ble_gattc_evt_char_vals_read_rsp_t          char_vals_read_rsp;         /**< Characteristic Values Read Response Event Parameters. */
-    ble_gattc_evt_write_rsp_t                   write_rsp;                  /**< Write Response Event Parameters. */
-    ble_gattc_evt_hvx_t                         hvx;                        /**< Handle Value Notification/Indication Event Parameters. */
-    ble_gattc_evt_timeout_t                     timeout;                    /**< Timeout Event Parameters. */
-  } params;                                                                 /**< Event Parameters. @note Only valid if @ref gatt_status == BLE_GATT_STATUS_SUCCESS. */
-} ble_gattc_evt_t;
-/** @} */
-
-/** @addtogroup BLE_GATTC_FUNCTIONS Functions
- * @{ */
-
-/**@brief Initiate or continue a GATT Primary Service Discovery procedure.
- *
- * @details This function initiates a Primary Service discovery, starting from the supplied handle. 
- *          If the last service has not been reached, this must be called again with an updated start handle value to continue the search.
- *
- * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with
- *       type BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] start_handle Handle to start searching from.
- * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const * const p_srvc_uuid));
-
-
-/**@brief Initiate or continue a GATT Relationship Discovery procedure.
- *
- * @details This function initiates the Find Included Services sub-procedure. If the last included service has not been reached,
- *          this must be called again with an updated handle range to continue the search.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * const p_handle_range));
-
-
-/**@brief Initiate or continue a GATT Characteristic Discovery procedure.
- *
- * @details This function initiates a Characteristic discovery procedure. If the last Characteristic has not been reached,
- *          this must be called again with an updated handle range to continue the discovery.
- *
- * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with
- *       type BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * const p_handle_range));
-
-
-/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure.
- *
- * @details This function initiates the Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached,
- *          this must be called again with an updated handle range to continue the discovery.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * const p_handle_range));
-
-
-/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure.
- *
- * @details This function initiates the Read using Characteristic UUID procedure. If the last Characteristic has not been reached,
- *          this must be called again with an updated handle range to continue the discovery.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_uuid Pointer to a Characteristic value UUID to read.
- * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const * const p_uuid, ble_gattc_handle_range_t const * const p_handle_range));
-
-
-/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure.
- *
- * @details This function initiates a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor
- *          to be read is longer than GATT_MTU - 1, this function must be called multiple times with appropriate offset to read the 
- *          complete value.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] handle The handle of the attribute to be read.
- * @param[in] offset Offset into the attribute value to be read.
- *
- * @return @ref NRF_SUCCESS Successfully started or resumed the Read (Long) procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset));
-
-
-/**@brief Initiate a GATT Read Multiple Characteristic Values procedure.
- *
- * @details This function initiates a GATT Read Multiple Characteristic Values procedure. 
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read.
- * @param[in] handle_count The number of handles in p_handles.
- *
- * @return @ref NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_BUSY Client procedure already in progress.
- */
-SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const * const p_handles, uint16_t handle_count));
-
-
-/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure.
- *
- * @details This function can perform all write procedures described in GATT. 
- *
- * @note    It is important to note that a write without response will <b>consume an application buffer</b>, and will therefore 
- *          generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted. A write on the other hand will use the 
- *          standard client internal buffer and thus will only generate a @ref BLE_GATTC_EVT_WRITE_RSP event as soon as the write response 
- *          has been received from the peer. Please see the documentation of @ref sd_ble_tx_buffer_count_get for more details.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] p_write_params A pointer to a write parameters structure.
- *
- * @return @ref NRF_SUCCESS Successfully started the Write procedure.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
- * @return @ref NRF_ERROR_BUSY Procedure already in progress.
- * @return @ref BLE_ERROR_NO_TX_BUFFERS There are no available buffers left.
- */
-SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const * const p_write_params));
-
-
-/**@brief Send a Handle Value Confirmation to the GATT Server.
- *
- * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
- * @param[in] handle The handle of the attribute in the indication.
- *
- * @return @ref NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_STATE No Indication pending to be confirmed.
- * @return @ref BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle.
- * @return @ref BLE_ERROR_NO_TX_BUFFERS There are no available buffers left.
- */
-SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle));
-
-/** @} */
-
-#endif /* BLE_GATTC_H__ */
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatts.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatts.h
deleted file mode 100644
index dec649f28a..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_gatts.h
+++ /dev/null
@@ -1,566 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server
-  @{
-  @brief  Definitions and prototypes for the GATTS interface.
- */
-
-#ifndef BLE_GATTS_H__
-#define BLE_GATTS_H__
-
-#include "ble_types.h"
-#include "ble_ranges.h"
-#include "ble_l2cap.h"
-#include "ble_gap.h"
-#include "ble_gatt.h"
-#include "nrf_svc.h"
-
-/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations
- * @{ */
-
-/**
- * @brief GATTS API SVC numbers.
- */
-enum BLE_GATTS_SVCS
-{
-  SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */
-  SD_BLE_GATTS_INCLUDE_ADD,                      /**< Add an included service. */
-  SD_BLE_GATTS_CHARACTERISTIC_ADD,               /**< Add a characteristic. */
-  SD_BLE_GATTS_DESCRIPTOR_ADD,                   /**< Add a generic attribute. */
-  SD_BLE_GATTS_VALUE_SET,                        /**< Set an attribute value. */
-  SD_BLE_GATTS_VALUE_GET,                        /**< Get an attribute value. */
-  SD_BLE_GATTS_HVX,                              /**< Handle Value Notification or Indication. */
-  SD_BLE_GATTS_SERVICE_CHANGED,                  /**< Perform a Service Changed Indication to one or more peers. */
-  SD_BLE_GATTS_RW_AUTHORIZE_REPLY,               /**< Reply to an authorization request for a read or write operation on one or more attributes. */ 
-  SD_BLE_GATTS_SYS_ATTR_SET,                     /**< Set the persistent system attributes for a connection. */  
-  SD_BLE_GATTS_SYS_ATTR_GET,                     /**< Get updated persistent system attributes after terminating a connection. */
-};
-
-/** @} */
-
-/** @addtogroup BLE_GATTS_DEFINES Defines
- * @{ */
-
-/** @brief Only the default MTU size of 23 is currently supported. */
-#define GATT_RX_MTU 23
-
-/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS
- * @{ */
-#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE   (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */
-#define BLE_ERROR_GATTS_SYS_ATTR_MISSING    (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */
-/** @} */
-
-/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths
- * @{ */
-#define BLE_GATTS_FIX_ATTR_LEN_MAX (510)  /**< Maximum length for fixed length Attribute Values. */
-#define BLE_GATTS_VAR_ATTR_LEN_MAX (512)  /**< Maximum length for variable length Attribute Values. */ 
-/** @} */
-
-/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types
- * @{ */
-#define BLE_GATTS_SRVC_TYPE_INVALID          0x00  /**< Invalid Service Type. */
-#define BLE_GATTS_SRVC_TYPE_PRIMARY          0x01  /**< Primary Service. */
-#define BLE_GATTS_SRVC_TYPE_SECONDARY        0x02  /**< Secondary Type. */
-/** @} */
-
-
-/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types
- * @{ */
-#define BLE_GATTS_ATTR_TYPE_INVALID         0x00  /**< Invalid Attribute Type. */
-#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL  0x01  /**< Primary Service Declaration. */
-#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL   0x02  /**< Secondary Service Declaration. */
-#define BLE_GATTS_ATTR_TYPE_INC_DECL        0x03  /**< Include Declaration. */
-#define BLE_GATTS_ATTR_TYPE_CHAR_DECL       0x04  /**< Characteristic Declaration. */
-#define BLE_GATTS_ATTR_TYPE_CHAR_VAL        0x05  /**< Characteristic Value. */
-#define BLE_GATTS_ATTR_TYPE_DESC            0x06  /**< Descriptor. */
-#define BLE_GATTS_ATTR_TYPE_OTHER           0x07  /**< Other, non-GATT specific type. */
-/** @} */
-
-
-/** @defgroup BLE_GATTS_OPS GATT Server Operations
- * @{ */
-#define BLE_GATTS_OP_INVALID                0x00  /**< Invalid Operation. */
-#define BLE_GATTS_OP_WRITE_REQ              0x01  /**< Write Request. */
-#define BLE_GATTS_OP_WRITE_CMD              0x02  /**< Write Command. */
-#define BLE_GATTS_OP_SIGN_WRITE_CMD         0x03  /**< Signed Write Command. */
-#define BLE_GATTS_OP_PREP_WRITE_REQ         0x04  /**< Prepare Write Request. */
-#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL  0x05  /**< Execute Write Request: Cancel all prepared writes. */
-#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW     0x06  /**< Execute Write Request: Immediately execute all prepared writes. */
-/** @} */
-
-/** @defgroup BLE_GATTS_VLOCS GATT Value Locations
- * @{ */
-#define BLE_GATTS_VLOC_INVALID       0x00  /**< Invalid Location. */
-#define BLE_GATTS_VLOC_STACK         0x01  /**< Attribute Value is located in stack memory, no user memory is required. */
-#define BLE_GATTS_VLOC_USER          0x02  /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack
-                                                will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */
-/** @} */
-
-/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types
- * @{ */
-#define BLE_GATTS_AUTHORIZE_TYPE_INVALID    0x00  /**< Invalid Type. */
-#define BLE_GATTS_AUTHORIZE_TYPE_READ       0x01  /**< Authorize a Read Operation. */
-#define BLE_GATTS_AUTHORIZE_TYPE_WRITE      0x02  /**< Authorize a Write Request Operation. */
-/** @} */
-
-
-/** @} */
-
-/** @addtogroup BLE_GATTS_STRUCTURES Structures
- * @{ */
-
-/**
- * @brief BLE GATTS init options
- */
-typedef struct
-{
-  uint8_t   service_changed:1;             /**< Include the Service Changed characteristic in the local attributes. */
-} ble_gatts_enable_params_t;
-
-/**@brief Attribute metadata. */
-typedef struct
-{
-  ble_gap_conn_sec_mode_t read_perm;       /**< Read permissions. */
-  ble_gap_conn_sec_mode_t write_perm;      /**< Write permissions. */
-  uint8_t                 vlen       :1;   /**< Variable length attribute. */
-  uint8_t                 vloc       :2;   /**< Value location, see @ref BLE_GATTS_VLOCS.*/
-  uint8_t                 rd_auth    :1;   /**< Read Authorization and value will be requested from the application on every read operation. */ 
-  uint8_t                 wr_auth    :1;   /**< Write Authorization will be requested from the application on every Write Request operation (but not Write Command). */
-} ble_gatts_attr_md_t;
-
-
-/**@brief GATT Attribute. */
-typedef struct
-{
-  ble_uuid_t*          p_uuid;          /**< Pointer to the attribute UUID. */
-  ble_gatts_attr_md_t* p_attr_md;       /**< Pointer to the attribute metadata structure. */
-  uint16_t             init_len;        /**< Initial attribute value length in bytes. */
-  uint16_t             init_offs;       /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */
-  uint16_t             max_len;         /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */
-  uint8_t*             p_value;         /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer
-                                             that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. 
-                                             The stack may access that memory directly without the application's knowledge. */
-} ble_gatts_attr_t;
-
-
-/**@brief GATT Attribute Context. */
-typedef struct
-{
-  ble_uuid_t           srvc_uuid;       /**< Service UUID. */
-  ble_uuid_t           char_uuid;       /**< Characteristic UUID if applicable (BLE_UUID_TYPE_UNKNOWN if N/A). */
-  ble_uuid_t           desc_uuid;       /**< Descriptor UUID if applicable (BLE_UUID_TYPE_UNKNOWN if N/A). */
-  uint16_t             srvc_handle;     /**< Service Handle. */
-  uint16_t             value_handle;    /**< Characteristic Handle if applicable (BLE_GATT_HANDLE_INVALID if N/A). */
-  uint8_t              type;            /**< Attribute Type, see @ref BLE_GATTS_ATTR_TYPES. */
-} ble_gatts_attr_context_t;
-
-
-/**@brief GATT Characteristic Presentation Format. */
-typedef struct
-{
-  uint8_t          format;      /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */
-  int8_t           exponent;    /**< Exponent for integer data types. */
-  uint16_t         unit;        /**< UUID from Bluetooth Assigned Numbers. */
-  uint8_t          name_space;  /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */
-  uint16_t         desc;        /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */
-} ble_gatts_char_pf_t;
-
-
-/**@brief GATT Characteristic metadata. */
-typedef struct
-{
-  ble_gatt_char_props_t       char_props;               /**< Characteristic Properties. */
-  ble_gatt_char_ext_props_t   char_ext_props;           /**< Characteristic Extended Properties. */
-  uint8_t*                    p_char_user_desc;         /**< Pointer to a UTF-8, NULL if the descriptor is not required. */
-  uint16_t                    char_user_desc_max_size;  /**< The maximum size in bytes of the user description descriptor. */
-  uint16_t                    char_user_desc_size;      /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ 
-  ble_gatts_char_pf_t*        p_char_pf;                /**< Pointer to a presentation format structure or NULL if the descriptor is not required. */
-  ble_gatts_attr_md_t*        p_user_desc_md;           /**< Attribute metadata for the User Description descriptor, or NULL for default values. */
-  ble_gatts_attr_md_t*        p_cccd_md;                /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */
-  ble_gatts_attr_md_t*        p_sccd_md;                /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */
-} ble_gatts_char_md_t;
-
-
-/**@brief GATT Characteristic Definition Handles. */
-typedef struct
-{
-  uint16_t          value_handle;       /**< Handle to the characteristic value. */
-  uint16_t          user_desc_handle;   /**< Handle to the User Description descriptor, or BLE_GATT_HANDLE_INVALID if not present. */
-  uint16_t          cccd_handle;        /**< Handle to the Client Characteristic Configuration Descriptor, or BLE_GATT_HANDLE_INVALID if not present. */
-  uint16_t          sccd_handle;        /**< Handle to the Server Characteristic Configuration Descriptor, or BLE_GATT_HANDLE_INVALID if not present. */
-} ble_gatts_char_handles_t;
-
-
-/**@brief GATT HVx parameters. */
-typedef struct
-{
-  uint16_t          handle;             /**< Characteristic Value Handle. */
-  uint8_t           type;               /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */
-  uint16_t          offset;             /**< Offset within the attribute value. */
-  uint16_t*         p_len;              /**< Length in bytes to be written, length in bytes written after successful return. */
-  uint8_t*          p_data;             /**< Actual data content, use NULL to use the current attribute value. */
-} ble_gatts_hvx_params_t;
-
-/**@brief GATT Read Authorization parameters. */
-typedef struct
-{
-  uint16_t          gatt_status;        /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */
-  uint8_t           update : 1;         /**< If set, data supplied in p_data will be used in the ATT response. */
-  uint16_t          offset;             /**< Offset of the attribute value being updated. */
-  uint16_t          len;                /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */
-  uint8_t*          p_data;             /**< Pointer to new value used to update the attribute value. */
-} ble_gatts_read_authorize_params_t;
-
-/**@brief GATT Write Authorisation parameters. */
-typedef struct
-{
-  uint16_t          gatt_status;        /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */
-} ble_gatts_write_authorize_params_t;
-
-/**@brief GATT Read or Write Authorize Reply parameters. */
-typedef struct
-{
-  uint8_t                               type;   /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */
-  union {
-    ble_gatts_read_authorize_params_t   read;   /**< Read authorization parameters. */
-    ble_gatts_write_authorize_params_t  write;  /**< Write authorization parameters. */
-  } params;
-} ble_gatts_rw_authorize_reply_params_t;
-
-
-/**
- * @brief GATT Server Event IDs.
- */
-enum BLE_GATTS_EVTS
-{
-  BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE,       /**< Write operation performed. */
-  BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST,             /**< Read/Write Authorization request. */
-  BLE_GATTS_EVT_SYS_ATTR_MISSING,                 /**< A persistent system attribute access is pending, awaiting a sd_ble_gatts_sys_attr_set(). */
-  BLE_GATTS_EVT_HVC,                              /**< Handle Value Confirmation. */
-  BLE_GATTS_EVT_SC_CONFIRM,                       /**< Service Changed Confirmation. */
-  BLE_GATTS_EVT_TIMEOUT                           /**< Timeout. */
-};
-
-
-/**@brief Event structure for BLE_GATTS_EVT_WRITE. */
-typedef struct
-{
-  uint16_t                    handle;             /**< Attribute Handle. */
-  uint8_t                     op;                 /**< Type of write operation, see @ref BLE_GATTS_OPS. */
-  ble_gatts_attr_context_t    context;            /**< Attribute Context. */
-  uint16_t                    offset;             /**< Offset for the write operation. */
-  uint16_t                    len;                /**< Length of the incoming data. */
-  uint8_t                     data[1];            /**< Incoming data, variable length. */
-} ble_gatts_evt_write_t;
-
-/**@brief Event structure for authorize read request. */
-typedef struct
-{
-  uint16_t                    handle;             /**< Attribute Handle. */
-  ble_gatts_attr_context_t    context;            /**< Attribute Context. */
-  uint16_t                    offset;             /**< Offset for the read operation. */
-} ble_gatts_evt_read_t;
-
-/**@brief Event structure for BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */
-typedef struct
-{
-  uint8_t                     type;             /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */
-  union {
-    ble_gatts_evt_read_t      read;             /**< Attribute Read Parameters. */
-    ble_gatts_evt_write_t     write;            /**< Attribute Write Parameters. */
-  } request;
-} ble_gatts_evt_rw_authorize_request_t;
-
-/**@brief Event structure for BLE_GATTS_EVT_SYS_ATTR_MISSING. */
-typedef struct
-{
-  uint8_t hint;
-} ble_gatts_evt_sys_attr_missing_t;
-
-
-/**@brief Event structure for BLE_GATTS_EVT_HVC. */
-typedef struct
-{
-  uint16_t          handle;                       /**< Attribute Handle. */
-} ble_gatts_evt_hvc_t;
-
-/**@brief Event structure for BLE_GATTS_EVT_TIMEOUT. */
-typedef struct
-{
-  uint8_t          src;                       /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */
-} ble_gatts_evt_timeout_t;
-
-
-/**@brief GATT Server event callback event structure. */
-typedef struct
-{
-  uint16_t conn_handle;                                       /**< Connection Handle on which event occurred. */
-  union
-  {
-    ble_gatts_evt_write_t                 write;              /**< Write Event Parameters. */
-    ble_gatts_evt_rw_authorize_request_t  authorize_request;  /**< Read or Write Authorize Request Parameters. */
-    ble_gatts_evt_sys_attr_missing_t      sys_attr_missing;   /**< System attributes missing. */
-    ble_gatts_evt_hvc_t                   hvc;                /**< Handle Value Confirmation Event Parameters. */
-    ble_gatts_evt_timeout_t               timeout;            /**< Timeout Event. */
-  } params;
-} ble_gatts_evt_t;
-
-/** @} */
-
-/** @addtogroup BLE_GATTS_FUNCTIONS Functions
- * @{ */
-
-/**@brief Add a service declaration to the local server ATT table.
- *
- * @param[in] type      Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES.
- * @param[in] p_uuid    Pointer to service UUID.
- * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored.
- *
- * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to
- *       add a secondary service declaration that is not referenced by another service later in the ATT table.
- *
- * @return @ref NRF_SUCCESS Successfully added a service declaration.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table.
- * @return @ref NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- */
-SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const*const p_uuid, uint16_t *const p_handle));
-
-
-/**@brief Add an include declaration to the local server ATT table.
- *
- * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential addition is supported at this time). 
- *
- * @note The included service must already be present in the ATT table prior to this call.
- *
- * @param[in] service_handle    Handle of the service where the included service is to be placed, if BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
- * @param[in] inc_srvc_handle   Handle of the included service.
- * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored.
- *
- * @return @ref NRF_SUCCESS Successfully added an include declaration.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation.
- * @return @ref NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- * @return @ref NRF_ERROR_NOT_FOUND Attribute not found.
- */
-SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *const p_include_handle));
-
-
-/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the local server ATT table.
- *
- * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential addition is supported at this time). 
- *
- * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writeable auxiliaries bits,
- *       readable (no security) and writeable (selectable) CCCDs and SCCDs and valid presentation format values.
- *
- * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions.
- *
- * @param[in] service_handle    Handle of the service where the characteristic is to be placed, if BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
- * @param[in] p_char_md         Characteristic metadata.
- * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value.
- * @param[out] p_handles        Pointer to the structure where the assigned handles will be stored.
- *
- * @return @ref NRF_SUCCESS Successfully added a characteristic.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required.
- * @return @ref NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
- */
-SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const*const p_char_md, ble_gatts_attr_t const*const p_attr_char_value, ble_gatts_char_handles_t *const p_handles));
-
-
-/**@brief Add a descriptor to the local server ATT table.
- *
- * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential addition is supported at this time). 
- *
- * @param[in] char_handle   Handle of the characteristic where the descriptor is to be placed, if BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
- * @param[in] p_attr        Pointer to the attribute structure.
- * @param[out] p_handle     Pointer to a 16-bit word where the assigned handle will be stored.
- *
- * @return @ref NRF_SUCCESS Successfully added a descriptor.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required.
- * @return @ref NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
- */
-SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const * const p_attr, uint16_t* const p_handle));
-
-/**@brief Set the value of a given attribute.
- *
- * @param[in] handle    Attribute handle.
- * @param[in] offset    Offset in bytes to write from.
- * @param[in,out] p_len Length in bytes to be written, length in bytes written after successful return.
- * @param[in] p_value   Pointer to a buffer (at least len bytes long) containing the desired attribute value. If value is stored in user memory, only the attribute length is updated when p_value == NULL.
- *
- * @return @ref NRF_SUCCESS Successfully set the value of the attribute.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_NOT_FOUND Attribute not found.
- * @return @ref NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
- */
-SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t handle, uint16_t offset, uint16_t* const p_len, uint8_t const * const p_value));
-
-/**@brief Get the value of a given attribute.
- *
- * @param[in] handle     Attribute handle.
- * @param[in] offset     Offset in bytes to read from.
- * @param[in,out] p_len  Length in bytes to be read, total length of attribute value (in bytes, starting from offset) after successful return.
- * @param[in,out] p_data Pointer to a buffer (at least len bytes long) where to store the attribute value. Set to NULL to obtain the complete length of attribute value.
- *
- * @note                 If the attribute value is longer than the size of the supplied buffer,
- *                       p_len will return the total attribute value length (excluding offset),
- *                       and not the number of bytes actually returned in p_data.
- *                       The application may use this information to allocate a suitable buffer size.
- * 
- * @return @ref NRF_SUCCESS Successfully retrieved the value of the attribute.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_NOT_FOUND Attribute not found.
- */
-SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t handle, uint16_t offset, uint16_t *const p_len, uint8_t* const p_data));
-
-/**@brief Notify or Indicate an attribute value.
- *
- * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation
- *          (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that
- *          the application can atomically perform a value update and a server initiated transaction with a single API call.
- *          If the application chooses to indicate an attribute value, a @ref BLE_GATTS_EVT_HVC will be sent up as soon as the confirmation arrives from
- *          the peer.
- *
- * @note    The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. 
- *          When receiveing the error codes @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and 
- *          @ref BLE_ERROR_NO_TX_BUFFERS the ATT table has been updated.
- *          The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len).
- *
- * @note    It is important to note that a notification will <b>consume an application buffer</b>, and will therefore 
- *          generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted. An indication on the other hand will use the 
- *          standard server internal buffer and thus will only generate a @ref BLE_GATTS_EVT_HVC event as soon as the confirmation 
- *          has been received from the peer. Please see the documentation of @ref sd_ble_tx_buffer_count_get for more details.
- *
- * @param[in] conn_handle  Connection handle.
- * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with
- *                         the contents pointed by it before sending the notification or indication.
- *
- * @return @ref NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate.
- * @return @ref BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated.
- * @return @ref NRF_ERROR_NOT_FOUND Attribute not found.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation, notifications or indications must be enabled in the CCCD.
- * @return @ref NRF_ERROR_BUSY Procedure already in progress.
- * @return @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value.
- * @return @ref BLE_ERROR_NO_TX_BUFFERS There are no available buffers to send the data, applies only to notifications.
- */
-SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const*const p_hvx_params));
-
-/**@brief Indicate the Service Changed attribute value.
- *
- * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the attribute
- *          table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will
- *          be issued.
- *
- * @note    Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here.
- *
- * @param[in] conn_handle  Connection handle.
- * @param[in] start_handle Start of affected attribute handle range.
- * @param[in] end_handle   End of affected attribute handle range.
- *
- * @return @ref NRF_SUCCESS Successfully queued the Service Changed indication for transmission.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application.
- * @return @ref NRF_ERROR_INVALID_STATE Invalid state to perform operation, notifications or indications must be enabled in the CCCD.
- * @return @ref NRF_ERROR_BUSY Procedure already in progress.
- * @return @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value.
- */
-SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle));
-
-/**@brief Respond to a Read/Write authorization request.
- *
- * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application.
- *
- * @param[in] conn_handle                 Connection handle.
- * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application.
- *
- * @return @ref NRF_SUCCESS               Successfully queued a response to the peer, and in the case of a write operation, ATT table updated.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_STATE   No authorization request pending.
- * @return @ref NRF_ERROR_INVALID_PARAM   Authorization op invalid,
- *                                         or for Read Authorization reply: requested handles not replied with,
- *                                         or for Write Authorization reply: handle supplied does not match requested handle.
- */
-SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const*const p_rw_authorize_reply_params));
-
-
-/**@brief Update persistent system attribute information.
- *
- * @details Supply to the stack information about persistent system attributes.
- *          This call is legal in the connected state only, and is usually 
- *          made immediately after a connection is established and the bond identified.
- *          usually as a response to a BLE_GATTS_EVT_SYS_ATTR_MISSING.
- *
- *          p_sysattrs may point directly to the application's stored copy of the struct.
- *          If the pointer is NULL, the system attribute info is initialized, assuming that
- *          the application does not have any previously saved data for this bond.
- *
- * @note The state of persistent system attributes is reset upon connection and then remembered for its duration. 
- *
- * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially.
- *       This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or
- *       reset the SoftDevice to return to a known state.
- *
- * @param[in]  conn_handle        Connection handle.
- * @param[in]  p_sys_attr_data    Pointer to a saved copy of system attributes supplied to the stack, or NULL.
- * @param[in]  len                Size of data pointed by p_sys_attr_data, in octets. 
- *
- * @return @ref NRF_SUCCESS Successfully set the system attribute information.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- */ 
-SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const*const p_sys_attr_data, uint16_t len)); 
-
- 
-/**@brief Retrieve persistent system attribute information from the stack.
- *
- * @details This call is used to retrieve information about values to be stored perisistently by the application
- *          after a connection has been terminated. When a new connection is made to the same bond, the values
- *          should be restored using @ref sd_ble_gatts_sys_attr_set.
- *          The data should be read before any new advertising is started, or any new connection established. The connection handle for
- *          the previous now defunct connection will remain valid until a new one is created to allow this API call to refer to it.
- *
- * @param[in]     conn_handle       Connection handle of the recently terminated connection.
- * @param[in]     p_sys_attr_data   Pointer to a buffer where updated information about system attributes will be filled in. NULL can be provided to 
- *                                  obtain the length of the data
- * @param[in,out] p_len             Size of application buffer if p_sys_attr_data is not NULL. Unconditially updated to actual length of system attribute data.
- *
- * @return @ref NRF_SUCCESS Successfully retrieved the system attribute information.
- * @return @ref BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer.
- */ 
-SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t * const p_sys_attr_data, uint16_t* const p_len)); 
-
-/** @} */
-
-#endif // BLE_GATTS_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_hci.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_hci.h
deleted file mode 100644
index faed593cc2..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_hci.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
-  Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
-
-  The information contained herein is confidential property of Nordic Semiconductor. The use,
-  copying, transfer or disclosure of such information is prohibited except by express written
-  agreement with Nordic Semiconductor.
- */
-/**
-  @addtogroup BLE_COMMON
-  @{
-*/
-
-
-#ifndef BLE_HCI_H__
-#define BLE_HCI_H__
-
-/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes
- * @{ */
-
-#define BLE_HCI_STATUS_CODE_SUCCESS                        0x00
-#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND           0x01
-#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER  0x02
-/*0x03 Hardware Failure
-0x04 Page Timeout
-*/
-#define BLE_HCI_AUTHENTICATION_FAILURE                     0x05
-#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING             0x06
-#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED                   0x07
-#define BLE_HCI_CONNECTION_TIMEOUT                         0x08
-/*0x09 Connection Limit Exceeded
-0x0A Synchronous Connection Limit To A Device Exceeded
-0x0B ACL Connection Already Exists*/
-#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED             0x0C
-/*0x0D Connection Rejected due to Limited Resources
-0x0E Connection Rejected Due To Security Reasons
-0x0F Connection Rejected due to Unacceptable BD_ADDR
-0x10 Connection Accept Timeout Exceeded
-0x11 Unsupported Feature or Parameter Value*/
-#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12
-#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION           0x13
-#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14
-#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF     0x15
-#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION            0x16
-/*
-0x17 Repeated Attempts
-0x18 Pairing Not Allowed
-0x19 Unknown LMP PDU
-*/
-#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A
-/*
-0x1B SCO Offset Rejected
-0x1C SCO Interval Rejected
-0x1D SCO Air Mode Rejected*/
-#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS     0x1E
-#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR          0x1F
-/*0x20 Unsupported LMP Parameter Value
-0x21 Role Change Not Allowed
-*/
-#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT       0x22
-/*0x23 LMP Error Transaction Collision*/
-#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED        0x24
-/*0x25 Encryption Mode Not Acceptable
-0x26 Link Key Can Not be Changed
-0x27 Requested QoS Not Supported
-*/
-#define BLE_HCI_INSTANT_PASSED                         0x28
-#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED      0x29
-#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION        0x2A
-/*
-0x2B Reserved
-0x2C QoS Unacceptable Parameter
-0x2D QoS Rejected
-0x2E Channel Classification Not Supported
-0x2F Insufficient Security
-0x30 Parameter Out Of Mandatory Range
-0x31 Reserved
-0x32 Role Switch Pending
-0x33 Reserved
-0x34 Reserved Slot Violation
-0x35 Role Switch Failed
-0x36 Extended Inquiry Response Too Large
-0x37 Secure Simple Pairing Not Supported By Host.
-0x38 Host Busy - Pairing
-0x39 Connection Rejected due to No Suitable Channel Found*/
-#define BLE_HCI_CONTROLLER_BUSY                        0x3A
-#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE             0x3B
-#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT            0x3C
-#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE     0x3D
-#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED          0x3E
-
-/** @} */
-
-
-#endif // BLE_HCI_H__
-
-/** @} */
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_l2cap.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_l2cap.h
deleted file mode 100644
index d74ee21865..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_l2cap.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP)
-  @{
-  @brief Definitions and prototypes for the L2CAP interface.
- */
-
-#ifndef BLE_L2CAP_H__
-#define BLE_L2CAP_H__ 
-
-#include "ble_types.h"
-#include "ble_ranges.h"
-#include "ble_err.h"
-#include "nrf_svc.h"
-
-/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations
- * @{ */
-
-/**@brief L2CAP API SVC numbers. */
-enum BLE_L2CAP_SVCS 
-{
-  SD_BLE_L2CAP_CID_REGISTER = BLE_L2CAP_SVC_BASE,  /**< Register a CID. */
-  SD_BLE_L2CAP_CID_UNREGISTER,                     /**< Unregister a CID. */
-  SD_BLE_L2CAP_TX                                  /**< Transmit a packet. */
-};
-
-/** @} */
-
-/**@addtogroup BLE_L2CAP_DEFINES Defines
- * @{ */
-
-/**@defgroup BLE_ERRORS_L2CAP SVC return values specific to L2CAP
- * @{ */
-#define BLE_ERROR_L2CAP_CID_IN_USE            (NRF_L2CAP_ERR_BASE + 0x000)  /**< CID already in use. */
-/** @} */
-
-/**@brief Default L2CAP MTU. */
-#define BLE_L2CAP_MTU_DEF           (23)    
-
-/**@brief Invalid Channel Identifier. */
-#define BLE_L2CAP_CID_INVALID       (0x0000) 
-
-/**@brief Dynamic Channel Identifier base. */
-#define BLE_L2CAP_CID_DYN_BASE      (0x0040) 
-
-/**@brief Maximum amount of dynamic CIDs. */
-#define BLE_L2CAP_CID_DYN_MAX       (8) 
-
-/** @} */
-
-/**@addtogroup BLE_L2CAP_STRUCTURES Structures
- * @{ */
-
-/**@brief Packet header format for L2CAP transmission. */
-typedef struct
-{
-  uint16_t   len;                                 /**< Length of valid info in data member. */
-  uint16_t   cid;                                 /**< Channel ID on which packet is transmitted. */
-} ble_l2cap_header_t;
-
-/**@brief L2CAP Event IDs. */
-enum BLE_L2CAP_EVTS 
-{
-  BLE_L2CAP_EVT_RX  = BLE_L2CAP_EVT_BASE          /**< L2CAP packet received. */
-};
-
-
-/**@brief L2CAP Received packet event report. */
-typedef struct
-{
-  ble_l2cap_header_t header;                      /** L2CAP packet header. */
-  uint8_t    data[1];                             /**< Packet data, variable length. */
-} ble_l2cap_evt_rx_t;
-
-
-/**@brief L2CAP event callback event structure. */
-typedef struct
-{
-  uint16_t conn_handle;                           /**< Connection Handle on which event occured. */
-  union
-  {
-    ble_l2cap_evt_rx_t rx;                        /**< RX Event parameters. */
-  } params;
-} ble_l2cap_evt_t;
-
-
-/**@brief Register a CID with L2CAP.
- *
- * @details This registers a higher protocol layer with the L2CAP multiplexer, and is requried prior to all operations on the CID.
- *          
- * @param[in] cid L2CAP CID.
- *
- * @return @ref NRF_SUCCESS Successfully registered a CID with the L2CAP layer.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, CID must be above @ref BLE_L2CAP_CID_DYN_BASE.
- * @return @ref BLE_ERROR_L2CAP_CID_IN_USE L2CAP CID already in use.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- */
-SVCALL(SD_BLE_L2CAP_CID_REGISTER, uint32_t, sd_ble_l2cap_cid_register(uint16_t cid));
-
-/**@brief Unregister a CID with L2CAP.
- *
- * @details This unregisters a previously registerd higher protocol layer with the L2CAP multiplexer.
- *          
- * @param[in] cid L2CAP CID.
- *
- * @return @ref NRF_SUCCESS Successfully unregistered the CID.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
- * @return @ref NRF_ERROR_NOT_FOUND CID not previously registered.
- */
-SVCALL(SD_BLE_L2CAP_CID_UNREGISTER, uint32_t, sd_ble_l2cap_cid_unregister(uint16_t cid));
-
-/**@brief Transmit an L2CAP packet.
- *
- * @note    It is important to note that a call to this function will <b>consume an application buffer</b>, and will therefore 
- *          generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted. 
- *          Please see the documentation of @ref sd_ble_tx_buffer_count_get for more details.
- *
- * @param[in] conn_handle Connection Handle.
- * @param[in] p_header    Pointer to a packet header containing length and CID.
- * @param[in] p_data      Pointer to the data to be transmitted.
- *
- * @return @ref NRF_SUCCESS Successfully queued an L2CAP packet for transmission.
- * @return @ref NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
- * @return @ref NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, CIDs must be registered beforehand with @ref sd_ble_l2cap_cid_register.
- * @return @ref NRF_ERROR_NOT_FOUND CID not found.
- * @return @ref NRF_ERROR_NO_MEM Not enough memory to complete operation.
- * @return @ref BLE_ERROR_NO_TX_BUFFERS Not enough application buffers available.
- * @return @ref NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, see @ref BLE_L2CAP_MTU_DEF.
- */
-SVCALL(SD_BLE_L2CAP_TX, uint32_t, sd_ble_l2cap_tx(uint16_t conn_handle, ble_l2cap_header_t const * const p_header, uint8_t const * const p_data));
-
-/** @} */
-
-#endif // BLE_L2CAP_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_ranges.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_ranges.h
deleted file mode 100644
index dfd9b63bcf..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_ranges.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
-  Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
-
-  The information contained herein is confidential property of Nordic Semiconductor. The use,
-  copying, transfer or disclosure of such information is prohibited except by express written
-  agreement with Nordic Semiconductor.
- */
-/**
-  @addtogroup BLE_COMMON
-  @{
-  @defgroup ble_ranges Module specific SVC and event number subranges
-  @{
-
-  @brief Definition of SVC and event number subranges for each API module.
-
-  @note
-  SVCs and event numbers are split into subranges for each API module.
-  Each module receives its entire allocated range of SVC calls, whether implemented or not,
-  but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range.
-
-  Note that the symbols BLE_<module>_SVC_LAST is the end of the allocated SVC range,
-  rather than the last SVC function call actually defined and implemented.
-
-  Specific SVC and event values are defined in each module's ble_<module>.h file,
-  which defines names of each individual SVC code based on the range start value.
-*/
-
-#ifndef BLE_RANGES_H__
-#define BLE_RANGES_H__
-
-#define BLE_SVC_BASE           0x60
-#define BLE_SVC_LAST           0x6B       /* Total: 12. */
-
-#define BLE_RESERVED_SVC_BASE  0x6C
-#define BLE_RESERVED_SVC_LAST  0x6F       /* Total: 4. */
-
-#define BLE_GAP_SVC_BASE       0x70
-#define BLE_GAP_SVC_LAST       0x8F       /* Total: 32. */
-
-#define BLE_GATTC_SVC_BASE     0x90
-#define BLE_GATTC_SVC_LAST     0x9F       /* Total: 16. */
-
-#define BLE_GATTS_SVC_BASE     0xA0
-#define BLE_GATTS_SVC_LAST     0xAF       /* Total: 16. */
-
-#define BLE_L2CAP_SVC_BASE     0xB0
-#define BLE_L2CAP_SVC_LAST     0xBF       /* Total: 16. */
-
-
-#define BLE_EVT_INVALID        0x00
-
-#define BLE_EVT_BASE           0x01
-#define BLE_EVT_LAST           0x0F       /* Total: 15. */
-
-#define BLE_GAP_EVT_BASE       0x10
-#define BLE_GAP_EVT_LAST       0x2F       /* Total: 32. */
-
-#define BLE_GATTC_EVT_BASE     0x30
-#define BLE_GATTC_EVT_LAST     0x4F       /* Total: 32. */
-
-#define BLE_GATTS_EVT_BASE     0x50
-#define BLE_GATTS_EVT_LAST     0x6F       /* Total: 32. */
-
-#define BLE_L2CAP_EVT_BASE     0x70
-#define BLE_L2CAP_EVT_LAST     0x8F       /* Total: 32.  */
-
-#define BLE_OPT_INVALID        0x00       /**< Invalid BLE Option. */
-
-#define BLE_OPT_BASE           0x01       /**< Common BLE Option base. */
-#define BLE_OPT_LAST           0x1F       /**< Total: 31. */
-
-#define BLE_GAP_OPT_BASE       0x20       /**< GAP BLE Option base. */
-#define BLE_GAP_OPT_LAST       0x3F       /**< Total: 32. */
-
-#define BLE_GATTC_OPT_BASE     0x40       /**< GATTC BLE Option base. */
-#define BLE_GATTC_OPT_LAST     0x5F       /**< Total: 32. */
-
-#define BLE_GATTS_OPT_BASE     0x60       /**< GATTS BLE Option base. */
-#define BLE_GATTS_OPT_LAST     0x7F       /**< Total: 32. */
-
-#define BLE_L2CAP_OPT_BASE     0x80       /**< L2CAP BLE Option base. */
-#define BLE_L2CAP_OPT_LAST     0x9F       /**< Total: 32.  */
-
-#endif /* BLE_RANGES_H__ */
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_types.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_types.h
deleted file mode 100644
index 820553f0a9..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/ble_types.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @addtogroup BLE_COMMON
-  @{
-  @defgroup ble_types Common types and macro definitions
-  @{
-
-  @brief Common types and macro definitions for the S110 SoftDevice.
- */
-
-#ifndef BLE_TYPES_H__
-#define BLE_TYPES_H__
-
-#include <stdint.h>
-
-/** @addtogroup BLE_COMMON_DEFINES Defines
- * @{ */
-
-/** @defgroup BLE_CONN_HANDLES BLE Connection Handles
- * @{ */
-#define BLE_CONN_HANDLE_INVALID 0xFFFF  /**< Invalid Connection Handle. */
-#define BLE_CONN_HANDLE_ALL     0xFFFE  /**< Applies to all Connection Handles. */
-/** @} */
-
-
-/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs
- * @{ */
-/* Generic UUIDs, applicable to all services */
-#define BLE_UUID_UNKNOWN                              0x0000 /**< Reserved UUID. */
-#define BLE_UUID_SERVICE_PRIMARY                      0x2800 /**< Primary Service. */
-#define BLE_UUID_SERVICE_SECONDARY                    0x2801 /**< Secondary Service. */
-#define BLE_UUID_SERVICE_INCLUDE                      0x2802 /**< Include. */
-#define BLE_UUID_CHARACTERISTIC                       0x2803 /**< Characteristic. */
-#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP             0x2900 /**< Characteristic Extended Properties Descriptor. */
-#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC            0x2901 /**< Characteristic User Description Descriptor. */
-#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG        0x2902 /**< Client Characteristic Configuration Descriptor. */
-#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG        0x2903 /**< Server Characteristic Configuration Descriptor. */
-#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT  0x2904 /**< Characteristic Presentation Format Descriptor. */
-#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT     0x2905 /**< Characteristic Aggregate Format Descriptor. */
-/* GATT specific UUIDs */
-#define BLE_UUID_GATT                                 0x1801 /**< Generic Attribute Profile. */
-#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED  0x2A05 /**< Service Changed Characteristic. */
-/* GAP specific UUIDs */
-#define BLE_UUID_GAP                                  0x1800 /**< Generic Access Profile. */
-#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME       0x2A00 /**< Device Name Characteristic. */
-#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE        0x2A01 /**< Appearance Characteristic. */
-#define BLE_UUID_GAP_CHARACTERISTIC_PPF               0x2A02 /**< Peripheral Privacy Flag Characteristic. */
-#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR       0x2A03 /**< Reconnection Address Characteristic. */
-#define BLE_UUID_GAP_CHARACTERISTIC_PPCP              0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */
-/** @} */
-
-
-/** @defgroup BLE_UUID_TYPES Types of UUID
- * @{ */
-#define BLE_UUID_TYPE_UNKNOWN       0x00 /**< Invalid UUID type. */
-#define BLE_UUID_TYPE_BLE           0x01 /**< Bluetooth SIG UUID (16-bit). */
-#define BLE_UUID_TYPE_VENDOR_BEGIN  0x02 /**< Vendor UUID types start at this index (128-bit). */
-/** @} */
-
-
-/** @defgroup BLE_APPEARANCES Bluetooth Appearance values
- *  @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml
- * @{ */
-#define BLE_APPEARANCE_UNKNOWN                                0 /**< Unknown. */
-#define BLE_APPEARANCE_GENERIC_PHONE                         64 /**< Generic Phone. */
-#define BLE_APPEARANCE_GENERIC_COMPUTER                     128 /**< Generic Computer. */
-#define BLE_APPEARANCE_GENERIC_WATCH                        192 /**< Generic Watch. */
-#define BLE_APPEARANCE_WATCH_SPORTS_WATCH                   193 /**< Watch: Sports Watch. */
-#define BLE_APPEARANCE_GENERIC_CLOCK                        256 /**< Generic Clock. */
-#define BLE_APPEARANCE_GENERIC_DISPLAY                      320 /**< Generic Display. */
-#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL               384 /**< Generic Remote Control. */
-#define BLE_APPEARANCE_GENERIC_EYE_GLASSES                  448 /**< Generic Eye-glasses. */
-#define BLE_APPEARANCE_GENERIC_TAG                          512 /**< Generic Tag. */
-#define BLE_APPEARANCE_GENERIC_KEYRING                      576 /**< Generic Keyring. */
-#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER                 640 /**< Generic Media Player. */
-#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER              704 /**< Generic Barcode Scanner. */
-#define BLE_APPEARANCE_GENERIC_THERMOMETER                  768 /**< Generic Thermometer. */
-#define BLE_APPEARANCE_THERMOMETER_EAR                      769 /**< Thermometer: Ear. */
-#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR            832 /**< Generic Heart rate Sensor. */
-#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT    833 /**< Heart Rate Sensor: Heart Rate Belt. */
-#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE               896 /**< Generic Blood Pressure. */
-#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM                   897 /**< Blood Pressure: Arm. */
-#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST                 898 /**< Blood Pressure: Wrist. */
-#define BLE_APPEARANCE_GENERIC_HID                          960 /**< Human Interface Device (HID). */
-#define BLE_APPEARANCE_HID_KEYBOARD                         961 /**< Keyboard (HID Subtype). */
-#define BLE_APPEARANCE_HID_MOUSE                            962 /**< Mouse (HID Subtype). */
-#define BLE_APPEARANCE_HID_JOYSTICK                         963 /**< Joystiq (HID Subtype). */
-#define BLE_APPEARANCE_HID_GAMEPAD                          964 /**< Gamepad (HID Subtype). */
-#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE                 965 /**< Digitizer Tablet (HID Subtype). */
-#define BLE_APPEARANCE_HID_CARD_READER                      966 /**< Card Reader (HID Subtype). */
-#define BLE_APPEARANCE_HID_DIGITAL_PEN                      967 /**< Digital Pen (HID Subtype). */
-#define BLE_APPEARANCE_HID_BARCODE                          968 /**< Barcode Scanner (HID Subtype). */
-#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER               1024 /**< Generic Glucose Meter. */
-#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR      1088 /**< Generic Running Walking Sensor. */
-#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE      1089 /**< Running Walking Sensor: In-Shoe. */
-#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE      1090 /**< Running Walking Sensor: On-Shoe. */
-#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP       1091 /**< Running Walking Sensor: On-Hip. */
-#define BLE_APPEARANCE_GENERIC_CYCLING                     1152 /**< Generic Cycling. */
-#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER            1153 /**< Cycling: Cycling Computer. */
-#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR                1154 /**< Cycling: Speed Sensor. */
-#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR              1155 /**< Cycling: Cadence Sensor. */
-#define BLE_APPEARANCE_CYCLING_POWER_SENSOR                1156 /**< Cycling: Power Sensor. */
-#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR        1157 /**< Cycling: Speed and Cadence Sensor. */
-#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER              3136 /**< Generic Pulse Oximeter. */
-#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP            3137 /**< Fingertip (Pulse Oximeter subtype). */
-#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN           3138 /**< Wrist Worn(Pulse Oximeter subtype). */
-#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE                3200 /**< Generic Weight Scale. */
-#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT          5184 /**< Generic Outdoor Sports Activity. */
-#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP         5185 /**< Location Display Device (Outdoor Sports Activity subtype). */
-#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */
-#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD          5187 /**< Location Pod (Outdoor Sports Activity subtype). */
-#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD  5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */
-/** @} */
-
-/** @brief Set .type and .uuid fields of ble_uuid_struct to specified uuid value. */
-#define BLE_UUID_BLE_ASSIGN(instance, value) do {\
-            instance.type = BLE_UUID_TYPE_BLE; \
-            instance.uuid = value;} while(0)
-
-/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */
-#define BLE_UUID_COPY_PTR(dst, src) do {\
-            (dst)->type = (src)->type; \
-            (dst)->uuid = (src)->uuid;} while(0)
-
-/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */
-#define BLE_UUID_COPY_INST(dst, src) do {\
-            (dst).type = (src).type; \
-            (dst).uuid = (src).uuid;} while(0)
-
-/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */
-#define BLE_UUID_EQ(p_uuid1, p_uuid2) \
-            (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid))
-
-/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */
-#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \
-            (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid))
-
-/** @} */
-
-/** @addtogroup BLE_TYPES_STRUCTURES Structures
- * @{ */
-
-/** @brief 128 bit UUID values. */
-typedef struct
-{ 
-    unsigned char uuid128[16];
-} ble_uuid128_t;
-
-/** @brief  Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */
-typedef struct
-{
-    uint16_t    uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */
-    uint8_t     type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */
-} ble_uuid_t;
-
-/** @} */
-
-#endif /* BLE_TYPES_H__ */
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error.h
deleted file mode 100644
index 518ef82b8f..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- /**
-  @defgroup nrf_error SoftDevice Global Error Codes
-  @{
-   
-  @brief Global Error definitions
-*/
-
-/* Header guard */
-#ifndef NRF_ERROR_H__
-#define NRF_ERROR_H__
-
-/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions
- * @{ */
-#define NRF_ERROR_BASE_NUM      (0x0)       ///< Global error base
-#define NRF_ERROR_SDM_BASE_NUM  (0x1000)    ///< SDM error base
-#define NRF_ERROR_SOC_BASE_NUM  (0x2000)    ///< SoC error base
-#define NRF_ERROR_STK_BASE_NUM  (0x3000)    ///< STK error base
-/** @} */
-
-#define NRF_SUCCESS                           (NRF_ERROR_BASE_NUM + 0)  ///< Successful command
-#define NRF_ERROR_SVC_HANDLER_MISSING         (NRF_ERROR_BASE_NUM + 1)  ///< SVC handler is missing
-#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED      (NRF_ERROR_BASE_NUM + 2)  ///< SoftDevice has not been enabled
-#define NRF_ERROR_INTERNAL                    (NRF_ERROR_BASE_NUM + 3)  ///< Internal Error
-#define NRF_ERROR_NO_MEM                      (NRF_ERROR_BASE_NUM + 4)  ///< No Memory for operation
-#define NRF_ERROR_NOT_FOUND                   (NRF_ERROR_BASE_NUM + 5)  ///< Not found
-#define NRF_ERROR_NOT_SUPPORTED               (NRF_ERROR_BASE_NUM + 6)  ///< Not supported
-#define NRF_ERROR_INVALID_PARAM               (NRF_ERROR_BASE_NUM + 7)  ///< Invalid Parameter
-#define NRF_ERROR_INVALID_STATE               (NRF_ERROR_BASE_NUM + 8)  ///< Invalid state, operation disallowed in this state
-#define NRF_ERROR_INVALID_LENGTH              (NRF_ERROR_BASE_NUM + 9)  ///< Invalid Length
-#define NRF_ERROR_INVALID_FLAGS               (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags
-#define NRF_ERROR_INVALID_DATA                (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data
-#define NRF_ERROR_DATA_SIZE                   (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit
-#define NRF_ERROR_TIMEOUT                     (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out
-#define NRF_ERROR_NULL                        (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer
-#define NRF_ERROR_FORBIDDEN                   (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation
-#define NRF_ERROR_INVALID_ADDR                (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address
-#define NRF_ERROR_BUSY                        (NRF_ERROR_BASE_NUM + 17) ///< Busy
-
-#endif // NRF_ERROR_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_sdm.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_sdm.h
deleted file mode 100644
index ea5413ff3f..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_sdm.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- /**
-  @addtogroup nrf_sdm_api
-  @{
-  @defgroup nrf_sdm_error SoftDevice Manager Error Codes
-  @{
-     
-  @brief Error definitions for the SDM API
-*/
-
-/* Header guard */
-#ifndef NRF_ERROR_SDM_H__
-#define NRF_ERROR_SDM_H__
-
-#include "nrf_error.h"
-
-#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN              (NRF_ERROR_SDM_BASE_NUM + 0)  ///< Unknown lfclk source
-#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1)  ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts)
-#define NRF_ERROR_SDM_INCORRECT_CLENR0                  (NRF_ERROR_SDM_BASE_NUM + 2)  ///< Incorrect CLENR0 (can be caused by erronous SoftDevice flashing)
-
-#endif // NRF_ERROR_SDM_H__
-
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_soc.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_soc.h
deleted file mode 100644
index 08dc13c3e7..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_error_soc.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- /**
-  @addtogroup nrf_soc_api
-  @{
-  @defgroup nrf_soc_error SoC Library Error Codes
-  @{
-     
-  @brief Error definitions for the SoC library
-
-*/
-
-/* Header guard */
-#ifndef NRF_ERROR_SOC_H__
-#define NRF_ERROR_SOC_H__
-
-#include "nrf_error.h"
-
-/* Mutex Errors */
-#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN                 (NRF_ERROR_SOC_BASE_NUM + 0)  ///< Mutex already taken
-
-/* NVIC errors */
-#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE        (NRF_ERROR_SOC_BASE_NUM + 1)  ///< NVIC interrupt not available
-#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2)  ///< NVIC interrupt priority not allowed
-#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN              (NRF_ERROR_SOC_BASE_NUM + 3)  ///< NVIC should not return
-
-/* Power errors */
-#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN                  (NRF_ERROR_SOC_BASE_NUM + 4)  ///< Power mode unknown
-#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN         (NRF_ERROR_SOC_BASE_NUM + 5)  ///< Power POF threshold unknown
-#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN         (NRF_ERROR_SOC_BASE_NUM + 6)  ///< Power off should not return
-
-/* Rand errors */
-#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES              (NRF_ERROR_SOC_BASE_NUM + 7)  ///< RAND not enough values
-
-/* PPI errors */
-#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL                 (NRF_ERROR_SOC_BASE_NUM + 8)  ///< Invalid PPI Channel
-#define NRF_ERROR_SOC_PPI_INVALID_GROUP                   (NRF_ERROR_SOC_BASE_NUM + 9)  ///< Invalid PPI Group
-
-#endif // NRF_ERROR_SOC_H__
-/**
-  @}
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_mbr.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_mbr.h
deleted file mode 100755
index 4f323aefc2..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_mbr.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @defgroup nrf_mbr_api Master Boot Record API
-  @{
-     
-  @brief APIs for updating SoftDevice and BootLoader
- 
-*/
-
-/* Header guard */
-#ifndef NRF_MBR_H__
-#define NRF_MBR_H__
-
-#include "nrf_svc.h"
-#include <stdint.h>
-
-
-/** @addtogroup NRF_MBR_DEFINES Defines
- * @{ */
-
-/**@brief MBR SVC Base number. */
-#define MBR_SVC_BASE 0x18   
-/** @} */
-
-/** @addtogroup NRF_MBR_ENUMS Enumerations
- * @{ */
-
-/**@brief nRF Master Boot Record API SVC numbers. */
-enum NRF_MBR_SVCS
-{
-  SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */
-};
-
-/**@brief Possible values for ::sd_mbr_command_t.command */
-enum NRF_MBR_COMMANDS
-{
-  SD_MBR_COMMAND_COPY_BL,               /**< Copy a new a new BootLoader. @see sd_mbr_command_copy_bl_t */
-  SD_MBR_COMMAND_COPY_SD,               /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/
-  SD_MBR_COMMAND_INIT_SD,               /**< Init forwarding interrupts to SD, and run reset function in SD*/
-  SD_MBR_COMMAND_COMPARE,               /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/
-  SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Start forwarding all exception to this address @see ::sd_mbr_command_vector_table_base_set_t*/
-};
-
-/** @} */
-
-/** @addtogroup NRF_MBR_TYPES Types
- * @{ */
-
-/**@brief This command copies part of a new SoftDevice
- * The destination area is erased before copying. 
- * If dst is in the middle of a flash page, that whole flash page will be erased.
- * If (dst+len) is in the middle of a flash page, that whole flash page will be erased.
- * 
- * The user of this function is responsible for setting the PROTENSET registers.
- * 
- * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly.
- * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying.
- */
-typedef struct
-{
-  uint32_t *src;  /**< Pointer to the source of data to be copied.*/
-  uint32_t *dst;  /**< Pointer to the destination where the content is to be copied.*/
-  uint32_t len;   /**< Number of 32 bit words to copy. Must be a multiple of 256 words*/
-}sd_mbr_command_copy_sd_t;
-
-
-/**@brief This command works like memcmp, but takes the length in words.
- *
- * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal.
- * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal.
- */
-typedef struct
-{
-  uint32_t *ptr1; /**< Pointer to block of memory */
-  uint32_t *ptr2; /**< Pointer to block of memory */
-  uint32_t len;   /**< Number of 32 bit words to compare*/
-}sd_mbr_command_compare_t;
-
-
-/**@brief This command copies a new BootLoader.
- *  With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR.
- *
- *  Destination is erased by this function.
- *  If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased.
- *
- *  This function will use PROTENSET to protect the flash that is not intended to be written.
- * 
- *  On Success, this function will not return. It will start the new BootLoader from reset-vector as normal.
- *
- * @retval ::NRF_ERROR_INVALID_STATE indicates that something was wrong.
- * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
- * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set
- * @retval ::NRF_ERROR_INVALID_LENGTH is invalid.
- */
-typedef struct
-{
-  uint32_t *bl_src;  /**< Pointer to the source of the Bootloader to be be copied.*/
-  uint32_t bl_len;   /**< Number of 32 bit words to copy for BootLoader */
-}sd_mbr_command_copy_bl_t;
-
-/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR
- * 
- * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset.
- *
- * To restore default forwarding thiss function should be called with @param address set to 0.
- * The MBR will then start forwarding to interrupts to the adress in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set.
- *
- * @retval ::NRF_SUCCESS
- */
-typedef struct
-{ 
-  uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
-}sd_mbr_command_vector_table_base_set_t;
-
-typedef struct
-{
-  uint32_t command;  /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */
-  union 
-  {
-    sd_mbr_command_copy_sd_t copy_sd;  /**< Parameters for copy*/
-    sd_mbr_command_copy_bl_t copy_bl;  /**< Parameters for copy SoftDevice and BootLoader*/
-    sd_mbr_command_compare_t compare;  /**< Parameters for verify*/
-    sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set.*/
-  } params;
-}sd_mbr_command_t;
-
-/** @} */
-
-/** @addtogroup NRF_MBR_FUNCTIONS Functions
- * @{ */
-
-/**@brief Issue Master Boot Record commands
- *
- * Commands used when updating a SoftDevice and bootloader
- *
- * @param[in]  param Pointer to a struct describing the command
- *
- *@note for retvals see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t
-
-*/
-SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param));
-
-/** @} */
-#endif // NRF_MBR_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_sdm.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_sdm.h
deleted file mode 100644
index dc24036b4d..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_sdm.h
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-/**
-  @defgroup nrf_sdm_api SoftDevice Manager API
-  @{
-     
-  @brief APIs for SoftDevice management.
- 
-*/
-
-/* Header guard */
-#ifndef NRF_SDM_H__
-#define NRF_SDM_H__
-
-#include "nrf_svc.h"
-#include "nrf51.h"
-#include "nrf_soc.h"
-#include "nrf_error_sdm.h"
-
-/** @addtogroup NRF_SDM_DEFINES Defines
- * @{ */
-
-/**@brief SoftDevice Manager SVC Base number. */
-#define SDM_SVC_BASE  (0x10)
-
-/** @} */
-
-/** @addtogroup NRF_SDM_ENUMS Enumerations
- * @{ */
-
-/**@brief nRF SoftDevice Manager API SVC numbers. */
-enum NRF_SD_SVCS
-{
-  SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
-  SD_SOFTDEVICE_DISABLE,               /**< ::sd_softdevice_disable */
-  SD_SOFTDEVICE_IS_ENABLED,            /**< ::sd_softdevice_is_enabled */
-  SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
-  SVC_SDM_LAST                         /**< Placeholder for last SDM SVC */
-};
-
-/**@brief Possible lfclk oscillator sources. */
-enum NRF_CLOCK_LFCLKSRCS
-{
-  NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM,                       /**< LFCLK Synthesized from HFCLK.                    */
-  NRF_CLOCK_LFCLKSRC_XTAL_500_PPM,                        /**< LFCLK crystal oscillator 500 PPM accuracy.       */
-  NRF_CLOCK_LFCLKSRC_XTAL_250_PPM,                        /**< LFCLK crystal oscillator 250 PPM accuracy.       */
-  NRF_CLOCK_LFCLKSRC_XTAL_150_PPM,                        /**< LFCLK crystal oscillator 150 PPM accuracy.       */
-  NRF_CLOCK_LFCLKSRC_XTAL_100_PPM,                        /**< LFCLK crystal oscillator 100 PPM accuracy.       */
-  NRF_CLOCK_LFCLKSRC_XTAL_75_PPM,                         /**< LFCLK crystal oscillator 75 PPM accuracy.        */
-  NRF_CLOCK_LFCLKSRC_XTAL_50_PPM,                         /**< LFCLK crystal oscillator 50 PPM accuracy.        */
-  NRF_CLOCK_LFCLKSRC_XTAL_30_PPM,                         /**< LFCLK crystal oscillator 30 PPM accuracy.        */
-  NRF_CLOCK_LFCLKSRC_XTAL_20_PPM,                         /**< LFCLK crystal oscillator 20 PPM accuracy.        */
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION,        /**< LFCLK RC oscillator, 250ms  calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION,        /**< LFCLK RC oscillator, 500ms  calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION,       /**< LFCLK RC oscillator, 1000ms calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION,       /**< LFCLK RC oscillator, 2000ms calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION,       /**< LFCLK RC oscillator, 4000ms calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION,       /**< LFCLK RC oscillator, 8000ms calibration interval.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION,  /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
-  NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
-};
-
-/** @} */
-
-/** @addtogroup NRF_SDM_TYPES Types
- * @{ */
-
-/**@brief Type representing lfclk oscillator source. */
-typedef uint32_t nrf_clock_lfclksrc_t;
-
-
-/**@brief SoftDevice Assertion Handler type.
- *
- * When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
- * The protocol stack will be in an undefined state when this happens and the only way to recover will be to
- * perform a reset, using e.g. CMSIS NVIC_SystemReset().
- *
- * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
- *       
- * @param[in] pc The program counter of the failed assert.
- * @param[in] line_number Line number where the assert failed.
- * @param[in] file_name File name where the assert failed.
- */
-typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
-
-/** @} */
-
-/** @addtogroup NRF_SDM_FUNCTIONS Functions
- * @{ */
-
-/**@brief Enables the SoftDevice and by extension the protocol stack.
- *
- * Idempotent function to enable the SoftDevice.
- *
- * @note Some care must be taken if a low frequency clock source is already running when calling this function:
- *       If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
- *       clock source will be started.
- *
- * @note This function has no effect when returning with an error.
- *
- * @post If return code is ::NRF_SUCCESS 
- *       - SoC library and protocol stack APIs are made available
- *       - A portion of RAM will be unavailable (see relevant SDS documentation)
- *       - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation)
- *       - Interrupts will not arrive from protected peripherals or interrupts
- *       - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
- *       - Interrupt latency may be affected by the SoftDevice  (see relevant SDS documentation)
- *       - Chosen low frequency clock source will be running
- *
- * @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
- * @param assertion_handler Callback for SoftDevice assertions.
- *
- * @retval ::NRF_SUCCESS
- * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level
- * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected
- */
-SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
-
-/**@brief Disables the SoftDevice and by extension the protocol stack.
- * 
- * Idempotent function to disable the SoftDevice.
- *
- * @post SoC library and protocol stack APIs are made unavailable.
- * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
- * @post All peripherals used by the SoftDevice will be reset to default values.
- * @post All of RAM become available.
- * @post All interrupts are forwarded to the application.
- * @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
-
-/**@brief Check if the SoftDevice is enabled.
- *
- * @param[out]  p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
-
-/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
- * 
- * This function is only intended to be called when a bootloader is enabled.
- *
- * @param[in] address The base address of the interrupt vector table for forwarded interrupts.
- 
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); 
-
-/** @} */
-
-#endif // NRF_SDM_H__
-
-/**
-  @}
-*/
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_soc.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_soc.h
deleted file mode 100644
index 9d13de386d..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_soc.h
+++ /dev/null
@@ -1,958 +0,0 @@
-/* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
- 
-/**
- * @defgroup nrf_soc_api SoC Library API
- * @{
- * 
- * @brief APIs for the SoC library.
- * 
-*/
-
-#ifndef NRF_SOC_H__
-#define NRF_SOC_H__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "nrf_svc.h"
-#include "nrf51.h"
-#include "nrf51_bitfields.h"
-#include "nrf_error_soc.h"
-
-/** @addtogroup NRF_SOC_DEFINES Defines
- * @{ */
-
-/**@brief The number of the lowest SVC number reserved for the SoC library. */
-#define SOC_SVC_BASE               (0x20)
-#define SOC_SVC_BASE_NOT_AVAILABLE (0x23)
-
-/**@brief Guranteed time for application to process radio inactive notification. */
-#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US  (62)
-
-/**@brief The minimum allowed timeslot extension time. */
-#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200)
-
-#define SOC_ECB_KEY_LENGTH            (16)                       /**< ECB key length. */
-#define SOC_ECB_CLEARTEXT_LENGTH      (16)                       /**< ECB cleartext length. */
-#define SOC_ECB_CIPHERTEXT_LENGTH     (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */
-
-#define SD_EVT_IRQn                   (SWI2_IRQn)        /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */
-#define SD_EVT_IRQHandler             (SWI2_IRQHandler)  /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. */
-#define RADIO_NOTIFICATION_IRQn       (SWI1_IRQn)        /**< The radio notification IRQ number. */
-#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler)  /**< The radio notification IRQ handler. */
-
-#define NRF_RADIO_LENGTH_MIN_US       (100)               /**< The shortest allowed radio timeslot, in microseconds. */
-#define NRF_RADIO_LENGTH_MAX_US       (100000)            /**< The longest allowed radio timeslot, in microseconds. */
-
-#define NRF_RADIO_DISTANCE_MAX_US         (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */
-
-#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */
-
-#define NRF_RADIO_START_JITTER_US     (2)                 /**< The maximum jitter in NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */
-
-/** @} */
-
-/** @addtogroup NRF_SOC_TYPES Types
- * @{ */
-
-/**@brief The SVC numbers used by the SVC functions in the SoC library. */
-enum NRF_SOC_SVCS
-{
-  SD_FLASH_PAGE_ERASE = SOC_SVC_BASE,
-  SD_FLASH_WRITE,
-  SD_FLASH_PROTECT,
-  SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE,
-  SD_MUTEX_ACQUIRE,
-  SD_MUTEX_RELEASE,
-  SD_NVIC_ENABLEIRQ,
-  SD_NVIC_DISABLEIRQ,
-  SD_NVIC_GETPENDINGIRQ,
-  SD_NVIC_SETPENDINGIRQ,
-  SD_NVIC_CLEARPENDINGIRQ,
-  SD_NVIC_SETPRIORITY,
-  SD_NVIC_GETPRIORITY,
-  SD_NVIC_SYSTEMRESET,
-  SD_NVIC_CRITICAL_REGION_ENTER,
-  SD_NVIC_CRITICAL_REGION_EXIT,
-  SD_RAND_APPLICATION_POOL_CAPACITY,
-  SD_RAND_APPLICATION_BYTES_AVAILABLE,
-  SD_RAND_APPLICATION_GET_VECTOR,
-  SD_POWER_MODE_SET,
-  SD_POWER_SYSTEM_OFF,
-  SD_POWER_RESET_REASON_GET,
-  SD_POWER_RESET_REASON_CLR,
-  SD_POWER_POF_ENABLE,
-  SD_POWER_POF_THRESHOLD_SET,
-  SD_POWER_RAMON_SET,
-  SD_POWER_RAMON_CLR,
-  SD_POWER_RAMON_GET,
-  SD_POWER_GPREGRET_SET,
-  SD_POWER_GPREGRET_CLR,
-  SD_POWER_GPREGRET_GET,
-  SD_POWER_DCDC_MODE_SET,
-  SD_APP_EVT_WAIT,
-  SD_CLOCK_HFCLK_REQUEST,
-  SD_CLOCK_HFCLK_RELEASE,
-  SD_CLOCK_HFCLK_IS_RUNNING,
-  SD_PPI_CHANNEL_ENABLE_GET,
-  SD_PPI_CHANNEL_ENABLE_SET,
-  SD_PPI_CHANNEL_ENABLE_CLR,
-  SD_PPI_CHANNEL_ASSIGN,
-  SD_PPI_GROUP_TASK_ENABLE,
-  SD_PPI_GROUP_TASK_DISABLE,
-  SD_PPI_GROUP_ASSIGN,
-  SD_PPI_GROUP_GET,
-  SD_RADIO_NOTIFICATION_CFG_SET,
-  SD_ECB_BLOCK_ENCRYPT,
-  SD_RADIO_SESSION_OPEN,
-  SD_RADIO_SESSION_CLOSE,
-  SD_RADIO_REQUEST,
-  SD_EVT_GET,
-  SD_TEMP_GET,
-  SVC_SOC_LAST
-};
-
-/**@brief Possible values of a ::nrf_mutex_t. */
-enum NRF_MUTEX_VALUES
-{
-  NRF_MUTEX_FREE,
-  NRF_MUTEX_TAKEN
-};
-
-/**@brief Possible values of ::nrf_app_irq_priority_t. */
-enum NRF_APP_PRIORITIES
-{
-  NRF_APP_PRIORITY_HIGH = 1,
-  NRF_APP_PRIORITY_LOW = 3
-};
-
-/**@brief Possible values of ::nrf_power_mode_t. */
-enum NRF_POWER_MODES
-{
-  NRF_POWER_MODE_CONSTLAT,  /**< Constant latency mode. See power management in the reference manual. */
-  NRF_POWER_MODE_LOWPWR     /**< Low power mode. See power management in the reference manual. */
-};
-
-
-/**@brief Possible values of ::nrf_power_failure_threshold_t */
-enum NRF_POWER_THRESHOLDS
-{
-  NRF_POWER_THRESHOLD_V21,  /**< 2.1 Volts power failure threshold. */
-  NRF_POWER_THRESHOLD_V23,  /**< 2.3 Volts power failure threshold. */
-  NRF_POWER_THRESHOLD_V25,  /**< 2.5 Volts power failure threshold. */ 
-  NRF_POWER_THRESHOLD_V27   /**< 2.7 Volts power failure threshold. */
-};
-
-
-/**@brief Possible values of ::nrf_power_dcdc_mode_t. */
-enum NRF_POWER_DCDC_MODES
-{
-  NRF_POWER_DCDC_MODE_OFF,          /**< The DCDC is always off. */
-  NRF_POWER_DCDC_MODE_ON,           /**< The DCDC is always on. */
-  NRF_POWER_DCDC_MODE_AUTOMATIC     /**< The DCDC is automatically managed. */
-};
-
-/**@brief Possible values of ::nrf_radio_notification_distance_t. */
-enum NRF_RADIO_NOTIFICATION_DISTANCES
-{
-  NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_800US,    /**< The distance from the active notification to start of radio activity. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_1740US,   /**< The distance from the active notification to start of radio activity. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_2680US,   /**< The distance from the active notification to start of radio activity. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_3620US,   /**< The distance from the active notification to start of radio activity. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_4560US,   /**< The distance from the active notification to start of radio activity. */
-  NRF_RADIO_NOTIFICATION_DISTANCE_5500US    /**< The distance from the active notification to start of radio activity. */
-};
-
-
-/**@brief Possible values of ::nrf_radio_notification_type_t. */
-enum NRF_RADIO_NOTIFICATION_TYPES
-{
-  NRF_RADIO_NOTIFICATION_TYPE_NONE = 0,        /**< The event does not have a radio notification signal. */
-  NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE,   /**< Using interrupt for notification when the radio will be enabled. */
-  NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */
-  NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH,     /**< Using interrupt for notification both when the radio will be enabled and disabled. */
-};
-
-/**@brief SoC Events. */
-enum NRF_SOC_EVTS
-{
-  NRF_EVT_HFCLKSTARTED,                         /**< Event indicating that the HFCLK has started. */
-  NRF_EVT_POWER_FAILURE_WARNING,                /**< Event indicating that a power failure warning has occurred. */
-  NRF_EVT_FLASH_OPERATION_SUCCESS,              /**< Event indicating that the ongoing flash operation has completed successfully. */
-  NRF_EVT_FLASH_OPERATION_ERROR,                /**< Event indicating that the ongoing flash operation has timed out with an error. */
-  NRF_EVT_RADIO_BLOCKED,                        /**< Event indicating that a radio timeslot was blocked. */
-  NRF_EVT_RADIO_CANCELED,                       /**< Event indicating that a radio timeslot was canceled by SoftDevice. */
-  NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio signal callback handler return was invalid. */
-  NRF_EVT_RADIO_SESSION_IDLE,                   /**< Event indicating that a radio session is idle. */
-  NRF_EVT_RADIO_SESSION_CLOSED,                 /**< Event indicating that a radio session is closed. */
-  NRF_EVT_NUMBER_OF_EVTS
-};
-
-/** @} */
-
-/** @addtogroup NRF_SOC_TYPES Types
- * @{ */
-
-/**@brief Represents a mutex for use with the nrf_mutex functions.
- * @note Accessing the value directly is not safe, use the mutex functions!
- */
-typedef volatile uint8_t nrf_mutex_t;
-
-/**@brief The interrupt priorities available to the application while the softdevice is active. */
-typedef uint8_t nrf_app_irq_priority_t;
-
-/**@brief Represents a power mode, used in power mode functions */
-typedef uint8_t nrf_power_mode_t;
-
-/**@brief Represents a power failure threshold value. */
-typedef uint8_t nrf_power_failure_threshold_t;
-
-/**@brief Represents a DCDC mode value. */
-typedef uint32_t nrf_power_dcdc_mode_t;
-
-/**@brief Radio notification distances. */
-typedef uint8_t nrf_radio_notification_distance_t;
-
-/**@brief Radio notification types. */
-typedef uint8_t nrf_radio_notification_type_t;
-
-/** @brief The Radio signal callback types. */
-enum NRF_RADIO_CALLBACK_SIGNAL_TYPE
-{
-  NRF_RADIO_CALLBACK_SIGNAL_TYPE_START,            /**< This signal indicates the start of the radio timeslot. */
-  NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0,            /**< This signal indicates the NRF_TIMER0 interrupt. */
-  NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO,             /**< This signal indicates the NRF_RADIO interrupt. */
-  NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED,     /**< This signal indicates extend action failed. */
-  NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED   /**< This signal indicates extend action succeeded. */
-};
-
-/** @brief The actions requested by the signal callback.
- *
- *  This code gives the SOC instructions about what action to take when the signal callback has
- *  returned.
- */
-enum NRF_RADIO_SIGNAL_CALLBACK_ACTION
-{
-  NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE,            /**< Return without action. */
-  NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND,          /**< Request an extension of the current timeslot (maximum execution time for this action is when the extension succeeded). */
-  NRF_RADIO_SIGNAL_CALLBACK_ACTION_END,             /**< End the current radio timeslot. */
-  NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END  /**< Request a new radio timeslot and end the current timeslot. */
-};
-
-/**@brief Radio timeslot high frequency clock source configuration. */
-enum NRF_RADIO_HFCLK_CFG
-{
-  NRF_RADIO_HFCLK_CFG_DEFAULT,                      /**< Use the currently selected oscillator as HF clock source during the timeslot (i.e. the source is not specified). */
-  NRF_RADIO_HFCLK_CFG_FORCE_XTAL,                   /**< Force external crystal to be used as HF clock source during whole the timeslot. */
-};
-
-/** @brief Radio timeslot priorities. */
-enum NRF_RADIO_PRIORITY
-{
-  NRF_RADIO_PRIORITY_HIGH,                          /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */
-  NRF_RADIO_PRIORITY_NORMAL,                        /**< Normal (equal priority as the priority of secondary activites of the SoftDevice stack(s)). */
-};
-
-/** @brief Radio timeslot request type. */
-enum NRF_RADIO_REQUEST_TYPE
-{
-  NRF_RADIO_REQ_TYPE_EARLIEST,                      /**< Request timeslot as early as possible. This should always be used for the first request in a session. */
-  NRF_RADIO_REQ_TYPE_NORMAL                         /**< Normal timeslot request. */
-};
-
-/** @brief Parameters for a request for a timeslot as early as possible. */
-typedef struct
-{
-  uint8_t       hfclk;                              /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */
-  uint8_t       priority;                           /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */
-  uint32_t      length_us;                          /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */
-  uint32_t      timeout_us;                         /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */
-} nrf_radio_request_earliest_t;
-
-/** @brief Parameters for a normal radio request. */
-typedef struct
-{
-  uint8_t       hfclk;                              /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */
-  uint8_t       priority;                           /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */
-  uint32_t      distance_us;                        /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */
-  uint32_t      length_us;                          /**< The radio timeslot length (in the range [100..100,000] microseconds). */
-} nrf_radio_request_normal_t;
-
-/** @brief Radio request parameters. */
-typedef struct
-{
-  uint8_t                         request_type;     /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */
-  union
-  {
-    nrf_radio_request_earliest_t  earliest;         /**< Parameters for a request for a timeslot as early as possible. */
-    nrf_radio_request_normal_t    normal;           /**< Parameters for a normal radio request. */
-  } params;
-} nrf_radio_request_t;
-
-/**@brief Return parameters of the radio timeslot signal callback. */
-typedef struct
-{
-  uint8_t               callback_action;            /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */
-  union
-  {
-    struct
-    {
-      nrf_radio_request_t * p_next;                 /**< The request parameters for the next radio timeslot. */
-    } request;                                      /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */
-    struct
-    {
-      uint32_t              length_us;              /**< Requested extension of the timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */
-    } extend;                                       /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */
-  } params;
-} nrf_radio_signal_callback_return_param_t;
-
-/**@brief The radio signal callback type.
- *
- * @note In case of invalid return parameters, the radio timeslot will automatically end
- *       immediately after returning from the signal callback and the
- *       @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent.
- * @note The returned struct pointer must remain valid after the signal callback
- *       function returns. For instance, this means that it must not point to a stack variable.
- *
- * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE.
- *
- * @return Pointer to structure containing action requested by the application.
- */
-typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type);
-
-/**@brief AES ECB data structure */
-typedef struct
-{
-  uint8_t key[SOC_ECB_KEY_LENGTH];                  /**< Encryption key. */
-  uint8_t cleartext[SOC_ECB_CLEARTEXT_LENGTH];      /**< Clear Text data. */
-  uint8_t ciphertext[SOC_ECB_CIPHERTEXT_LENGTH];    /**< Cipher Text data. */
-} nrf_ecb_hal_data_t;
-
-/** @} */
-
-/** @addtogroup NRF_SOC_FUNCTIONS Functions
- * @{ */
-
-/**@brief Initialize a mutex.
- *
- * @param[in] p_mutex Pointer to the mutex to initialize.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex));
-
-/**@brief Attempt to acquire a mutex.
- *
- * @param[in] p_mutex Pointer to the mutex to acquire.
- *
- * @retval ::NRF_SUCCESS The mutex was successfully acquired.
- * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired.
- */
-SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex));
-
-/**@brief Release a mutex.
- *
- * @param[in] p_mutex Pointer to the mutex to release.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex));
-
-/**@brief Enable External Interrupt.
- * @note Corresponds to NVIC_EnableIRQ in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS.
- *
- * @retval ::NRF_SUCCESS The interrupt was enabled.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application.
- */
-SVCALL(SD_NVIC_ENABLEIRQ, uint32_t, sd_nvic_EnableIRQ(IRQn_Type IRQn));
-
-/**@brief  Disable External Interrupt.
- * @note Corresponds to NVIC_DisableIRQ in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS
- *
- * @retval ::NRF_SUCCESS The interrupt was disabled.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
- */
-SVCALL(SD_NVIC_DISABLEIRQ, uint32_t, sd_nvic_DisableIRQ(IRQn_Type IRQn));
-
-/**@brief  Get Pending Interrupt.
- * @note Corresponds to NVIC_GetPendingIRQ in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in]   IRQn          See the NVIC_GetPendingIRQ documentation in CMSIS.
- * @param[out]  p_pending_irq Return value from NVIC_GetPendingIRQ.
- *
- * @retval ::NRF_SUCCESS The interrupt is available for the application.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
- */
-SVCALL(SD_NVIC_GETPENDINGIRQ, uint32_t, sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq));
-
-/**@brief  Set Pending Interrupt.
- * @note Corresponds to NVIC_SetPendingIRQ in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS.
- *
- * @retval ::NRF_SUCCESS The interrupt is set pending.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
- */
-SVCALL(SD_NVIC_SETPENDINGIRQ, uint32_t, sd_nvic_SetPendingIRQ(IRQn_Type IRQn));
-
-/**@brief  Clear Pending Interrupt.
- * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS.
- *
- * @retval ::NRF_SUCCESS The interrupt pending flag is cleared.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
- */
-SVCALL(SD_NVIC_CLEARPENDINGIRQ, uint32_t, sd_nvic_ClearPendingIRQ(IRQn_Type IRQn));
-
-/**@brief Set Interrupt Priority.
- * @note Corresponds to NVIC_SetPriority in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- * @pre{priority is valid and not reserved by the stack}
- *
- * @param[in] IRQn      See the NVIC_SetPriority documentation in CMSIS.
- * @param[in] priority  A valid IRQ priority for use by the application.
- *
- * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application.
- */
-SVCALL(SD_NVIC_SETPRIORITY, uint32_t, sd_nvic_SetPriority(IRQn_Type IRQn, nrf_app_irq_priority_t priority));
-
-/**@brief Get Interrupt Priority.
- * @note Corresponds to NVIC_GetPriority in CMSIS.
- *
- * @pre{IRQn is valid and not reserved by the stack}
- *
- * @param[in]  IRQn         See the NVIC_GetPriority documentation in CMSIS.
- * @param[out] p_priority   Return value from NVIC_GetPriority.
- *
- * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority.
- * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application.
- */
-SVCALL(SD_NVIC_GETPRIORITY, uint32_t, sd_nvic_GetPriority(IRQn_Type IRQn, nrf_app_irq_priority_t * p_priority));
-
-/**@brief System Reset.
- * @note Corresponds to NVIC_SystemReset in CMSIS.
- *
- * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN
- */
-SVCALL(SD_NVIC_SYSTEMRESET, uint32_t, sd_nvic_SystemReset(void));
-
-/**@brief Enters critical region.
- *
- * @post Application interrupts will be disabled.
- * @sa sd_nvic_critical_region_exit
- *
- * @param[out]  p_is_nested_critical_region  1: If in a nested critical region.
- *                                           0: Otherwise.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_NVIC_CRITICAL_REGION_ENTER, uint32_t, sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region));
-
-/**@brief Exit critical region.
- *
- * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter.
- * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. 
- *
- * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_NVIC_CRITICAL_REGION_EXIT, uint32_t, sd_nvic_critical_region_exit(uint8_t is_nested_critical_region));
-
-/**@brief Query the capacity of the application random pool.
- *
- * @param[out] p_pool_capacity The capacity of the pool.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity));
-
-/**@brief Get number of random bytes available to the application.
- *
- * @param[out] p_bytes_available The number of bytes currently available in the pool.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available));
-
-/**@brief Get random bytes from the application pool.
- *
- * @param[out]  p_buff  Pointer to unit8_t buffer for storing the bytes.
- * @param[in]   length  Number of bytes to take from pool and place in p_buff.
- *
- * @retval ::NRF_SUCCESS The requested bytes were written to p_buff.
- * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available.
-*/
-SVCALL(SD_RAND_APPLICATION_GET_VECTOR, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length));
-
-/**@brief Gets the reset reason register. 
- *
- * @param[out]  p_reset_reason  Contents of the NRF_POWER->RESETREAS register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason));
-
-/**@brief Clears the bits of the reset reason register. 
- *
- * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk));
-
-/**@brief Sets the power mode when in CPU sleep.
- *
- * @param[in] power_mode The power mode to use when in CPU sleep. @sa sd_app_evt_wait
- *
- * @retval ::NRF_SUCCESS The power mode was set.
- * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown.
- */
-SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(nrf_power_mode_t power_mode));
-
-/**@brief Puts the chip in System OFF mode. 
- *
- * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN
- */
-SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void));
-
-/**@brief Enables or disables the power-fail comparator.
- *
- * Enabling this will give a softdevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs.
- * The event can be retrieved with sd_evt_get();
- *
- * @param[in] pof_enable    True if the power-fail comparator should be enabled, false if it should be disabled.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable));
-
-/**@brief Sets the power-fail threshold value.
- *
- * @param[in] threshold The power-fail threshold value to use.
- *
- * @retval ::NRF_SUCCESS The power failure threshold was set.
- * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown.
- */
-SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(nrf_power_failure_threshold_t threshold));
-
-/**@brief Sets bits in the NRF_POWER->RAMON register.
- *
- * @param[in] ramon Contains the bits needed to be set in the NRF_POWER->RAMON register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_RAMON_SET, uint32_t, sd_power_ramon_set(uint32_t ramon));
-
-/** @brief Clears bits in the NRF_POWER->RAMON register.
- *
- * @param ramon Contains the bits needed to be cleared in the NRF_POWER->RAMON register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_RAMON_CLR, uint32_t, sd_power_ramon_clr(uint32_t ramon));
-
-/**@brief Get contents of NRF_POWER->RAMON register, indicates power status of ram blocks.
- *
- * @param[out] p_ramon Content of NRF_POWER->RAMON register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_RAMON_GET, uint32_t, sd_power_ramon_get(uint32_t * p_ramon));
-
-/**@brief Set bits in the NRF_POWER->GPREGRET register.
- *
- * @param[in] gpregret_msk Bits to be set in the GPREGRET register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_msk));
-
-/**@brief Clear bits in the NRF_POWER->GPREGRET register.
- *
- * @param[in] gpregret_msk Bits to be clear in the GPREGRET register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_msk));
-
-/**@brief Get contents of the NRF_POWER->GPREGRET register.
- *
- * @param[out] p_gpregret Contents of the GPREGRET register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t *p_gpregret));
-
-/**@brief Sets the DCDC mode.
- *
- * Depending on the internal state of the SoftDevice, the mode change may not happen immediately.
- * The DCDC mode switch will be blocked when occurring in close proximity to radio transmissions. When
- * the radio transmission is done, the last mode will be used.
- *
- * @param[in] dcdc_mode The mode of the DCDC.
- *
- * @retval ::NRF_SUCCESS
- * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid.
- */
-SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(nrf_power_dcdc_mode_t dcdc_mode));
-
-/**@brief Request the high frequency crystal oscillator.
- *
- * Will start the high frequency crystal oscillator, the startup time of the crystal varies
- * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started.
- *
- * @see sd_clock_hfclk_is_running
- * @see sd_clock_hfclk_release
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void));
-
-/**@brief Releases the high frequency crystal oscillator.
- *
- * Will stop the high frequency crystal oscillator, this happens immediately.
- *
- * @see sd_clock_hfclk_is_running
- * @see sd_clock_hfclk_request
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void));
-
-/**@brief Checks if the high frequency crystal oscillator is running.
- *
- * @see sd_clock_hfclk_request
- * @see sd_clock_hfclk_release
- *
- * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running));
-
-/**@brief Waits for an application event.
- * 
- * An application event is either an application interrupt or a pended interrupt when the
- * interrupt is disabled. When the interrupt is enabled it will be taken immediately since
- * this function will wait in thread mode, then the execution will return in the application's
- * main thread. When an interrupt is disabled and gets pended it will return to the application's 
- * thread main. The application must ensure that the pended flag is cleared using 
- * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for
- * disabled interrupts, as the interrupt handler will clear the pending flag automatically for
- * enabled interrupts.
- *
- * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0
- * System Control Register (SCR). @sa CMSIS_SCB
- *
- * @note If an application interrupt has happened since the last time sd_app_evt_wait was
- *       called this function will return immediately and not go to sleep. This is to avoid race
- *       conditions that can occur when a flag is updated in the interrupt handler and processed
- *       in the main loop.
- *
- * @post An application interrupt has happened or a interrupt pending flag is set.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void));
-
-/**@brief Get PPI channel enable register contents.
- *
- * @param[out] p_channel_enable The contents of the PPI CHEN register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable));
-
-/**@brief Set PPI channel enable register.
- *
- * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk));
-
-/**@brief Clear PPI channel enable register.
- *
- * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register.
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk));
-
-/**@brief Assign endpoints to a PPI channel.
- *
- * @param[in] channel_num Number of the PPI channel to assign.
- * @param[in] evt_endpoint Event endpoint of the PPI channel.
- * @param[in] task_endpoint Task endpoint of the PPI channel.
- *
- * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid.
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint));
-
-/**@brief Task to enable a channel group.
- *
- * @param[in] group_num Number of the channel group.
- *
- * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num));
-
-/**@brief Task to disable a channel group.
- *
- * @param[in] group_num Number of the PPI group.
- *
- * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num));
-
-/**@brief Assign PPI channels to a channel group.
- *
- * @param[in] group_num Number of the channel group.
- * @param[in] channel_msk Mask of the channels to assign to the group.
- *
- * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk));
-
-/**@brief Gets the PPI channels of a channel group.
- *
- * @param[in]   group_num Number of the channel group.
- * @param[out]  p_channel_msk Mask of the channels assigned to the group.
- *
- * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk));
-
-/**@brief Configures the Radio Notification signal.
- *
- * @note
- *      - The notification signal latency depends on the interrupt priority settings of SWI used
- *        for notification signal.
- *      - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice
- *        will interrupt the application to do Radio Event preparation.
- *      - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have
- *        to shorten the connection events to have time for the Radio Notification signals.
- *
- * @param[in]  type      Type of notification signal.
- *                       @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio
- *                       notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is
- *                       recommended (but not required) to be used with
- *                       @ref NRF_RADIO_NOTIFICATION_TYPE_NONE.
- *
- * @param[in]  distance  Distance between the notification signal and start of radio activity.
- *                       This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or 
- *                       @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used.
- *
- * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid.
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(nrf_radio_notification_type_t type, nrf_radio_notification_distance_t distance));
-
-/**@brief Encrypts a block according to the specified parameters.
- *
- * 128-bit AES encryption.
- *
- * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input
- *                            parameters and one output parameter).
- *
- * @retval ::NRF_SUCCESS
- */
-SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data));
-
-/**@brief Gets any pending events generated by the SoC API.
- *
- * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned.
- *
- * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending.
- *
- * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter.
- * @retval ::NRF_ERROR_NOT_FOUND No pending events. 
- */
-SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id));
-
-/**@brief Get the temperature measured on the chip
- * 
- * This function will block until the temperature measurement is done.
- * It takes around 50us from call to return.
- *
- * @note Pan #28 in PAN-028 v 1.6 "Negative measured values are not represented correctly" is corrected by this function.
- *
- * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees celsius.
- *
- * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp
- */
-SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp));
-
-/**@brief Flash Write
- *
- * Commands to write a buffer to flash
- *
- * This call initiates the flash access command, and its completion will be communicated to the
- * application with exactly one of the following events:
- *      - NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed.
- *      - NRF_EVT_FLASH_OPERATION_ERROR   - The command could not be started.
- *
- * @note
- *      - This call takes control over the radio and the CPU during flash erase and write to make sure that
- *        they will not interfere with the flash access. This means that all interrupts will be blocked
- *        for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual
- *        and the command parameters).
- *
- *
- * @param[in]  p_dst Pointer to start of flash location to be written.
- * @param[in]  p_src Pointer to buffer with data to be written
- * @param[in]  size  Number of 32-bit words to write. Maximum size is 256 32bit words.
- *
- * @retval ::NRF_ERROR_INVALID_ADDR   Tried to write to a non existing flash address, or p_dst or p_src was unaligned.
- * @retval ::NRF_ERROR_BUSY           The previous command has not yet completed.
- * @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or more than 256 words.
- * @retval ::NRF_ERROR_FORBIDDEN      Tried to write to or read from protected location.
- * @retval ::NRF_SUCCESS              The command was accepted.
- */
-SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * const p_dst, uint32_t const * const p_src, uint32_t size));
-
-
-/**@brief Flash Erase page
- *
- * Commands to erase a flash page
- *
- * This call initiates the flash access command, and its completion will be communicated to the
- * application with exactly one of the following events:
- *      - NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed.
- *      - NRF_EVT_FLASH_OPERATION_ERROR   - The command could not be started.
- *
- * @note
- *      - This call takes control over the radio and the CPU during flash erase and write to make sure that
- *        they will not interfere with the flash access. This means that all interrupts will be blocked
- *        for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual
- *        and the command parameters).
- *
- *
- * @param[in]  page_number Pagenumber of the page to erase
- * @retval ::NRF_ERROR_INTERNAL      If a new session could not be opened due to an internal error.
- * @retval ::NRF_ERROR_INVALID_ADDR  Tried to erase to a non existing flash page.
- * @retval ::NRF_ERROR_BUSY          The previous command has not yet completed.
- * @retval ::NRF_ERROR_FORBIDDEN     Tried to erase a protected page.
- * @retval ::NRF_SUCCESS             The command was accepted.
- */
-SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number));
-
-
-/**@brief Flash Protection set
- *
- * Commands to set the flash protection registers PROTENSETx
- *
- * @note To read the values in PROTENSETx you can read them directly. They are only write-protected.
- *
- * @param[in]  protenset0 Value to be written to PROTENSET0
- * @param[in]  protenset1 Value to be written to PROTENSET1
- *
- * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice
- * @retval ::NRF_SUCCESS Values successfully written to PROTENSETx
- */
-SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t protenset0, uint32_t protenset1));
-
-/**@brief Opens a session for radio requests.
- *
- * @note Only one session can be open at a time.
- * @note p_radio_signal_callback(NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot
- *       starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed
- *       by the application.
- * @note p_radio_signal_callback(NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0
- *       interrupt occurs.
- * @note p_radio_signal_callback(NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO
- *       interrupt occurs.
- * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This
- *       implies that none of the sd_* API calls can be used from p_radio_signal_callback().
- *
- * @param[in] p_radio_signal_callback The signal callback.
- *
- * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer.
- * @retval ::NRF_ERROR_BUSY If session cannot be opened.
- * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error.
- * @retval ::NRF_SUCCESS Otherwise.
- */
- SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback));
-
-/**@brief Closes a session for radio requests.
- *
- * @note Any current radio timeslot will be finished before the session is closed.
- * @note If a radio timeslot is scheduled when the session is closed, it will be canceled.
- * @note The application cannot consider the session closed until the NRF_EVT_RADIO_SESSION_CLOSED
- *       event is received.
- *
- * @retval ::NRF_ERROR_FORBIDDEN If session not opened.
- * @retval ::NRF_ERROR_BUSY If session is currently being closed.
- * @retval ::NRF_SUCCESS Otherwise.
- */
- SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void));
-
- /**@brief Requests a radio timeslot.
- *
- * @note The timing of the radio timeslot is specified by p_request->distance_us. For the first
- *       request in a session, p_request->distance_us is required to be 0 by convention, and
- *       the timeslot is scheduled at the first possible opportunity. All following radio timeslots are
- *       requested with a distance of p_request->distance_us measured from the start of the
- *       previous radio timeslot.
- * @note A too small p_request->distance_us will lead to a NRF_EVT_RADIO_BLOCKED event.
- * @note Timeslots scheduled too close will lead to a NRF_EVT_RADIO_BLOCKED event.
- * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths.
- * @note If an opportunity for the first radio timeslot is not found before 100ms after the call to this
- *       function, it is not scheduled, and instead a NRF_EVT_RADIO_BLOCKED event is sent.
- *       The application may then try to schedule the first radio timeslot again.
- * @note Successful requests will result in nrf_radio_signal_callback_t(NRF_RADIO_CALLBACK_SIGNAL_TYPE_START).
- *       Unsuccessful requests will result in a NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS.
- * @note The jitter in the start time of the radio timeslots is +/- NRF_RADIO_START_JITTER_US us.
- * @note The nrf_radio_signal_callback_t(NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the
- *       specified radio timeslot start, but this does not affect the actual start time of the timeslot.
- * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency
- *       (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is 
- *       guaranteed to be clocked from the external crystal.
- * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral
- *       during the radio timeslot.
- *
- * @param[in] p_request Pointer to the request parameters.
- *
- * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE.
- * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid.
- * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid.
- * @retval ::NRF_SUCCESS Otherwise.
- */
- SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t * p_request ));
-
-/** @} */
-
-#endif // NRF_SOC_H__
-
-/**@} */
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_svc.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_svc.h
deleted file mode 100644
index 5604b957a4..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/nrf_svc.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef NRF_SVC__
-#define NRF_SVC__
-
-#ifdef SVCALL_AS_NORMAL_FUNCTION
-#define SVCALL(number, return_type, signature) return_type signature
-#else
-
-#ifndef SVCALL
-#if defined (__CC_ARM)
-#define SVCALL(number, return_type, signature) return_type __svc(number) signature
-#elif defined (__GNUC__)
-#define SVCALL(number, return_type, signature) \
-  _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \
-  _Pragma("GCC diagnostic ignored \"-Wunused-function\"") \
-  __attribute__((naked)) static return_type signature \
-  { \
-    __asm( \
-        "svc %0\n" \
-        "bx r14" : : "I" ((uint32_t)number) : "r0" \
-    ); \
-  }
-#elif defined (__ICCARM__)
-#define PRAGMA(x) _Pragma(#x)
-#define SVCALL(number, return_type, signature) \
-PRAGMA(swi_number = number) \
- __swi return_type signature;
-#else
-#define SVCALL(number, return_type, signature) return_type signature  
-#endif
-#endif  // SVCALL
-
-#endif  // SVCALL_AS_NORMAL_FUNCTION
-#endif  // NRF_SVC__
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/softdevice_assert.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/softdevice_assert.h
deleted file mode 100644
index 42494477bf..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_API/include/softdevice_assert.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
- * copying, transfer or disclosure of such information is prohibited except by express written
- * agreement with Nordic Semiconductor.
- *
- */
-
-/** @brief Utilities for verifying program logic
- */
-
-#ifndef SOFTDEVICE_ASSERT_H_
-#define SOFTDEVICE_ASSERT_H_
-
-#include <stdint.h>
-
-/** @brief This function handles assertions.
- *
- *
- * @note
- * This function is called when an assertion has triggered.
- * 
- *
- * @param line_num The line number where the assertion is called
- * @param file_name Pointer to the file name
- */
-void assert_softdevice_callback(uint16_t line_num, const uint8_t *file_name);
-
-
-/*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */ 
-/*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \
-/** @brief Check intended for production code
- *
- * Check passes if "expr" evaluates to true. */
-#define ASSERT(expr) \
-if (expr)                                                                     \
-{                                                                             \
-}                                                                             \
-else                                                                          \
-{                                                                             \
-  assert_softdevice_callback((uint16_t)__LINE__, (uint8_t *)__FILE__);        \
-  /*lint -unreachable */                                                      \
-}
-
-#endif /* SOFTDEVICE_ASSERT_H_ */
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_licence_agreement.pdf b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_licence_agreement.pdf
deleted file mode 100644
index 7aab95c8e7ae8c764467d3d81fa9069d2ff9c2ef..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 5553
zcmc(jXIPZUvVau{imnJEC~=4mpiE+jLk<Fxa}aSDzJbAkkzoMIqJSg`B0-Xpl_*Iv
zB0+LaB1y6e2m+G9JLvA&-Lv<cKljJ&KiyqlRdsb$e^0+p^XVw5T!jgX(DF^sbobMW
zfS@3Pl^qC$f@lB^HY8gR91fL$sNnD<fCy2+qe*}gfFW1|GBQpiB7nB1y_*<qGWs|{
zmBDM+*kB{-vciMo<F3gOeq*_OJ;#XQRyA}dqj~X^EW+bMo{wamwT-xtUQgv&!))~_
z;Mz$YDAU$wd4-dDBe&8KKBMr1p_M#Y^Xya?YU#~^zL7VM>*m+>M^e8(`;m<w{c?8X
z`6$qAR4{qLxUl@o*$dJ6j#VxKE1YI@d6X`nEMH%K$Z5mUuc98lQx(JSJ!}#?bfPA$
zuGk0fwJM@{@CjGhHVvLt>oR@SEiSv3zTNagMaQ2j>9;4npZvMD4Uri_x$ncIO8Gkw
z%tMWZSvf%~<sGYM<|Pn5cHV{j{0TGR%TGJDXXEGVOAb`_4$#+nkyE#B`XYosz8CH^
zas1e!Rcy})59dsSYQ6?cK2ld4?oMe<RPF7aPO~opjlc^B9dE30YlfUy@3Vl-g}>?|
z-jJcXWRnHj=U8&nVoF|V2<{6lpH$SLnszpOe0<-v`K#czwI6$X^(`*8<u-Ad(>hID
zoqa@~I{3`-ytKrcad?LX^Q!@-6>4;gHkFVb6P}K3)sb()$D7a~&qSb}Toh3B^-7T8
zb7aA%Sx;hhA2Z9d&BX6}QC0!M%nLSMt3vM~E#^-G%Ln45fzOzdIdhfm<kaaqCnA%4
z`(jfprG&5={PTS_hc$CGojjs9AF!Ml(7Lly4ER){wAEC#VUs%vuA@s+6C_Q?vP(~7
z3?zAux0&w7U=VRPF6zJEvodkQpqP`7ZHo~PzBgQqJJuDqErgM=ERMeRao?lZh}j-H
z!Z6l&3|?p+v@@~VR4lZ=)DhpCGEiD8x7Bw-QO&(}uE4WDCl0oBYJ_o~@ACapp)|y>
zsp_%o&GjD&InTI$89ygxXsB}Hczt|Orv^J#>d=Yp9Y3p-kcWC>gvTU_Ik}PItex*$
z&AqkF0k>BRVKBZT6z2`^MDdWhv5ig@rJ6{W-pVf)ihf;BO9fOxldpz5e8pm=FWzok
zU-w@#j<lQbBJ}9G!zpDK>29ycgcAF$gKxKWKU-SJx+1reUUhv=tZH#1I;G=U!I<X^
znk$5prLGtwEcDHv!N98GvbM3m@2ui}xbE9B`<V3Bg8ge3)827b++eyZIr;6%`^G_t
zTgA%{{`*&F!f~pxvHX2!EUtN7&wOro;hgP<H#*4U+0=XB6t4n5UTw_TM~$^0(NmkO
z8K-#U-=59RQ$ELqr}IFgpZEg?s!#WK(L9|FY1J*Mnx^|n-$4bJa1()|29-spD2AeY
zffzj@y=0$Ox^ud(jH}CFcG&c+EVxug`J<u6mo-$U+O<)kF1i;3vATLWfrr^8BI=A-
zc}J(EA1BLA85{8rm>4*~;o$8~R-J3H{2t5u%)7o{;vCY(cciPQeU<9GgW(+Os5b#~
zFu|@Bztq|SpFk6*6ldLmY;R18Gfib*RD61f!g?CFgI2FYK@KVXj)5xTCgrDqP!_TF
z)Pt0k(OeJ)-rR$9i{VV|&p2~CG{`8a#YH>l4($um=>w>AQo-w@TOk@#TquiJwL7!1
zO|X{Qg?dxOzVNIvhcfSCqZ1pCB;RAot2>PdO0~+&#|$))!{vmN{u9P3<K~Jfsb=X`
z&Pw2=Cs)A@5t9ZT5*dl@obo(2*rITTuyn1>M_@@F!`{8`X;yjD9}JmJr!Zu?0hOA>
zbF&h%wCtm6Q0e4U6YJVr%L1wA9d%dJP?)K2P_NmwPfxRefSv$>R6k<cDy_5UVa25_
zoiq$;iu`L+aJ6kJ&nul8FyUx=Zl)kFSjsP#75c->mtS-HtxLH=Fg}&Hg`3Sv*{W?`
zE-?PYhtG>`uUs*5QsWLt3X(D^i`khEaFMv`r!KarL*tg-Dv0z6<hkl6zA*hfoM%2p
zZy<-)67!ZnV^hh%V#e!C*M0V2-9+`B?3dF153P+DC-)5cxg@y?Lq3LcNKVSd2JElY
zbfCD>E6#+A@AehSXrJ%p)|~)Ub_09-<puh0s;otplxf%rYG>`;7^?+;W$k%>>gL+H
zQBQ}{ov#Lc;XRgb!`3%~56&?%Ka7PbQn<|>3Q(l5;;;L$NN2|+Zh!?ZYjsz*DJ8Pm
zYPC?X^yhPxgKU-Z!UKY5S?sCr-e2-$r%bUaM^USR<p^)FiODaLN-qg+X2U3&)i!O+
znB)(oX%@|O2fxoeuHSd}o-%s3e!l*KE?esgY}-3T^0VTG$<tA{po#tPL>*+ajazPt
zS4M*P2jee+3ku16BHp_APxg9=f-~()N&B{1R9?q^V;MJDb=NlDEt>XVrgByCaa6vH
z+Z^(>vRx7QF13&<Qo*)Wr^c&b{%vjAM973u6l!SmsTUuc(QK#X#gnzx!jK4rMcLsU
zT2SoE29J3k_;+|9aFcbVlI4-M_JIbm6%))#-4T#So29<lq>bH_49Ugewk5r%#=EZf
zw1dub+{at84pYfOk{J#4C@0+x`H?w=KL8!jSoB`WC3j2xlHiZA7gl{%bDW)l^l|mV
zFoP!#1ALcm#)v&-9im7BWy*$D=cD%)u~~MOy;Uok6LGe&`Rh&b@%k<{cTFY>Y1-eo
z8XXRzDpKh;iv3gG?_)m4Ctv2*KU2;$fmkiJH?xw9o*aQv?R8oTshm*G`=X(-9VXPl
zQv4KIc4n99*lnxEB=Ppr+g_DhBQ=O;@%fh@-lCX`_oG=azZmcDOIrrGFSCrPh%0We
zn#vBovyFMyVXVKq2Bqc{S?JF5pTl%ddpt6AQs(8l66JB_5lmFBx&n{g5#4##`|f?;
z9k1I(@vOq;`C}Q1ik^s9Z&%^PmT$@jxVLY0E>Oe+-8bZ-OSZRSq%Ir|Z7)9HjBw1L
zAFjQv(dj?s&Ge+T;PhIu0>{|=3e!PkU!(+}o1WYcROk2IyV5_LvAA$LXrVG>q%FDS
zg(ll8><Gxn^R|1{TYp@ztDwP#^X}Hrk7Lmz0n@aAgZ1yMLLQOfh8Fe<a>$IMgC+tF
zBoLA;(1R!v97yDu6X*zn^dJUqcL1`24FJ&toCwZD4B&KRK_p=G0TRd@LIx)g!~nQU
z0zuU5$!ZF}_lm#wY8DU`vPZIw3Je7Q=~4v_LL3cb$PJ<iSmV$NguCWYvPcvL2Z>3*
zEo5Yl!aWL7lq~%_iNVChp#Po39+`|1N5zjw?4!MF4x<vUvIWOn+(d6aHy?xa%e*|V
z=c=j-0lbXoN>V3Vn78$}MC8VA%%lh!p4AlT$)eM;{KT2`u)H7BP}n`4d%h{DAc-@H
zV}+_Af?ZN(kD2L>Yc<E-*v`ri_bZDV*YNLGic`;@-Q5%@(>|bI=|#j8aE$NfujlDc
zv+ZV;&92Twbq9E&u-`IgMz%P3)^F7{(1(O{O~&>PFMNjYvUSc}Fh>=RZ0L(vD$|=^
zG2I{KeMg7#35tojTNxKcRbz5BdAj+N>-!=?|468`(vq7@QgbhHXP+;O11FZu+)k(6
z4xauI_(s3Q=XeX}8mQ!6*D?N_!Sw~(CVp|BOL?_d=5szbkVGH-Xy9MJ_Bt{Durv9J
z`o|z_Z<gz^cc(>nHbzBur6p;$ZV!gFusT9s1%mT;c<xgKFI=+a-n!h~zavPk(5@9L
zUBFF~Uw8x681<RW{8>y$H=d;o0lOH!Q%*Rjy~*m~V~1M1>w|xEZU1|8P1gnU!M&Qk
z%<*2($HTg>NkU1jPg;Yc+n}XgbD}VAj7p(q-gVRExV~J~!*f^M)U1<po#aChPlJmX
z?wWJ7_AU8gi^jkfyeip6?SiGShe{#B2=4J{xaOMq16g(F?N|CVabM%JTxQYF{Ipw!
zzi&3E95P-wo_k|95&6wl_te3C<VPzr2iE|(QD~oqo&!#Kr0K#fnP6tWhO>Q32KHT3
z_vou@XD04Pgx7nlbg~ke>)ziS)nMu~QHlF-Z^-(p6D}-IOEIvCRWdT>URz@b__r4t
zYt`tK_Vkx=;LQrj;M3X_jFn%C#wMQkZF&`r)LnI`wYu%g=h4Y(R`-2A8;&m+q;7VW
zzsfdPJ|x&m<=xE?)k80kduJ$<edi?Hl{D2;GL#CM4Xn)`j*iR}y>B1g#%49f6H!ke
zx}}i7gJNoBI<{(_p)QoOQYyne)^{>*@gS(v*`ig?fH5~adr@pyofo3{!u8h5w-iF5
zu}5SZFU@hikb#J;c6~uaqf!pHVTRx*_@=YKBTugRF{5UdqEFX;!?;gzpSa0;!uB0e
z&$#7XddGY8<y^t@SLqvK1_Ayh@3iyc_77z?$}!_0{mNWMbKWYj{xOPk09`X(MtGxv
zx8C#!R|Yi`7<Vj~<3h%M>zN&;0)kWaZJ>2_{z+WPoR{uv8rW*ZO69P}u5v3{ZIe5w
zjQT4_8H6>?2>bb~64HjQ{&A?g;dAj9ES~DRUb$zIHtFjhU$_^gBN!uK&L3&@<(4*+
zY(LxMB5pexPU>oA(T@eihaJw$6iBds^Sh=whPr%B4gC2_0v*bc{1;m1#yx!=rdt|c
zt_pUPV9Wo&^O?qTR&sXzOQe6zCikUXF3z#hvHFP!kNgTZX>)$g64i5%mfZnx?I6ZS
zWEwL(m%Ig%L@%y$WtE^8(`uUarKEImh_Lr4dRsu*)Q&jJ&U(<J`FsSFVo%hmAQ{$0
zCpKt(Fc%EEbvMhsv}<%x!$*8xvDwH9q}ozn!S_n@BH_7{==fOmtt!fqh(47sczn*O
zUcO~D2AZb}36eJcxpHbo`rj)h8eZ}k8iWqLpmznWeCsK0VdcIOt!a<1q>LVQ4b1<L
zF+k_VvF)n<l2a}_-|B91bRVOCF?i*3p%-1ey-NRiuGdQ}XBb@WM|{ogj8u0?_9a@(
z4p@S7HSm;&9_L^1DCnLxQf(O!ow;t;CqkLmiz~CQ^oSl2&tdl@)a`}woh;=YDiypE
zYMszh1UJgVCAZWM2G8mYzHUnMnR8Y_a!%`4GB&?Kmx1nJV=s=<=XyThmy~t&KY#6w
zj-PjMiA;1^PHAQomw?$fni($F)r2XLoaI?uPH9v`dw%=L>p_9=tFY>l9I#yQ_i8Ca
z#xu|DjIX06vp+q1!ocS!a{cUb*KR~^`@&tC^r$>0hb4(v%XrGr{FkFy0{(t!34U1#
zT-@}ZxqJr#l}NXJY41h81Q{Y@G-ciCmnt2TgweWl(1y2W7oBJny`On(b(P9PW*ykR
zQ(W(%ly)`O3(X7Lr^ilD*(Xcf#Fv%QaNT2_h#wi~+BB-|EDKrgR|-oA*Fw~=pD5w&
zwZ)ymGDx{qRP+nHNIK^Ooj=^xQt%`-MOG0D2$zEVg`p7oMi*n>ZW^tm$@p`dW}erK
zGDS~=UBrqcsJkA81kh|G7|aqbMI~G}?S67c&0hd?KFjF-=ZZTSA@RPX8)nNb+3ba!
zt96l1o2^fmtLGWEsT6dp3WBW&L^%}#<8blZXlmps>xV@T=zEqkUQCz(S29;LqH~se
z4J)MP-8hYBDym)Z(@}D^EKR;kR0GzHoy$w^`GYPF0qh?#i>p2-_NnJG3ZJm2$^6br
z_2$GIi=YYd*_o*%^^E{Uj!M1Y0Bm%5lq6=)uQqcimC;rao>CZF^SbJ6Gpc-d^ld@T
zgnbt8F0D|I#Ckq+Y(m*Cib~UmZSTX5Y}IIe@;|Xb?AML_AF<)+#{PfD28n+UQv7FB
zN`Mo|{D^z>ASR|}<X%jKOgR=10~`qtfc0T8C`2Cyhl21p4B+4dfY3HX0I(<1kiefr
za^#6jB;@`7L?dly5+3IOIFY%@naofyhz8n;1Ugz@k4!1VKgNIBA2HA`dj+%;aKuIs
zRRHe-kZ>6ERRsdx`j_9IACw))k4!iR8;CK^LEga$_piCWvlZzG%#K2U{ptG%tNxSk
z|AX5jF#OAwk7)3Z{lX#Fan?@1atb;+8hU?$H`o!={l!obO+w=dHjqDZ2KrT%BY&FY
z$25qc6Y$5UpUCO-3rYXnAM7v8N+ei2V*nx;_Y*$h!cbvx&<(Ja8wgKuMcd#2VGP0k
zhJXNs>{*HYUI$i^ghOE>Py`eKgTqCUB0^BuWhnHr07Q}efJed+9R91;pE2Ae0$5ro
z2nMHx{;PpRkw^p*ga!RBgTp1rWj<;khd*Q@VlZ+Z|4k+iCFkt#GAQ(a(~}^d)4%J%
zMUeln6+uY+a}7}>IctBn6+w!UOY?6s3FJRyNOH3N)FTnmI6Oe4B_Dk~0)c$ikIJhD
zQBwk$qp$!>3~ntVj*)<(twgOcRw7Ul7+S;{V=amiv%+F!PzWm+3<ih;0MZI3A&!Ph
zSYrSQYjJTH8j1iA5?C1vh?)bI0Qy;DJ%~Qe9Uv!}oOdS@nn?PYbtFs_LCeRdtgS-(
EKk0YHPyhe`

diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_readme.txt b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_readme.txt
deleted file mode 100644
index e2f9639ad3..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_readme.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-s110_nrf51822_7.1.0
-
-This release consists of the following:
-- This readme file
-- The s110_nrf51822_7.1.0 license
-- The s110_nrf51822_7.1.0 softdevice (binary hex file)
-- The s110_nrf51822_7.1.0 API (softdevice header files)
-- The s110_nrf51822_7.1.0 release notes
-
-
-IMPORTANT NOTE: 
-If you intend to use the CPU unlock feature of this relase, replace 
-the header files in the SDK (nRF51 SDK version 6.0.0) with the header
-files in this release.
-Otherwise, you may continue to use the header files already installed
-as part of the nRF51 SDK versions 6.0.0.
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_releasenotes.pdf b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_releasenotes.pdf
deleted file mode 100644
index 64955494f843f8cf385a146c1db3224aa3754c50..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 41671
zcmd43by$_#*Dg#*Dh(3S4bp2ZSRjprNQZPuNl15hw}jH&(p}Pxbax}&(tZovd%y1U
zUhnyN_CD8l9sl6*VLfxMdyaYEW6Uw;e4vtfDZ<Fg1VpA<SsffjW@RO1AvJ$%%+1X#
zq{agIKdT0_pt+TvzSYAW3*=57@|hAT3$r}4JTEV^0Oana8UXU79J8{DD&)!z=3wFg
zkwPAoXBIVAFo!%OZ~NB9(L$eD!pO{oSx#TqMvVhZ$_`*-f?QZZ045L{DLasji3O;^
z%ZsdUrUwCl%*ytUkU+lpFC=X2U?vdwKOkXcfk0t{U;vS_LY@cw1O{gP70Uha{?Co_
zD-<9r<Qq7D2MQ~Y2>>8v1#mKPa{dIy`70FQzlOpNVr9CY=Kt;dJXnPV#KcO<3S?md
zLy+9#V*eG%{qX*sQSPT6V%q-*1jGqq0z;SrWM^W9OwT>6zcGdVA0fGK^(SZ9SXurv
zXYXwS0<$x*Lzn`BOb_G^0*v!-OyT%PQ0`m(35A^lLfZdi6^L#?92`tQwm;?bfa`BW
zf$;ucPS0->1q9Iz1PK7l#18z4>u*GX(EeW{`EB)pKwu_Ljz87&fa_PLu-$vKf5+M1
z_9-AB=RKwV@F^e&VOV};3fn((w7>e4-<A(V!4O9MA)g0azcPjGpE=rle*MW=5GUvF
zc{dP%6{2`n5F|pdlY;JX{mK-!f97ZJ`SmA~-wi$>Hb}UE5anm^d4TmdqWu5pW<jiM
zOkfC6{*Vs@80+7N^6&lZ@5_e;z{LJn@Oc3CH>UhENBb*he_K94P9PKTFZJBx`WsXJ
znV<a?$?vKM2!@0k2vdFrp9fffW6D4Cv;Qdg068Gx=C9y$4~*?^O!;Sy_E#vsD<2>`
zI}^vfkU>lwK+*?XzY+!T@BQp=2Ol8Bnf#@m2VB1r1@Q0P>~E_F2!w>ezk<&Lu3wn~
z_-B6hSI+*vdLYY3mcN3}JutwpOo1#g|7{%nZTYZqGJzqBgFobRkLzzt`Dc#ySI++S
z+6~CY!o&{Y?8DLxc#rFEO!;Simi3<M|EJLh$O;LAf2BSTxc<hJfA431Up_35c=KQS
zfdB*kjVb@$(f+o60Gw=0ocHU<htvmn5A1JL`DdQ?AL$1G1~5UC{4*bX!1Xt({4+=U
zE0W)p4}b#_2LFma53qh^3h<vf+JCfm1F%El&3*KFSiIc>1O3Vr;J^2@zZ-o3Aa*8}
zzfzwET)z?pk`?`1@AljB0YLm3M94qaZV$MAB?|E0``O=D4*(Je|B5~jxc<hJf97a^
z<?L@q9{?L9-uxAP01#m8e`Cr&^R$11!V0=C*!<_x0f3d0iS>S=0?ADQqz}OUMwNf>
zX@6VEED*Q$XB>Qh^*5&cGe7&!gv<hogAk_tA>?~pe`CrYewGwc*^|&WGqia}3Sb4W
zFpC(O+UQ#`i<s)z=)ct0HP_SU<+Zl4(${&9?2wogKWj$Oh2eK_iEV8J+nMQ{?TlJ`
z!i3rU%CxxzN~_&dK%OG7O04LWc!KLQKI3im`Fg8Z>?gXLO6A5)d3kwv{v!tk92^Bh
zA=Z;~b47P{<yUTJ*Yp)>B-STx<DefN9a>7Pz{R4w+mxZXqLHx>9b>x!Zb~kv%nZ6p
zvKCebT>pl<k}Jzff9{LLBR5c|UGKn<^!r62;uzgv=+aQwfHWe*0JH1dx8(#I?9($W
zm8+Su^t2Q%GHY|4rNg<kN$`DQZ_7u@kK!$46gp}=pVxR391e0_Kxro=&M<N0vM6#?
zIYM=8>Qt%>^fy}>aD~ZxaxPnE8z^HQ4hcGfC<+F|2XhMi*f+CbK2KAqe^Y4oMr~{n
ztx@H}dG2jU=R>#&6UF8Fu1o4${Z#hW8R`0I9eo3~a)z4^no`2!8>kdkC-h<Ij@~U5
zWHMhm?kwO1o?3y+?hM$OQ;f5|2pPX~{3D3#=0hDOPsQ{UAknf+K2XjsvRBHIo;I(=
zzi3Y+3xU;{rp(Go0|yVeQ1<x^cN<M2?_lX(`Doi2s+4r^w^wXw?Rm|K$SIpmD5_4_
zy2l}zPZr+z`ocVyG1xQ&OIze+4B$tX#&Le2sTre`7x4LtAIbfivKLNojPpZIQ&OEs
zhFn61K4qG<$fS>VI(=u|8il(4@UElJpmL9Z&BShc;Tl6$5q5T0^oTfbw%t%rc<o*T
ztcqiYt)du9QD@;WLd{SUKgpHdp#h0UH)OC=D#)Z=d8wK3d}~#c27_%w@CW>Fq>2k*
zggimUp()E)aIRACj|~Pb8r|sMhz!aha!SE%057;JhU1Ca*9N}!F54<9)0RLij-_tG
zx@_(B!Vrs>=D%#7;}u1~)2%||BBlGn;lVbbnpzX%F#;0y?|G(IZY<}#tN5oc3qz8!
z4$r(vbe_T@RBJPOtJT|+J>Q&AOlz(oC?#MmDMd5Wx8hiuUQ0v380!rv!Dy4~L=??S
z4Pk%V%s^SmhX4Jng)OQCgTka$Ko&<=<NegAyzDOGUHda0)UBWj{=&iqhO9!u92jfW
z4jtTs!eN2_1=qrcwK{r+@)>&A&(pA%Kz}s7ai9v`<4MZiB?txXts;dcGDSetzIEG`
zpBksQoYhQF*(wcCsnp2J7@+|-)>F%hGe;qD_J?n#Pm?*x+0BhKPOIE=<vqIm`bUzq
zwydWotdeVE(L~XZXFI>jIdDoX)8)0&upq0DjQcoWEv=L4pH|UZKxjB|fu&mMmE0ds
z{cN)p6v*ZjD=uwG&yv&9X0~85N;9=7bnFyi<)DEREA>9cGuE0qbZyj*dbuet<`oN?
zNF^J&&DVf66>^BCGQNI#l;EiF-1}`%Y$Sw28d#`7`FJ}~XnMm98?f;}#uoHp93xL<
zl^zvw4LXT%x~v$&wL+XO#`zZ!F-q!6p@o>ss|JI5ql7%(d`AWd>qW1kOUtqO!{h~C
zp%90(Y7c}t*V&Uk&zV&8OoN!DQ~KR_B5$P1s9x&a18~9a2jJeaViUV1S)%54Z%~U1
zTBF9_;J<@3b<)w7lYS%l;mmb8{v|&5YqB*kPW0H84&cD1HREF=mI`NM5%LqbiCmDI
z=$nC~7eJHv!q>hgnEIy-z7egbALR%d8h5GY<{HsdIBScL{p~|Go{LCO23I}TlX?E(
zt%y7&tfy}%UM!mkxVK~OG61@qB|qj>O)(n87@>G7KaF9GQ1MQ4m!DelF%-R1MtPZW
zd32OjB67dcIDAIL=V6`K2MyQCjx7*!Q&%d&tCoHTTvjBRlo>}Aruai<N6sNqg7#kb
zBi|1%7YK-~;0}1-z%>^B#C`V?f|~|tBF-23D{d|q{x}LH!owZD=b}po@Sl~-Anx_-
z@o*vz*CkNYpNMzH=AbLjLNXm91}Lk<R(UyZ1kP{XGpotG4xHrfeD6A<6ulEVvqe51
ziB=d(@l8#-e|&OJte?7MhO;K%=C<@^cSTdHcju$Mm*!A9gx!pr5_}QTv!5t4*pVIi
z<$=f!+Fd|IaF0MUoj9ES80V<BikPv!)6}$XMF@{ODA#Zmw49n7RLbN?9lQY=yy_sy
z?uFKfd>RlFlbAIYb3X;DJvz@O5pcq9odskyEj4hWn$9*AtYf!I0=rtPza!lQaySRw
z4}F&bE@D+d=6)b*<*Uj2MBTmLY{!>2O7mn*Ziqk66h*f@U$p<zNUQ4osAwWO6$bu{
zJdWk%4`k1*>g6{%4-1KJv$xoEY4x`HMV=yPB4lc-&0qHy(SrW;x+XVb5aVaKK?n4_
z)vEbvn+J}!w8btwe_?j85LlR~q2#M~uTYQ^Y0AcyXJS0{<GjN^?T##Nd{~l&VB$2l
z_zM}=qj#4kp0HEahs}g^Jq=2oc;$ooDv}$KN?e#a;j?kGm(fr_Xf~3lnII2-F%rCR
zj1LZAA*v^BIa@Djm&m4BZ&O=mh`~1`L*dD8kz$xKO(;QW3vji2Am>kWZ%3n=iF})^
zXQ|OTSURuQ!p#aLk4o@tJ9S{Vb;3Qp#skw|NkxMKKO=XIjRoM?JsRb}MG50l_7*+#
zzhlgyU4PnRfw}qi96tOaoZTVX9k||~JugN3hbu=bD#i=JAWXZqQ`nys#^-sEo&54F
z#Rc!l-ox)@;aq54>L0yH1-+<g8mSg7@!6kU1wU=lh;Avz77UYTjcelZ+5;>Sw~*AC
z<32>sw8OpF%2u=(^YDw8_&mHOf5ZqniDjX0vlP7ky{KJ~FS~b$DmIH|oEWzQ1KZ5*
zUC$8qzrh#z++{+2!7{aM4FzwR*%dHLvHGQa@2V%Hao7m&TP@>d9JsU4l+s$b336Xg
z4Xl$MT?>))FfyC?!p$_WT;%9Hl@fQW;=MeoT?wOpev}Mo(QeVm>-N=J|9(pR18Hb*
zsOCMb053}T#ogTS3s9$fb%XhS@_E9^d5IRE*&qp1K-j5f@US__#P#*n$PY^Dp&iQ3
z2FE({{i+|0l=OqA1pcx=X7;N#L2{ay9K+ACJ8!Ms9ln^~U2NDmUCrTt!;L#VKbF&J
zqw*b~XnfhNujv#6d-=U!`xD@DLusKUvAbGRYciQ3WAbdI%ua8DmvP5JM}-1E`*|O7
zf?-{mB$lcAaX?dgA=1W62jP0^kJGCrGoY55e&)*OPvY5cEL%REgcMIq;;^?|8#I(@
z$s=EgT+XzfV=QhJF`G^<_l-SAer%3A{~9HM`B@3w>FH>}_RJs><Bg*2UQWmtRd;=j
zYs+SylkK|mwtz31O-`t%j_q3eO$rmi8~iEMH@Dj{`g?{ql^eGDd$4z0N0s_}Fn3&N
z8DFLwUl1q9X_R*T_|lAbG-))s7(TSjTz<FaHkBfp4|)Z>d2A13j{ff1^omP49|>Bu
zv`x#v<xnC??1td%2^~@P*AM%79B7Yy6qg6~tY!$SzcAP&qb#Nx)VnWN*mt!RIckQ{
zK!0dEKY7IBvh@BVQdPw57&qa<D83n50!;(wMS0iRc@-yj(vPcY-u=4V(I-sbYP3&v
zz5we%9w|?m=Ihs|cGDcA@#Yq2CdclE(IYz>7I}G_)G_KDZd&SBj~jTnlb9M@oIdZ_
zINjCo@IkGVEpRK8Xz3W&gn@3D`Ml(b!&2zr&NUG-m>Qj6gg-jY$DkP|j-0iD!c_cs
z6vN*T!V{I;ynD}#XFFt#A)=U4Da^a=$Z+yB^v9l6aMDc;Pf`MC&go|AgkYxB0excN
z_S|uL_O>%tg;yqQG1h)_BW~5M_8NI~cjAk{0$^@o6k+Up-zQag_@N`m`Ud|YbF{AY
zliiEBUZT=Prp>eSqet4`cUJf8+|BiNZW$}T&zJG?5iKLspZUYb+uc5aK6N@-5o(xS
zAjvyF-*UaX3<XPH5;yQPTwBa7@FgasG)>){>YvO*=dur=^_kUk?phiXg$+#dxuC>d
zfhMr{f=+32o2{H%^0cFR3zBDOZpzONlzza<Z%x(R@Am(ZMEtq$|5x%ZqhqCSW<v`6
zxxXW1Ze|0ywI&7rOnMaV4;0Ag80td~6j+<vTIuRrLlPDlD|20WeH&6WX2`h)Qf38x
z2OCo6SMMQ@3I1^v`s4aagINU9C8UiAE9rg3K#p02jr2ZCmg9x|W0us{Gtv<>cX&AW
zzz#W$z`@C;!7N~AW^QAx_Hax>j`ZP-0_1X^=0h$IjUjo}&%1{jB`IX<;Ni0e(4?#n
zV<COmhm<3I*aL)I9=@IQVfPDi_p=vBrRBaI+s|GgW#xyvpS`gC?B$`#E(b}@9zJ_0
zFGKErVgdZ@1(Jo|w*&m_1@N;MNagY2mp^-XC?Uy_K9p}Dm!DW33Kx*OpS=Ko_5%Fb
z3#1$cY5vPe0MH*rs9zFBRsh@oK3|j!D@BH3MSppH8AMkZnDFsqCeByE60mX!dcDwk
z4c6Dr#ad|)E{0x0SChU0%`Q&sN1{rhjCZU8A*Q-Z&%(OMot2l7;tEQ<r9+~?<hw3e
zX>!LRF3agZ4tGevt14Epj`MM?11+raiFq7Tb=8HNZw1rClm|@q+z%=)pyrUsBL6${
zK>t<2`X8wGFj6_@|BKZ7kBs}T12Ol90`51je=#$Fm5u#>Z|4}*S*y7k4A+!m{=E+x
zk+qK;1`|wGo@JR9D@~Zm;bbXb2M${dkaaa|m1$*2OKL$yM4Jv|-e@O7*IQZ)&A%JE
zt8#KKJr<6lvy?4b&?<COb5*-cCZUY1QKLJO#=Ehmay_y<OZjn?uI`&BcB5dbBuh9V
zFDY%bbxFqEcDNha#Zln?nc&ddy)HqKyb*}0y(SEOQOa`omL(!N1e%t)uX*NiCR_*o
z*M_0cj=Z?ciC&mvL}mg!M*;Fe#of!&6R}j~>1l`lL(&4cE|@nZ@F*A6h?-C{sD7Gw
zNH4eOksB!C+fP{N-{4zoe`I}8RSxCa>I~nJ>_euD?Q8^gq*N%Jb1@jRAZvq@-7t$?
z&C%qd+o#cds?q^Xn}Y_M0~X4lS5xsoO<Ho>=!nEo_bM3T(p!4Oq3Z{)GJwx?iYnkw
z`{@yyY-TfZShxK#o*o=Wgd)i9X@q<Z_@jR>eOPjqeBy9s4H3wt$KsVOlOtZICN}3l
z8_O{!1t;(I2(6w+%pCtjOz1A)vOLOPXT`U5rr8*<8SbGt7lx1du41WLfm^JBe*hcp
zEt=IdJuy^5Ki$`Ey01e4{rBHe;DDEzEa6k>r4ddO=aaZ%HWoqFMm6rc;^tFqZiudE
zpyU=%{45X;+=EY`aa()0J8ZPyrAhvIi`U4AaHagiTuNR)^<%HcJ>CrGsR3p*rZ1_L
z0@V50O1uDXB|{_O)`qu<^qQ%$Cc59fBgC|Fs+Vo^c@oFH>4ZQQt^Ms3RnS*B48*@g
zBSH*YxBy?4-3ghWcW0=r=!?~FFk-<wkq_e_)~j5qiRSjW{b~?};EC%ib<DpU{)Svc
z%EnJbrK;Q`k!zfcNa39#LPTB<RoW}t7slNY%Te1=ygmvn;dlZ07D0H38)K5f&5<;E
z7p0MKthh#xv83w)pd-E#V#e3Z{s9UjV+3*V!)Najd3GU1WW&q>8CcVHylz>YLWY2T
zPkrqW(2Qye#y7&wOrNA+ktaxOD(LE4pQF$xYm#&qiG=8pEMi1RybD+0%L+TqU??+v
zF_?x_J8Jkhqar@cg%Yso)nwLXlH>_{%0?#Q;JqAGctq$Z=tuHQC3OQ%M8J9#ImBzj
zfSv_ja&9kI2eThJ<b-Pzb(z`lQ$7p@yR)}mh(<QS+7tkY?S08xA}>mU`L+5}5UK2k
zzJQD&$r|(olsE<4VW#CXiy%9sgb&m25SF}>k~Ipk*p~aLpGLgE-NyWS(C=60Bf@BT
zhghQxA>ktxMnonm|H9BU2`gG`%Uw!;%qYp(zV26Fhq`<3`9Z@u7D!qZCA7LJUElpK
zYA)>OC{me6v0q&6`RE*tjKoFkM9yk@Gq}QjN-r%ZT~}*+1fVO#0hWFceH7L}WZln3
z7t6i5Ozvn>g*vivNKAgXw`}Nvf(Oe<9})v0h)9SJKjQmATB^h|&l9m`kq{yPceini
zB^{@EFD0jW@Hmunax+r<ub6y1t)gJNslySedj>x0M9mDOI55@ZH02naQT15lbt=LD
z>TC409RY8RP1^={zeY*5gfcQ5a_2QSTUP1z2ZTI5{m805;m+&Z@p1)bYc!Ogn1^_m
zdlyB*zEq=eJL|MK-i)Y6A@4ajl;_7;M~Xu&jdd>A!8`ed$8(!U9G`spnb{SYxioef
zCdrxmG@m@Xy+~`sqFFs8UEsm4d`hF36D$z7QqwR#FLS17eNr=V$zpdUwif!%UTB>C
z?K@!(_AP;i>zn$TSq1Ho+`hhi9G1~aczM?II?DQdI<9zphNH$4_k&GhacSZ9#-b|$
zj;+HYWARj%>R}Xy?4fbSySl#MVy7+3Y&rFCj<*`~I}5XXzQ`={mO+co^JnQZ`^Jsq
z10I?`EbYjT=ZlJh2yy3wtJGF7)-h^nXR`6?QTyAa?8nVA>KhE0G!o*3QFmJ^M#XC9
zy?$U)!c%o>d_oh!8hS!`AUki@m{R-X5DS`3l=Dl)&hpE}H@=z-1cJyjQ-%UKItt=!
zcbNz6PNvA}GMY+lZGC`I1iVE8>GCF1xLSJhEw<FUk}=w6BOC9wJB~KXyJ~}%Y9HrL
zTZ|_;e(NjPQPuJcF3?1aD`wLAA|co@WJqm|CYnybqVNncS7Y`&&IOjqlwKzL?7OLy
zuF^?nVP{mB1!HOMrg;j|SJ0kGtiE!^C#CRD2gqT-5zAc~2**_!&phzdgV+5?I5n>{
zaVao5Zwl19kph|#2o4a$Fl57s#0M(^0lOE;K(bC~jWt?r)hAPuyevBMXh97|Gtg1V
zY<H2P)}{pY!&n;7<{X<j3hggn@p-!JfZ~X>uP-mKb^~Zq5ARO*=S52g&>|IvZBdZ6
zuLZqna@i~K@)<Ygsxf*A3~Ya3A?;)bv`cq&ZGwHLbl+?@ZRMM29KSKD_TyOEg>oC(
zg-Zm+6-#|}zdWT5$>erg>rxPjEB<Z@>pB?3f-uy>+?DcOn!w=n70e<ZQ|Zd-s@bF+
zY{vz(uNGcDTi`9tjhl>e>y%=aeL_R+@a=-IZ(12O2`^zuw#WXBORCXS?X~d>vt=;G
zD89gKTyg2fxr}kG$O(q$C!O$gxx#w8$NoiLsT~9i8F<OW%da?i2ptGFHcVTNU7>h{
z?Va+ab)nPdi@WOFSVUuzj!$05@+&WsmF~=>G0wzeRcz96Tz>Xb_aZbdURJJKZ-bd!
znHu9{LR;8)*HFXt;<okiqP+vUWS(hVclVFkL38ZF>*MhenX8LZQ#1T*hrM`w>kDeO
z7nCkSTFd^4-fbM+*lsUM)ijg_l)!g81aeAajE|K3&!|cK?H=pbb<1v+Z7;K!fujpR
zd(OfjG{L*Nb#17D#~Lf}#V7d-Sm|l$%&P#laB4=Fyy(6qQceaT7%&ef@4^hbezAo>
zgh~S10ooAbVdF>VCiz1xx$E)o6p7gJ+YHA1>#wmBj3>Qw+eA#&P%lLIC$G*JlL4Du
zB;jDvV7tQCw8sv}t<N0MWH}M>96m{ALN?;jTi=s%FsGdBV6XCJ^gkIeDo!B0bDGBM
zWpmH6?z~Qb9g%!>WAiF>fFvRfT}I(47s|Xj1#eP{W+NZpkF%TY-BFS*lCM%lVbW4x
z7u_#g2WVfas)3@T8R=<`cb=Ag>}cq7rf;%^o7F+{kf0JpD2cLBOU?Lxb9y@Y9T(S}
z?S~Q1ohPH7I-v^<W(1pQ_2;l5pN(v7RQ6GJ#~!M8k#e)!1^~nwq3A*h&Zidzd97{P
zCS3^wW`yd`#<#9@_+(??h?TGbIOo`-0+$U9+y#=St}-ipPJ~WTv`uL4qKUYI#Ny&w
zy0)EHv)E`A<rGO&4xAsWf0W1YliEyyo<55u2;FkCf$F0z4~0#{mHaYcF-Tj>*N;2-
z*rxY=u7he%3Kwd0xFze!`}~i`;Xc7-Kv!b@K^svLl~W=mH>*>J=Hn$XR(;z=>M17N
z71Tc7V(j*D&hG7*@1M4>o-*sj73U{pXHjUETE`WCb8$$t+l8u<3HXqsbCs0TJonb?
zywC$ykSMy0-U9dh0Ld%KSgl$AL-1F&r_WJ4z69%v>npo|Ctaa!MWc|`^DH>7mJMG@
zfx(=QziSj7J{GciQ@c|ud1^RH*rM-J@_EW@2R>bK@gQ}FAxT69k8nhkc8kx&)`27~
z6*-%a$xH06u>Cn7ux*IOeyAd_9RAp`ubNM;-KA>ENI9@pShBHWOhy|sJwj0)1!pej
z$H=;y7iPYeo;1DuNwg2t*&`rt_({Un*cH%1Ep62(frH|VcQnxjq^4BIgoeoZNpO(h
zR+;q5$@+0v>Gke)vD2F~TI3YXxMeQ0gT$dYNs%doHCI{1A^SBVN<=qHqpq}K@fknZ
zT<S;~$DJ1qnutGm4`m-+yzrj=-f^Ph`2@thF~fenqMguFPm*$&5`IKkJVChyeY(;O
zG>*==jlMN<QFf+XcKTpN>yleF-b@mIp6%lk&0_FlkOTi4!qia4G=7EisUp<=_wgCm
z<yP}IbJi`N%8O3iDE8}&hZN56gud;{DqSSJ2cwp%vD`L~GDAr@({i9lisB~Tx|E~;
zQ1kl?K8f&l(7QUws}mUKyFDWeV{xD0T5|WidVj{(ev0G!-!r5C+Q$B$5~GK#^Z#aI
z^uOlh%pw3%$ZG<S%=3TF&VR|3?i1I)=Sr+VAnSj~m6T@9X2IyLlS+rB&~=4OlvF&~
zmNNrpA1X>`-<GN%mc8sU*6+cgLzph^$=N^5eyuj9i7jUPGU-zrpiSp^z`60*1v`gK
zHD+PG_j<|o#AR2MRXAKT;Lf9iS#v4F<lw;FMZt+upfn{lNfdury3$P?@f?Y}?Ragt
z(7bU_6V`I<%YI8RY@!S{7Re~~iZWgn*v|tR^&>oQ!-*v}SjK^&Lr+;3DGaNttofx6
z8sifdPf!~<87evMut#h8^lp4imI@#gZdV(Y_@g~<OWFv}k{AZIT<HzEx3#A^Ccc70
z9)^y#@fv<IEElcIJF*VwLY1c-uYi7Ixrcr}cH=?A?X_c{Tw>*R%Vl|AFDEqj7#jI}
zi|8Y#SrnugJ|-LzNOFN2h2nhLW*U;)OuFzHrFR5sz?NVyn;@hEOz^^w)h}-cuQPYL
z^y^!X9lXbqO3JaYT<JS_@IQQubg?~zmdTBmxH><p5XFN=!PSYG;6$(#CgE_4C8jR>
zmG00|jpu}7n>Bw2;gg&uF09x`q|`z$y+!)w^M~IC0Mg|9=n~gy2^eyaPEFr3<{;Tv
z8>5sptC*#gj+YS*VI-{sJ^ex>bp_I<&}Cr_Yt_oRfF{|N2ArW3iBZGWzPDqJQmg1_
z@c2uF9Njg>uPDTNmcXHbGpQ7^5-Y5!BHpWQ`HJa*)=AcTK5q#mDzM&iwZEij#<Ru;
z=5h>)1Gy1wh6H$Zz;C5^Z9YkNMU>)K3$;3okjH}KjMv(Dj<-<=krT7u!PO71Y9<+i
z2DQVe-&LMyGNcgHuBTtc#pRlj3}>${IxS#J=jP6?JjZ;$h(o9d1N!_j>M;^Y6;VDx
zPXcB#2b5FGur5{g)>-{)N<B@N4#NWG?ei;N#8~+48(NIuV5Q*43KavM_EGk^^CwJk
zinF=)WhOfWn4eS7X@&djC~$9NJaaYfGHq?1EvP_iXue^bIh9P?!b^G_oe>t?6w53-
z`o7Hdy1TxRp_hENl8R5jAl;mTO5Sv~iK!C9q<bNDJe$CG{n}Lnr?#hlW*coulsQuu
z5f!y+Yhz#X{O<f@U8AZ-SzT|kI=FB5W)%X?#nu*jAvqOEN;seDmSJKKrI)JrS%l&q
zxX!(_#@YEqO-%5|-L9C%=};(3u<c>>X2JOJBhZj-d$&qu{@WqU7nQQ>y*qWAW$)8~
zZwDW<^n)`eQVrfFOjefDAb5LdY|LYE+t#&PJyt6nn6y;f%!cX{u3uH#dQ-wHdR;UF
zz4<5&qm2xZ1w4{Wqh?gBnxkAb##M#VtA3iz>l_&JiR^koLJWHH2uLMi{&9KxD-G9X
zisbcF>gIDYC#DT!SiI{Nd*9T+aFs)MWC0yH|1`SxSUwW6b_oq`tgk0w2NT<;?-gvr
zhA5_R9~;<^)i*`(L@N&X+=xMK?^uISn$a2}g^;pOw?r?=WMd__hPWiF1`^6PzGVAh
zsQZ=o@5CFT)kc%AB77q1A(VAJkltcBW7A0AJszc3yQ}Pnn$w?D>RTTln8n)eOdW}w
z_31Bwue*wvRLql-Z#!cUGB7E^MLL7s;-CNWp~rhS1hZ_fhS!5nWb3;@$;>3pR>t9r
znplKYKCQ`^seOek(nR80`cNrl`f;AQr>PlQk6k}>Q@HYzPq}dQ9H}=;pkIh#EVVvf
zMS2}Qtt@;*$>y-d_Oa$W^ZuaJ6#3039j5m0pPS@-2(;-%D)*^4t}#ny^Buv<Ha-?c
zB}QY0&T7rI9(B3U@}`bQIE3Cnlf9469pgCAbUy_Sy2)+mq9o^Q!FKMZEX-@_k;KK>
z)8Ik-x7k!S)t+lO=Zb?8zIWoj4^~80>xnt8KQXzz8p@B``rhz-IDxQ8UEw?lBq2;+
zGj!MDfuBUQf0eej&AfoN;JzA=7ysYG()|gbKVIkfpW@O(0rUT%xO87a{d-&jaDx8R
z*&4N3t633D*G(mf^`4?Aj5+3OgT6NtYE`S<RyQRxZ#|bHd{AJXK#5Pdh4R`;4-%E>
zu{`5L6!qTc937n><&n8lZKzYdV0bQQSE<=ht9ny<VY2M(7EQHlhf(IPbGSo(IDOsm
z<;QCI8TnV0jZM=pVk64jpcT4s9==Y1Uy>+ilbVZ4#gNdCt3C3^4ct1f_MMHOc#sWz
z<FcNRioqSenhAzM$ro02D8+wm&D>WR4I@XPslbx@Jw}1pNgy30F2guxYAi8~DTft?
z^QMHA8<v@#aHc7)J)V7|cYqQTZwAwNMo=6!ZFuObAae-lJ=AUpyAPCK6@fgr&zR4u
zPgRQ3C;dGduiP<M4-#Wkq$egwH~_jVXgXl#ZU1Xb$(cbo+$<R=A=OYi0>NH=T26$f
z3q^H3O^G4{i|s57ibsl;kq*L7C^uwtRk6Liy?nKE)_~~ZN9kU*xV{pvTdH9S<Wh}w
zs1-7TLeLZCl16BxQHZWo_Tg&NQUuajtY7JEz0Rc-=S1<56Cz<51iIFkL=nVbs$4mZ
zMR+eo=kKtxauyza#Jg617fyz594^c69O5;?7#$6tDdQ~h<eP%Cgam2<j|lW0tCPeL
zwj5JiUXOestF=TjDW7sU^zr8|F+B;UG`50hd475jwR9v|NLOYz(S$B#8TDjFP~roo
za9A|Q$&ql^VwPQK!51+v{Th9O($Gf-1+&OV{5A7yyCQK_(W1MpAPtauB#or<{K=o~
zY3!;Qq6v$P$otas(Gg?Pd&zzEYPCFPIc8hk)sf%}5%*+p=E?6yY@r(uEWdV`-{_hO
zr`4fFI2977>gA+jSzt=DGNQ}!9C|lLREsq&_&O_EtfEuF0G}s;@aN>TZ)1$8Z-FHg
zmWbY;<~HYtw$WyW7Nr6UvG1W(Ir_}uvoLyNYbg7|;D1Pv?eJO425JP0TI8|-pN22V
z$rdpXx44fAPK!dnw}i`5jERO9%&2mB^y3VWokcFIK^qG5E_jEvLr6>#EX7DH99Byq
z%lQuWrRQoSGQRWc+z|S8U_fDIM!>0Y<j4F+8PcRCW<2>u!)X3%(Uni2UMC7RuL%pL
zC5e#>sS9>U_ZpE#6YL|_Dr|PpN{GeD(nYKniQ?dsfwQ=>m{*%ea%5O~s08OY&FCW2
znA6f}*C8}Paebtj`r)zXoLSb(*d}5{J)foMZ6CLf*&pV_rZzfRBopUyBeIKAGjrD%
zEUa`t8nAQtAwus2BI92fC`9%o&b_OsJJoGi9tkgXc}+rFa!SQ^N~M6El?X4GmqxN_
zLtvceWsI0n76Iq?NhXw@P0&JoToS0`gDa7Ylp%qGo=MmG*7l7I|0X`1K9j5*L4;tE
zL2K?Ixki_dm{b!lJ@$~1NcaQs!63%~5Z4ib-xM2Gu}*+uyn|x*M|DB{H*`6kGR6|b
zmzt@oG5lsLiex5MJoy*M_p{yuyLj?`5AVuBC?%VWz@z=67>uqpQjAU(M8z4bT-s^U
zqb!KIujC1+SVWX`{bG$ihKNjVE4%I|W;f5QLHFyOd=i{lL#8hm?B?!4l@U^qoSDmg
zmiRHQJ6<iE{wXC#7C4P4)!p_w1d6e64*(N=TQw-t%@QYrsbEFmW0oQ?bc!!P%<1YU
z=+}r3S~E@2fmmy}j!RP0<Cd=flX!PFjPDa?Bpe~S9D%KAV&-mgWGzN)c|ILrXW2B%
zNuF$nFrrjIT^Mm@Ze(Z*Lhd<5k{S&5b>3G-<ac~ZGFN3$BOchs9B3m`C$?r}5gj5r
z47!@q)LqypWb15+GcN)gT6-9MU_YpNQJ%gvAr1^_p;CAgWAzl9z53Cs-E}U=&lM_m
zJIb=B5MllF4&jGQJA1j_a`!)wclI#xuQ2I@<fLHJ#)d?X!$YbmF0UuxsLD>ya>*$k
z<tR|yDk%kPF~7UqMK-~(*RkpF=uc^d#k_I);=umM^NZ=Vq!&L@+|cgjU~$t(Wg@!h
zaXMTLvdnEdB5KyfcoDJk;4@9s#F(A4W_Y)@>oOh2FZ$0k!@82u3=8M%_hLg|G#R!X
zS!`WJzOPHRb@&eFcAZ}6d>+3zhGU3p`{fIx^H*MyiS_P5YM9&7_a^VQNyo~C7DF}0
zL8f?p+p{dvgo-63NGpnyZ@QW`_on7bXPxFSIM4HDLxMUB?9GX{4E5`iBTBiZ@(+4#
z6;UZ7>*vQ&3~e7nzj>qU+V*WccD2-`(fK^;eVAn1giG$#75^8#d4psZu^x{aEP0&;
z-RBCik~|BnrtMGVD@{8R_MeWbFN4ZK149^rrG>MeF@-$)N-WydI^#vA)h_74YDCou
zS1(9>O3F(eZgv7x*g;z5rC8Zc<Aj$}IwTu`2x5a#mljJn6$)9(Kz8@klu}%WqSz%?
zMkKB}{{4A>v$ZxpH{Rl!$(I89jTPCp2YtnB!p0g?xyD^~>#2n$ozEm2i$%GK#CO?t
zg-l!>!NB;_uBO@ZbvLw~#`mHN=Do<gGbdldY^4*lX6zBl#)H_?w$BkR+Gi4ILRY{8
z3?^L^m9>YnRnG#uuV~LxS_og_OH<wC&x|A3$)DR!hk1AL_Ew@M23OvUXle#%8*Y-q
zB^RjH3|?F9?i_qU?5g_k^+ZzUphrFR5~a(DA?D3Um59i@y0+w%N1Ep*G%!k*-}l{l
z;XseUmPtlMDH=&7A^Dm7%{QVKAi>Dkusvc<_H&O$lP@kV%LteFog0&4XYTI=&FAN<
zP+F6$k}BM3&Yp=IJAO3o6Sk6l#A|a~S2RV_RE!aPifn4xr?et`aCHepq&0ODn}0<s
zg}rhtF1*9-UI&O`%h@+w8Wpar$tEp*++Ut;^9HRg@<~r*iht<~LZ80k(lcG2fK8OQ
zFgg`Ry*gc7A65NO5}!URpBJ=Xv_jb(mebtpB2h4n%#0`u8;EbQr&~?rXUC1hdinIl
zR}R}?$2TrY3uE)8U%t4VUmaJYF{d*~fBopzKdwti*>ZNmDUDsOw?ZHwLgT;l33lnW
z6yL;JQ+?c-7l=3#N3vM9W5_mWy6uKX$9EVNlIkKzSj#L}Y>HYhXPCXSd6-tWvs0Qq
z_C&XOo>9W9mY%C*#>!osEilhD?%9vozHk}_W{k-v()-|}+s*^LA514yYU8U-+)tbs
z0iw{TB@S#oJZ!M093eb{(7s+Xr#Sir7~%t78Xd!EK@=DE@pVB;C|YKHZBdIMeaGPa
zSc{4yFhduXDSEJvkg8dau=CwpUuB$4t{5bnY!05e<FMfaoy<y!!I_R@Zht@$3r4&J
z-(78~p%n$e0l5`UDG%;u-CQ`nfA;LEMXNW@T==Y9GN^(G+~*>vK5XRWU3znwEfXwW
z-S@`1dYXT5FiWt)>gc7o**f^mTYxzRrpq*%|A(rmee%p$X38$6ON-`G({uW;+rx@R
zWaO)<qczQzSKR~J+?J<pN^b~7Q$j!5qGU`IWOVx?+87BE@SG;fVW-c@@-v@lbWBzt
zy~yNWD|ebYIzv*p6{K;-msE7jgh4lZ@ua)7Q@XsFPnU#=naR!F+V+f`ZiA7miT>hB
z;$m-od_2dIR~BQd{U$Tv*|WLmT>47=uY-eH<!VV7PN?CgiZK+uT59sTk_Kc(1fQOe
z<e*KQwx<zL!P)w>AF0Q-mHP#3Av0dg8XCW}SMufL_q+OHP%D)sit{aq;*u2Z+=e(H
z|Ha^RwGs{31p8`?beof@slk=eL}VfrNyx6bWsi_QWieUHDSujZhunIoP-cY#b~kv&
zV763x)l$RW@CnMQ5_s$Brb1S4vEL4R{>1tzk^<~vUzYU{nbJbEt$Y+cUURHULep%D
z3||sU5;N0g`!L{yJ-|2cxy6}w@P+*&{WhZV`19=+vmi;{J)cv6xboLRi)%(Xgae-G
z$UR3oYT7RU^0BslvQO=&mjlC$>~}Zw321QuM!ru>41!nUVpet?3J0Vxc_V^Bs|lFG
z5j0m{SAXnCRfD+jBG*Yk8OFTsO=FZuTh#MuH<x?;$XJdj@fm`S+75<BhCutlqu^xu
zC$h;(LNnN7!~KcDdJ-=N1J%$wRz|uo8h+4-tD%=*0T$$T3$swZO^I+!%`fmZD0AwR
ze_N1Mkus&6ZnWWmot=(u6r+BthJNr?S3COsd~7IN3@7Y*(?OrPg+j$Rg5!GuV@XHW
zXGBQ7L?u?;(_0s{19_&RM7vBo=9j!0M)3?RA2{2)YTILKi*uiIa5irGXBW1!ht^-?
z8zSji>4;93XrfNRt5`GXXzgw}aoWA!Tv)!Eu847IClv#_omMP7lghK@jN)Td0(-;)
z-UR8jQ$<QK8E#wYx5xH{<ks|>nTH}0(Dun|jF^Y7SS?*mcO1kiF&~p!B7Zpbx4H`a
zSZ3XpL>#{q7#gaZM8<pTSj5~h7CPm^iY>zG`VFV?qMn0B0+;$U$!o!#jvj9twTJWT
z2J$WKQBZSC_5LHZbR318HVhPMW2zB46Zq&*T@7~Zj4_+OCu9c)3yqPJ@!!kzi)Rz|
zpRpT$rTA9FXO-7%-TgXq+i~(WrsXrREK9i)U)16t<}oXVY{gS~pq!cULAzJ``{x?4
zdE^}Z<*i3lxeimCe9IDcOdJfvTC1x~o<Q_(f|ouMFKF4A10=IpH_?1A9%<``JP!<p
z!MDk>2vf~c#nNYqYihrnn&i;8?XtM|6pKhTJ^kuc&nJyqDBC&uia44s?Fhp<zLEj4
zH;H4ha4JQ`y1b-`bFV2ARjHmGpe8cWh**-)^kE<0egmBrH7rXpaK<7^=|(=iiuJ9M
zQhIcpo@4r4{-y=PV(ctm9qUCF!Or+xnCO=LR()zx@44lXP<%MH`#YrLR-Er&t}o0d
zLSb!0N}B|@@)jRsYAvRu#%*InHgw^KmfZp-!c^PcPKQYN>ypL2U+6^O*w0{XO332|
zO%86OWX$4Lcn%P43j?9{)#8{JQ}|g?Pxrh)D{K8otD|<rU7BXIuyKg<e8DeXw6Cdm
zcqoWDo5b`;8H>>Owa0SF^?uqgTZTD08jtkumyK~$7H*qmG!XUWkPquXY|2ZwBD{9m
z@InYx+(!O1#~RiqclslIJxo-c!0@}xl{a=ufeXx${ku22ZJYK724M`B9N)tFQx4qt
zwA}7aH;x~Xq<t~?AXl*3jX+~&J-N>IqoO{jHRp@@2%Y&clFX~oAJRu%EAF^X*RlV-
z$Z&t!>F1w}_@8PF567bZAF46@f%w;RLhRuGa31UaoY2o2Lw|+_m9A%t>!O~@u`!lP
z*h`wq%9*zU%`z_q?`sSNw*>Cn=lV<@dI@4#^c&DqJcf17S8QV`!QcCQnMc%v^ee$y
zOl~SSwTC=>61qnf5i2Q&$KQpQf(!0T48g`2`s8PTQnmJ1FH@>c>4LfWyao@QP9qo1
zpMGH^81nvMixvz#EK{a*Tv<=;B;$Ju<@Jbv*B1%VSx1|{R?LdI>>#TDHGpEBKWuT7
z_DpW9Pw*42@EbBuE1jpS_VMtqLh)ny-BI9|L{+w_=t`=<M`bdkf{Gqqi0H*_x$0~E
zo;qK5mA^vCA#07XoV=wAQP}Tk&ZAUd+V#5nOfBRkpD%wE$hShgsfn((Z|S%5$rn#$
z{|SgMb`%Pzx)K=fR4In(P+AU0Av)IpsyIx+=%L$@anb>k6T=g?$I9YdX~xe&nylP6
z0eD2K?(1y9<t?L<T32bW)g)BMKS7epllu1hTb9*JtyaD;-qhw{L%nZ+F>DnGCgX2?
zL&1!$_>LpPhHG1YJ&kY}igC^F6c`*&dT3RRP0^Q}X3%W~pDOj5H=tptQxaYGyo3OW
z^LXR)hM*T#I@UfbA%M?*ZI$6%Pp`WxB6nqqAuE!sm<%vx1s@^TMyx}OL;>f|WJ8an
za(@1qDo*sRc+5BJyFe^4OeSISQ;H<=Rm#rK)*_?LnPMoMXvTC1Y;hE;kIFPCL$DJq
zjX;<zoFfgR++xP9md0mzRi8o%iQDX9Ol<i*0gzW<Z2e}+7!0B4D&P2rU?X&HM?_|h
z1~gBre;Jh!Gw!v1d(3iD*8PcFqLG_}8UdZ)ddSekLU1OV;Vo2N`8ldJb5Cd^#ZWZ9
z>yyI9vlo(HnbePR&SMXKwe`%A3aBO)JZ{ER{Ua+mgx<?P7}!~eyaPG)`!kF6p(@ff
z2D1g@R^G`N)^XfZfq{z%_}V;_T*mGi_CwVW23Nm$@;>~l%&`&wIl4VExQKcOod+|k
zYqR-faHWx~M*u`8!jGGy5r+I|OC~0}hbANFj5%S&AbI+F#7xLp1|g=yt^#J+>7JUT
zA0)Nwf+i_-mS`5;B?)UqTp{DY7l6e&Ca_XBp+iy52)sm0_l#$XLjGJgq>l?(qzuK;
zjAeHk*n@S;h58rBU=lwgDa&JxOz4rpie*#+75K&4R1y2q<h#37W*WvN#4LKPd*|b(
zg2DTT(q^lK!`%fT49*W@AhrFHp|eFr{gr~GHv=+{oL3t^$%}PG=0EaP2buaaN~HPZ
z$gcwsJQSfW@E`hyAVmT5dZFRxY!I%IVYkbY3BP-6^zmg;gt4}lx)7=!<9c&$gr5xD
zdoq+X-WkDsPbAwDsS`1EvPyz3>hRQ&Fa~0(Y)KJC513geBR$5iGHNmFPsDgQOnhWT
zG{T<ta!wkBa{8BOFq7yDGJ?st*lT^l=z>1?P}#@_R@L+iGNV<v0$H9;MttrS+yHz7
zz{d?S`nGmcDr8pj!gMZdBvE?`V!2^i_W_UAa%JO;LKKw`w6ZZ`b>0(&hBSioG9KoH
zwMIgozDAXPUGTFaW*L07Ip|Y#-^Iu6_LU)gF+&T}SN+_KZI7N2y(fd8Sb0*ZqSEUT
zLO|zjMNnBOBNbVIgIPj7c>oMm4?l}t9$Qlu5g`i$mz-2Y(}itx@`e=l;2W2hCBoJQ
zTOy6q0ZuA>(lKWX(<1@3js-mtkP1*VZ*HJyn{0$NG`T*aOMSG6U!z}tL<dmqjZu#`
z(}%&V;@3~C4cBU}S7F+%<l`l7Z>^51ABzb%FvXT&)x~(O1}IUJNhS2nuME7eC+5xV
zs#7qJ`?C6Z$UYN><lwm=;faiCt!!&xP_`@Pt<D$o`ZQeq*=YYF`2kWp|2>(5db@Xh
zcF$)Tw}aBmo>^|~YzRC_UF&zfG(KL}Z<N2SB5MD(`TC$h*=$=gH@jvr-wj?KoP{3W
zjg3ope*IqKctq%Voe%}`aDgkdP4re!zL~Fv!+d3Z;L9(}+QDW@vxY|sXwTC5%37{d
z29u)PXnXk#4t-RibON{!7F=pBFTN3hNBA&KS&v7>+@EBCSxLOHc{SA+85Z@~>YaB6
zl;Jv`e{vr*FDXsSO(2%AQattEZohuo@0QV9RnR`4Q1G3@-dwtUG@FT|6IQTKYixc$
zZ!7wutavE8BrurS-dwoeO(zMTGOg@_Q2lJEV2>brd?_bCKXg&EuIwGXC7OEmd)YkH
zIM+w#r=ROi9_{0F>q4n4=-0b<4hapH%?mst-5!J8+JP&qUU+(I0I$}af{!pIwKubW
z>7y`#GFALy7opVb1&ajS%$GamX9m^WgwMw!p^U@`QgU<*T$wg638R!-BW->7(M238
z!I<d!rJoPZWEq3~TGx`pn(N%aHu-|)&E5igTVib#vU!ch^xR$c<^e|W*UTUNiYHNB
zOzlNY785lVlLw|W`Blb!PT`zF2~kvFrk{ojHwwoEzn!f{Z^(Ca)Lc$boL{x47vg;U
z!LjqqdN<zkY*a-303nE2-A(>f8&CNOd74RqP)`+ol^W?;sKQu*C(I`FkI%%x@NgkX
zmujEipkbU%qTx(<>qTjKF(g)Yfj>;mx=<LoaFE;d*UJyBj#kNjM00}kFP{oS84BO#
z&q!{%1HVZJwv}<Lj4Krozf*i^a+cdmLBkkgNf06*cozG<)eLO~>*(9Y%F2~XtxKF<
zS9!h<8L~N2BK<LMV!~deMubt))R0{Pw62A%)~PYvvc>m}{k?G9oNMm7U=b7<I|DGl
zua`*8Fw7ghQN?Vgs>_%qwQW0lj+nlqC7bK`ayt7RF$<7G2JqU#d>+mAm2Jt!hqEJ_
z+DA0@AH5DzM3Xz{>*YzkE^Xn*X<HMF<m<?o+A*~FQIS?k6VH5E@_?^TBK`HzNd_gR
zTB&tEqrcyxDWW`Scm$2mNRRB!eao%8!*<@Jmi^w@c2S`Ad74~?XBxdwSQ{5zGvgTr
zQIAN>nrh><>6q-r36~#O?2v{k^SHKvB=}f`f9KM^)FnocZu)JqZ?mIJXnGhjKs9F~
z$t&~850mQf#Gqx%QT79o@bg?(8LhPbwozhw;NClUA-;}MRD8h&g?SnIW`QumS^oqN
z%bJ5AL#aBgJ|RB-9DBzTER5&5ll++JE=)bS=;h%Z=P&0-;F&0rR-}+%Ka8@OUV|qQ
zxm<cI`CrdA=KmlsC3qpeS3vvHa9S*M)Ft*yI>V3sWf3$1tt;iWNWZV*71AhAn{J;n
zlrmr4p`9`0!=4Giap!)+Lgc4vt>ZNff|e@ZKGQLP&OMn2;H{_ak;3g7ut-=p2t89w
zrxok;XG77P(B$^f<fen>T%t|aGLs!0JS!rui6-O;iIfPL(#lJfjaZTXOlw#Blmkfb
zV(jnq-UP4eOCokYmKjM07M^cg5^G|RX6+FI78$S-{ksf1hlaC*14u#}-Z`JldtP4E
zZ#}pD>(Y*)=EXn@0vA@c`yJxK&ildD!N;ZOo62@ed)BbM*H`Y%NY@15Eq7uC*jMRu
zRqG__=4eTfda|rS_%q)Rfi%df?Ln&eh;+mm7G~*|MyP=dU3I~fyos*hHa&ks67jGE
zM$6=HGmKTXGX9!VIN^LmyOrCgSKN1>(NL%)r4v^uA0c384`U76?2I?L%FXA~7g$xA
z6yURB8Svg+iEg@%5?A3&Lvtgo?7osTT_gUgkW1pX;l_gbk(so-l}^RA>2B}Fz;{+t
zL&F`cmE@+Psg=aUJlI?T0B1Q!dPFy6?Oc7JEx~|OWwCRvG7}j|k=<;48E^Ke-eVTu
zG(95uZLe`&uxWh~{?URtnz2Wz8SIB@`n^|e_Dkh%-o6?M2ssWBMM3+YoX~7osThcy
zWqkPk;<uaT^HA(Q4}RRJb3$MP1hiU2Q*+sVa68b)C{*nTrkjJq$aU6jnd7jokM8Mn
z+<Jk;)c(Tpd|VpEV5hH%kFfqMwP2*Vd%&23vLdZCA&tq>p}^nJGQV$$%29aHb4fer
zwp__#!A*vhAS+)}Iv{bYDw^I-*cxh)$DQKJFv2%XX;J6n6-FP_lU@!X<t-NCUP%;d
zcp?@smv^>9jlVAoY)gw@;S<F#U1hS!#6+gc)stMJ)EGCMoFwuijmtu%T1FaEy(H5(
z3b8N6w)#J~%v3q8Slt>cyU-IP=df6=^nrjbjP0&j6L4$!xGzS5QmJe5Bi<8PLZhU~
zwUTW08Q;s+Z~ZimAGw3^dL;I&+KDYgaLF*a%-r=NoZ)113psX{l~=<GlTeR4+WJey
zTaChxzeIIYR_u;w1`^jBz4~UD8W}Q`H_!8?`0TlR!&9_d#2+OF3=3%UX_-55AmQ)f
zIPDS2YcDl*o@)c9Fxq+%i`7L|z{Z8zEQQ%9*Cw*~;{E9qvSC3wTT0uO%0w!h?R?^o
zyH<t(h2260Ct7g@v+nanP;-SvOy=gye6EShRivGZf~V9ac?hcl#ac?Mmx0v=Y9~{Z
zmj+HOwt@aS>8swCs%<)hu7Pgc-YF?d(!||pbu?RyJ8tDdN;=X;m{6aU$@XAFJ#Lqq
zazsqQm<Sin&IDn&X%(X+oGNJ~hl3bz`iaeL^nT10F9~rRV8Ytt^EVCICw~#>>Iaa&
z%hg$uYbZX#8ICmZ0A}(H*>FkLkIM#!;ndCL9;30S9C_%@k(x;rx4Sww-=)2&G7ybS
zacLXw5}fM_AYlBlGdKx3b5gy@0eBLb^%4Ay9Y28&P$clpI8QC>#Y>{pl20)6p=(D+
zy1{52e1{u*Ui6+t0}2JD^xwG&ijNF(=7%exQE1IbS(Cf?knZ%4+)qTu;s1MHegB79
z|3hN^@S@TGLy7hM3se8g<~^A6H(tP56^Vju-YZ=6ghlAgA#v{tRjcmp5!tIzl=85a
zHnw;)lOu7w8iJy&yc0>OqXF!|yz8W<nOklaAS;*BU;i9*rF(A2`gpt{Wc)3tUZwwz
z_geQUybjyo*eJuBAKopChO)W5U+=#E5Uh;P@{RZRof$0SUe6)o!!bh7cIZ6ZlI^T6
zckf4qY~b4_Omia#N$Bg~WoC+MtHuf>(|XV%(0WBxAiUBO;OXllwbgaR=zsj2s`*{J
zKfH(l=JUwjRxlz(#;}JIb@?=_P;eGCp-G`O$}_xlS#-mtJ(ecfM*$A9@F$33A0Ou%
zX0hNZ6Kqf#q^M9e0a#EEKdHPY?0=mjBg0cZIt_V?1G4#>Gj>ARy+N_f*^bpkL@P0`
z;6-Tf>6hBA(kxDN$&E5HRW?{odc1+YHa#mV<Oi3dkaH^Uk`l6&V}y<y=7x-9PA3r7
z#4jYf#-N=Q#;eU)eLBkBZCxA{nPV<W#EE#HUejE>Z6{{wC%mRa!Q_h}?b1xup|v88
zPIiexKva7UM3eiH<i+jy!nmen$tTw$4lEYL(#`h&HTM=!aW&hzXz<|f?vP*&G|*UZ
z3&Dd0cXxLuxJz&g4ncxT2n2U`cXtSy+hp(a@BN4K&N<`VcgKA_7(mZeGHceXs<mp>
z{65^0UZO|~p@a-g9ef?(Ndb6qbk^aVVKFlWk&iHxifyA(C9*!qN<2nfF(U!XKNfn^
zpj?ju-BoJdezP7L_y&iTI;JkwX)vV|1iYUp*GlWq=oWAYHjs|QknwSz4iyZacmi@z
zi5gYku}ahr0((YrP3S_?;6zt<jU`#?DpL$Te(NbQ*x3E6+2}SmbZ=?sTWt>@Jk(iw
zDsfHls**j85+ZqXW^UbtR=1oLqqnWZkuhUa$I^bfrNLA>U*csascA=HhPte$LZ*E|
zWJh6Cz=;;x-nW%mH4j8{E>i4i12y5Zv8$R5*q9xCtRD6Xr#xnq=azzj1-T=#i(!LM
zr7~yZ=ui>18Ao}0?r{*#aO!e{kPu~xBHxkZX2kQipoNF`uJclS!$ic_d1sY1^FH9-
zes}zBxVi$}YyZha8B!>7TOK2c=qD?!RR**z>7zjEzYtm?N3O!*lq)rR>bR*jfFD!!
zF7;5weuGMHkJ?l84a3t*_+j~#*|$Whh94WpWT}5QIW!F>Z#+hPf|^4>e?n^c1Kvh2
zI36evhE}9tK|XUWrn;Lhs>uF|OOnp&0PIVyzCqc)eaT(vM-MlTFU8p_eAg?diD=#5
zXB-sSsg`ExiNLRIUsRsUKn%^p5G3KyBdX@wJ40*p*FBP8PjIV71b)SK;=pI)RsFri
zfkql0PSTj@s{|3aqz?_sMPv`c1|domRJ*D|7o8_pAW?ja@M|7CEL?5>z5RmDeQdIE
zB=4K>0sQND@rb~nfshVbbb!BFs-N$burQIV;E~WWnfO8k0;<G2dKpvw`M#Jz_|%|J
zN~0*<RuqDfbppaN8@zNaqm*;D?sFeU5)EW1p@tX2@o7eTw$u9n&Q!)CDcc#rg7R)h
zx-2;)u=-m8NFekoGS+MhodL!cbSb)_w04o4p+O@t<TzCn1pN%fqaL%<!uL_pX9~_;
zVPg`!+FKYKGl=Y1qC<Wn?X&Iiyfadtv8-hbUyW|lu;&IzbK7|qI7*W)iUT<K)Z@ld
zNx*<DZ863MKSQEnN=I$Qp<;Q)bAgfwU!r54oG{Mf;6b@WHWK}epxyFVhhV@yjtD*=
zP|^@~X2T?lN`TT(kml4vS7!M`5vVh5k}K)O*XrKn)$ialL5gvdCDi&+@YQ7JB$)YU
z3N#oS;Y=f{%1@3mwAW)^d5-5ZCLT>@{S-G=@%!)vh?c&)bwHGU{}o%KE&vn0Vgd%9
zCk8NFI&{|cOE^_$Ct_T5II;>qB%DzwNu#t1T{G>fYc<6GbJUP406_*Kv7C&Yn)Qrf
zk3o~@wWh|}Z1Cq7;xm!(xh7a~%A^3VrsRhU67${($cr1;@N(N|NqZN}{0|4l%h&Q)
zOsI?8VWC`FIjXR$sA0>ytdX7izydj<*FGi2T!}+!9+j4Ele_8VZe_)j#VQZGE*4FK
zW%Du*HTig#bm84|N{*`O=u)`>i98qtwdxP|MwN1x<)gvAju(yY6Pj6F7mw=JA`xaB
zQ+HA2_+M{7^I1$>*6tO%jcAUezFYitA#?3GO%z<a|4ZE*@|u~(qI;`hyeZ#p#<WxM
z(#&L-k)&4k#wtSTeN$`A)={O!B+*`^a-%}<_@kh6v1ZBgg>GQcQB<SV)VqiuDuuzY
z%ifRotD2<EZ6fN6b^EL7UKVD^#Hw43?c=q3lm1h1pT8l?L6*r5R=j`z%cHPP)7?b2
zMg6$g%RR%s{rbfZ*Du$W*QFUVwO<t*DTe_iFNaFnuR5}ZE>FHF-0e9tjJmCk*A~?c
zv@R(JBfF@WO&<VOrHEfAlPHsCy4v#|r8E+xTxD4`IgP)+<FmN>POySN@QVwm2?bYp
zU)TH&mB8Pz=?w=@3->U0t_5}KRes$$>Y!GC_4Vj$U_^KLnmq6Aq&v5*lbbdW&YYKF
z*u++GLD=ML!_49E$8ZwDS?kKu^X9NLZct>EGV-KK=xO&JIDRSLYed$ptYmd!H0>*l
zXOsIx2`-?%5|=J=y71Q0eXeX`_hsA{_D|=_RN08(p~VDI8oC=lK0ajBVq2pg3N$rw
zPd1OfWMjq3C|*QC86%q1p9HF6bhej~7hd)|2RB_yi)-qqR>lS!O(PBO=>r`G>yEj+
zemQoX=draW#!J6I#4pRU{7iaT&Uf?<<qrN!WaLkL`;`TN@<UFmhperq6*@2$R>O5M
zV?}qejelKaVB;gcMJ@jQgi}dA|F^z)W<W?^%Mz!fJJ~zckvK0M&+kd3T~g6raVy&W
zN<sWD2eFD=-RDYEt#73pH%VFSUZ1aBZ%ZGE-zBb9B!qA-{&I@AuvI;bMn*ZrY!;c;
zUe&I<=KN;Ezz;l0$0Q1rhTJZ8j9Seu{#HDnh)H+g?e2ZI2{&0Pdi0IL?hA@RG>7vr
zMtZL6T*uK3WUL8gtciyBN`GExPjd1v3Hnvwrzq*5`b@VzW9j=xWj<Rf3JcjL-!&|+
ztm#1rb<&GkNHvT{hwI0OFPveWQIhQ68hxk;7UVdVCG%~)J}>=ptNUrIHSq1;rYltq
zvAH4I(<3TE`@6!TRM~3^vxupShY${kA+>X%z1n>laob7lql$851P--2#ni2s(0TnD
zbCd59YH)ih+;iL(V-h?<`qiVvlTBs(n4|4j-Dc|`esbRI$I_IHzB@AuVT<e<kxv>%
zA@N@bB!3NF&cAl_e28&A8%*VK6nSg6kP~zy2gfsb6k6YD{u6I1A1-tOozeAr^Um4%
zjrT1;vV9<?!R7-->l-RoXPVjEX8treifQu*C7A6-@At(N^t#MnmUHRJFr6{P=@=Rb
zQ!*Z~y=Jo7?25&V*oSRay-cFSTN-^#22=uxUhQbrf1JnX>LfuYC-6l3ycCK&TTT}w
zx7T#_q52CfGGUJE5peU%qlI>g;x=Cjhf6kAGwYEKWSP}>-#Sz&-Lmmd6Y(4NQhSs&
zPRAoX@8WhcXUNw+h#%n&-s*<EPHyJ2EKKcKqkjDIaZGT!yqCOWXQ*6f*`gLoO<X12
zZn3S9r}T=Ba!fP3I%WvN{Vs2onOP^a!-U2wQtG2$DaY-LX&PD=7JU1Kg7SKDwqA=3
zz6YPNaut)$>i7hgu2slA79x_KqV+5N5xwL;fAaR{ZIq07V;)YJs;aOJVW;sxd?u%E
zh>;neP|%uJUTBaKc{3vev1Pe`JK=aM_ZE(kP~S~ZYQ-N~#$ND93Za$c^C#^Z(gk{5
zdSg4tUud7^6YsY<>u?7?o!8_KA2`^pV%xLUuWd>5eLYa>y2&&1tiMZjTRBH|^9V5R
zK>Fg6bQ6)IV#W5=fa(BvUo}fEEYFw~HT`ZH6_;fYp|RWrn<up8Je=KaoSon`-n0*c
z&>T=cP3#IF(-)>-<F`cD_iMuI3zVov>mE7*)cZ!S8j*MER>kWWpDaT#<!g?U()o`v
zzIj9;y`3rn`GtR%>y*}$<G<FB0MhRs8$QOr8WhGMw%xmJRZ~bbW^HfVrba=q$4dy+
zmfwe}sS+?qN7a}nyuFoLTwL~EaXQ2(Cw~Y;vi<xjw035K;C*@!&Sn;Q?eGFtMTB@M
z`(&_f4D;K%?~)EvO84UyBHw;VqA}u3<DNw5-A+ct1vxOJAvW!esL%xKD*`{uR*2Qk
z*Ki>@>s4yCv;qaiv{hbWG<BLjHj@90qv6YcO$&y5;kV8_9@W2asyt3s#;x4}5HQ-e
zx!T`BIGE!`%#@(eBJl?+oT+D`bippPt@{!PUd$}edl!%fA8)7@6JGqB)Vg+BwN3kh
zd&9A5<=!PoX>Fy!UHgLf<QkKdUGqnt{j@1|(ynX{S=_^ehsJw<HMMGSpvwkMP#C-O
z&tS9QPb$bVV_c=BGDJ#FW~Dt``e4eDYgLgW0Q0@RhhQ*iE}^8sFA;{`LoCU}3{KKt
za>*mZLb$jQT+%z!cvjmURcOO%W3Wt|ZY%MEgiH@DTsOA?9dk0I934|6F+1*3fsYM!
zqrPGSId`i8d*5kKx{VwqJMa_eAJDt%MG-st#|)GV94HwsGuzLmrudA4mmH!>dyk}P
zol-N{#Thj}pHfrE@NoS&*bxv`VWTolw7fBxz0vsLA(uT!OnJJ>G?I}p6|sfVw}6~;
zXtIk`aWuy_e|X5u`IbS)^?Y9M=BVT0@=GTFq6V|o(kHGO`9#_zQNaKNf<EL4MumHo
zhte6G6YCLBJJrXq$)dRYw@mx>YA%%`OCDPH*Jsw8zciR0UEQniFZK%vL+@iS$y=<G
z<QRY>B)Lpki8#Is*>PcfQRS-#6xCR(TcJW4K}n4GqHJ;fYtELQITA@**iDVrC~u2-
z-lDh@8GVK-ZEbN2!=Bqb^(i{zqCGAy|4t$^oTug>I3Z3KExDD;k1&pi8!(5{xiz4A
zsVccx{xz++>-)hiQsjDq+FiVv7%qIRb{|tOyF3<5ESJ{f?T2Fh*&X}hNL&V{@Lg+M
znh;aGTWY7(3sP!ooC>vGpK4Rdhk~Mf>76gw8mZX>l3_oA!EVm#lE3IU8TgAGr+Y7%
z#M3SWwlqYGx+^~R@m@3RL^b^4zw`EUQ>=TwUGUFm?<a_t{~Q+PiCqPZ;qw0>HpibK
zX#bPIGmif^fV}S&B<V~X9BjCmnQiQ>&A|LP4%XHd_Doh_;vG|cdqYc8@W0Gvrgpl_
zdUn>%_J+(d3SwfiqDo4P94s94V4fXt3I8e04m$|I#04M&vH`*D6JR7AFqklyIfR`Z
zj8pz^04^N=1U~uq69X)4|NX{B>^vA*WLjlqw7d#mtL?*5m;Ef4`S5|+#-(tY!YG!3
zEn^I;q$}$Ufw$Q$Y;>9<Lu0MkTX8u~6cm(^cah&1w90T=rOxHbIKuWP*RDI00*`Ox
z2}*)R3m@VAy_q1jTQu+Yms{r;9P$<3C<cqBncRLYko|P!ft;!9auL(*9CjT>aJJ%o
zSRhK^qE<RacOCoUOf}inH0K30JOpWO3tdH)2314BqAKK@VT*W}cyzBGxx1h4A!E^8
zwfOk)h@akdCBuoo<4UaXV>D@7zL`U`UpchdFfBvVWqNZV(9pIWf|n4MCdo4JiKJUi
zKyo!0QlHre5E9zLK%ju}3fD>qADa~m{M4GAxly@I3-v%1ybPV_6)UcFu!Ui;i)avv
zVGKcCbAi6)TO}WogoKaIb>=hx=!XJs_Aa<`#?oC>eFsQlximN;`HgUk`8b9PI0cHR
z3E-FM$I_i)>?c!=X<;>mLzn6wB%fpz!gm*KkneEVNn`jSr|F~J3<3PoHjqS>BddL4
zxqF4*S;f-Xe6I)#haEjEj2@k8g_@-IyqXZm)HJO2jR-!ZUg^Qa@FFsRFmzae*lO53
z@~0jnC(rh6B6b`&(|G49Q{R11)PZ*wvPt3}oI5Z?-BX3zgGFui!gXb*TSu?n-$H3`
z*F{3IXVf`YC<yXtUxrQfs0U;V8@vdDlV=&|>=`wt!vYOKO6~0!7vX-`{-L%NxEdWh
zBCs5ZfRB)-K%6<v^$xK8{W~<6I!e$Mp#*u;0ls4UJz1t?NR<!k+&Mu3zV<7kgeHdu
zo}!B~Y1ua!a;c%nk{vO_>r|H%+vi-qgLds`HVT*+Ku`~4-%dPiPU|Je&*6k5SJ0H_
zl{DSc8*{!O?Ql;L<K!-*Fx?s`SFuPw;p`q;961GXQk^Z2jGtP(E>WW&Tf@2S)N=Bb
zXvIb=<~&$Jhnh7$<i2=$2xMr(56n*X&1J|6AEK)~7L1~hw_Op98SH7B73~V37X^nQ
zybsnQCz%|>n+u$nR1j%x3WNbo;)hld(fY)3PiBKgYZJS;FCdd*+OitL;n_k{&eH6H
zx$z<vNd%YK>iGf~?J?192H@4!u%7zjM>YoR(4i_$a6mZho|96t+)DiR3{#5i+4t{C
z+#C|0R~sc1XEh+Em>_2{Fbp9KzdDVY4lTlqZ!WyG6@#2&a*}qD1INgS*bR37WYOX7
zq3{bz)#sA;E8T%qQwssRhWaG>))mLJ0Jkj))`pUEZlp%}Wc;3pBR{f?BR^^mluw(K
zNM`z0fQT{*dfRT=hRsQvBnFm0)B+8wO>BR%O->>F_o9szYPx#=jTIVaMl&1hqsTZi
zFmjH3Li@pXw0UD-46a(sD%&MxZ1hN09Wgcy9_MFJ3}GX_Hx=iFtZy74!Ru{_+k*`n
zs#v>^F!4jZ5wgfKRwl)Iw46}1b>ScxwQ?G0T08L(XamZI+<_2cK|~BtC5&1nOjQov
z2LGvPHA^S=Yjk{EV@dHI$wRR~(Y?=RQnpfrB9da)F3<&x_SalF*{L`i$!u7DMBpLk
zxFNVdv$T$Ga@fcK3*H^aq`?Aif@&pS5*xC_522~|^&}3VargbW74ZRv3OM=y9&?I9
zS;zBZA!Nv!V6)Qyhgr|iuBb>QBe`s1gDWKG;Hi3~n4%36>LE7#H^}SBz=%HhbRdI)
z7WpQ<?f^+6PVW`^1<FShrj+=4#2|O%<Cu?e5bZRewNH58mB`1VN2Bqj^2mn5zF`yT
z?3+`ru7zo+LvFSY(d!FEb<h|TAo?7UO|8THoM~!;`3dFjExkzUV(%jwZ?%G){xXA~
z5NGv{APKOR1hQhq$EF|xW%o{Km*IFfLAbACH~J-v^iwU+c<cmU(I}R5tj(GkPh|g;
zb>t#e^5phlFEgv%yV;ZVsJ`@82sq(Q>sn{<PIepry7y?(XZ9gsZ?S1wC4CM%{nkXf
zthmwQ-RP%?Jwmc9e%>baN4q=Lv-O`H_Q&0EFd*!yQ3JBM{;2oA4yB1&&-$P|_I(5w
zjUH^RrwSBn)VvR;I*ra(XM?wktw@v_*fzIi_ztAM`EPdo`uNT5#clVLM_GzuowpJi
zBqH4&@?#EgJ|9>NOjT^5-y=zMXlia~XwoXv60?2OgRNuu;f~f2gJ%=!N2`}by_y^W
z2_$KPMk0_~DRY&ZSJb?EuZVkB?0tXw^<s)LY39yo-de}@^QZ5?p321^6=6q}OwN{y
z{&Z$d%#G>X$-?9O#lf|E$h-RLGv<@&k=^-+qMS1>SUAQlIcndrT1@LiO?hkP-Y@#R
zSDRQNoW%YB)tEWLnX33<GINXN@-$H_AExJQvQWjk{Qc}i4S53hOkrx%=AL1S;dWUt
z{Hn5lQ(R;yh)CD;0iL6k%@Hmrvqg;4@@P1PV@Np4xP_j(2Owj%2U!~KRVGLjEy~Dz
ze8enyOLt$&bp7r|&2g~kv+Jy;{Lwc#A@VeF2&9yPq1R5L#Oa?DJuOm6*aHnS_gZ$j
z9dEX7opw87C!3~|-rnmP-|8;P4nAnQcbNuoA`ad3cbYlA@i)vl#eQAMdv4ApEzgP)
zJ?I}NeRq|Cbe|6)$m}eN_z19^ytGMwkUx;kr}X_Itx`K#X|3K&l!C$JGnG~1#oK_g
z85op$UrHpOf68}B7vRi_`hZ{cV}!Kom8^0D`(5b0a6d6)yBZ8la*Yc2cOir8Jv-Q<
zkKDcZ?tv{{T#qeH8klcDm?`G6vRmBSj;EbyEYrBgSInQ44dbUL`O>$UhvJzn<f`CH
z&Y5^=rF|^t=+=X`*{&F*Pd_<#Wr%u-aic(-a}FMTN4u*oPtP@tr_$nA8*BC}sk|&$
z{#JzYUR#bF<j(I<Ol?-rKfGTSho_yRKeJz^j+0s}U-vFb6MMKMbSlwj5V5FDc-L?M
zras$D6!2d2^1W}8BWlgvh3WNIInDbkbv~s#zNy8O{9HE<f9tfB5B3{j^kM6^%+lCj
zWe0xUmK3?GxU#*;v~Mw~*E%~fmV#KUOnK|*4<sG1uMoY#PD^h!y-nZClQfK-=r6KT
zX`9nst$&0>z!kAZFfrpEkL7<T-)XqI9J#P0&xidb7{ixL9N!T&LgGhT0`+5nj9`TA
zRn6x#(hpg^UKRu$arheGce>pBmkY95bgd;F22+}4*<m5=nH>7@qCep%5Zp@zi_34B
zOWjakFV$}K!;82mZPqWMg{*wcnO!;2gHzJC51_?Y2if2sKyVmpYR6|9Uy!3?wWSd|
zIl4NA5Z+CGoxue8uRD9rAFN8ODD$3PWxK?SA=Ra9S@$N@I$llGA#$lyR4$q>f0J`;
z(j-lV8!zYF%-0}I86+ypTFYm!tuvRoi>Sd2IJd<x%B5WM%=PSspIDu^<bWomJz-qP
z++RLg(q^8nKe?Q5D%rp6Y?@r051ZV7i{=bV&m~gs^GH3tSO%$r3p^=CSrMFnVPf&Z
zXdz5K>lBqd`BB9L!Tj>jaXNiylH5%cW40}`QvW5fJl%uvGEvmbEe;{Ou&CupuyKBl
zIG0>w093?sul;ht+RI@N?P=m4qyF0CXW5+zoCPGU^tC%hLggdhKg{%8iO!><dIP-y
z`@U4t`oqQ_!i#V+LlH>rcIYuQPt(=<w`>+tGmx7(Vfb{~*7IkTfpfhF2p$}kn()$W
z9%+wGTf4-|Ad@m7I(9&&CF|;^EQanXc9fjg2(lNLd#aWulBBCBFh`E3@Q#7QXAhku
z2FX}J_d$O8uH{L4ofr56%flm6KZCpErCXYPQ?DQQrtx{;5*Q8QTCKscs}qB6!kgC%
zd35nIr<vqBCqVbJ>_Ru}yS<U@Yn1xq`C3rnk-H54q-TvYlcKlnP=h%pzDQA0<>`@u
z)6gwn9lnQI_p8BUz|^#N=@h3m)6uWW*1JPD`02sL!`sKj&CSb)hZ}b|TDU0cqoo_I
z+WpNlEBJz;7D}^srYo+V`ly{Zo$KG4Zaq)mv}&{!Jb(D&cmm$|FAqWgeuVhH^z`)~
zpq#&-z5X4T63qDUTkU^)u3=?iWB;#FK+;ubW9K<=z%OjG?l+Wb0MPYst|(}UyUn_%
zs1gVYR4p*f09zFHrfTQF+ldBT!d@ohJgH0J^_R^_aNAbVt=yc1-PH2!z4<oEgxf0H
zCF=^)VUTt<TsQa}zwDCVF7f=j8K(|h@20ZTSKtxc>3>hHQYouRI#t2<q4**FylLEr
z^nO1h?c*pHnJ=m0mOm*JWgjM_Pv8q70zbfIvevdtvfT1P03bq7U(d$@Zdfh3ErUbK
z1W(NyV<XZvVXitYHh|&fmVh@RWZ^Kcix0#uzLT)uOHWtyOFe--QG`vI90|H)I=4P6
z$Q3M-36^a11JgaGOQ?N?>;(Wbds9j{yM}`1*fvwd&v5>?CPW`@eN^?9KSzK5l9gY0
zz%D1l=s9G9hJTx;NTQyE@a|%;oQ4*RYlrQLjm8X5zs;fFOeG-r9<Sv`fo_g)sc$bn
z@_Rj#*HC%laqL<c@|+Z1uY`aR;_%XA$$W#t>Wo}WO4m7fh&dTHc@E00Ini@3UhA-{
zNc0v*AVrfzY`k0#z{?fsEhLsQpss65R7;Dd9;Ut~`|f>-^kGdf+?s`1p+`YQ?i?}J
z6pVXzisonG5*+TvamSwGlB(G$G{;EK#M-$&k?9t;Eok&<Y0Z_XCWK;|LzZf+C`%eC
z`p6>1CF6i+t|wR0;6YMnT;$jkBg4uD^ZVzCfdUUE;CZ2Sr%{?%+zf(RCH6#$6kBy7
zQ`rJT)<6&PzDewdY)Px?l22KSv0EBeB*E+%8(X$nO>{0oE2gd!b3J9zu}Z0UWQ+I>
zu0*|OlVX(&Zimdu#8b_$rjP|=qm{v^j13?cRAakymYiB_3LRyui0}o1SML%&sl81S
zvqFi7V&sJDQna4z>9ceO#s$C{NZL#C*^F+B5F6uFFW7#xy?YhN;0yy4G%WD7GwX$u
z#;K@6pz(&tJWb3rmyve#2X(l{R!9s@xxwl-7WV*5tXR60lz=RzIoW+MmOx*sO4s(R
z8o}tA_Xi4O1$?h`&VC%2l8k|&{m3~GH<ik08Mcd+U!d2mnHc<-l7lZkM3R``9Yu2q
z60?BS;N6#pd|f{~ZlQ^J6;iN<;@s%n5?JPAu|jsX*7-5Y6x$EZWj)_X>pHx_blegO
z$36o#Uh(>(V~e>NTFO28<z%wE&-aj+h`a|Qm8(3=gdR7+s+=8><*<wkOGXJz4omUk
zDyCoyy7_!sL*bxwvdp<d8`_M14UL#m`jK*4*AK_5mEBdZf+=VHHl2vNWTG{vu!E6s
zh?6hIWSbJaQlhM>t+|bnXs>phhX(Yd$u~UM_$~XbbKbZQk%fd0nl5IL)TDF6rroJI
z^lZmY!|4imGHEUzRc-Aq%x_*!a?-rf^8WcNiVgQT9F70xr)QiqUbNrDY+V(Jxq?KE
zWSpStt5IHLo~pyS6q_U@#_ykyUm4%LfTPINUiQ4VeF*Ai`gIS*7vsqDQ4Om%w{Q-s
z#Rt`&2R$yJJPfiYO{?W}K_#!gNOCGpjHt(6IRR$3D#xO?mG5KZfv*^&5BMzu?yf%d
zSb;?*%Cf?Zz+Bksx%rAHNAwGwHwb5Y5nmRsgw@`Qc)Y&L{zehCF3`uu{Wixcz#k<9
zM{hZVmrw)(?%Q%Kx=1s{rU1&0YJ)dc(}CIwy3ZO(Toth;@&#*lrj*MIHY}+ZSG>5r
zla}OKMoc?eN5gCv*`m<d1}3?fG%6yDl=y{+u_LIfOuKJ6&E>p#I6z|T9icoQkXlLc
z^yy&nTLb;Q6|nieiWN4Jir%G_Au+FZ9pv<#P-MC_vd2H_)E2^LY1YUk5FZ#JCw8ve
zqD2dz*g%~g_i8yf&X!!o8NVAxiGB%Pg^sv00^uw%iCEl@D3qqvvzg9?v0Lp*vGQdh
zv7xv^@8G1`Q@QUKCBJRsjbQ@h;l=H8YUY@8$(yl3Qc~sJTiq5n`B$@C2V=}@$xeFO
z#IiPDJr1}>ktRQpy>&ZT<dz>>L%*{HAEAZ_dtumrb=MaSjV^HmO-vHoNGUqIZ8`pt
zNUD4nE(V)6uIL2jQq;}sO(Aa=v-_*U)WHJ8de&)!jr_oy(YBF70FlHcEO*C9?a0n;
zOAoE3E-K!26VfX+IDkKkpJR-pxT+)TYck{t*B){1N|;odV4NU(%V`oao;I`P1mKK@
zz(m3|1;{$V+pN)IEhs<S^(A+DLP$4>Va5e8V)Pu#WoKN(^m2E`=cVV3HW#Xc9Uk=B
z{>yHj*k-eHW}B|c{y-3~5<~#0um*>}Nk!DUMNrpEKJ<yeuK}&eo7zl0o+!Q8MXqkn
z?#^N4{zkrot$}A_rjs1P)5_S*a3WeuI67&>)Db99IZI!Hf_FvY)5^19gnMo)3CdqC
zSX?a7ol(eE!e|SOhn-l_b<~)57qf&wZbeIAR;z*9>f3y&+&%cNpwu`%UUt{*1_v*z
zkSg-J+&->a1qR-qJi6I?Bd%!)AoK|bKDf7%OhKOk&3#nVWM?})A1MkR^U>MvdxaKv
zmVk%Z<OO%Fq|Ehs6?7~?xHWpPls(87j4+~KJuNTiX<C|oIowrfeX-&!;i1ULHZE$d
z#*L=Db&@25M8oh*h({HKbkb*H4x^SabS;xp>33zYN!D&-Ik^P(eZ+G+orUd!tgoYG
zTgR<4F?sKTn}Q!;19xo<yAci%uCrx(&jfIe`Zn>ncaQ2{2)h1H?sop$o1OpTXlMVU
zt>)(#XJ9JC|K{!{LUq<|z6Tq8cjIu=TYl!?)0M&bHitH}JGMKY4T$|&6>S6yKm&mn
z#y&8;qiAnsO{O;)y;&8W+tuQEd$G8392Pd&t}jV5Q>?)N1~tH4#wEG-qtcT_{Qely
z`39%8o1f|Nfix;1jKwe{sp^3uRQU3%qO5683)-+MzuUzAe5Z97f!B`gb%lgSh8V*c
zG%ozT>drZf&I>Q3mD7Oc^R~Jy)gSn%i|T1-R5i*tbWtv&Z9aE?Y9&4et>=XTl@(39
zzz$)xK`tDw@2~`g%YkZbEiapiyLiH1Xas&5rX-a()R(L5!GeQg>y$~IHQvNH1|<W`
zG0*5yiC!r&EI1iW0#YG1;|ll3p(WenBu~jgT#c}4$-tn%s-4Ia#RRVr<Hbu{qVsrb
zL*XRFT1&-YO4pnQPvn%@BH22jT%sbuK+Vni*t9F4PUNak!a~DIqbs$Buc2@vvvedr
zmD^aHJ@iM)$e2~B<7xCH?R05asC-PU;1W+~`f@YUmk{tJYeHc9(&GqO`b!tGS8Vkj
zOjkBI%p(;OEAhWKEC`((s9NbP_cBJ?#4Qkj8i4F6uc~)JJh30hR!bKsHdd+X#Nrm5
zCRxavK!f@XqBy7E8xb-dz1N&R=)oDK6BnhO?93msh}5!0an9Qi7+HTPt$EPv1lF1x
zxf=p=IWX1p05>zTTsg=CqcD9Yv8uXARZ@h7o9s?FKe)#kq<cQqNSTmsE07n|d;l86
zucqy#@xKxzAR3jW$N-<Wi?+Eoi_ZO$on3gyASXlY84o2=UL)m-Cd-7KvNQi)SPXxt
zXh^R!tdPB4^;F1CuN<9^%t58pHw+K?osP+CL<&uJn&d7HljdYI|4Y1mAzkNj^GIca
zYW(g`d;E~}y)=`aKP++7C*k3pJ7Co&ktg~Hco5?iOB$nkA}skX(8mQ?8kBm9z!t_g
z<SO7Uh;oN-r@XDlk6YP5&W>&@!?M}HX1)I!1Jjqg9?5cIc}*2f0#Y(rvr<9EH00VY
zYS0(Dop+xRw+Qqv1O&MOqEy4f+Ve{u)*O%TmKu*ZVlojbBkPA-I7{A`<S1;J*eE$g
z5$7>P@*>c%{$f44c6I)F$M(UpB!jQ7{7Xv8`@33mFnVUOTeK!;E!6y`e`y%h>+bSm
zQdO<B#q7P)`^4VX1kr?JC%9TuZe`_k23R$cZ$FN-t`(|OlIEMeq90y6F*^^AFA_cu
zl*1(+-v(J0zp2#sO5tyWgACnSj?$@`)#04W@i|sMn&G#eok=9KaBjgPjlW*E{C35~
zV9sGNBXwD4%^^%rS^^n0Z?uqLb2hR`txVW#!!W$1b{xvK1lEN#JX0&fi1cN6L#XHE
zbuJiJ9lo4rg;}G1n;y|UGOkIa=LPG}&&A(X_fV>MEHT{KqhcrB4}9nKsjOq7_8uj&
z)%gcSf|#yjBlxt+uiVv?qlo}=mO6Lsh5~}nL8T;;93c`h(UHC4YN(|qVhF&iiA~ET
z2%TSzyzjWrOtGlPL@J8!$b&f#;;nm#AMEUIJg#r|&WAbQgs2*P^koZ(^0*IA@WyQL
zekVCNS_A~Cc#<x^)=iP$i<?ErJFi`QFUntNv#++uOD>7l7>!cwtZ#{V`q{ueKkLW5
zL6i#98&5;w8cti@Yft82T6$YV*Gj(Nylzio%I=26txir*MRxzbS5#q;{-ei(@b1hO
z-&KcEIzu;Pe37aTEg?#oQV|z3-fejfL$(LsdR05iXZlYwi)0F%`kEv7=bAtw88HPq
z4C94DiOgBbuSUR?v=#Uf@Ld-Cota!{CQ23=eA(>qF@Jh%JQ<2>G3B;DFN-6@$QP?1
zGyN~K&~H;!_OuhmhH<|!OwZ^(9PRIs?xXfEPnRseVVvfy<9y3)sa<~TZ1)gdx9>qz
zyKj9~ab(cM!z&!9cfg%@coa|`s)co`+Koh4>18pWFWlDpK#qf`<iD4l-<Z`Xq0LT5
z-kCL~zNL68mVNELdsh`L*e<Lapi$PE_8ohdNg9KrP!dStU_HL2$Jv){8pNo0IAj`D
z6R8d>%9@Tw4KQvAa15CWEs(j4*G)y`PJp9ogXI8j3M?ON;>^CI@1HBraq>Wsk1}Eh
zLYVwoppo9{wEi?D`D0`^Pnx3RAlvZP569)R`idz6Mdx;UE%(I4UGc9qE;@OO@!sRy
zzMqi59l}U1r@*hqqz1B^2%OR#qM9k(K1}TyuRewq8WgT|)?wn7a#8t~iK`^3Bsu6S
z3CR6SRd%8&PI22wS(LdpYwX#L-;sgiTOaY<c^Ew{>7ssPJbXMNZKMBCPq<X&I`>OX
zoFyRlBk5?nNv)N9ZIh!~e5c!TJZ&Df?ZB?F&K*I)ERwWt@0I?W8NB_XHI9R=^SjG}
z`Q^mS>Abev^~1?njN7aArpZfcrAPC2sUN1yY}d)e71TK%V~2Dq!}Te28@`dnNpwp~
zEO}7xWF|gooP^4yA<YWtpuD;Ama#_rX*I1l4R<k?qFFM#?_j0FggV6B=|!{iHf`yf
za^UyLnayv?`z8C#Np+l@{r!_?Qc--3u(cQvsY%p&rQKKzwot|M5^RK*!kjoAGeua%
zd*bX=O0wbN)h=0p1EipyIVIF#D?Eg;xJji?6vg_hH1R5L0+(JZYaP7nDx?z+-aTu{
zLrSZQUX_i5eL3GW?Q9*LxI^X{MlnknercQWDt-iRAXq)g^L-Q_B5zGd=r1FC*mqw$
zM&1QnZeQ<>zdSdYY@~b3YkSs{4DW$H=cJ<_{+M|?-TCW<A4Znh^LwP<w8#JTj?n*c
z=)M2ZP0~Lh0{?9b2ux-P`meWuz`^jb^IRyN*D5D~qP<b6oWg$nvE2b9&N|7o^x(n7
zw=ui5G_@O}pWSbHoZgUSHokz6Q)r|;EaDaE#%k*jMtgDi=y~bUg79AXhgplJW|_*j
zQZMa5!9uoNE0xMyIHbqgP@zks%i~`GW=&Fd34smV<<cqj1^(`Rab(gf_(8@|?5)}l
zjb?4AkNf2+YFHa$pXJd_puC{BeC1DwKA)t)xI%aNMnWr<e0_=WCUHwJu{wsA$NPlj
zI~S5(C&x(|?pl;U&02#?xCB=&%r}IYW1WY4H9QdlE<}_tvLS2=2W-exNVGxWLUrsP
zzB+;%J&_QgKwLfs)=p)4th^#;$wKws0M@-;-`^w+_4Hc@x|tCboGiIliU5o&q`;Qy
zQ~^K?oHiO))drVDtR!kM%^7Q-M%t<$oo&G)3k(DBd{hr%1~|CtM<(UsjxSNql9#OW
z8e%B-M;QHDn?zf(5S;A>A2%5UrT##N8h96oiW5{iCY_Q>v~(J~T`|z}RtEeN?Lf`u
z>ck{!7q>6)x^h%dUK)k?Ec8y^$j|9*%G*7gV%nu5lpK2HF}#8}*O#tq(4UBB;U#G1
zO#Qq%e?ZfGx(BhJCdy|A{u-2EQcHzil>LFspzglrvt~*ml))vqCGG^7rZ~KqOcoK?
zBsrSoygTwkQ|wbX+tUWv^vNSb2cD(h4`aOC?|O6ELK*ym`4UeVWVMY2sqkS1`7Nol
zLt4XG@r}W>5nP`E%`C)YT*!L8yEH-Xq&FqdPlDsgNJXkJd{7?nVU+Mdxwa&Ej}w?D
z#_`>}MeT*4j?Wva@>}RoTxk?Ee(z<_g`Zk%NZka#QT@?ZDB<R#Z(po5y0A&C#((G(
z+#Wl`CjIi*<?2O_=_{cOK0%|MfsNUQi;Zmco48Oz!%zVswj<s?=@BbQdlE+Y#&FMi
zDwfn<kVY&;suTwlJZ=ycrUiAI>%}P~!@BeujCm-k03^SbOZX>lFuh9PnxwC$A1-gN
zW^Nk>l`DVAOt^?`5Y_8>fDOOsDfBBzx>(8{4`|l2*gN@r97)M*k)#DS6=T{nd}Z}h
z7_zI;_8xoM9_aK>ygW%6?l}5IdW1cNof{+BA&udzaa<CUv0JfjduE3se1R!DlzfsM
zYP<Ry4VVUg2DELU%Z+ReQ^^Q;r4*YvDIrXEd_&eDFrf<i0c?L+l;ipyV|Sx(r<4Kf
zNu^A5M`|f_mN5J!w3#GT5xQW8OE8K=VL#rujk0~v+g?mneU3O@U*hv3faIFmq|pX7
zZBJEf`it#}w<s0S6UkI^WCbs&*d>{AGc?dks3)mC57h(Lk=&2ehl@EVhttW<&*3u`
zUDxFFJPUOg({iFletZ!71Owhn9HJBz{*okXDz8sUXNoS!U>f5afFK+SSBtU2D^+S@
za-|>{Mljzt;XW~O*>Az##hW(iw=QIPh;m}<*P1J?;*($fL*l|nqN*zW#RYw+xddKF
zo@hGt%&dD9e9eOwKZzmJkd2@NIp~5&ja3rm;pHOyD5j6<h3&AGO|YsWD|)m-Bu?_`
zq-?mIisnovl$JG#KE{xlpiL1cI}}X{Jj$TN-Z2h0s{>(P$V=Dn@KwdXEgLF)mrb2&
zz9X$+tDA)KF0`L6u6LIMRKT6Y3!ACCM;)ch-}v6Q1P`GZeGvcS4w9r=Ery(&+&i=*
z*-~zsE5W0TmM!)*5O$0@nuY|4aPN?DT@K!!>uNtO1>+eS+IRSvd<&|qtb+lxS5E2`
zO8_kUbobzZ<|VKAS?&(%;f5vjw9V2JH*uSkuz*W3pNPiPVBej=Xm-Qb5Gm!PkeCMz
zoqa2d0=xu`bUja2i!D;TCNciH{<8mL0dbRIRW4UN{z@-qkg<^nGvdcWUifeTbyx^W
z`@)@FTlFR&V@Zv%kP(t9RPVwz%|-;*@C@eAc59f55*|GW3(kU;Y-{g_TrOMXm;<3v
zQc7`1rrhvRpGAG1)J5hO6>oR=E3q<N#-lK93*c!#P`bN8om55EEvw$Nk$6FJ%|+jj
z<z;5McgHbOrv@A<m(Lm;PdG|O)O6D=>ilroO7gmCvRcD&Tlfq(-n#?QT~Xz#TUq|&
zGXG~6N1^J=rD9aWYRjnQrO0mPTE*$wN=?w$^kVnPuXV+wbK|{M35-p`$jnG(#Zd+2
zEtPu{OYLx;u8N$~Ew}d@oxz#Qk66@Q9$vSHwgj*WSPOmuVk%bqI7UQ!nwkm1iyUSj
zu7zinlxuhrf>&n{3(oROQ8$zP6C~Fq_7N|yI{K52%cu4;b9jH<U&!A`XRJEH!Z(+v
ze%W($HEv>aF$Uq_vo{en4RQDv&*hUw(TWq$IXUqtli|NC$w-%hQyVtV(&F?#Y&>PZ
zC_Z2)6(gS8A~4`}yn^-coh>(y>U-2Jv3;RCiE@>rL_0spSigX5Y#V@SZW6Zmn4M|o
zuHTe>bgE{6nCn6Fq4ZL}D#m_VF#9|St>A;f^p$7Coh<`uQ)SVDo$XC<?JakPK#Xw6
zTmKbM!lVjMVfO3PM^%6P=9@bcah`3M_jW`50l1-X3iddn>*}Ay>6eZy{m1;e#M8Vj
zY8{PV=OMVywZ(;1H8@zowQ0XmPB^?<bdg&UTdEeH>19);L7yTuphpbeUsT&42h{%D
zE;|lJkER+0iNlOF<uiIe-tHlJ$@_tnhB%1U_evVeP=nRlI)Z)n(+O50?3|>XZ0g;S
z5{6JTEdisdGq_}jG7@h@C1WzEm6LTq86klMUr8AUG}cy$Q7aZVXXf3Nh(h|N+On;z
z`h;8F&)d;KcnniB#j-g_Bh*ifv_9M)JgiT|5h*yHqB+jYM*gg-uMf4RBaXfD?OEks
zsJ+g`!g^3f@#o8Mn@QD;a_^9jGOy!<^<F$ayh6%R!}+mG5#RAsUNnu`fne3c+2$ST
za&z}9dmFf3YnUI1266+zU#5R4)fP4K^fk;^+Mh1cy)45al{Gx%_Y;Eo<Z^Jpu!(Iv
z$_je)3Hr(p48B$ME=VKT%eCzGm5Tl001sLXu=dJSB{^FW7B7fhilyVF4Xx0p;|iVH
z@3&4iJ>6Z$-<J|<w(aS?zu28bRH|Bx^+8)s^rb?7)$o2^_b1VjQcWG2wLc!JGi}L=
zNqF3kIRj(KQp#oziUjkI9bVNno|BWbCj1<mPIouG+XZZ<<oMyl(G7<$O8DgX7E(EH
z%e@{XzkJT74>z%9{yut%UzQk@Gfd<Cd2$SG0dzQFZkD*9`%n&F;f)l%LdM;?AV~4+
zc=JwnZ+%98?2eQGNf|QDEf1r1GoR#Wt84~>5YNGV@w-IUl>5j2+&}`v+r^A=RujdQ
zheY+DV~NIr2N?4k3Ld@s@DZZEss-JBO^g1JfFlfgZQZI38CX=5RyQ-A3x&pjz|{#k
zxVfVta>BJQITDGtAsGar#4NDH<b1ipNjU{OA6G44mIVlU(gZrS3io^;4|R(K2R%Jo
zx|JHci5BX;%B;G@g}P$`SxFTS1V|0~m#)6ALj>a%|GbyVK1DfS_j?<dt0ecGbH(2N
z^2_DcY{BI+C+YO?R3^W|kkF!$=!+>$;yDuianqoPu9k^L=3#k=;)-6Pj^fUV$lZ~;
z<6Y1sThLz7VEpxjc8@zi2^{(GfhC&B!MeZfFc16N=LOhiHxpisDu2vf^Mk-Srv*u%
z<vC_yz-&vv&ltQ5Fe&TSp*c}zLZaS%$}GUc+}iUtFkip^?(`NzHDk&G+*u#$#XOIF
zBB2jx;z=zUhAE*{R-$VUus87;x}#|O=}<dS{7+}^RLtg;*OmGSozaU?C=EO=VHLz&
zk%7zYz!%o;(Q!PyBQt4&&`}lm$xybWbC_B(qc9rqQI@FUxG8>1Fzr?3Z*w=+Y;)8;
zI(yLGIKWE{VbG3&yz1W8iPIfLPT|k3SjU}eGf|;GGVPS6Sk>9$9uL;eDW~c;1tyZR
zx0kRHDNL?!7I*H<H+x_2PX-T$_2VX`avp1Gtm=ASZ_VCLQWIUext76CG;N(oB$K1w
zLnTQ=H*tP%N@8AA=H<G=xhfV6(my81b4QvgizOi%93sP98)l7{Cvbq4jJy~6npDm1
zlue>gw%jyCiuW+9eiYLz;DpT9@do0~@Y4Gs0O9ue^U^b<a*ltXhW*8A$?=rp|I!Qe
zfAMB;JjV_LumJv>lfV(m^HvKSSRT_VY2t(uYMS)Bqe<^l^0jy(L&*ve1@r5hLY?W=
z;;Ux7-tpH2bCxCK5O(+sqJwf*Pl(iqmkd{LqPNJgYU=2kqn4_-G2cjG&bX7`N5*Nl
zv;`9$fBEKF*uv#MF|4yq%|4Y|Mq&s!)hAlN2+RJo?2^gn%e_~iovSKP1wHmLmQElW
zo|Y;<OHKg2lWGv{#w<p3px?fxtDRTz8{;qpV<;k{bV9QJ=RLl-Jh6dPEfeE1{C8;|
z4C~_(s^3-z7@UsscUo>YRDY4%&@%L4vyMJBmP9cT-A*@(A0Z;5r<QlZnlL%zA5^DJ
z;kq_$F4&R}MN~RNp`q%05sn3^O`PTx1u>A@72rED!^Qyjm4fLj%j7=eYf3>@db2j(
zYYsMJPm`&EbzZyB`2lSa8G6Yzdb^ZnF0HWq5#+DE1Q}534pPL<XkAQ>&@*^o6}u-E
zOM$r|_9fL5>)})v$!=+}>^4P|CzMGs5Q=-Sa|X!$5M^ASN!D-MK4<)-vhj1{HMBA+
zg@5-6KTVwErno9HCKx1{Lx0AiShINsFbQ1{AS_u`(-A4?$@K}y4kHpIk&cBWrgW~J
zN~0MnBe-)Zdbs5XP;yl9Z5nlsq9`7_l8hCsJRiCuWb&yIvf((nMgHjZ-sv#o+HlZJ
z`DiXBDHavg7<Iet6+{$~Sg$#rx=yN8DF}%W#q5*Y*JkezON(Aw3rW)|(<+;ThnG3c
zKdb9o8t9g^W6sw~8ntBca$N;-L<rrvnp(Z<?y19tf34nQ4=_*(=6%XUf#mDmBK_K6
zd0nx0bKV2P^J2dC0N#M-DqNUS@GBIO##&eQVKzDxE-+H%rA=Igbr7<~W918w(!nn6
zmE&+Q)ilnM=0Zz5YsAZUm$#_*FPg;q#7Yy2j3z70Ow=JRXG)AUCwIQ(YT2rD_c@|B
z%XO!Fz8RDh$~1UmLse0E+<;dboV2m?W+OVq{6wN_Kq_2-_`!NJxHGBhr(GRgQeA(i
z>1VwDnN0fLMvsLvJ55JJAWG_42x(u2v;Es&nAR92CF(_m_KEt_H7(_~?<?O=TWa<c
zm#5a4xR>{3S>+wV4IrE67Jq9}mtM=9%4rSIn+(rK30)h1T^i&vt~f}iJ{h6v%QGq4
zx4Y@IAv~`~-xpb}Z@NN6keF)LG#MD4uI9VZQ(p4ull%CgL&;s)zvMFGOEe|kRK10>
zhyUQIi-7VpC(lN6yNS;-^p!z4KLnx7(Kx4$9>OjvfE+~8dysd^6af8;8P3=A#pn@C
zbCTW0*;nNIy!I%@?v7lw+LOH52&47v)ePH?Wfx{ZL2t-y@!ie?A_uI(%=0<!8KA?n
zIqv^wfDRnbf=W1kQ{ys=7}`60cnXRD^NFdcga2}}fG=n=E15c27}D7T04&;8c1Az|
z7nr)&&d|b8*WQo}%nNL2PycUI>A%eJJ0?Ze(ZRyh%Fv!!*xC`yY7AhO*0pya`>g_)
zdDztMuP^^9;$Nq(gupdCu@y5*7+N?PI+*I~G74E+82lsJ<@W_qD}8GNQ!8U;6;mrg
zD|^$wzAHNFIXqD%KPdtDSJ}V0l>V`S_gCRy&FoAK?fy4P{pTx5aFotph5n`S|4y;b
zI*Rit&gS2i%fHOZ!u;0M08G&QbeZfoqc52L_#a<>udrmleUR)o`iKJA@0cO7-^be&
z$bPTLWWRSd|8|P(N&dI3&i|*%S^rV@KkE7IN&gmP^E=Z&iuo%>=`XGSne!i1*JS?~
zH~*gZsX70aS6J6U*TUME`9FM$?4N%7M2G#(+Q5+cy}jXoT>H(DZ4dU~CnNl;|2hBV
zTwu;@14n&BJ37<fblI#-EKFQv8gzQDWER%Wy2hr4O#0TA8uawc;G#uz9SrG2xLH{M
z>;M)P5C8z+VB>hr!b;1+LQBsqY-gzJU}|mkU#9w(4lZ_vMhM`+#fHH0*N2P)2#!`F
zGa~z^jEn7wwfgBpX7x`Q8;I?RB>QhN04v)QWA@)<Ps}RdR{mYa$@#>I{dXC-HDE{h
zn+!a(S^ku<ae=u0)P<FUl?!ayzvX3PXL|}p`<o2><%t*k4;kQz)A<h>E9g(1Sy<Sg
zIKKZ#2Yi}3{*ZC9{HY%c3)d5E_aEs%Tz}e+1ps)WA^&?iFuU}#dI9X<p7=8z@QG6V
zkGve5&*}wmJyE3pkq-3S24K@a(}k7wiSGRGd0E+>{QeIa@VO0GIi48I|47Hl_00BQ
z(?6@1jpexw*Z`nswr6|pr{JTe&uzfQ@!SvCIDyaX0(Q1%y0Ei6w*fogxgW5zJ+}cn
z`*Rzx1E2c=JLeM*{oifH&h<1y{viWBw*e6F%n!h0kn5SPxHvhV`4t!FnT!ntZrq>s
zf&kBK0APJS&cSX9_)}-_lm+_JhX7n`Tz}TV$_jWk=YZYsS-*kZiv7>=#>xSn5dP4a
z6~xK*r%hQwpl5AkV+B0Zg^eA^`ez+%U{n3+FKnEk=W`v175F?afa6(S5GU84<AV)6
zMLd^*{=IDucDkk(hIR<x#a_YM+JWq;|G-PKqzKsuULzwGeItFKt{$r%7ZAw7#mS}*
zGGu4b*8>3zISkoY_<8kpfj|QeBX&-919mn}eO3-V7ND+?E_h@C^$qm(+4(h@C9RCC
o$$qa>3e1Y8Zie860=#zEJLuXu{9ZZ0GZ6<10yVX$tQf-o0*&%>d;kCd

diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
deleted file mode 100644
index 799a9875f7..0000000000
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
+++ /dev/null
@@ -1,5280 +0,0 @@
-:020000040000FA
-:10000000C0070000D1060000D1000000B1060000CA
-:1000100000000000000000000000000000000000E0
-:100020000000000000000000000000005107000078
-:100030000000000000000000DB000000E500000000
-:10004000EF000000F9000000030100000D010000B6
-:1000500017010000210100002B0100003501000004
-:100060003F01000049010000530100005D01000054
-:1000700067010000710100007B01000085010000A4
-:100080008F01000099010000A3010000AD010000F4
-:10009000B7010000C1010000CB010000D501000044
-:1000A000DF010000E9010000F3010000FD01000094
-:1000B00007020000110200001B02000025020000E0
-:1000C0001FB5C046C04600F0EFFA04B00FB41FBD24
-:1000D00008205A49096809580847382057490968CB
-:1000E000095808473C2055490968095808474020E5
-:1000F0005249096809580847442050490968095875
-:10010000084748204D490968095808474C204B4981
-:10011000096809580847502048490968095808479C
-:100120005420464909680958084758204349096836
-:10013000095808475C204149096809580847602068
-:100140003E4909680958084764203C49096809582C
-:100150000847682039490968095808476C20374919
-:100160000968095808477020344909680958084740
-:100170007420324909680958084778202F490968CE
-:10018000095808477C202D490968095808478020EC
-:100190002A490968095808478420284909680958E4
-:1001A0000847882025490968095808478C202349B1
-:1001B00009680958084790202049096809580847E4
-:1001C00094201E4909680958084798201B49096866
-:1001D000095808479C201949096809580847A02070
-:1001E0001649096809580847A4201449096809589C
-:1001F0000847A8201149096809580847AC200F4949
-:10020000096809580847B0200C4909680958084787
-:10021000B4200A49096809580847B82007490968FD
-:1002200009580847BC2005490968095808470000D3
-:1002300003480449024A034B7047000000000020B5
-:10024000C0070000C00700000122D84B5A6000BF61
-:10025000D74A1268002AFBD0016000BFD44A126856
-:10026000002AFBD00022D14B5A6000BFD04A12684E
-:10027000002AFBD07047F0B505460E46174600240D
-:1002800006E0A200B158A2005019FFF7DDFF641C80
-:10029000BC42F6D30020F0BD0120C043C549086030
-:1002A000401048607047014601229204086890425D
-:1002B00001D9102070470020FCE7F0B505460C4638
-:1002C0001646002706E028462168FFF7BDFF2D1DD2
-:1002D000241D7F1CB742F6D3F0BD70B505460C4611
-:1002E0002E460BE0304600F075F9FF2C01D80024B3
-:1002F00001E0FF3C013C012080023618002CF1D1C6
-:1003000070BD0146012292044868904201D909203B
-:100310007047A9484069401C01D10F20F8E7002030
-:10032000F6E7FEB504462068030000F037FA05043E
-:100330002B4249598B00201DFFF7E3FF0546002D96
-:1003400001D02846FEBDFFF7A7FF0120C00200F044
-:1003500041F9042221469948FFF78DFF002801D07A
-:100360000320EFE708222146944800F06DF90028A9
-:1003700006D1002192480068FFF766FF00F00CF9F3
-:100380000320DFE7A768E6686068019031463846D9
-:10039000FFF7A3FF324638460199FFF78EFFB20000
-:1003A0003846019900F050F9002800D1CAE703202F
-:1003B000C8E700F0E3F9834800688349086041E03A
-:1003C00060680190E668A0680090B200009901980A
-:1003D00000F03AF90746002F00D1B3E70E20B1E74D
-:1003E000201DFFF760FF0546002D01D02846A9E734
-:1003F0006068002807D1FFF74FFF0320800200F05C
-:10040000E9F800F0C9F8FFF747FF0120C00200F04B
-:10041000E1F8042221466948FFF72DFF002801D0AA
-:1004200003208FE708222146644800F00DF90028D8
-:1004300006D1002162480068FFF706FF00F0ACF823
-:1004400003207FE700BF00207CE770B505460C461F
-:10045000182D04D12068FFF764FF206002E001201E
-:10046000206000BF00BF70BDF0B589B05248406940
-:1004700003905248806881000398081802900398FE
-:10048000000B01900121090302984018401E000B47
-:1004900000900124002520462946019A00F0C4F866
-:1004A0000022401E91410791069001260027304608
-:1004B0003946009A00F0B8F80022401E914105919B
-:1004C0000490049BDB43059AD2430698184307998E
-:1004D00011430791069037490698086007984860CD
-:1004E00009B0F0BD70B53448446934488568466841
-:1004F000AA003146204600F0A7F8002801D00020CD
-:1005000070BD0120FCE72D484068002801D0012083
-:1005100000E000200546FFF7E5FF002807D0FFF7C1
-:10052000BBFE0320800200F055F800F035F8FFF71D
-:100530009BFF002D0ED020484669204884684768FC
-:1005400021463046FFF7C9FE224639463046FFF7BE
-:10055000B4FE00BF00F020F810B5184844681A48EF
-:100560000460204600F0DCF810BD15480068006803
-:10057000401C01D100BFFEE710480068002802D0EF
-:10058000042806D101E0FFF7BEFFFFF7E5FF00BF3B
-:10059000FEE700BF00BFFEE7BFF34F8F0B480C49DB
-:1005A000C860BFF34F8F00BFFEE7000000E50140C9
-:1005B00000E40140000600400010001000080000A8
-:1005C000B8070000BC070000000000200400FA0586
-:1005D00000ED00E010B50146104B1A6808460223F2
-:1005E0000F4C636000BF0F4B1B68002BFBD0531CEC
-:1005F00004D0904202D20A4B186101E0084B986087
-:1006000000BF084B1B68002BFBD00023044C636029
-:1006100000BF044B1B68002BFBD010BD0010001066
-:1006200000E5014000E4014010B5202A04DB01464A
-:10063000203A9140002010BD914020239C1A03468F
-:10064000E3401943904010BD034610B50B439B0790
-:100650000FD1042A0DD308C810C9121FA342F8D025
-:1006600018BA21BA884201D9012010BD0020C04328
-:1006700010BD002A03D0D30703D0521C07E000208E
-:1006800010BD03780C78401C491C1B1B07D1037854
-:100690000C78401C491C1B1B01D1921EF1D118463D
-:1006A00010BD70477047704710B500F007F810BDD7
-:1006B000014B1B68DB6818470000002019481A49E5
-:1006C0007047FFF7FBFFFFF7FBFC00BD20BFFDE716
-:1006D0001649174C24688C420BD1164B1B68994263
-:1006E0000CD1154B154A1360186810498842EDD09B
-:1006F0000AE0134880F30888124B18470F4A13602A
-:1007000018680A498842E1D080F308880E49884277
-:1007100004DD0E48026802210A4302605B68184744
-:100720000346DFE7C0070000C0070000FFFFFFFF30
-:10073000000C000014100010001000000000002049
-:10074000000400206B05000000200020240500406C
-:100750000D48704502D1EFF3098101E0EFF3088104
-:10076000886902380078182802D1C046074A104725
-:10077000074A12682C3212681047000000B5054B7A
-:10078000054A9B58984700BDFDFFFFFF4B04000042
-:1007900000000020001000000400000030B4744687
-:1007A000641E2578641CAB4204D3635D5B00E318D0
-:1007B00030BC18471D46F8E7000C00000010000090
-:10100000881D0020E14F0100993D0000474F01007D
-:1010100000000000000000000000000000000000D0
-:10102000000000000000000000000000515001001E
-:101030000000000000000000993D0000993D000004
-:10104000BD500100C3500100993D0000993D0000D2
-:10105000993D0000993D0000993D0000993D000038
-:10106000C9500100993D0000993D0000CF5001009A
-:10107000993D0000D5500100DB500100E150010016
-:10108000993D0000993D0000993D0000993D000008
-:10109000993D0000993D0000993D0000993D0000F8
-:1010A000E7500100ED500100993D0000993D00001E
-:1010B000993D0000993D0000993D0000993D0000D8
-:1010C00000F002F813F06DFF0CA030C808382418A7
-:1010D0002D18A246671EAB4654465D46AC4201D170
-:1010E00013F05FFF7E460F3E0FCCB646012633421B
-:1010F00000D0FB1AA246AB4633431847AC40010070
-:10110000DC400100103A02D378C878C1FAD85207FF
-:1011100001D330C830C101D504680C6070470000AD
-:101120000023002400250026103A01D378C1FBD803
-:10113000520700D330C100D50B6070471FB5C046C1
-:10114000C04613F0CFFE04B00FB41FBD8269024940
-:1011500081610248104470476111000001000000E5
-:1011600001B41EB400B510F0E7FB01B40198864647
-:1011700001BC01B01EBD0000F0B4404649465246D5
-:101180005B460FB402A0013001B50648004700BF1E
-:1011900001BC86460FBC8046894692469B46F0BC01
-:1011A00070470000C1100000401E00BF00BF00BF1C
-:1011B00000BF00BF00BF00BF00BF00BF00BF00BF37
-:1011C00000BFF1D17047000070B505460C461646C9
-:1011D00002E00FCC0FC5103E102EFAD2082E02D31B
-:1011E00003CC03C5083E042E07D301CC01C5361F2E
-:1011F00003E021782970641C6D1C761EF9D270BD45
-:101200008307FF22DB0E9A408907090E99400028C8
-:101210000BDA0007000F0838830828489B001B18CA
-:10122000D86990430843D8617047830824489B00DD
-:101230001B181868904308431860704710B504469F
-:1012400000210120FFF7DCFF00211820FFF7D8FF65
-:1012500000210B20FFF7D4FF02211920FFF7D0FF58
-:1012600002210D20FFF7CCFF02210E20FFF7C8FF5F
-:1012700002210F20FFF7C4FF0221C81FFFF7C0FFA4
-:1012800003211620FFF7BCFF03211520FFF7B8FF4D
-:10129000204600F019F8002010BD5A210180704747
-:1012A00010B500F03AF810BD0648704710B500F0D0
-:1012B00035F810BD704770477047000000ED00E042
-:1012C00000E400E003F900C330B50446374D95B0A3
-:1012D00007202870A81CFFF7E0FF5920A880344899
-:1012E00001F01CFC0546072000F0DCF929462F48D8
-:1012F00000F08CFA641E072C0AD830216846017071
-:10130000847001F0E0FA002802D009A800F0DDFCAA
-:10131000284601F083FE15B030BD7047F8B5234E66
-:101320000446B61E307801270D46002807D0204617
-:1013300060380B2808D8204601F09AFB2BE0602C7F
-:10134000F9D01C480860F8BD20466C38032803D843
-:10135000204601F0CFFB1EE0204670381F2803D83E
-:10136000204600F037F816E0204690380F2803D8C2
-:10137000204600F0BBF80EE02046A0380F2803D826
-:10138000204600F023F906E02046B0380F2804D8A4
-:10139000204600F000F9286000E02F60602CD2D1D8
-:1013A00028680028CFD13770F8BD00001A0000204F
-:1013B000C533000001300000704770477047704728
-:1013C000704770477047704710B5012801D100F091
-:1013D00042FA10BD10B57038030013F09FFE150CD3
-:1013E00012161E22252C33383D41454950555C6468
-:1013F0006C747B8085004A680878114603F093FF7F
-:1014000010BD086803F0F7FF10BD0C790B7B8A68EC
-:101410000868214603F0FFFF10BD086804F075F866
-:1014200010BD03F03DFC10BD08884A6880B211462B
-:1014300004F03AFA10BD0A790888114680B204F027
-:1014400086FA10BD087840B204F091FA10BD088801
-:1014500080B204F0ADFA10BD086804F0BCFA10BD0B
-:10146000086804F0CFFA10BD086804F0F8FA10BD5F
-:10147000088982B209C9194604F020FB10BD05C9CC
-:10148000114604F074FB10BD08884A6880B211460A
-:1014900004F08DFB10BD0B7908888A6880B219466C
-:1014A00004F0E1FB10BD0B7908888A6880B2194608
-:1014B00004F09AFC10BD08884B688A6880B219460F
-:1014C00004F0D8FC10BD08884A6880B2114604F0C8
-:1014D00023FD10BD088880B204F042FD10BD0888CD
-:1014E00080B204F062FD10BD012010BD10B590382F
-:1014F000030013F013FE09060F161D242C363F4679
-:101500004E0088888A6883B20888194680B205F040
-:101510007DF910BD08884A6880B2114605F0D3F9FC
-:1015200010BD08884A6880B2114605F017FA10BD50
-:1015300008884A6880B2114605F04DFA10BD088847
-:101540004B688A6880B2194605F07EFA10BD08899A
-:1015500082B2888883B20888194680B205F0B3FA4F
-:1015600010BD08894B6882B20888194680B205F020
-:10157000E8FA10BD08884A6880B2114605F018FBE9
-:1015800010BD888882B20888114680B205F0ACFB95
-:1015900010BD012010BD10B5B02805D0B12808D06D
-:1015A000B2280BD0012010BD088880B205F08AFE59
-:1015B00010BD088880B205F0B5FE10BD08884B68E4
-:1015C0008A6880B2194605F0BEFE10BD10B5A0387D
-:1015D000030013F0A3FD0B070E172028323C434DE8
-:1015E000545D65004B6808788A68194607F0EFF982
-:1015F00010BD88888A6883B20888194680B207F0CF
-:10160000FBF910BD08884C68CB688A6880B2214617
-:1016100007F002FA10BD08884B688A6880B2194644
-:1016200007F01CFA10BD8888CB6884B208888A68E5
-:1016300080B2214607F03CFA10BD8888CB6884B29E
-:1016400008888A6880B2214607F05CFA10BD0888D5
-:101650004A6880B2114607F090FA10BD088982B23C
-:10166000888883B20888194680B207F090FA10BDC6
-:1016700008884A6880B2114607F0ADFA10BD0889A3
-:101680004B6882B20888194680B207F02AFB10BD69
-:1016900008884B688A6880B2194607F0E7FB10BDDE
-:1016A000012010BD10B507F0CEFC0FF05FFF00F079
-:1016B00007F810F0ADF808F0C9F908F055F910BDB9
-:1016C00001202B49C00308602A490020087003202C
-:1016D0002949800288607047F8B5264D044628786D
-:1016E000A04207D0002C05D0002803D023A14D2014
-:1016F00013F023FC2878A04213D02C70032500237C
-:101700002349AD021C48002C27D01B4A214E4032F1
-:10171000214F012C06D0022C13D018A16E2013F0FB
-:101720000CFCF8BD0B6002230B604E6185601B4909
-:1017300011625762091D91621749091DD162456006
-:10174000F8BD0B6003230B604E610121C90281606B
-:10175000134B9362D7624160F8BD0B600B608560EC
-:10176000F8BD10B505A1772013F0E7FB10BD000010
-:1017700080E100E02000002000F501407372635C0E
-:1017800068616C5F63636D5F6161722E630000006E
-:1017900000F500407C01002000F0004000110040F6
-:1017A000488100401CB50446002069460870204668
-:1017B00009F0CAF86946204608F088FF002803D1DE
-:1017C000FBA1B62013F0B9FB01A9204608F0DDFE0D
-:1017D000002803D1F6A1BB2013F0AFFB68460078C8
-:1017E0001CBD70B5F74D002428462C76203084713E
-:1017F000C47113F0A1FC2846403804702030847373
-:10180000847484762C74AC7070BDEAE710B50C4615
-:10181000ED4982888A8042884A80007808700846AC
-:101820000A38847008F087FEFFF7DBFF20460AF0D5
-:10183000EFF9E44AE0321146383908461446813857
-:1018400009F0F0F82146E0480BF084FC09F073F849
-:1018500013F072FC10BD10B50120FFF7ADFD10BDF7
-:10186000F8B509F049FDD84DD64C0A3D022802D002
-:10187000207C00287CD0207E0026102819D1A0785A
-:10188000002803D0CAA1D14813F057FBCD48E8384F
-:10189000817A89070DD50146267160398989E180F1
-:1018A000C17A217281896181C089A0810120A070E3
-:1018B0002676C44F203FB87C002859D1C4486946D9
-:1018C000808908F003FF002805D069466878097808
-:1018D0004018687004E0BD48B5A11D3013F02DFB21
-:1018E000207C002838D0BA488189FF300930406D0B
-:1018F0008089814204D0B548ADA1223013F01DFB90
-:10190000B348808908F088FF002804D1AF48A8A117
-:10191000283013F012FB08F0F6FF00281CD0AC486A
-:101920008089FFF73FFF697840186870A548403804
-:10193000416D20318A7C012A0DD1A54A3E779289DA
-:10194000C287C87C20700120B876207E102801D084
-:10195000282800D1267626746978002908D09C486A
-:101960008289FF300930C28601870120B8746E7009
-:1019700009F092FC002805D1207C002802D0A8782C
-:1019800001F0F0F8F8BDF8B50F460446FFF768FF20
-:101990008C4D403D28788B4E002813D0002F10D15D
-:1019A000307E002804D0FF2081A1C63013F0C5FA94
-:1019B0002C22A91C204613F024F90E2020700020B0
-:1019C00028708FE07F4D203DA87B002818D0002F85
-:1019D000F7D1307E102808D0282806D0002804D05F
-:1019E000FF2073A1D23013F0A8FA0120E070E87B49
-:1019F000A070287C60700F2020700020A87371E018
-:101A00000121204608F0B8FF002807D0307C0028CC
-:101A100051D13946204608F0AFFFF8BDA97C69488E
-:101A20000C38009068480A38002913D0017805293D
-:101A300010D2002F56D1491C0170002666700D206F
-:101A40002070012028750622A01C009913F0D9F8F7
-:101A5000AE7447E05C4800210A380170B078002875
-:101A600014D0002F3ED1307E002803D050A1594819
-:101A700013F063FA002565700120524920700A2294
-:101A8000091DA01C13F0BDF8B5702BE039462046A7
-:101A90000BF0CAFA002825D1A87C002805D0002F19
-:101AA00020D149480A380178C5E7A87E002802D02D
-:101AB000307C002801D00020F8BD002F12D1307EEC
-:101AC000002804D08F203AA1800013F036FA0026B7
-:101AD00066700A203B4920700622091FA01C13F0E3
-:101AE00090F8AE760120F8BD10B53648017E002989
-:101AF00008D1007C012805D001210020FFF743FF19
-:101B0000002801D0072010BD012010BD10B5012410
-:101B10000AF0C6F80443FFF7E7FF044308F00CFFA0
-:101B200001462143084610BDF8B51D4614460E4631
-:101B300008F04BFD002807D0684608F051FD00284A
-:101B400003D0002C07D101E00120F8BD9B2018A193
-:101B5000800013F0F2F908F0EFFCA04204D21D4817
-:101B600013A1583013F0E9F9009808F05DF93146F7
-:101B7000009808F06BF9E2B22946009808F022FBC1
-:101B800008F040FD002804D19F2009A1800013F037
-:101B9000D4F908F0D3FE0E4800244030417C0029DF
-:101BA00002D044740AF067F90948C480CCE7000009
-:101BB0007372635C6C6C5F6374726C2E73302E6333
-:101BC00000000000200300202C00002084060000FC
-:101BD000D80100201502000010B50179002908D0B5
-:101BE00001290BD0FF20FE49043013F0A6F9002094
-:101BF00010BD831D42880488022103E042880488C6
-:101C0000831D01212046FFF78FFF10BDF8B51F4649
-:101C100015460E46044609F06FFB022803D0F14832
-:101C2000007C00281FD0F0488089208008F0F4FD57
-:101C3000002803D1EA49ED4813F07FF905246846EE
-:101C400008F0F5FD00280ED0009808F037F9307044
-:101C5000022809D0012807D008F029FE641E2406B6
-:101C6000240EECD10020F8BD3946009808F0C2FAE5
-:101C70002880002804D1AF20D949800013F05DF9F5
-:101C800008F015FE002804D1D848D549193013F0C2
-:101C900054F90120F8BD38B50446831D821C6946FD
-:101CA000FFF7B4FF00280DD000206071684600786F
-:101CB000012808D0022806D0FF20C949253013F09A
-:101CC0003CF9012038BD2071FBE700215BE670B5CF
-:101CD000C44C0546403C2078002803D1C148007E12
-:101CE000002803D0BE49C24813F027F9287808F02D
-:101CF00054FF28780BF079FB0020207101206071DF
-:101D00003921E170207070BD70B5B64D0446403D7C
-:101D10002878002803D1B348007E002804D0B448B6
-:101D2000AF49183813F009F9AF4E2188B0898842BD
-:101D300003D109F0E1FA022807D00220287101201E
-:101D400068713821E970287070BD7F207076A648D0
-:101D5000E17820304174A17801740020EEE710B5DD
-:101D6000A04C403C207800280BD19E48007E0028E3
-:101D700007D109F0C1FA032803D009F0C1FA0328FA
-:101D800004D19A489649653013F0D7F89549002058
-:101D90002031C8712071012060713A21E1702070FA
-:101DA00010BD70B58F4C0646403C207800280BD102
-:101DB0008C48007E002807D109F09EFA032803D042
-:101DC00009F09EFA032804D1884885497B3013F036
-:101DD000B4F8844D2035E87908280CD2E87910222F
-:101DE000000100196830314600F029FEE879401CF6
-:101DF000E871002000E007202071012060713B2184
-:101E0000E170207070BDF8B5764D0446403D2878ED
-:101E1000002803D17348007E002804D0B720704901
-:101E2000C00013F08AF8704F2188B889884203D126
-:101E300009F062FA022801D0022022E03E8C648878
-:101E40007200788CF98B521C944217D3694A514323
-:101E50009200504312F04FFF401EFF2180B2F53137
-:101E6000884200D90846844200D22046711C401C9A
-:101E700012F041FF761C7043401E86B2FE85EE8054
-:101E800000202871012068713C21E9702870F8BD9C
-:101E9000F8B5544C0546403C2078002803D1514801
-:101EA000007E002804D052484D497E3813F045F892
-:101EB000A878002801D0012804D1A888FF21F53195
-:101EC000884204D94A484649783813F036F8464ED5
-:101ED0002988B089884203D109F00EFA022807D078
-:101EE00002202071012060713621E1702070F8BD60
-:101EF0003D48002720308772A988B18501213176BD
-:101F0000A978012900D00021817237484030407CF7
-:101F1000002801D009F0AFFF2771E3E770B5314C1D
-:101F20000546403C2078002807D12E48007E002836
-:101F300003D109F0E1F9002804D02D482849A5383B
-:101F400012F0FBFF287809F0AEFE0020207101207E
-:101F500060713021E170207070BD70B5214C054674
-:101F6000403C2078002803D11E48007E002804D081
-:101F70001F481B490D3012F0E0FF287800280BD0D5
-:101F8000012809D0022807D06878402804D31848CF
-:101F90001349143012F0D1FF284609F0A4F90028A3
-:101FA00001D0002000E00C2020710120607134215C
-:101FB000E170207070BD70B50A4C0546403C207839
-:101FC000002807D10748007E002803D109F094F9C2
-:101FD000002804D006480249983812F0AEFF0BE002
-:101FE000B01B000020030020D8010020AA0200003E
-:101FF0000A060000C40900002978002914D00A2923
-:1020000012D0142910D01E290ED028290CD0322924
-:102010000AD04B2908D0642906D0FF2904D00B2010
-:10202000FD49C00112F089FF284609F0BBFE0020DF
-:102030002071012060713321E170207070BD70B596
-:10204000F64C06462078251D002804D12046403055
-:10205000007E002803D0F049F14812F06EFF3146AF
-:10206000002008F06FFD2870002804D106223146B8
-:10207000EC4812F0C6FD012060713221E170207041
-:1020800070BD70B5E54C05462078002804D1204687
-:102090004030007E002804D0E148DF49183812F0B3
-:1020A0004CFF00216956042914D0002912D0081DC4
-:1020B00010D0001D0ED0001D0CD0001D0AD0001D38
-:1020C00008D00A3006D0283104D0D548D249163875
-:1020D00012F033FFD448297801700120607131215A
-:1020E000E170207070BD10B5CC4C2078002804D170
-:1020F00020464030007E002803D0C749CB4812F06C
-:102100001CFF08F019FAE08008F0DEFA20720020C7
-:102110002071012060710521E170207010BDF8B5BB
-:10212000BE4C07462034A07B25462035002805D12B
-:10213000287E002802D1A878002804D05120B64972
-:10214000000112F0FAFE09F0D7F81026022822D179
-:10215000B7483988808988421DD1B0494839084636
-:102160000A7F6038807A002A03D080070CD40C20C4
-:102170000CE0800708D406200877AD484030407C4A
-:10218000002801D009F077FE2E760020E073267437
-:102190000120A073F8BD0220F8E710B59F4C20780D
-:1021A000002804D120464030007E002804D09C48FE
-:1021B0009949543812F0C1FE002020710E20A07001
-:1021C0000F20E070FF20A0710020C04320819548BF
-:1021D000C01D0178A1728188A1814088E081012021
-:1021E0006071207010BD10B58C4C2078002804D18F
-:1021F00020464030007E002803D087498D4812F0E9
-:102200009CFE0821A01D0FF04DFA00202071012036
-:1022100060712B21E170207010BD70B57F4D0446B8
-:102220002878002804D128464030007E002804D0B9
-:102230007E487949B83812F080FE7D481022214648
-:10224000303800F0FCFB7A481022A118203800F04A
-:10225000F6FB774830380FF02CFB75491022103907
-:102260002C46A81D00F0EBFB002020710E20A07072
-:102270002A20E07001206071207070BDF8B5674CB5
-:1022800005462034A07B26462036002802D1307E29
-:10229000002804D023206049400112F04EFEA978A6
-:1022A000052912D0132910D014290ED015290CD0CD
-:1022B0001A290AD0292908D03D2906D03B2904D063
-:1022C0008D205549C00012F038FE28885A498842AE
-:1022D00004D953485049E13812F02FFE09F00CF8A8
-:1022E0000C212827022809D151482A888089904248
-:1022F00015D14A484838027E002A01D0E17310E027
-:10230000A97841760121017637760020E0734848AC
-:102310004030407C002804D009F0ADFD01E00220EF
-:10232000E07327740120A073F8BDF8B53B4F064653
-:1023300038783D1D002804D138464030007E002802
-:1023400004D03C483449D13012F0F7FD3146012029
-:1023500008F0F8FB01242870002807D12F48062236
-:1023600060303146054612F04CFCAC717C71172090
-:10237000F8703C70F8BDF0B52B4F85B0403F3D7A0A
-:10238000064626480078002804D13846A038007E4A
-:10239000002804D0D3202049800012F0CEFD3078F0
-:1023A000002806D0012804D022481B492C3812F0FE
-:1023B000C4FD082D4CD21C4820380190C4693078E7
-:1023C00000283FD0012804D01A4813491E3812F0C3
-:1023D000B4FD294608310120884004430120A8406B
-:1023E00020430090B1790D4C0802727969000919F7
-:1023F0001043FF3101318881B01C12F063FC717809
-:1024000000020843A9000919C031C862387A401C8B
-:1024100038720199009811E0B01B0000E002002022
-:10242000520500002500002000040020E9060000FD
-:10243000D801002079030000FF0E0000C8610020D1
-:10244000207108E029460831012088408443C5E70F
-:10245000F748072101710121F5480B224171C27033
-:10246000017005B0F0BD10B5F14C2078002804D102
-:1024700020464030007E002803D0EE49EE4812F09E
-:102480005CFD12F059FE00202071012060710A21CC
-:10249000E170207010BD10B509F09DFB002804D03C
-:1024A000E548E449583812F048FD08F043FA08F0CE
-:1024B00026F80AF040FE002804D0BD20DD49800047
-:1024C00012F03BFD08F085FA002804D05F20D949BE
-:1024D000C00012F032FD12F02FFED8480024047024
-:1024E000FFF77FF9D2480121047141710222C270C5
-:1024F000017010BD70B5CE4D04462878002804D177
-:1025000028464030007E002804D0CB48C9498F308F
-:1025100012F013FD20781F2801D8601C04D1C64892
-:10252000C449903012F009FD002028712078611C08
-:1025300008F022FB012068712021E970287070BD2D
-:10254000F8B5BB4C0646207825464035002802D118
-:10255000287E002804D0B848B6499D3012F0EDFC22
-:102560003078012806D0002804D0F720B149800037
-:1025700012F0E3FC012060710C20207130780027FC
-:10258000AF4E012808D008F0B7FE032869D008F044
-:10259000B7FE032873D078E008F0AEFE002803D120
-:1025A00008F0AEFE002804D008F0A6FE02283DD0B8
-:1025B0006BE008F04DFA002867D0287C002864D131
-:1025C0009F4802210C300EF0F6FF002806D00F21A4
-:1025D000B089090212F08FFBB18100E0B7810122BE
-:1025E0000321974807F02EFE954808F0D3FBB089E9
-:1025F00007F0A4FF002804D18F488E49B93012F0AB
-:102600009CFCB089002108F09DF9002804D08A487C
-:102610008849BD3012F091FC297F688B09F047FB97
-:10262000002831D084488349C13017E008F068FEA3
-:1026300000282AD1287F002827D0012825D0042867
-:1026400023D008F005FA00281FD0297F688B09F0F5
-:102650002EFB002818D078487649D53012F06DFC52
-:1026600012E0002009F056FA00280ED12771287CCC
-:1026700000280AD1B089FFF795F806E0FFE70020AF
-:1026800009F048FA002800D127711B20E0700120D2
-:102690002070F8BD70B5664D04462878002804D136
-:1026A00028464030007E002804D0634861498130CC
-:1026B00012F043FC20781F2801D8601C04D10F20A1
-:1026C0005C49800112F039FC002028712078611CDF
-:1026D00008F066FA012068711A21E970287070BD4F
-:1026E000F8B5534D044628780C272E46403600286E
-:1026F0000AD1307E002807D108F0FEFD032803D060
-:1027000008F0FEFD032804D14B484A49473012F037
-:1027100014FC6079002801D0012829D1A079002873
-:1027200001D0012824D1A07B002805D0012803D0A6
-:10273000022801D003281BD1607B400718D0628893
-:1027400001208003824202D82188814201D9207968
-:102750000CE02079002804D0022805D0032803D0FB
-:1027600004E0202A12D20CE0A0290FD201280DD0BB
-:102770002079042805D12088202802D36188884246
-:1027800004D92D482B495D3012F0D7FB2088708387
-:10279000207930776079002802D0012803D00CE03E
-:1027A000284A002105E0224A60329079002804D0AE
-:1027B0000121204608F050F9074601202F71687169
-:1027C0001821E9702870F8BD70B5194C05462078BD
-:1027D000002804D120464030007E002803D015494F
-:1027E000194812F0AAFB08F087FD0C2102280ED12F
-:1027F00013482A8883899A4228D10246C032137F1F
-:10280000002B04D1807E0E2803D00F2801D0217127
-:1028100003E005201077002020710E20A0702E20EC
-:10282000E0702888E08001206071207070BD000099
-:10283000E0020020B01B00003E0300000004002066
-:10284000D801002025000020D30400000220E3E787
-:1028500070B5814C05462078002804D120464030D0
-:10286000007E002803D07D497D4812F066FB08F009
-:1028700043FD0C2102280ED17A482A8883899A4286
-:102880001FD10646C036327F002A04D1807E0E2832
-:1028900003D00F2801D0217109E06F481022A91C34
-:1028A0001E3812F0AEF904203077002020710E207F
-:1028B000A0702D20E0702888E080012060712070D9
-:1028C000B4E70220F2E710B501780B0012F026FC05
-:1028D0003D878738878758878787873B3E878787E5
-:1028E00051548787878787874228872C3087878737
-:1028F00087348787878787878746874A4E8720243C
-:10290000876B5B5F6367876F877E827B77738700E8
-:10291000801CFFF79DFF60E0801CFFF755FF5CE027
-:10292000801CFFF7DDFE58E0801CFFF7B3FE54E08B
-:10293000801CFFF705FE50E0801CFFF7DBFD4CE03C
-:10294000FFF7A9FD49E0FFF78EFD46E0801CFFF789
-:1029500012FD42E0801CFFF7E8FC3EE0801CFFF720
-:102960008DFC3AE0801CFFF758FC36E0FFF73BFC9B
-:1029700033E0FFF712FC30E0801CFFF7D0FB2CE0C7
-:10298000FFF7B1FB29E0801CFFF77BFB25E0801CF3
-:10299000FFF755FB21E0801CFFF70DFB1DE0801CBD
-:1029A000FFF7DBFA19E0801CFFF7B8FA15E0801C8E
-:1029B000FFF76EFA11E0801CFFF725FA0DE0801C8E
-:1029C000FFF7EFF909E0FFF7CAF906E0801CFFF70F
-:1029D0009BF902E0801CFFF77AF9012010BD00206E
-:1029E00010BD10B51D49204812F0A7FA10BD70B5F2
-:1029F000194A012411461B4D4031030012F08EFB91
-:102A000005191C1C04191C0001220021154807F09F
-:102A100019FC11480021483801774177C03809F086
-:102A2000C2F9002804D010480C49D33012F085FABE
-:102A3000FCE60C745565F9E608490C48F6E730B534
-:102A4000134606E0CC18203CE47FD51A44555B1EA3
-:102A5000DBB2002BF6D130BDE0020020B01B00003D
-:102A6000A7040000D8010020430600004907000029
-:102A700010B56038030012F051FB0A060A0F131854
-:102A80001F262A31363B086800F090FD10BD05C9AD
-:102A9000114600F0AAFD10BD086800F044FE10BD0C
-:102AA00005C9114600F048FE10BD4B6808788A68D9
-:102AB000194600F053FE10BD4B688A680868194635
-:102AC00000F067FE10BD086800F07CFE10BD0888AD
-:102AD0004A6880B2114600F098FE10BD05C9114643
-:102AE00000F0C4FE10BD05C9114600F0FAFE10BD8D
-:102AF000012010BD0120704701203F4940060860B9
-:102B00003E4908603E490A68FF231B029A4383122C
-:102B10001A430A60384980390860704710B5024688
-:102B20000420384904E0C3005B181B79002B0AD04D
-:102B30000346401EC0B2002BF5D133A1432012F052
-:102B4000FCF9FF2010BDC300CA50002259184A7179
-:102B50008A7101220A7110BD2A4A0021C000801822
-:102B60000171704710B50446042803D326A15220F2
-:102B700012F0E3F92348E1000C182079012803D072
-:102B800021A1532012F0D9F96079A179401CC0B27B
-:102B9000814200D0607101201749400680310860F1
-:102BA00010BD70B5164800680004800F022803D0DD
-:102BB00015A1692012F0C1F9124E194C0325207895
-:102BC000C10088190279012A07D1427983799A4292
-:102BD00003D042798271705880472078401CC0B27F
-:102BE0002070042801D30020207028466D1EEDB20D
-:102BF0000028E4D170BD000080E100E080E200E048
-:102C000018E400E02C1200207372635C736F635F42
-:102C10007369676E616C6C696E672E6300000000FB
-:102C20003C00002010B5EFF31080C407E40F72B62B
-:102C3000D6484178491C41704078012801D10FF0F5
-:102C400021F9002C00D162B610BD70B5CF4CE078F0
-:102C500000280AD10125E570FFF7E4FF0FF01AF90B
-:102C6000002804D000200FF0EDF8002070BDC84807
-:102C700065714560F9E770B5EFF31080C507ED0F9A
-:102C800072B6C24C6078002803D1C2A18F2012F026
-:102C900054F96078401E60706078002801D10FF010
-:102CA000F5F8002D00D162B670BD10B5B748C178F7
-:102CB000002904D000214171C170FFF7DCFF002022
-:102CC00010BD10B504460FF0E5F8B049C9780840CA
-:102CD00000D001202060002010BDF8B50246AB4CAA
-:102CE0000026A6710820042101251027130012F0E8
-:102CF00015FA0D080A0C0E101214161E2621232593
-:102D00002800257122E0022001E021711EE02071DF
-:102D10001CE027711AE02020F9E7012616E0FFF7F2
-:102D200081FF0FF0B7F80028FBD002260EE02171DA
-:102D3000A5710BE02771FBE7202000E04020207107
-:102D4000F6E7FF2093A17E3012F0F7F80FF0AEF80F
-:102D5000002809D00FF0B0F8B04205D130460FF08E
-:102D6000AEF80028FAD024E001208007C5608D4A23
-:102D7000002151608C4A9661854B02225A60856021
-:102D80008A4803690569DB43DB06DB175B1C1027F8
-:102D90003D430561834D00E020BF6F68002FFBD0ED
-:102DA000002B03D1076910239F4307617848826095
-:102DB0006960A07900280CD00FF06CF805460EF081
-:102DC000C9FF7B4A002D02D0A260E06001E0E26012
-:102DD000A060002E01D100F0B1F8F8BD10B5044696
-:102DE0000FF05EF8002805D068490120C8704A78C5
-:102DF000521C4A702046FFF770FF10BDF8B5694FAE
-:102E0000B8680025012802D1BD600FF01BF8786872
-:102E1000012800D17D60386801265C4C012814D15E
-:102E20003D606079002803D000200FF00BF8657139
-:102E30002078002809D00FF02DF8002805D0594837
-:102E4000C038866300060661A670386901282CD157
-:102E50003D6100F068F8012080074661A0790028F4
-:102E600015D00FF017F800900EF074FF00990029AC
-:102E700001D0E16800E0A168411A022901DA8A1C48
-:102E800013DC0099002901D0E06000E0A060FFF7AA
-:102E9000C9FE0EF0FFFF002806D04248C038866306
-:102EA00000060661A67000E02670F868012819D1B6
-:102EB00000F039F800F037F800F035F8A078002875
-:102EC00004D1FF2033A1053012F037F8FD60A57062
-:102ED0002570FFF7D0FE0EF0B4FA002802D031487A
-:102EE000C038C663F8BD10B5284CE078002801D181
-:102EF0000EF0CCFF01208107886100F014F8A07863
-:102F000000280BD0274CE068002803D10EF0D7FF33
-:102F10000028F8D10020E06000F005F800201C49EE
-:102F2000C043886010BD08B55020694608806A46D5
-:102F30001088411E11800028F9D108BDF8B5144849
-:102F400019278760174900200860C8600EF0A2FFAB
-:102F5000BD0701240D4E002805D01248C0388463F7
-:102F60002C61B47000E03470FFF75CFE08484760E5
-:102F70000D4930798863FFF7D6FFAC61FFF7D3FFC7
-:102F80000849002008616C61F8BD00004000002085
-:102F9000000300407372635C736F635F636C6F6305
-:102FA0006B2E6300000100400005004000ED00E0D2
-:102FB000FFFFFF7F10B510F020F810BD002004497E
-:102FC000C863012001218140024A116000BF70479F
-:102FD000C01F004080E200E010B504460BF051F83D
-:102FE00020460CF066F810BD704770477047704778
-:102FF0007047704770477047704770477047704719
-:1030000010FFFFFFDBE5B151006001005A00FFFF38
-:1030100003B40148019001BD09000020FE49487039
-:10302000704710B5030012F079F8080E050E080875
-:103030000B0B0E1104F06BF810BDFFF7CDFF10BDA8
-:103040000DF0A0FF10BD01F077FE10BDFF20F3A131
-:103050009A3011F072FF10BD7FB5F44905464868FB
-:103060008968082301910090F14A1946F1480EF051
-:1030700043FD0024F0480EF05DFD641CE4B2082C12
-:10308000F8D3EB490320803140020CF0E7F8002828
-:1030900003D0E2A1BF2011F050FF1E220221E74819
-:1030A0000AF09FFCE5481E22032110300BF013FAB2
-:1030B000E2480722342174300AF0ECFBDF484C214F
-:1030C000283011F0FDFDDD496A46743108464C3860
-:1030D0000164FF317B31416401211172039002F0E0
-:1030E000AAF802A80CF008FC002803D0CBA1D3203A
-:1030F00011F023FFCF4802222421A8380AF0CAFB8E
-:10310000CC4802222C215C380AF0C4FBCC490B20AD
-:103110000EF03AF8002803D0C0A1E02011F00DFF16
-:1031200003F0DEFF03F0E2F904F03EFE6B460022FE
-:103130000821C4A001F06EFF002803D0B7A1E7204A
-:1031400011F0FBFE284605F049F9002803D0B3A191
-:10315000E92011F0F2FE8521C900BD4811F0B0FD53
-:10316000BB49B24A0020135C0C18401CC0B2E3708B
-:103170000428F8D3A849002048608870C8707FBD33
-:1031800070B5B44E0546706A94B00C46401C04D12C
-:10319000B06AC0430004000C0BD0306AC007C00FF7
-:1031A0002870706A11F09FFDB06A2071000A60718A
-:1031B00014E02B206946087009A968460AF0B0FBA4
-:1031C000002804D0FF2095A10E3011F0B6FE01209A
-:1031D000287006220AA9204611F013FD287800283D
-:1031E00003D06079C0210843607114B070BDF0B5A0
-:1031F000984C0646206895B00D463746401C083767
-:10320000002808D16068401C05D1A068401C02D18C
-:10321000E068401C11D02068314611F064FD606800
-:10322000311D11F060FDA068394611F05CFDE068C9
-:1032300031460C3111F057FD25E02B20694608700E
-:1032400009A968460AF06CFB002804D0FF2073A18E
-:10325000373011F072FE08220AA9304611F0D1FC75
-:103260002B206946087009A968460AF059FB002816
-:1032700004D0FF2069A13E3011F05FFE08220AA9A8
-:10328000384611F0BEFC20692E46401C0836002846
-:1032900008D16069401C05D1A069401C02D1E069D9
-:1032A000401C12D02069294611F01DFD6069291DBE
-:1032B00011F019FDA069314611F015FDE0692946AC
-:1032C0000C3111F010FD15B0F0BD2B2468460470D0
-:1032D00009A90AF025FB002804D0FF204FA15C308B
-:1032E00011F02BFE082209AF0AA9284611F089FC2B
-:1032F0006846047009A90AF013FB002804D0FF20D7
-:1033000046A1633011F019FE0822391D304611F034
-:1033100078FCD8E710B5002108460EF0C3FC002168
-:1033200001200EF0BFFC002102200EF0BBFC0021AA
-:1033300003200EF0B7FC002104200EF0B3FC0021A6
-:1033400005200EF0AFFC10BD10B5414CA0780B2845
-:1033500004D3FF2031A1B33011F0EFFD20786021BC
-:10336000484300190830002101704178E722C9085C
-:10337000C900C91C11404170274A0121917010BD3C
-:1033800070B5254CA07800280ED031480025017872
-:10339000491CC9B201700B2900D105708178491C04
-:1033A00081700EF04AFDA57070BD70B51A4C0546CF
-:1033B0006068002804D0FF2018A1DC3011F0BDFDAA
-:1033C000656070BD70B5144E214DFFF7BDFF71688B
-:1033D0000446002907D06022FDF7F6FEFFF7D0FF74
-:1033E00000207060F1E72879002876D011485C3819
-:1033F0000AF060FA6060002804D1FF2007A1FA30CB
-:1034000011F09BFD60680AF0B3FA002831D0204625
-:1034100000F03FFF60781FE0340000207372635CAF
-:10342000686F73745F636F72652E630048510100AB
-:10343000040400200C12002023300000840A002025
-:10344000B41000206E524635313832320000000090
-:103450008C0C002080000010010707D5C008C000B8
-:10346000401C60702879401E287127E0F748616889
-:103470002AE0F64861680AF026FA687900282CD01C
-:10348000F2484C380AF016FA6060002804D1872010
-:10349000EF49800011F051FD60680AF06DFA0028D4
-:1034A00016D0204603F072FE6078010709D5C008E7
-:1034B000C000801C60706879401E6871FFF760FF73
-:1034C00083E7E24861684C380AF0FDF97DE704E0E3
-:1034D000DE4861684C380AF0F6F970BDF7B505466C
-:1034E0000078002700090C463E46062803D0D8493C
-:1034F000D84811F022FD287A00280ED0012814D0D7
-:10350000D448D349213011F018FD0298002C0680D0
-:1035100001D0278066800020FEBD02270926002CEE
-:103520000ED0A889A080A87B08E003271426002CD1
-:1035300006D02869E060A88A2082287B2072E4E710
-:1035400002980680E7E770B50E4600211C461980F8
-:103550001546030011F0E2FD0723050B1711231D8B
-:10356000230022462946304603F0DCFD70BD22468A
-:103570002946304601F051F970BD224629463046B1
-:1035800004F00DFB70BD22462946304602F0E2FFF2
-:1035900070BD224629463046FFF7A0FF70BDAD48FA
-:1035A000AB49473011F0C9FC032070BD10B5AA4CDF
-:1035B0002178002901D0082010BDFFF74DFD012022
-:1035C0002070002010BD0146A04810B54C380AF00C
-:1035D0007AF9A2494879401CC0B24871012803D148
-:1035E0009D484078FFF7BEFA10BDF8B505469C48E7
-:1035F0000F46814208D3002D01D0854204D3E81C38
-:1036000080088000A84201D01020F8BD934881783E
-:10361000002911D0398800914178602251430C185B
-:10362000083420783B460007000F00222146FFF7B0
-:103630008AFF060004D015E0002038800520F8BD80
-:10364000002D13D039880098814201D90C260DE055
-:1036500020783B460007000F2A462146FFF773FFFC
-:10366000060005D00C2E01D0002038803046F8BD71
-:103670007A4D6878401CC0B268700B2801D10020D8
-:103680006870A878401EA87061784807400F02282B
-:1036900010D00128EAD16D4861680AF014F9287940
-:1036A000401CC0B228710128E0D16B484078FFF778
-:1036B00059FADBE7C806D9D46068FFF784FFD5E77D
-:1036C00070B50446674816460D46814204D16148EC
-:1036D0005F49C53011F031FC012E05D05D485C49D1
-:1036E000D53011F02AFC70BD5B480121C170662005
-:1036F000207000202072A581A17370BD70B51646A0
-:103700000D46040001D1FFF71FFE66210170012163
-:10371000017229680161A98881820673002C01D198
-:10372000FFF72EFE70BD4E49884201D2102070472F
-:1037300007210170002070474B4A10B5904208D312
-:103740000124A404464AA04201D3904201D39142ED
-:1037500001D2102010BD0DF050FD10BD424B10B530
-:10376000994208D30124A4043D4BA14201D39942BC
-:1037700001D39A4201D2102010BD022803D0102894
-:1037800001D0092010BD0DF05EFD0028FAD0052003
-:1037900010BD354B10B598420CD30124A404304B16
-:1037A000A04201D3984205D3994203D3002A03D003
-:1037B0009A4201D2102010BD0DF06BFD0028FAD006
-:1037C000072010BD10B50446254894B0844202D2AB
-:1037D000102014B010BD01F09AFD002801D0112076
-:1037E000F7E70F2008A9087369460BA80AF098F8B4
-:1037F0000028EED16846007A2070684640896080D3
-:1038000068468089A0800020E3E710B5124C084686
-:10381000E17800290ED000280AD0114A904202D344
-:103820000368934201D2102010BD8288002A03D081
-:10383000012903D0082010BD092010BD04F018FB99
-:103840000028FAD10021E17010BD0000B011002065
-:103850001C3400003E020000340000208C0C0020CC
-:1038600000200020FFFF00000060010010B5244A86
-:1038700094B091420DD301229204224B914201D384
-:10388000994206D3441E1E2C24D8914203D3994258
-:1038900001D210209DE701281AD108780024C00722
-:1038A000C00F002803D001206946887001E06846F7
-:1038B000847039206946087009A968460AF030F812
-:1038C000002803D010498C2011F037FB204680E7F8
-:1038D00007207EE70246203A1F2AF9D801F03AFC79
-:1038E00077E7084A10B5914201D21020ACE70246B2
-:1038F000203A1F2A02D801F083FCA5E70720A3E79E
-:1039000000600100002000201C3400008107C90E67
-:10391000002808DA0007000F083880082C4A8000C9
-:103920008018C06904E080082A4A80008018006876
-:10393000C8400006800F704710B50D20FFF7E6FF66
-:10394000C4B20420C043FFF7E1FFC0B2844203D0F9
-:1039500021A11A2011F0F1FA10BD0121234A4803D8
-:103960001060234B00221A60224A5160224A1060E4
-:10397000224A11601D4980390860704701211B4AA5
-:10398000480310601D4A5160194A002111601A490C
-:103990000860704710B516490868012804D00EA1C8
-:1039A000562011F0CAFA10BD154880680022C0B236
-:1039B0000A600DF09DFE10BD10B50D48016800298C
-:1039C000FCD0FFF7E7FF01200B494003086010BD62
-:1039D00000ED00E000E400E07372635C736F635F0E
-:1039E00068616C5F726E672E6300000080E100E02A
-:1039F00000D1004000D3004080E200E000D0004051
-:103A000000D5004030B40121BC48C9020160CD108E
-:103A100005604A030260BA4803681B021B0A036080
-:103A200004680023240A24020460B6480468240AB7
-:103A300024020460B448012444608460B34C2360D1
-:103A40006360A360B24B19601D601A60B14B1960CE
-:103A50001A600121016030BC704710B40121A748F1
-:103A6000CC0204600A0202600B060360A6484160B3
-:103A70008160A6490020086048608860A44804600E
-:103A80000260036010BC70470121A148C9020160B7
-:103A9000C91001607047002805D0012805D0022810
-:103AA00005D19D4870479D4870479D48704710B5A7
-:103AB0009CA18B2011F041FA002010BD70B50021AF
-:103AC0009F4CA04DA04A914B002808D001281DD042
-:103AD000022822D093A1B32011F02FFA70BD01204B
-:103AE0000004A060A86011601960984B42109A60B1
-:103AF000974A9060814A001210609648016087489A
-:103B00000160954801609548017070BD0120400436
-:103B1000A060A8605160596070BD01208004A06061
-:103B2000A8609160996070BDF8B59446844A854D4F
-:103B300000240127754E002808D0012836D002281D
-:103B400044D078A1E82011F0F8F9F8BD891E0902E7
-:103B5000090A012000049060346068607A4A1160AC
-:103B6000012B21D000217D4A7D4B517061463D31B2
-:103B7000DC63DF637B4B5C6002249C6004241C617B
-:103B8000744B196074490F60614B89151960704B53
-:103B900058606048016075487349C16086606B4930
-:103BA000600348601770F8BD0121DCE701205C4E1E
-:103BB00040046F4F012B04D134605060686039605D
-:103BC000F8BD9060346068603960F8BD0120524EE5
-:103BD0008004684F012BF4D1EEE7674840687047D6
-:103BE00070B54A4D28680026554C012806D1A068BA
-:103BF000C00303D501200004A0602E60686801287E
-:103C000009D1A068800306D501204004A0606E6041
-:103C100001200FF02EF9A868012809D1A0684003FF
-:103C200006D501208004A060AE6002200FF021F9CB
-:103C300070BD10B549490878002818D00120434AC2
-:103C4000C0039060424A400090602C4A001210600D
-:103C5000404A00201060314A10603F4A10600870EE
-:103C60004A78002A02D048700FF003F910BD0320F3
-:103C7000FAE7012041490006086070470120244905
-:103C800000060860704701203C4940050860704705
-:103C900001201F4940050860704731490020C86372
-:103CA00088151B4908607047410A354AC005C00D98
-:103CB0005043801C5143400A0818704710B4314CDF
-:103CC000430B63431B0C5C020C602D4C6343C31A13
-:103CD0002D485C0258432A4B400D4343E31A01240C
-:103CE000DB0324041B191B1613700A6810180860E4
-:103CF00010BC704710B50FF094F910BD80E100E0E2
-:103D000008E400E018E400E000B0004040B10040EA
-:103D100080E200E000E100E048B100404081004066
-:103D200044B100407372635C72656D5F68616C5F83
-:103D30006576656E745F74696D65722E6300000050
-:103D400000B3004040B3004040B5004000F50140E2
-:103D50000083004040850040008200405000002069
-:103D6000C08F0040008500400080004080F5014089
-:103D700044B5004048B5004000B5004000E200E016
-:103D8000093D0000378600006F0C01000E4A1268E2
-:103D90000C498A420AD118470B4A1268094B9A42C9
-:103DA00004D101B50DF0BFFD03BC8E46074909687B
-:103DB0000958084706480749054A064B704700005E
-:103DC00000000000BEBAFECA1C0100200400002052
-:103DD000881D0020881D002010B5F84C94B0216883
-:103DE000087A002836D017206A46107000A80622EC
-:103DF0000931023010F005FF09A9684609F090FD6D
-:103E0000112825D02168C0318979062920D00729B9
-:103E10001ED008291CD004291AD0092918D00A2933
-:103E200016D00B2914D0052912D0002803D0E4A104
-:103E3000F42011F082F82168B820405806221C3086
-:103E4000093110F0DEFE2068017A8030806BC17687
-:103E500014B010BD3220C7E770B5D84D04462968AC
-:103E60000300C03111F05AF90C077C0B1A212E3BCC
-:103E700048515C677080FF20D1A10A306EE08879DC
-:103E800001286DD009286BD0052869D00A2867D091
-:103E90000B2865D0FF20CAA10F305FE08879012888
-:103EA0005ED0FF20C6A1163058E08879062857D08A
-:103EB000072855D0082853D0052851D0FF20C0A18D
-:103EC00019304BE0887909284AD00A2848D00B28B5
-:103ED00046D0042844D0FF20B9A11F303EE08879A5
-:103EE00003283DD007283BD0082839D0092837D0EF
-:103EF000FF20B3A1253031E08879062830D00A2888
-:103F00002ED0FF20AEA12B3028E08879062827D0BC
-:103F1000072825D00B2823D0FF20A9A12F301DE092
-:103F2000887906281CD00A281AD00B2818D0FF2020
-:103F3000A3A1343012E08879092811D00A280FD0C3
-:103F4000FF209FA1393009E08879092808D00A2884
-:103F500006D0082804D0FF2099A13D3010F0EDFFD5
-:103F60002868C030847170BDFF2095A14230F5E70C
-:103F70009249C9220968525CD206920F05D1A0313C
-:103F80008A8B824201D1887F70470020704770B5CC
-:103F90000446112020700021884D61702968C031CD
-:103FA000897A002908D003290ED0042910D0FF20D7
-:103FB00083A16B3010F0C1FF20780009012802D9DD
-:103FC0002868807D607070BD0007000F203002E01F
-:103FD0000007000F30302070EEE730B503887C49D1
-:103FE0007C4C8B4202D09A1FA2421ED242888A4247
-:103FF00002D0951FA54218D2934216D883887D24FB
-:10400000E400A34211D8C088884205D0714D04460F
-:104010000A3C2D1FAC4208D2884208D08A4206D002
-:104020005B1C5A43C000824201DD072030BD0020E6
-:1040300030BDFFB50022099B002802D0994205DC63
-:104040005CE0002902D1002004B0F0BD0920FBE7AC
-:10405000845C002C12D085186F780D2F4CD010DCAA
-:104060003B0011F05BF80A421B2A2A303032323A08
-:104070003A42835C002B3FD1521CD2B28A42F8DB19
-:10408000E1E7122F31D004DC0E2F35D00F2F2CD1C9
-:1040900032E0142F11D0152F27D116E0022CD5D1E4
-:1040A000AB78039C072B237001D25B0701D40A2055
-:1040B000CAE7029B01241B7814E0E343DB0708E016
-:1040C000012C08D011E00620BEE70F2523072D079D
-:1040D0005B19002BF4D03046B6E7029B1B789C0797
-:1040E0000AD402242343029C2370835C521C9A1836
-:1040F000D2B28A4204DDA9E70B20A5E71926760291
-:104100008A42A5DB9FE705E00278401C002A01D027
-:10411000002070470A46491E89B2002AF4D10120C6
-:10412000704770B5254D00212868C943A0308183B0
-:1041300000248477214606200DF0B4FD00210520DF
-:104140000DF0B0FD002102200DF0ACFD0120FFF7C5
-:1041500083FE2868C030C471047201F062FF70BD34
-:1041600030B5164C95B02268C0329279042A0CD032
-:10417000052A0AD028236A4613705080132906D0D6
-:104180003B2904D0072015B030BD0820FBE7117192
-:10419000104609A909F0C4FB05000BD12068C03006
-:1041A0008179062908D0082906D0072904D00520DE
-:1041B000FFF752FE2846E6E70420F9E75400002006
-:1041C0007372635C6761705F636F72652E6300007A
-:1041D000FFFF00007B0C000030B587B0040003D067
-:1041E000002107200DF05EFDF74D012128686A4689
-:1041F00001720421117003210C300DF053FA29686B
-:104200004022887B8006800E1043887368460BF03E
-:1042100094FB00280DD12968098A00290AD0002CB6
-:1042200008D08B000122002107200DF096FC072802
-:1042300002D0032007B030BD0020FBE770B5002599
-:104240000646002803D0002107200DF02BFDDE4C90
-:10425000012120680172062109300DF023FA20683F
-:10426000817B8906890E8173FFF7B6FD2068008A7D
-:1042700000280AD0002E08D0830001220021072048
-:104280000DF06BFC072802D00325284670BD0025E1
-:10429000FBE7F0B59BB0040003D1CC49CC4810F04B
-:1042A0004CFE72202070616800260A780825521F93
-:1042B0000127C548130010F031FF0F097CDFFD7C9A
-:1042C0007EFCFBBB7C7C7C7CFAF97C00BE480068F1
-:1042D000C0308079032804D0BD48BC49093010F0B3
-:1042E0002CFE002108460DF0DDFC002107200DF01A
-:1042F000D9FC6078B44A28436070106810250146E4
-:10430000C0314B7A2B434B7263689D783C2D4DD066
-:1043100002469D88A032977763688030DB890B80E6
-:1043200063681B8A4B8063685B8A8B8095836168B6
-:10433000826BC97911756168806B0831153006226E
-:1043400010F05FFC0620FFF787FD9F48FB23006805
-:104350000146C0318E72027E1A400276B82212588F
-:10436000937A9B089B0093724682487A4006400EDF
-:104370004872284602F0C0FE002804D094489349B1
-:10438000243010F0DAFD284602F0D0F8002804D0DE
-:104390008F488E49273010F0D0FD284603F016FDD7
-:1043A000002806D08A48894929303EE10120FFF7DC
-:1043B00053FD1BB0F0BD074600688E88C030807981
-:1043C000062812D0072810D008280ED004280CD0B8
-:1043D00009280AD00A2808D00B2806D0052804D0BE
-:1043E0007B487A49353010F0A8FD6078284360702A
-:1043F0003868C030417A294341728079092811D048
-:104400000A280FD00B280DD005280BD0FFF789FE06
-:10441000304602F07AFE304602F08EF8304603F065
-:104420000BFDC6E7FFF77DFE0220FFF715FDEFE766
-:104430000068C0308079062812D0072810D00828DC
-:104440000ED004280CD009280AD00A2808D00B283E
-:1044500006D0052804D05E485C49593010F06DFD47
-:104460006068807902F004FF0028A2D061782943B7
-:1044700061706168C8809CE707460068C030807939
-:10448000062812D0072810D008280ED004280CD0F7
-:1044900009280AD00A2808D00B2806D0052804D0FD
-:1044A0004B484A496C3010F048FD04E037E1A1E187
-:1044B00090E090E015E06078284360706068C18803
-:1044C0003868C03001806168098941806168498924
-:1044D0008180002102200DF0E5FB3868C030C671F4
-:1044E00067E706460068C0308079062819D007289B
-:1044F00017D0082815D0042893D0092811D00A28ED
-:104500000FD00B280DD005288BD031482F49833090
-:1045100010F013FD3068C03080790428ABD0052836
-:10452000A9D03068807C40063AD5606802210C3002
-:10453000FFF7E9FD002833D060680821001DFFF770
-:10454000E2FD00282CD03168B8204058807A8007DE
-:1045500008D1CA20405C002808D1488AC20505D588
-:10456000C00703D1488A4022904348824A8A80206B
-:1045700082434A822D2268460270BC20425A684615
-:1045800042801022973101A810F03BFB09A9684630
-:1045900009F0C6F90028A3D03D200C49000144E0F1
-:1045A00062683068AC2192890A5261680822091D4C
-:1045B000AE3010F026FB10A805743068AE301590B0
-:1045C00014A80BF0BAF9F4E654000020C041000032
-:1045D000260300008F7106460068C03081790629E5
-:1045E00019D0072917D0082915D00429EBD009299B
-:1045F00011D00A290FD00B290DD00529E3D0FD20B9
-:10460000FA49800010F099FC3068C03080790428A5
-:10461000D9D00528D7D060688179002902D0807868
-:10462000002805D02320F149400110F086FCC0E6A7
-:104630006078B8212843607030680958897A890702
-:10464000890F012951D1817C09064ED4017E490789
-:1046500001D5042100E00321C03081722B2069467E
-:10466000087009A9684609F05BF9002803D0DF4902
-:10467000DF4810F062FC68463168008D88820E22A7
-:1046800010A80274DB48B8221590525808324261D3
-:104690000A4660324260927902700A461432026120
-:1046A000521D82601032C260133A82619632C2613A
-:1046B000921C0262473A4262103282621032C26237
-:1046C000473AC263521E0264921F503142648164B1
-:1046D00014A80CF01BFB022815D0002813D0C448E6
-:1046E000C249293010F029FC0DE0817C4906017E89
-:1046F000490701D5042100E00321C0308172002167
-:1047000006200DF0CFFA3068418A0A0602D4402212
-:104710009143418289B280229143418249E6B64861
-:104720000068C0308079032804D0B148AF495730C1
-:1047300010F003FC002108460DF0B4FA0021072018
-:104740000DF0B0FA6078AC4A28436070106810250C
-:104750000146C0314B7A2B434B7263689D783C2DE8
-:1047600000D123E602469D88A032977763688030A7
-:10477000DB890B8063681B8A4B8063685B8A8B8054
-:1047800095836168826BC97911756168806B0831A6
-:104790001530062210F035FA0620FFF75DFB96482B
-:1047A000FB2301680A46C0329672087E18400876DC
-:1047B0004E82507A4006400E5072284602F09CFC11
-:1047C000002804D08A488949723010F0B6FB284688
-:1047D00001F0ACFE002804D085488449753010F003
-:1047E000ACFB284603F0F2FA002897D080487F49B6
-:1047F00077301AE7607828436070DAE500290BD03B
-:1048000088807D480068C0300288CA8002880A819A
-:1048100042884A81808888817047F7B506460078CB
-:104820000C460027010982B03D46012974D0724828
-:1048300000680090C03002296FD0072904D00A29EF
-:104840006CD06A496D480DE271680A78521F1300F6
-:1048500010F064FC0F09A451A4A42F585847A4A435
-:10486000A4A4656FA4008A783C2A1BD010271625C3
-:10487000002C7DD08888A0807068A21DC08920820D
-:104880007068C089E0817068008A60827068408AC0
-:10489000A082716808460831C07901F0B1FB0020A0
-:1048A000607375E019270725002CE2D00021A17163
-:1048B00071E011270725002CDBD089880091A180A9
-:1048C0007168F7228979A171417A1140417200988B
-:1048D00002F01CFC009801F033FE009803F0BAFAD5
-:1048E000D2E101270925002CC3D08888A0807068F8
-:1048F00080792072C8E1888812270E252146FFF7AB
-:104900007DFFC1E118270825002CB2D08888A0803F
-:10491000A01DFFF73CFBB7E144E0A6E15CE01A27ED
-:104920000725002CA5D04888A08070680079A07168
-:10493000AAE18A783C2AB5D010271625002C98D0F9
-:104940008888A0807068C08920827068C089E081F2
-:104950007068008A60827068408AA0827168607B9B
-:10496000497D40084000C907C90F0843607300E053
-:1049700093E17168C007497DC00F490849000843A9
-:1049800060737168A21D08460831C07901F038FBD8
-:1049900019480068C030417AEF2273E1A72013491B
-:1049A000C0005FE1307A012803D014480F49C838AD
-:1049B00058E112270E2570892146FFF71FFF002CB2
-:1049C00092D070784007400F032889D10A480068C8
-:1049D000C030417AFB2255E107490968A031002C1B
-:1049E00001D08A8BA280327A921E09E0C041000079
-:1049F00015040000AC12002054000020170600002F
-:104A0000130010F08BFB073D4853FDEB6F05FD00D5
-:104A100013270C25002C85D0009900224A82F168CA
-:104A200089788907890F0129217A26D04908490008
-:104A30002172FD231940F3689B785B07DB0F5B0055
-:104A400019432172E323E2801940F3681B785B0766
-:104A5000DB0E19432172DF231940F3685B78DB0713
-:104A60009B0E194321726272F1680122C978A1720A
-:104A7000017A1143F7221140ADE001231943D7E732
-:104A800015270C25002C9BD0F06806220068A11D7C
-:104A90000EF05CFFF8E016270725002C90D0317B44
-:104AA000A171017A08221BE00172EDE014271225A2
-:104AB000002C85D00098A21D8030806B01461531F6
-:104AC000007D01F09DFAB089E081207C012108433E
-:104AD000F92108402074FD480068C030017A0222A4
-:104AE0001143E1E717273825002C94D03221A01D6F
-:104AF00010F0E4F80020A071207A0321084320720E
-:104B0000FB210840F14909680A7E5207D20F920042
-:104B100010432072B8204058807A800757D0A07A7E
-:104B20008A7C4008D2074000D20F1043FD2210407B
-:104B3000A0728B7CFB229B07DB0F10409B0018436D
-:104B4000A0728B7CF7269B07DB0F3040DB001843FD
-:104B5000EF231840A072E07A10408A7CD206D20F70
-:104B600092001043E0728A7C3040D206D20FD2000D
-:104B70001043E072888AA0812046102267310E30EF
-:104B800010F03FF8D149A07F0968C0078A7DC00FA7
-:104B900052001043A0770A7E400852074000D20F0F
-:104BA0001043A077084640304DC820344DC4303CF7
-:104BB0003F20405C22463032393101F021FAC348AF
-:104BC00000688030806B817A890889008172BF48D3
-:104BD0000068C030017AFB22114065E7327B022A6F
-:104BE00018D017273825002C11D0017AFB23194043
-:104BF0000172012A17D0032A22D0042A23D000E010
-:104C00002DE0052A1FD0B249B24810F096F901F004
-:104C100008FA39E019270725002CF8D0898BA180E4
-:104C20000121A17103E00121A1710021E171417A0B
-:104C3000CA094906D201890E49000A434272E6E7D1
-:104C40000220A07106E0707B0007000F8030A07189
-:104C5000052A02D00020E071D9E70120FBE79D483A
-:104C60009B490C3010F069F90EE0317A00290BD124
-:104C700019270725002C10D0491EA1800021A17101
-:104C8000417AFD22114041720498002C058001D028
-:104C900027806580002005B0F0BD04980580F9E705
-:104CA00010B58A4C94B02068C0308079022809D0B1
-:104CB000032807D0052805D0092803D00A2801D0E9
-:104CC0000B2837D11B2108A8017300218173694685
-:104CD0000BA808F025FE002804D1684640781B2860
-:104CE00002D0032014B010BD002108460CF0DAFFFA
-:104CF000002107200CF0D6FF68468078002819D1E3
-:104D00002068C0308079801E030010F007FA0A0680
-:104D10000613081313130D0F1113012000E00420D4
-:104D2000FFF79AF80020DDE70620F9E70720F7E70C
-:104D30000820F5E70820D5E770B50025634C00286A
-:104D400007D0022817D0072828D062486049793058
-:104D500046E0FFF7A5FF00280CD1FEF7F5FA222167
-:104D600001700572FEF70CFB2068C030417A022208
-:104D70001143417270BDFEF7E7FA12210170012163
-:104D800001722168BC22525A4281C031CD71FEF7B6
-:104D9000F7FA2068C030417A0422E9E72168C6208A
-:104DA000405C022809D0032807D0092805D00A282A
-:104DB00003D00B2801D00528DCD1887B810901298B
-:104DC00011D0800904D043484149703010F0B5F843
-:104DD0000020FFF733FA0028CCD03E483C4974301D
-:104DE00010F0ABF870BD0020FFF7F6F9F3E770B5EF
-:104DF0000D46040004D137483549813010F09DF844
-:104E00002078012805D0334831499F3010F095F8BB
-:104E100070BDA18830482D4E814209D1E28882427E
-:104E200006D130681321A030808BFFF799F970BD4F
-:104E3000814202D1E08800280AD0122028706878C8
-:104E400008210843687007CC083507C5002106E033
-:104E500000227823114602200CF07FFE02213068E8
-:104E6000C030C17170BD00B5184A87B01268C03239
-:104E7000527AD20907D106236A4613700190117243
-:104E800068460AF05AFD07B000BD00B587B007209C
-:104E90006946087068460AF050FDF4E70B48006860
-:104EA000C030807A704738B5084C054602782068D3
-:104EB00013000146C03110F031F909A9061111A300
-:104EC000204E738BA900FEF787FF38BD54000020E9
-:104ED000C0410000F2050000FFFF000088790628AD
-:104EE00005D0092803D0FE49FE4810F026F82068B6
-:104EF0000422017E1143017682E0A9880029E4D0D2
-:104F0000A030808BF8498842DFD0A868002804D1FF
-:104F1000F448F349103010F010F82068C030407A9F
-:104F2000C00904D0EF48EE49113010F006F8A86827
-:104F300006220A38A86000902068AB88A030808BD9
-:104F4000042102F00DF80028BFD0DB20E449C000A6
-:104F50000FF0F3FFB9E788790528B6D92879012839
-:104F600002D0022808D103E0487A80221043487218
-:104F7000487A012210434872284601F05CF8206804
-:104F8000C03080790628A0D9082801D8062004E07E
-:104F900009289AD90B2898D80920FEF75DFF94E7D5
-:104FA000887906280AD0042808D0092806D00528C0
-:104FB00004D0CC48CA493D300FF0BFFF0ECDCB48DE
-:104FC0000361C2608160A2210170FEF7EEF97CE707
-:104FD0008879062818D0072816D009280DD00A2865
-:104FE0000BD0C048BE4950300FF0A7FF2068C0303A
-:104FF0008079062808D0072806D00B20FEF72CFF62
-:10500000284601F018F860E70820F7E7B548B449EA
-:1050100064309DE7FFB593B0012468460321847096
-:10502000C9021D4601800AF060F90022694601208C
-:1050300003F085F906460AF05CF9002E5CD168465B
-:10504000152184704902018000271C2101A80897BE
-:105050000FF036FE01200146103108A80170002033
-:10506000014608A841708178F9200140891C21433C
-:1050700008A88170684601790226314301711499AC
-:105080008185C7851F21018608A80A9013980D9075
-:10509000684609900AF029F90EAA09A901A802F0A8
-:1050A0001CFF07460AF025F9002F02D0384617B03A
-:1050B000F0BD8F4F68463968008F4880684684701D
-:1050C0008C49018008A88078F9210840801C41089B
-:1050D000490008A8817068468685068615A80D9047
-:1050E0000AF003F90EAA09A901A802F0F6FE064685
-:1050F0000AF0FFF8002E01D03046D8E7684639683C
-:10510000008F88807B4968468470C91C018029888B
-:1051100010A8018069884180A9888180E988C180C0
-:10512000082168468185018610A80D900AF0DDF8F7
-:105130000EAA09A901A802F0D0FE04460AF0D9F887
-:10514000002C01D02046B2E768463968008FC8803D
-:105150000020ACE7F0B5684E95B00C46B14235D3AF
-:105160000127BF04654DBC4201D3AC422ED3202899
-:1051700004D0212824D0222837D13DE03C216846A4
-:105180000170218841806188818009A908F0C8FBED
-:10519000002806D108A98979002904D002290DD058
-:1051A000032015B0F0BD6168B142FAD3B94201D312
-:1051B000A942F6D36A46128D0A80F2E75048F0E71A
-:1051C00008684B4C002812D0A84201D21020E8E712
-:1051D00006210EF0A5FB411C07D02168A8225050E3
-:1051E0000120A03188750020DBE70720D9E720687F
-:1051F0000021A0308175F6E7084600F028FFD0E7CF
-:105200003D4A10B5914206D301229204914204D343
-:105210003A4A914201D2102010BD202805D0212801
-:1052200003D0222803D0072010BD062010BD084659
-:1052300000F042FF10BD70B504462C48CC21AC30C4
-:105240000FF03EFD29482A4EAC3000213060C943A2
-:10525000A0308183002585770120FEF7FDFD3068B1
-:10526000C7210D54E121C57389000182B6210D5477
-:10527000014609310830FDF783FF316808460A7A94
-:1052800060308271062209310FF0BBFC316808469C
-:1052900029311930FDF7ABFF002C37D03068803052
-:1052A0008463FEF799FD1E20E081607A8F2108401B
-:1052B000303060723068014614312161983161628A
-:1052C000933921601031616025721339A162091F81
-:1052D000E1628531E163303921631031616311E0AE
-:1052E000C0410000C2060000FFFF00004C12002079
-:1052F00054000020012A000000600100002000206E
-:105300000230000010310930A163A06470BDF7487D
-:105310000068C0308079042803D0052801D000201F
-:1053200070470120704770B50646F1480C4681422F
-:1053300006D301208004844204D3EE48844201D283
-:10534000102070BDFFF7E3FF002801D0112070BDD1
-:10535000E948E64D002E02D0012E46D12FE02278FA
-:10536000002A0AD00121012A09D0022A14D0032AD6
-:10537000EDD1A2799209EAD112E0002103E0A279ED
-:105380009209032AE3D128680622017260308171F4
-:10539000611C0FF036FC05E0A2799209012AD6D1F2
-:1053A00028680172002107200CF07CFC2868062286
-:1053B000611C09300FF025FCFEF70EFD11E021788D
-:1053C000002912D0012910D0022910D00329BED102
-:1053D0000120FEF733FF002803D0C849C8480FF06A
-:1053E000ACFD2868C673002070BD072070BD012089
-:1053F000FEF7F2FEEFE7BF4910B5884201D2102058
-:1054000010BDBA49024609680B7A0931184600F006
-:10541000F7FD002010BDFFB599B005460020694694
-:105420000871087208A90874144608750122B04969
-:105430009204B0481E46002D05D08D420BD39542F4
-:1054400001D3854207D3002C08D08C4203D3944269
-:1054500004D3844202D210201DB0F0BD2846204360
-:1054600018D01F270CAB01AA009728461A99FEF7FF
-:10547000E0FD0028F0D10DAB02AA3146204600978E
-:10548000FEF7D7FD0028E7D16846007AC10703D0B0
-:105490000A20E1E70720DFE7800705D568460079A5
-:1054A000800701D50B20D7E7FFF731FF002801D097
-:1054B0001120D1E703AF002D0FD01A2069460873E1
-:1054C0001A9888732946F81C1A9A0FF09AFB0EA9AD
-:1054D00003A808F025FA0028BED1002C0ED0202108
-:1054E00068460173867332462146F81C0FF089FB2B
-:1054F0000EA903A808F014FA0028ADD17B4908A82A
-:105500000968007C08700020A6E7F0B504467848DA
-:10551000002695B0844276D301208004844202D3D1
-:1055200074488442F7D32378012B09D1704960680D
-:105530008842F0D39904884202D36E498842EAD364
-:105540006A490A681546C035A879022814D003288C
-:1055500012D0052810D009280ED00A280CD00B280C
-:105560000AD0012803D0002B06D0012B04D0687A82
-:10557000C506AD0F06D101E0082012E6850701D46B
-:10558000400701D511200CE6208A5E4F0546203DDC
-:10559000BD4207D3012B6ED10028FCD1658A002DB6
-:1055A000F9D111E0022B01D0032B01D1A02862D345
-:1055B000012B01D1002807D01578ED0704D0658AAA
-:1055C000002D58D0B42D56D8002B06D0012B08D072
-:1055D000022B04D0032BDED118E0002519E00225B0
-:1055E00017E0002802D1608A00280DD004256068E9
-:1055F000007800280DD001280AD0022808D00328FE
-:1056000006D03D48CDE563E00125F0E7032500E045
-:105610000126D07B01281CD1108A002819D0907B4C
-:105620008109012911D0800904D035483349EC3073
-:105630000FF083FC0120FEF701FE00280BD030485C
-:105640002E49F0300FF079FC05E00120FEF7C4FD93
-:10565000F3E7FEF7C1FB207A002806D0012806D028
-:10566000022806D0032806D106E0002705E001271E
-:1056700003E0022701E087E00327002D01D0022D7F
-:1056800048D1002F46D0E06800287DD0017900295C
-:1056900020D0082978D8027B082A75D800290AD09A
-:1056A000134B0168994213D301239B04994202D3FF
-:1056B000104B99420CD3002A10D080680C498842C4
-:1056C00006D301218904884208D30A49884205D2B9
-:1056D000102066E5027B002A6AD0DCE703480068F8
-:1056E0000078800710D00448401E5AE5540000207E
-:1056F000006001000020002002320000C0410000D4
-:1057000086080000E13F0000022D03D1022F4FD098
-:10571000032F4DD0182168460170218A4180218ACB
-:1057200081808571FE480068007A002801D0012838
-:105730007ED16946C8716846067221780930012910
-:1057400023D006210FF0BAFA07216846C173077407
-:1057500009A908F0E5F80028BBD10A2069460870BD
-:1057600009A9684608F0DCF80028B2D13A20694659
-:10577000087009A9684608F0D3F80028A9D1002DBF
-:1057800009D0022D07D04CE012E061680622491CC6
-:105790000FF037FAD8E7002F43D00026374623E032
-:1057A0000168B00009580978002903D0012904D004
-:1057B0000720F6E469468F7002E001216A46917085
-:1057C000E16806220968095800A8491C03300FF057
-:1057D00018FA0B206946087009A9684608F0A0F875
-:1057E0000028E6D1761CF6B2E0680179B142D7D83C
-:1057F00000266F4611E08068B10041581022B81CA5
-:105800000FF0FFF93B206946087009A9684608F0C7
-:1058100087F80028CDD1761CF6B2E068017BB14252
-:10582000E9D81B20694608700120887009A900E0AA
-:1058300036E0684608F074F80028BAD108A8407924
-:105840001B282DD12B000FF069FC0504040606046B
-:105850001E00032015E0B2480068C03080790300C4
-:105860000FF05CFC091E061E1E0A1E080C0E1E0010
-:10587000022006E0092004E0052002E00A2000E002
-:105880000B20FEF7E9FA012D0CD0608A002809D020
-:1058900000228300114610460CF05FF9002801D069
-:1058A00003207EE400207CE470B586B00C00064640
-:1058B00009D09C48844248D301208004844202D30A
-:1058C0009948844241D3964D2868C030C179022955
-:1058D00002D0407A400702D5112006B070BD002CDE
-:1058E00004D02046FEF779FB0028F6D13046FEF7BB
-:1058F0003FFB012803D0022823D08C48EDE721008C
-:105900001BD1082069468882286801ABC08805AA97
-:10591000002103F0F7F80028DFD16846808A0828C4
-:1059200001D00320D9E7684681888181C188C1817F
-:10593000018901824189418203A9304601F068FC56
-:10594000CBE7002C01D00620C7E71020C5E770B5D3
-:105950000C460546FEF70CFB012803D0022801D0B7
-:10596000724870BD21462846FEF7FAFB70BD00B5AF
-:105970000146143095B0192801D2880707D008468F
-:105980001E3004D00A3002D0072015B000BDFFF74A
-:10599000BEFC002801D01120F7E7614831220068E1
-:1059A000417068460270817009A907F0B9FFECE701
-:1059B00001B582B0022069460880594802AB0068F0
-:1059C0006A468088002102F00DFF69460988022995
-:1059D00000D003200EBD38B502216A46118052491D
-:1059E000884201D2102038BD4D49034609688C8891
-:1059F0000021204603F086F8694609880229F2D082
-:105A0000032038BD3EB50446082069460880454855
-:105A1000844206D301208004844204D34248844255
-:105A200001D210203EBD2046FEF7D7FA0028F9D15A
-:105A30002088694688806088C880A0880881E088BE
-:105A40004881374801AB00686A46C088002102F0EF
-:105A5000C9FE694609880829E4D003203EBD1FB568
-:105A600004460820694688812E48844206D30120D6
-:105A70008004844205D32C48844202D2102004B012
-:105A800010BD27480B46006803AAC088002103F018
-:105A900039F80028F3D169468989082901D0032003
-:105AA000EDE7694609882180694649886180694631
-:105AB0008988A1806946C988E180E0E7FEB50E4685
-:105AC0001849174605468E4206D30122920416480D
-:105AD000964203D3864201D21020FEBD1F2F01D96A
-:105AE0000C20FEBD0E4C8D4232D3954201D385422F
-:105AF0002ED3206801A9408802F026FE0028F0D1AC
-:105B0000287869464871206801A9408802F0FFFDA5
-:105B10000028E6D16946009008780221084307E092
-:105B2000540000200060010000200020023000002E
-:105B3000694608704979090703D008210843694676
-:105B4000087020686946408802F08BFD0028C8D1A3
-:105B500069460F8120683346408802AA002102F07E
-:105B600041FE69460989B942BBD00320FEBD38B564
-:105B70000C46F749002801D0884201D38C4201D25B
-:105B8000102038BD21886A461180002801D00029E4
-:105B90000BD0F049034609684D880021284602F0E1
-:105BA000B1FF69460988218038BD0C2038BD30B569
-:105BB0000C46E94987B08C4206D3012189048C4206
-:105BC00005D3E3498C4202D2102007B030BDE14D2D
-:105BD0002968C0310A7A520708D48A79521F130003
-:105BE0000FF09CFA05040604040604000820ECE704
-:105BF000497AC90901D00D20E7E7FEF7B9F9012874
-:105C000003D002282DD0D548DFE720881E2801D2F6
-:105C10000720DAE72868C030807906281FD00A20DC
-:105C2000FEF71AF905216846017000798108A0780D
-:105C30008900C007C00F014368460171FB20014085
-:105C4000A0788007C00F8000014368460171218859
-:105C5000C18009F072FE0028B7D00320B5E7072005
-:105C6000DEE70620B1E7F0B587B014460D46FEF733
-:105C70007FF9012804D0022802D0B84807B0F0BD4F
-:105C8000B44B18680146C0310A7AD20707D08A7926
-:105C9000062A04D9092A02D0002D02D050E008209B
-:105CA000ECE7AD4A944206D301229204944204D315
-:105CB000A74A944201D21020E0E7A278D206520F00
-:105CC000042A0CD8E378072B09D3102B07D82279A4
-:105CD0009A4204D3102A02D822881E2A01D0072013
-:105CE000CCE702468032966BF727F372966B2379E6
-:105CF0003373966B737A3B40A778BF06FF0FFF00A4
-:105D00003B437372966B2388F381966BA778B37AC3
-:105D1000FF079B089B00FF0F3B43B372FB273B40F1
-:105D2000A778966BBF07FF0FBF003B43B372926B20
-:105D3000A478537AE406DB08DB00640F2343537234
-:105D40000B226B461A70852D22D008DC002D17D04F
-:105D5000812D17D0822D17D0832D08D116E0862DE6
-:105D600018D0882D18D0892D18D08A2D18D00B2244
-:105D70001A71B622125C774C002A13D0A83012E0B8
-:105D80000022F5E70122F3E70222F1E70322EFE721
-:105D90000522EDE70622EBE70822E9E70922E7E71B
-:105DA0000A22E5E7002002908879072806D0082813
-:105DB00004D00A2804D00B2802D004E0062000E01A
-:105DC0000920FEF749F8684609F0B7FD002801D020
-:105DD000032053E720680422C030017A49084900B3
-:105DE00011430172002049E770B55A4E0D463168E3
-:105DF00086B0C031097A1446090701D408206CE541
-:105E0000FEF7B6F8012803D0022801D0534864E514
-:105E1000002D10D05048844206D3012080048442D3
-:105E200004D34B48844201D2102056E5012D0BD0FB
-:105E3000022D02D106E0002C01D007204DE5002004
-:105E4000029005E0022000E00120694608710294FA
-:105E5000032069460870684609F06FFD002801D0EC
-:105E600003203AE53068F722C030017A1140017210
-:105E7000002032E570B594B014460E46FEF778F86F
-:105E8000012804D0022802D0344814B070BD314D2E
-:105E90002868C030007A800701D40820F5E7002C7C
-:105EA00001D00720F1E7FFF732FA002801D01120D6
-:105EB000EBE7002E1DD02D21684601702C68BC2018
-:105EC000015B684641801022B11C01A80EF099FECA
-:105ED000207EFB210840B17CC907490F084320768A
-:105EE000B07CFF214008A075608A8231084360823F
-:105EF00007E02E21684601702868A030818B684633
-:105F0000418009A9684607F00BFD2968FD23C031CF
-:105F10000A7A1A400A72B8E710B50C46FEF728F85C
-:105F2000012803D0022801D00C4810BD0A48844241
-:105F300006D301208004844204D30548844201D260
-:105F4000102010BD2046FEF722F8002010BD0000F2
-:105F500000200020540000200060010002300000FA
-:105F600010B594B00446FEF703F8012804D00228C7
-:105F700002D0644814B0E9E763480068C030817912
-:105F8000042910D005290ED03820694608704C80AD
-:105F900001200871487109A9684607F0C1FC002872
-:105FA000E8D00B20E6E70020E4E710B594B0044603
-:105FB000FDF7DEFF012803D0022801D05148D9E7C0
-:105FC00051480068C030817904290DD005290BD0D3
-:105FD0003820694608704C8000200871487109A972
-:105FE000684607F09DFCC5E70020C3E74648006807
-:105FF000C0308079062801D3012070470020704707
-:1060000008B51346002806D040A0006800904879E3
-:106010006A468009105C18700622581C0EF0F1FDCB
-:1060200008BD00B587B0012069460870684609F0D0
-:1060300084FC07B000BD10B50446FDF785F9A22128
-:1060400001700ECC08300EC0FDF79AF97EE770B5EE
-:106050002D4C054601682068002911D02C4A914238
-:1060600006D301229204914204D32A4A914201D2DA
-:10607000102070BD102277300EF0C3FD2068012182
-:106080008030806B01722068A9880182C17B012960
-:106090000CD1807B800901280AD00120FEF7CEF8C0
-:1060A000002803D01C491D480EF047FF002070BD9A
-:1060B0000120FEF791F8F3E770B505460068124C31
-:1060C00000281AD01349884201D2102070BD2068E0
-:1060D000B8210958097A012909D0014677312930B8
-:1060E0000AF063FF206801218030806B0172216813
-:1060F0001022286877310EF084FD2068008AA8807D
-:10610000002070BD02300000540000200302FF0197
-:106110000060010000200020C041000003030000D7
-:10612000FFB581B001980E46C078174610360E377D
-:10613000022809D0032840D005287DD0F2A1F748D5
-:106140000EF0FBFE05B0F0BDCC890A2060430E3096
-:10615000188031230A98002A0380F3D04868008809
-:1061600090800020D0801081097B9481891FCDB25E
-:106170001AE030887168388048780A780002104345
-:10618000F880C8788A78000210433881BA1C091D4B
-:1061900028460BF058F8002D01D0002802D000202E
-:1061A0003871788008360A372046641EA4B2002869
-:1061B000DFD101990020C870C4E7CC890A20604370
-:1061C0000E30188032230A98002A0380BAD048681B
-:1061D000002500889080D5801581087B401FC0B2C3
-:1061E0000090948142E0716832880878FA803A79A8
-:1061F000C30752085200DB0F1A43FD231A408307DE
-:10620000DB0F5B001A43FB231A404307DB0F9B00A5
-:106210001A43F7231A400307DB0FDB001A43EF236F
-:106220001A40C306DB0F1B011A43DF231A40830603
-:10623000DB0F5B011A4300E020E0BF231A40430656
-:10624000DB0F9B011A433A71C00978718A784B7849
-:106250001002184338813A46C91C00980AF0F3FF2F
-:10626000002801D0BD703D8008360A372046641EE4
-:10627000A4B20028B7D10198C57063E7087BCC8928
-:10628000801E85B2284608306043103018803423C1
-:106290000A98002A03808FD04868174600889080AB
-:1062A0000020D080108194811037E000D581C01982
-:1062B0000CE030883880009878602A467168009831
-:1062C0000EF09FFC009808360837401900902046D1
-:1062D000641EA4B20028ECD16BE7FFB50546C07878
-:1062E00081B00C460A9E03000EF018FF0BA307179F
-:1062F00033414F6D8F9D9D9DA300207B174608283D
-:1063000006D0032804D085487FA154300EF015FE36
-:1063100004990E20088030200CE0207B17460428CA
-:1063200004D07E4878A171300EF007FE04990E204B
-:10633000088031203080002F44D060680088B88009
-:10634000607AFF300130F880E08938810020B88120
-:1063500037E0207B1746042804D070486AA18D30AE
-:106360000EF0EBFD04990E2008803220E2E7207B3E
-:106370001746022804D0694863A1A9300EF0DDFD5C
-:1063800004990E2008803320D4E7207B1746042888
-:1063900004D062485CA1C4300EF0CFFD04981021F7
-:1063A000018034203080002F0CD060680088B880D5
-:1063B000607AFF300130F880E08938810020B881B0
-:1063C000F881E870BEE6207B1746052806D006282F
-:1063D00004D052484CA1E1300EF0AFFD04981221D8
-:1063E000018035203080002FECD060680088B880B4
-:1063F000607AFF300130F880E0893881E089B88127
-:1064000000203882A988F981DBE7207B174607281E
-:1064100004D042483CA1F8300EF08FFD04990E20C4
-:106420000880362086E700962846049B00F02DFD64
-:1064300088E635A13A480EF080FD83E670B5054642
-:1064400000780C46082603000EF068FE124C343427
-:10645000241C380A0A0A0A0A0A0A0A0A0A0A0A4C00
-:106460006878002804D02E4827A12C300EF065FD56
-:10647000002C03D11F2024A1400108E060783043A4
-:10648000607020E0002CF9D17D201FA1C0000EF02B
-:1064900054FDF3E7002904D03F201BA100010EF0BA
-:1064A0004CFDFCF751FF0446407830436070FCF728
-:1064B00067FF08E01A4814A1473002E0184812A10B
-:1064C0004C300EF03AFD002C0AD06078000707D55A
-:1064D000932020702046582229460830FAF774FE8F
-:1064E000002070BD0E4808A15030EAE710B500202A
-:1064F0000C4C0D490346C2008C525218401C000639
-:10650000D370000EF7D010BD7372635C6761747452
-:10651000635F636F72652E63000000005A02000023
-:10652000B3030000FFFF000058000020FE49088070
-:106530000120887000207047FB4900208870704758
-:1065400010B50021F848C94301800021C17007F04F
-:1065500021FAD8E7F7B584B00546002768460781D9
-:10656000878068680C46008800F0ECFB0646287AB5
-:10657000032805D0002E03D1EC49ED480EF0DDFCD8
-:10658000297A2046C91E123000900B000EF0C6FD7D
-:106590000FF2F1F03D09AA465C6D34B3CDF38B8B5D
-:1065A000F000F078012803D0E049AD200EF0C5FCE2
-:1065B000A8896946C0000E30888030200881002CF0
-:1065C00022D068680188A180E7802781A989A181FC
-:1065D00000200DE0C100B27909190A74B288CA819D
-:1065E00082005219D3894B82128A401C8A8280B25F
-:1065F000A1898142EED8D7E002A8009001AB2246E3
-:106600002946304600F0CCFBF1E002A8009001AB37
-:1066100022462946304600F005FCE8E0F0780628DE
-:106620001AD0FF20C149223014E068680188A18097
-:10663000E7802781A989A181B188E181E989218247
-:10664000EA89296900982BE0F078062804D0FF2019
-:10665000B6493C300EF071FCE889694612308880FA
-:1066600035200881002CE0D1C1E0F078072804D063
-:10667000FF20AE4956300EF060FCA88969460E3006
-:10668000888036200881002CBED068680188A180EF
-:10669000E7802781A989A1812046AA890E3029692E
-:1066A0000EF0AFFA80E0E8896946123080B23822F5
-:1066B00088800A81002C79D068680188A180E780F1
-:1066C0002781A989A181287A102809D00221A173E4
-:1066D000E9892182EA89296900980EF092FA86E018
-:1066E0000121F4E702A8009001AB2246294630467A
-:1066F000FFF716FD7BE0F078082803D08B498D4822
-:106700000EF01BFC14206946888037200881002C7D
-:106710006DD068680188A180E7802781A989A1815F
-:10672000678227820120A0733EE0F078092804D018
-:1067300080487E4918300EF000FC288A69461430E3
-:10674000888037200881002C51D068680188A1809A
-:10675000E78004212781A173A989A181E989218288
-:10676000298A618220462A8A1430696998E702E002
-:1067700038E01CE024E0F0780A2804D06D486B492A
-:1067800033300EF0DAFB1420694688803720088108
-:10679000002C2CD068680188A180E7802781052122
-:1067A000A173A78127826782F77020E017E002A813
-:1067B000009001AB224629463046FFF78EFD16E0D9
-:1067C0000D206946392288800A81002C07D00120DB
-:1067D000E08055480188A1802781277307E006994A
-:1067E000088010E08F205149C0000EF0A6FB6846DB
-:1067F000069980880880002C05D068460089208092
-:10680000684680886080002007B0F0BDF7B594B07E
-:1068100015460F46149800F0A0FA04000AD0032091
-:1068200000F088FB022802D2E078002804D0112072
-:1068300017B0F0BD4048FBE71720694601260883E2
-:10684000002D0FD00321684601711021018210A88C
-:106850000246059004A928460AF01BFD00280DD029
-:106860000720E5E708216846017100210781C94337
-:10687000418105218673C90281810CE0A878A0714D
-:106880002888A080684605218673C902818100217D
-:106890000781C943418109AA023206A901A807F06C
-:1068A000B2F8002802D000F06BFAC1E707A8009008
-:1068B0006846038B04220321149800F051FB002842
-:1068C000B6D1E670B4E770B592B00D0006460ED0B2
-:1068D00000F043FA04000CD0032000F02BFB022848
-:1068E00002D2E078002806D0112012B070BD10202E
-:1068F000FBE71148F9E717216846818004210172FE
-:10690000298881816988C181012181740B490182B3
-:106910000AAA023201A902A807F075F800280FD0D0
-:1069200000F02EFAE1E700005800002008650000A2
-:106930003C04000063020000023000000228000056
-:1069400008A800906846838804220321304600F09E
-:1069500007FB0028C9D10221E170C6E770B592B0EB
-:106960000D0006460DD000F0F8F904000BD003200E
-:1069700000F0E0FA022802D2E078002805D01120C9
-:10698000B3E71020B1E7FA48AFE7172168468180E6
-:1069900004210172298881816988C1810121817462
-:1069A000F44901820AAA023201A902A807F02BF8D1
-:1069B000002802D000F0E4F997E708A800906846A4
-:1069C000838804220321304600F0CAFA00288CD1C3
-:1069D0000321E17089E770B592B00D0006460DD035
-:1069E00000F0BBF904000BD0032000F0A3FA02284A
-:1069F00002D2E078002805D0112076E7102074E755
-:106A0000DB4872E702216846017229888181698822
-:106A1000C181172181800AAA023201A902A806F0C9
-:106A2000F2FF002802D000F0ABF95EE708A8009062
-:106A30006846838804220321304600F091FA00283A
-:106A4000DBD10421E17050E7F0B591B015000E469E
-:106A500007460ED000F081F904000CD0032000F0AE
-:106A600069FA022802D2E078002806D0112011B07D
-:106A7000F0BD1020FBE7BE48F9E71721684681808A
-:106A800004210172298881816988C181B17881746A
-:106A9000318801820AAA023201A902A806F0B3FFD6
-:106AA000002802D000F06CF9E1E708A800906846E1
-:106AB000838804220321384600F052FA0028D6D1F8
-:106AC0000521E170D3E7F7B592B015460E4612984E
-:106AD00000F043F904000AD0032000F02BFA02284A
-:106AE00002D2E078002804D0112015B0F0BDA048F3
-:106AF000FBE70627002D12D0684607728681C58104
-:106B0000A5801720694688800AAA023201A902A836
-:106B100006F079FF002807D000F032F9E5E70521FB
-:106B2000684601728681EBE708A800906846838872
-:106B300004220321129800F013FA0028D5D1E7703F
-:106B4000D3E7F7B592B016460D000ED0129800F0BC
-:106B500004F904000BD0032000F0ECF9022802D263
-:106B6000E078002805D01120BFE71020BDE780485D
-:106B7000BBE7072768460772868117210495818045
-:106B80000AAA023201A902A806F03DFF002802D09D
-:106B900000F0F6F8A9E708A8009068468388042268
-:106BA0000321129800F0DCF900289ED1E7709CE7E1
-:106BB000F3B5172091B00C46002915D021780B00B1
-:106BC0000EF0ACFA062B05051A041C2B1520C01E6E
-:106BD000E28880B2002A02D0A368002B04D082424F
-:106BE00004D90C2013B0F0BD1020FBE7042905D018
-:106BF000A088002811D101E00620F3E7119800F0E9
-:106C0000ACF805000BD02078092701281AD00228FB
-:106C100007D0042824D0052835D00720E2E75448BF
-:106C2000E0E76846077161880181E1884181A068D9
-:106C300008260390304600F07DF9072829D34C48F8
-:106C4000801CCFE70C216846017161880181E188D1
-:106C50004181A06803900EE0E878002811D118E087
-:106C60000D216846017161880181A1884181E18817
-:106C70008181A06804900326304600F05BF9022869
-:106C8000EAD31120AEE70E2168460171217B017223
-:106C9000F1E717216846018309AA023206A901A873
-:106CA00006F0B1FE002802D000F06AF89AE707A8C3
-:106CB00000906846038B04223146119800F050F989
-:106CC00000288FD12178012907D002298AD00429F0
-:106CD00005D0052905D0032084E7082102E0EF70E4
-:106CE00080E70A21E9707DE730B591B00C46054692
-:106CF00000F033F8002808D0032000F01BF9022828
-:106D000005D31B48801C11B030BD1948FBE70F218B
-:106D10006846017104811721018309AA023206A97C
-:106D200001A806F070FE002802D000F029F8EAE77A
-:106D300007A800906846038B04220321284600F030
-:106D40000FF9E0E70C49884205D00C4909888142D7
-:106D500001D10A4870470020704710B5FFF7F2FFD5
-:106D6000002802D08178C90700D1002010BD0000A2
-:106D70000230000003280000FFFF00005800002040
-:106D8000002806D0012805D0052805D0062805D002
-:106D90000320704711207047082070475C487047F7
-:106DA000FFB583B003980C9EC0781D4614460F466D
-:106DB000012803D05749D2200EF0BFF8F889C0004F
-:106DC0000E30288030203080387B001FC0B2019008
-:106DD000002C26D078680088A0800020E0802081E8
-:106DE000F889A081002616E0F0000519C01900906E
-:106DF0002A4641690E3201980AF025FA002802D08D
-:106E000000202874E8810098761C008A6882009827
-:106E1000B6B2408AA882A089B042E5D80399002082
-:106E2000C870F1E4F8B50646C0781F4614460D4612
-:106E3000042804D0FF20374903300EF07EF8A889DB
-:106E4000062148430E30388033210698002C0180FB
-:106E50001AD068680088A0800020E0802081A9897D
-:106E6000A18103460CE01946062251434A1909192B
-:106E7000D789CF81977C8F74128A5B1C0A829BB260
-:106E8000A1899942EFD8F070F8BD70B51446054657
-:106E9000142204981A8037220280002C18D04868E7
-:106EA00000260088A080487AFF300130E080C88941
-:106EB0002081C889A0816682E878082809D009283D
-:106EC00011D00A2819D0134913480EF036F8EE7085
-:106ED00070BD087B0C2804D00F480E490C380EF00A
-:106EE0002CF8012012E0087B0D2804D00A4809493B
-:106EF00008380EF022F8042008E0087B0E2804D0A1
-:106F000005480449001F0EF018F80520A073DEE7BD
-:106F100003300000086500008203000001460020E5
-:106F2000F74A02E0401C082803D24300D35A8B42A0
-:106F3000F8D1704730B50446F14A0020163A11796D
-:106F400053790AE05518AD79A54201D1401CC0B271
-:106F5000491CC9B2102900D100218B42F2D130BDA9
-:106F6000FFB5E74881B0163841790A9C491CCDB27B
-:106F70001E46102D00D10025E14816380079A842A0
-:106F800002D1042005B0F0BD0820FFF7D3FF07466B
-:106F9000072804D9FF20DBA1A1300DF0CEFF029815
-:106FA000082801D1072F17D001982080301D60805C
-:106FB000002060712071E68003982081204606F051
-:106FC000D3FC00280AD0CE48029916384379821D96
-:106FD000995445710020D5E7CF48D3E7FF20C9A1D8
-:106FE000B3300DF0AAFF0320CCE7F0B58DB0044616
-:106FF00000256846057116468C460620FFF79AFF65
-:1070000000281CD121780127C807002801D01329A6
-:1070100017D9684687766178C17602218183C58356
-:1070200004A8009070680C23008805220621FFF751
-:1070300097FF002803D0B3A184200DF07EFF0DB090
-:10704000F0BDAF4816380278002AF8D0427863784D
-:107050009A42F4D1012918D0132919D16146062981
-:1070600016D10570002101200AF01CFE6846077148
-:10707000706801886846C1800021C9430181607938
-:1070800022790102114368461AE06146062908D0B8
-:10709000684600790028D2D0314601A8FDF7A7FE46
-:1070A000CDE70570002101200AF0FCFD684607715C
-:1070B0006079227901021143684601810021C943A8
-:1070C0004181E9E78E4810B50021163801704A1E4B
-:1070D000428041700171417101200AF0E3FD10BD51
-:1070E00010B5FFF7EFFF0020854902464300401C22
-:1070F000CA520828FAD310BD10B50446FFF7E2FFC4
-:107100007F4816384480002010BDDBE770470EB57D
-:1071100001216846017081498180C1800021FDF70D
-:1071200066FE0EBDF7B505460078002700090C463F
-:107130003E46012804D0FF2072A164300DF0FDFE10
-:10714000287A02280CD0FF206EA17A300DF0F5FECF
-:107150000298002C068001D0278066800020FEBDAA
-:10716000EA89702710460A3086B2002C0BD0686876
-:107170000088A080A8892081E28020460A30296901
-:107180000DF03FFDE4E702980680E7E7F8B54368B5
-:107190000246D9799C79090221435C7A1E7A25023C
-:1071A0005C88981D3543241FA1421DD11B79022BF9
-:1071B0001AD1042D19D0052D26D0062D19D0402D19
-:1071C00012D3061D0F4614462846FFF7A7FE0828CF
-:1071D0000AD01120207002202072A581E78126614B
-:1071E0006078082108436070F8BD001D00F0D9F8F0
-:1071F000F8BD041D0D46FEF7F9FE0028F8D029461B
-:107200002046FDF730FEF8BD001DFFF7EEFEF8BD8D
-:1072100010B53B4C8AB0163C2278012A26D01223A6
-:107220006A46937363789B1CD373082313820B887D
-:1072300053824B8893828B88D382C988118301A99A
-:1072400000910C2305220721FFF78AFE00280BD1AD
-:107250000022F023114601200AF07FFC012020705B
-:107260006078801C607000200AB010BD1120FBE720
-:10727000F8B5234C0027163C0646A51D1BE0607997
-:107280002179884204D187201EA180000DF055FE8F
-:107290002079405D042804D0082804D17F1CFFB267
-:1072A00001E0FDF7F2FD2079401CC0B220711028EA
-:1072B00001D1002020713046761EF6B20028DED1C2
-:1072C0003846F8BD10B50446402801D2072010BD4D
-:1072D000FFF724FE082802D03120000210BD002153
-:1072E000074802E0491C082903D24A00825A002AB2
-:1072F000F8D1082914D049004452002010BD0000E4
-:10730000DA1300207372635C6C326361705F636FC9
-:1073100072652E630000000004300000FFFF0000D3
-:107320000420EBE700B5402801D2072000BDFFF79D
-:10733000F5FD082805D000213B4A400011520846BF
-:1073400000BD052000BDF0B58BB016460C00074609
-:1073500007D0002E05D06188402904D207200BB049
-:10736000F0BD1020FBE72088002801D0172801D9A4
-:107370000C20F4E70846FFF7D1FD08280FD0258838
-:1073800003A82A46314602300DF03BFC01A80090CC
-:1073900062882B4608213846FFF7E2FDDFE705202B
-:1073A000DDE7F0B50E46074601468BB014460125D1
-:1073B000304606F0A5FC08281CD100206946088547
-:1073C0000120FFF7B7FD002802D117206946088584
-:1073D00003AB02330AAA39463046009407F0A3F8FB
-:1073E000002809D0022818D0032803D00F49FC2018
-:1073F0000DF0A3FD2846B2E76846038D002BF9D0B7
-:1074000001A800906068042200880121FFF7A8FD10
-:107410000028EFD00549E720EAE760780025102131
-:1074200008436070E6E70000DA13002004730000F0
-:10743000002803D08178012939D101E0102070475C
-:107440000188FA4A881A914233D01BDCF84A881A1C
-:1074500091422ED00BDC00292BD00320C002081A49
-:1074600027D0012825D001210903401A07E001286F
-:107470001FD002281DD0FF281BD0FF38013800285C
-:1074800015D116E0FF220132811A904211D008DC9A
-:1074900001280ED002280CD0FE280AD0FF2806D1E1
-:1074A00007E0012905D0022903D0032901D00020DB
-:1074B00070470F20704700B50A2821D008DC030070
-:1074C0000DF02CFE0A1C2024241A24282224261A1B
-:1074D000102819D008DC0B2816D00C2814D00D2841
-:1074E0001AD00F2808D111E011280FD0822807D018
-:1074F00084280DD085280DD0032000BD002000BDBC
-:10750000052000BDCB4800BD072000BD0F2000BDF9
-:10751000042000BD062000BD0C2000BD70B5002970
-:107520000BD0CB1FFA3B81241E46CDB2112B1BD2B0
-:10753000012805D0022806D009E0002010701DE0C7
-:10754000FF20043001E0FF200330814218D03300D7
-:107550000DF0E4FD11161313161316161316161656
-:1075600013131313161316000846FF3881381F280B
-:1075700003D9FF39FE39022902D81570002070BDE9
-:107580001470072070BD00B503000DF0C7FD0604A0
-:1075900006040C080A0C002000BD112000BD0720C5
-:1075A00000BD082000BD032000BD00780207120FB7
-:1075B00004D0012A05D0022A0AD10EE0000907D121
-:1075C00008E00009012805D0022803D0032801D0D3
-:1075D0000720704708700020704706207047002879
-:1075E00007D0012807D0022807D0032807D007209A
-:1075F0007047002004E0112002E0212000E031204B
-:1076000008700020704738B50C4605004FD0694619
-:10761000FFF7CBFF002822D120880321890288436D
-:10762000694609788907090D084320806946681C66
-:10763000FFF7BBFF002812D12188032000038143FC
-:10764000684600788007800C01432180A8784007B5
-:10765000820F2020012A03D0022A03D0072038BD40
-:10766000814300E00143218088B20105890F08D0E1
-:10767000012189038843A9780907C90F89030843B1
-:10768000208080B28104890F0AD0A9784004C906FD
-:10769000C90F400CC903084320808004800F02D129
-:1076A0002088400403D52088402108432080002002
-:1076B00038BD70B504460020088015466068FFF7A5
-:1076C000A2FF002815D12189A089814210D86168C4
-:1076D000594E8978C90707D0711E884208D83146AB
-:1076E0000DF009FB298009E0FF21FF31884201D913
-:1076F0000C2070BDFF30FF30033028806068807838
-:10770000C007A08903D031460DF0F5FA03E0FF3041
-:10771000FF30033081B229802068817847480173A7
-:1077200020684649008820394885002070BD10B582
-:10773000137804785B08E4075B00E40F23431370BD
-:10774000FD2423400478A407E40F6400234313704E
-:10775000FB24234004786407E40FA4002343137040
-:10776000F724234004782407E40FE4002343137034
-:10777000EF2423400478E406E40F2401234313702C
-:10778000DF2423400478A406E40F6401234313702C
-:107790000078BF244006C00F2340800103431370CC
-:1077A000002906D00878C10701D1800701D5012042
-:1077B00000E00020C0015906490E0843107010BDBA
-:1077C00030B50A8803239B0204889A4323059D0F42
-:1077D00002D1A3049C0F01D09B0F00E001239B0268
-:1077E0001A4303230A801B039A4303889804840FD7
-:1077F00002D11805830F01D0800F00E001200003A3
-:1078000002430A8030BDF3B591B00D0018D0119835
-:10781000002818D0122128460DF050FA01A90120A5
-:1078200007F07DFE00242646374677E00229000057
-:107830000128000003300000010200000C140020A9
-:10784000102013B0F0BD0720FBE76846007C01283C
-:107850000BD16846C1890520C002081A0AD0012848
-:107860000AD002280CD003280CD0042C0ED0052CF2
-:107870000FD10DE0012400E002246846868908E06B
-:10788000032406E068460424878902E0052400E01A
-:10789000062468468189119881423FD12C74002EBC
-:1078A0003AD00BA800900CAB10220021304607F014
-:1078B000C8FE002820D16846808D2A46C0B20CA997
-:1078C00009F0C1FC002817D1AE81002F24D00BA8ED
-:1078D000009006AB13220021384607F0B2FE0028C4
-:1078E0000AD16846808D06A9C01E0331C0B22A1D88
-:1078F00009F0A9FC002801D00320A2E76846817E98
-:10790000427E08021043E881062C05D16846007CBF
-:10791000A8726846C0892881002092E701A807F074
-:1079200006FE002891D0FFF7C6FD8AE7002804D0A4
-:10793000012903D0022904D003207047F949C98DD9
-:1079400002E0F8494031C988814201D100207047E6
-:107950000720704730B5F34C0025608B91B0C00B09
-:107960002ED1216900292BD0207B800728D4012229
-:1079700068460271027200224272228B8281A28AC0
-:10798000828204911721018309AA0023023206A9E9
-:1079900001A807F07BF9002803D0FFF7F4FD11B030
-:1079A00030BD207B02210843207307A80090694660
-:1079B0000B8B208804220121FFF7D2FA05460BE049
-:1079C000FBF7C2FC842101700921017218341ECC1E
-:1079D0000C301EC0FBF7D4FC2846E0E710B5D14CB4
-:1079E000034621690020002909D0214601221031D7
-:1079F0001846FBF783FE00202061A0820120217B36
-:107A0000F9221140217310BD70B50C4605461C21AA
-:107A100020460DF053F900202080002D08D0012DC4
-:107A200004D0C1A1C5480DF088FA70BD062000E061
-:107A30000520A07070BD10B507F050FB10BDFEB55D
-:107A40000546007800260C46374603000DF066FB1D
-:107A50000C91070C1D962F462F46486C899168683B
-:107A60000A38FBF7B0FD89E0002904D0B348AEA185
-:107A70001B300DF062FAFBF767FC044640780821E2
-:107A800008436070FBF77CFC78E0002C04D1BB203D
-:107A9000A5A180000DF051FA284601F0A2FA0028B5
-:107AA0006CD06078082108436070022666E0E888A0
-:107AB000694608800190002C04D1A0489AA12F307B
-:107AC0000DF03BFA287807281CD10198C00B19D07B
-:107AD000944800218171A988818012E003264DE03D
-:107AE000002C04D1C52090A180000DF026FA8D480D
-:107AF000017B89070BD50069002802D0E888C00BFC
-:107B00003CD00226607808210843607036E0291DC9
-:107B10008EC918308EC028380188022601222046DE
-:107B2000FBF7CEFD0127EDE7002C04D183487EA1B1
-:107B300064300DF002FA7B480821007B4007C00F3B
-:107B40004600607808436070002E17D1287901281C
-:107B500002D16879002811D02046FFF73FFF074681
-:107B60000CE0002CCED10D206FA180010DF0E5F9C5
-:107B7000C8E772486CA17A300DF0DFF9002C0CD008
-:107B80006078000709D5002F07D184202070204697
-:107B9000582229460830F9F717FB3046FEBDF7B5E5
-:107BA000027A88B00C46054620460C3004900692B6
-:107BB00016300027921E02903E460A3159481300A3
-:107BC0000DF0ACFA0ADF06E62AE62AE66A98C6E66F
-:107BD0004288002A02D052270726DDE051271E26C0
-:107BE000002C7DD06A684F481288A2800122A271C1
-:107BF0008079C0004019C089FFF705FE002877D1C1
-:107C000048488179C9004919C98921818079C00012
-:107C10004019408AA083BFE0688A00900698072830
-:107C200017D1E889C00B14D000985127223086B2B2
-:107C3000002C55D0A8890499FFF7E5FD002857D1FD
-:107C400068680088A0800220A071A8892081012096
-:107C500041E000985027203086B2002C40D0A889FF
-:107C6000FFF7D1FD002843D168680088A080A8896B
-:107C7000E080287A07280AD002202072288AA08370
-:107C80000098E083204669692030009A01E00120D5
-:107C9000F3E70CF0B6FF7FE0698A009101690029E3
-:107CA00002D0E989C90B22D00099512722318EB226
-:107CB00000218171A9898180002C5FD00088A0807B
-:107CC000A8890499FFF79FFD002811D10220A07117
-:107CD000A88920810420A072288AE083009801E00E
-:107CE0004CE005E020846969009A0298D1E70320FE
-:107CF0000BB0F0BD007B400702D55127222601E0E2
-:107D000050272026002C39D06868502F0088A0808A
-:107D100016D00220A0712146287B0831FFF774FE9F
-:107D20003AE00000EC1300207372635C67617474C6
-:107D3000735F636F72652E6300000000CB0200006A
-:107D4000287BA11DFFF760FE0020FFF747FE23E020
-:107D5000A9890089884207D154270626002C0DD016
-:107D600068680088A08017E053270826002C05D0FB
-:107D700068680088A080A889E0800DE00A980680E5
-:107D800010E055270726002CF8D00020A07103E052
-:107D9000FD49FE480DF0D1F80A98002C068001D06C
-:107DA000278066800020A3E7F9480021017220386F
-:107DB00001814181418081718180027BF9235208D8
-:107DC00052001A40027301618182704770B5F04C15
-:107DD00086B0203C208000206080A071A080694691
-:107DE000012007F09CFB102608E001990888024654
-:107DF0001207D20FB043120110430880684607F003
-:107E000096FB0500F1D02069002804D0DF48DE4948
-:107E100033300DF092F8207B800704D5DB48DA4937
-:107E200034300DF08AF8822D04D02846FFF743FB4A
-:107E300006B070BD0020FBE7D54810B52038017BA7
-:107E4000012211430173002141808171818006F07C
-:107E500019FB10BD10B5CE4C0020C043203C208043
-:107E60000020FFF7BBFD207B40084000207310BDC1
-:107E700070B5C74D0446203D287B800704D5C34814
-:107E8000C1494B300DF059F8287BC00706D128882E
-:107E9000C049884202D02869002801D0082070BD5E
-:107EA000002C08D0A088162801D2092070BD2068B7
-:107EB0002861A088A882FFF74DFD70BD10B50C4663
-:107EC00007F001FB002804D0C520AF49C0000DF029
-:107ED00034F82046FFF7EFFA10BDF0B5AC4D04467C
-:107EE000203591B00020089068820E462882E881F3
-:107EF0002946E8804039088669460883088508864F
-:107F000088838882A2480E90007A1746012808D0FC
-:107F1000022806D0032804D0042802D0082011B07B
-:107F2000F0BD9D498C425FD301208004844202D37E
-:107F30009A4A944258D398498E4255D301208004DE
-:107F4000864202D3954886424ED36068002814D0FA
-:107F50009149884248D301218904884202D38F493C
-:107F6000884241D360892189884203D80122520284
-:107F7000914201D90C20D2E7089010AA0CA93046F2
-:107F8000FFF797FB0028CAD106A92069FFF73BFB42
-:107F90000028C4D1206900280CD060788007002810
-:107FA0006846008B03DA8004800F6ED002E0800404
-:107FB000800F6AD16846008B810617D58004800F38
-:107FC000606805D0002811D0744988420CD301E0C4
-:107FD00000280BD07049884206D3012189048842C9
-:107FE00004D36E49884201D2102098E705A9606940
-:107FF000FFF709FB002892D16069002808D0684685
-:10800000808A0105890F01293FD18004800F3CD06F
-:1080100007A9A069FFF7F7FA002880D16846808A8F
-:10802000800632D46846808B81062ED4A16900294F
-:1080300006D00105890F012927D18004800F24D0A3
-:10804000E068002804D0007800281ED01C281CD22C
-:108050004F4A611C123220460992FFF768FB032148
-:1080600000208902884301218902411868460D9148
-:108070000185012181744A490182454A0FA91532BF
-:10808000306809F006F9002801D0072047E708A862
-:10809000007F3F49C01CC2B26A7100201031FF321C
-:1080A00000900190FF3203460291039003320AA927
-:1080B00004A807F0A3F9002827D135482038008EFE
-:1080C0000B903348338938303269014612390291B6
-:1080D00000930192039010A90A8873890CA9306853
-:1080E00007F08CF901007DD12948E98811308170B1
-:1080F000090AC1700026009631386A79008E31462F
-:10810000099B07F0FAF8002802D0FFF7D4F906E738
-:108110000E98807CC00928D068460D990185012100
-:108120008174292109020182AE81287B617840088F
-:10813000C9074000C90F08432873FD210840617832
-:1081400002228907C90F490008432873104800928A
-:108150002A30811C0191029000230396114A0AA93A
-:1081600004A807F04BF901003CD1606800283BD01F
-:10817000206900281ED106A90CA8FFF721FB607812
-:10818000800717D469460FE0287D00002204000014
-:108190000C140020FFFF0000006001000020002000
-:1081A0000328000003020000088B03210903884311
-:1081B00069460883012069468874FD480882208941
-:1081C000FC490CF098FD6268089BFB480192009303
-:1081D00002900A460396002306A904A807F00EF9A8
-:1081E000010000E07EE07DD12078C10601D4800648
-:1081F0002ED568460684606900280DD105A90CA813
-:10820000FFF7DEFA6846808A03218902884301214C
-:1082100089024118684681826946888A4821084354
-:108220006946888201208874E14808AA401C0882B7
-:10823000E1490192891C0220DE4A0291009000234C
-:108240000396921C05A904A807F0D8F8010063D191
-:108250002078C0072ED068460684A06900280DD17A
-:1082600007A90CA8FFF7ACFA6846818B03208002AF
-:108270008143012080020918684681836846818B0A
-:10828000402001436846818301218174C84908AABE
-:10829000891C0182C8480192001D0221C54A009133
-:1082A000029000230396921C07A904A807F0A6F8E1
-:1082B000010031D1E068002832D068460D9901856F
-:1082C00001218174BA49C91C0182E16808A80A78B1
-:1082D000027049784170E068418868464184E068EE
-:1082E000017900E018E008A80171E0680722C18860
-:1082F00008A84171090A8171AF4808A9801D009240
-:1083000001910290412200230396D2000AA904A8F9
-:1083100007F074F8010003D00B98FFF7CFFDFEE5DE
-:1083200003210E98002F017207D0E8883880E88971
-:108330007880288AB880688AF8800020EFE5F0B558
-:1083400001248BB016460F46012802D002281BD10B
-:1083500004E0684605218474C90202E06846974932
-:1083600084740182002F11D00321002089028843E8
-:108370000121890241186846018506AA05A93846E7
-:1083800008F087FF002803D00720B1E41020AFE4F5
-:10839000894DB8782E3D287338882F46203F788540
-:1083A0006A46127D0020294606AB00920E310193E9
-:1083B000FF32029103900346FF3203320AA904A858
-:1083C00007F01CF8002802D0FFF775F890E4002EA3
-:1083D00001D0F88D30802C72002089E470B592B005
-:1083E0000446012508A8857075496846018406F091
-:1083F0007CFF002208A90120FFF7A1FF064606F036
-:1084000078FF30003AD120780024C00700283FD000
-:108410001C2168460CF054FC68460178202001437A
-:108420006846017008A88570664968460184119401
-:108430000794817FF9200140891C684681770020DC
-:1084400001466846017700200146684641770421CD
-:108450008185C485018607A80A9011A80D9008A8F7
-:10846000099006F042FF0EAA09A96846FFF735FDFC
-:10847000054606F03EFF002D02D0284612B070BD22
-:108480004D486946098F4E3801816946898F41817F
-:1084900049482E3804720020F0E7F7B5464E9CB0EC
-:1084A00000212E3E0091317A012904D0022902D008
-:1084B00008201FB0F0BD40494E39CA8D824201D01C
-:1084C0000620F6E71D98824201D10720F1E73B48DC
-:1084D000012110AA9176401C1083002003239B02E7
-:1084E00002469A438B02D31810AA93846A46918459
-:1084F0003549D18410AA9077908317AA0A926A46C8
-:1085000091850C9009A807F031F8002425462746EC
-:1085100004A909A807F02DF8002810D082287BD1E3
-:10852000002C7CD0002D7AD010A804814581002435
-:10853000047518A8807812AD012872D07AE06846D8
-:10854000807D002F1FD0012862D16846818A1B4898
-:10855000401C814219D114A800906846408A0EAB95
-:108560001022002107F06DF8002877D110A8008AAA
-:10857000042801D006285BD16846018F1D988142EE
-:1085800046D10F2095E7012842D16846808A05210F
-:10859000C902884202D0491C884239D106484E3867
-:1085A000C18D6846408A814210D101270FE000004A
-:1085B00001290000010200003A14002001280000F7
-:1085C00001180000052A0000FFFF00000027002C12
-:1085D00001D0002D0DD01D99884219D114A9009108
-:1085E00004460EAB1022002107F02BF8002835D1ED
-:1085F00001E0009D0CE010A8008A022801D010289C
-:1086000016D1C0B218AA0EA908F01DFE00280FD17D
-:108610006846408A00907BE720E000E001E005200A
-:1086200047E72A1D15A918A808F033FE002801D035
-:1086300003203EE710A8007D0023001DC2B210A851
-:1086400002751E98029019A901950394009216A82C
-:1086500006F0D4FE002801D102213172FEF72BFF73
-:1086600027E73EB50B46401E84B201AA00211846FA
-:10867000FFF75DF806F039FE02A8009001AB012279
-:108680000021204606F039FE044606F032FE684618
-:108690000089012803D0FE49FE480CF04EFC20461C
-:1086A000FEF709FF3EBDF0B5FB4E0446307A89B0B7
-:1086B0000F46032804D0042802D0082009B0F0BDDA
-:1086C00004AA06A92046FEF7F4FF0500F6D1F248F9
-:1086D00023893830226901461039029100930192B2
-:1086E000039069460A8A638906A9206806F086FE17
-:1086F000002802D0FEF7DFFEE0E7002F03D0E648B7
-:10870000203000893880042030722846D6E738B5FA
-:108710000C00054608D00022694606F0ECFF002850
-:1087200004D0FEF7C8FE38BD102038BD694620468B
-:10873000FEF769FF0028F8D1A0786946C207D20F7A
-:10874000284606F0F3FFECE73EB50C0008D002AA7D
-:10875000694606F0D0FF002804D0FEF7ACFE3EBD0F
-:1087600010203EBD032120460CF0A8FA6846008880
-:1087700001A90005800FFEF732FF00280BD16846E3
-:10878000007920706846008801A98004800FFEF7F8
-:1087900026FF002801D003203EBD684600796070A6
-:1087A000A278EF20024068460088C10B09010A4305
-:1087B000F7210A404104C90FC9000A43A270F921F8
-:1087C0000A40800601D5012000E0022040006946F1
-:1087D0000243097A50084000C907C90F0843A07036
-:1087E00000203EBDFEB51D4614460E46074606F067
-:1087F0007CFD01A8009022882B463146384606F0C1
-:108800007CFD054668468088208006F072FD28467B
-:10881000FEF751FEFEBDF0B50C46002199B00746AB
-:10882000684681850D46002C11D0E068002806D0EE
-:10883000A06800280BD002886B469A850180A0783A
-:10884000012806D0022804D0072019B0F0BD10205E
-:10885000FBE72088002807D0401E80B201A906F05F
-:108860005EFE002842D136E08C48EEE769468A89F0
-:1088700021888A420BD26846007C002501282CD131
-:108880006846C0898649884227D1012525E08A4269
-:1088900003D1002D2FD06D1C01E0022D02D0032D3D
-:1088A0001BD31FE06946097C012916D169467C4B20
-:1088B000CA895B1ED11A9A421DD005DC7948101A6C
-:1088C00019D0012809D116E0012914D0FF39013946
-:1088D00003D1032506E00D26B60201A806F027FE07
-:1088E0000028C3D0822804D0002806D0FEF7E3FD7C
-:1088F000ABE7022DFAD13046A7E7E068002813D095
-:1089000006F0F3FC0BA800906A46A1882088928D9F
-:10891000E36806F0F2FC054606F0EBFC002D19D1E9
-:108920006846A168808D088002980078C00601D54D
-:108930005D488AE706F0D9FC0EA800906846808959
-:108940000CAB0222002106F07CFE054606F0D1FCAD
-:10895000002D01D02846C9E76846008F022801D0C3
-:10896000032072E7A078012808A8007C03D08007C4
-:108970000ED4082069E7C007FBD00820FEF7DAFA1A
-:10898000072802D34548401C5FE70825022001E084
-:1089900002250320694608762188684681831721CD
-:1089A000818611AA002302320DA906A806F06EF9ED
-:1089B000002802D0FEF7E7FD47E70FA800906846C1
-:1089C000838E042229463846FEF7CAFA3DE770B581
-:1089D000064615460C460846FEF72AFD00280AD131
-:1089E00006F083FC2A4621463046FFF7A8FC0446E1
-:1089F00006F07FFC204670BD70B514460D46064655
-:108A000006F073FC224629463046FFF746FD044631
-:108A100006F06FFC204670BD70B51E4614460D0072
-:108A20001AD0002C18D06168002915D00121FEF75A
-:108A30007DFF00280FD12068FEF7FAFC00280AD13C
-:108A400006F053FC324621462846FFF746FA044614
-:108A500006F04FFC204670BD102070BD70B5154665
-:108A60000C0023D00221FEF761FF00280ED1206800
-:108A7000FEF7DEFC002809D106F037FC2946204627
-:108A8000FFF711FE044606F034FC204670BD0000DE
-:108A9000287D00003E0600000C140020033000007A
-:108AA0000328000000280000013400001020EDE73A
-:108AB000FEB50746FF481C4615460E46824218D3AF
-:108AC000002C01D0844214D3384600F047FA002825
-:108AD0000AD1002C0FD101AA6946384606F00BFED8
-:108AE000002802D0FEF7E7FCFEBD6846008880063D
-:108AF00001D41020FEBD23462A4631463846FFF7F2
-:108B000071FEFEBDFFB585B01E4614000F4609D0AC
-:108B100003AA02A9059806F0EEFD002804D0FEF78E
-:108B2000CAFCCBE51020C9E568460089C00601D51E
-:108B3000E148C3E506F0D9FB01A800900023DF4A15
-:108B40003946059806F07DFD054606F0D2FB002D5E
-:108B500011D1002E0CD006F0C8FB00200090228816
-:108B600033463946059806F06CFD054606F0C1FB14
-:108B70006846808820802846D1E7002906D0D04B5F
-:108B80000A885B899A4201D8CE48704743E610B5FF
-:108B900086B004236C46A382C94B1C89002C07D0E5
-:108BA0005B898B4201D2914204D9C64806B010BD00
-:108BB0000620FBE76B4619825A8200210091019141
-:108BC0001C800221997005A9029104A903916946AC
-:108BD000FFF721FEEAE7F0B591B00D468120694626
-:108BE000087105F081FC0646002D08D02878B44CA9
-:108BF000012806D0022828D0072011B0F0BD10208F
-:108C0000FBE7A98801AAFEF789FC0028F5D1B00787
-:108C100034D568460079002820D1A879C0071DD036
-:108C200006F063FB002000906A892989A088EB6820
-:108C300006F063FB6946087106F05BFB694608793C
-:108C400000280BD0FEF737FCD7E7A98801AAFEF76A
-:108C500065FC0028D1D1342006420FD0012168469E
-:108C60000172017301794173F00609D5A188684644
-:108C70000182A18A01832069059004E00820BCE7F5
-:108C8000A08869460882FAF75FFB05461720694607
-:108C900088830AAA2B46023207A902A805F0F6FF2C
-:108CA00007466878000701D5FAF76AFB002F03D062
-:108CB0003846FEF768FCA0E7F00603D5207B0621C6
-:108CC00008432073B00602D50020FEF787FE08A8EF
-:108CD000009069468B8B208804220121FEF740F921
-:108CE0008BE7F0B5002695B014460D4600290FD04D
-:108CF000022C4FD3A71EBAB270480AF037FE2919CA
-:108D00001039CA7B8B7B11021943884242D1BCB215
-:108D100001A9012006F003FC7AE0029F38880107D0
-:108D200076D5002D41D0A9190691CA788B78361DC9
-:108D30001102B6B219438919A1422BD869468A8912
-:108D400006994B7809781B020B439A4222D1C00640
-:108D500023D506F0CAFA07A800900698AB19C17887
-:108D600080780A020699024348780978000208438D
-:108D7000002106F0C2FA009006F0BBFA0098002825
-:108D80003ED10698C178827808026946898B1043E3
-:108D9000884202D00B2015B0F0BD0698C1788278C9
-:108DA00008021043801986B22EE0C0062CD50020A0
-:108DB00007AA01461154401C80B21028FAD306F0CD
-:108DC00094FA06A80090684600238089102219466C
-:108DD00006F037FC0090002803D006F08AFA0098CD
-:108DE0000EE00BA86946009088890A8B07AB00212A
-:108DF00006F083FA009006F07CFA0098002803D071
-:108E0000FEF759FBC7E703E0388810218843388014
-:108E100001A806F08CFB002800D17EE7284D698868
-:108E2000002921D001226846027602770024447787
-:108E30000184172181850EAA234602320BA906A8B8
-:108E400005F024FF002802D0FEF79DFBA3E70CA845
-:108E5000009069468B8D288804220121FEF780F856
-:108E6000002898D16C8096E7002094E7F0B50024A4
-:108E700087B015460E46002A04D002A9012006F04C
-:108E80004EFB4CE0102007B0F0BD039800780007BF
-:108E900045D506F02AFA01A8009068460023008A0A
-:108EA000064A194606F0CDFB074606F022FA002FC7
-:108EB0002ED109E00020002001340000FFFF000057
-:108EC000EC13002003300000002E23D06846808879
-:108ED000298820183719001D814230D36946098A34
-:108EE0003970090A797069468988B970090AF97078
-:108EF00006F0FBF901A869460090088A8A883B1DA4
-:108F0000002106F09EFB074606F0F3F9002F01D082
-:108F10000320B8E7684680882018001D84B202A8A4
-:108F200006F005FB0028B0D0822802D0FEF7C3FA75
-:108F3000A9E7002E0ED02988A01C814201D20C2066
-:108F4000A1E72246314639480AF010FD3119087070
-:108F5000000A4870A41C2C80002094E700B585B05E
-:108F60006946FEF750FC00280AD16846007C0300E1
-:108F70000CF0D4F808052F2F2F2F080805310320F7
-:108F800005B000BD68468078012807D16846008892
-:108F90000321C902401A1CD001281AD068468079E2
-:108FA000012806D16846808815214902401A052803
-:108FB0000FD96846807A012811D168460189292095
-:108FC0000002081A05D0022803D0032801D0042883
-:108FD00005D10F20D4E7164916480BF0AEFF00204C
-:108FE000CEE738B5144A0021518003791AE0CC004D
-:108FF0002418A46800946C462488250707D5E50644
-:1090000005D5D90008182038C08B508006E06404CC
-:1090100006D59171C9000818C0889080012038BD1C
-:10902000491CC9B28B42E2D8002038BDFFFF0000C6
-:10903000287D000033020000EC1300200120F949D4
-:109040004006C861704770B5F64D0024AC702846E4
-:109050006C7020304470C4736C61AC72AC6209F007
-:10906000FEFEA861284630300AF098FD002804D0A2
-:10907000FF20EDA13A300BF060FFEF48C463012000
-:109080004006E86170BD70B50125EC4902260E600E
-:10909000E949CD63EA49C96A09070ED4E849403174
-:1090A000CB6AE84A53620B6B93624B6BD3628B6B58
-:1090B0001363C96BD30519435163DA49E24CC9699B
-:1090C00000282BD001282DD0FF20D7A169300BF02C
-:1090D00034FFDE48A063FF20043060632563DC4971
-:1090E000032008602061D849962040314860DA4862
-:1090F000D8494163D649FC390163D649091FC16388
-:10910000D349F03981630320D349000340394860D3
-:10911000D24910204860D248066070BDD1486061D5
-:10912000D14804E0D048E0306061CF48801F01435F
-:10913000A161CEE7BB49012008707047B949002002
-:109140000870704770477047BF4940310028086871
-:1091500002D00122104301E040084000086070473F
-:1091600070B50C46AF4D01460622E81C0BF049FDD8
-:109170006C7270BDAB48203040787047A94A91703E
-:109180005070704770B50D460446082904D9FF2079
-:10919000A5A1C6300BF0D1FE0022B44809E0910031
-:1091A000635809180B6053001B191B8C0B62521C6F
-:1091B000D2B2AA42F3D3206BAC494031086070BDF3
-:1091C0000B23DB4310B5C21A9F4998421FD008DC1D
-:1091D0001C3222D00A2A20D0142A1CD0182A08D1E6
-:1091E00017E0083011D004280DD0082809D00C2829
-:1091F00005D0FF208CA1F2300BF09FFE10BD0420A3
-:109200000CE000200AE0FC2008E0F82006E0F42052
-:1092100004E0F02002E0EC2000E0D820C86010BD9F
-:1092200080482030007B704710B5874CC178616260
-:109230000BF048FD0002E06110BD252808D026286B
-:1092400008D0272808D041000A2807D8091D06E0C1
-:10925000022105E01A2103E0502101E0891DC9B275
-:10926000794A916078494031486170476D49486159
-:10927000704770B56B4CA07200F01FFBA07AC0075E
-:1092800040D0734D2868800703D467A178480BF05D
-:1092900054FEA07A01061DD5800707D5744862A147
-:1092A000801C0BF04AFEA07A000613D520786A4E87
-:1092B000012816D0002804D051205BA1C0000BF07B
-:1092C0003CFE6C487061A0693061FF20624901304A
-:1092D00040394860A07A800714D52868C00708D1B3
-:1092E00002E06448001FEDE761484FA11A300BF01F
-:1092F00024FEA07A4007286801D5042100E0082157
-:109300000843286070BD70B50021464C012561748A
-:10931000002807D0012818D002281AD0544842A1AA
-:1093200045380BE000F0C9FA52482178001F0129A6
-:1093300007D0002907D011203BA140010BF0FDFD13
-:1093400070BD056070BD456070BD8120FFF791FF65
-:1093500070BD00F0B2FA6069002804D1452032A146
-:10936000C0000BF0EAFD6169A06A40184249C8607C
-:1093700039484249403001603E490C31416008148F
-:1093800035494039486027482030C57370BDF8B56D
-:109390000C2069460870314C6068C006C50F102665
-:1093A000A66034480021FC300161324B01221B1FB2
-:1093B0001A610BE000BF00BF00BF00BF00BF00BFCD
-:1093C00000BF00BF6B461A78521E1A706A461278A8
-:1093D000002A02D00269002AECD0016168460078B8
-:1093E000002804D1224810A131380BF0A6FD002D31
-:1093F00000D06660F8BD0B490020C861704710B509
-:109400000BF060FC00021049000AC86310BD0B4954
-:10941000022008607047094902200860104908606E
-:1094200070470000481400207372635C68616C5FD1
-:109430007263732E63000000C01F004080E100E0F3
-:109440008000001000170040001500405B0600007F
-:10945000001200404480004040F5014000130040ED
-:1094600080E200E006010200250003000016004033
-:109470007702000004100040408500404C8100400D
-:10948000F74902200860CBE7F6490870C8E710B535
-:10949000F5480AF08BFB002803D0F449F4480BF0A0
-:1094A0004CFD10BD10B5F0480AF098FB10BDF14915
-:1094B0004860B5E7EC4910B53039EF4B0022C86081
-:1094C0005A60896A0818ED49486000F0FDF910BD3E
-:1094D000E54810B5C6213038C160E74A0021516027
-:1094E000806AE649C630486000F0EEF910BD012000
-:1094F000E34940028860DC4900203039C860DF4918
-:1095000048608DE7D84900203039886288E7D6481E
-:10951000DA493038806AFE30886081E7D749002018
-:1095200088607DE7D7480168102291430160D649E1
-:109530000120886174E7D5490020C861D1480168DD
-:109540001022114301606BE700B5FFF7EBFFC6493E
-:1095500000203039087400BD00B5FFF7ECFFC249A8
-:1095600001203039087400BDC849CA69012A01D0F8
-:10957000002055E7BF4A403292685206520E5242CE
-:1095800002700020C86101204AE7F8B5BF4C20698D
-:10959000012806D00021B44830380078012802D0D4
-:1095A00004E04021F7E7E268012A04D000220A43E0
-:1095B000012802D004E02022F9E76168012905D0E2
-:1095C00000211143B24A002802D007E01021F8E739
-:1095D0001368012B02D1E368012B04D000230B4355
-:1095E000002802D007E00823F9E71168002902D11A
-:1095F000E168012905D000221A439F4E002802D0BD
-:1096000004E00422F8E77168012904D00021114325
-:10961000002802D004E00221F9E76068012829D07F
-:1096200000259C480D4301680906090E02D06169B6
-:10963000012900D000218C4F103F397300680006CB
-:10964000000E02D0A069012800D0002078738B485A
-:109650008068002803D000F03BFA012800D00020E9
-:10966000B8730021E160216161606161A161716095
-:109670002846F8BD0125D4E77B4930394874CFE648
-:10968000F8B5794E0127103EF07B0025002826D042
-:109690007C4C206800902560FFF779FE00982060E0
-:1096A0007A48C5600561456045618561744900146B
-:1096B00088603446203C2178734801290BD000296A
-:1096C0000BD06B486949B9300BF037FCF573607CFF
-:1096D000022879D0F8BD0760F8E74760F6E7FFF7A2
-:1096E00054FF0446604D0020303D68746348426872
-:1096F0006A620068A8622978002909D1A97800293E
-:1097000006D05C4B5B681B780B406978994309D0A5
-:1097100000213170E10707D0104602F016FD01214B
-:10972000A86A08E03770F5E7A10601D5022102E03A
-:10973000A10702D5002102F017FD4E4F79680622DD
-:109740000931E81C0BF030FA002807D1687A7968F3
-:109750000978C909884201D1012000E00020707019
-:10976000204600F0BBF83F48C6260078002816D0F7
-:1097700001282AD002283DD003285AD093203B4903
-:10978000C0000BF0DAFB287C002804D028780028E1
-:1097900064D0FFF7C7FE2878002860D086E0A007D5
-:1097A00001D501F0CDFB200703D50120EE6001F0CB
-:1097B000EFFB600703D50020EE6001F0E9FBA00697
-:1097C000E1D501F06DFBDEE774E0A00701D503F001
-:1097D00005FF200703D50120EE6003F07EFE600741
-:1097E00003D50020EE6003F078FEA006CBD503F091
-:1097F000FFFDC8E7A007BF27002802DA3C40F9F7C1
-:10980000F5FB200704D53C400120EE60F9F7EDFBA5
-:10981000600704D53C400020EE60F9F7E6FBA006A7
-:1098200002D53C40F9F7E0FB6006ACD5F9F7DFFB69
-:10983000A9E7A00701D5F9F7DDFB200703D5012033
-:10984000EE60F9F7D6FB600703D50020EE60F9F76C
-:10985000D0FBA00697D5F9F7CBFB94E71CE01EE000
-:1098600000E100E06000002078140020289400004F
-:10987000AD020000001500404081004040850040DE
-:1098800000F50140001200400010004000110040AF
-:109890000014004040160040FFF74DFE7BE7E868EB
-:1098A000002803D0A96A091828484160687C01286B
-:1098B00000D00FE7F9F7ACFBF8BD2549032008609D
-:1098C000881524498860ABE5224823494030C161AE
-:1098D000224981611F4940154860A1E570B50546E0
-:1098E000FFF7EBFF1E4CA17A080701D568071CD4CF
-:1098F0001C4AC80605D5507B002802D0907B002862
-:1099000013D0880602D5107800280ED1480602D55B
-:109910005078002809D000208A070026002A07DA9C
-:109920004A0704D50122227002E00120F4E72670E4
-:10993000CA0709D0AA0705D4890705D5002803D08E
-:10994000A80601D4FFF723FDA67270BD4085004034
-:109950000012004000F5014010100040448100401A
-:1099600048140020681400202E4800210170417026
-:10997000704770B5064614460D460120F7F7ACFE59
-:1099800028490120284B08709E60DC601D6170BD75
-:10999000F8B504460120F7F79FFE22490120087020
-:1099A00021494C60214900264E600321204D890247
-:1099B000A960204F002C0AD0012C03D01EA140200A
-:1099C0000BF0BBFA3E60032080026860F8BD38608F
-:1099D00001208002F9E710B51248017800290ED065
-:1099E0000321134A8902916010494A680021002A24
-:1099F00003D0154A1268427000E0417001700020E7
-:109A0000F7F76AFE10BD07480178002907D007481C
-:109A10004068002802D00C480068C0B27047407807
-:109A2000704700006100002000F5004000F1004098
-:109A300000F5014000F200407372635C68616C5F86
-:109A400063636D2E6300000000F40040364800217F
-:109A50000170417010218170704770B50646144640
-:109A60000D460220F7F738FE01202F492F4A0870D3
-:109A7000E41E14619660556070BD10B50220F7F7C2
-:109A80002BFE29490120087029480021016041600E
-:109A900081602849C014486010BD10B5224C207860
-:109AA000002811D001202349C002886000F02EF860
-:109AB0000021002804D0012060701F48006801E0E8
-:109AC00061701020A07021700020F7F705FE10BD16
-:109AD00010B515480178002905D000F017F80028C6
-:109AE00000D0012010BD407810BD10B50E4801789F
-:109AF000002909D000F00AF8002803D00E480068B9
-:109B0000C0B210BD102010BD807810BD084801689B
-:109B1000002905D04168002902D08068002801D0C2
-:109B200000207047012070476300002000F50040CE
-:109B300000F1004000F5014000F4004010B528217C
-:109B40000BF0BCF810BD40788006800E704740785E
-:109B50008006800EC01C70472820704770B50546EF
-:109B600000780A0700090001120F104328700B004B
-:109B70000BF0D4FA07050705070509050B000624B5
-:109B800008E00C2406E0222404E00024FEA1582072
-:109B90000BF0D3F96878800980012043687070BDAC
-:109BA00000780007000F704710B50622C01C0BF0AC
-:109BB00028F810BD0B4610B5C11C062218460BF044
-:109BC00020F810BD10B5062209300BF01AF810BDB0
-:109BD0000B46014610B50622093118460BF011F864
-:109BE00010BD0278BF23C9071A40490E0A4302700C
-:109BF000704700784006C00F704702785206520E38
-:109C0000C9010A43027070470078C009704770B5F7
-:109C10000C460546C11C2046062209300AF0F1FF19
-:109C200020784006400E207029784906C90FC901E6
-:109C30000843207070BD70B515460E4604461F2AB5
-:109C400003D9D1A1A9200BF078F920462A46314644
-:109C500009300AF0D6FF6078AD1D80098001A906A1
-:109C6000890E0843607070BD70B5054640780E4699
-:109C70008406A40E062C03D2C3A1B9200BF05DF913
-:109C8000A41FE4B21F2C00D91F2429462246093103
-:109C900030460AF0B6FF204670BD70B515460E4638
-:109CA00004461F2A03D9B8A1CD200BF046F920465F
-:109CB0002A46314609300AF0A4FF6078AD1D8009BC
-:109CC0008001A906890E0843607070BD70B5044616
-:109CD00040780E468506AD0E062D03D2AAA1DE20E1
-:109CE0000BF02BF9AD1FEDB21F2D03D9A6A1E22079
-:109CF0000BF023F921462A46093130460AF081FF4C
-:109D0000284670BD10B504220F300AF07AFF10BD4E
-:109D10000B46014610B504220F3118460AF071FFB8
-:109D200010BD10B5032213300AF06BFF10BD0B46B7
-:109D3000014610B50322133118460AF062FF10BD28
-:109D40004176090A81767047817E427E080210437F
-:109D50007047C176090A01777047017FC27E080209
-:109D6000104370474177090A81777047817F427FAE
-:109D7000080210437047C175090A01767047017ED9
-:109D8000C27D08021043704781757047807D70471F
-:109D900020300279C90652095201C90E0A430271E4
-:109DA000704720300079C006C00E7047203002791D
-:109DB000D206D20E49010A43027170472030007961
-:109DC0004009704710B505221F300AF01AFF10BD78
-:109DD0000B46014610B505221F3118460AF011FF47
-:109DE00010BD30B5411C837E0A461902D37D447EE6
-:109DF000927D1B0221431343674D827D8C1FAC4231
-:109E000010D8002A0ED0082A0CD88A420AD28B42D7
-:109E100008D8817F427F08021043A91D884201D8DB
-:109E2000012030BD002030BD00210A464254491CAB
-:109E30002229FBDB70474078C006C00E704740788F
-:109E4000C006C00EC01C70472220704710B50278B3
-:109E50008B07920892009B0F1A43027042785209B6
-:109E600052014270012908D0022906D0032905D0E9
-:109E7000FF2045A1A3300BF060F810BD01210A437B
-:109E8000427010BD10B502788B07920892009B0FAC
-:109E90001A4302704278520952014270012908D0D7
-:109EA000022906D0032905D0FF2037A1BD300BF0D1
-:109EB00044F810BD01210A43427010BD00788007AC
-:109EC000800F70470278FB23C9071A40490F0A43E5
-:109ED0000270704700784007C00F70470278F72380
-:109EE000C9071A40090F0A4302707047007800073B
-:109EF000C00F70470278EF23C9071A40C90E0A4302
-:109F0000027070470078C006C00F704770B50546F4
-:109F1000C1700B000BF002F90E080A0C0E101212A1
-:109F20000C14141212160C180C2413E0082411E05F
-:109F300002240FE017240DE00D240BE0012409E0BA
-:109F4000092407E0062405E0452000240EA1C000F6
-:109F50000AF0F3FF6878400940012043687070BD43
-:109F6000C078704770B5044640780E46C506ED0EC1
-:109F70001B2D03D904A109480AF0DFFF6019C01C9A
-:109F8000042231460CE000007372635C756C5F70F4
-:109F900064752E63000000007A0C00003A02000095
-:109FA0000AF02FFE70BD70B5044640780E46C50617
-:109FB000ED0E1B2D03D9A049A0480AF0BEFF611980
-:109FC000C91C042230460AF01CFE70BDC171090A8A
-:109FD00001727047017AC2790802104370474172DA
-:109FE000090A81727047817A427A080210437047E9
-:109FF000C172090A01737047017BC27A08021043DB
-:10A0000070474171090A817170478179427908026C
-:10A010001043704701717047007970474173090A16
-:10A0200081737047817B427B08021043704730B5D3
-:10A03000411C037A0A46C4791902214353791479E1
-:10A040001B0223437E4D00798C1FAC4210D80028A0
-:10A050000ED008280CD888420AD28B4208D8D07A71
-:10A06000917A00020843A91D884201D8012030BD21
-:10A07000002030BD10B50522001D0AF0C2FD10BD44
-:10A080000B4610B5011D052218460AF0BAFD10BD99
-:10A090004172090A81727047817A427A080210433C
-:10A0A0007047017170470079704710B50822001D94
-:10A0B0000AF0A7FD10BD0B4610B5011D0822184679
-:10A0C0000AF09FFD10BD0A7802734978417370470A
-:10A0D000027B0A70407B4870704710B508220E3032
-:10A0E0000AF08FFD10BD0B46014610B508220E3157
-:10A0F00018460AF086FD10BD10B5042216300AF08D
-:10A1000080FD10BD0B46014610B5042216311846DD
-:10A110000AF077FD10BD10B50822001D0AF071FD90
-:10A1200010BD0B4610B5011D082218460AF069FD46
-:10A1300010BD10B504220C300AF063FD10BD0B46B3
-:10A14000014610B504220C3118460AF05AFD10BD24
-:10A15000017170474171090A81717047C171090A23
-:10A160000172704700797047817942790802104383
-:10A170007047017AC2790802104370470171704735
-:10A1800000797047017170470079704710B5082257
-:10A19000001D0AF036FD10BD0B4610B5011D08224A
-:10A1A00018460AF02EFD10BD10B50822001D0AF059
-:10A1B00028FD10BD0B4610B5011D082218460AF0F7
-:10A1C00020FD10BD70B515460E4604461B2A04D965
-:10A1D0003720194900010AF0B0FE2A463146E01C3A
-:10A1E0000AF00FFD6078E90640094001C90E0843F6
-:10A1F000607070BD70B5054640780E46C406E40E2A
-:10A200001B2C04D9DF200C4980000AF096FE224660
-:10A21000E91C30460AF0F5FC204670BD4078C006C7
-:10A22000C00E1B2801D8012070470020704710B5D0
-:10A2300022220AF0E6FC10BD889F000043020000C5
-:10A240007A0C0000FEB50F46044601460646203053
-:10A250002546C031603640350190032F04D0002FD1
-:10A260002DD0012F2BD04BE000206080A080E0801B
-:10A2700020816081A082E085E0826874A074E0742F
-:10A28000A076E076A073E07320746074019B9874EC
-:10A2900001232B74A88228830876E883B070688332
-:10A2A000A873E87320776077019988720199087420
-:10A2B00030727072B0723274B074A883FEBD002028
-:10A2C000A8822883012F52D0E08B0090608C0290EE
-:10A2D000C00000990AF00FFD401C80B2E88200998E
-:10A2E000192241439202914201DD401EE8827D2005
-:10A2F000000200990AF0FFFC401C3080002F01D0C2
-:10A30000022FDBD10198007AC1060198C90E0172B3
-:10A3100000206873221824218B5C4032D9075B0827
-:10A32000DE07C90FF60F71185B08DE07F60F71180C
-:10A330005B08DE07F60F71185B08DE07F60F711871
-:10A340005B08DE07F60F71185B08DE07F60F76185C
-:10A350005908891911726A7B401C5118C0B269737F
-:10A360000528D7D3002FA9D10020A874FEBD4A7FAD
-:10A370002046E030022A12D0097F022913D050A1D2
-:10A3800073200AF0DAFD012000900290E08BA98B87
-:10A39000484300990AF0BDFCA883029898E7818899
-:10A3A00000910089F1E7018A0091808AEDE770B59C
-:10A3B00004464034667B0546002E68D0252E66D8BC
-:10A3C000002964D03E20405DA27B4843101825211F
-:10A3D0000AF091FC0846A1734207C908520F3C4B92
-:10A3E000691820319A5C09798A4367D031460AF0AE
-:10A3F00082FC491CCAB2002006E0002804D02918BB
-:10A400004031C979511ACAB2291848235B5C93427A
-:10A410003AD320310979C943CB07DB17D21A521E30
-:10A420001206120E34D08B07DB17D21A521E1206F8
-:10A43000120E2FD04B07DB17D21A521E1206120E25
-:10A440002BD00B07DB17D21A521E1206120E27D082
-:10A45000CB06DB17D21A521E1206120E23D08B0621
-:10A46000DB17D21A521E1206120E1FD04B06DB1734
-:10A47000D21A521E1206120E1BD00906C917511A03
-:10A48000491E0A06120E17D0401C0528B5DB70BD08
-:10A49000C00013E0C000401C10E0C000801C0DE0B4
-:10A4A000C000C01C0AE0C000001D07E0C000401D45
-:10A4B00004E0C000801D01E0C000C01DE07370BD5D
-:10A4C0007372635C6C6C5F7574696C2E6300000062
-:10A4D0005451010010B5FF48002101704170817096
-:10A4E000C17041718171C171083009F057FB0028BA
-:10A4F00004D0FF20F8A184300AF01FFD10BD10B574
-:10A50000F44900204872081D09F048FB002804D0D7
-:10A51000FF20F1A1C3300AF010FDFFF7DBFFF14887
-:10A52000FFF782FC0021EF48FFF7E4FC0121ED4832
-:10A53000FFF78CFC10BDE2E71B207047E5494A7A23
-:10A54000002A01D0002070474881012048727047DE
-:10A5500010B5E0494A7A002A02D04989814201D0E7
-:10A56000002010BDDB48001D09F020FB002804D0AE
-:10A57000FF20D9A1B4300AF0E0FCD648001D09F054
-:10A580002DFBFFF7A7FF012010BD70B5D14C0025B2
-:10A59000627A002A02D06289824201D00D700DE0F9
-:10A5A000227863789A4203D322786378D21A04E03F
-:10A5B00062782378D21A10239A1A0A70FFF7C8FF1C
-:10A5C000002801D06572012070BDC2494A7A002A74
-:10A5D00004D04989814201D1012070470020704791
-:10A5E000BC490A784B78521C1207120F9A4207D0C6
-:10A5F000097822225143BC4A891801600120704722
-:10A6000000207047B34801784278491C0907090FB8
-:10A61000914206D00178491C0907090F01700120F9
-:10A62000704700207047AB494A7A002A04D0498914
-:10A63000814201D10120704700207047A5490A7866
-:10A640004B789A4207D0497822225143A64A89186A
-:10A650000160012070470020704710B59D4C2078A4
-:10A660006178884216D06078401C0007000F607047
-:10A67000201D09F09BFA002804D0E078401CE0700F
-:10A68000012010BDA078401CA0709248001D09F068
-:10A69000A5FAF5E7002010BD8E4801784078814288
-:10A6A00001D101207047002070478A480178427824
-:10A6B000914202D30178407803E041780078081A8B
-:10A6C0001021081AC0B270470F20704770B5814C36
-:10A6D0000D46617A002916D06189814213D1002686
-:10A6E0002E70201D09F062FA002805D1A07828708C
-:10A6F000A670201D09F072FA2878E17840182870B9
-:10A70000E670012070BD002070BD76490160704781
-:10A7100070494A7A002A04D04989814201D1012036
-:10A720007047002070476B494979002901D000200B
-:10A7300070476E49016001207047664841790029E1
-:10A7400001D00020704701214171084670476149DE
-:10A750004A7A002A04D04989814201D101207047F8
-:10A76000002070475B494979012901D000207047DA
-:10A770005E4901600120704756484179012901D0A6
-:10A7800000207047002141710120704751484079F5
-:10A79000012801D001207047002070474D494A7AB6
-:10A7A000002A04D04989814201D10120704700204C
-:10A7B000704770B5474C0546A0790721401C0AF048
-:10A7C0009AFAE079814208D0A0792221484347498A
-:10A7D000223140182860012070BD002070BD10B5E6
-:10A7E0003C4C0721A079401C0AF085FAE0798142AF
-:10A7F00007D0A0790721401C0AF07DFAA171012041
-:10A8000010BD002010BD33488179C079814201D14B
-:10A8100001207047002070472E494A7A002A04D050
-:10A820004989814201D1012070470020704710B54D
-:10A8300004462848083009F0B9F9002815D12549FF
-:10A840008879CA7990420CD0C87922214843274997
-:10A850002231401820601F48083009F0BFF901205C
-:10A8600010BD1C48083009F0B9F9002010BD10B522
-:10A8700004461848083009F099F9002815D11549FF
-:10A880008879CA7990420CD0C87922214843174967
-:10A890002231401820600F48083009F09FF901204C
-:10A8A00010BD0C48083009F099F9002010BD094886
-:10A8B00010B5083009F07AF9002822D1054CA079AA
-:10A8C000E17988421AD0E0790721401C0AF013FA96
-:10A8D000E1710DE0660000207372635C646D5F716E
-:10A8E0002E630000AC1700207C1400209C16002072
-:10A8F0002046083009F072F9012010BD0C4809F01B
-:10A900006DF9002010BD0A4808388179C07981426C
-:10A9100001D101207047002070470548083881792F
-:10A92000C079814201D101207047002070470000AA
-:10A930006E00002070477047FF20704770477047D7
-:10A9400000207047002070470020704700207047AB
-:10A95000002070470020704700207047002070479B
-:10A96000002070470120704700207047002070478A
-:10A970000020704700207047F8B5FE4D0446287F40
-:10A98000002600280AD0002921D1667010202070EE
-:10A99000687FA070A87FE0702E7718E0A879012862
-:10A9A00001D00020F8BD002911D16670F149E87985
-:10A9B00001270831002801D0132000E00520207075
-:10A9C0001422A01C0AF01DF9A771EE71AE710120CE
-:10A9D000F8BD70B5E8480078002802D00C26304653
-:10A9E00070BD0026E34D3446203DAE74EE746E75A6
-:10A9F000AE752E7528466E7320384673E87D0028A4
-:10AA000004D0FEF78BFDFFF748F8EC75D948847148
-:10AA1000C47104772030FFF791F8D6484830FFF72B
-:10AA20008DF8DCE710B5D44C00232370D14C203CCA
-:10AA3000E375D04B01241C71603B583307C3FFF70B
-:10AA4000C8FF002803D0CDA1FF200AF076FA10BD80
-:10AA5000C8482038807C7047F8B5C64D0646407B14
-:10AA6000203DE873C34837791346AF73B27B427118
-:10AA70000446603C217006221946601C0AF0C1F8A9
-:10AA8000B07960730622F11DE01D0AF0BAF8687B08
-:10AA90000126002800D0EE74B6484038407B0028DC
-:10AAA00000D02E753B000AF039FB0504062347064B
-:10AAB000490000211DE0AF4801212030FFF74EF88A
-:10AAC000AC48E11D2030FFF77DF8607B002807D0FF
-:10AAD000012807D0FF20A9A142300AF02EFA0CE08D
-:10AAE000002100E00121A3482030FFF786F804E0B0
-:10AAF0000621A0482030FFF731F800206875A875BE
-:10AB00009C48611C2030FFF74FF89A48217820308C
-:10AB1000FFF767F8974804214830FFF71FF895487A
-:10AB2000611C4830FFF740F8924821784830FFF721
-:10AB300058F8AE740020F8BD0221DAE7FF208FA19B
-:10AB40004C30CAE770B58B4C0125203C0246A575F8
-:10AB500088488079002801D03A2070BD8548603847
-:10AB60000378934206D1002262750622401C0AF047
-:10AB700048F86575002070BD70B504467D4D002015
-:10AB8000203D28752846224632380AF03AF82846F1
-:10AB9000203844730120287570BD764908717047CC
-:10ABA00010B5744C0022203CE274607302462046CB
-:10ABB00012380AF026F80120E07410BDF8B500F054
-:10ABC00044FB6C4C0025203CE07D002804D0FEF7BF
-:10ABD000A5FCFEF762FFE575674E3570FEF762FC77
-:10ABE000A07B012804D00021084601F077FAF8BDC7
-:10ABF0000021022001F072FA5E4CA07901270028A2
-:10AC000007D0207F0028F2D105206077A57727772D
-:10AC1000F8BD70780028FBD0564906226039487B81
-:10AC20006073C91D0846673009F0EBFF3C202072B5
-:10AC3000A7717570F8BD10B54E4C203CE17B207CAF
-:10AC4000CA0701D0C2070BD08A070FD582070DD4DF
-:10AC50002620FEF7F2FA207C02210843207410BD62
-:10AC60002520FEF7EAFA207C0121F6E74907F6D510
-:10AC70004007F4D42720FEF7E0FA207C0421ECE71B
-:10AC800070B53D4D2878002873D13A4C203CA07C0B
-:10AC900000287DD0FEF7FBFB0026267466746E70DC
-:10ACA0003046FEF7F1FB0020FEF7EDF93748FEF7DE
-:10ACB000BBFA2546403D296E8857FEF781FA334896
-:10ACC000C01EFEF79CFBFEF712FCFFF7B4FFFEF779
-:10ACD00031FAFEF7D5FB0120FEF715FB0F21052009
-:10ACE000FEF74CFA2978681CFEF73AFAA07B012897
-:10ACF0000CD004280AD0E07C002807D02146123965
-:10AD00000846627B5230FEF796FFE674207D0028ED
-:10AD100008D0184840380146427B12398830FEF787
-:10AD2000BCFF2675607D00280BD01248691C2030BE
-:10AD3000FEF73AFF0F48691C4830FEF735FF66758D
-:10AD4000A675E86D0178002903D00178001DFEF793
-:10AD500019FAA86D0178002907D00178054A401C2E
-:10AD60007332FEF77AFE0120E075FEF79BFB0020B0
-:10AD700070BD0DE030180020740000207372635C19
-:10AD80006C6C5F6164762E63000000005F5101000F
-:10AD90000C20EDE7FE494860704770B50546FEF7A8
-:10ADA000A6FB002D06D00020FEF763FAFEF7C2F9DD
-:10ADB000FFF741FFF74C607C002809D0A07B0128F9
-:10ADC00003D1F549F5480AF0B8F8FFF7F7FECFE7E9
-:10ADD000002D15D0A07B01280CD0FF202D30FEF7D0
-:10ADE00045FA0220FEF78FFAEA4820300079012860
-:10ADF00003D005E099208000F1E70220FEF73CFC3B
-:10AE0000E4484030FEF753FB012008F084FDFEF7D4
-:10AE100099F9A07B03000AF081F9050404040604F3
-:10AE20000A00032000E00120FEF723FA04E0DB48DB
-:10AE3000D9492A300AF081F8E17B207C8143012046
-:10AE4000002903D1A17B012903D06074D049087087
-:10AE50008EE700212174F9E710B5FEF718FBCC4806
-:10AE6000007800280ED1CB48807C00280AD0002032
-:10AE7000FFF793FFF6F7A5FAC648203000790128BE
-:10AE800006D007E000F0E1F9FEF70CFB0C2010BD46
-:10AE9000F8F7BEF8002010BDBD490120487070478A
-:10AEA00070B500F0BEFF00281BD0B94E3078B94C09
-:10AEB0002034012818D0022801D0032834D0B64904
-:10AEC000B7480AF03AF83078002809D0F6F779FA4E
-:10AED0003078022804D12079012801D1FEF7CCFB7B
-:10AEE00046E7FFF76BFE43E7AA4DA87B03281BD07C
-:10AEF000FEF7EEFAE87D002803D0FEF7BEFDFEF770
-:10AF000006FBA4489030FEF7D2FA012008F004FDB9
-:10AF1000A87B01280CD004280AD061796F20012970
-:10AF200008D0032906D006E00120FFF736FFCAE764
-:10AF3000012000E07F20FEF79CF902203070C2E77C
-:10AF400010B59448C07D002803D0FEF7E7FAFEF75D
-:10AF5000A4FD00F066FF002817D08D4C2078022851
-:10AF600004D08F488C492B3009F0E7FF0120FFF710
-:10AF700014FF2078002807D02078012804D08848C2
-:10AF80008549333009F0D9FF10BDFFF717FE10BD1A
-:10AF9000F1B582B0FEF744F90746FEF799FD0128A6
-:10AFA00029D000267A480078022804D07C487A49C3
-:10AFB000563009F0C2FF774DE87D002803D0FEF738
-:10AFC000ADFAFEF76AFDFEF792FA72489030FEF78E
-:10AFD000E7FD0446029800286DD0FEF7CBF8002864
-:10AFE00069D020466B4C030020340AF097F80664C1
-:10AFF0006464066425640126D4E7A87B01285AD03E
-:10B00000042858D0374304D16079002801D00228A1
-:10B0100051D160486830FEF74AFA012008F07BFC05
-:10B020000120FEF726F95A480321017020790128F2
-:10B0300044D1FEF721FB41E056489030C178D0382A
-:10B04000C27991421DD10146D0310A79037A9A42E0
-:10B0500017D14A79437A9A4213D18A79837A9A42EC
-:10B060000FD1CA79C37A9A420BD10A7A037B9A42EA
-:10B0700007D10978407B4906C90F814201D10121DE
-:10B0800000E00021A87B012801D0042801D100297B
-:10B0900008D100280FD1374304D16079002801D0AE
-:10B0A000012808D13B489030FEF79BFE002802D0D3
-:10B0B000A87D002812D00120FFF76FFE34480178E8
-:10B0C00000290AD00178012907D00078032804D08C
-:10B0D000324831492A3809F030FFFEBD2C4F2D4946
-:10B0E000786804229F31343009F08BFD29484021D3
-:10B0F000903000784006C20F78680A54254906222D
-:10B100009331413009F07DFD224978680322A33153
-:10B11000383009F076FD1F483B219030827D7868F9
-:10B120000A541C4990310A7ECB7D12021A43828751
-:10B130008A7E4B7E12021A43C2830A7FCB7E1102A3
-:10B1400019430184134990318A7F4B7F11021943BF
-:10B15000418410490522AF31243009F052FD0D49D8
-:10B160007F68B0310879C20638462030D20E009090
-:10B17000827709794909C177A079002819D0207F01
-:10B18000002856D1E07900280CD013200BE00000F5
-:10B1900074000020101800207CAD0000E7030000C0
-:10B1A00093020000052060770020A077012020771F
-:10B1B0003FE0E97D2B48002924D000212172B98984
-:10B1C00061814021C95D617339460622413109F030
-:10B1D00018FDF88BA082388CE082788C2083009850
-:10B1E000C07FA076E07E400840003043E076FEF766
-:10B1F0007CFCE17E4000C907C90F0143E1760120D4
-:10B20000E07115E000212172B98961814021C95D99
-:10B21000617339460622413109F0F3FCF88BA082B4
-:10B22000388CE082788C20830098C07FA076012043
-:10B23000A0710D4C0020207000F007F8FEF732F9E5
-:10B240000120616800F04AFF38E710B5FEF75AF9AF
-:10B25000FEF74DF9FEF79BF80020FEF70AF8FEF71F
-:10B26000DAF810BD3E180020740000208107C90ED6
-:10B27000002808DA0007000F08388008FA4A800022
-:10B280008018C06904E08008F84A800080180068CF
-:10B29000C8400006800F704710B500F079FF10BD60
-:10B2A00070B5F34C0546A26800290DD0002A04D0E1
-:10B2B000FF20F0A1363009F040FEA560F6F782F8D5
-:10B2C0000220F6F779F870BD002A04D1FF20E9A129
-:10B2D0003E3009F032FE0020A060F6F774F801203D
-:10B2E000F6F772F870BDE2480C30C07E002801D03D
-:10B2F0000020704701207047DD480C30C07E704749
-:10B30000DB483430C07E70470021C1768176016011
-:10B310004162D7480C30C07E002807D1D448343071
-:10B32000C07E002802D1D24901200870704710B5B4
-:10B330000B46C17E847EA14204D01146184607F018
-:10B34000A6FB10BDFFF7E0FF10BD38B5C84C606824
-:10B3500001684978012924D00121684606F050F996
-:10B3600068460078C749000209F0C5FC60680268B9
-:10B37000C0685268511807F0A7F96168C860BC49F5
-:10B38000606834310022884215D0018B002912D028
-:10B390004272032101720271021D017FFFF7C7FF94
-:10B3A00038BD7D21C068C90007F08EF96168C860AA
-:10B3B000B5480861E3E7018B491C01830221417212
-:10B3C000E7E7FFB5AA4E01460C36706A3468056897
-:10B3D00085B060680190306A03906A880798801A87
-:10B3E00080B202900898002804D0274638372046BB
-:10B3F000483002E0371D2846643000900320387141
-:10B40000002915D001297DD0022951D003297AD0F5
-:10B41000AF2098A1C00009F090FD08980028387965
-:10B4200072D0032803D093A1984809F086FD3BE130
-:10B43000306A002804D195488EA1723809F07DFD4C
-:10B440009249A88F9F3948434018069900F0A6FEFC
-:10B45000A0618E49E88B9F394843069900F09EFE13
-:10B46000E0618A4AA88F9F3A316A50430918A0695F
-:10B47000874A091A89183B22A162844B525D9F3B7F
-:10B480005A4382181018FF30163020626062306A0A
-:10B49000081AFF38ED213538C9008842BDD27D49F0
-:10B4A000884204D2794873A1653809F046FDB7E0B7
-:10B4B000764AA88F9F3AE16850430818069900F031
-:10B4C0006DFEA0617149E88B9F394843069900F0F1
-:10B4D00065FEE061306A002804D16C4865A15D38E2
-:10B4E00009F02BFD5820405B6B4A0028A88FE168CB
-:10B4F00020D050430818A169401AA0622169A068B1
-:10B50000484302E01FE04EE0C9E0A169624A4018EA
-:10B510003B21495D514341180818FF301430206227
-:10B52000E88BE1695043411A0F208001081A6062DC
-:10B53000A06A35E050430818A169401A3168D33831
-:10B5400049684018D9E7284640300190008B002810
-:10B5500002D0306A002804D14C4846A1453809F091
-:10B56000ECFCE88B4C49E3694843C01AA06201999E
-:10B570009C460A8B2169A368521A4B43A16959184A
-:10B5800063465343C9183B22525D434B5A438A18C2
-:10B590005118FF31143121620F218901411A616272
-:10B5A000316A401A35E00898002803D03420005D45
-:10B5B000002873D1E88B38494843E169401A029961
-:10B5C0004843A062284640300490008B0028019830
-:10B5D00029D0002804D02D4826A11F3809F0ADFC41
-:10B5E00004982D4A018B02980818E16948434000ED
-:10B5F000FF3014302062E88B5043411A0F20800145
-:10B60000081A606200F0C4FD00281CD0A16A0398EB
-:10B61000081AFF38ED212338C900884200D3FCE620
-:10B6200002203871F9E6002802D00398002804D1DE
-:10B63000164810A1263809F080FC0198A16AD33879
-:10B640000818A062CCE706F0A8FD0146706907F073
-:10B65000CDFFA16A081AFF38ED211E38C9008842C3
-:10B66000DDD2012009B0F0BD00ED00E000E400E013
-:10B67000C81800207372635C6C6C5F6C6D2E733045
-:10B680002E63000010270000B78913008105000019
-:10B6900036040000A3020000E20400002AE00328B0
-:10B6A00002D1FD4907200870A16A706907F00CF803
-:10B6B000B860616A206A884202D90098016001E09E
-:10B6C000009908600098F54900680818F860A98892
-:10B6D0000798081A00B2002801DD022000E00020CF
-:10B6E0007871089838700898002805D03420005DDB
-:10B6F000002801D00220B5E70898012148402034F5
-:10B700006075317F3A463046FFF711FE0020A9E709
-:10B7100010B5E14900284A68516A096807D01268E3
-:10B72000C98BDF4BD2695943891A09F0E4FA10BD7D
-:10B73000F8B5D94F35227868416A0C680168525CC7
-:10B74000002A0AD0498E6288914206D1407A0028A8
-:10B7500003D1D449D44809F0F0FB06F01EFD0146A0
-:10B760007868406907F042FFFFF7D2FF7968658883
-:10B770000B682E185A8EB24202DB521C5A8602E027
-:10B78000401C2818588608683622125C002A05D109
-:10B79000428E23899A4201D1521C4286088B03288B
-:10B7A00002D2401C088302E00868408EA080204638
-:10B7B0004030C18A808A081A6188401E401885B2CC
-:10B7C000203416E0496AE67F097976004B00B749D4
-:10B7D000007DCB5A895BC91889B20023FFF7F1FDC0
-:10B7E000002811D0012810D0AF48AE493A3009F0F6
-:10B7F000A4FB79680868428EAB1A1BB2002BE1DA11
-:10B800000820E07400F00DFEF8BD78680068418EF5
-:10B81000491C4186EDE770B59F4D1F202870A86830
-:10B8200000210162C27E130009F078FC0454540325
-:10B830004654426A146802681170026851600068D8
-:10B840002030407D002808D106F0A7FCA9680968CF
-:10B85000096C07F0CBFE002815DCA86801684A8E49
-:10B8600061888A4204D12289511A6181628004E090
-:10B87000511A61810168498E61800268C168116452
-:10B88000C16841610FE0A8680168098E6288891A61
-:10B8900061810168098E618001680A6CC2600A6C6E
-:10B8A0004261886C6066204601F06FFC00280ED073
-:10B8B0007B487C49D33808E0C1684161FFF7E0F973
-:10B8C000002804D076487749CD3809F036FBF5F7E3
-:10B8D00078FD70BD72487349C638F6E710B56E4AF8
-:10B8E0000B00526809F01AFC0906090F1F0C2D2DD8
-:10B8F000082A2D00FFF78FFF10BD00F05DFC10BD82
-:10B90000FDF7BEFE10BDD07E022806D0D07E0328F3
-:10B9100006D00120634940020DE0FFF709FF10BD8A
-:10B92000FFF713FD10BDD07E0228F6D0D07E03288D
-:10B93000F6D05C495E4809F000FBF1E706F013FC25
-:10B9400010BD5B4857490F3009F0F7FA10BDF3B549
-:10B9500081B0514C02982546002601270C35030082
-:10B9600009F0DCFB0906313C3C3143433C3C4300DD
-:10B97000494801210C30FFF793FC02990198FFF729
-:10B98000ADFFE87E022828D1A0680468406A0668F6
-:10B9900006F0E2FBF18B424A5143E269891AD3393E
-:10B9A000FF223232E162904202D24248081802E09D
-:10B9B000081A41494018E0624048E16A814200D8D3
-:10B9C0000846E06206E001460198FFF787FFE87E3F
-:10B9D000022802D1286820300775FEBD0146656047
-:10B9E0000198FFF77BFF6660FEBDFF202D49AB305D
-:10B9F00009F0A3FAFEBDF8B5064627480D46002417
-:10BA00003430254F0B0009F089FB09060C10100C8F
-:10BA1000161610101600204801213430FFF740FCA4
-:10BA200029463046FFF75AFFF8BD78603046FFF7E9
-:10BA300055FF7C60F8BDFF201A49DF3009F07DFA20
-:10BA4000F8BDF0B5144C0020616885B003268E76F1
-:10BA5000CA7E0746032A03D0C97E00293FD03FE0B3
-:10BA6000087F002804D112480E49CE3009F065FA4B
-:10BA70006068057F684606710221417106F08DFB02
-:10BA80000290FF20F530039001216846017069465D
-:10BA9000284606F0FCFF14E0C81800201917000023
-:10BAA000E204000074B60000620600006451010068
-:10BAB0000B0200007CF8FFFFADF9FFFF3812000019
-:10BAC00020BF6068007F07F01DFE0028F8D0606886
-:10BAD000007F06F048FB60680777FFF715FC012040
-:10BAE00061688F7605B0BEE5FE494A68907600E051
-:10BAF00020BF4A68D07E002803D0D07E937E984233
-:10BB0000F6D0D07E002803D0002000219176704727
-:10BB10000120FAE770B5F34900240C31CA7EF14DDB
-:10BB2000032A03D02831CA7E032A17D1696000286E
-:10BB300010D001280AD0EC49EC4809F0FEF90020A9
-:10BB40006968002C0860686008D070BD0320FFF7AA
-:10BB5000CBFF01E0FFF775FF0446F0E70C2070BD56
-:10BB6000F8B5E04F04461F25E67E330009F0D6FA0B
-:10BB7000042A20031B20DB480C30844203D0DA491E
-:10BB8000DB4809F0DAF902207C60FFF7ADFF0028FE
-:10BB900005D07968002008604862786012E00C25C2
-:10BBA000002078600BE00120FFF7B4FF054604E0B9
-:10BBB000CF48CD490C3009F0C0F9002D02D0E07E0D
-:10BBC000B042D1D1E07E002804D0C948C649123025
-:10BBD00009F0B3F9F8BDC34810B50C30FFF7C0FF4A
-:10BBE000C0483430FFF7BCFFBE4900205C31087507
-:10BBF000C0494870BB490C3148610A46283250613F
-:10BC00008876907601220C390A708860486010BDF1
-:10BC100070B504460120FFF729FBC5B20B20FFF7E2
-:10BC200025FBC0B2854204D0B148AF49343809F091
-:10BC300084F90120FFF71AFBC5B21820FFF716FBA5
-:10BC4000C0B2854204D08920A749800009F075F967
-:10BC50000420C043FFF70AFBC5B21920FFF706FB1B
-:10BC6000C0B2854204D0A2489F49323809F065F934
-:10BC7000A0489C490C38047000200C31C8768876A6
-:10BC80000A462832D07690769A4B0124083B1C71E4
-:10BC900018604862506208601060FFF79CFF70BD3A
-:10BCA0009048007870479349083908717047F3B598
-:10BCB0000D468C4983B00C31CA7E08462830894C29
-:10BCC000002A02D1C27E002A03D0C97E022903D0F5
-:10BCD00005E08948616006E0C17E002901D00C20A2
-:10BCE00000E76060854806F0EAF9616808776068F7
-:10BCF00080490160007F002804D17C487A4962387D
-:10BD000009F01BF906F028FA7D49884200D208465E
-:10BD1000FF30C83086B260680321C1760027012D4C
-:10BD20002FD0734A03991A32514302685160006858
-:10BD300001210170684605F063FC6846007871498E
-:10BD4000000208F0D8FF019106F027FA0199711856
-:10BD500006F0BAFC6168032DC86021D06A4808610A
-:10BD6000606803210172022141720771021D017F87
-:10BD7000FFF7DDFA60680783072020700020676006
-:10BD8000B0E606F00AFA314606F09EFC6168C8602B
-:10BD90005E48086108680770096801204870DFE79D
-:10BDA0005B48DCE77047F8B54E4E0C36F17E002953
-:10BDB00004D131462831C97E002901D00C20F8BDBC
-:10BDC0000221F176474C4B4F5C34083F7762346078
-:10BDD000002538602575397920304A004D49C07FEB
-:10BDE0008A5A4000085A2B46101881B22A46284623
-:10BDF000FFF7E7FA002804D03C483B49323009F00D
-:10BE00009CF825610120A56020756586258635484A
-:10BE10007C30857539684888401E4880358300200D
-:10BE2000F8BD10B52F4801248068817E03290CD00D
-:10BE300001684978002906D0006A3749884202D94A
-:10BE40000024FFF729F8204610BD0024FBE7254811
-:10BE5000806802681178491C1170016A0068C26A22
-:10BE6000914204D8007D012801D0012070470020B4
-:10BE7000704700207047F8B51A481A4C0C306060C3
-:10BE8000416A00260D68006834212F460E54403761
-:10BE9000B97C002966D1007D032863D106F07DF9C5
-:10BEA00001466068406907F0A1FB00285ADDFFF7F2
-:10BEB0002FFC6988401C4118606802681186006880
-:10BEC000018E2A89511A09B200294BDD0121203047
-:10BED0008175F88AB98A401A6988401E401887B26D
-:10BEE00039E00000C818002074B600007703000095
-:10BEF00057020000880000204FB90000F7B9000089
-:10BF0000F605000010270000F7130000B7891300A2
-:10BF1000E2090000645101002C841300496A097988
-:10BF20004A00CE498B5A028E007D94463F22525DD4
-:10BF30005200895AC91889B201236246FFF741FAB3
-:10BF400000280FD001280FD002280BD0C920C449E7
-:10BF5000C00008F0F2FF61680868028EBA1A12B2D7
-:10BF6000002ADBDA6660F8BD60680068018E491C53
-:10BF70000186F0E7F8B5BB4D0026AA680128516A92
-:10BF80000C6810D00720287006F052F8B6480078E8
-:10BF9000F6F7E8FDA86806830268618851860068A4
-:10BFA00020308675F8BD087913684100AB481F7DC5
-:10BFB000415A032F17D01A7D022A21D01A7D012A57
-:10BFC000E2D13F231B5D22895B00C05A0023401849
-:10BFD00081B20120FFF7F5F90028D5D0A049A34888
-:10BFE00008F0ABFFD0E71E6112683F2396601B5D2F
-:10BFF00022895B00C05A0023401881B20320E9E780
-:10C000005822125B1A613F231B5D22895B00C05AD4
-:10C010000023401881B20220FFF7D3F9AA6801215A
-:10C0200012681175D8E738B58E4C0021A0680D460E
-:10C0300000684278002A01D045701FE0007800288F
-:10C0400009D00121684605F0DBFA68460078884986
-:10C05000000208F050FEA0680268C06852685118DB
-:10C0600006F032FB0146A068C160057102214172F1
-:10C07000021D017FFFF75BF9A068058305F0D8FF7B
-:10C0800079480078F6F76EFD38BD10B50146754A5F
-:10C090000B00906809F042F8060D150408190C1CF5
-:10C0A000012100F0A8F807E00021506800F0A3F893
-:10C0B00010BD0120FFF75EFF00210846FFF7F0F8F2
-:10C0C00010BD00680321017510BD00F0A7F810BD78
-:10C0D0003D206349400108F030FF10BD70B5614C50
-:10C0E000002809D0012816D0022821D05F485C49D9
-:10C0F000C73008F022FF70BDFFF795FF002108460A
-:10C10000FFF7CEF8A068807E002801D01F2000E055
-:10C110000720207070BDA068002501684D70FFF7F2
-:10C12000F3F80320F6F763FC05F082FFA56070BD0D
-:10C13000FFF779FFA068FFF7E7F800210846FFF74F
-:10C14000AFF80420F6F753FC70BD46498968CA7EF3
-:10C15000022A08D10A681378002B04D150600968BC
-:10C16000CA6A1018C862704710B53E4A0029926822
-:10C170000CD0012907D0022907D03C483849E730C4
-:10C1800008F0DBFE10BD401E00E0401F106210BD35
-:10C1900034488068002800D00120704710B504465C
-:10C1A0000020002907D0334808F0A5FD01462046AD
-:10C1B00008F0A1FD401C10BD10B52A488068C07E63
-:10C1C000030008F0ABFF041414030A1401F0E5F8AF
-:10C1D00000280BD02249284806E0FEF73DFE002843
-:10C1E00004D025481E49001D08F0A7FE10BD2248B6
-:10C1F0001B490B30F8E710B50446002903D0002096
-:10C20000FFF7B8FE03E018480078F6F7ABFC2046CD
-:10C21000FFF77AF80020F6F7EAFB10BD10B51148D9
-:10C220008268506A11680068CB698B60124BC18BC1
-:10C23000B13359431368D9600146E0314B88838795
-:10C240000C783B231C548B88C383CB8803840989D7
-:10C25000418411680220087510BD0000645101007E
-:10C2600074B60000C81800207C000020FD06000005
-:10C270001027000040420F0031040000F8B5FEF71F
-:10C2800014FA0646FEF782FAF94D07466879F94C2A
-:10C29000002809D0012823D0022826D003282ED038
-:10C2A000FF20F5A1C63033E0F2481830FEF75AFA05
-:10C2B000002801D003200FE0EE481830FEF7BEF949
-:10C2C000002804D060696030007A002806D0E94870
-:10C2D0001830FEF71AFA012068711BE00220FBE714
-:10C2E000E4481830FEF711FA14E0E2481830FEF77F
-:10C2F000A5F900280ED1FF20DFA1B83008E0DD4805
-:10C300001830FEF72FFA002804D1FF20DAA1C03040
-:10C3100008F013FEA169F722087810400870AA7986
-:10C32000D207120F1043FB2210400870EA79D2079F
-:10C33000520F104308706B79EF22022B04D0012BAF
-:10C3400007D0032B07D00CE0012E06D8002F04D015
-:10C3500007E07F1E3E43002E03D010401022104302
-:10C3600000E010400870287C002811D0687901286E
-:10C370000ED0BF485438FDF79AF8BD49606954396A
-:10C380007830A269FDF7F5FA0020FDF701FB04E023
-:10C390000846FDF78CF8FDF71EFBA0690078C00683
-:10C3A00006D4E0690078C00602D4E079002802D003
-:10C3B000A079002801D0012000E00320FCF759FFFC
-:10C3C0000320207001202071F8BDAA4810B51C3050
-:10C3D000FEF7EFF9A74C002802D00020607004E0BF
-:10C3E00001206070A2485438E061A148407C0028D8
-:10C3F00002D06078002805D0E069FDF758F8FDF715
-:10C40000EAFA10BD9A485438FDF751F8984A606925
-:10C41000543AA030E169FDF7ACFA0120FDF7B8FA13
-:10C4200010BD10B593490022486932238276C27646
-:10C4300001221A544030807C002803D00A70002169
-:10C44000022001E000210320FFF71FFE10BD70B5A0
-:10C45000884C6079C2062046416908464030002A6F
-:10C4600001DA002202E0028B4B89D2180B460283CC
-:10C47000C0331A7E002A03D0828B4D8952198283E1
-:10C48000627A002A03D03D2001F0BEF852E08A7E95
-:10C49000032A4FD0227A002A13D0500701D4D006A5
-:10C4A00001D51E2036E0100701D53D2032E0D0072F
-:10C4B00005D1900703D470A1734808F03EFD2A20EF
-:10C4C00028E060318A78002A05D0C28B551CC583CC
-:10C4D0000D88AA420FD25A7F062A02D01A7F062A56
-:10C4E00005D1428B531C438309888A4203D2828B35
-:10C4F000C18A8A4201D322200CE0027C808A002A71
-:10C500000FD006280FD35A48C07B012801D03E2007
-:10C5100000E0082001F078F86069807E032809D0E7
-:10C5200001E08842F5D20120207000210846FFF783
-:10C53000ACFD70BDFFF775FF70BD10B54C494D489F
-:10C54000CA7B002A2BD0012A29D0022A27D0032A0D
-:10C5500004D049A14D4808F0F0FC10BD897B0229A8
-:10C560000FD007291BD0406901464031CA8A898A09
-:10C57000511A891E89B2032900D303210289511857
-:10C580000BE04069014640318A8A032A01D20189C1
-:10C5900003E04288C98A5118491C818010BD406956
-:10C5A000F5E700B5030008F0B9FD0604070B0F120C
-:10C5B000121700290ED00FE0491E02290AD90BE0FC
-:10C5C000491F012906D907E0072903D004E00A39E9
-:10C5D0000C2901D8012000BD002000BDFEB5054694
-:10C5E00024481830FEF79FF8002804D1274822A1DC
-:10C5F000CF3808F0A2FC1F4CA069FDF715FC032101
-:10C60000A069FDF73FFCA069EF220178114001709D
-:10C610002946FDF77BFC002601272B0008F07EFD54
-:10C620000E5D5D085D1D6161155D4D5D613D385DAF
-:10C6300060697121095C002901D0062101E0C03048
-:10C64000417EA069FDF72DFD4BE0E069FDF788FC18
-:10C650000146A069FDF796FD43E06169A069D0310C
-:10C66000FDF759FD6169A0699531FDF762FD38E07C
-:10C67000C4190020900000207372635C6C6C5F73BF
-:10C680006C6176652E6300006B0200007808000084
-:10C690000621A069FDF772FD23E020690178A069F9
-:10C6A000FDF756FD20698188A069FDF753FD2069DB
-:10C6B0004188A069FDF752FD13E00096019660697C
-:10C6C0006030007C002803D0694608783843087041
-:10C6D0006946A069FDF768FD03E0FE49FE4808F0E1
-:10C6E0002CFCFEF72AF8002804D1FB48F949801DEC
-:10C6F00008F023FC0C2D07D0072D04D060695E21C3
-:10C700000E5260308770FEBD606940304683FEBDCA
-:10C71000F0B5F24CDC2061698DB0405C042809D092
-:10C72000052834D16031487A002829D00120487486
-:10C73000022026E01022EA31684600F09DFF616980
-:10C740001022C83104A800F097FF684605F0B1F840
-:10C75000616908AA6CCA0F46CB6778378A670846B2
-:10C76000FE608030BD60074620376CC7002303633E
-:10C7700043630120A0310876D9494874052000E0C0
-:10C780000D20FFF72BFF61690020C03108770DB045
-:10C79000F0BDF8B5D1481830FDF7C5FF002842D0EC
-:10C7A000CE4C207A00283ED160690025C030007E42
-:10C7B000CB4E00280BD0B17B0120FFF7F2FE002802
-:10C7C00005D1B17B0420FFF7ECFE002806D060699C
-:10C7D0000127C030407F062807D00CE060695C214B
-:10C7E0000D526030457402202FE0B17B0420FFF72A
-:10C7F000D8FE002810D0B07B030008F08FFC173F54
-:10C800003F3F3F1E3F3F3F3D3F203F3F3F292C3FA3
-:10C810003F3F3F3F3F2F3F0060696A21095CC907E6
-:10C8200002D0C0304577F8BD0C20FFF7D7FE606915
-:10C830006030817A39438172F8BD072005E0FDF749
-:10C84000E2FF0028F8D075740B20FFF7C7FEF8BD93
-:10C8500000F021FFF8BDFFF75BFFF8BD6069002124
-:10C8600080308160C160057437740620FFF7B6FE22
-:10C87000606960308570F8BD0920E6E700F0CDFE04
-:10C88000F8BD70B5964DA87B072834D1934CDE22B5
-:10C8900060694188125A491C91422CD1217A0029A1
-:10C8A00029D10146E0318B88C28B934207D1CA88D7
-:10C8B000068CB24203D10A89468CB2420DD0884A16
-:10C8C0008689303A56819381CB88D3810989118238
-:10C8D00001462E3151600121117001221146FDF7F0
-:10C8E000B1FC00210420FFF7D0FB61690020C031BA
-:10C8F0004877A873E87370BD70B5794CA07B162893
-:10C9000003D07449774808F018FB74480021426945
-:10C9100073486032117291703038067E0B25012306
-:10C92000002E06D0027D002A12D14575817503754F
-:10C930000EE0567A002E06D05172228882838176CC
-:10C940000C22027604E02288828381768377057642
-:10C95000A17370BDF8B5614DA879800723D5287AF9
-:10C96000002820D15E4C0120A17BFFF71AFE002891
-:10C9700019D1A8690127C0780026030008F0CEFB72
-:10C980000E626208622E3B4F0A62146220524562B8
-:10C99000022021E0A07B042804D052484D493338BE
-:10C9A00008F0CBFAA673F8BDA07B082804D04D4848
-:10C9B00048492D3808F0C1FA686960308670F1E79F
-:10C9C000A07B0A2804D047484249263808F0B5FA27
-:10C9D0006869603007720B20A073F8BDA07B0E2839
-:10C9E00004D0AB203B49C00008F0A7FA686960306A
-:10C9F00007720F20F0E7A07B0F2804D03948354993
-:10CA0000183808F09AFA1120E6E7A07B0F2804D026
-:10CA100034483049123808F090FA1320DCE7FFF769
-:10CA20006BFFF8BD69690846C0310A7F062A04D148
-:10CA30006030807A800700D50E77487F0628F0D1D5
-:10CA40004E77F8BD274823496E3008F076FAF8BDD6
-:10CA500010B5234C0020A17BFFF7A3FD002804D1D3
-:10CA60001E480122017A114301720420A07310BDF7
-:10CA700010B51A4C60690146C0314A7F002A06D0C1
-:10CA8000097F062903D0217A0122114321726030E7
-:10CA9000807A800715D4E069FDF764FB6169603135
-:10CAA000C872E069FDF760FB616960318881E06907
-:10CAB000FDF75FFB616902226031C881887A10430B
-:10CAC0008872606900220146C0310B7F062B00D1BD
-:10CAD0000A7709E078C60000ED070000900000200A
-:10CAE000C4190020770500006A231B5CDB0703D113
-:10CAF00006234B774030428310BDF8B5FE48817B5A
-:10CB00000020FFF74EFDFD4C0126002807D160698B
-:10CB10006030407A002802D1207A30432072616967
-:10CB200000255E20455262204654C831E069FDF779
-:10CB3000DAFA6169E0699131FDF7E4FA616904228A
-:10CB400008469131B93008F05CF8EB483038017E86
-:10CB50000827002906D0017D002912D14775857567
-:10CB600006750EE06169054689894183E249E069FD
-:10CB70001439FDF7A0FAE049E0690C39FDF7A8FA8D
-:10CB80002F76DD480E218173F8BD70B5DA4D002097
-:10CB9000A97BFFF706FDD94C002803D1207A01219B
-:10CBA00008432072E069FDF742FA00280ED0E069E0
-:10CBB000FDF738FA6169DE225052498800F0B6FD6F
-:10CBC000002806D0282000F01FFD70BDFFF740FFB1
-:10CBD00070BDE069FDF720FA6169E0310870E06935
-:10CBE000FDF713FA6169E0314880E069FDF7F2F979
-:10CBF0006169E0318880E069FDF7F5F96169E0314C
-:10CC0000C880E069FDF7F8F96169E0310881072023
-:10CC1000A87370BDF8B5B94CA079C0076FD0207A61
-:10CC200000286CD1B44D0120A97BFFF7BAFC002885
-:10CC300053D1E0690027C178022201260B0008F0D9
-:10CC40006DFA0D161308354A4A384C474A192944DB
-:10CC50004A00FDF728FA6169DA225054AE735E206B
-:10CC6000475260318E7038E000F06BFD35E0FFF721
-:10CC70008CFF32E0A97B0020FFF793FC002802D153
-:10CC8000207A3043207260695E210F5260308670D6
-:10CC90000A2018E0A87B0B2802D0207A10432072CB
-:10CCA0002F746069603046720C200CE0FFF725FF9E
-:10CCB00013E0A87B112802D0207A1043207260690B
-:10CCC000603087701620A87307E0FFF7D1FE04E0FC
-:10CCD00000F004FD01E0FFF7BBFEFDF780FD00283A
-:10CCE00004D14F208649000108F027F9606900232C
-:10CCF0008030016B426B491C5A4142630163F8BDAD
-:10CD0000F8B57D4F012814D1787C002802D1387CF9
-:10CD1000002801D0FCF75FFEFCF7F4FBFCF7E7FB13
-:10CD20000020FCF7A6FAFCF732FBFCF774FBFCF7DB
-:10CD3000B9FBF87B01260025704C00280FD16079E3
-:10CD4000C10705D00220F87360694030057402E025
-:10CD5000800717D5FE7300210120FFF796F9F87BB5
-:10CD6000012802D0022808D00CE06079C00709D061
-:10CD70000220F8736069403005746079000701D5BE
-:10CD80000320F87300F00EFDFFF703FD2079002863
-:10CD900001D03D8102E03889401C38816079C007AC
-:10CDA000606904D072210D544030858203E0403028
-:10CDB000818A491C8182E079002806D0616960314E
-:10CDC000887C022806D8401C887460696030807CAA
-:10CDD000022804D93D817D81606960308574B97B0A
-:10CDE0000020FFF7DEFB002802D1B87B06284BD1DC
-:10CDF00060690146C0310A7F062A45D0497F06296D
-:10CE000042D03D49C97B03293ED16030807C002857
-:10CE10003AD1FDF741FC002836D0FDF7B7FC0028D9
-:10CE200032D06169C88801282ED90A46403256742A
-:10CE3000D08A978A831E9F4201DB012002E0C01B3B
-:10CE4000401E80B22C4B1F89A3899F4201D301232E
-:10CE500002E0DB1B5B1C9BB2984200D918460128FC
-:10CE600000D155742A22525C002A11D0224A898DA1
-:10CE700052898A4201D3012102E0891A491C89B2F0
-:10CE8000884205D9084603E06169012040314D74AC
-:10CE900061694A8810180881FFF74FFB6069122208
-:10CEA00015490C3007F0ADFEFFF7D1FAFEF7E1FFB0
-:10CEB00000280AD0104810388179002905D161690D
-:10CEC00002468989203A118586710C481C30FDF78D
-:10CED000CEFC00280FD0E06900788007800F012881
-:10CEE00009D0022807D0FDF7E2FC002803D104494D
-:10CEF000044808F022F807E0C41900209000002040
-:10CF000078C600007F030000606940308574F8BD7A
-:10CF100070B5FE4C607900283CD0FD4D022810D140
-:10CF2000FDF79BFB002803D1FA49FB4808F005F800
-:10CF30006A69002380329068D168401C5941D160F1
-:10CF40009060002666712079012804D12671A879A5
-:10CF500010210843A871E078012816D1E670A8795D
-:10CF600008210843A871FDF707FC002804D1EA480E
-:10CF7000E849183007F0E1FF6969002380318A68C9
-:10CF8000C868521C58418A60C860A079012802D044
-:10CF90000120A07170BDA67170BDF8B5DC4CDB4DF1
-:10CFA000E26900271078042183079B0FE8790126A6
-:10CFB000012B11D0022B0FD0032B01D0207A30E0AF
-:10CFC0006178002905D1AE70A1793143A17123E0C8
-:10CFD000EF71F8BDEE71F8BD5278D3061CD06078C1
-:10CFE0000028F8D1D006C00E1B2818D86079084355
-:10CFF0006071FDF7F4FB002804D1C748C5494B30E8
-:10D0000007F09BFF606900238030026B416B521C6C
-:10D01000594102634163E8790128DBD1D8E7207ADE
-:10D02000102108432072F8BDF8B5B84D0446303DD4
-:10D03000287D002700280AD0002978D167701020A9
-:10D040002070687DA070A87DE0702F756FE0287853
-:10D05000002814D000296AD1072067702E4620705E
-:10D06000083607E0686807802F700A223146A01C46
-:10D0700007F0C7FD28780028F4D1A77057E0287E74
-:10D08000A24E143E002837D0002950D1297EA04856
-:10D090000B0008F043F80D2C2C2C2C2C2C2C2C11D4
-:10D0A0002C2C20082C0067700C212170A97EA17007
-:10D0B00040698089A08018E008216770217040696C
-:10D0C0000A468089914960801439201D07F099FD36
-:10D0D0003089A08109E067700B212170A97EA170C1
-:10D0E00040698089A080A87FA0712F761FE08949C0
-:10D0F0008A4807F022FF1AE0844810388279002A13
-:10D1000008D0002913D1677011212170B189618085
-:10D1100087710CE0827A002A0BD0002907D1677052
-:10D1200012212170318A6180718AA1808772012069
-:10D13000F8BD0020F8BD76480078012801D00C2009
-:10D140007047724900203039087008750876203120
-:10D150008871704770B56E4C064620780D460028E1
-:10D1600004D093206B49000107F0E7FE01202661FF
-:10D17000E07225622070FFF7DEFF002804D06748C8
-:10D180006449493007F0D9FE70BDF8B5604C21788C
-:10D19000012902D12178012901D00C20F8BD0146D6
-:10D1A0000546606112220C31584807F02AFD01271C
-:10D1B0004035AF74554D2888FDF735FA002827D043
-:10D1C0002888FDF7EBFA002822D02888FDF7A0FA7E
-:10D1D00000281DD02888FDF7BAFA002818D0FCF7DF
-:10D1E00056F960690026C088002825D048481830C4
-:10D1F000FDF799FA00281FD06069C030007E002832
-:10D200001AD0A97B0120FFF7CCF9002802D013E047
-:10D210001220F8BDA97B0420FFF7C3F900280BD129
-:10D22000606901464030868360314E740220FFF70A
-:10D23000D5F96069403046743448303800780028A9
-:10D2400004D16169C88D098C884201D86069008C5D
-:10D25000A08160694189491E8AB22989891829817A
-:10D26000297B002902D06E812E7302E0698989181A
-:10D270006981014640318B8A9B188B82C388012BC0
-:10D2800001D85B1CC380002A01D060308674A87B63
-:10D29000032816D0487C002815D02889A189884207
-:10D2A00011D2FDF7F9F900280DD060692A21095C37
-:10D2B000002908D06989808D814204D3A670E77067
-:10D2C00003E0A77001E0A670E670606951210E547A
-:10D2D000A97B052901D0062915D1DE214288095AEA
-:10D2E000511A09B200290EDB01460522E031243033
-:10D2F000F3F76AFF012202216069FCF7A3FF60696E
-:10D30000C0304677AE736069418909E0C4190020D6
-:10D310009000002078C6000039070000F1080000E6
-:10D32000FDF745F8A07800282AD160692030807A7E
-:10D33000002800D06E810120FBF7A5FE606938301F
-:10D34000FCF75DF860693430FBF76EFF216A00205E
-:10D350000856FBF735FF0120FCF796F8FBF7EEFEC9
-:10D36000FCF78EF80120FBF7CEFF6069406EFCF7FA
-:10D37000A1F8FFF72AF860694030C07BFBF75DFF3A
-:10D380006671E671A6712672A67266722671022017
-:10D390002070FCF787F80020F8BD10B5F74C207816
-:10D3A000022801D00C2010BDA078002803D0002056
-:10D3B000FFF7A6FC17E0FCF76AF800F01DF96069BA
-:10D3C0002030007C012809D0FCF7BEF8FBF7BBFE3B
-:10D3D000F3F7F7FFE07A012803D004E0FCF7BCF88C
-:10D3E000F4E7F5F715FE002010BDE449C872704758
-:10D3F00010B5E24C2078032803D0E149E14807F05A
-:10D400009CFDE14801218278002A06D0002282702A
-:10D410000171A27904231A43A271A2691378DB4334
-:10D420009B0707D1C378002B04D1C170A0790221DA
-:10D430000843A0711078C00606D4E0690078C006E1
-:10D4400002D4E07900280CD06078002809D1A079B6
-:10D45000002806D1FEF7FBFC002802D0207A002825
-:10D4600003D00120FFF74CFC03E0FEF7AEFF00F015
-:10D47000C3F82078012806D0F3F7A3FFE07A01284B
-:10D4800001D1FCF7F9F810BD38B5BC4C606920300B
-:10D49000007C012820D1A07A00281DD16846FCF725
-:10D4A00063F8002818D061693120405C012810D150
-:10D4B000B54A0D236D460020D3562856834208D026
-:10D4C00050738989303A9185114620318873012043
-:10D4D0008872A07A401CA07238BD70B5A74C064671
-:10D4E0002078042804D0A748A549553007F025FD29
-:10D4F000607910210843A44D6071002E47D0FCF7DD
-:10D5000082FA61780126084300280ED1687C002841
-:10D510000BD0E0694178C90607D00078E9790007A7
-:10D52000C00F884201D1667247E0E078002809D038
-:10D53000E0694178C90605D10078C00602D4FFF73A
-:10D54000A3FF3AE0FFF7A0FFE069A9790078400760
-:10D55000C00F884205D0FFF7DBFC60790821084343
-:10D560006071E069E97900780007C00F884201D155
-:10D57000FFF713FD6079304360710020E071A079FE
-:10D58000000702D5A87B022817D0207A13E00221D9
-:10D5900008436071E079401CC0B2E07101280CD8EA
-:10D5A000687C00280DD0784854384078C106C90EF0
-:10D5B000052906D2C006002803D00120FFF7A0FBF2
-:10D5C00001E0FEF75BFE2078012806D0F3F7F9FEB4
-:10D5D000E07A012801D1FCF74FF870BD10B567481B
-:10D5E0000078042804D067486549B73007F0A5FCE7
-:10D5F0000120FFF785FB10BD10B50720FBF739FEB2
-:10D600005E490420087010BD5C49332249695054BA
-:10D610005D4A032090738876704710B5574C606957
-:10D62000C030007F00281CD0062806D05648817BD9
-:10D630000020FEF7B6FF002813D060690146C03114
-:10D640000A7F130007F06AFD070D0D0D0D0D0D0586
-:10D650000D006030807AC20704D0C043800700D13B
-:10D66000087710BD0C20FEF7B9FF60690122603019
-:10D67000817A1143817210BD10B5002A0AD00023AF
-:10D6800006E0D41A6418203CE47FC4545B1CDBB26F
-:10D690009342F6D310BD10B503F0B1FF0C281CD394
-:10D6A000364C08216069D03003F0AAFF002806D06C
-:10D6B00060690421953003F0A3FF002803D13049AD
-:10D6C000324807F03AFC6169042208469531BD30C2
-:10D6D00007F097FA0420FEF781FF10BD7CB52A4EB3
-:10D6E0000020B17BFEF75DFF0125244C002802D10C
-:10D6F000207A284320726946E069FCF75BFD6846A2
-:10D7000000780021C207D20F684602706069002AC3
-:10D7100002D06030057401E06030017460695E22FF
-:10D720001152603085700820B0737CBD401A1849D2
-:10D7300000B2884201DC002801DC01207047002093
-:10D74000704770B5104D0020A97BFEF72AFF0B4CE7
-:10D75000002803D1207A012108432072E069FCF7F8
-:10D760009BFC6169DE2250524988FFF7DFFF0028E9
-:10D7700010D02820FFF748FF70BD00009000002067
-:10D7800078C60000320A0000C419002062060000BA
-:10D79000FE7F00006169E069E031FCF771FC052063
-:10D7A000A873E9E770B500F047F8384C384D607958
-:10D7B000400709D5A97B0520FEF7F3FE002803D01A
-:10D7C000207A082108432072FFF724FA00F012F8AB
-:10D7D000FFF7C0F8A079C00609D5A87B030007F0C1
-:10D7E0009DFC06060606060604060620A873FFF73B
-:10D7F00048F8C1E710B525488179490714D5017A61
-:10D80000002911D12249897B0B0007F087FC080D04
-:10D81000050D0D0D0E0D100D4069002262210A54F8
-:10D82000C030807EFFF7F0FE10BD012100E0022134
-:10D830004069C030417710BD10B51448817909079F
-:10D840001DD5017A00291AD1114A947B230007F0D3
-:10D8500065FC1416160B1616161616161616161640
-:10D860001616161616161716406960308170407C21
-:10D87000002801D0062000E01620FFF7C5FE10BDED
-:10D880004069603001728170917310BD900000207A
-:10D89000C419002010B5031D03600020521E04E0CF
-:10D8A0005C181C60401C2346C0B29042F8DB00208C
-:10D8B000186010BD01460A680020002A02D01046F8
-:10D8C00012680A60704702680A60016070470000D1
-:10D8D00000B51A2822D00ADC030007F01FFC0D1146
-:10D8E0001F131F1F191915171F1F1F1B1F002A2881
-:10D8F00014DD3A38030007F011FC030F1109110081
-:10D90000002000BD1E4800BD042000BD0D2000BD4C
-:10D910000F2000BD082000BD112000BD032000BD68
-:10D9200010B50C46F4F7CFFF00281AD02046F4F7C4
-:10D93000CCF9002812D020780E280BD00F2809D05F
-:10D94000022807D0032805D00EA1772007F0F5FAAA
-:10D95000002010BDA078FFF7BBFF10BD09A17D20FE
-:10D96000F4E708A18320F1E710B5F4F735F910BD0D
-:10D9700010B5F4F7AAF910BD10B5F4F78CF910BD85
-:10D98000023000007372635C686F73745F68636970
-:10D990002E630000F0B597B00021032004F082F957
-:10D9A0000025FE4E022775807574347C12E0F06805
-:10D9B000E1004018818800290CD0858069460F70ED
-:10D9C0004D70016802918088694688800021684610
-:10D9D000F8F734FD2046641EE4B20028E7D117B002
-:10D9E000F0BDEE4BD86019741A80D3E7EB49EC4BCD
-:10D9F0004A8800201A4200D00120497C002901D029
-:10DA0000082108437047F7B504460E460078012107
-:10DA1000E34A8140521C114098B0E04A009151887D
-:10DA2000E04B994205D0009B002B05D0DC4B1942FE
-:10DA300002D001201BB0F0BD009BD84A1943518091
-:10DA40001A9D002D11D00020287022781A980027E6
-:10DA5000401C130007F062FB10EF0D152137555DD8
-:10DA60006A39AFAB85B3EEEDECEF0B28EDD00420B7
-:10DA7000E0E702212970A1880170090A41700320A2
-:10DA800093E004212970A1880170090A4170E1889E
-:10DA90008170090AC170052087E006212970A188DC
-:10DAA0000170090A4170E1888170090AC1702189F9
-:10DAB0000171090A4171A289E81D216907F0A1F8E5
-:10DAC000A089C01D71E0082129702178082901D1A1
-:10DAD00010212970A1880170090A4170E1888170C4
-:10DAE000090AC1700520308020466A1D01A908304E
-:10DAF00003F0CFFB00287DD16946308809794018B2
-:10DB000053E00A212970A1880170090A417003209D
-:10DB10000AE00C212970A1880170090A4170E1888E
-:10DB20008170090AC170052030809DE0A08884467C
-:10DB30004000401C81B2308888425BD3052959D30C
-:10DB40000E202870002008E0A36842009B5A52195A
-:10DB500053701B0A401C937080B26045F4D331802F
-:10DB6000B6E08E49487C002873D0401E4874C868CF
-:10DB700021790822C9004518A98828684018083862
-:10DB8000A16807F03EF80221684601710021417149
-:10DB900028680390A98868460181002101A8F8F748
-:10DBA0004DFC0020A880002E00D0308090E0297825
-:10DBB0008022114329702978402211432970297845
-:10DBC0008909890112312970A1880170090A4170FF
-:10DBD000E288E81CA16807F014F8E088C01C3080D7
-:10DBE0002878410640D5C00972D0012168460171EC
-:10DBF000002100E02BE041713188ED1C091D0181FD
-:10DC00001A980390E08840190490001D634D059018
-:10DC1000297C68460176002101A8F8F70FFC074629
-:10DC200030880C303080022F06D0002F50D060E0BA
-:10DC30003CE032E01CE059E06946097EE868CA0031
-:10DC400080182A7C914202D28188002902D00427C0
-:10DC50004FE02EE0697C491C69741A990160318893
-:10DC600081800020308044E04C48A188C1802FE0B2
-:10DC700029788909890116312970A1880170090A5A
-:10DC80004170E1888170090AC1702289681DE168CC
-:10DC900006F0B7FF2089401D46E7287880098001FB
-:10DCA000183028702079687002207EE73B480A040B
-:10DCB00001D405271DE00289A3889A4201D00627D6
-:10DCC00017E01E222A70012249043280490C41804B
-:10DCD000009800280DD0314D00222888114683007D
-:10DCE000032003F03AFF2078287107E000203080FD
-:10DCF00003272A48009942888A434280384699E699
-:10DD0000F7B59AB002000C4606D0172A04D823486B
-:10DD1000244B4088984202D107201DB0F0BD2378E3
-:10DD20005D0601D4DB0901D00820F6E700236D462B
-:10DD30002B706B701D462378611C9F06931E1893F1
-:10DD4000531E19939BB2169302AB1793134BBF0E3E
-:10DD5000DE883B0007F0E2F9208511F15EF16BF1FE
-:10DD6000A3F1C6F1F2F1FBF1EEF1EDF1ECF1F1F11D
-:10DD7000EBF1EAF1E9F1E8F185F1052A71D104222C
-:10DD800069460A7005490A7969460A71E178A378FB
-:10DD90000A021A436946CA80227905E0D819002090
-:10DDA000FE710000FFFF00004A7061788906890E4D
-:10DDB0000C2923D009DC891E0B0007F0AFF90913E9
-:10DDC00052155219521B521D520012291CD004DC4C
-:10DDD0000E2915D01029D1D114E0162916D01829F2
-:10DDE000CCD115E0800700E04007002839DA2AE1AD
-:10DDF0000007FAE7C006F8E78006F6E74006F4E712
-:10DE00000006F2E7C005F0E7C004EEE78004ECE7A7
-:10DE10004004EAE7800724D5032AAFD105206A46EB
-:10DE20001070487809780002084390800BE14007A1
-:10DE3000F1D5062A15D31898617880B2012902D04D
-:10DE400002299BD101E0022700E010270622694643
-:10DE50000A7000228A8001AEA11C0236BA1C1792F9
-:10DE600018E0B6E04A780B7812021A433280801E1E
-:10DE7000891C1890B21C1691384603F0E4F91699E3
-:10DE800018986B469A88C919C01BB61D521C9A80F7
-:10DE9000179A80B28242E5D900289CD1D3E00007CE
-:10DEA000B9D51998694682B2072008700020888089
-:10DEB000601C891D11E0437806781B0233430B80F8
-:10DEC000C37886781B0233434B806E46121FB3889B
-:10DED000001D091D5B1C92B2B380042AEBD2002AFC
-:10DEE00077D1B0E0C00674D5022A72D31898082101
-:10DEF00082B2684601700021C18063780371A01C62
-:10DF000017990EE04678077836023E430E80861C4D
-:10DF10004E606F46D21AFE88C0180831761C92B245
-:10DF2000FE809342EED9DAE76FE076E065E051E0FB
-:10DF300046E01EE014E00AE000E0A0E0800648D5DC
-:10DF400009206A46107096801698D0800FE040062F
-:10DF50003FD50A22684602708680169AC28006E083
-:10DF6000000636D50B206A461070169890800291F4
-:10DF700069E0C0052DD5022A7FD318980C2182B202
-:10DF8000684601700021C18063780371A01C179955
-:10DF900013E04678077836023E430E80C6788778CD
-:10DFA00036023E434E80061D4E606F46D21AFE88F2
-:10DFB000C0180831761C92B2FE809342E9D98EE7F0
-:10DFC000C0045AD5012A58D10D21684601708680B7
-:10DFD00039E052E0800450D5052A4ED30E2368461E
-:10DFE00003708680C8788B78010219436846C18027
-:10DFF000521F0281601D039025E040043DD5012A97
-:10E000003BD10F20694608701DE0030435D44B78DE
-:10E010000E781B023343244E3381032A2DD31B2F4A
-:10E0200027D011236E46337001261F4BF603304371
-:10E03000588048780B780102194368468180D21EC7
-:10E04000C280E01C029020788006800E1B280AD037
-:10E050001D2808D00021032003F024FE1248418827
-:10E06000C90BC903418068461C99F8F7E7F92846AF
-:10E0700053E610206B461870DBE70725F7E7082505
-:10E08000F5E700B50022D243074997B04A8003283C
-:10E0900007D1032268460270097901710021F8F75F
-:10E0A000CDF917B000BD0000D8190020FFB589B028
-:10E0B0000020019009981027FE4C1E46154608289E
-:10E0C00006D0E06901F05EF8002809D03770BEE0A4
-:10E0D000288809213843108013980227017016E020
-:10E0E000E169012088710521E269C9029180E16935
-:10E0F0008872E169F0480881E16900208873288806
-:10E1000020210843288011211398042701701398B7
-:10E110000225801C0290307806900A203070E54875
-:10E120001830049001F022FA0020059020462C308F
-:10E1300003906DE00998102808D1022D06D00199AE
-:10E140000298A28D401A8270110AC170E08D0A995E
-:10E15000884202D901F0CDF806E0884204D1069841
-:10E16000002801D030701CE00298E18D0170090A8E
-:10E17000417012980088401BC01B82B2FF20C01B58
-:10E18000904200D2024607A8009002980021C319CD
-:10E19000E08D01F056FA3070002805D0C0B2832817
-:10E1A00058D0E08D20833EE00598002804D0206CF4
-:10E1B00000790A282CD336E06846808BC119C9B291
-:10E1C0000191022D0DD01399019A4978914202D103
-:10E1D000228F824208D00191206C0178032908D057
-:10E1E00023E0084613994870206C0178042906D072
-:10E1F00007E000790A2818D20120059008E0E18D97
-:10E20000818002990198081802900198281885B217
-:10E210000399049801F0ADF9002804D11298008800
-:10E22000401BB84286DA022D0DD00998102806D17D
-:10E2300002990198A28D081A8270110AC170129871
-:10E24000058000203070206C0078032802D0002068
-:10E250000DB0F0BD0220FBE7F8B5964A0026126D1E
-:10E26000002A2ED0401F934D84B24035E88A2346C1
-:10E270000833AF8AC318BB4222D88B784F781B0271
-:10E2800010183B4303701B0A43700B79CF781A02B6
-:10E290003A438270120AC2700471220A4271224605
-:10E2A000491D801D06F0ADFCE88AA41D001980B24E
-:10E2B0008049E882096D002208180270427000E06F
-:10E2C00009263046F8BD30B57A4B028840339B8A28
-:10E2D000934213D9774B1C6DA3185C781D782402E8
-:10E2E0002C430BD05C791D7924022C436404640C0C
-:10E2F000A41D1219028000200B6030BD822030BDA9
-:10E30000F0B585B0074600266846068155E00198BD
-:10E31000417802780D0215434179027908021043D1
-:10E3200000044AD43D8003A8002301220090520239
-:10E330001946284601F085F9040044D16846018950
-:10E3400001820198417902790902114343780278E8
-:10E350001C021443AC421CD10A041AD44A04012101
-:10E36000520C89030A430096C17880780902014360
-:10E370000023204600F0C1FF040010D10199487924
-:10E380000A79000210430122D20310430871000AE7
-:10E39000487101A904A8FFF796FF0400D1D00199A4
-:10E3A00000964878097800020843694600238A8964
-:10E3B000194600F0A2FF822C05D101A902A8FFF79F
-:10E3C00082FF0400A3D06846068109E001994879DC
-:10E3D0000A79000210434004400C0871000A487199
-:10E3E00001A902A8FFF76FFF0028EFD0822C02D00E
-:10E3F000204605B0F0BD0020FBE7F7B584B0144619
-:10E400000646002700F071FF2A480025006D00280D
-:10E410002FD0059801282CD12046FFF771FF070067
-:10E4200027D1002E29D06846058118E00199487847
-:10E430000978000208432080019B009558791979DA
-:10E440000202D8780A4301029F78587839431F782E
-:10E4500000029B1D384300F050FF002805D101A9A0
-:10E4600002A8FFF730FF0028E0D0822800D100206A
-:10E470000746002E01D00F48056500F03AFF3846E8
-:10E4800007B0F0BDF0B597B00021042003F00AFCFE
-:10E49000084F00243D467C8040356C73AC73287B6C
-:10E4A000B96CC00008380E18B08800280DD00120C3
-:10E4B000694603E0EC19002001280000087030686C
-:10E4C000019000216846F9F7BAFAB4803C65AC8245
-:10E4D000EC8217B0F0BDFE4B9864184640300173D3
-:10E4E0001A803838D861CDE7F949002049880A07F1
-:10E4F00000D501200A06120F01D002221043CA05DE
-:10E5000001D5042210438A0501D510221043490584
-:10E5100001D520210843EE494031497B002901D033
-:10E52000082108437047FFB5A7B004002898164695
-:10E530001B9022D00178E6484D064288229202467E
-:10E5400040320092002D14DB8A06920E1E2A0ED055
-:10E55000229A5205520E10D13288172A0DD3009AF2
-:10E56000927B002A09D1DB4D229AAA4205D0CA0922
-:10E5700006D08A06920E122A02D003202BB0F0BDDC
-:10E58000D348826C0098007B2590C0000838101892
-:10E590001F9048060CD40098407B002808D00099B2
-:10E5A00088731F99289808601F9884800220E5E7E7
-:10E5B000002718A90F7069460F72C54902AA0A649C
-:10E5C000309A4A6410A90F850F861B981D46007863
-:10E5D00020908106BE4B601F24901A462C32219257
-:10E5E0002898DA691833890E1E93401C0B0006F038
-:10E5F00095FD1FFDFD11FD1AFD90FDFCFDFBFDFAD3
-:10E60000FDF9FDFCFDF8FDFDFDF7FDF6FDFDFDFD51
-:10E61000FDF5FD00032C7BD10320287017226A70C2
-:10E620000022AA70E0E2052CF5D1417802780902B7
-:10E630001143A74B10AA19831185C2788078120262
-:10E6400002435A8300297DD091427BD8002118468D
-:10E6500081720181491E01841E9800F087FF052008
-:10E660002870A81C1D900220009021991E9800F08F
-:10E6700080FF002803D047E018A90870F0E2944812
-:10E680002030807C012803D002206870102002E036
-:10E6900001206870022022908D48303023900022A3
-:10E6A00020A9239802F0F5FD00282AD120A800789F
-:10E6B0002299814225D132880099801C511A8142C9
-:10E6C0001FDB83481D99C08D0870000A48701D9893
-:10E6D00020A9801C1D9000981D9A801C00902398F2
-:10E6E00002F0D7FD20A909781D9840181D900098C8
-:10E6F000401880B2009021991E9800F03AFF00283F
-:10E70000CDD0009802288DD10A2018A908706CE29B
-:10E710006DE0072C6BD341780378090219436C4BE9
-:10E720008446198310AB1985C37880781B0218437F
-:10E73000674B0029588305D0814203D80121184630
-:10E74000817200E0A4E061464B7909791B020B431A
-:10E75000038100218173104600F014FD00280FD1C1
-:10E760005B480121C26991710522C369D2029A8076
-:10E77000C2699172C26958491181C06900218173CF
-:10E780005349E01F08841B98C01D48621E9800F082
-:10E79000EDFE07202870681C009001201D904C4859
-:10E7A0000021C18530E01D98012815D04848C16975
-:10E7B000897901292FD000981038C17B807B09020C
-:10E7C000014300980170090A41700098801C009074
-:10E7D0001D98801C80B21D903D4809E013E2BEE107
-:10E7E0007AE1D8E00DE2A0E080E03BE01EE2B6E096
-:10E7F000C18D00980170090A41700098801C00903A
-:10E800001D98801C80B21D9021991E9800F0B1FEC9
-:10E81000002802D006E0818DD3E731881D98081AC0
-:10E820000428C0DA1D98012800D16DE72848C16985
-:10E830008979012903D0828D26498A4205D1818DAB
-:10E8400000980170090A417009E000981038C17BF6
-:10E85000827B0802009910430870000A48701D98D6
-:10E86000801CC1E1072C01D0152C78D141780378A8
-:10E8700009021943164B198310AB1985C3788078A8
-:10E880001B02034312480029438301D0994201D956
-:10E890000120F1E60E48012181720021018181737E
-:10E8A000052C07D024981B99C0B2491D02F0CBFC5F
-:10E8B0000028BAD100200649C04308841B9800965E
-:10E8C0000195007818AB8006800E1CAA002105E097
-:10E8D000EC190020FFFF000001280000FFF7E6FB15
-:10E8E0000746FE4810A9008B08857EE1032CBCD1A9
-:10E8F000402210A90A86417802780802F74910439D
-:10E90000088310A9088520A9009131886B1C491E35
-:10E910008AB2002100F095FE18A90870002830D1B5
-:10E920000B20287020A8008833E0052C9DD1802181
-:10E9300010AB1986014640780B780202E7481A436B
-:10E940000283CB7889781B021943E44B1046198463
-:10E9500010AB1A85E24A914202D307208CE697E079
-:10E960003F23DE4A9B021943118421AA0092328878
-:10E970006B1C521E92B200F064FE18A908700028A9
-:10E9800003D08328B1D102272FE10D20287020A8C1
-:10E990008088401C28E120990C22C9095143C91CD8
-:10E9A0001E91A14204D92098400671D500201BE198
-:10E9B000417800780902014310A801851B9800786E
-:10E9C00042062898C01C1D90002A62DA05206A467B
-:10E9D00010721B980078C00944D008226846027261
-:10E9E0008181A01A87B268468782289806901E986F
-:10E9F000201A81B26846C1811D980490401806F023
-:10EA000061F9079006982599C0190890491E08A831
-:10EA1000017102A83099F9F712F8074600216846FB
-:10EA20000172002F1BD0022F18D1009808A9007B7B
-:10EA30000979401E884210DDA848289A836CC900D5
-:10EA40005A50816C08A80079C000001D0C52009833
-:10EA50000099407B401C4873C7E00527EAE0062088
-:10EA600069460872002000901E980021201A20900C
-:10EA700082B21B9B10A8DB1C008D00F03EFC0146FF
-:10EA800018A80170002268460272832903D003E0AF
-:10EA900093E00720E4E702271B98007840060ED594
-:10EAA0008E484188C90506D510AA018B128D914266
-:10EAB00001D100214162002018A9087094E0FF21D3
-:10EAC000013110A80186018D8448018320990184B9
-:10EAD0001D994162132085E0052C6ED3417803789F
-:10EAE0000A021A4310A90A859446092269460A7245
-:10EAF0000021009101222499D20311438AB2C178E6
-:10EB0000807809021B9B01435B1D604600F0F5FB0A
-:10EB100018A90870002269460A720122520210A93F
-:10EB20000A86832802D0002805D099E06B48098D19
-:10EB3000018302277EE06948006D002807D0204647
-:10EB40001B99FFF789FB18A9087000284DD12B46A7
-:10EB5000324620461B9900F024FB074645E01B98EF
-:10EB6000022C4078009064D1002801D0012860D1A7
-:10EB70000A2168460172009901731AAA00200099BF
-:10EB8000FFF73BFC0146684641730021817302A8F0
-:10EB90003099F8F754FF07460021684601720121B9
-:10EBA000890210A80186022F08D04C48006C807999
-:10EBB000002807D018A9087020E04BE047490098CA
-:10EBC000088337E0002F03D0812018A9087031E0B6
-:10EBD0001AAA01200099FFF710FC18A90870002854
-:10EBE00003D119202870012030806846007A00285F
-:10EBF00004D002A83099F8F722FF0746002F2BD047
-:10EC000018E0062038E522993448090711D5012C6F
-:10EC10000FD10B2269460A72C08888810021042026
-:10EC200003F040F8082010A90886BFE620984006A7
-:10EC300010D50327294810AA4188128E114341801C
-:10EC40005005400E04D01F99289808601F988480B2
-:10EC5000384693E404200FE518A8007800280ED069
-:10EC6000012028701B980078687010A8008DA8708B
-:10EC7000000AE87018A8007828710520308017482D
-:10EC800010AA4188128E91434180E1E7FFB5064604
-:10EC90009FB000201B903178012088401149124A12
-:10ECA000084010A908860D494988914203D00028E0
-:10ECB00004D0080702D5012023B0F0BD219D002714
-:10ECC0002F7020983C46018810A8018418A807716D
-:10ECD00000F00BFB6846077202A907E0EC19002060
-:10ECE0000102000009F80000FFFF0000FA4801647B
-:10ECF00001464031826C1A91097BC90008395718C6
-:10ED000022994164307801282AD0022809D00328AA
-:10ED100079D12878800980011D302870EE48B188AB
-:10ED2000C1803078022804D12878800980011B3006
-:10ED3000287001A8009010A8008CEB1CC01E82B2A5
-:10ED4000B088002100F07DFC0028E1D1B188697015
-:10ED5000090AA9706946888810A9C01C08842DE199
-:10ED6000717918A801713079012802D00228CFD119
-:10ED7000E6E0D9487F2340881B010246184010ABCB
-:10ED80001886802840D006DC102810D020280ED00D
-:10ED900040280AD120E0FF38013859D0FF38013827
-:10EDA0006AD0FF38FF3802387ED0052491E0D006C3
-:10EDB00001D5082000E010201B900420694608724D
-:10EDC0000020888118A800900195318919AB1CAAF0
-:10EDD0001B98FFF76BF977E0BF4B3289188B8242A3
-:10EDE0004FD10A221B92002973D101A9009110A9C9
-:10EDF000098C6B1C491E8AB2002100F022FC18A964
-:10EE000008710B2017E0F6E0B34B3289188B824271
-:10EE100037D10C221B9200295BD101A9009110A9C6
-:10EE2000098C491E8AB21946098C6B1C00F009FC3A
-:10EE300018A908710D2028706946888810A9401CFF
-:10EE40000884042069460872A348008B888140E04A
-:10EE5000A14A3389108B834213D112231B930029BB
-:10EE600037D1536A002B05D00091128C00F045FA7F
-:10EE700018A9087113205EE097483289038B9A42E3
-:10EE800001D00424E7E016221B92026D002A09D16A
-:10EE9000F268002A06D002651A98328A82821A9A8B
-:10EEA0000020D082002900E02FE012D1B888396814
-:10EEB000FFF7D2F918A9087100280AD1B8882B46A3
-:10EEC00018AA396800F06DF90446022818D0042CFD
-:10EED00016D0B88800280FD06846007A002804D0E1
-:10EEE00002A82299F8F7ABFD044601206946087292
-:10EEF000386803900020B880002C5FD0052C7BD0B0
-:10EF00006846007A032873D0A5E018201B900029DA
-:10EF100005D071483189018300210165D9E76E4828
-:10EF20000246017E18320120FFF767FA18A908711E
-:10EF30000028CED119202870012010A90884C8E724
-:10EF40001A98407B002856D0307AC0001358001D14
-:10EF50000193105A1D9000291AD100F0CAF9062019
-:10EF600069460872002000901D980F3882B20198FF
-:10EF70008178437808021843019B0021DB1C00F0D4
-:10EF8000BCF918A90871002269460A72832830D09A
-:10EF9000002118A8017110A801840121684601729E
-:10EFA000019803901A981A99407B401E48731A984A
-:10EFB000807B002802D01A99401E887310A8008E0A
-:10EFC0007F21090102468A431DD043480022008860
-:10EFD00011468300042002F0C0FD3F4831780171E2
-:10EFE00010A94088098E08433B4948800FE003E0A0
-:10EFF0002BE002242FE00524374810AA4188128E06
-:10F000009143418027E034494A8882434A806846D8
-:10F01000007A002805D03048416C02A8F8F70FFDAF
-:10F02000044618A80079002815D01B9868700120A4
-:10F0300028702948008BA870000AE87018A8007989
-:10F040002871052110A8018405E02348416C02A81D
-:10F05000F8F7F5FC044600F04CF91F4840884005DD
-:10F06000400E20D11A98807B00281CD1B888002837
-:10F0700019D0209910AA0988118422990091396821
-:10F0800018AA219BFFF74FFA044602280BD0012053
-:10F09000694608723868039002A82299F8F7CFFCF5
-:10F0A00004460020B88010A8018C209801802046DA
-:10F0B00002E600B50022D243074997B04A800428EF
-:10F0C00007D1022268460270097901710021F8F720
-:10F0D000B6FC17B000BD0000EC19002010B5394C8B
-:10F0E00003780022216C012B02D0022B44D126E0B0
-:10F0F0000B78002B01D0042B03D10A71226C032161
-:10F100001170216C83880A79D200921D8B52216C78
-:10F110000A79D20008328918C2880A80216C0389D2
-:10F120000A79D2000A328B524289206C0179C900D7
-:10F130000C314252216C0879401C087120E00A749D
-:10F14000226C81889180216CC288CA80226C0189DE
-:10F150001181226C41895181216CC068C860616C49
-:10F16000206CF8F76CFC0146022807D0206C007C6C
-:10F17000002802D1002903D0812010BD832010BDBA
-:10F18000002010BD8178012909D100880521C9021C
-:10F19000884202D0491C884201D1002070470520D6
-:10F1A000704710B51488844201D2052010BD172481
-:10F1B0001C701080421E491C581C05F022FD0020C6
-:10F1C00010BD0000EC19002010B58B78002B11D079
-:10F1D00082789A4207D10B88002B0BD003E0091DDF
-:10F1E0008B78002B08D08B789A42F8D103880C8852
-:10F1F000A342F4D1002010BD812010BD10B500291C
-:10F2000002D001290DD102E00088000501E000884C
-:10F210008004800F07D001281CD0022809D00328C1
-:10F2200010D0812010BD002901D0032010BD022084
-:10F2300010BDF5F733FE03280CD004280AD00028AF
-:10F2400006D009E0F5F72AFE042803D0022803D0EF
-:10F25000052010BD002010BD0F2010BDF3B5C81C47
-:10F2600080080E46800081B0B04201D08620FEBDED
-:10F27000FE4C354626600198A08000202081E08069
-:10F2800014E0B807A978800D0843F94905F033FD6B
-:10F29000E088401CE080B80607D42089401880B27E
-:10F2A00020810199081A8019A8600C352F887807E9
-:10F2B000E7D40020A072FEBDEC480C22C188008972
-:10F2C0005143081880B2704770B51346E74A451895
-:10F2D0009488AC4201D2842070BD126810180A468E
-:10F2E000194605F08EFC002070BDE04901208872AF
-:10F2F0007047DE49002088727047FFB589B09704D7
-:10F300000E460546BF0C029200F034FA040021D0EC
-:10F31000002069460873D548807A012812D001215F
-:10F320002046FFF76BFF002815D12078400609D54D
-:10F330000221684601730582218841828682C78244
-:10F340000C9806900298000407D500273E46012538
-:10F3500001970CE001200DB0F0BD2078A178800766
-:10F36000800D0843C249019005F0C5FC0D46029886
-:10F3700040040AD50198A84207D12088E178800589
-:10F38000800F00020843B04201D3AE4201D90720EA
-:10F39000E1E7B81980B20290A84201D90D20DAE75E
-:10F3A0006846007B002804D003A8F8F744FB002837
-:10F3B000D1D10198A8420BD12088032109028843AA
-:10F3C00002998905890F0902084320800298E0709C
-:10F3D0001298002800D007800C9800280CD02078C4
-:10F3E000000609D4A0683A4680190C9905F009FC7A
-:10F3F00020881021884320800020ACE7FFB59B4D7A
-:10F4000081B00E46E8882F680C21009048433C18D4
-:10F410009749039805F06FFC0A462889E11B84464A
-:10F420000C314018318880B28B0601D5002300E0F2
-:10F4300013461818AB8880B2834202D8842005B0E6
-:10F44000F0BD0098894D401C80B2E88021800D9964
-:10F45000002900D00C600399A170E2702188039DFF
-:10F460008908AD058900AD0F294303252D02A94365
-:10F470009505AD0F2D0229430425294321800C99C0
-:10F48000002900D0088001998978A1710199098823
-:10F49000A1803178890601D50B9905E07349624452
-:10F4A00092B20A81991AC919A16000212173327898
-:10F4B000920601D50020C2E700910B9B0A9A04999D
-:10F4C000FFF71BFFBBE7FEB5044600F053F907004A
-:10F4D00008D0664D641EE8880190A6B228683446BC
-:10F4E000009015E00120FEBD0C2000996043095AF0
-:10F4F0008A060BD489078A0D0099801C085C5C4938
-:10F50000104305F0F8FB2889401A2881641CA4B236
-:10F510000198A042E8D8EE8000203870FEBD002897
-:10F5200003D0401E0880002070470120704710B5AE
-:10F530004E490288CB889A4201D3822010BD0B68C5
-:10F540000C21514359180B88CC789B059B0F1B024B
-:10F55000234341608C7904738C884481C38189681A
-:10F56000521C016102800281002010BD0121018234
-:10F570007047FEB505460020C043088068680F4606
-:10F58000817868468170686801886846018000213A
-:10F590008171288A2C88A04200D304462C8234E052
-:10F5A000288A401C2882301D6968FFF70DFE00285C
-:10F5B00029D139882F48814201D1601E388068885E
-:10F5C000A04227D33088F1788005800F00020843DD
-:10F5D00002906946301DFFF7F7FD002813D12989F5
-:10F5E000244881421AD000213046FFF707FE002848
-:10F5F00009D12A890298824205D1E968B06805F0EC
-:10F60000D3FA00280AD0641CA4B2204600F0B2F855
-:10F610000600C5D1641E2C828220FEBD7C80B0799C
-:10F62000B871B088B8803088388130788007810D13
-:10F63000B078014379810298B881B06838610020C0
-:10F64000FEBDFFB585B014460F46059800F092F850
-:10F65000050037D00548BE05807AB60D01281CD0BC
-:10F6600000212846FFF7CAFD002805E0441A0020C3
-:10F6700001020000FFFF000022D1287840060CD5CF
-:10F68000012168460170059981802988C180068121
-:10F690004481F8F7D0F9002812D12888AA78810788
-:10F6A000890D11438005800FEA7800021043BE42A5
-:10F6B0000AD0374A914207D3611E814204DD0B20F4
-:10F6C00009B0F0BD0120FBE7864201D90720F7E72A
-:10F6D000801B82B2A24200D922460E98002800D098
-:10F6E00002800898002804D0A8688119089805F0BD
-:10F6F00088FA0020E4E770B514460D4600F03AF8A9
-:10F7000000280DD001882980002C0DD00178807848
-:10F710008907890D01431E48814203D2012002E07E
-:10F72000012070BD00202070002070BD70B516460D
-:10F730000D4600F01FF804000DD02D882580FF2E07
-:10F7400016D0A807A178800D0843114905F0D3FA17
-:10F75000002E06D101E0012070BDFF31FF310331E1
-:10F7600089B2A170A80880008905890F084320800C
-:10F77000002070BD0749CA88824207D3002805D0FF
-:10F780000C22096850430C38081870470020704755
-:10F7900001020000441A0020F0B585B00E4605466F
-:10F7A0000020694608707078FE49C00003900C582C
-:10F7B000FD4F002D0ED0022D73D0002C72D020787A
-:10F7C000801E030005F0AAFC09837F7F7F83797F79
-:10F7D00077727F00002C03D1F4A16B2005F0ADFB04
-:10F7E0002078801E030005F099FC09065E5E5E1914
-:10F7F000365E50545E003078062803D0EBA17620A8
-:10F8000005F09BFBB8687168806C032205F0F9F97C
-:10F81000012069460870002835D1CEE730780C28E1
-:10F8200003D0E2A1812005F088FBE0680078002881
-:10F8300006D0B8687168806B102205F0E2F928E004
-:10F84000B8681021006B05F039FAB868816A006B5E
-:10F850000A787168F1E730780D2803D0D3A194209D
-:10F8600005F06BFB042069460870716848780978D8
-:10F8700000020843B9684A6A5178127809021143B4
-:10F88000484069468880084608E0C8A1AF2005F0D6
-:10F8900054FB6846007800288FD06846F5F703FBD4
-:10F8A0008BE727E01CE0C1A1B420F0E7B8686169EC
-:10F8B000006CFEF708F8A16900E0E168B868006C28
-:10F8C000FEF701F803E0B9A1E32005F036FBB868C4
-:10F8D0002146006CFDF7F7FFB24A03990020505013
-:10F8E000022D07D0002D05D0012D03D0AFA1EF20B0
-:10F8F00005F023FB05B0F0BD10B501780124012906
-:10F9000002D0022910D112E04268A748002182608B
-:10F910000170A4486C38C166016741678167D2896C
-:10F9200002214C3001F0E1F90024204610BDFF20F7
-:10F930009EA1163005F001FBF7E7F0B505469EA144
-:10F9400003C997B014911390002008A90875954930
-:10F950002A781031944C0491217805910126914F19
-:10F96000A168130005F0DAFB0CEF07309AF0EDEC1C
-:10F97000EBEAE9E9E8EF20700124FF264F3605465F
-:10F9800010A80570457001F0C1F90746012803D0A1
-:10F9900086A1304605F0D1FA10A93846FFF7FCFEE3
-:10F9A0002046641EE4B20028EAD10A2069460870A5
-:10F9B0006846029501F088FA002803D0FF207BA159
-:10F9C000583068E0002646E3C86A0078C0072FD0A8
-:10F9D000012069460870684601F076FA002804D0D4
-:10F9E000FF2072A16B3005F0A8FAA068006CFDF74B
-:10F9F00061FF050004D1FF206CA16E3005F09DFA77
-:10FA000008984078C0003D5006202870A068016822
-:10FA100069600069A8606448C01CE860284601F07D
-:10FA200053FA022804D0FF2060A1783005F085FA4F
-:10FA3000A068C06A00784007C4D5012069460870F4
-:10FA4000684601F041FA002804D0FF2057A1803019
-:10FA500005F073FAA068006CFDF72CFF050004D1D7
-:10FA6000FF2052A1833005F068FA08984078C00062
-:10FA70003D5006202870A068016869600069A86090
-:10FA80004948401DE860284601F01EFA022899D036
-:10FA9000FF2046A18D3005F050FA93E7A9680029B0
-:10FAA00033D0694608712979012932D0022904D05E
-:10FAB000FF203EA1A73005F040FA3A48102210304E
-:10FAC000A96805F09EF83748103036492031486063
-:10FAD0002078C1062CD5EF2108402070032069460C
-:10FAE0000870304810300290684601F00FF9044663
-:10FAF000022808D0002C06D0012C04D0FF202BA116
-:10FB0000B83005F01AFA69466FE101216A461171B1
-:10FB1000DBE7244A04996C3AD06748608860C86083
-:10FB20000621A86803F0FCFE1E4910310860CAE7F0
-:10FB300020210843207045E7A1E15AE119E1E6E000
-:10FB400086E056E000E081E2886C40798009012877
-:10FB500004D0FF2015A1CC3005F0EFF9A068017AA0
-:10FB6000002906D1416B406801F01FFAA16801200D
-:10FB70000872012069460870684601F0A5F900285E
-:10FB800004D0FF2009A1D73005F0D7F9A068006C98
-:10FB9000FDF790FE050004D1FF2004A1DA3005F046
-:10FBA000CCF90DE0BC1A0020B40000207372635C35
-:10FBB000736D2E630000000004411A8800A48000C9
-:10FBC00008984078C0003D5002202870A068416B22
-:10FBD0006960806CC01CA860284601F075F90400BB
-:10FBE00004D0FF20FD49E23005F0A7F9294628316D
-:10FBF000FBE01722684602720122027080788208B8
-:10FC0000287992008007800F024368468270FB20AB
-:10FC1000024028794007C00F800002436846827086
-:10FC2000EA8882804A6C02A901F090F9002804D089
-:10FC3000FF20EA49F73005F080F9052108A8017591
-:10FC40006846017A0187A0680026406C0F9006E2A2
-:10FC5000012069460870684601F036F9002803D093
-:10FC6000DE49DF4805F069F9A068006CFDF722FE67
-:10FC7000060004D18320D949800005F05EF9A06810
-:10FC8000006CFDF717FE1290002804D1D448D34928
-:10FC9000801D05F052F9D3488068006CFDF70AFE1C
-:10FCA000040004D1CE48CD49093005F046F9089842
-:10FCB0004078C0003E500A203070287A3071686861
-:10FCC000C84DB060A868406C30611720307312983E
-:10FCD000B4617061304601F0F7F80446022808D09C
-:10FCE000002C06D0012C04D01120BC49400105F0A5
-:10FCF00024F92046316AFFF74FFD2878052101409D
-:10FD0000042900D05EE6FB21084028702AE005980F
-:10FD100040084000207082071CD5FD221040207052
-:10FD20000F206A46107017201071486C02906846C8
-:10FD300000F0ECFF0546022808D0002D06D0012D6A
-:10FD400004D0A748A5493A3005F0F7F86946284697
-:10FD5000FFF722FD2078052101400429D2D1FB21A3
-:10FD600008402070072008A908759E48807808760A
-:10FD700028E6012069460870684601F0A5F80028C9
-:10FD800004D097489549543005F0D7F8A068006C26
-:10FD9000FDF790FD060004D113209049400105F0C5
-:10FDA000CCF890488068006CFDF784FD040004D115
-:10FDB0008B488A495A3005F0C0F808984078C0004E
-:10FDC0003E500720307087488068406870606868DF
-:10FDD000F460B060304601F077F8040004D0804849
-:10FDE0007E49653005F0A9F8316A2046FFF7D4FC5A
-:10FDF000E8E5012069460870684601F065F80028CA
-:10FE000004D0774875497A3005F097F8089840781B
-:10FE10001190A068006CFDF74DFD060004D1512043
-:10FE20006E49C00005F089F8A068006CFDF742FD3E
-:10FE3000040004D16A486949823005F07EF81198BF
-:10FE4000C0003E50C01929694160092030706868BF
-:10FE50007060A868B060A889B081634830611030D4
-:10FE6000B4617061304601F02FF8022804D05C487C
-:10FE70005A49903005F061F811982875A2E55A4A60
-:10FE800000208C32107002206B4618700192287985
-:10FE9000002801D0107098E0524803230C304068CD
-:10FEA000FB2703708378504A9B089B003B4083707C
-:10FEB0004B7A00271B07DB0F43708C3257600B7B9C
-:10FEC000C370CB7A1372537A0C7D5B08E4075B0036
-:10FED000E40F23430C461534D460FD242340CC7E2C
-:10FEE000E407A40F234353720B461C33136147717D
-:10FEF00007718B7A3B4A9C070C32A40F1268012CC5
-:10FF000004D19478A407A40F012C1DD09B089B005A
-:10FF10008B7293785B0702D48B7A5B0728D54B7A78
-:10FF200013AF5B075B0FDC005B00E3181478640021
-:10FF30001B19DBB2DC083C5D5F077F0F0623DB1B70
-:10FF4000DC40A3079B0F14E04C7A53796406640FDE
-:10FF500023404371147906273C400471E4001C439C
-:10FF6000204B5C7083789B089B005B1C8370D0E700
-:10FF700000238478FB273C408F7A7F07FF0FBF0068
-:10FF80003C4384704C7A6407640F047050780128F5
-:10FF900007D1487A000704D5032008A90875022074
-:10FFA0002DE0022B27D0012B2BD00F4B0020049AE1
-:10FFB000D86750609060D06018467C30024610329E
-:10FFC0005060887AFB2210408872684600F09EFEDE
-:10FFD000040035D0012C34D0004907E0ACFB000010
-:10FFE00009020000B4000020501A00206520C00063
-:10FFF00004F0A3FF25E0032008A908750120087676
-:020000040001F9
-:10000000E3E77E4C0D21E01C04F058FE2046103042
-:100010004460022008A908750E94A868002807D03B
-:100020000068206005997648202211430170CCE7D2
-:1000300005980007C9D57349734804F07EFFC4E7EB
-:10004000002669462046FFF7A7FB04E06E486D498D
-:10005000203004F072FF08A8007D002802D00DA80F
-:10006000F4F721FF304617B0F0BDF0B597B00C465D
-:10007000054600206946087061482F785F4E017878
-:10008000583E82683B0005F049F80BAA8407263BDE
-:100090004C6B79798F9CAA002B20694608730CA9B8
-:1000A00003A8FDF73DFC002804D0574855494130CE
-:1000B00004F043FF55490D9804F01DFE4F480160C0
-:1000C0004F4869680C300160AA68426001910820BD
-:1000D000694608708CE08A0610D5DF221140017055
-:1000E00003202070454810304168A1604068002816
-:1000F00002D00020207177E00120FBE7102256E0BB
-:100100002B20694608733D4903A85C39FDF708FCBC
-:10011000002804D03C483B496A3004F00EFF04201C
-:100120001BE02A206946087303A810220230696880
-:1001300004F067FD07A810220230A96804F061FDF1
-:100140002E4903A85C39FDF7EBFB002804D03920C9
-:100150002C49000104F0F1FE05202070666043E0A8
-:100160002A79002A02D00122114301700520694634
-:10017000087028798880A868029039E0D06A402306
-:10018000018819430180D06B6968102204F039FDA1
-:100190002AE0FB2211400170062069460870A96818
-:1001A00068680291019023E0CB0703D0022211433B
-:1001B000017058E70F20207017202071506CA0604C
-:1001C00012E0937A9B0706D0D26A44781388FF34F2
-:1001D00001342343138004221143017004E00A48D0
-:1001E0000849BD3004F0A9FE684600780028E0D038
-:1001F0006846F4F758FE36E701207047CC1A002015
-:10020000B4000020ACFB00001503000040420F00CA
-:1002100070B504780D460646230004F07FFF0B1CE2
-:10022000181C1C1C1C07181C1C181C000021052075
-:1002300001F038FDB068007805280CD0FA4800229B
-:10024000008811468300052001F087FC03E00021AF
-:10025000052001F027FD002D0ED000202870294632
-:100260003046FFF702FFF1482978005D884201D14E
-:10027000032070BD022070BD00213046FFF7F5FE5F
-:10028000002070BD30B5E8494B68497A0A01114633
-:100290000C315C5C032C0CD0044600252034257105
-:1002A00025725C5CA500AA18641C5C54985003205D
-:1002B00030BD062030BDF0B50446264620360D463A
-:1002C0003279012008218FB0002A0CD0012A21D0D8
-:1002D000022A2BD0032A04D12A78052A01D12970B9
-:1002E00000200FB0F0BD01203071606800280AD0F6
-:1002F000A069017061684160216981606169C160C4
-:10030000FFF7C0FFEDE7072028702069686060698B
-:10031000A86009E029780729E3D10220307105207F
-:100320002870C248203868600320DAE72978052958
-:10033000D7D1A08910280AD9103880B2A081A1682D
-:100340001023091803A86A6800F054FE2DE0102855
-:1003500004D0C1B20BAA1020A76809E010232269BB
-:10036000A16817E0491EC9B2401EC0B27B5C13549D
-:100370000029F7D100280AD0401EC0B280211154B4
-:10038000002102E0401EC0B211540028FAD1626977
-:1003900010230BA907A800F02DFE102307A903A81E
-:1003A0006A6800F027FE032030716068019003A89E
-:1003B000029005206946087029466846FFF728FF25
-:1003C0008FE7F0B5044626460D46203631790120E8
-:1003D0008DB000290BD0012938D0022905D1297808
-:1003E000052902D10920287000200DB0F0BD217D23
-:1003F0006846CA07D20F02738807C10F68460174A6
-:10040000012203A905A800F0EDFD04A9012205AF12
-:10041000481D00F0E7FD0722B81CE16800F0E2FD8E
-:1004200007A807220130216900F0DCFD6068019017
-:1004300009A80290102305AAA16800F0DBFD0120A5
-:100440003071052168460170294621E02978052987
-:10045000CBD1062203A8E16900F0C4FD04A806225E
-:100460000230A16900F0BEFD042106A800F0B2FD33
-:100470006068019007A80290102303AA696800F041
-:10048000B9FD02203071052069460870294668468A
-:10049000FFF7BEFEA9E7F0B5074685B00D46002080
-:1004A000694608703E4662482036327981791338B1
-:1004B00001240078130004F031FE180DFEFDFCFB52
-:1004C000FAF9F8F7F6F5F4F3F2F1F0EFEEEDECEB04
-:1004D000EAE9E8E7B968039100291BD001226946DF
-:1004E0000A7003220A710A224A7139690291397924
-:1004F00000297DD0039A1278002A7AD00C2A78D26B
-:10050000130004F00BFE0BEF09EF354D8498B0F1AA
-:10051000EDECEF000020C8E30021062001F0C2FB53
-:100520003879072866D1424C133C2078022802D043
-:1005300000287FD101E00020207003980079C11FBE
-:100540000A2901D30A2598E1607039480722C01FA3
-:10055000039900F047FD01203071207002206946A8
-:1005600008703348801F01903869401C029037E2C0
-:1005700011293DD12E4C133C0228DAD160686178F4
-:10058000007A884201D9062577E10399264810228E
-:10059000491C303800F026FD03202070022045E180
-:1005A0001129E6D1224C133C0428C2D10520207029
-:1005B00003991D481022491C203800F013FD062025
-:1005C0003071786903210170626851684160164991
-:1005D0002039816021460C31C160C91D0161017D56
-:1005E000537A49084900DB07DB0F1943017502E024
-:1005F00070E354E384E1D3688361FD231940537AA7
-:100600009B07DB0F5B0019430175116976E1022935
-:10061000AFD1002867D0052069460871039840785B
-:1006200048713869029051E3201B00209C51010061
-:10063000DB00002082E011299BD1F74C06287DD1F8
-:10064000A0680399806B1022491C00F0CBFC0621A6
-:100650006846017038690290002168460171FFF711
-:10066000D7FD072057E00B299BD1EB4C07287ED103
-:10067000A0680399006B0222491C00F0B3FCA0683B
-:100680000822406B039917E00EE116E3FDE2DDE27C
-:10069000C7E2BCE29EE267E248E241E21FE2F5E126
-:1006A000DFE1C8E1BEE1B1E1A5E16AE147E128E1AE
-:1006B000DAE0BEE0AFE075E0C91C00F093FC062173
-:1006C0006846017038690290002168460171FFF7A1
-:1006D0009FFD204613304179490849003EE041E042
-:1006E0001BE001E05CE0EFE2112991D1CA4C08283F
-:1006F0003DD1A0680399C06B1022491C00F072FC28
-:10070000062168460170386902900021684601712F
-:10071000FFF77EFD09202070C9E208298CD1BE496F
-:10072000092824D1039842788868016C0A700399DB
-:10073000406C0622891C00F055FC00E017E0062101
-:100740006846017038690290002168460171FFF720
-:100750005FFDB14813304179FD221FE041715EE237
-:100760003071F2E11129C0D1AB490A2801D0082526
-:1007700083E088680399806C1022491C00F032FCE9
-:1007800006216846017038690290002168460171AF
-:10079000FFF73EFDA04813304179FB221140DDE711
-:1007A00007256AE0297802297ED19B490128FBD1DF
-:1007B0006A684A6015780846002D5CD106216A46B1
-:1007C00011703969029107211171029902240C708C
-:1007D000CA785207520FCA704B795B075B0F4B7197
-:1007E0008B795B075B0F8B71D20701D18A714A71DC
-:1007F00005460A794078824200D26A70864807220C
-:10080000133000F0EFFB00202C7030710146684679
-:10081000FFF7FEFC4BE229780429C5D103286FD1EC
-:1008200008227E48696800F0DDFB03203071042057
-:10083000F2E129780429B7D1774F0328B4D177485A
-:1008400008220830696800F0CDFB04203071786818
-:100850004168002906D003212970002129714068D0
-:10086000A86072E10320D7E1287803289CD1287979
-:1008700000281AD00546002D16D0062168460170C2
-:1008800038690290022168460171029805210170C1
-:10089000457000216846FFF7BBFC012168460170E6
-:1008A00004210171457115E293E15B49A86849682B
-:1008B0000028486001D15A484860052030717869A5
-:1008C000032202704A684260544A8260524A0C32E3
-:1008D000C260D21D0261027D4B7A5208DB075200D2
-:1008E000DB0F1A430275CB688361FD231A404B7AF4
-:1008F0009B07DB0F5B001A4302750969C16130E198
-:100900000DE12978092988D14349032885D104209C
-:100910000870062069460870386902901120087135
-:10092000029803210170401C1022696800F05AFBF4
-:1009300000216846FFF76CFC00203071B7E1297890
-:10094000092993D1052891D134496A6820391020AA
-:10095000401EC0B20B5C145CA34203D000200425EF
-:1009600030718AE70028F3D10720307178690421BB
-:1009700001702949496849684160284981601039F6
-:10098000EEE028780A28BED106206946087038694A
-:10099000029011200871029804210170401C10225D
-:1009A0001E4900F01FFB00216846FFF731FC1A4882
-:1009B000102140786A68091AC9B2101800F00AFBC1
-:1009C0006868019014481330C178C9070BD0817949
-:1009D000002902D14079002805D0082030711BE1A0
-:1009E00029466846EFE007206946087000216846FE
-:1009F000FFF70EFC5FE128780E2884D1064869686D
-:100A000081608969407808700920A9E6C80701D08B
-:100A10000A20FFE00F20A3E6C8000020101B0020E2
-:100A20007C51010028780F2879D1A868386128798D
-:100A300038730B20FAE628780428F5D1FC4C696855
-:100A4000A0680822006A00F0CDFA0C2030717869A5
-:100A50000722B9690270A268D3684360126A826093
-:100A60007EE028780D28DFD1F14C6968A068022368
-:100A70000269C06900F0BEFA0D2030717869062164
-:100A80000170A1688A684260096966E028780C28CC
-:100A9000CAD1E74C6968A0686278406A00F0A2FA9F
-:100AA0006078A2681021091A526AC9B2101800F0C1
-:100AB00091FA062168460170386902901122684651
-:100AC0000271029810220170A168401C496A00F06E
-:100AD00089FA00216846FFF79BFB0E206EE028781C
-:100AE0000F2876D1062168460170386902900B21E3
-:100AF00068460171029C0720CD4D2070A868022233
-:100B0000C169601C00F06EFAA8680822016AE01C46
-:100B100000F068FA00216846FFF77AFB7AE7C8E040
-:100B2000880701D5102075E0132019E628780F28D2
-:100B30004FD1A86838612879387311203071BC48CA
-:100B4000816848690078002801D00324CAE07869E8
-:100B500006220270C9684160B6498160B549091D25
-:100B6000C160FFF78FFB30E0B148806841690978C8
-:100B700000290CD129780C292BD1AD4C6968806AE9
-:100B8000102200F02FFAA16801204969087006219F
-:100B90006846017038690290112168460171029817
-:100BA00008210170A249401C89681022896A00F05E
-:100BB00019FA00216846FFF72BFB1220307109213A
-:100BC000684601702946FFF723FB044601287DD0C3
-:100BD00088E06FE028780F286CD1062069460870FD
-:100BE0003869029008200871029809210170904923
-:100BF00089680A78D207D20F427049680622801CA1
-:100C000000F0F0F900216846FFF702FB8CE7480787
-:100C100005D514203071092069460870E0E61620D9
-:100C20009EE528780F2851D1A86838612879387353
-:100C3000152030717869062101707D4989688A68BC
-:100C40004260096981607B49891D89E728780C2801
-:100C500045D1774C6968A0681022C06A00F0C2F9DB
-:100C600006206946087038690290112008710298C0
-:100C70000A210170A168401CC96A102200F0B2F973
-:100C800000216846FFF7C4FAC9E769481330407984
-:100C9000002810D0C10703D065480621017006E086
-:100CA000800701D5082000E00A206149087000246F
-:100CB00018E00BE013E0172052E55D49002805D04D
-:100CC0000020307108700A20694608706846007874
-:100CD000002804D000216846FFF79AFA00245448FF
-:100CE00000210170204605B0F0BD10B5524BFF2425
-:100CF0005C72586019721A80002204E0491EC9B261
-:100D00000B010C33C2540029F8D110BDF0B54A4E86
-:100D10000546717A01208DB0FF2971D00127727AC2
-:100D2000736811015C180C31595C8900091F645803
-:100D30006A7021780B0004F0F1F90B960709272C53
-:100D400059888D4A4F5492002F707CE02146203103
-:100D50000A9109790120002902D0012967D10EE00A
-:100D60006068019005A802900D21C01C00F032F9C6
-:100D7000032205A8A16800F035F90A984EE0297809
-:100D8000052974D106215DE029462046FFF719FBAD
-:100D900069E021462031069109790120002902D01D
-:100DA000012964D10EE06068019007A80290082232
-:100DB000E16800F017F9082209A8A16800F012F90B
-:100DC00006982BE02978052951D10A213AE02946D5
-:100DD000204600F01AF946E029462046FFF76BFA54
-:100DE00041E029462046FFF756FB3CE021462031F2
-:100DF000059109790120002903D0012937D11DE08F
-:100E000056E06068019007A802900822A16800F0EF
-:100E1000E9F8082109A800F0DDF80598694607718E
-:100E20000520087029466846FFF7F2F91BE00BE041
-:100E3000C800002074510100201B002029780529DA
-:100E400015D10B212970002011E02946204600F021
-:100E500023F908E02946204600F04EF903E0294630
-:100E60002046FFF7C9F9002801D001280CD12562DE
-:100E7000717A736809010C315A5C521E1206120E07
-:100E80005A5401D003204AE70328FCD0737A7268D1
-:100E900019011D010D312C46515C7172FF270D3473
-:100EA00017550C35545D002C02D0FF2903D1737205
-:100EB0000DB0F0BD21460C010D34145DFF2CF9D1AD
-:100EC00009010D315354F3E770B5AD4C0546607A16
-:100ED000214603464A6811E0010108460C30105CC7
-:100EE00008E0401EC0B286008E199659AE4201D16C
-:100EF000042070BD0028F4D10D31505CFF28EBD1E7
-:100F00009F480021007A01E0491CC9B2884204D9F7
-:100F10000E010C36965D002EF6D1884201D80520D0
-:100F200070BD08010D30135461722846FFF7AAF90D
-:100F3000032806D0617A626809010D31515C617243
-:100F400070BD28462830FFF7E1FE70BD10B504786B
-:100F50000123012C14D10C78022C11D30B23137014
-:100F600083785B075B0F537002220A708088002829
-:100F700005D0830000221146062000F0EEFD00237C
-:100F8000184610BD0EB50022012105280AD00628FA
-:100F900007D1684601700221017142710021FFF7FB
-:100FA00064F80EBD68460170F6E710B58EB00C46C9
-:100FB00006216A461170019072480290001D03904C
-:100FC0006846FFF781FF102220460B9900F00AF8CF
-:100FD0000EB010BD002202E0491EC9B242540029E1
-:100FE000FAD1704703E0521ED2B28B5C8354002AC0
-:100FF000F9D1704730B505E05B1EDBB2CC5CD55C47
-:101000006C40C454002BF7D130BD3EB504462030AF
-:101010000D4602790121002A02D0012A3AD10FE0BF
-:101020006168019157490831029101210171052040
-:101030006946087029466846FFF7EAF8014629E044
-:101040002878052826D169681022A06800F087F862
-:101050006868C07B000606D54A4AA068102318328B
-:101060000146FFF7C7FF1022A168E06800F077F89B
-:10107000A068C07B000606D5424AE06810231832FB
-:101080000146FFF7B7FF07202870A0686860E06896
-:101090000021A86008463EBDF0B5044626460F462E
-:1010A00020363179012089B0002909D0012905D1E4
-:1010B0003978052902D10C203870002009B0F0BD24
-:1010C000606803AD01900295022203A8A168FFF7B2
-:1010D00089FF0222A81CE168FFF784FF0C21281D6C
-:1010E000FFF778FF01203071052069460870394606
-:1010F0006846FFF78DF8E1E710B5034620331C7909
-:101100000122002C04D0012C10D0022C25D11EE08D
-:1011100001211971C16806220A70406848601948A7
-:10112000801C8860801CC86008460CE00C780C2C81
-:1011300013D102221A71C2680523137049685160E5
-:10114000806890601046FFF79DF8024605E0087839
-:101150000B2802D10D2008700022104610BD10B5DA
-:10116000002409E00B78521E5B0023430370401CEF
-:101170000B78491CD2B2DC09002AF3D110BD000063
-:10118000201B00207451010070B50D46040012D0E0
-:10119000002D10D02101284603F090FD1022544963
-:1011A000284603F02EFD5248012108380180448072
-:1011B0004560002070BD012070BD70B54C4E00240C
-:1011C0000546083E11E0716820014018817BAA7B2A
-:1011D000914209D1C17BEA7B914205D10C2229467B
-:1011E00003F0E2FC002806D0641C30888442EADB6D
-:1011F0000020C04370BD204670BD70B50D4606008E
-:101200000AD0002D08D03A4C083C20886188401C48
-:10121000884203D9042070BD102070BD3046FFF70E
-:10122000CCFF002801DB401C0AE020886168000137
-:1012300040181022314603F0E4FC2088401C208036
-:101240002870002070BD70B514460D001FD0002C12
-:101250001DD00021A170022802D0102817D108E06B
-:10126000687829780002084311D00121A17010800C
-:101270000BE02846FFF7A1FF002808DB401CA07008
-:10128000687B297B000208432080002070BD01207C
-:1012900070BD70B5054614460E000AD000203070AF
-:1012A000A878012807D004D9114908390A88904242
-:1012B0000BD9012070BD002C04D02878207028881C
-:1012C000000A50700220087010E0002C0CD0496811
-:1012D0000001411810391022204603F092FC2878B2
-:1012E00020732888000A607310203070002070BDC1
-:1012F000EC000020734909680160002070477149C3
-:1013000008600020704701216F4A704B002803D00D
-:10131000012805D06E48704791630020187001E0E5
-:10132000D1631970002070476A490120086068483D
-:10133000801C70470422684B6649002805D05A601B
-:10134000086901221043086108E00869400840006C
-:1013500008619A605C490020C031886000207047B5
-:101360005C490622002808D0012809D002280DD0A7
-:1013700003280FD05648401C70470869904302E08C
-:1013800008699043801C08610020704708699043F9
-:10139000001DF8E708691043F5E74E494A6A024321
-:1013A0004A62002070474B494A6A82434A620020E1
-:1013B00070474849496A0160002070474549CA6939
-:1013C0000243CA61002070474249CA698243CA6128
-:1013D000002070473F49C96901600020704730B55F
-:1013E0000546002072B601463A4A384C4032002D7C
-:1013F00011D00123012D0CD0022D02D0072062B69E
-:1014000030BDA3706478002C01D09363F7E791633B
-:10141000F5E7A170F9E7A170F9E72F49042088608A
-:1014200029490020C03188602849012008702B49D3
-:101430000A688023120A12021A430A6028490860C7
-:10144000704722480078704770B5EFF31080C507E9
-:10145000ED0F72B61D4C6078401C0006000E6070E7
-:1014600003D120A1CC2003F068FD6078012806D1CB
-:10147000A078002803D01749012040318863002D4F
-:1014800000D162B670BD70B5EFF31080C507ED0FE7
-:1014900072B60E4C6078002803D112A1DC2003F054
-:1014A0004CFD6078401E0006000E607006D1A078EA
-:1014B000002803D00749002040318863002D00D167
-:1014C00062B670BD0004004040000040FC000020F7
-:1014D00004200000000500400003004000E400E09C
-:1014E00000E100E07372635C736F635F706F776538
-:1014F000722E63008107C90E002808DA0007000F6A
-:1015000008388008B94A80008018C06904E0800863
-:10151000B74A800080180068C8400006800F7047F6
-:10152000B44948788978884201D3401A02E02122E0
-:10153000511A0818C0B27047AE49233148788978EB
-:10154000884201D3401A02E02122511A0818C0B281
-:101550007047A849463148788978884201D3401AB3
-:1015600002E02122511A0818C0B27047A04810B5F5
-:101570000C300168FF22120291430122D203114371
-:1015800001609C49002023314870887023394870DD
-:101590008870463148708870974802F0FFFA964884
-:1015A000401C02F0FBFAF2F7C7F900F015F910BD84
-:1015B00020207047B4E770B50C4605460026FFF7BB
-:1015C000AFFF8C49A04214D30A46203A002320469C
-:1015D000641EE4B200280BD08878105C28708878EC
-:1015E0006D1C401CC0B288702128F0D18B70EEE7D2
-:1015F000012600F0F1F8304670BD202070479BE7CF
-:1016000070B50C4605460026FFF796FF7949233151
-:10161000A04214D30A46203A00232046641EE4B2B6
-:1016200000280BD08878105C287088786D1C401CCE
-:10163000C0B288702128F0D18B70EEE7012600F04F
-:10164000CBF8304670BD202101700020704710B5E6
-:101650000446FFF77EFF2070002010BD70B50C46D9
-:101660000546FFF776FF63494631A04215D30A4687
-:10167000203A00232046641EE4B200280BD088786C
-:10168000105C287088786D1C401CC0B288702128BE
-:10169000F0D18B70EEE7002400E0584C00F09CF88D
-:1016A000204670BD70B50C460546212904D9FF209F
-:1016B00053A1473003F041FC4C484068103840B219
-:1016C000FFF718FFC6B20D20FFF714FFC0B2864225
-:1016D00007D2FF204AA14D3003F02FFC01E0F2F7C2
-:1016E0006BF921462846FFF766FF0028F7D070BD4A
-:1016F000F8B5404E07462336B1787078212200F0C5
-:1017000060F8354623353B4C00280ED0A178607830
-:10171000212200F056F8002814D0A97868782122F8
-:1017200000F04FF800281AD025E032497078C91C23
-:101730000F547078401CC0B2707021281BD100205B
-:10174000707018E02B49607820390F546078401C85
-:10175000C0B2607021280ED1002060700BE02549D6
-:10176000687826310F546878401CC0B26870212810
-:1017700001D100206870B1787078212200F021F842
-:1017800000281DD0A1786078212200F01AF80028E6
-:1017900016D0A9786878212200F013F800280FD01D
-:1017A000F2F7ECF8144802F001FA012149038842EB
-:1017B00003D013A1C12003F0C0FB0F4802F00EFAC2
-:1017C000F8BD401C884205D0904201D1002901D0CB
-:1017D000002070470120704710B5074802F0E6F975
-:1017E000002801D1F2F7B9F810BD000000ED00E0CB
-:1017F00000E400E04C1B0020FF0000200720000058
-:101800007372635C736F635F72616E642E6300005A
-:1018100010B5284802F0C2F9002803D026A11D20E7
-:1018200003F08BFB2348401C02F0B8F9002803D0DA
-:1018300021A1212003F081FB10BDF1B5224D6F687D
-:1018400001261C4802F0B2F91A4C002803D10026E8
-:10185000601C02F0C3F91D4A1D490120506000BF01
-:1018600000BF00BF00BF00BF00230B604B60009BA8
-:101870006B60106000BF00BF00BF00BF00BF086802
-:10188000002802D148680028F9D048680028E4D12F
-:10189000002E04D06F60601C02F088F907E0601C25
-:1018A00002F084F90028D3D1024802F097F9002011
-:1018B000F8BDC2E7010100207372635C736F635F60
-:1018C0006563622E6300000000E5004000E0004018
-:1018D00000E1004030B5EFF31081CC07E40F72B6A1
-:1018E0001D4A116910230D461D431561002C00D1BE
-:1018F00062B61A4DC406E40E0120A0402C680442D2
-:101900000DD0C8060AD4EFF31080C007C00F72B61E
-:10191000116999431161002800D162B630BD20BF22
-:1019200040BF20BFEAE70E4908784A78401CC0B2A1
-:10193000904200D008707047084A094820BF40BF55
-:1019400020BF4178037843701368002B02D10378DD
-:101950008B42F3D00020704700ED00E000E200E091
-:1019600003010020FEB5F64C07466068FF213E01EA
-:1019700081552178FF2913D0090108314158324699
-:10198000491E083209020192090A805800F0CEF976
-:10199000002802D02478254615E061682078885513
-:1019A0002770FEBDE6484268019811582801009052
-:1019B0000830105800F0BAF9002806D1E0482C464B
-:1019C000416800980D5CFF2DECD1DD482101406895
-:1019D00085554754FEBD70B5D94A04460020157A96
-:1019E00053680AE00201561C9E5DA64203D10C32E8
-:1019F0009A588A4204D0401CC0B28542F2D8FF20D7
-:101A000070BDF8B5CE4F3E7801F01AFE0146FF2EAC
-:101A100071D03401254678680835405900F086F9C0
-:101A200002280CD97868405901F0FDFD01F008FE4C
-:101A300001467868405900F079F902285BD8C0491E
-:101A40004868025D0A70A11C425C002A0CD0521E3C
-:101A5000425441590122D20589180902090A41510B
-:101A60003046FFF77FFF30E0631CC25C0092221D0E
-:101A700094468258002A10D001239B029A420FD923
-:101A80009205920D43595703DB191B021B0A435160
-:101A90006346C3589A1A920A09E0FF21C1540AE02A
-:101AA000435952039A181202120A42510022425418
-:101AB0003046FFF757FFA2480C344168C2680098CF
-:101AC000095980001258009890479D4C2078FF28B3
-:101AD00011D0000161680830085801F0A4FD01F040
-:101AE000AFFD01462078626800010830105800F010
-:101AF0001DF9022886D3F8BDF8B51C4615460E46DA
-:101B00000746FF2B03D38FA1D42003F016FA8C488D
-:101B1000FF21C760456004720674017000224270A4
-:101B2000104604E00201521C401CA954C0B2A0425D
-:101B3000F8D3F8BD70B5824C06466578207C8542A6
-:101B400003D380A1E72003F0F8F9E068A90046502C
-:101B50006078401C6070284670BDFFB581B01D469E
-:101B6000FF2401F06DFD764F064679780198814299
-:101B700003D874A1F52003F0E0F971480021037A3D
-:101B8000406810E00A019446521C825CFF2A25D06E
-:101B9000019FBA4205D162460C328758029A974299
-:101BA0001ED0491CC9B28B42ECD8FF2C18D02101A1
-:101BB0004A1C019B83540B460C33029AC250039B70
-:101BC0005F4F0022012B0ED00B1DC25001239B0240
-:101BD0009D4216D9AA05920D08D008E00C46E0E710
-:101BE000FF2005B0F0BD0B1DC550EFE71A465303AB
-:101BF0009B190E461B0208361B0AAA1A8351920A29
-:101C000009E0002D00D101256B039B191D022D0A4F
-:101C10000B460833C550891C42543D463E78204649
-:101C2000FFF7A0FE2878B04214D0000169680830A0
-:101C3000085801F0F8FC01F003FD29786A680901F1
-:101C4000083152580146104600F070F8022801D2BF
-:101C5000FFF7D7FE0198C4E770B50C46054601F0C2
-:101C6000EFFC064621462846FFF7B5FEFF2817D0B1
-:101C7000334D04012046696808300858314600F0A9
-:101C800055F80121090340186968A41C095D400B3F
-:101C9000002901D089020818002800D1012070BD58
-:101CA000002070BDF3B581B00F460198FFF793FE99
-:101CB000FF282AD0224E3578726829460C4604E067
-:101CC000844205D025462301D45CFF2CF8D11CE0CA
-:101CD000FF2C1AD0A5421CD10801105C3070FF28DF
-:101CE00015D000010830105801F09DFC01F0A8FC4F
-:101CF00001463078726800010830105800F016F87C
-:101D0000022806D2FFF77DFE03E00020FEBD01F0B1
-:101D100092FC39460198FFF79FFF22017168FF236B
-:101D2000541C0B558A5C2B01CA54FEBD401A00029C
-:101D30000121000AC905884200D90020704700002F
-:101D4000981B00207372635C736F635F74696D65C9
-:101D5000722E6300F0B500241C4A01211C4B0803BD
-:101D6000546018601B4B1C601B4C20601B480469AE
-:101D7000E443E406E6170469761C10252C4304614D
-:101D8000174C6160174D296000E020BF1F68002FCD
-:101D9000FBD0002E03D107691026B7430761906876
-:101DA0008005906801D5104A10436960A160002148
-:101DB00019600121084A09031160F0BD10B50446FD
-:101DC000FFF7C8FF2060002010BD000000C50040E4
-:101DD00080E100E000C1004080E200E000ED00E0B2
-:101DE00000C3004000C0004000FCFFFF70B51F4969
-:101DF0000A68002A17D000231D4601244A68521C95
-:101E00004A60092A00D34D600E792246B2400E681E
-:101E100016420AD072B60B6893430B6062B64968EB
-:101E20000160002070BD052070BD5B1C092BE5D34F
-:101E30000FA1362003F081F8F5E701201049800555
-:101E400008607047EFF31081CA07D20F72B6012104
-:101E500081400648036819430160002A00D162B638
-:101E6000EBE7024800210160416070470801002053
-:101E70007372635C736F635F6576742E630000003A
-:101E800000E200E00120810708607047012081071F
-:101E9000486070471048C068C00700D001207047F4
-:101EA0000D488068C00700D0012070470A4840698B
-:101EB000C00700D0012070470748C0697047064935
-:101EC0008A69D20306D589698907890F814201D1C0
-:101ED000012070470020704700040040F8B5FE4C18
-:101EE000207BE17A88421AD00126FC4D0027E07A57
-:101EF000215C14200A4642435019037C052B0FD065
-:101F0000062B1BD0072B28D0437C012B33D0F4A108
-:101F1000F64803F012F8207BE17A8842E7D1F8BD59
-:101F20000674E07A0A2807D0E07A401CE072491C67
-:101F3000C8B2AA5802210CE00020F7E70674E07A44
-:101F40000A2808D0E07A401CE072491CC8B2AA589E
-:101F500003219047DFE70020F6E70674E07A0A28BD
-:101F600007D0E07A401CE072491CC8B2AA58082188
-:101F7000EFE70020F7E74774E07A0A2807D0E07A15
-:101F8000401CE072491CC8B2AA580721E1E70020B2
-:101F9000F7E770B5D64D06206872D648002444771E
-:101FA000047738300473C472D34801F0F7FDD34886
-:101FB0000475EC72D249601E88606C71AC70EC7074
-:101FC0002C716C70CF48022104704470CE480470AC
-:101FD000047528300470491EFAD10120F1F76EFD16
-:101FE0000020F1F76BFD0120A871F0F785FDC748CF
-:101FF000F0F794FDC64C2070C648F0F78FFD607076
-:10200000F1F700FD70BD10B5F1F727FDC04C207849
-:10201000F0F7A2FD6078F0F79FFDB54C207A00281C
-:1020200005D0FFF730FAF0F726FE0020207210BD31
-:1020300070B5AF4CA079002804D0A9A1B64802F031
-:102040007CFF70BDE07A002804D11320A4A14001D8
-:1020500002F073FF0126A6710025E572607A042163
-:10206000142250439D4A80180174A5488168491C78
-:1020700004D0691E81600120F1F720FD0020F1F7F6
-:102080001DFDF1F701FD01F023FEF1F706FEA34867
-:10209000056005600120A249C0030860F0F78EFFCB
-:1020A00098480078022804D0032804D1E07800285A
-:1020B00001D0A67000E0A570F1F7DBFD70BD03460E
-:1020C00086490520142242435218203A127F002AE2
-:1020D00004D0401E0006000EF4D170471422424383
-:1020E00051180A46403AD362012220390A777047D4
-:1020F000012805D0032805D1002903D1002070470D
-:102100000029FBD010B47A4C002363707D4A00286C
-:1021100090700CD002280AD007291AD20B007B44F9
-:102120001B79DB189F441505070D0F111300D370A1
-:1021300003E01B2000E03A20D0700120607010BC4A
-:1021400070475820F8E77720F6E79620F4E7B520A7
-:10215000F2E710BC0020704710B56A484078F1F7EC
-:10216000A3FD80B210BD411E1422504310B55B4A3E
-:102170008418203C042902D8207F002803D158A1CC
-:10218000684802F0DAFE207F012803D054A1664897
-:1021900002F0D3FE0020207710BD70B5554C607F53
-:1021A000217F884201D1012500E00025F1F715FDCE
-:1021B000F1F77AFD617F227F914201D1012100E098
-:1021C0000021A942EBD170BDF7B50646481E8446F2
-:1021D0008EB0C0B2142204905043404A851828465D
-:1021E0000595007C2D1D07282AD13B4C0027E07A5D
-:1021F000227B824221D0235C049A934201D10127A1
-:1022000001E0002F04D00A2811D0421CA25C225405
-:102210000A280ED0401C227BC0B28242EBD1002F94
-:102220000BD0207B002806D0207B401E04E000223B
-:10223000ECE70020EFE70A202073059A01201074D4
-:1022400060462B4C04280FD814204143234808181B
-:102250002038007F002807D00598007C012807D08F
-:102260001098807A012807D01DA1304802F065FE41
-:102270001098807A012871D10598184B007C0228AB
-:102280001AD0154C207B0A2874D0207BE17A401CA0
-:10229000884204D1C92012A1800002F04EFE0599A7
-:1022A00001204874217B04986054207B0A2865D063
-:1022B000207B401C20731CE1607A049A0146904206
-:1022C00006D0014614277843C018807C9042F8D18C
-:1022D000627A824235D12BE0A41C0020B41C00207D
-:1022E0007372635C72656D2E63000000D50500009B
-:1022F000381D00206C1C0020441D00208C1C002078
-:10230000181D002012010020C41C0020031A010027
-:1023100010010020DD1E01007F02000000F50040DA
-:1023200080E200E0CD020000CE02000017030000B2
-:10233000617A14225143C918897C61720121A1720A
-:1023400007E014224243D21814277943927CC9181B
-:102350008A74142206215043C01881741098007AA0
-:10236000062819D203007B441B79DB189F4408120E
-:10237000100E0C0AE07A00288CD090E7002099E734
-:1023800000210FE0B4210DE073210BE0322109E0C0
-:102390000A2107E0062105E0FF20FE49E23002F0B5
-:1023A000CCFD0021109802910068401A2860109915
-:1023B000097A002912D00221401A0102090A296073
-:1023C00010980268406810180002000A68601098AF
-:1023D000807A0228109803D0007B74E00421EBE798
-:1023E000007A002813D00222029810188446109810
-:1023F0004268604608301718E748029A40789042D1
-:1024000002D9E278002A04D03846083005E00422D8
-:10241000EAE7029A801AC0190830627A062A1CD0AC
-:10242000627A14235A43DD4BD2185268914214D079
-:10243000DB4B0793617A14225143D84A89184A68C2
-:102440008968921B891B12020902120A090A90422A
-:102450003AD89A4238D8994236D83018C01B000270
-:10246000000A286010996044CE4AC9680002000A38
-:102470009446421A01239B0507929A4201D21046C4
-:1024800014E00A1A09929A4201D207980EE0079ABC
-:102490006346624503D9591A0818401C06E0099A98
-:1024A000624506D9181A4018401C404200285FDCDB
-:1024B00003E0B849BC4802F040FD2868C01900029A
-:1024C000000A686000202872686808270830000247
-:1024D000000A68601098407AA8721098007A6872B2
-:1024E00003280ED200280CD0FFF7D4FC002803D01C
-:1024F00007E0002011B0F0BD02983A210F1A3220F7
-:102500000290A5480178012901D0032909D1417819
-:102510000298814205D9E078002802D10298081A71
-:10252000C71928689E4A801B844601026868090A08
-:10253000801B03021B0A8F421AD81746914217D8F4
-:10254000BB4215D8617A062916D0677A6146062201
-:10255000039200923A4614235A43904BD218936840
-:102560009B1B8B4216D80397977C062FF2D177E0FE
-:10257000049801F059F9BCE7059802220499027405
-:10258000627A062A00D0627A827461720120A07297
-:1025900011B0F0BD062F63D00022394694461422B4
-:1025A0007E4B4A43D21853689B1B834229D2917BAE
-:1025B000AB7A99421FD805980521049C7B4D017484
-:1025C000287B0A2811D0287BE97A401C884203D155
-:1025D0007049774802F0B1FC287B2C54287B0A28EC
-:1025E00007D0287B401C287383E7E87A0028EFD0C7
-:1025F000F2E70020F7E701218C46917C0629CED135
-:1026000002E0604600282AD03D46009114202A4668
-:10261000424362480621161831741038007B0A289C
-:10262000624816D0017BC07A491C814203D161A166
-:10263000634802F082FC5D48017B4554017B0A2916
-:102640000BD0017B491C0173B57C0098A842DDD1F9
-:1026500006E0C07A0028EAD0EDE70021F3E7009712
-:102660000599022008744D4D607AB84207D105994A
-:1026700000988874049860720120A07221E0039889
-:10268000062F0FD0062803D14AA14E4802F055FC70
-:1026900003981422504340190499817405990098B5
-:1026A00088740EE0062803D142A1474802F045FC99
-:1026B0000398142250434019049981740599062007
-:1026C0008874012011B0F0BD70B50D4606463F4933
-:1026D00000242046891BA04103D236A13C4802F0C9
-:1026E0002CFC3C490020491BA04103D231A13A48AF
-:1026F00002F023FC394A70190021821A8C4101D35F
-:102700003749401870BDF8B5401EC0B21421484387
-:1027100022494518687B062813D203007B441B79A5
-:10272000DB189F44020C0A080604002066E0B4206F
-:1027300010E073200EE032200CE00A200AE00620B0
-:1027400008E0FF201BA1E23002F0F7FB697B0020CC
-:10275000002953D0022140186968002440180C2138
-:1027600000026956000A00294ADBF1F79DFA174A70
-:1027700006460C27EF570021101AA14103D20DA1E4
-:10278000134802F0DAFB13490020C91BA0412CD2E8
-:1027900008A127E0E022010012010020B41C002063
-:1027A000FFFF3F00FFFFFF0014070000A41C0020F4
-:1027B000090200007372635C72656D2E6300000095
-:1027C000C7030000DF030000E5030000FF7F841E55
-:1027D000F50300000020A107F60300000080841E1E
-:1027E00000807BE1FB4802F0A8FBFB4AF0190021C6
-:1027F000821A8C4101D3F9494018F8BD0421AAE797
-:10280000F1F752FA0C21695600224018F449091ACE
-:10281000A241F2D24042F8BDF0B5064683B0F1487D
-:102820000190457A029534687068001B0702EE48F3
-:102830003F0A001B0090062D2DD01420294641434D
-:10284000EA480122081884464168E748920586460E
-:10285000081B904210D3631A93420DD30246704670
-:10286000724503D900984018401C05E073450ED905
-:10287000411A0819401C404200280CDA60460295B3
-:10288000857C0198C0790028D5D003B0F0BDD84927
-:10289000D84802F052FB0298854226D014214843C2
-:1028A000D2490123401802908068CF499B058C468D
-:1028B000011B8646994210D3221A9A420DD36346D1
-:1028C000614503D900997144491C06E019466245E7
-:1028D0002DD9091A0819401C4142002905DD02982A
-:1028E000B17A807B814200D37446062D15D0BF4952
-:1028F0001420454368184268121B1202120ABA4299
-:102900000BD2B27A837B9A4200D38468857C01988B
-:10291000C0790028B9D1062DEAD13068A042B4D0E0
-:10292000E0190002000A3460706003B0F0BDB049E5
-:10293000B04802F002FBD8E7F0B5AF49044648685A
-:1029400085B0C005C00D1CD0103840B200280CDA8C
-:102950000207120F083A920892005118C9698007BD
-:10296000C00EC1400806800F09E08108A34A890013
-:10297000891809688007C00EC1400806800F00282A
-:1029800008D000262078002806D0012804D0002096
-:1029900005B0F0BD0126F5E72079062813D2030023
-:1029A0007B441B79DB189F44020C0A0806040020B4
-:1029B00018E0B42010E073200EE032200CE00A2072
-:1029C0000AE0062008E0FF208949E23002F0B5FA6B
-:1029D00021790020002905D002214718814D002EC1
-:1029E00002D003E00421F8E70020E87102AA69465A
-:1029F000A068F1F763F9694608228A56E06801A9E0
-:102A00008018C01C01221F2801DA019209E003AAE4
-:102A1000F1F754F96846007B002802D00198401C69
-:102A2000019000990198401808300002000A0190B6
-:102A3000C81B0002000A00906079694688720098FD
-:102A40000390F1F7CAF8009A019B121A181A6C4900
-:102A500012020002120A000A8A4216D8884214D8CA
-:102A60006846FFF7D9FE00990398814205D0C8193E
-:102A70000002000AF1F718F9A0600120E9790029A5
-:102A800086D0002EB0D005B0F0BD0020F6E7F3B53B
-:102A90008FB05C480C460B9001F088F85A4A0F99A9
-:102AA000504E5518203D594F00280BD05848007DF6
-:102AB000002803D057A15A4802F03FFA2078012895
-:102AC0007DD05FE1787F0A280CD0787F397F401C69
-:102AD000884203D14FA1534802F02FFA20780128F1
-:102AE00004D00CE0387F0028F4D0F7E7E87F002816
-:102AF00003D048A14C4802F020FA0120E877787F03
-:102B00000F991422494D504340190174207802282E
-:102B100023D0787F142148434519207928726079A1
-:102B200068722A460C322946A068F1F7C7F80C20D3
-:102B300028560F2804DD1F3828732868401C286099
-:102B40000C22AA56281DE16802908818C01C1F2874
-:102B50003FDA029901200860FDE027494868C00576
-:102B6000C00D20D0103840B200280CDA0207120F36
-:102B7000083A920892005118C9698007C00EC140F6
-:102B80000806800F09E081081C4A89008918096835
-:102B90008007C00EC1400806800F002803D11DA188
-:102BA000234802F0CAF9787F1421484345190021CF
-:102BB000E0686A460591117303AA05A900E0D8E010
-:102BC000F1F77CF86A460C2010560F2832DD012000
-:102BD00031E0B3E0F60300000080841E00807BE15A
-:102BE000FF7F841E381D0020FFFFFF00B41C002063
-:102BF000B42701001407000000ED00E000E400E04D
-:102C0000FFFF3F00441D0020160100206C1C002027
-:102C10008C1C00207372635C72656D2E6300000073
-:102C200017050000F5040000FA040000AC1B0020AA
-:102C30000605000000200599401808900220A8729F
-:102C40002079287260796872A068291DC01C0391E0
-:102C50001F2801DA01200AE006AAF1F72FF86846DA
-:102C6000007E002804D0039803990068401C086087
-:102C7000287A062813D203007B441B79DB189F4473
-:102C8000020C0A08060400200FE0B4200DE07320B7
-:102C90000BE0322009E00A2007E0062005E0FF20D3
-:102CA000FD49E23002F049F900202179002943D0A2
-:102CB000022141180691686808314018089905906A
-:102CC00008180699401A0C900020F071F0F785FF63
-:102CD00004462860089820180002000AE860707A0C
-:102CE000062825D0707A14214843EC4940184068E2
-:102CF0000090059940180002000A0190687A694620
-:102D000088726846FFF788FD0098019A001B121B25
-:102D100000021202E24B000A120A0C99984207D8EC
-:102D20008A4205D80099069808180002000A28600F
-:102D3000F0790028C8D110E00421BAE704AA02996A
-:102D4000F0F7BCFF6846007C002804D00298029986
-:102D50000068401C08602078A872787F0A2806D096
-:102D6000787F401C78770B9800F038FF47E0002010
-:102D7000F8E7E87F002803D0CAA1CD4802F0DDF8CB
-:102D80000120E877CB490F9808742078022803D1F6
-:102D9000C4A1C94802F0D1F8C64D207928726079E3
-:102DA00068722A460C322946A068F0F787FF0C208B
-:102DB00028560F2804DD1F3828732868401C286017
-:102DC0000C22AA56281DE16802908818C01C1F28F2
-:102DD00003DA0299012008600CE003AA0299F0F7D7
-:102DE0006DFF6846007B002804D0029802990068B5
-:102DF000401C08602078A872AE4901200875797FD0
-:102E0000387F814223D0747A062C22D0F0F7E5FE79
-:102E100014214C43A1496218117C042917D00329BD
-:102E200015D0536892681B1A101A1B0200029C49A5
-:102E30001B0A000A082B0AD30A468B4207D8904285
-:102E400005D8787F397F884201D0F0F712FF11B0A2
-:102E5000F0BD787F397F8842F7D111B0F0BD10B551
-:102E60000020F0F718FE10BD10B50120F0F713FE9A
-:102E700010BDF1B5009802281FD0904C607A06284A
-:102E800003D188A18E4802F058F80026A6710125CA
-:102E9000E572607A03211422804F5043C0190174F7
-:102EA000F0F7ECFE009800280CD001282AD0032867
-:102EB0007CD0B5207BA1C00044E082480078EFF7C9
-:102EC00051FEF8BD8048007F002803D075A17F48DF
-:102ED00002F033F865717C4D00202E60F0F7EEFDB6
-:102EE000A968481C04D0012300221846F0F71CFEF4
-:102EF000607A617A401CC0B2142251437A58012191
-:102F00009047F8BD0120F0F7D9FD607900280DD079
-:102F10006D488068401C09D0607A617A401CC0B25C
-:102F2000142251437A5806219047F8BD6648007F25
-:102F300001280AD0022812D0032824D0042836D031
-:102F400058A1634801F0F9FFF8BD2079002803D0AB
-:102F50002671F0F798FEE5705B480677F8BD207A99
-:102F6000002804D1FEF770FAEFF75CFE2572607A54
-:102F7000617A401CC0B2142251437A580021904714
-:102F800051480677F8BD504F0123397B78680022FD
-:102F9000411A1846F0F7C8FD2079002803D02671A1
-:102FA000F0F771FEE57002203877F8BD1BE0464E61
-:102FB000217870680123411A00221846F0F7B4FD09
-:102FC000207A002804D1FEF73FFAEFF72BFE257296
-:102FD000607A617A401CC0B2142251437A580021B1
-:102FE00090473577F8BD607A617A401CC0B21422F0
-:102FF00051437A5805219047F8BD10B52F4C607A9F
-:10300000062803D127A1334801F097FF607A617A3F
-:10301000401CC0B214225143204A52580421904708
-:1030200010BDF0B583B006200290F0F7D6FD234C1A
-:103030000090617A28480190062920D0617A1420F6
-:10304000414316480918097C042918D0617A1422D2
-:1030500051430818007C03287BD00198009A03682C
-:1030600040689B1A801A1B0200020D491B0A000AC5
-:10307000082B6ED30A468B426BD8904269D812480F
-:103080008068401C03D007A1144801F056FF0020BF
-:103090006071607A062823E0142C0100B41C002023
-:1030A000FFFF3F007372635C72656D2E630000006A
-:1030B0001E0500008C1C002024050000381D002087
-:1030C0005505000010010020181D002061050000BA
-:1030D0009C050000AF050000281D0020EB05000046
-:1030E00007D16078002804D0FE48C178417081780B
-:1030F0000170607A062815D0607A1421FA4A484394
-:103100008018007C04280DD1607A0290617A012039
-:103110001423594389180874617A59438918897CA2
-:103120006172A072F14D687F297FF14F884233D0E0
-:10313000F04E287F142148438019007CC05D01288F
-:10314000287F07D048438019007CC05D02282FD01B
-:1031500044E001E2142148438019807A01280AD012
-:10316000287F0221142250438019007CC155287FFA
-:103170000A2808D009E0297F002014225143891928
-:10318000097CC8552AE0002001E0287F401C2877F0
-:10319000687F297F8842CCD1D74D287D00284CD02C
-:1031A000287CC15D012928D0C05D022830D03AE0DA
-:1031B000287F142148438019807A012803D0CFA1A9
-:1031C000D14801F0BAFE297F002014225143891909
-:1031D0008872297F51438919097CC855287F142199
-:1031E00048438219287F48438019017C0098FEF7E4
-:1031F000EBFF287F0A28C8D1C5E7A97A012904D0A6
-:103200000221C155002028750DE00021C1550AE0BA
-:10321000A87A012803D0B9A1BC4801F08EFE002095
-:10322000A872297CC855287D002806D0297CB24A7E
-:103230000098FEF7C9FF00202875029806281ED0C6
-:1032400014214843A8494018017C012917D10721BE
-:10325000AF4D0174287B0A283CD0287BE97A401CBA
-:10326000884203D1A5A1AB4801F067FE297B0298F3
-:103270006854287B0A2831D0287B401C2873607A48
-:1032800006287DD0A07A00287BD00020A072617A29
-:10329000142041439448A04B0A18566891681D4673
-:1032A000D2687C35DE67AA6069609C4D697E002922
-:1032B00016D00226617A14228B4851430818407BAD
-:1032C00006281BD203007B441B79DB189F440A1499
-:1032D00012100E0CE87A0028C4D0C7E70020CDE712
-:1032E0000426E7E700200FE0B4200DE073200BE098
-:1032F000322009E00A2007E0062005E0FF207FA138
-:10330000E23001F01AFE00202873697E022901D004
-:10331000012910D12969009A09188A1A1202120A81
-:103320003A2A08D90320687632390802000A28614F
-:10333000322028730AE0322808D2207A00280ED1E1
-:10334000FEF782F8EFF76EFC012007E0207A0028F4
-:1033500005D0FEF798F8EFF78EFC00202072614947
-:103360000822487820700978012901D0032906D164
-:1033700001212171297B884201D9421A083201E0DA
-:1033800091E0A1E0A378002B00D0921C21790029C4
-:1033900001D1002B5DD09446614A00990092019AB8
-:1033A000176852687F1A511A3F0209023F0A090A38
-:1033B000BC451BD85A4A974218D8009A914215D852
-:1033C000297B884223D92B69421A9A1A1202120ABF
-:1033D000101880190002000A2A616860002914D0C0
-:1033E000032028770006000E3ED14CE0002020711B
-:1033F000A070297B002925D0286940188019000277
-:10340000000A6860022028772EE00120E9E7814267
-:103410000BD92A69511889190902090A696000281B
-:1034200001D00420DDE70220DBE7002B03D133A12C
-:103430003C4801F082FD286980190002000A68609A
-:10344000002004E0296989190902090A69602877BE
-:1034500019E0287B00280FD029690818801900027C
-:10346000000A686002202877286901238119002258
-:103470001846F0F759FB09E0286980190002000A94
-:103480006860002028770120F0F718FB607A14218B
-:10349000484315490C2240188256012300206968D0
-:1034A000F0F742FB10E00120F0F708FB0020F0F7F6
-:1034B00005FBF0F7E9FA207A002805D0FDF7E3FFD5
-:1034C000EFF7D9FB00202072A078002804D0F0F795
-:1034D000DAFB0020E070A0706078002827D0014857
-:1034E000C17821E012010020B41C00206C1C0020D7
-:1034F00015010020AC1B00208C1C00207372635C43
-:1035000072656D2E630000000D06000029060000A4
-:10351000A41C00203B060000AC1C0020181D00204D
-:10352000FFFF3F008D060000417081780170207917
-:10353000002806D00020CE49E0700978002900D18B
-:103540002071CC48017BC07A814203D0CA484078C0
-:10355000EFF708FB0120E07103B0F0BDF0B5C74CF8
-:103560000746607A83B0062804D16F20C4A1000109
-:1035700001F0E3FC607A1421C44E48438019007CBA
-:10358000032803D0BEA1C24801F0D7FCC14DA868F2
-:10359000401C03D0BAA1C04801F0CFFC607A1421CE
-:1035A000484381190C20085600216A460091117188
-:1035B000C01901AA6946F0F781FB6A46042010563B
-:1035C0000F2801DD012000E0002000994018696803
-:1035D00040180102090AA9606079002804D001237B
-:1035E00000221846F0F7A0FA03B0F0BD70B5AC4C5D
-:1035F000AA4A0B1AA34214D3451AA54211D39342E7
-:1036000003D9101A43185B1C0BE0954204D9511AD8
-:103610000818401C434204E099A1A24801F08DFC27
-:103620000023184670BD10B5014601230022022078
-:10363000F0F77AFA10BD10B50220F0F73FFA10BD8E
-:1036400010B5F0F7CAFA10BDF0B58C4D0446E87A13
-:1036500083B0002803D18AA1934801F06EFC642C4A
-:103660004DD3924A00210846121B884147D3904807
-:10367000417F007F814242D18E48007D00283ED1AB
-:10368000687A1421814F4843824EC519306801AAD7
-:1036900000196946F0F712FB694604200856002815
-:1036A00002DD0098401C0090A96800986B680A1819
-:1036B000D21A1202804B120A9A4220D8AA7C062AF9
-:1036C00008D014235A43D2195268511A0902090A20
-:1036D000814214D3B068401C05D00120F0F7EEF908
-:1036E0000020C043B060306800193060A8680099BD
-:1036F00040180002000A7061012003B0F0BD0020F4
-:1037000003B0F0BDF8B50646401EC4B214205F49B0
-:1037100060434518287C002804D1772058A1000177
-:1037200001F00BFC6248017F407F81420CD0634A6C
-:1037300014234B439B181B7CB3420CD00A290CD09A
-:10374000491CC9B28142F3D15A48017D002961D098
-:10375000007CB0425ED10020F8BD0021F1E70529D0
-:1037600003D0062901D0072928D101212974C17A63
-:103770000023027B8A4221D00246565CA64201D138
-:10378000012301E0002B04D00A2911D04E1C965DC4
-:1037900056540A290ED0491C167BC9B28E42ECD170
-:1037A000002B0BD0117B002906D0117B491E04E0B1
-:1037B0000026ECE70021EFE70A211173697C00295C
-:1037C0002AD06F74C17A0023027B8A4224D0425CE3
-:1037D000A24201D1012301E0002B04D00A2912D01A
-:1037E0004A1C825C42540A290FD0491C027BC9B290
-:1037F0008A42ECD1002B0FD0027B0146002A06D072
-:103800000A7B521E04E00022EBE70021EEE70A22C9
-:103810000A7301E017480027297C01299FD16A7C9F
-:10382000002A9CD10120F8BD70B505461420174A26
-:103830000521684380180F4C0174207B0A2811D0A1
-:10384000207BE17A401C884203D10DA11C4801F085
-:1038500074FB207B2554207B0A2807D0207B401C4A
-:10386000207370BDE07A0028EFD0F2E70020F7E780
-:1038700012010020A41C002010010020381D00208F
-:103880007372635C72656D2E63000000B41C0020CF
-:10389000F1060000181D0020F2060000FF7F841EC4
-:1038A0000020A1071407000033070000FF1FA10735
-:1038B0006C1C00208C1C0020FFFF3F00AC1B002074
-:1038C0000902000010B501462022094801F099F9CB
-:1038D00007490020C877084610BD06490120486105
-:1038E0000548064A0168914201D1002101607047F4
-:1038F000481D0020000500401C010020BEBAFECA81
-:10390000064A10705170704704481C2201784171BA
-:103910004270017070477047704770472001002067
-:1039200030B50346002002460DE09C5C2546303D44
-:103930000A2D02D30020C04330BD0A256843303829
-:103940002018521CD2B28A42EFD330BD70B50D465A
-:10395000144608E00A2101F0CEF92A193031203A44
-:10396000641ED177E4B2002CF4D170BD10B50023F1
-:1039700010E0040A00020443A0B2CC5C44402006DC
-:10398000000F60400407240C44402006C00C604037
-:103990005B1C9BB29342ECD310BD10B520380C4693
-:1039A000030001F0BBFB33E0DBE41B1F23272C31BA
-:1039B000373C41474D5054585C606D71656974786F
-:1039C0007C8084888C9094989C9FA2A6AAAEB2B862
-:1039D000BCC0C5CACFE9F0F3D3D7F800206800F027
-:1039E000DDF8D6E0206800F0E1F8D2E0206800F0D1
-:1039F000F5F8CEE0207840B200F092FAC9E02078E5
-:103A000040B200F0B0FAC4E02078616840B200F043
-:103A1000C3FABEE0207840B200F0D3FAB9E02078D3
-:103A200040B200F0DEFAB4E02078217940B200F034
-:103A3000E9FAAEE02078616840B200F013FBA8E03C
-:103A400000F01FFBA5E0206800F023FBA1E0207838
-:103A500000F038FB9DE02068FDF7F5FD99E0206857
-:103A6000FDF7F5FD95E021792068FDF7F7FD90E081
-:103A70002068FDF73FFC8CE02068FDF740FC88E003
-:103A80002078FDF740FC84E0FDF74EFC81E02078D3
-:103A9000FDF750FC7DE02078FDF762FC79E02068BE
-:103AA000FDF77BFC75E02068FDF77DFC71E0206888
-:103AB000FDF77FFC6DE02068FDF780FC69E0206881
-:103AC000FDF782FC65E02068FDF784FC61E020687A
-:103AD000FDF785FC5DE00846EDF738FB59E0EFF7B0
-:103AE000B4F856E0EFF7E1F853E02068EFF7E9F8B3
-:103AF0004FE0206800F080F84BE0206800F082F88A
-:103B000047E0206800F083F843E02078A26861680D
-:103B100000F082F83DE0207800F089F839E0207864
-:103B200000F091F835E02078616800F098F830E016
-:103B30002078616800F09FF82BE02179207800F070
-:103B4000D5FB26E02068FDF778FE22E02068FEF72E
-:103B50004DF91EE02068FEF731F91AE0204607C84B
-:103B600000F0B9FC15E0206800F00CFD11E0616880
-:103B7000206800F037FD0CE0206800F029FF08E025
-:103B800009E003E0FFE700F03BFF02E0206800F0FF
-:103B900073FF206010BD0120086010BD002101707E
-:103BA000084670470146002008707047EFF3108107
-:103BB000C907C90F72B60278012A01D0012200E0BC
-:103BC000002201230370002900D162B6002A01D02F
-:103BD00000207047012040037047E7E7EFF31081B2
-:103BE000C907C90F72B600220270002900D162B65F
-:103BF00000207047F2E7000038490968C9B2016047
-:103C0000002070473549C0B24860002070473349F2
-:103C1000C0B2886000207047082801D33048704740
-:103C2000C3002E4818180161426100207047022825
-:103C300002D32B48401C70472A4A0121C00080183B
-:103C4000016000207047022802D32548401C7047BD
-:103C5000244A0121C00080184160002070470228DA
-:103C600002D31F48401C70471F4A8000C9B2801809
-:103C7000016000207047022802D31948401C704799
-:103C8000194A800080180068C0B2086000207047A0
-:103C900010B5FF20114AC043906008200021C300E6
-:103CA0009B1819615961401C1028F8D300200E4A56
-:103CB00005E0022803D383009B18196004E0830009
-:103CC0009B181C68E4B21C60401C0428F1D310BD92
-:103CD000FF200249C04388607047000000F50140A2
-:103CE0000820000000F0014000F8014010B572B655
-:103CF00000F0DEF800280BD0EDF7D2FAFEF783F9DA
-:103D000000F0BBFA6F490020C86288626E49086003
-:103D100062B6002010BDF3B5002501200007C06A7F
-:103D200081B0C0430006000E04D168480068401C02
-:103D300000D1012572B600F0BBF8002801D062B6B0
-:103D400087E0EDF719FAEDF7AFFA614C614A00210F
-:103D50002368CB40DB071FD00346CB40DB0718D1DD
-:103D60004BB2002B07DA1E07360F083EB608B60026
-:103D7000B618F66904E09E08574FB600F619366883
-:103D80009B07DB0EDE4033069B0F012B04D0032B79
-:103D900002D062B65148FEBD491C2029D8D3019CEF
-:103DA00001204F49230001F0B9F9142224242424CE
-:103DB000242424240B0D1012142016181A1C1E2F54
-:103DC000002400E00124C86314E00224FBE703247C
-:103DD000F9E70424F7E70824F5E70924F3E70A24C0
-:103DE000F1E70B24EFE70C24EDE70524EBE70724CC
-:103DF00000E00624D06901210002000AC907084337
-:103E0000D061002D04D009E062B601200003FEBDA0
-:103E10002C4D3448E862EDF747FAA8622A49324847
-:103E20000860324902980860EDF73EFA214600F03A
-:103E30000BFAFEF7AEF800F00DFC00F087FA0198DF
-:103E4000EDF7FCF9040062B603D0FFF74FFF204600
-:103E5000FEBD0020FEBD10B5044600F029F8002884
-:103E600000D001202070002010BD214908600020F2
-:103E7000704710B50C46102808D011280BD0122816
-:103E80000CD013280ED00120086010BD6168206896
-:103E9000FFF741FF0AE0FFF729FF07E02068FFF77F
-:103EA000DAFF03E01249206808600020206010BD9E
-:103EB00005480D490068884201D101207047002063
-:103EC00070470000000500401C0100200010001099
-:103ED00000E100E000ED00E000E400E0011000007F
-:103EE0004000004000200000BEBAFECA28010020A9
-:103EF000040000208107C90E002808DA0007000F1F
-:103F000008388008814A80008018C06904E0800871
-:103F10007F4A800080180068C8400006800F704704
-:103F200010B5044600F0DBF8002813D02046FFF758
-:103F3000E1FFC0B200F0E1F800280DD07549E206BB
-:103F40000B78D20E01209040002B08D04A68104315
-:103F5000486006E0704810BD6F48401C10BD6F49B6
-:103F60000860002010BD10B5044600F0B8F8002825
-:103F70000BD06849E2060B78D20E01209040002B4E
-:103F800005D04A6882434A6004E0634810BD634933
-:103F900080310860002010BD70B50D46044600F069
-:103FA0009EF800280BD05E480068E206D20E012180
-:103FB0009140084000D001202860002070BD564884
-:103FC00070BD10B5044600F08AF8002807D0E1065D
-:103FD000C90E0120884052490860002010BD4E489B
-:103FE00010BD10B5044600F07AF8002808D0E106AC
-:103FF000C90E012088404A4980310860002010BD68
-:10400000454810BD70B50D46044600F068F800281C
-:1040100019D0284600F071F8002816D0A007C20E6B
-:10402000FF209040A907090E9140002C10DA2207CA
-:10403000120F083A9308354A9B009B18DA698243AD
-:104040000A43DA610CE0344870BD3348401C70BD4F
-:10405000A3082F4A9B009B181A6882430A431A60E0
-:10406000002070BD70B50C46054600F038F80028F9
-:1040700005D02846FFF73EFF2070002070BD26487F
-:1040800070BDBFF34F8F21492648C860BFF34F8FE3
-:10409000FEE770B51F4C05462178012000290ED19E
-:1040A000207072B600F0F8F81C4E803631688143FB
-:1040B000616000F0F1F8C043306062B60020287003
-:1040C000002070BD13490A78002A06D0002804D1C8
-:1040D000124A48681060002008700020704710B530
-:1040E0000446202805DA00F0D7F80121A140084253
-:1040F00001D0002010BD012010BD012803D00328ED
-:1041000001D00020704701207047000000ED00E062
-:1041100000E400E02C0100200120000000E100E0AC
-:1041200000E200E00400FA05F8B504468007002527
-:104130000126002804DA5A48C563C6630220844376
-:10414000E00404D55748C563C66380148443600007
-:1041500003D55548456080058443E00504D55348A0
-:10416000C563C66380158443A00404D55048C56365
-:10417000C6634014844360042704C00FF90F8842CB
-:1041800003D04CA1612000F0D8FEB80F0AD04E49F0
-:10419000CD634E48C563C563CE63C663C663032063
-:1041A0008003844320050AD5494FFD632F20ECF797
-:1041B000FBFFFE632F20ECF7F7FFF8148443002C7D
-:1041C00003DAFFF765FD640064084248044203D047
-:1041D00038A1902000F0B1FEF8BDF0B500210A46EC
-:1041E000FF230446CC40E4072AD04CB2E606F60E84
-:1041F0000125B540384E3560384E3560002C11DA57
-:1042000025072D0F083DAE08354DB6007619F56926
-:10421000A407E70E1C46BC40A5431446BC402543FA
-:10422000F5610DE0A6082F4DB60076193568A40794
-:10423000E70E1C46BC40A5431446BC4025433560F0
-:10424000491C2029CDD3F0BD70B5274C0D46206008
-:10425000FFF76AFF2068FFF7C0FF2846EEF7BEFDB4
-:10426000FDF7D6FAFDF782F9FFF712FDFDF7D5F855
-:10427000EEF742FC00F06AF870BD10B51A4C2068E9
-:10428000FFF752FF2068FFF7A8FFFFF701FDEEF7E9
-:104290002AFE0020206010BD13480068704700000F
-:1042A000C01F0040C0CF004000E50140C08F00406B
-:1042B000C0DF00407372635C736F635F636F6E6631
-:1042C00069672E6300000000C0EF0040C0FF00409F
-:1042D000C0BF0040FEFF0FFC80E100E080E200E094
-:1042E00000ED00E000E400E03401002070B500249F
-:1042F00002460D4620462146002A1ED0012A04D03F
-:10430000022A04D0032A1ED103E0012002E0022089
-:1043100013E003202B0000F001FF07160507090B2F
-:104320000D0F1600012108E0022106E0032104E040
-:10433000042102E0052100E00621FDF7D9FE002856
-:1043400001D0204670BD0724FBE70000B1480021E2
-:1043500001708170704770B5AF4D01236B60AF4B3A
-:104360001C68002CFCD0002407E00E6806601E6864
-:10437000002EFCD0001D091D641C9442F5D30020C2
-:10438000686018680028FCD070BD70B5A14C0D465F
-:104390006178884203D0A2A16C2000F0CEFD2B00F2
-:1043A00000F0BCFE094F0625254F4F4F4F464F00EA
-:1043B0002078022803D09AA1702000F0BEFD0320CF
-:1043C0002070A078022802D0012804D008E0A0685C
-:1043D00000F0CEFB04E02269E168A068FFF7BBFFB4
-:1043E0000020A070FDF724FE0420207070BDFDF7B2
-:1043F000D4FE01466068FFF7F9F8054620780228E8
-:1044000003D087A1842000F098FD894A89498A4811
-:10441000954206D8401BC86086496078FEF737FB96
-:1044200070BD854202D802224A71F3E7032003E0FF
-:10443000A0780028FAD10220FDF704FD00F0E0F892
-:1044400070BD77A1AD2000F078FD70BD70B5054658
-:10445000FDF7A3FE6F4C60602078012803D070A1A7
-:10446000B42000F06AFD73490220087000220A712E
-:104470008D6003224A71704ACA6020706078FEF72E
-:1044800006FB70BD10B5634CA078002802D12078DF
-:10449000002801D0112010BD6848FDF710FE6070A3
-:1044A0006078002803D001202070002010BD032078
-:1044B00010BD10B50124020B64040121604BA04221
-:1044C00002D29140186802E0203A586891400840B2
-:1044D00000D0012010BDF8B50E46910005464F19D9
-:1044E00014463F1F009100F054FB00998002891987
-:1044F000091FB14201D2012200E00022002C03D0AA
-:10450000FF2101318C4201D90920F8BD4D498D426E
-:1045100019D3AF4217D3854205D2874203D228462A
-:104520003043800701D01020F8BD8E420BD3002A03
-:1045300009D12846FFF7BDFF002804D13846FFF710
-:10454000B8FF002801D00F20F8BD3F483F49006860
-:10455000884205D0224631462846FFF7FCFE0FE090
-:10456000FFF790FF0028EFD12A480121C66085603F
-:10457000046181702046312148431430FFF766FF03
-:104580000020F8BD10B504462E48800A84420BD3A3
-:1045900000F0FFFAA04201D8102010BDA00204468E
-:1045A000FFF787FF002801D00F2010BD26482749BC
-:1045B0000068884203D0204600F0DAFA0AE0FFF7EC
-:1045C00061FF0028F1D113480221846081702048E6
-:1045D000FFF73CFF002010BD1A48010B0120884066
-:1045E000401E704700B50B460246FFF7F5FF10422C
-:1045F00001D00F2000BD124802604360002000BDC2
-:1046000010B5044C6078FDF7AEFD00202070A0705E
-:1046100010BD00003801002000E5014000E4014029
-:104620007372635C736F635F666C6173682E6300A3
-:1046300030750000681D0020D0FB01008B43010095
-:1046400000060040006001001C010020BEBAFECA46
-:1046500010540000F748052181700021017041705D
-:10466000C1708160704710B5F3490A78022A07D0FB
-:10467000CA681018C860C8689638FEF76FFF10BD8A
-:104680008A68101888608868F6E70378EB49EC4A76
-:10469000002B02D0012B10D014E00379002B01D0A5
-:1046A000012B0FD14379002B01D0012B0AD1836854
-:1046B000643B8B4206D2C06810E00379002B03D024
-:1046C000012B01D0002070474379002B01D0012B32
-:1046D000F8D1C368643B8B42F4D280689042F1D831
-:1046E00001207047F8B504460226FEF7BDFB0068BE
-:1046F000002803D0D3A1BE2000F01FFC0127CD4D20
-:10470000002C08D02078002817D0012805D00228D6
-:1047100011D0032813D02F710DE06068C82808D38A
-:10472000FEF792FF002804D06068FFF79CFF012687
-:1047300003E0002601E000F0F9F93046F8BD2878E2
-:104740000028F8D16068FFF7A0FF0028E3D0606878
-:104750000078002826D0A878042803D0B9A1F82032
-:1047600000F0EBFBB44F002038706068007901283E
-:1047700000D00020387160684079002837D00320CD
-:10478000787160688168E868FDF79EFFB8606068CE
-:10479000C0689630F8600320A870A749E878FEF753
-:1047A00076F9C8E7A44802210170616809790129F6
-:1047B00019D00021017161684979002915D00321C0
-:1047C000417161688968963181606168C968C160BA
-:1047D000C068984C14346060FDF7DFFC20606F7097
-:1047E0000220A870A7E70321E4E70221E8E70220FE
-:1047F000C6E7F8B58F4C0D46E178884204D0FF201B
-:1048000090A11A3000F099FB28468A4F0025012616
-:104810001437030000F082FC090612375A7C8D978A
-:10482000C4A0C400A078032807D0A078022804D030
-:10483000FF2084A11E3000F080FBF8BDA078032883
-:1048400007D0A078022804D0FF207EA1223000F0FB
-:1048500074FB0420A07025712078002810D1FFF788
-:1048600002FFE078FDF74FFFE0607D49886A7D4AEE
-:10487000024022617B4AD24310408862002050E00F
-:1048800000F054F9F8BDA078032807D0A0780228DA
-:1048900004D0FF206BA1453000F04FFB20780028AA
-:1048A00002D000F04FF9F8BDA07803281FD10420F2
-:1048B0002AE0091A6048C1600146E078FEF7E7F88F
-:1048C000F8BD0420FDF7BEFAA570F8BDA078032856
-:1048D00007D0A078022804D0FF205AA1663000F04B
-:1048E0002CFB20780028DCD1A07803280BD0FDF722
-:1048F00054FC01463868FEF779FE0028E1DB796850
-:104900008142DEDBD5E70520FDF79CFAA670F8BDF5
-:10491000A078042804D0FF204AA1873000F00DFBC6
-:104920000220A1688847FFF7DDFEFF260546C03656
-:1049300042E0A078042804D0FF2042A18C3000F08F
-:10494000FCFA0120EDE7A078042899D0FF203DA1D2
-:10495000913000F0F2FA93E7A07804280AD060784A
-:10496000002802D0A078022804D0FF2035A196307C
-:1049700000F0E3FA2078002893D12079002804D0B1
-:104980000620FDF75FFA2571C0E76078002805D0A2
-:104990002949E078FEF77BF86570F8BD0720B3E79A
-:1049A000FF2028A1B13046E7002D0AD0012D06D006
-:1049B00024A1304600F0C1FA022DF5D1F8BD042043
-:1049C00000E00320A1688847FFF78CFE0546F3E767
-:1049D00070B5050005D0174CA078052803D011202C
-:1049E00070BD102070BD2048FDF769FBE070E078D5
-:1049F000002803D0A5600020A07070BD032070BD0A
-:104A000010B50C480178002901D0112010BD817823
-:104A100005292BD0817801292AD08178002927D037
-:104A2000012101708178012922D0807800281FD0CF
-:104A300020E000004C010020781D00203D86010090
-:104A4000FF1FA1077372635C736F635F72616469B8
-:104A50006F5F74696D65736C6F742E630000000086
-:104A60000005004002810080F34701000F2010BDC7
-:104A700000F068F8002010BDF8B5394E0446B07853
-:104A8000002801D001280DD1002C0DD02046FFF7C1
-:104A9000FCFD00280AD02078324D002808D0B078DC
-:104AA000012823D00F20F8BD1020F8BD0720F8BD45
-:104AB00002272F702079012814D0002028716079F6
-:104AC000002811D003206871A0689630A860E068C3
-:104AD000E860E868224C14346060FDF75EFB2060FB
-:104AE000B77019E00320E9E70220ECE70020287006
-:104AF0002079012816D0002028716079002813D071
-:104B000003206871A168F068FDF7DEFDA860E06829
-:104B10009630E8600320B0701249F078FDF7B7FFD7
-:104B20000020F8BD0320E7E70220EAE710B50E48B1
-:104B3000816A0E4A11400A4A126911438162FDF7E7
-:104B400077FA10BD10B5064CE078FDF70CFB082095
-:104B5000FDF778F90520A07000202070607010BD6E
-:104B60004C010020781D002000050040FD7EFF7FE5
-:104B70000A4A022151600A490B68002BFCD0906060
-:104B800008680028FCD00020506008680028FCD08D
-:104B900070470120000740697047000000E50140B0
-:104BA00000E4014070477047034610B50B439B0774
-:104BB0000FD1042A0DD308C810C9121FA342F8D080
-:104BC00018BA21BA884201D9012010BD0020C04383
-:104BD00010BD002A03D0D30703D0521C07E00020E9
-:104BE00010BD03780C78401C491C1B1B07D10378AF
-:104BF0000C78401C491C1B1B01D1921EF1D1184698
-:104C000010BDF8B5042A2CD3830712D00B78491CA9
-:104C10000370401C521E83070BD00B78491C037095
-:104C2000401C521E830704D00B78491C0370401CA3
-:104C3000521E8B079B0F05D0C91ADF002023DE1BF5
-:104C400008C90AE0ECF7C0FAF8BD1D4608C9FD40E6
-:104C50001C46B4402C4310C0121F042AF5D2F3089E
-:104C6000C91A521EF0D40B78491C0370401C521E06
-:104C7000EAD40B78491C0370401C521EE4D4097816
-:104C80000170F8BD01E004C0091F0429FBD28B07A5
-:104C900001D50280801CC90700D00270704700292E
-:104CA0000BD0C30702D00270401C491E022904D356
-:104CB000830702D50280801C891EE3E70022EEE70D
-:104CC0000022DFE70378C2781946437812061B02F8
-:104CD00019438378C0781B04194311430902090A58
-:104CE000000608437047020A08704A70020C8A7076
-:104CF000020ECA707047002203098B4273D3030A65
-:104D00008B4258D3030B8B423CD3030C8B4221D3F1
-:104D100012E003460B437FD4002243088B4274D336
-:104D200003098B425FD3030A8B4244D3030B8B42AC
-:104D300028D3030C8B420DD3FF22090212BA030CB5
-:104D40008B4202D31212090265D0030B8B4219D396
-:104D500000E0090AC30B8B4201D3CB03C01A5241B6
-:104D6000830B8B4201D38B03C01A5241430B8B42FE
-:104D700001D34B03C01A5241030B8B4201D30B03E7
-:104D8000C01A5241C30A8B4201D3CB02C01A52410E
-:104D9000830A8B4201D38B02C01A5241430A8B42D1
-:104DA00001D34B02C01A5241030A8B4201D30B02BA
-:104DB000C01A5241CDD2C3098B4201D3CB01C01AD4
-:104DC000524183098B4201D38B01C01A52414309DE
-:104DD0008B4201D34B01C01A524103098B4201D3CC
-:104DE0000B01C01A5241C3088B4201D3CB00C01A39
-:104DF000524183088B4201D38B00C01A52414308B1
-:104E00008B4201D34B00C01A5241411A00D20146D5
-:104E10005241104670475DE0CA0F00D0494203106E
-:104E200000D34042534000229C4603098B422DD3BD
-:104E3000030A8B4212D3FC22890112BA030A8B4265
-:104E40000CD3890192118B4208D3890192118B42B4
-:104E500004D389013AD0921100E08909C3098B4239
-:104E600001D3CB01C01A524183098B4201D38B017C
-:104E7000C01A524143098B4201D34B01C01A52411F
-:104E800003098B4201D30B01C01A5241C3088B4264
-:104E900001D3CB00C01A524183088B4201D38B004F
-:104EA000C01A5241D9D243088B4201D34B00C01AD9
-:104EB0005241411A00D20146634652415B101046EE
-:104EC00001D34042002B00D54942704763465B1036
-:104ED00000D3404201B50020C046C04602BD704725
-:104EE0007047704710B500F059F810BD30B58C18F8
-:104EF0000278401C13071B0F01D10378401C1209D4
-:104F000006D10278401C03E00578401C0D70491C56
-:104F10005B1EF9D101E00B70491C521EFBD1A1426E
-:104F2000E6D3002030BD000001231B68134B18603E
-:104F3000134B1960134B1A607047134A134B1360DD
-:104F40007246053AF0E7114A0F4B1B689A420ED1A0
-:104F50000D4B0020186001980D4B04B598470CBC10
-:104F60009E460246029800990A4B1B68184706980D
-:104F70000599094B1B68DB68184700007001002089
-:104F8000740100207801002068010020EFBEADDE32
-:104F9000C538010028010020040000201D481E49DA
-:104FA0007047FFF7FBFFECF7C9F800BD01200007D1
-:104FB000C06AC0B2FF2804D118481949096888425C
-:104FC00002D01848184901601848194909688842F0
-:104FD00003D1184A13605B68184700BD20BFFDE786
-:104FE00012481349096888420ED1134B18680B49BF
-:104FF0008842F3D080F308881049884204DD1048C5
-:10500000026802210A4302600E4880470E4880472A
-:105010000E480047881D0020881D0020FFFFFFFF6D
-:10502000001000102C0500400800000000100000D7
-:10503000000000200400002000600100002000208B
-:1050400024050040DB380100AD4F0100294F01006D
-:105050001348704502D1EFF3098101E0EFF30881B5
-:10506000886902380078102814DB202810DB2328F8
-:105070000BDB0C4A12680C4B9A4203D1602804DB0C
-:105080000A4A1047022008607047094A104700008A
-:10509000084A1047084A12682C321268104700006C
-:1050A000FDFFFFFF1C010020BEBAFECAAD120000CA
-:1050B0009B390100733E0100040000200D4B0E4996
-:1050C00008470E4B0C4908470D4B0B4908470D4B41
-:1050D000094908470C4B084908470C4B0649084743
-:1050E0000B4B054908470B4B034908470A4B02493C
-:1050F00008470000FD2D00008D3D0000B52F000089
-:10510000333C0000E13B000095390000B91200007B
-:1051100063170000F53C0000A32B000030B4744678
-:10512000641E2578641CAB4200D21D46635D5B00A3
-:10513000E31830BC1847000002490020C86120393C
-:1051400008727047E003002000020207FFFFFFFF24
-:105150000000FFFF0102040810204080555555D67D
-:10516000BE898E00F401FA00960064004B00320004
-:105170001E001400010003000000010000000000F8
-:105180000000000000000000000000008700000098
-:10519000000000000000000000000000000002030A
-:1051A000040500000E0F0000D85101000800002087
-:1051B0001000000004110000E85101001800002058
-:1051C00064010000EC4E01000C5201007C01002043
-:1051D0000C1C000020110000024902220868104245
-:1051E000FCD0704700E200E0E1078F56FF9900CD48
-:1051F00029022B013601000100EC3720FB349B5FB4
-:0C5200008074800010027001E42D4F014A
-:00000001FF
diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex
new file mode 100644
index 0000000000..eeaf2212fa
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex
@@ -0,0 +1,5649 @@
+:020000040000FA
+:10000000C0070000D1060000D1000000B1060000CA
+:1000100000000000000000000000000000000000E0
+:100020000000000000000000000000005107000078
+:100030000000000000000000DB000000E500000000
+:10004000EF000000F9000000030100000D010000B6
+:1000500017010000210100002B0100003501000004
+:100060003F01000049010000530100005D01000054
+:1000700067010000710100007B01000085010000A4
+:100080008F01000099010000A3010000AD010000F4
+:10009000B7010000C1010000CB010000D501000044
+:1000A000DF010000E9010000F3010000FD01000094
+:1000B00007020000110200001B02000025020000E0
+:1000C0001FB5C046C04600F0EFFA04B00FB41FBD24
+:1000D00008205A49096809580847382057490968CB
+:1000E000095808473C2055490968095808474020E5
+:1000F0005249096809580847442050490968095875
+:10010000084748204D490968095808474C204B4981
+:10011000096809580847502048490968095808479C
+:100120005420464909680958084758204349096836
+:10013000095808475C204149096809580847602068
+:100140003E4909680958084764203C49096809582C
+:100150000847682039490968095808476C20374919
+:100160000968095808477020344909680958084740
+:100170007420324909680958084778202F490968CE
+:10018000095808477C202D490968095808478020EC
+:100190002A490968095808478420284909680958E4
+:1001A0000847882025490968095808478C202349B1
+:1001B00009680958084790202049096809580847E4
+:1001C00094201E4909680958084798201B49096866
+:1001D000095808479C201949096809580847A02070
+:1001E0001649096809580847A4201449096809589C
+:1001F0000847A8201149096809580847AC200F4949
+:10020000096809580847B0200C4909680958084787
+:10021000B4200A49096809580847B82007490968FD
+:1002200009580847BC2005490968095808470000D3
+:1002300003480449024A034B7047000000000020B5
+:10024000C0070000C00700000122D84B5A6000BF61
+:10025000D74A1268002AFBD0016000BFD44A126856
+:10026000002AFBD00022D14B5A6000BFD04A12684E
+:10027000002AFBD07047F0B505460E46174600240D
+:1002800006E0A200B158A2005019FFF7DDFF641C80
+:10029000BC42F6D30020F0BD0120C043C549086030
+:1002A000401048607047014601229204086890425D
+:1002B00001D9102070470020FCE7F0B505460C4638
+:1002C0001646002706E028462168FFF7BDFF2D1DD2
+:1002D000241D7F1CB742F6D3F0BD70B505460C4611
+:1002E0002E460BE0304600F075F9FF2C01D80024B3
+:1002F00001E0FF3C013C012080023618002CF1D1C6
+:1003000070BD0146012292044868904201D909203B
+:100310007047A9484069401C01D10F20F8E7002030
+:10032000F6E7FEB504462068030000F037FA05043E
+:100330002B4249598B00201DFFF7E3FF0546002D96
+:1003400001D02846FEBDFFF7A7FF0120C00200F044
+:1003500041F9042221469948FFF78DFF002801D07A
+:100360000320EFE708222146944800F06DF90028A9
+:1003700006D1002192480068FFF766FF00F00CF9F3
+:100380000320DFE7A768E6686068019031463846D9
+:10039000FFF7A3FF324638460199FFF78EFFB20000
+:1003A0003846019900F050F9002800D1CAE703202F
+:1003B000C8E700F0E3F9834800688349086041E03A
+:1003C00060680190E668A0680090B200009901980A
+:1003D00000F03AF90746002F00D1B3E70E20B1E74D
+:1003E000201DFFF760FF0546002D01D02846A9E734
+:1003F0006068002807D1FFF74FFF0320800200F05C
+:10040000E9F800F0C9F8FFF747FF0120C00200F04B
+:10041000E1F8042221466948FFF72DFF002801D0AA
+:1004200003208FE708222146644800F00DF90028D8
+:1004300006D1002162480068FFF706FF00F0ACF823
+:1004400003207FE700BF00207CE770B505460C461F
+:10045000182D04D12068FFF764FF206002E001201E
+:10046000206000BF00BF70BDF0B589B05248406940
+:1004700003905248806881000398081802900398FE
+:10048000000B01900121090302984018401E000B47
+:1004900000900124002520462946019A00F0C4F866
+:1004A0000022401E91410791069001260027304608
+:1004B0003946009A00F0B8F80022401E914105919B
+:1004C0000490049BDB43059AD2430698184307998E
+:1004D00011430791069037490698086007984860CD
+:1004E00009B0F0BD70B53448446934488568466841
+:1004F000AA003146204600F0A7F8002801D00020CD
+:1005000070BD0120FCE72D484068002801D0012083
+:1005100000E000200546FFF7E5FF002807D0FFF7C1
+:10052000BBFE0320800200F055F800F035F8FFF71D
+:100530009BFF002D0ED020484669204884684768FC
+:1005400021463046FFF7C9FE224639463046FFF7BE
+:10055000B4FE00BF00F020F810B5184844681A48EF
+:100560000460204600F0DCF810BD15480068006803
+:10057000401C01D100BFFEE710480068002802D0EF
+:10058000042806D101E0FFF7BEFFFFF7E5FF00BF3B
+:10059000FEE700BF00BFFEE7BFF34F8F0B480C49DB
+:1005A000C860BFF34F8F00BFFEE7000000E50140C9
+:1005B00000E40140000600400010001000080000A8
+:1005C000B8070000BC070000000000200400FA0586
+:1005D00000ED00E010B50146104B1A6808460223F2
+:1005E0000F4C636000BF0F4B1B68002BFBD0531CEC
+:1005F00004D0904202D20A4B186101E0084B986087
+:1006000000BF084B1B68002BFBD00023044C636029
+:1006100000BF044B1B68002BFBD010BD0010001066
+:1006200000E5014000E4014010B5202A04DB01464A
+:10063000203A9140002010BD914020239C1A03468F
+:10064000E3401943904010BD034610B50B439B0790
+:100650000FD1042A0DD308C810C9121FA342F8D025
+:1006600018BA21BA884201D9012010BD0020C04328
+:1006700010BD002A03D0D30703D0521C07E000208E
+:1006800010BD03780C78401C491C1B1B07D1037854
+:100690000C78401C491C1B1B01D1921EF1D118463D
+:1006A00010BD70477047704710B500F007F810BDD7
+:1006B000014B1B68DB6818470000002019481A49E5
+:1006C0007047FFF7FBFFFFF7FBFC00BD20BFFDE716
+:1006D0001649174C24688C420BD1164B1B68994263
+:1006E0000CD1154B154A1360186810498842EDD09B
+:1006F0000AE0134880F30888124B18470F4A13602A
+:1007000018680A498842E1D080F308880E49884277
+:1007100004DD0E48026802210A4302605B68184744
+:100720000346DFE7C0070000C0070000FFFFFFFF30
+:10073000000C000014100010001000000000002049
+:10074000000400206B05000000200020240500406C
+:100750000D48704502D1EFF3098101E0EFF3088104
+:10076000886902380078182802D1C046074A104725
+:10077000074A12682C3212681047000000B5054B7A
+:10078000054A9B58984700BDFDFFFFFF4B04000042
+:1007900000000020001000000400000030B4744687
+:1007A000641E2578641CAB4204D3635D5B00E318D0
+:1007B00030BC18471D46F8E7000C00000010000090
+:1010000000150020CD64010025220000336401009A
+:1010100000000000000000000000000000000000D0
+:101020000000000000000000000000003D6501001D
+:101030000000000000000000252200002522000022
+:10104000A9650100AF6501002522000025220000EE
+:101050002522000025220000252200002522000074
+:10106000B56501002522000025220000BB650100B6
+:1010700025220000C1650100C7650100CD650100A2
+:101080002522000025220000252200002522000044
+:101090002522000025220000252200002522000034
+:1010A000D3650100D965010025220000252200003A
+:1010B0002522000025220000252200002522000014
+:1010C00000F002F815F0E3F90CA030C80838241835
+:1010D0002D18A246671EAB4654465D46AC4201D170
+:1010E00015F0D5F97E460F3E0FCCB64601263342A9
+:1010F00000D0FB1AA246AB4633431847B456010052
+:10110000E4560100103A02D378C878C1FAD85207E1
+:1011100001D330C830C101D504680C6070470000AD
+:101120000023002400250026103A01D378C1FBD803
+:10113000520700D330C100D50B6070471FB5C046C1
+:10114000C04615F063F904B00FB41FBDF0B44046BB
+:10115000494652465B460FB402A0013001B506482D
+:10116000004700BF01BC86460FBC804689469246B8
+:101170009B46F0BC70470000C11000008269024924
+:101180008161024810447047911100000100000085
+:1011900001B41EB400B50BF0E6FF01B40198864619
+:1011A00001BC01B01EBD0000401E00BF00BF00BF5B
+:1011B00000BF00BF00BF00BF00BF00BF00BF00BF37
+:1011C00000BFF1D17047000070B505460C461646C9
+:1011D00002E00FCC0FC5103E102EFAD2082E02D31B
+:1011E00003CC03C5083E042E07D301CC01C5361F2E
+:1011F00003E021782970641C6D1C761EF9D270BD45
+:101200008307FF22DB0E9A408907090E99400028C8
+:101210000BDA0007000F0838830828489B001818CD
+:10122000C36993430B43C3617047830824489B0001
+:101230001B181868904308431860704710B504469F
+:1012400000210120FFF7DCFF00211820FFF7D8FF65
+:1012500000210B20FFF7D4FF02211920FFF7D0FF58
+:1012600002210D20FFF7CCFF02210E20FFF7C8FF5F
+:1012700002210F20FFF7C4FF0221C81FFFF7C0FFA4
+:1012800003211620FFF7BCFF03211520FFF7B8FF4D
+:10129000204600F019F8002010BD6421018070473D
+:1012A00010B500F020F810BD0648704710B500F0EA
+:1012B00022F810BD704770477047000000ED00E055
+:1012C00000E400E003F9004370B505462D4C07200B
+:1012D0002070A01CFFF7E1FF5920A080294620467E
+:1012E00000F099FB70BD10B500F09EFB2549002071
+:1012F000891E087010BDF8B5224E0446B61E30781F
+:1013000001270D46002807D0204660380B2808D852
+:10131000204600F03DFF2BE0602CF9D01A48086011
+:10132000F8BD20466C38032803D8204600F071FF32
+:101330001EE0204670381F2803D8204600F045F9EB
+:1013400016E0204690380F2803D8204600F0E8F831
+:101350000EE02046A0380F2803D8204600F074F88D
+:1013600006E02046B0380F2804D8204600F0CAF91D
+:10137000286000E02F60602CD2D128680028CFD1EF
+:101380003770F8BD1A000020013000000120244908
+:10139000C003086023490020087007202249C005C7
+:1013A0008860704770B51F4D04462878A04207D06A
+:1013B000002C05D0002803D01CA14D2015F033F8D7
+:1013C0002878A0420ED000211D4A17482C70002C0E
+:1013D00019D01C4B012C06D0022C0BD013A1682075
+:1013E00015F021F870BD11600221116053610321D5
+:1013F000090605E011600321116053610121C9054F
+:101400008160416070BD116011600721C905816074
+:1014100070BD10B505A1712015F005F810BD0000D4
+:1014200080E100E02000002000F501407372635C61
+:1014300068616C5F63636D5F6161722E63000000C1
+:1014400000F500404001002010B5A038030015F061
+:10145000DBF80B070E172028313A414B525C650030
+:101460004B6808788A68194603F0E6F910BD888849
+:101470008A6883B20888194680B203F0ECF910BD7F
+:1014800008884C68CB688A6880B2214603F0E7F987
+:1014900010BD08884B688A6880B2194603F0FBF9D2
+:1014A00010BD88888A6883B20888194680B203F024
+:1014B00007FA10BD88888A6883B20888194680B206
+:1014C00003F041FA10BD08884A6880B2114603F063
+:1014D00080FA10BD088982B2888883B208881946CC
+:1014E00080B203F081FA10BD08884A6880B21146C4
+:1014F00003F09EFA10BD08894C6882B20888CB6858
+:1015000080B2214603F018FB10BD08884C68CB68F8
+:101510008A6880B2214603F02AFC10BD012010BD6C
+:1015200010B59038030015F06FF809060F161D244A
+:101530002C363F464E0088888A6883B20888194650
+:1015400080B204F031F910BD08884A6880B21146B3
+:1015500004F065F910BD08884A6880B2114604F0AD
+:101560006AF910BD08884A6880B2114604F070F923
+:1015700010BD08884B688A6880B2194604F07BF970
+:1015800010BD088982B2888883B20888194680B263
+:1015900004F07AF910BD08894B6882B208881946B0
+:1015A00080B204F090F910BD08884A6880B21146F4
+:1015B00004F09BF910BD888882B20888114680B279
+:1015C00004F0EFF910BD012010BD10B57038030014
+:1015D00015F01AF81B0F15192125282F363B40440A
+:1015E000484C53585F688D707980888D8D8D8D8FB4
+:1015F00096004A680878114608F0FDFD10BD08689D
+:1016000008F04AFE10BD0C790B7B8A6808682146F9
+:1016100008F053FE10BD086808F011FF10BD08F077
+:1016200065FB10BD08884A6880B2114609F043F88E
+:1016300010BD0A790888114680B209F0D3F810BDB0
+:10164000087840B209F0DCF810BD088880B209F0D3
+:10165000F0F810BD086809F0FEF810BD086801F048
+:10166000D2FB10BD086801F0FCFB10BD088982B2F6
+:1016700009C9194609F007F910BD05C9114609F055
+:1016800051F910BD08884A6880B211460AF0A6F9DF
+:1016900010BD0C790888CB688A6880B221460AF0B0
+:1016A000C5FA10BD0B7908888A6880B219460AF01D
+:1016B0006DFC10BD08884C68CB688A6880B22146F2
+:1016C0000AF0D5FC10BD08884A6880B211460AF0BD
+:1016D00018FD10BD0B7908880A7A80B2194609F006
+:1016E00044F910BD088880B209F044F910BD062005
+:1016F00010BD08884A6880B2114609F042F910BD51
+:10170000012010BD10B5B02805D0B12808D0B228EE
+:101710000BD0012010BD088880B20BF0FBF810BD83
+:10172000088880B20BF015F910BD08884B688A68EC
+:1017300080B219460BF01EF910BD000010B5030071
+:1017400014F062FF0A0609060C0C0F0F06060612BB
+:1017500008F0F4FA10BD0AF0C5FE10BD01F03EFA23
+:1017600010BD06F09FFA10BDFAA1FE4814F05BFE12
+:1017700010BD3EB5FC49054603C900900191FF200C
+:10178000C33069460881F94A092310460A212838DE
+:101790000BF0BFFD0024F6480BF0D9FD641CE4B249
+:1017A0000A2CF8D3F14801231A4602A990300BF015
+:1017B000A0F9002804D0FF20E6A13D3014F033FE4C
+:1017C000686800F024FC00211E22084604F06CF931
+:1017D00008F0C3FC02222421E64801F07DFBE54825
+:1017E00001222C214C3001F077FBE2490B20B0396B
+:1017F00001F0FEF9002804D0FF20D6A1513014F0EA
+:1018000012FE0AF03EFE02F097F96B460022082114
+:10181000D9A008F07DFB002804D0FF20CDA15730CF
+:1018200014F001FE284602F0E7FC002804D0FF2057
+:10183000C8A1593014F0F7FDF3218900D14814F004
+:10184000D3FCD04801214171022181710721C1716E
+:101850003EBD10B5CB4CA0780A2804D3FF20BDA113
+:10186000903014F0E0FD20786021484300190021F9
+:101870000173417BF722C908C900C91C1140EF223E
+:10188000114041730121E1700C3010BD70B50E465E
+:1018900000211C4619801546030014F0B5FE0723ED
+:1018A000050B1711231D23002246294630460AF056
+:1018B00037FE70BD22462946304608F095F870BDC7
+:1018C00022462946304601F0E2FF70BD22462946F5
+:1018D000304603F0EAFD70BD22462946304600F04E
+:1018E00010FC70BDFF209BA1EF3014F09CFD032085
+:1018F00070BD70B5A34CE078002818D02078602126
+:1019000048430019407B00254007400F0119087922
+:10191000401E08712078401CC0B220700A2800D1F7
+:101920002570A078401CA0700BF097FEE57070BD8C
+:101930009448C079002800D08BE7704770B5914D6E
+:10194000A86800280CD0FFF7F3FF002862D06022BF
+:10195000A968FFF739FCFFF7CCFF0020A860EFE78C
+:101960006879002856D0FFF774FF044681484C3050
+:1019700001F0C2FA6060002804D17A4875A14A30AB
+:1019800014F051FD606801F01AFB00280DD02046CC
+:1019900007F00BFF6078010703D5C008C000401CAA
+:1019A0002BE0744861684C302DE0724861684C301F
+:1019B00001F0ABFA00F05AFB00282BD1FFF749FFEA
+:1019C00004466C4801F098FA6060002804D1332086
+:1019D00060A1000114F027FD606801F0F4FA00280E
+:1019E00014D060680088608020460AF0CCFD6078E2
+:1019F000010706D5C008C000801C6070FFF779FFA2
+:101A00009EE75C48616801F080FA99E7594861688F
+:101A100001F07BFA70BD10B55B4CE160A0605B48E3
+:101A200000F032FC607010BD57490020087070470C
+:101A300070B5574E0546706A94B00C46401C04D1F0
+:101A4000B06AC0430004000C0BD0306AC007C00F5E
+:101A50002870706A14F0DBFBB06A2071000A6071B4
+:101A600014E02B206946087009A9684601F07BFA4A
+:101A7000002804D03B4837A17E3814F0D4FC012064
+:101A8000287006220AA9204614F04FFB2878002867
+:101A900003D06079C0210843607114B070BDF0B507
+:101AA0003B4C0646206895B00D4637460837401C2B
+:101AB00008D16068401C05D1A068401C02D1E068D4
+:101AC000401C11D02068314614F0A1FB6068311D24
+:101AD00014F09DFBA068394614F099FBE06831468C
+:101AE0000C3114F094FB25E02B206946087009A9FD
+:101AF000684601F038FA002804D01A4815A1553874
+:101B000014F091FC08220AA9304614F00EFB2B2099
+:101B10006946087009A9684601F025FA002804D032
+:101B200010480CA14E3814F07EFC08220AA9384651
+:101B300014F0FBFA20692E460836401C08D1606973
+:101B4000401C05D1A069401C02D1E069401C33D083
+:101B500020691FE07372635C686F73745F636F72F8
+:101B6000652E6300C3020000F866010094010020A6
+:101B70003D170000640800206E524635313832327D
+:101B800000000000E8030020240000203D190000B0
+:101B900080000010294614F03AFB6069291D14F0FA
+:101BA00036FBA069314614F032FBE06929460C315E
+:101BB00014F02DFB15B0F0BD2B246846047009A964
+:101BC00001F0D1F9002803D0F649F74814F02BFCB6
+:101BD000082209AF28460AA914F0A7FA684604703B
+:101BE00009A901F0C0F9002804D0EF48ED49C01D53
+:101BF00014F019FC0822391D304614F096FAD9E782
+:101C000070B5EA4C0546A068002804D0E648E549CE
+:101C1000563014F008FCA56070BD10B50146E448CC
+:101C200001F073F9E1498879401CC0B2887101283C
+:101C300003D1E048407800F04BFB10BD70B504467E
+:101C4000DD4816460D46814204D1D748D549CB30F0
+:101C500014F0E9FB012E05D0D348D249DA3014F054
+:101C6000E2FB70BD6620207000202072A58101205B
+:101C7000A07370BD70B515460C460646FFF758FEBA
+:101C800000280CD066210170468001210172216874
+:101C90000161A18881820573FFF72BFE70BD1321BE
+:101CA000304608F09FFD70BDC2494968884201D2A4
+:101CB00010207047072101700020704770B5BD4C9F
+:101CC00005462078002694B0002801D00820E4E6DC
+:101CD000BA4A6260954201D21020DEE668680028A8
+:101CE00009D00921D82804D3C31C9B089B00834238
+:101CF00005D00846D1E60720000268600EE0012109
+:101D000009074B6B896B4B43AD49511A0122591A94
+:101D1000D202891A814201D20421EAE700F050FF81
+:101D20006178A06806F052F8E068401E07280BD8DA
+:101D3000302269460A708870684607F007F9002863
+:101D400002D009A806F07CFA2846FFF712FD012010
+:101D500020703046A1E6F8B5044696480F46406824
+:101D6000814208D3002C01D0844204D3E01C8008B7
+:101D70008000A04201D01020F8BD8C488178002955
+:101D800011D0398800914178602251430D18287B89
+:101D90000C350007000F3B4600222946FFF776FD71
+:101DA000060004D015E0002038800520F8BD002C86
+:101DB00013D039880098814201D90C260DE028788B
+:101DC0003B460007000F22462946FFF75FFD06004D
+:101DD00005D00C2E01D0002038803046F8BD734C61
+:101DE0006078401CC0B260700A2801D10020607089
+:101DF000A078401EA07068784107490F01290ED0D5
+:101E0000022906D003291AD066496E4814F00BFB4C
+:101E1000E3E7C006E1D46868FFF7FFFEDDE764484A
+:101E200069684C3001F071F86079401CC0B2607193
+:101E30000128D2D15F48407800F04AFACDE7E07936
+:101E4000401CE071C9E7604A10B5904209D3594A75
+:101E50000124A4045268A04201D3904201D39142CC
+:101E600001D2102010BD00F0FCFE10BD564B10B585
+:101E7000994209D34F4B0124A4045B68A14201D3CA
+:101E8000994201D39A4201D2102010BD022803D0FA
+:101E9000102801D0092010BD00F009FF0028FAD059
+:101EA000052010BD484B10B598420DD3414B01247D
+:101EB000A4045B68A04201D3984205D3994203D39E
+:101EC000002A03D09A4201D2102010BD00F015FF65
+:101ED0000028FAD0072010BD10B50446354894B04C
+:101EE0004068844202D2102014B010BD0F2008A90F
+:101EF000087369460BA801F036F80028F4D168464B
+:101F0000007A207068464089608068468089A08099
+:101F10000020E9E710B500290BD0264A526891420B
+:101F200002D30B68934201D2102010BD8A88002A88
+:101F300002D001F05AFE10BD092010BD10B5224A92
+:101F400094B091420ED31B4A01239B0452689942DC
+:101F500001D3914206D3441E1E2C41D8994203D38B
+:101F6000914201D21020BFE7012837D10878002420
+:101F7000C007C00F002803D003206946887001E025
+:101F80006846847038206946087009A9684600F0E0
+:101F9000EAFF002804D041200CA1C00014F043FA4D
+:101FA0002046A1E7541B000093020000E803002034
+:101FB0006408002024000020FFFF0000001900201A
+:101FC000000000200A040000008001007372635CBE
+:101FD000686F73745F636F72652E6300072083E719
+:101FE0000246203A1F2AF9D807F0F9FF7CE710B51E
+:101FF0005F4A5268914201D2102010BD0246203A39
+:102000001F2A02D808F065F810BD072010BD70B572
+:102010000546584C0020207020464619544846601A
+:10202000E01C80088000A04204D0FF2052491330F9
+:1020300014F0F9F901200007C06AC0430006000E41
+:1020400003D14E480068401C03D04D484D49301A1A
+:10205000C862A8B20122214604F039F9002804D050
+:10206000FF204549233014F0DEF970BDF0B595B07E
+:102070003B2008A9087369460BA800F074FF0028EC
+:1020800004D0FF203C496B3014F0CDF93E4E0024C3
+:102090006D4630E02F19B87DC10706D0400704D443
+:1020A00060004019C0880AF08DFB3848807900280C
+:1020B0001FD0B87D80071CD560004019C088002261
+:1020C00006210AF09CFB002813D03C2108A80173CC
+:1020D00060004019C1886846C18569460BA800F0B8
+:1020E00042FF06000BD0FF2023497F3014F09BF9FC
+:1020F00005E0641CE4B268460079A042CAD83046C4
+:1021000058E5F7B505460078002700090C463E461D
+:10211000062804D0FF201849A83014F084F9287A42
+:1021200000280ED0012814D0FF201349C93014F024
+:102130007AF90298002C068001D027806680002062
+:10214000FEBD02270926002C0ED0A889A080A87BFE
+:1021500008E003271426002C06D02869E060A88A2E
+:102160002082287B2072E4E702980680E7E70000DF
+:102170002400002000190020CC1F000000100010D7
+:10218000000000200005004004300000E8030020AB
+:1021900010B56038030014F037FA0A060A0F131856
+:1021A0001F252930353A0868FFF788FD10BD05C99D
+:1021B0001146FFF7D0FD10BD0868FFF775FD10BD93
+:1021C00005C91146FFF73FFE10BD4B6808788A68C5
+:1021D0001946FFF74BFE10BD8A6809C91946FFF77B
+:1021E00061FE10BD0868FFF777FE10BD08884A68D9
+:1021F00080B21146FFF78EFE10BD05C91146FFF7EC
+:102200009DFE10BD05C91146FFF7F1FE10BD01206E
+:1022100010BD0120704700000E4A12680C498A4226
+:102220000AD118470B4A1268094B9A4204D101B5EA
+:102230000AF090FF03BC8E46074909680958084711
+:1022400006480749054A064B704700000000000099
+:10225000BEBAFECA7800002004000020001500204D
+:102260000015002001203F49400608603E490860F3
+:102270003E490A68FF231B029A4383121A430A60ED
+:10228000384980390860704710B502460420384943
+:1022900004E0C3005B181B79002B0AD00346401EE4
+:1022A000C0B2002BF5D133A1432014F0BCF8FF20BD
+:1022B00010BDC300CA50002259184A718A71012208
+:1022C0000A7110BD2A4A0021C000801801717047B0
+:1022D00010B50446042803D326A1522014F0A3F815
+:1022E0002348E1000C182079012803D021A15320B4
+:1022F00014F099F86079A179401CC0B2814200D0F5
+:1023000060710120174940068031086010BD70B52A
+:10231000164804250068164E0004800F1B4C022846
+:102320001AD014A1692014F07EF815E02078C100BD
+:1023300088190279012A07D1427983799A4203D018
+:1023400042798271705880472078401CC0B220705A
+:10235000042801D30020207028466D1EEDB200280D
+:10236000E4D170BD80E100E080E200E018E400E02C
+:10237000E00800207372635C736F635F7369676E5C
+:10238000616C6C696E672E630000000034000020F1
+:1023900010B5EFF31080C407E40F72B6D24841784D
+:1023A000491C41704078012801D10BF07BF9002CC9
+:1023B00000D162B610BD70B5CB4CE07800280AD1D0
+:1023C0000125E570FFF7E4FF0BF074F9002804D055
+:1023D00000200BF047F9002070BDC44865714560CE
+:1023E000F9E770B5EFF31080C507ED0F72B6BE4C7C
+:1023F0006078002803D1BEA18F2014F014F8607813
+:10240000401E60706078002801D10BF04FF9002D5C
+:1024100000D162B670BD10B5B348C178002904D0B0
+:1024200000214171C170FFF7DCFF002010BD10B525
+:1024300004460BF03FF9AC49C978084000D00120B0
+:102440002060002010BDF8B50246A74C0026A671FA
+:102450000820042101251027130014F0D5F80D08D9
+:102460000A0C0E101214161E262123252800257191
+:1024700022E0022001E021711EE020711CE02771A2
+:102480001AE02020F9E7012616E0FFF781FF0BF0A4
+:1024900011F90028FBD002260EE02171A5710BE096
+:1024A0002771FBE7202000E040202071F6E7FF20A5
+:1024B0008FA1763013F0B7FF0BF008F9002809D090
+:1024C0000BF00AF9B04205D130460BF008F90028AC
+:1024D000FAD02CE001208007C560894900224A60BB
+:1024E000884A9661814B02225A608560864802695B
+:1024F000D243D206D517026910231A4302610F4650
+:102500006D1C00E020BF78680028FBD030460BF03F
+:10251000E6F80028FAD0002D04D17B48026910218A
+:102520008A43026171490220886000207860A079A6
+:1025300000280CD00BF0BEF805460BF01BF8734AD0
+:10254000002D02D0A260E06001E0E260A060002EF9
+:1025500001D100F0A5F8F8BD10B504460BF0B0F8B5
+:10256000002805D060490120C8704A78521C4A7082
+:102570002046FFF768FF10BDF8B5614DA86800263A
+:10258000012802D1AE600BF06DF86868012800D117
+:102590006E6028680127544C012812D12E606079A2
+:1025A000002803D000200BF05DF866712078002829
+:1025B00007D00BF07FF8002803D0012080070761C7
+:1025C000A770286901282AD12E6100F05FF8012048
+:1025D00080074761A079002815D00BF06BF80090B8
+:1025E0000AF0C8FF0099002901D0E16800E0A16865
+:1025F000411A022901DA8A1C11DC0099002901D054
+:10260000E06000E0A060FFF7C3FE0BF053F8002885
+:1026100004D0012080070761A77000E02770E868F8
+:10262000012812D100F032F800F030F800F02EF856
+:10263000A078002804D1FF202DA1033013F0F3FE71
+:10264000EE60A6702670FFF7CCFEF8BD10B5264CE4
+:10265000E078002801D10BF029F80120810788617A
+:1026600000F014F8A07800280BD0254CE068002872
+:1026700003D10BF034F80028F8D10020E06000F01E
+:1026800005F800201949C043886010BD08B55020E6
+:10269000694608806A461088411E1180FAD208BD3A
+:1026A000F8B5124819278760154900200860C860EE
+:1026B0000BF000F8BE0701240B4D002802D0346156
+:1026C000AC7000E02C70FFF763FE084847600D49CE
+:1026D00028798863FFF7DAFFB461FFF7D7FF08496D
+:1026E000002008617461F8BD38000020000300403C
+:1026F0007372635C736F635F636C6F636B2E6300F5
+:10270000000100400005004000ED00E0FFFFFF7FFA
+:102710008107C90E002808DA0007000F0838800872
+:102720002E4A80008018C06904E080082C4A80008E
+:1027300080180068C8400006800F704710B50D2053
+:10274000FFF7E6FFC4B20420C043FFF7E1FFC0B2C9
+:10275000844203D023A11A2013F065FE26490120EC
+:10276000486010BD0121254A48031060244B002217
+:102770001A60244A5160244A1060244A11601F499B
+:1027800080390860704701211C4A480310601F4AC5
+:1027900051601B4A002111601B490860704710B549
+:1027A00017490868012804D00EA1572013F03BFEFA
+:1027B00010BD114880680022C0B20A600AF020FCF7
+:1027C00010BD10B50E4801680029FCD0FFF7E7FFE7
+:1027D00001200D494003086010BD000000ED00E03D
+:1027E00000E400E07372635C736F635F68616C5F49
+:1027F000726E672E6300000000D5004080E100E0AB
+:1028000000D1004000D3004080E200E000D0004052
+:1028100030B40121BC48C9020160CD1005604A03F3
+:102820000260BA4803681B021B0A036004680023A5
+:10283000240A24020460B6480468240A24020460BE
+:10284000B448012444608460B34C23606360A36097
+:10285000B24B19601D601A60B14B19601A600121FA
+:10286000016030BC704710B40121A748CA02026061
+:102870000B0203600C060460A64841608160A94811
+:1028800041680029FCD1A4490020086048608860A4
+:10289000A24802600360046010BC704701219F4899
+:1028A000C9020160C91001607047002805D00128E5
+:1028B00005D0022805D19C4870479C4870479C4829
+:1028C000704710B59BA18B2013F0ADFD002010BD0B
+:1028D00070B500219E4C9F4D9F4A8F4B002808D019
+:1028E00001281DD0022822D092A1B32013F09BFD15
+:1028F00070BD01200004A060A86011601960974BB2
+:10290000C2039A60964A90607F4A00121060954810
+:10291000016086480160944801609448017070BD70
+:1029200001204004A060A8605160596070BD012082
+:102930008004A060A8609160996070BDF8B594466D
+:10294000834A8B4F834D00240126002808D001289C
+:1029500032D0022840D077A1E82013F064FDF8BD02
+:10296000891E0902090A0120000490603C64686025
+:102970006C4A1164012B1DD000217C4A7D4B5170A3
+:102980006146DC63DE637C4B5C6002249C60042453
+:102990001C61744B3D31196073490E605F4B8915A2
+:1029A00019606F4B58605E4801606C49C005486013
+:1029B0001670F8BD0121E0E70120704E4004704F11
+:1029C000012B04D13464506068603964F8BD9060B4
+:1029D000346468603964F8BD01206A4E80046A4F2F
+:1029E000012BF4D1EEE74F484068704770B54A4D6F
+:1029F00028680026564C012806D1A068C00303D5DC
+:102A000001200004A0602E606868012809D1A06838
+:102A1000800306D501204004A0606E6001200BF009
+:102A200041FEA868012809D1A068400306D501200D
+:102A30008004A060AE6002200BF034FE70BD10B5C3
+:102A40004A490878002818D00120444AC0079060FD
+:102A5000434AC00B90602C4A00121060414A00208B
+:102A60001060324A1060404A106008704A78002AAC
+:102A700002D048700BF016FE10BD0320FAE70120CB
+:102A8000424900060860704701202449000608609A
+:102A9000704701203D4940050860704701201F49EB
+:102AA00040050860704733490020C86388151B49FA
+:102AB00008607047410A364AC005C00D5043801C6B
+:102AC0005143400A0818704710B4324C430B63431B
+:102AD0001B0C5C020C602E4C6343C31A2E485C0234
+:102AE00058432B4B400D4343E31A0124DB032404DA
+:102AF0001B191B1613700A681018086010BC704769
+:102B000010B50BF0A2FE10BD80E100E008E400E08B
+:102B100018E400E000B0004040B1004080E200E076
+:102B200000E100E000B5004048B1004040810040B5
+:102B300044B100407372635C72656D5F68616C5F85
+:102B40006576656E745F74696D65722E6300000052
+:102B500000B3004040B3004040B5004000F50140E4
+:102B60000083004040850040008200404800002073
+:102B700000B10040C08F00400085004004B100401B
+:102B800004B5004008B1004008B5004000E200E094
+:102B9000093D0000378600006F0C010010B50BF0F6
+:102BA00040FE10BD00200449C8630120012181407E
+:102BB000024A116000BF7047C01F004080E200E081
+:102BC00010B50CF097FA0AF059F9FEF7DFFB12F096
+:102BD00063FA0CF0F5FF0CF081FF10BD70B50C46E8
+:102BE000054603F0D5FA214628460EF026F870BDBA
+:102BF00070B50D46040012D0002D10D021012846DA
+:102C000013F0F0FA10225449284613F08EFA524875
+:102C100001210838018044804560002070BD0120FA
+:102C200070BD70B54C4E00240546083E11E0716839
+:102C300020014018817BAA7B914209D1C17BEA7BAC
+:102C4000914205D10C22294613F042FA002806D001
+:102C5000641C30888442EADB0020C04370BD2046FB
+:102C600070BD70B50D4606000AD0002D08D03A4C54
+:102C7000083C20886188401C884203D9042070BD2C
+:102C8000102070BD3046FFF7CCFF002801DB401C50
+:102C90000AE020886168000140181022314613F0D4
+:102CA00044FA2088401C20802870002070BD70B538
+:102CB00014460D001FD0002C1DD00021A170022849
+:102CC00002D0102817D108E068782978000208435C
+:102CD00011D00121A17010800BE02846FFF7A1FF61
+:102CE000002808DB401CA070687B297B0002084399
+:102CF0002080002070BD012070BD70B505461446CF
+:102D00000E000AD000203070A878012807D004D91E
+:102D1000114908390A8890420BD9012070BD002C56
+:102D200004D0287820702888000A5070022008708B
+:102D300010E0002C0CD049680001411810222046F8
+:102D4000103913F0F2F9287820732888000A60738C
+:102D500010203070002070BD540000205A4910B57A
+:102D6000884207D301218904884205D3574909685D
+:102D7000884201D2102010BD0146012006F0E4FA7D
+:102D800010BD30B5044693B000200D4607901421C5
+:102D90000BA813F029FA1C21684613F025FA6A469D
+:102DA000112010770020507710780221084310700E
+:102DB00007A80C90012008AA907245486A46108521
+:102DC0000AA80B902088108460885084A088908482
+:102DD000E088D084907FF9210840801C40084000A2
+:102DE000907708209086108708A80F9010AA0BA94A
+:102DF000684600F083FF002803D110A800882880CF
+:102E0000002013B030BD3EB5044608206946088056
+:102E10002D48844207D301208004844205D32B48E7
+:102E20000068844201D210203EBD2146012006F0F8
+:102E30008BFA0028F8D12088694688806088C8808D
+:102E4000A0880881E088488107F05FF801AB6A46F6
+:102E5000002101F0E1FB694609880829E4D003203C
+:102E60003EBD1FB504460020029008206946088137
+:102E700015480391844207D301208004844206D37D
+:102E800012480068844202D2102004B010BD07F03E
+:102E90003CF8014602AA0F4801F055FD0028F4D184
+:102EA00069460989082901D00320EEE769460988A7
+:102EB000218069464988618069468988A180694680
+:102EC000C988E180E1E700000080010028000020BF
+:102ED000042A0000FFFF000010B5031D036000205E
+:102EE000521E04E05C181C60401C2346C0B2904295
+:102EF000F8DB0020186010BD01460A680020002A97
+:102F000002D0104612680A60704702680A600160C9
+:102F10007047000000B51E2823D00BDC0C281CD005
+:102F20001FDC030013F070FB090F1D111D1D171787
+:102F300013151D00302814DD3A38030013F064FB2C
+:102F4000030F11091100002000BD214800BD04201D
+:102F500000BD0D2000BD0F2000BD082000BD1120C8
+:102F600000BD032000BD10B50C4605F0EFFF0028A2
+:102F70001ED0204605F064F9002816D022780E2ACB
+:102F80000DD00F2A0BD0022A09D0032A07D0102A0D
+:102F900009D010A17C2013F046FA002010BDA078C3
+:102FA000FFF7B8FF10BD112010BD0AA18220F2E783
+:102FB00008A18820EFE710B504F083FF10BD10B51D
+:102FC00005F03EF910BD10B504F0D9FF10BD0000AA
+:102FD000023000007372635C686F73745F686369CA
+:102FE0002E63000070477047704770477047704706
+:102FF00070477047704770477047704770470000D0
+:1030000010FFFFFFDBE5B151008001006400FFFF0E
+:1030100003B40148019001BD09000020002803D03D
+:103020008178012939D101E0102070470188FE4ADA
+:10303000881A914233D01BDCFC4A881A91422ED068
+:103040000BDC00292BD00320C002081A27D001284E
+:1030500025D001210903401A07E001281FD00228CA
+:103060001DD0FF281BD0FF380138002815D116E0ED
+:10307000FF220132811A904211D008DC01280ED0C3
+:1030800002280CD0FE280AD0FF2806D107E001292B
+:1030900005D0022903D0032901D0002070470F205A
+:1030A000704700B50B2826D009DC030013F0ACFAFA
+:1030B0000B1D2125251B25292325271F1B00112832
+:1030C0001BD008DC0C2816D00D281CD00F2814D0DB
+:1030D000102808D10FE0822809D084280FD0852835
+:1030E0000FD0872811D0032000BD002000BD05208F
+:1030F00000BDCF4800BD072000BD0F2000BD04204B
+:1031000000BD062000BD0C2000BD0D20800200BDCA
+:1031100070B500290BD0CB1FFA3B81241E46CDB2DF
+:10312000112B1BD2012805D0022806D009E000206F
+:1031300010701DE0FF20043001E0FF2003308142C9
+:1031400018D0330013F060FA111613131613161665
+:103150001316161613131313161316000846FF380A
+:1031600081381F2803D9FF39FE39022902D815708A
+:10317000002070BD1470072070BD00B5030013F06F
+:1031800043FA060406040C080A0C002000BD1120B6
+:1031900000BD072000BD082000BD032000BD007851
+:1031A0000207120F04D0012A05D0022A0AD10EE02C
+:1031B000000907D108E00009012805D0022803D042
+:1031C000032801D0072070470870002070470620B0
+:1031D0007047002807D0012807D0022807D003280D
+:1031E00007D007207047002004E0112002E02120D2
+:1031F00000E0312008700020704738B50C4605000B
+:103200004FD06946FFF7CBFF002822D12088032149
+:1032100089028843694609788907090D0843208097
+:103220006946681CFFF7BBFF002812D121880320E4
+:1032300000038143684600788007800C01432180A9
+:10324000A8784007820F2020012A03D0022A03D049
+:10325000072038BD814300E00143218088B2010589
+:10326000890F08D0012189038843A9780907C90F6C
+:1032700089030843208080B28104890F0AD0A9788D
+:103280004004C906C90F400CC903084320808004CC
+:10329000800F02D12088400403D5208840210843B4
+:1032A0002080002038BD70B50446002008801546F7
+:1032B0006068FFF7A2FF002815D12189A08981420B
+:1032C00010D861688978C90708D00121490288426D
+:1032D00008D8491C12F0A3FF298009E0FF21FF3123
+:1032E000884201D90C2070BDFF30FF3003302880A8
+:1032F000002070BD10B5137804785B08E4075B000C
+:10330000E40F23431370FD2423400478A407E40F43
+:10331000640023431370FB24234004786407E40F04
+:10332000A40023431370F724234004782407E40FF8
+:10333000E40023431370EF2423400478E406E40FF1
+:10334000240123431370DF2423400478A406E40FF0
+:103350006401234313700078BF244006C00F23404C
+:10336000800103431370002906D00878C10701D1FA
+:10337000800701D5012000E00020C0015906490E58
+:103380000843107010BD30B50A8803239B020488DF
+:103390009A4323059D0F02D1A3049C0F01D09B0FDC
+:1033A00000E001239B021A4303230A801B039A4374
+:1033B00003889804840F02D11805830F01D0800F71
+:1033C00000E00120000302430A8030BDF3B593B052
+:1033D0000D000FD0139800280FD01221284612F0AC
+:1033E00001FF03AAFF21012003F0E7F8002426468D
+:1033F00037467AE0102015B0F0BD0720FBE768469D
+:10340000807D01280BD16846818A0520C002081AF8
+:1034100010D0012810D0022812D0032812D0042C7A
+:1034200014D0052C15D113E002290000012800005A
+:1034300003300000012400E002246846468A08E0C8
+:10344000032406E068460424478A02E0052400E0DD
+:1034500006246846418A1398814246D12C74002E76
+:1034600041D00DAA0EA905200292019100901023CF
+:103470000022FF21304603F041F9002823D168469D
+:10348000808E2A46C0B20EA9FFF711FC00281AD17F
+:10349000AE81002F27D00DA9052008AE0291009023
+:1034A000132300220196FF21384603F027F9002854
+:1034B00009D16846808EF11CC01EC0B22A1DFFF7DC
+:1034C000F6FB002801D0032095E708A88178427810
+:1034D00008021043E881062C05D16846807DA87259
+:1034E0006846808A2881002085E703A803F06EF8EB
+:1034F000002884D0FFF7D5FD7DE7002805D0F94AE4
+:10350000012903D0022903D003207047518800E02D
+:103510009188814201D1002070470720704770B523
+:103520000C4605461C21204612F05CFE002020803F
+:10353000002D08D0012D04D0EBA1F04812F073FF4C
+:1035400070BD062000E00520A07070BD70B592B07F
+:103550001546064601206A461071107453740846D9
+:1035600008300395029048889082FEF7E1F9040044
+:1035700019D06580172069468883203600940AABED
+:103580007178023307AA01A80DF05FF9064660784A
+:10359000000701D5FEF7ADF9002E0AD03046FFF73F
+:1035A000ECFD12B070BD1321284607F01BF9032073
+:1035B000F7E708A800906846838B0422012128467B
+:1035C00008F035FEEDE770B506468AB000200D46DE
+:1035D00007900590069003A90490052402460291E5
+:1035E0000190102300942946304603F087F8002804
+:1035F0000DD108A804A9009102900194684683891E
+:1036000000222946304602F095FE002801D0FFF73F
+:1036100048FD0AB070BD10B50DF01DFB10BDF0B532
+:1036200089B000260546059600780C460827030059
+:1036300012F0EAFF0CFD070C3A0B77779EC2FCD81C
+:10364000E8FD68680A38FEF7E8FA0DE1A88800236B
+:1036500080B201220321009009F08CFA0290002C24
+:1036600004D0A648A0A16E3012F0DDFE029800281A
+:1036700004D1A2489CA16F3012F0D5FE02980099A7
+:1036800008300CF017FDFEF753F9040007D06078FE
+:103690003843607000986080FEF72BF9E6E0132154
+:1036A000009807F09FF8EFE0002C04D1BD208EA118
+:1036B000800012F0B8FE608800230122032109F087
+:1036C00059FA0090002804D18C4887A1883012F064
+:1036D000AAFE0099002008802A7994461EE0C300C3
+:1036E0005B199B6807936B469B8B1A0708D5DA0614
+:1036F00006D56046C20050194038C08F088006E0E9
+:103700005B0409D50871C2005019C08848806078F0
+:10371000384360700226A7E0401CC0B28445DED862
+:10372000A2E0E888694608800090002C04D1734824
+:103730006DA1983012F077FE2878062814D10098F1
+:10374000C00B11D0608800230122032109F012FA76
+:10375000060004D1694864A1A23012F064FE002082
+:103760003071A88870803BE06078384360707BE0FF
+:10377000002C04D161485CA1B43012F054FE608882
+:1037800000230122032109F0F5F90090002804D15B
+:103790005A4855A1B73012F046FE009808300DF097
+:1037A000ACFA0121484002D1E888C00B5CD00098F7
+:1037B00061880226C180D7E7002C04D14F484AA176
+:1037C000D03012F030FE608800230122032109F07E
+:1037D000D1F9002804D1494843A1D33012F023FE87
+:1037E0000226C1E7002C04D144483FA1DC3012F08E
+:1037F0001AFE0226618801222046FEF71FFA0120E8
+:103800000590B1E7A889002380B20122032100902E
+:1038100009F0B0F90746002C04D0384832A1EE3048
+:1038200012F001FE002F07D12FA101E00FE016E0FA
+:103830003248EF3012F0F7FD686802902889694637
+:103840008881012202A90098FEF714FA0CE0002CEE
+:103850008AD16D2024A1C00012F0E5FD84E727483D
+:1038600021A1FE3012F0DFFD002C0DD060780007A2
+:103870000AD50598002807D18420207020465822B8
+:1038800029460830FDF7A0FC304609B0F0BDF7B579
+:103890000C460546007A224688B00A320292921CF3
+:1038A00004920027811E16323E4601920B0012F050
+:1038B000ABFE08F605F548488DD1F4F5688800237D
+:1038C0000122032109F056F90190002803D106A135
+:1038D0000B4812F0A8FD01980088002812D052274A
+:1038E000072601E1000900207372635C676174744C
+:1038F000735F636F72652E63000000006F0200004B
+:103900008603000051271E26002C7DD06888A080E9
+:103910000120A071019802990079C0004019C08966
+:10392000FFF754FD002870D101980079C0004019BC
+:10393000C089208101980079C0004019408AA08385
+:10394000F2E0698A0091062820D1E889C00B1DD0D9
+:1039500008462230512786B2002CD6D0A889049977
+:10396000FFF734FD002873D16888A0800220A07181
+:10397000A88920810120A072288AE08300982084F1
+:103980006969009A019812F0D0FBCDE0084620301A
+:10399000502786B2002CB8D0A8890299FFF716FDEF
+:1039A000002855D16888A080A889E080287A062858
+:1039B0000AD002202072288AA0830098E083204643
+:1039C00069692030009ADEE70120F3E76888002368
+:1039D0000122032109F0CEF80690688A009006982B
+:1039E000002803D1FD49FE4812F01DFD069808305D
+:1039F0000DF083F90121484002D1E889C00B26D09F
+:103A00000098223086B201E073E021E05127002CBB
+:103A100079D06888A080A8890499FFF7D7FC00288E
+:103A200016D10220A071A88920810420A072288AC2
+:103A3000E083009820846969009A019812F075FB70
+:103A40000699002008710698A98941806CE003203E
+:103A50000BB0F0BD688805F0D2FB019068880023A8
+:103A60000122032109F086F800900198002804D172
+:103A7000DB48DA492C3012F0D6FC0098002804D13B
+:103A8000D748D6492D3012F0CEFC0098D549C088D1
+:103A9000884205D05127222604E01EE03FE035E0B1
+:103AA00050272026002C2ED06888A080502F07D0C9
+:103AB0000220A0712146287B0831FFF730FD33E05A
+:103AC000287BA11DFFF72BFD6A8800230099019830
+:103AD000FFF73CFD0028BBD126E0C349A889C9886F
+:103AE000814207D154270626002C0CD06888A0807C
+:103AF0001AE008E053270826002C04D06888A0802C
+:103B0000A889E08010E00A98068013E05527072670
+:103B1000002CF8D0A889A0800020A07104E08D209E
+:103B2000AE49C00012F07FFC0A98002C068001D03C
+:103B30002780668000208BE7AB4900200870704723
+:103B400030B585B00C4601F0E0F90546FF2804D1F8
+:103B5000A348A249953012F066FC00202080207115
+:103B60006080401EE0802046294608300CF096FA1E
+:103B70006A462946012002F020FD102412E0684622
+:103B8000808800070ED56846C0882946FFF71BFDD0
+:103B900068468188FF2321438180C0882946019A95
+:103BA00002F036FE684602F011FD0028E7D005B0AD
+:103BB00030BD0A46014610B5104608300CF082FAB6
+:103BC00010BD70B5002305461A46032108F0D2FF48
+:103BD000040004D182488149B73012F024FC204609
+:103BE000294608300CF066FA70BDF0B591B00C466D
+:103BF000074605F004FB050005D02878222804D2EA
+:103C0000082011B0F0BD7948FBE700231A460321D4
+:103C1000384608F0AFFF0646002C02D0A0880028E6
+:103C20000CD00120694608710220087400204874F5
+:103C3000002C05D0A0880883206802E00920E0E776
+:103C4000088305903046083003970290FDF770FE18
+:103C5000040018D0678017206946888320350094B7
+:103C60000AAB6978023307AA01A80CF0EEFD0546FD
+:103C70006078000701D5FDF73CFE002D09D02846ED
+:103C8000FFF77BFABDE71321384606F0ABFD0320B2
+:103C9000B7E708A800906846838B042201213846C4
+:103CA00008F0C5FA0021C943F180AAE7FFB585B045
+:103CB0000E9E7788384605F0A2FA054600231A467C
+:103CC0000321384608F056FF0446002D03D143492E
+:103CD000474812F0A8FB002C04D145483F49401C3E
+:103CE00012F0A1FB0834089869460394C1C105A8E5
+:103CF0000DC8203569780CF017FAC6E5F0B5044612
+:103D0000002099B00D4601460D9010A881811646FD
+:103D100001818180344A68469180018510A8018024
+:103D200068460187818581841078012808D002289F
+:103D300006D0032804D0042802D0082019B0F0BD12
+:103D40002C4A944273D32C4F0121890438688C4249
+:103D500001D3844278D3274A954275D3012189043F
+:103D60008D4201D385426FD36168002913D0214A67
+:103D7000914269D301229204914201D3814263D3DB
+:103D800060892189884203D801225202914201D9D7
+:103D90000C20D3E70D9016AA0EA92846FFF783FA48
+:103DA0000028CBD1686880784007800F02280AD1AC
+:103DB0006846008F8004800F05D02869002802D053
+:103DC0003968884240D30AA92069FFF716FA00280B
+:103DD000B4D1206900281CD060780FE0E8380000DA
+:103DE000EE030000FFFF0000000900200230000089
+:103DF0000C050000008001002800002080076846B4
+:103E0000008D03D58004800F68D002E08004800F0D
+:103E100064D16846008D810618D58004800F6068E3
+:103E200006D0002812D0396888420DD302E00BE09A
+:103E300000280BD0FE49884206D30121890488421C
+:103E400004D33968884201D2102077E709A9606954
+:103E5000FFF7D3F900289CD16069002808D0684694
+:103E6000808C0105890F012938D18004800F35D05D
+:103E70000BA9A069FFF7C1F900288AD16846808C98
+:103E800080062BD46846808D810627D4A16900293D
+:103E900006D00105890F012920D18004800F1DD093
+:103EA000E068002804D00078002817D01C2815D21C
+:103EB00004AA611C2046FFF71DFA0121890210A8FF
+:103EC0000180012768468773DA49818104AA033299
+:103ED00017A92868FEF711FF002801D007202DE759
+:103EE00010A8007F15A9C01CC2B200200C9201903E
+:103EF000FF32009003460291FF3203A8033210996B
+:103F000002F0B3FA002826D110A9888A0F902A89D6
+:103F10002969C94801910092029010A90A8B6B8906
+:103F200028680E9902F0A1FA01007DD1C24800254F
+:103F3000001F818868464174090A8174052104A81C
+:103F40006A4623C210A82A46FF21808A0C9B02F0F1
+:103F5000F1F9002802D0FFF7A4F8EFE66846007CEC
+:103F60000322C1090020920290430122920280188C
+:103F70001490002928D0014610A801806846292104
+:103F8000877309028181058608A8007C0023410807
+:103F900060784900C007C00F014308A80174FD20E4
+:103FA00001406078A54A8007C00F4000014308A87F
+:103FB00001740CA9022001910090029503A81099A8
+:103FC00002F053FA01002FD16068002828D0206940
+:103FD00000280DD10AA90EA8FFF7D5F9607880074F
+:103FE00006D46946088D032109038843694608857C
+:103FF000904968468773FE31818190492089891EE6
+:1040000012F00DF962680D9811AB019200900293C5
+:104010000A46002303A80A9902F027FA010003D1F7
+:104020002078C10603D400E086E080062AD56846E1
+:104030000586606900280DD109A90EA8FFF7A3F92C
+:104040006846818C03208002814301208002091888
+:10405000684681846946888CC821084369468884FB
+:1040600074488F73FF30888112AA0CA90220029233
+:10407000019100900023714A03A8099902F0F5F913
+:10408000010059D12078C00729D068460586A0696B
+:1040900000280DD10BA90EA8FFF775F96846818D90
+:1040A000032080028143012080020918684681852F
+:1040B0006846818D40200143684681858773604949
+:1040C000818113AA0CA90220029201910090002381
+:1040D0005A4A03A80B9902F0C8F901002CD1E068F4
+:1040E00000282DD010A8149901805549684687737F
+:1040F000491C8181E16808A80A78027449784174F2
+:10410000E0684122418868464186E06800230179E1
+:1041100008A80175E068D200C18808A84175090A9D
+:1041200081750CA8072101900091029503A81099B0
+:1041300002F09BF9010003D00F9800F0EAFEFDE5C4
+:104140003D480321001F0170002E0AD08088308076
+:1041500010A88088708010A80089B08010A880897D
+:10416000F0800020EAE530B501248BB015460B46FF
+:10417000012802D002281CD104E06846052184737E
+:10418000C90203E02B4968468473891E8181002B94
+:1041900012D003210020890288430121890240189E
+:1041A0006946888405AA04A91846FEF7A6FD0028DA
+:1041B00004D007200BB030BD1020FBE76A46127C0C
+:1041C0001D480092801E05A9FF3201910290FF3226
+:1041D000002303A80332099902F047F9002802D00E
+:1041E000FEF75FFFE6E71448001F002D01D041886D
+:1041F000298004700020DDE770B592B004460126E6
+:1042000008A886700F496846018410AA08A930469C
+:10421000FFF7A9FF00284DD12078074DC0070024E3
+:104220002D1F002848D01C21684611F0DDFF0BE04F
+:1042300000800100032800000409002003020000A0
+:10424000032900000118000068460178202001437E
+:104250006846017008A88670F9496846018411947F
+:104260000794817FF92001406846891C81770020EE
+:1042700001466846017700200146684641770421DF
+:104280008185C485018607A80A9011A80D9008A809
+:1042900009900EAA09A96846FFF730FD002809D148
+:1042A0006846008FE8806846808F2881401C6881BE
+:1042B0002C70002012B070BDEC802C8110A80088FA
+:1042C000F4E7F7B5DF4900260A789EB0012A04D04A
+:1042D000022A02D0082021B0F0BD4A88824201D0D3
+:1042E0000620F8E71F98824201D10720F3E7012258
+:1042F00010A98A75D4488882002003239B020146B6
+:1043000099439302CB1810A90B8669468A81CF4A3C
+:10431000CA8118A9887110A9888419A904916946CD
+:10432000CA820690FF20087503A802F072F90024E3
+:104330002546274608AA052103A802F06DF90028A2
+:1043400010D082286FD1002C6FD0002D6DD010A816
+:104350008480C5800021017418A8807B11AC0128DD
+:1043600065D06DE008A88079002F21D0012857D1B1
+:104370006846818CB44881421CD113AA0DA905203E
+:104380006B4607C36846408C10230022FF2102F0D1
+:10439000B5F9002868D110A88089042801D0062822
+:1043A0004CD16846818E1F98814239D10F2092E707
+:1043B000012835D16846808C0521C902884202D087
+:1043C000491C88422CD19F4841886846408C8142D4
+:1043D00001D1012700E00027002C01D0002D10D0D2
+:1043E0001F9988421CD113AB0DAA05216E460EC63B
+:1043F000044610230022FF2102F080F9002833D167
+:1044000001E035460CE010A88089022801D0102870
+:1044100014D1C0B21BAA0DA9FEF749FC00280DD18A
+:104420006846468C86E71FE0FFE7052053E714A99E
+:104430001BA8221DFEF761FC002801D003204AE7DB
+:1044400010A8007C0023001DC2B210A8027420989E
+:1044500002900194009215A81C9902F006F8002819
+:1044600002D1784902220A70FEF71BFE33E710B52D
+:104470000B46401E86B084B203AA00211846FEF700
+:1044800039FF04AA052103A802920191009001239B
+:104490000022FF21204601F04DFF04466846008AB5
+:1044A000012804D06D206A49000111F0BCFF2046AC
+:1044B000FEF7F7FD06B010BDF0B5624F0446387840
+:1044C00087B00E46032804D0042802D0082007B085
+:1044D000F0BD04AA03A92046FEF7E5FE0500F6D1CB
+:1044E000606880784007800F02280DD16846808977
+:1044F0008004800F08D02069002805D0554909683C
+:10450000884201D21020E2E7208905AA6B46216982
+:1045100007C369460A8A63892068039901F0A5FFE9
+:10452000002802D0FEF7BDFDD1E7002E02D068467C
+:10453000808A3080042038702846C8E738B50C00DF
+:10454000054609D000236A46FF2102F039F9002808
+:1045500004D0FEF7A6FD38BD102038BD69462046C0
+:10456000FEF74BFE0028F8D1A078FF21C307DB0F30
+:104570002846009A02F04CF9EBE73EB50C0009D052
+:1045800002AB6A46FF2102F01BF9002804D0FEF7B7
+:1045900088FD3EBD10203EBD0321204611F022FEC5
+:1045A0006846008801A90005800FFEF712FE00286A
+:1045B0000BD16846007920706846008801A9800404
+:1045C000800FFEF706FE002801D003203EBD68469E
+:1045D00000796070A278EF20024068460088C10B25
+:1045E00009010A43F7210A404104C90FC9000A43DF
+:1045F000A270F9210A40800601D5022000E00120C6
+:10460000400069460243097A50084000C907C90FB3
+:104610000843A07000203EBD7FB5144605220192DC
+:1046200003AD029500930A462388FF2101F082FE24
+:10463000694689892180FEF734FD04B070BD000011
+:10464000052A00000009002002280000FFFF0000EA
+:10465000E838000028000020F3B5002799B068462C
+:104660000C4607873D4600291ED0E068002806D08A
+:10467000A068002818D001886A4611870780199819
+:1046800004F0BDFD002812D0007822287ED31998AE
+:1046900000F03BFC002300901A460321199808F013
+:1046A00069FA060009D104E010201BB0F0BDFD48F6
+:1046B000FBE7FD49FD4811F0B6FEA078012803D0C4
+:1046C000022801D00720F0E72088002808D0401EEB
+:1046D00080B203AA009901F070FF002859D11DE0B3
+:1046E000F048401CE1E76946498A228891420BD292
+:1046F0006846807D0025012810D16846808AEC49F3
+:1047000088420BD1012509E0914203D1002D2AD026
+:104710006D1C01E0022D0BD0032D04D203A801F083
+:1047200055FF0028DFD082281BD0002831D11DE0A2
+:104730006946897D0129F1D16946DD4B8A8A5B1E74
+:10474000D11A9A420FD005DCDA48101A0BD0012892
+:10475000E4D108E0012906D0FF390129DED1032583
+:10476000E1E7022D15D10D2080029EE7E0680028C8
+:1047700016D00EA9052202910192009069460B8F76
+:10478000A2882088FF2101F0D5FD00E01EE000286E
+:1047900002D0FEF786FC88E76846A168008F088093
+:1047A0006846008AC00601D5C3487EE707980028FE
+:1047B00003D06846008B022801D0032075E70798D4
+:1047C000A1780078012903D0800710D408206CE775
+:1047D000C007FBD000220721199808F010F8002824
+:1047E00002D00725022004E0AE48801C5DE70225C8
+:1047F000032008A908702188684681851998083621
+:104800000A90099617216846818712AB02330FAAD6
+:10481000052108A800970CF018F8002802D0FEF730
+:10482000ACFC42E710A800906846838F042229461A
+:10483000199807F0FCFC38E770B5064615460C469B
+:104840000846FEF7EBFB002804D12A4621463046F5
+:10485000FFF789FCF2E610B5FFF733FD10BD70B528
+:104860001E4614460D0014D0002C12D06168002999
+:104870000FD00121FEF741FE002809D12068FEF784
+:10488000CDFB002804D1324621462846FFF736FAF0
+:10489000D4E61020D2E670B515460C000ED00221E9
+:1048A000FEF72BFE002808D12068FEF7B7FB002892
+:1048B00003D129462046FFF7FFFDBFE61020BDE6E5
+:1048C000F8B506467D480D46016814468A4231D344
+:1048D0006068002808D07A4A90422BD301229204C3
+:1048E000904201D3884225D37648864204D0304690
+:1048F00004F085FC00280CD0304600F006FB06468C
+:10490000284600F0BFFA002804D16068002802D0D1
+:1049100012E06448F8BD00236A463146284601F09B
+:104920004FFF002802D0FEF7BCFBF8BD68460088A8
+:10493000800601D41020F8BD6188224628466368AD
+:10494000FFF76AFEF8BDF7B55C4E0746306886B0E3
+:104950001446824202D2102009B0F0BD384600F061
+:10496000D4FA05465748874201D0FF2D08D00023CE
+:1049700004AA2946079801F023FF002826D101E068
+:104980004848E9E76846008AC00601D54A48E3E797
+:1049900003A9002002910527019000976288494BE6
+:1049A0002946079801F0AAFE00280FD161683268F5
+:1049B000914208D30191029000972388628829468A
+:1049C000079801F09BFE694689892180FEF769FB03
+:1049D000C2E7002907D03C4B0A881B899A4202D8BB
+:1049E0003048401C704737E610B586B004236C464B
+:1049F000A382354BDC88002C07D01B898B4201D267
+:104A0000914204D92748401C54E5062052E56B46E4
+:104A100019825A820021009101911C800221997013
+:104A200005A9029104A903916946FFF715FE41E526
+:104A3000F3B50C4685B0812069460873002C1BD065
+:104A4000059804F0DCFB070018D03878222869D3D9
+:104A5000059800F05AFA049000220121059807F009
+:104A6000CEFE00280CD000231A460321059808F03A
+:104A700081F805000AD105E0102028E5094826E55F
+:104A8000112024E50849114811F0CDFC28460830D2
+:104A90000BF032FB06462078012819D0022838D0C6
+:104AA000072014E502300000E8380000E1080000AB
+:104AB0000328000000280000013400002800002026
+:104AC00000800100FFFF000000090020840A0000B0
+:104AD000A18803AAFEF71CFB0028CED1B00721D580
+:104AE0006846007B00281FD1A079C0071CD0E06871
+:104AF000002205216B4607C36389228968880499CF
+:104B000001F018FC6946087300280DD0FEF7C9FAB9
+:104B1000DDE4A18803AAFEF7FBFA0028ADD134201A
+:104B2000064201D10820D2E46846037B2946384674
+:104B3000059AFEF70BFDCAE4FFB597B0002001907F
+:104B40001F4615460C460E46179804F058FB0028E1
+:104B500004D00078222803D20820A6E5F448A4E572
+:104B6000B80801D00720A0E5032F00D1002717982F
+:104B700000F0CBF90890002C1BD0022D77D3ED4824
+:104B8000006884427CD361190091012902D0491E3A
+:104B9000814275D3AD1EAAB22146E74810F036F81F
+:104BA00000991E394A7F0B7F11021943884267D151
+:104BB000ADB2E248B90702D50189491C00E00121E4
+:104BC00089B20091F90701D0078900E0DA4F03AA02
+:104BD0000899009801F0F1FC0DE0F078B17800023E
+:104BE000084310284CD80199091D401880B2019043
+:104BF000A84245D82618002E60D07078317800027F
+:104C0000084300998842E8D358E06946098A0A07B0
+:104C100054D5002C3FD0019AA618121D92B20992C9
+:104C2000F278B37812021A439446102A28D8099AC7
+:104C30006244AA4224D87278337812021A4390420E
+:104C40001ED1C8061ED509980AAA052120186B4650
+:104C500007C3707831780002084363460022089940
+:104C600001F068FB002803D0FEF71BFA1DE507E002
+:104C7000F078B178000208436946098D884201D076
+:104C80000B2012E5F078B17800020843099940182A
+:104C900080B2019006E0C90604D50899FEF793FC9E
+:104CA0000028E3D16946088A1021884369460882B2
+:104CB000488AFF23049A089901F0AAFD03A801F08D
+:104CC00085FC002803D16846408AB8429DD900235C
+:104CD0001A460321179807F04DFF040003D19849A5
+:104CE000984811F0A0FB20880028BFD0012108A817
+:104CF00001700173002646732188684601862046AC
+:104D00000830099017980A90FCF712FE05001BD096
+:104D10001798688017206946888010AB023301AA73
+:104D2000052108A800950BF090FD0746687800075C
+:104D300004D584488249223011F075FB002F09D038
+:104D40003846FEF71AFAB0E41321179805F04AFD29
+:104D50000320AAE40EA8009068468388042201215B
+:104D6000179807F064FA00288BD126809DE4F0B5EF
+:104D700000248DB01F4615460E46002A04D0B908FF
+:104D800004D007200DB0F0BD1020FBE7032F00D1A9
+:104D9000002700F0BAF80390FF2804D06749B8074D
+:104DA00003D5488902E06248ECE70120FA0702D007
+:104DB0004989491E00E0604906AA8FB2039901F0B3
+:104DC000FCFB38E06946898B090734D504AB052123
+:104DD0000022029300910192574B039901F08EFC3F
+:104DE000002821D1002E21D06A46128A2988A218D3
+:104DF0003019121D914234D36946CA8B0270120ACF
+:104E000042700A8A8270120AC27004A90522001D2B
+:104E10000092029101906946C88B0B8A0022039987
+:104E200001F06CFC002801D00320ABE76846008A43
+:104E30002018001D84B206A801F0C8FB002804D089
+:104E4000822806D0FEF72DF99CE76846C08BB84251
+:104E5000B8D9002C07D0002E10D02988A01C814280
+:104E600003D20C208EE705208CE7224631463248DB
+:104E70000FF0CCFE31190870000A4870A41C2C8079
+:104E800000207FE700B585B06946FEF79FFA00284D
+:104E90000AD16846007C030011F0B6FB08052F2FED
+:104EA0002F2F08080531032005B000BD6846807823
+:104EB000012807D1684600880321C902401A1CD086
+:104EC00001281AD068468079012806D16846808872
+:104ED00015214902401A05280FD96846807A012811
+:104EE00011D16846018929200002081A05D002283C
+:104EF00003D0032801D0042805D10F20D4E712A144
+:104F0000164811F090FA0020CEE710B507F028FE01
+:104F100010BD10B50C4601F023FB002803D00AA1F8
+:104F20000F4811F080FA2046FEF7BBF810BD0000D4
+:104F30000230000028000020FFFF000000090020D0
+:104F4000E83800003F0B00007372635C67617474A3
+:104F5000735F636F72652E63000000002202000021
+:104F6000BB060000F8B500780C46164610340E3625
+:104F7000069F022809D0032836D005287ED0FF20BE
+:104F8000F6A1E53011F04FFAF8BDCD890A2068434B
+:104F90000E30188031203880002AF5D0087B9581AA
+:104FA000801FC7B21AE020886168308048780A788C
+:104FB00000021043F080C8788A78000210433081E4
+:104FC000B21C3846091DFDF772FE002F01D00028E3
+:104FD00002D000203071708008340A3628466D1ED9
+:104FE000ADB20028DFD1F8BDCD890A2068430E306C
+:104FF000188032203880002AF5D0087B9581401F28
+:10500000C7B243E0616822880878F2803279C3072A
+:1050100052085200DB0F1A43FD231A408307DB0FAF
+:105020005B001A43FB231A404307DB0F9B001A4324
+:10503000F7231A400307DB0FDB001A43EF231A4064
+:10504000C306DB0F1B011A43DF231A408306DB0F65
+:105050005B011A43BF231A404306DB0F9B011A432F
+:105060003271C00970718A784B7810021843308110
+:1050700032463846C91CFDF71AFE00E00CE0002855
+:1050800002D00020B070308008340A3628466D1EE9
+:10509000ADB20028B6D1F8BD087BCD89801E86B29E
+:1050A0003046083068431030188034203880002A99
+:1050B000F1D0174695811037E800D681C0190090CD
+:1050C0000DE020883880009878603246616800984A
+:1050D00011F02BF800980834801908370090284602
+:1050E0006D1EADB20028ECD1F8BDFFB581B00A9DB0
+:1050F0001E460C46002A05D0607AFF300130D08071
+:10510000E089108101980E270078030011F07CFAE5
+:105110000B7E0719293541536C7878787E00009210
+:10512000087B082805D0032803D091A1954811F0E9
+:105130007AF9378030200FE000990020888105B08F
+:10514000F0BD0092087B042804D08E4888A114305A
+:1051500011F069F937803120288000980028EBD1C0
+:10516000EDE70092087B042804D0932080A1800002
+:1051700011F059F937803220EEE70092087B0228BF
+:1051800004D080487AA13A3011F04DF937803320AD
+:10519000E2E7087B1746042804D07A4874A14C3013
+:1051A00011F041F91020308034202880002FC6D023
+:1051B0000020B88116E0207B1746052806D0062877
+:1051C00004D070486AA1603011F02DF912203080AF
+:1051D00035202880002FB2D0E089B88100203882A5
+:1051E00001984088F881AAE70092087B072804D03C
+:1051F00064485FA1713011F016F937803620ABE7B3
+:1052000033460095019800F00EFC98E72F2053A13B
+:10521000000111F008F992E770B50C46054603F05D
+:10522000EEFF002804D00078222803D2082070BDA9
+:10523000554870BD00231A460421284607F09AFC01
+:105240002060002801D0002070BD032070BDFFB594
+:105250008BB00D4607461720694608850E98032631
+:105260001446002805D10EA93846FFF7D5FF0028BF
+:1052700034D1002D0BD000220321384607F0BFFAAD
+:10528000002834D00E980078002830D108E020782B
+:10529000092819D00F2823D030A13C4811F0C3F8B9
+:1052A0000E98A760801D03AA606002320AA92046FA
+:1052B00000F00FFC002827D0030011F0A5F9071A11
+:1052C000182323211C1E23000726002231463846BE
+:1052D00007F095FA0028E3D12B48801C0FB0F0BDF1
+:1052E00000220321384607F08AFA0028D8D111207D
+:1052F000F4E70020F2E70820F0E72348401CEDE740
+:105300000720EBE70320E9E701A800906846038D3A
+:1053100004223146384606F08AFF0028DED1002DEF
+:10532000DCD00E990D70D9E730B587B01D460C461C
+:10533000002A11D0042369460B7013888B81528890
+:10534000CA81A2788A7422880A8200236A46294682
+:10535000FFF77DFF07B030BD1020FBE77372635C81
+:1053600067617474635F636F72652E630000000091
+:105370007372635C67617474635F636F72652E63DD
+:105380000000000025020000023000004F03000072
+:10539000F3B581B001980C4600780826030011F09F
+:1053A00033F9125F47471B134B0A0A0A0A0A0A0A13
+:1053B0000A0A0A0A0A5F002C02D1F849F84808E0F4
+:1053C0006078304360703CE0002CF9D1F448F34938
+:1053D000083011F028F8F3E70198002380880122B3
+:1053E00087B20421384607F0C5FB0546002C04D0DF
+:1053F0007520EA49C00011F016F8002D04D1E848E4
+:10540000E649143011F00FF83946A81D00F058FB9A
+:10541000FCF78EFA040006D0607830436070678035
+:10542000FCF767FA0FE01321384605F0DBF915E0C9
+:10543000DB48DA49283002E0D948D8492D3010F04D
+:10544000F2FF002C0AD06078000707D59320207067
+:105450002046582208300199FBF7B6FE0020FEBD19
+:10546000CF48CE493130EAE710B500210170801DE8
+:1054700000F023FB10BD0A4610B50146901D00F058
+:1054800027FB10BD70B5002305461A46042107F01E
+:1054900071FB040004D1F920C049800010F0C3FF63
+:1054A0002946A01D00F00CFB70BDF7B5054684B081
+:1054B0000C4600206946088188806F8803460122D7
+:1054C0000421384607F056FB060004D1FD20B349FD
+:1054D000800010F0A8FF002C03D0A7800020E080FF
+:1054E0002081297A20461230C91E142700900B0013
+:1054F00011F08AF80FFEFDFC3809A95E657A2FB21B
+:10550000C9E99191FC003078012804D0A3497020AA
+:10551000143110F088FFA9896A46C8000E309080C7
+:1055200030201081002C13D0A18100200DE0C1009B
+:10553000327909190A747288CA8182005319DA898A
+:105540004A821A8A401C8A8280B2A1898142EED89E
+:10555000F1E002A8009001AB22462946304600F057
+:105560002BFAE8E03078042804D08C49BD201431AF
+:1055700010F059FFA8890622014650436A460E30B2
+:10558000908033201081002CE2D0A18100200BE01C
+:10559000062141434F190919FA89CA81BA7C8A74D4
+:1055A0003A8A401C0A8280B2A1898142F0D8C2E0C6
+:1055B000307806280BD079491431D72005E03078AF
+:1055C000062804D07549EB20143110F02CFFE8892F
+:1055D00069461230888035200881002CB8D0A9890E
+:1055E000A1817188E18126E03078072804D06B49D9
+:1055F000FF20143110F017FFA8896A4601460E30CB
+:10560000908036201081002CA2D0A1812046AA894A
+:105610000E30296954E0E8896946123080B2382298
+:1056200088800A81002C7ED0A989A181287A10283F
+:1056300007D00221A173E9892182EA8929690098AA
+:105640003EE00121F6E702A8009001AB2246294680
+:105650003046FFF787FC6EE03078082805D04F49C8
+:10566000FF201431EE3010F0DEFE684637218780CF
+:105670000181002C5FD0A989A18100206082208255
+:105680000120A07357E03078092805D04349FF2056
+:105690001431FF3010F0C7FE288A69461430888024
+:1056A00037200881002C46D00421A173A989A1814B
+:1056B000E9892182298A618220462A8A143069690F
+:1056C00010F033FD37E030780A2804D033493548EC
+:1056D000143110F0A8FE6846372187800181002C24
+:1056E00029D00521A1730020A08102E01EE003E083
+:1056F0000CE0208260821EE002A8009001AB2246EE
+:1057000029463046FFF7F1FC15E00CE00D20694614
+:10571000392288800A81002C05D00120E0800020F9
+:105720002081207307E00699088019E01C481B4976
+:10573000A43010F078FE6846069980880880002C16
+:105740000ED0684600892080684680886080287A6C
+:10575000032805D0102803D0112801D00020307074
+:10576000002007B0F0BDF7B5568815460F46002358
+:1057700082B01A460421304607F0FCF9040004D137
+:1057800007480649C43010F04EFEA41D33462A4691
+:1057900039460094029800F022FBD0E45C530000EC
+:1057A0009503000013020000F7B58CB00D461446B7
+:1057B00007A90C98FFF730FD002812D1B64E01273B
+:1057C000002C0FD00321684601701021818208A8A7
+:1057D00002460690204605A9FDF78FFA00280BD057
+:1057E00007207BE50821684601708581C681052177
+:1057F0008774C90201820BE00798A17801712188A2
+:105800004180684605218774C90201828581C6816D
+:1058100002460121079B0C98FFF719FD5EE508B5CC
+:1058200001236A4693709D4B13800A460223694602
+:10583000FFF77AFD08BD08B501236A469370974BC0
+:105840005B1C13800A4603236946FFF76DFD08BD04
+:1058500000B587B000290CD002236A4613700B886C
+:1058600093814988D18100230421FFF7F0FC07B020
+:1058700000BD1020FBE710B5002903D00523FFF77A
+:1058800053FD10BD072010BD70B588B00D461446FD
+:10589000064607A9FFF7C0FC00280DD1002C0DD04B
+:1058A0000621684601708581C481079B02465C80A1
+:1058B00006213046FFF7CBFC08B070BD05216846D5
+:1058C00001708581F1E710B588B000290BD007245D
+:1058D0006B461C709A81049100236A462146FFF7AB
+:1058E000B6FC08B010BD1020FBE770B500241722ED
+:1058F00088B0002914D00D782B0010F085FE062307
+:10590000050519041B231522D21E93B2CA88002A4A
+:1059100002D08E68002E03D09A4203D90C20CBE728
+:105920001020C9E7042D05D08A88002A0AD101E099
+:105930000620C1E7012D11D0022D05D0042D18D06D
+:10594000052D23D00720B7E709236A4613704B883B
+:105950009381CB88D381896804911DE00C236A462A
+:1059600013704B889381CB88D38189680824049174
+:1059700012E00D236A4613704B8893818B88D38184
+:10598000CB88138289680924059105E00E236A46B5
+:105990001370497811730A2400232146FFF757FC3E
+:1059A0008AE700B587B00F236A4613709181002300
+:1059B0001946FFF74CFC5AE7FEB50078089D1C46D7
+:1059C00016460F46012803D03549912010F02BFDD3
+:1059D000F889C0000E30208030202880387B001FDE
+:1059E000C0B20190002E1DD0F889B081002516E0CC
+:1059F000E8008419C0190090224641690E320198CE
+:105A0000FDF755F9002802D000202074E0810098AD
+:105A10006D1C008A60820098ADB2408AA082B08975
+:105A2000A842E5D8FEBD70B514461425049A1D8021
+:105A300037231380002C0ED0CA89A28100226282F3
+:105A40000078082808D0092810D00A2819D014494D
+:105A5000144810F0E8FC70BD087B0C2804D01148F5
+:105A60000F490C3810F0DFFC012008E0087B0D28FE
+:105A700004D00C480A49083810F0D5FC0420A07363
+:105A800070BD087B0E2804D006480549001F10F0A1
+:105A9000CAFC0520F3E70000FFFF00000228000019
+:105AA00070530000BB02000010B5FE4B5860197225
+:105AB0001A80C90010F098FB10BD002101807047CA
+:105AC00010B50022D2430280032007F0F8FC10BD7D
+:105AD0007047F0B50E460446017801208840F2492F
+:105AE00099B008400090616815460888EF4A9042D6
+:105AF00006D0009A002A06D0EB4A521E104202D06D
+:105B0000012019B0F0BD009A10430880002D12D07A
+:105B1000002028702178EA1C0027681C01920B00E5
+:105B200010F072FD10F30E16233A59616F3CB4B0B9
+:105B30008AB8F2F1F0F320780B28EBD00420E0E7EC
+:105B400002212970A1890170090A4170032097E0A0
+:105B500004212970A1890170090A41700198E18925
+:105B60000170090A417005208AE006212970A18987
+:105B70000170090A41700199E2890A70120A4A709B
+:105B8000218A0171090A4171A28AE81DA16910F0F8
+:105B9000CCFAA08AC01D73E0082129702178082959
+:105BA00001D110212970A1890170090A4170019861
+:105BB000E1890170090A41700520308020466A1D84
+:105BC00002A91030FDF799F800287DD16946308888
+:105BD000097A401854E00A212970A1890170090A44
+:105BE000417003200BE00C212970A1890170090A82
+:105BF00041700198E1890170090A417005203080E7
+:105C00009CE0A08984464000401C81B230888842D4
+:105C10005AD3052958D30E202870002008E02369A4
+:105C200042009B5A521953701B0A401C937080B259
+:105C30006045F4D33180B9E09A48417A002973D0A5
+:105C4000491E4172217B4068C9004518A98828680F
+:105C5000082240180838216910F067FA02216846C6
+:105C600001710021417128680390A988684601816B
+:105C7000002101A8FFF78CFB0020A880002E00D097
+:105C8000308093E0297880221143297029784022BE
+:105C90001143297029788909890112312970A18954
+:105CA0000170090A4170E289E81C216910F03DFA8F
+:105CB000E089C01C3080287841063FD5C00975D0E6
+:105CC00001216846017200E02CE000214172318818
+:105CD000091D81810495E189019808180590001D2E
+:105CE00006907048017A68460177002102A8FFF704
+:105CF0004FFB074630880C303080022F06D0002F33
+:105D000054D065E03DE033E01CE05EE06548694664
+:105D1000097F4268CB00D218037A994202D2918857
+:105D2000002902D0042753E02FE0417A491C417238
+:105D30001560308890800020308049E06168A0893B
+:105D4000888033E029788909890116312970A18971
+:105D50000170090A41700198E1890170090A4170D6
+:105D6000228A681D616910F0E0F9208A401D46E72B
+:105D700028788009800118302870207B6870022004
+:105D80007EE760680188090401D4052720E0C08807
+:105D9000A189884201D006271AE01E202870012020
+:105DA0003080606801884904490C0180009800280F
+:105DB0000ED03C4800220088A1688300032007F031
+:105DC000D9FA61682078887007E0002030800327C6
+:105DD0006068009902888A430280384691E6FFB5E0
+:105DE0009FB0289D0E46002805D0172803D82A8882
+:105DF0002E4B9A4202D1072023B0F0BD32785306D1
+:105E000001D4D20901D00820F6E700226B461A71AE
+:105E10005A7114463278431E1D939BB2189303ABFC
+:105E20001A939706CB1CBF0E1B93821E711C3B005E
+:105E300010F0EAFB209011EE66EE74EEB0EED4EEB8
+:105E4000EDEEECEEEBEEEAEEE9EEEEEEE8EEE7EE8E
+:105E5000E6EEE5EE90EE05287CD10421684601715E
+:105E6000A9780172F078B278010211436846418145
+:105E70003179417170788006800E0C282ED009DCB3
+:105E8000801E030010F0C0FB0919661C6621662401
+:105E90006627660012282AD00ADC0E2821D0102896
+:105EA000DAD121E00C090020FF710000FFFF0000A3
+:105EB00016281FD01828CFD11FE02878800701E0CE
+:105EC00028784007002845DA45E128780007F9E7F7
+:105ED0002878C006F6E728788006F3E72878400699
+:105EE000F0E728780006EDE72888C005EAE728886B
+:105EF000C004E7E728888004E4E728884004E1E755
+:105F00002A78920726D50328A6D105206A46107163
+:105F1000487809780002084310811CE12978490774
+:105F2000F0D5062816D3717890B2012902D0022943
+:105F300092D101E0022100E01021189106216A4669
+:105F400011710021118102AF189AB11C0237921C05
+:105F50001B921AE0B3E04A780B7812021A433A8097
+:105F6000801E891C1790BA1C1A911898FCF79FFE86
+:105F70001A991898189A091817986B46801A1A894E
+:105F800080B2521C1A811B9ABF1D8242E3D900289D
+:105F900086D1E0E028780007B4D51D98694682B222
+:105FA0000720087100200881701C0A3111E0437835
+:105FB00007781B023B430B80C37887781B023B4367
+:105FC0004B806F463B89121F5B1C001D92B23B81C8
+:105FD000091D042AEBD2002A71D1BCE02978C90638
+:105FE0006DD502286BD308206946087100204881CE
+:105FF00070780872844692B2B01C1A9919E089E050
+:1060000090E07EE067E05BE030E025E019E013E03F
+:10601000BCE0437807781B023B430B80831C4B603A
+:106020006346D21A6F467B8960445B1C92B27B81C7
+:1060300008319445EDD9CEE7287880063FD509226E
+:1060400003E0287840063AD50A2268460271AA88F9
+:106050000281189A428107E0287800062FD50B208C
+:106060006A46107118981081039174E02988C90557
+:1060700025D5022823D30C206946087100204881C9
+:1060800070780872844692B2B01C1A9914E0437872
+:1060900007781B023B430B80C37887781B023B4386
+:1060A0004B80031D4B606346D21A6F467B89604468
+:1060B0005B1C92B27B8108319445E8D98BE763E0A1
+:1060C0002988C90460D501285ED10D216846017177
+:1060D000A98801813FE02988890455D5052853D333
+:1060E0000E2269460A71AA880A811B99401F4A78C4
+:1060F000097812020A4369464A818881701D04901A
+:1061000029E0298849043FD501283DD10F2069465F
+:10611000087120E02A88120436D44A780B781202DB
+:106120001A43EA8003282FD332789206920E1B2A54
+:1061300026D011226B461A712A880123DB031A43E9
+:106140002A804A78097812020A4369460A81C01EE9
+:1061500048811B98039030788006800E1B2809D058
+:106160001D2807D00320229907F0A9F92888C00B21
+:10617000C003288001A82199FFF70AF920463BE6D1
+:1061800010226B461A71DCE70724F7E70824F5E7CD
+:1061900000B597B0032806D16A461070019100211E
+:1061A0006846FFF7F5F817B000BD000010B58B7812
+:1061B000002B11D082789A4207D10B88002B0BD08C
+:1061C00003E08B79091D002B08D08B789A42F8D117
+:1061D00003880C88A342F4D1002010BD812010BD9B
+:1061E000052826D0002A02D0012A0DD102E0098814
+:1061F000090501E009888904890F07D0012918D011
+:10620000022909D003290ED081207047002A01D02D
+:10621000032070470220704703280AD0042808D0C2
+:10622000002804D007E0042803D0022803D005206A
+:106230007047002070470F20704770B513880546DF
+:1062400014460B8018061DD5FE481022807AA842FD
+:1062500003D813430B80002070BDA06893430078DF
+:10626000E840C007C00E03430B802078A178800768
+:10627000800D0843F4490FF0D2FFA0686943081865
+:10628000401C70BD906870BD37B569468B8813801F
+:1062900019061BD5EB4C0125A47A9168844209D8D4
+:1062A000FE280FD1D80602D5A5406D1E00E00025BE
+:1062B0000D7007E085400C78DB06DB0FAC438340B4
+:1062C0001C430C7010881021884310803EBDF8B527
+:1062D0000746C81C80080E468000B04201D08620C8
+:1062E000F8BD082A01D90E20F8BDD64D00202E6039
+:1062F000AF802881AA723446E88016E0E988491CFC
+:10630000E980810610D48007A178800D0843CE492A
+:106310000FF085FF206800F0BAFA2989401880B292
+:106320002881381A8019A0600C3420884107E5D4F0
+:106330000020F8BDFFB589B09F041646139DBF0C21
+:106340000193099800F095FA04000AD0207800061D
+:1063500009D5BC48817A0A98814204D887200DB0BB
+:10636000F0BD0120FBE7224669460A98FFF765FF6A
+:106370000690002069460872052D14D0012221469E
+:106380002846FFF72DFF0028E9D1207840060AD5DE
+:10639000022168460172099981810188C1810682C2
+:1063A0004782129805900198000404D500273E46C4
+:1063B0000125079709E02078A1788007800D084320
+:1063C000A14907900FF02BFF0D46019840040AD514
+:1063D0000798A84207D12088E1788005800F000245
+:1063E0000843B04201D3AE4201D90720B7E7B8193C
+:1063F00080B20190A84201D90D20B0E76846007A2A
+:10640000002804D002A8FDF706F90028A7D10798B4
+:10641000A8420BD1208803210902884301998905EC
+:10642000890F0902084320800198E0701498002821
+:1064300000D007801298002815D006983A46801997
+:1064400012990FF072FE224669460A98FFF7F5FE90
+:1064500069460888102188436946088022460099C9
+:106460000A98FFF711FF002079E7FFB5754D0C2260
+:10647000E8882968504383B00C180D9F724905982D
+:106480000FF0CDFE0091049800F001FA29682A89E6
+:106490008E46611A0C310918944651188AB2A9889F
+:1064A000914202D8842007B0F0BD6A46168A3206AF
+:1064B00003D5B20601D58520F5E7EA88521C92B2D1
+:1064C000EA800E9B002B00D01A80B20601D5A7608F
+:1064D00006E0604480B22881091A70460818A0605E
+:1064E0002246FE200499FFF7CFFE0598A070009881
+:1064F000E07020880599800889058000890F08438D
+:1065000003210902884300998905890F090208437C
+:1065100004210843208003988078A07103980088A4
+:10652000A08000202073310601D5AC7A00E0012460
+:10653000B10600D5002700260EE0052100200191BC
+:1065400002900097E88831460C9B069AFFF7F2FE0E
+:106550000028A8D1761CF6B2A642EED30020A2E70E
+:10656000F1B5009800F085F9060002D00025009CE6
+:1065700014E00120F8BD204600F07BF907460078C2
+:1065800031498007820DB87810430FF048FE386813
+:1065900000F07DF94019641C85B2A4B22948C18875
+:1065A000601E8142E7DC00992648491EC1800189AE
+:1065B000491B018100203070F8BD002804D0401E26
+:1065C00010809170002070470120704710B504467C
+:1065D00001881C48C288914201D3822010BD006806
+:1065E0000C22514342189079A07290882081108823
+:1065F000D1788005800F00020843A081A078211D7A
+:10660000FFF71BFE20612088401C2080E0800020D6
+:1066100010BD012101827047F7B50546002084B006
+:10662000C043108068681746817868468170686842
+:1066300001886846018000218171288A2C88A04247
+:1066400005D303E0180900200102000004462C8253
+:1066500035E0288A401C2882301D6968FFF7A6FDB6
+:1066600000282AD139889248814201D1601E3880A1
+:106670006888A04228D33088F1788005800F000216
+:10668000084302906946301DFFF790FD002814D1A1
+:106690006989874881421BD0002231460598FFF75F
+:1066A0009FFD002809D16A890298824205D1E968D4
+:1066B000B0680FF00DFD00280AD0641CA4B220467B
+:1066C00000F0D7F80600C4D1641E2C828220EAE6CE
+:1066D0007C80B079B871B088B8803078B1788007A4
+:1066E000800D084378810298B8813946287A32466D
+:1066F0000831FFF7A2FD38610020D4E6FFB585B070
+:106700001C460F46059800F0B4F8050009D028781B
+:10671000000608D56748807AB84204D8872009B0B7
+:10672000F0BD0120FBE707982A468605B60D6946AD
+:106730003846FFF782FD07460E98052816D000223E
+:106740002946FFF74DFD0028E9D1287840060DD5F0
+:106750000121684601710599018101884181868185
+:10676000C48101A8FCF757FF0028D8D12888AA784F
+:106770008107890D11438005800FEA7800021043DC
+:10678000079A964207D04C4A914204D3611E814237
+:1067900001DD0B20C3E7864201D90720BFE7801B3C
+:1067A00082B2A24200D922461098002800D002806E
+:1067B0000F98002802D0B9190FF0B7FC0020AEE7FF
+:1067C000F8B51D4617460E4600F053F8040008D0F1
+:1067D0002078000607D53748807AB04203D8872052
+:1067E000F8BD0120F8BD224639463046FFF725FDA9
+:1067F000002D0BD02078A1788007800D08432E490A
+:10680000884201D2012000E0002028700020F8BD5D
+:10681000F8B51E4617460D4600F02BF8040008D0C8
+:106820002078000607D52348807AA84203D887201D
+:10683000F8BD0120F8BD224639462846FFF724FD61
+:10684000FF2E14D02588A178A807800D08431A4987
+:106850000FF0E5FC002E03D1FF31FF31033189B287
+:10686000A170A80880008905890F084320800020B6
+:10687000F8BD1049CA88824207D3002805D00C22EF
+:10688000096850430C38081870470020704703B55A
+:106890000846694609888A0607D4090604D50549C9
+:1068A000897A4143491C88B20CBD00200CBD000010
+:1068B000FFFF00001809002001020000F8B507786A
+:1068C0000D460446012F19D0072F02D00C2F19D1E5
+:1068D00014E0A068216906780B2E0BD0052006F085
+:1068E000EEFD052E0ED0782300220520216906F04A
+:1068F00041FD07E0782300220620F8E70520216902
+:1069000006F0DDFD002D0ED000202870294620461F
+:1069100004F0AEF9FE482978C05D884201D1032019
+:10692000F8BD0220F8BD0021204604F0A1F90020A6
+:10693000F8BD70B50E460C462036317901208AB07C
+:106940001546002909D0012905D12978042902D149
+:106950000520107000200AB070BD6068019005A885
+:1069600002900D21C01C0FF03DFC032205A8A16878
+:106970000FF0DBFB01203071062069460870206AA9
+:10698000049029466846FFF799FFE4E770B50C4686
+:10699000154620310A790120062686B0002A2CD01F
+:1069A000012A28D12978042925D169681022A068F4
+:1069B00001F0B4F96868C07B000606D5D44AA06827
+:1069C0001023103A014601F09EF91022A168E068F8
+:1069D00001F0A4F9A068C07B000606D5CC4AE068A7
+:1069E0001023103A014601F08EF92E70A0686860FD
+:1069F000E068A860002006B070BD60680190C448DF
+:106A0000203802900120087168460670206A0490C0
+:106A100029466846FFF752FFEDE7027B032A06D0BE
+:106A2000002224235A540B78092B02D003E00420BF
+:106A300070470A76CA61027B9300521C0273C150F0
+:106A400003207047F0B50E4615460C462036024628
+:106A500031790120072393B000290CD0012924D0DB
+:106A600002292ED0032904D12978042901D12B70C1
+:106A7000002013B0F0BD01203071606800280DD0F7
+:106A8000A1690B7060684860206988606069C860AF
+:106A9000206A08621046FFF7C0FFEAE70620287068
+:106AA000206968606069A86009E029780629E0D15A
+:106AB0000220307104202870954820386860032037
+:106AC000D7E729780429D4D1A08910280AD9103809
+:106AD00080B2A081A1681023091805A86A6801F096
+:106AE00012F923E010282FD0C2B21020801AA1681A
+:106AF0000DAF1190C0190FF018FB11980006000E91
+:106B000006D0401EC1B28020785438460FF06AFB90
+:106B1000626910230DA909A801F0F5F8102309A94D
+:106B200005A86A6801F0EFF80320307160680190F1
+:106B300005A80290062069460870206A049029463C
+:106B40006846FFF7BBFE94E710232269A168E2E7DD
+:106B5000F0B50E460C4620363179012006278FB05D
+:106B6000154600290BD0012932D0022905D12978F8
+:106B7000042902D10820107000200FB0F0BD217D43
+:106B800008A8CA07D20F02718807C10F08A80171AF
+:106B90006846027041700722801CE1680FF0C5FA58
+:106BA00002A80722013021690FF0BFFA6068059042
+:106BB0000AA8069010236A46A16801F0A4F80120F3
+:106BC000307168460774206A0890294604A820E0BE
+:106BD00029780429D1D1062205A8E1690FF0A5FA88
+:106BE00006A806220230A1690FF09FFA0020089043
+:106BF0006068019009A80290102305AA696801F055
+:106C000082F80220307168460770206A0490294695
+:106C10006846FFF753FEB0E770B50D460C462035C9
+:106C2000297901208CB01646002909D0012905D107
+:106C30003178042902D10920107000200CB070BDF9
+:106C40006068019006A802900822E1680FF06DFAD2
+:106C5000082208A8A1680FF068FA01202871062010
+:106C600069460870206A049031466846FFF726FEA0
+:106C7000E4E770B50D460C462035297901208CB02B
+:106C80001646002908D00129D8D131780429D5D158
+:106C90000A2010700020D1E76068019006A80290D9
+:106CA0000822A1680FF041FA002008900990012005
+:106CB0002871062069460870206A049031466846AB
+:106CC000FFF7FCFDBAE730B50B4620331C790120F5
+:106CD0008BB0002C09D0012C05D11178042902D1E8
+:106CE0000B20107000200BB030BD4868019005A843
+:106CF00002908C6868462578057564784475CC6880
+:106D0000257885756478C47500200690079001E0A9
+:106D10002867010008900120187106236846037057
+:106D2000086A049011466846FFF7C8FDDBE770B5B6
+:106D30000C462034034625790120002D0AD0012D70
+:106D400014D0022D05D111780A2902D10C2010701F
+:106D5000002070BD01202071C868052202704A68B9
+:106D60004260F84A8260921CC2600BE015780B2DDD
+:106D7000EFD102202071C868042404705268426078
+:106D80008A688260096A016201461846FFF745FE7B
+:106D900070BD30B5011D02463132947803258379E8
+:106DA000ED432C4323408371DB070DD04B7954799D
+:106DB00023404B710B79127913400B718278C9789B
+:106DC0008A4200D9817030BD00224A710A71F5E70C
+:106DD000F7B50C4686B00020694626460870203676
+:106DE000317901271E2015461F2977D24B007B449D
+:106DF0009B885B009F441E0017023E0256026902F8
+:106E000088029A02D102F5022E03590371037F030F
+:106E1000AE03C303CC03F7031A0464049A04AB045F
+:106E2000DF04FE0410052A0565059B05C6058305DC
+:106E300087058B056069002802D0007813287DD073
+:106E4000A0680590002849D0012168460170206A99
+:106E500004900321684601710A214171E0690290A2
+:106E600020790028EFD0059909780029E7D00C296E
+:106E700064D20B000FF0C8FB0CFD1A4B90B5E8FC78
+:106E8000FBFAF9F807FD022828D16069002802D032
+:106E90000078082852D1022168460170206A0490C7
+:106EA00005984178684601710021B9E20620216AFF
+:106EB00006F005FB20790728E6D1606900F050FF55
+:106EC00002280CD0606900F04BFF042807D06069ED
+:106ED0000028B8D000780128D6D103E01BE2616910
+:106EE0000120087005980079C11F0A2901D30A20E2
+:106EF00050E06169072288706069059930300FF0B1
+:106F000014F90120307161690320087034E007280A
+:106F1000BAD16069002896D001780929B4D10599C1
+:106F2000C978890707D1059949790029DFD10599E1
+:106F300089790029DBD105994A7900E04EE20146C2
+:106F400020314B7D9A43D2D1059A8B7D92799A4319
+:106F5000CDD1059A1279D31F0A2BC8D20979914253
+:106F600036D80722C01C05990FF0DFF801203071D8
+:106F700061690A200870032069460870206A04903D
+:106F80006069313001906069001D029060691C30B9
+:106F90000390A1E22076F2E311288DD1606900F020
+:106FA000DFFE042804D0606900F0DAFE0B2893D1DC
+:106FB0006069059910223730491C0FF0B6F86069F6
+:106FC000017804297CD12421095C8278914201D97D
+:106FD0000620DFE70521017003203071684601704B
+:106FE000E2E3112894D1606900F0BAFE062804D0CB
+:106FF000606900F0B5FE0C288AD1E068002813D043
+:107000002069002810D060690178062910D00D2170
+:1070100001706069059910225730491C0FF085F8FE
+:107020006069573009218CE100206946087072E1DF
+:10703000072101706069059910224730491C0FF043
+:1070400074F860694730EDE70228F0D1606900F01C
+:1070500087FE0028EBD0606900F082FE0128E6D0B0
+:10706000606900F07DFE05E0B1E08DE06CE02AE0B3
+:107070000AE0D6E00828DAD00521684601710598B3
+:1070800041786846417146E11128D0D160690028F5
+:10709000CDD001780E29CAD1C16A4078022810D01B
+:1070A0000020142250431430085805991022491C1E
+:1070B0000FF03BF80520216A00F040FE0F205EE053
+:1070C000F1E10120EDE70B28B1D160690028AED0D5
+:1070D00001780F29ABD1C16A4078022826D0002060
+:1070E000142250430C300958059842780A70807871
+:1070F00048706069C16A4078022819D000201422C3
+:1071000050431030085805990822C91C0FF00DF89B
+:107110000520216A00F012FE60694178022909D039
+:1071200000220832825C5208520073E00120D7E747
+:107130000120E4E70122F4E7012100E00021083109
+:107140004254BCE30267010011289CD16069002809
+:1071500099D00178102996D1C16A4078022811D0BF
+:107160000020142250431830085805991022491C59
+:107170000EF0DBFF0520216A00F0E0FD11206169BF
+:107180000870B4E30120ECE7082884D16069002886
+:107190009DD00178112997D10599C06A497801706D
+:1071A00060690599C06A0622401C891C0EF0BDFF6B
+:1071B0000520216A00F0C2FD60694178022904D0EF
+:1071C00000220832825CFD2323E00122F9E7112826
+:1071D000BBD160690028BBD001781229B5D1C16A42
+:1071E0004078022819D00020142250431C3008583F
+:1071F00005991022491C0EF098FF0520216A00F025
+:107200009DFD60694178022909D000220832825C24
+:10721000FB231A40022991D18EE70120E4E70122E5
+:10722000F4E70720B6E6287801288ED160696968FE
+:1072300014221C30F9F7C8FF6069017F002901D0D2
+:107240002176ACE30178032901D0032037E002273F
+:10725000C77081794907490F8171017A4907490F40
+:107260000172417A4907490F41726069FFF791FD48
+:10727000377196E228780F28E3D107206946087015
+:10728000216A049191680291694608716169072237
+:10729000C91C02980EF049FF6169042008700020A3
+:1072A0003071BBE028780328CBD1606901780529CB
+:1072B000696807D0082247300EF037FF042030718C
+:1072C00005206FE208225730F6E728780328B8D166
+:1072D000606901780529696811D008224F300EF0E5
+:1072E00024FF052030716069006A00280AD002205E
+:1072F0002870002028716069006AA860F9E00822FF
+:107300005F30ECE704204DE22878022899D12879F3
+:10731000002801D0207642E36069A96801626069B3
+:10732000002901D1F949016206200BE228780F28D3
+:1073300087D1A868E0616069017805292BD04730C2
+:1073400007213171E16802220A706269126A4A609B
+:10735000886060693030C8606069C01C086162691B
+:10736000087D926A400812784000D207D20F10437D
+:1073700008756269926A521C8A61FD221040626936
+:10738000D26A1278D207920F104308756069C06AFA
+:10739000401CC86153E25730D2E728780828BAD198
+:1073A0006069017805291AD00B2101700720694610
+:1073B0000870206A0490E069029011200871029818
+:1073C0000321017051681022401C0EF0AEFE002116
+:1073D0006846FFF773FA00203071E06187E206210A
+:1073E000E3E728780F2896D1072069460870206ABD
+:1073F0000490A8680290112008710298042101707D
+:1074000061690A78072A0ED0002232710C220A70B4
+:1074100061691022401C47310EF087FE002168464A
+:10742000FFF74CFA63E21022401C57310EF07DFE4C
+:1074300000216846FFF742FA0A203071E168032014
+:1074400008706069006A48606069573088606069E8
+:107450004730F3E128780828A1D1606969681022D3
+:1074600037300EF035FE002801D0042092E5606927
+:107470000078072817D00A203071E16803200870CF
+:107480006069006A486060695730886060694730A9
+:10749000C860206A08620698FFF7BFFA074660696D
+:1074A000FFF777FC6BE208207AE1287809289AD167
+:1074B0000B20307161696868897810224018511A70
+:1074C0000EF090FE082069460870206A04906868F3
+:1074D000019060698078087268E129780D29BBD134
+:1074E00061698979C90703D00C20307109203EE019
+:1074F0003071032770E228780E28ADD1606914221C
+:10750000291D1C30F9F760FE6069018DC06A417267
+:10751000090A817260698178C06AC1716169CA6A49
+:10752000081D117AC909C9011172437962691943A9
+:107530008378D26A9B079B0F012B00D00023007930
+:107540009B01C00003431943117260694078012810
+:1075500076D0B4E160694178022901D0012100E0D0
+:1075600000210831405CC00707D00E20EAE06946E0
+:107570000870206A1146049019E11320B8E72878B2
+:107580000F2894D1A868E0610F2030710520EEE744
+:10759000287803288BD16069C16A4078022801D01D
+:1075A000012000E000201422504310300858082227
+:1075B00069680EF0BAFD10203071E168062022697A
+:1075C00008706069406A48606069C36A4078022850
+:1075D00001D0012000E00020142778431030185813
+:1075E000CA6088602BE128780C2886D16069C26A5D
+:1075F0004078022801D0012000E0002014214843F7
+:107600000C30105802230932696800F07CFB11200D
+:107610003071E168052008706069006A486060693F
+:10762000C06A093088603948001F07E128780B28B4
+:10763000A7D161694878CA6A022802D0012001E016
+:1076400059E1002014235843143010588A7869688F
+:107650000EF06BFD60694178C26A022901D00121F8
+:1076600000E00021142359431431525881785018F6
+:107670001022511A0EF0B6FD072069460870206AE4
+:107680000490E069029011200871029806210170AF
+:107690006169CA6A4978022901D0012100E000210C
+:1076A00014235943143151581022401C0EF03DFD53
+:1076B00000216846FFF702F90020E06112206FE028
+:1076C00028780F2891D1072168460170206A04901C
+:1076D000906802900B2268460271029801706169FD
+:1076E000CA6A4978022901D0012100E0002114234F
+:1076F00059430C3151580A78427049788170616958
+:10770000CA6A4978022903D0012102E00867010012
+:10771000002114235943103151580822C01C0EF087
+:1077200004FD00216846FFF7C9F826E76069417843
+:10773000022901D0012100E000210831405C8007CE
+:1077400003D5142030710A2011E71620D0E62878DE
+:107750000F287AD1A868E061072069460870206A7E
+:107760000490E069029011200871029808210170CC
+:107770006169CA6A4978022902D0012101E011E158
+:10778000002114235943183151581022401C0EF087
+:10779000CCFC00216846FFF791F80020E06115203D
+:1077A00030710A2069460870206A049029466846AC
+:1077B000FFF784F82BE028780F2846D10720694688
+:1077C0000870206A0490906802900820087102985E
+:1077D0000921017061690622C969097841706169EE
+:1077E000801CC969491C0EF0A0FC00216846FFF707
+:1077F00065F8AAE760694178022901D0012200E01A
+:1078000000220832805C400703D51720C8E70746EE
+:10781000B5E0012953D070E028780F2815D1A86869
+:10782000E06118203071E168052008706069006A25
+:1078300048606069C06A09308860F848C860206A9A
+:1078400008620698FFF7E9F8E1E76FE028780B286F
+:107850006CD16069C16A4078022801D0012000E043
+:107860000020142250431C300858102269680EF082
+:107870005CFC072069460870206A0490E069029069
+:107880001120087102980A2101706169CA6A497859
+:10789000022901D0012100E00021142359431C31A9
+:1078A00051581022401C0EF040FC00216846FFF7A2
+:1078B00005F80020E0616069407801281DD1192099
+:1078C00016E660694278022A09D000210831411881
+:1078D000097800290DD0CA0703D00E2106E0012146
+:1078E000F4E7890701D5102100E01221017000277B
+:1078F00072E0012A01D00D20FAE51C20F8E51D20D8
+:1079000030710B2033E62978102948D1F0E5606901
+:107910000178012943D0082941D00021317100F0BC
+:1079200019FA0C2069460870206A049037E028781C
+:107930000F2805D01020107003271B2030714BE05A
+:10794000072168460170206A0490A868029002210D
+:1079500068460171029805210170217E4170002165
+:107960006846FEF7ABFF0B2168460170206A049061
+:1079700029466846FEF7A2FF07461B203071012FFB
+:107980000DD029E0012168460170206A049004218D
+:1079900068460171217E41710020207612E0207E30
+:1079A00000280FD06169132008701A2030710A2056
+:1079B00069460870206A049029466846FEF77EFFF3
+:1079C000074609E06069002801D01421017068466B
+:1079D0000078002800D021E5384609B0F0BDF7B5A1
+:1079E0000F4620373879012686B00C46002804D08F
+:1079F000012828D002281CD197E02079012804D042
+:107A0000022811D0032814D10AE0A0684078012888
+:107A10000ED10620216A05F02CFD00287FD10CE054
+:107A2000A1681320087008E0A0684178022901D0FD
+:107A3000052674E00078082871D1012038710A20E9
+:107A40006946087033E0089800780F2867D107214D
+:107A500068460170206A049008988568029522792A
+:107A60000220012A04D0022A29D0032A57D10FE08C
+:107A70000646684606710B202870207B00214007CF
+:107A8000400F68706846FEF719FFA068067045E071
+:107A900006466846067105202870207B6870002124
+:107AA0006846FEF70BFF3E710B2168460170206AA5
+:107AB000049068460899FEF701FF06462FE06846E5
+:107AC000017101202870207C6870607CC007C00FA5
+:107AD000A870A07C4007400FE870E17C2971C007C6
+:107AE0001FD0207D4007400F6871607D4007400F28
+:107AF000A87100216846FEF7E1FEA068072229462A
+:107B000030300EF012FBE068017AA068203001717D
+:107B1000A16828798870A16809200870002630467D
+:107B20005BE70020A8716871E3E7A1681420087082
+:107B3000012168460170206A0490042168460171A1
+:107B4000217B41710021FEF7B9FEE7E7F0B585B072
+:107B50000F4605460124287B800040198038C66FF7
+:107B60003078411E0A290AD22C498000323140184F
+:107B70008038C36F3A463146284698470446002C61
+:107B800001D0012C11D1287B401E0006000E287365
+:107B900001D00324DFE70D2069460870306A0490A5
+:107BA000002101966846FEF789FE032CD3D02046BB
+:107BB00005B0F0BD70B515460A4604462946104684
+:107BC000FFF7C4FF0646002C0FD0207814280CD1F4
+:107BD000207E002806D000202870204629460C3040
+:107BE000FFF7B4FF204600F0B5F8304670BD70478F
+:107BF00010B5012903D0022901D0052010BD417024
+:107C000000F0A8F8002010BD002809D0027E002A4C
+:107C100006D00A4601460C31CCE700000667010099
+:107C20000120704730B5044687B00D46062005F0A8
+:107C300046FC2946052005F042FC2078142805D092
+:107C40000020694608702046FFF7DEFF07B030BD10
+:107C50007FB50E4600216A4611730178092903D0C9
+:107C60000A2903D0002407E0446900E08468002C5E
+:107C700002D0217E002912D0154601462846FEF783
+:107C8000CCFE032809D1324629462046FFF792FF51
+:107C90006946097B002900D0042004B070BD254648
+:107CA0000C35EAE700B50023012285B005280CD089
+:107CB000062808D1684602700491022101714371BF
+:107CC0000021FEF7FBFD05B000BD6846027004917F
+:107CD0000271F4E710B590B00C4605216A461170A8
+:107CE000019022480290001D03900AA96846FFF700
+:107CF000AFFF002805D1102220460B990EF015FA8F
+:107D0000002010B010BD30B505E05B1EDBB2CC5CCE
+:107D1000D55C6C40C454002BF7D130BD10B50024A5
+:107D200009E00B78521E5B00234303700B78401C64
+:107D3000DC09D2B2491C002AF3D110BD70B50C4643
+:107D4000054605F0BCFB782300222146284605F0B5
+:107D500011FB70BD4178012900D0082101707047E6
+:107D6000002801D0007870470820704700670100A4
+:107D700038B50446002069460870204609F053FDD6
+:107D8000002803D1FBA1A3200EF04DFB204609F0F3
+:107D900099FC002803D1F7A1A8200EF044FB684607
+:107DA000007838BD70B5F84D002428462C77203077
+:107DB0008471C47101F09AF928464038047020306B
+:107DC0008473847484772C75AC7170BD10B50C46C7
+:107DD000EE4982888A8042884A8000780870084686
+:107DE0000E38847009F050FC08F0FDFFFFF7DAFF51
+:107DF00020460BF013F8E449A8310846813809F011
+:107E0000ADFEE2480CF021FBE0480A3808F0FEFF26
+:107E1000002803D0D7A1C5200EF005FB01F066F9BC
+:107E200010BD7CB50E461D46144601A909F008F8A0
+:107E3000002807D10AF091FB022803D1D248007D27
+:107E4000002801D001207CBD01988030807C09F0A1
+:107E50004DFC00280CD0684609F052FC0028F2D0F6
+:107E6000002C03D009F011FCA04206D200207CBDFA
+:107E7000C0A1C7480EF0D7FAF8E7009809F0D8F883
+:107E80003146009809F0DBF8E2B22946009809F083
+:107E9000F0F909F045FC002804D1BD48B5A11E3019
+:107EA0000EF0C1FAB94C00250E3C6068A030417953
+:107EB000002902D045710BF0D8F860688030458306
+:107EC000C0E730B40179002904D0012907D030BCC3
+:107ED00000207047831D42880488022103E0428805
+:107EE0000488831D0121204630BC9AE7F8B51D4661
+:107EF00014460E4607460AF030FB022803D0A2487B
+:107F0000007D002823D0A1480E3841684988398077
+:107F100040688030807C09F069FD002804D153203E
+:107F200094A1C0000EF07FFA684609F069FD0028B0
+:107F30000DD0009809F0BAF83070022808D0012856
+:107F400006D093488BA167300EF06DFA0020F8BD83
+:107F50002946009809F0A4F92080002804D1552072
+:107F600084A1C0000EF05FFA09F05DFD002804D185
+:107F7000874880A160300EF056FA0120F8BD38B570
+:107F80000446831D821C6946FFF7B0FF00280DD010
+:107F90000020607168460078012808D0022806D0C9
+:107FA000FF2074A101300EF03EFA012038BD20718F
+:107FB000FBE7F8B50AF0D1FA744D734C0E3D022878
+:107FC00002D0207D00287DD0207F0026102818D1E7
+:107FD000A079002803D067A16E480EF024FA6868E3
+:107FE00001464030827F92070BD526724988618115
+:107FF000C17F2173018CE181408C20820120A0711E
+:108000002677614F203FB87C00285ED168686946BA
+:108010008030807C09F007FC002805D0694668782C
+:1080200009784018687004E05A4852A119300EF0DF
+:10803000FAF9207D00283AD06868418852484038D3
+:10804000806D4088814204D00F204AA1C0010EF00B
+:10805000EAF968688030807C09F0C8FC002804D107
+:108060004C4844A124300EF0DEF909F0EEFC002863
+:108070001DD068688030807CFFF77AFE69784018F0
+:10808000687041484038806D4030417A01290DD1F7
+:108090002670696849886180807A20710120B877EC
+:1080A000207F102801D0282800D1267726756978EE
+:1080B00000290AD06868428833484038C286018760
+:1080C000012000E001E0B8746E700AF029FA00287F
+:1080D00005D1207D002802D0A878FAF7F9F8F8BD7C
+:1080E000F8B50446FFF765FF274D0026203DA87E22
+:1080F000002808D0667010202070E87EA070287FCD
+:10810000E070AE769AE0204F403F3878002808D0E3
+:108110002C22B91C20460EF008F80E2020703E706C
+:108120008CE0A87B184F002815D0387F102808D085
+:10813000282806D0002804D0FF200EA1C2300EF05F
+:1081400072F90120E070E87BA070287C60700F203D
+:108150002070AE7372E00121204609F099FC0028DE
+:108160001AD0387D002857D10021204609F090FC14
+:10817000F8BD00007372635C6C6C5F6374726C2E8C
+:1081800073302E630000000094090020720000206C
+:108190004F02000062070000A97CF8480090F848F0
+:1081A000002910D0017805290DD2491C0170667094
+:1081B0000D202070012028750622A01C00990DF0CA
+:1081C000B4FFAE743AE0EE480670B879002812D0D9
+:1081D000387F002804D00120EA4940020EF023F93C
+:1081E00066700120E54920700A221431A01C0DF0B0
+:1081F0009CFFBE7122E020460CF083F800281DD1C0
+:10820000A87C002802D0DE480178CEE7A87F0028AD
+:1082100002D0387D002801D00020A9E7387F00284F
+:1082200003D0D849D8480EF0FEF866700A202070B6
+:1082300006223946A01C0DF078FFAE77012097E7A3
+:108240004EE710B5CD4C343C2178002904D01321E1
+:108250000E2000F052FF10BDC9490088091D08F02A
+:10826000EFFD002801D0022007E0C5484068014624
+:1082700020318A79012A02D00C20207105E00022E9
+:108280002271097E21724088E080012060711321F3
+:10829000E1700E21A170207010BDB84810B53438BF
+:1082A0000178002904D024210E2000F026FF10BD03
+:1082B000012101702422C2700C220271417110BD93
+:1082C00070B5AE4C0546343C2078002804D03E21E1
+:1082D0000E2000F012FF70BD0AF03FF9002808D10F
+:1082E0000AF03EF9002804D1A4480C30007F002891
+:1082F00001D00C2003E0287809F033FD0020207124
+:10830000012060713E21E170207070BD9B4810B566
+:1083100034380178002904D03C210E2000F0EDFE15
+:1083200010BD00210171012141713C22C270017018
+:1083300010BDF8B5914C343C2078002804D03B2186
+:108340000E2000F0DAFE13E70020A0710AF005F914
+:108350008A4E01250C36022802D0307D002840D0FC
+:10836000874F694678688030807C09F073FA00286E
+:1083700003D1844985480EF056F8307D002806D098
+:10838000A06D4030407A002801D0012600E0002690
+:1083900078688030807C09F029FB002804D17B4874
+:1083A000784908300EF03FF809F04FFB684031463D
+:1083B000014316D07968FD2249882181217E400041
+:1083C000490849003143114001432176684600784D
+:1083D000002802D00420014301E0FB200140217667
+:1083E000A5710020207165713B20E0702570BFE60B
+:1083F00010B5624C343C2078002804D00E21084689
+:1084000000F07BFE10BD5E4906220831A01D0DF074
+:108410008CFE00202071012060710E21E17020701F
+:1084200010BD70B5554C0546343C2078002804D06A
+:1084300038210E2000F061FE70BD50480C30007FE6
+:10844000002807D00C202071012060713821E170D4
+:10845000207070BD287809F072FC28780CF05BF968
+:108460000020F0E770B5454D0446343D28780028DB
+:1084700004D037210E2000F040FE70BD3F480C3084
+:10848000007F002801D00C200AE03D4E2188706852
+:108490004088884203D10AF060F8022807D0022001
+:1084A0002871012068713721E970287070BD7168EA
+:1084B0007F2020310876487600208876A2788A715D
+:1084C000E278CA7122790A72EAE710B52B4C343C83
+:1084D0002078002804D039210E2000F00EFE10BDB7
+:1084E0000AF03BF8032808D00AF03AF8032804D031
+:1084F00022480C30007F002801D00C2003E01F49E7
+:1085000000202C31C8712071012060713921E17087
+:10851000207010BD70B5194C0646343C20780028F8
+:1085200004D03A210E2000F0E8FD70BD0AF015F8E5
+:10853000032808D00AF014F8032804D00F480C30A0
+:10854000007F002801D00C2011E00C4D2C35E8797B
+:1085500008280BD20001001910223146683000F0C3
+:10856000D6FDE879401CE871002000E0072020716A
+:10857000012060713A21E170207070BD88090020EF
+:108580006400002074810000210200001708000030
+:10859000F8B5FA4E04463078002804D03D210E206C
+:1085A00000F0ABFDE4E5F5484030007F002801D045
+:1085B0000C2034E0F24D218868684088884203D15D
+:1085C00009F0CBFF022801D0022028E06F68648800
+:1085D000FD883A896800B988401C844218D3E9486C
+:1085E00041431046E84A50430DF019FE401EFF215A
+:1085F00080B2F531884200D90846844200D2204634
+:10860000691C401C0DF00BFE6D1C6843401E85B2BA
+:10861000E620C05D002800D1BD84F58000203071C7
+:10862000012070713D21F1703070A1E5F8B5D34C97
+:1086300005462078002804D035210E2000F05DFD8D
+:1086400096E5CE484030007F002801D00C2016E08F
+:10865000A878002801D0012804D1A888FF21F5318D
+:10866000884201D912200AE0C54F298878684088DD
+:10867000884203D109F071FF022807D0022020713F
+:10868000012060713521E170207071E57968002664
+:108690000846C0310E70AA884A800122A0300271BB
+:1086A000AA78012A00D000220A704079002801D05F
+:1086B0000AF0DBFC2671E3E770B5B04C0546207884
+:1086C000002804D030210E2000F017FD55E709F0F6
+:1086D00044FF002804D1A9484030007F002801D081
+:1086E0000C2003E028780AF0E0FB00202071012034
+:1086F00060713021E17020703FE770B59F4C0546F6
+:108700002078002804D033210E2000F0F6FC34E756
+:1087100009F023FF002804D198484030007F00284A
+:1087200001D00C2018E02978002911D00A290FD097
+:1087300014290DD01E290BD0282909D0322907D0A1
+:108740004B2905D0642903D0FF2901D0122003E072
+:1087500028460AF023FC002020710120607133219B
+:10876000E170207009E770B5844C06462078251D1D
+:10877000002804D032210E2000F0BFFCFDE6314677
+:10878000002009F0AEFA2870002805D17C480622A6
+:10879000314608300DF0C9FC012060713221E170D2
+:1087A0002070EAE670B5754C2178002904D031219B
+:1087B0000E2000F0A2FCE0E600214156012504292C
+:1087C00012D0002910D0081D0ED0001D0CD0001DA5
+:1087D0000AD0001D08D0001D06D00A3004D00A308F
+:1087E00002D01220207103E0084606F079FD657181
+:1087F0003120E0702570C0E6FEB5604C0746207859
+:10880000002804D025210E2000F077FCFEBD38881A
+:10881000694608F015FB594D01460020083500292E
+:1088200004D002212171286028710FE00098009E79
+:108830000A30019060360020B07105222846019967
+:108840000DF073FCB0790028F5D13888E0800E2057
+:10885000A0702520E070012060712070FEBD10B571
+:10886000464C2078002804D005210E2000F045FC5D
+:1088700010BD0020207108F008FFE08008F0D1FF53
+:108880002072012060710521E170207010BDF1B5EA
+:108890003A4C2034A07B002804D010210F2000F097
+:1088A0002CFC65E4354D4035A8790C2610270028AE
+:1088B00016D1287F002813D109F04FFE022824D1B9
+:1088C0002F4800994068098842888A421DD1014694
+:1088D000C0310A7A002A05D04030807F80070DD44D
+:1088E000E6730EE05E22125C920707D406220A723B
+:1088F000A0304079002801D00AF0B7FB2F77002084
+:10890000E07327740120A07332E40220F8E710B569
+:108910001A480178002904D00F210E2000F0EDFB49
+:1089200010BD00210171FF2181710021C943018126
+:1089300013490E310A7882728A8882814988C181FE
+:10894000012141710E2282700F22C270017010BD90
+:1089500010B50A4C2078002804D02B210E2000F0FE
+:10896000CCFB10BD0821A01D04F024FB00202071C9
+:10897000012060712B21E170207010BD540900208E
+:1089800064000020C40900001027000070B5FA4DF3
+:1089900004462878002804D02A210E2000F0ADFBE0
+:1089A000EBE5F54810222146303800F0B0FBF248E4
+:1089B0001022A118203800F0AAFBEF4830380CF044
+:1089C000BCFBED49102210392C46A81D00F09FFB7E
+:1089D000002020710E20A0702A20E070012060711C
+:1089E0002070CAE5F8B50546E348E34C40300090F6
+:1089F000007F0C2628272034002801D0E6733EE0B3
+:108A0000A07B002804D028210F2000F076FB04E48E
+:108A1000A87805280DD013280BD0142809D01528C4
+:108A200007D01A2805D0292803D03D2801D03B289B
+:108A300003D12888D149884201D912201EE009F0CB
+:108A40008CFD0228DAD1CE482A88406841889142BC
+:108A500013D10146C0310A79002ACFD1AA784A71D0
+:108A600001220A710099A0300F770021E17340794B
+:108A7000002804D00AF0F9FA01E00220E07327741C
+:108A80000120A0735FE4F8B5BB4F064638783D1D62
+:108A9000002804D017210E2000F02FFB53E43146AC
+:108AA000012009F01EF901242870002807D1B248DE
+:108AB00006226030314605460DF037FBAC717C7103
+:108AC0001720F8703C703EE470B5AB4C0646207839
+:108AD000002804D00B210E2000F00FFB4DE509F01B
+:108AE0003CFD032808D009F03BFD032804D0A24830
+:108AF0004030007F002801D00C2016E03378002B96
+:108B000003D0012B01D012200FE09B4DE035297AD4
+:108B1000082909D22846721C0C3006F097FB287AE7
+:108B2000401C2872002000E00720207101206071A5
+:108B30000B21E170207020E510B58F4C20780028C3
+:108B400004D00A210E2000F0D8FA16E709F005FD3E
+:108B5000032808D009F004FD032804D086484030DB
+:108B6000007F002801D00C2002E000F0BFFA0020B6
+:108B70002071012060710A21E1702070FDE610B5BE
+:108B80000AF032F9002803D07E497F480DF04BFCF3
+:108B900008F04BFD0BF051FC002804D01720794958
+:108BA00040010DF040FC08F0ACFF002804D0B920D3
+:108BB000744980000DF037FC00F098FAFFF7F2F8E6
+:108BC0006D4800210171012141710222C2700170C2
+:108BD000D3E610B5684C2178002904D020210E205E
+:108BE00000F08BFAC9E601781F290ED8411C0CD081
+:108BF000002121710278411C104609F08FF80120F4
+:108C000060712021E1702070B7E612202071F6E734
+:108C1000F8B5594C2178002904D01B210E2000F012
+:108C20006CFABFE401216171534E0C212171403671
+:108C3000317F00296FD10078514F0025012804D0E1
+:108C400000284AD01220207165E009F086FC002837
+:108C500003D109F085FC002804D009F07EFC02282D
+:108C600022D058E008F08FFF002854D0307D002833
+:108C700051D1786801224580032108F0B4FB78685F
+:108C800009F05AF97868923008F001FD002803D104
+:108C90003C493E480DF0C7FB0AF00BF9002839D0DB
+:108CA00085203849C00015E009F05AFC002832D16F
+:108CB000707F00282FD001282DD004282BD008F059
+:108CC00062FF002827D00AF0F4F8002822D02F48AD
+:108CD0002C4918300DF0A7FB1CE009F03EFC0328DE
+:108CE00004D009F03DFC03280FD014E000200AF066
+:108CF00005F800280FD12571307D00280BD1786848
+:108D00008030807CFFF734F805E0002009F0F6FFA2
+:108D1000002800D125711B20E0700120207041E463
+:108D200010B5154C2178002904D01A210E2000F02E
+:108D3000E4F922E601781F290ED8411C0CD000214D
+:108D400021710278411C104608F0FDFF012060717E
+:108D50001A21E170207010E612202071F6E770B53C
+:108D6000054E044630780C25002811D018210E201D
+:108D700000F0C3F9AAE4000054090020FF0E00002F
+:108D80006400002074810000D3020000240400006D
+:108D900009F0E3FB03285AD009F0E2FB032856D080
+:108DA000E14A107F002852D16079002801D00128C3
+:108DB0002DD1A079002801D0012828D1A07B00283E
+:108DC00005D0012803D0022801D003281FD1607BE1
+:108DD00000281CD0C0081AD161880120800381427C
+:108DE00002D82388834203D9207901280FD119E0C2
+:108DF0002079002806D0012814D0022805D00328A5
+:108E000005D102E020290BD30CE0A02B0AD2207957
+:108E1000042805D12088202802D36188884201D9FE
+:108E2000122514E0207950776079002802D00128BB
+:108E300003D00CE0BD4A002105E0BB4A2032907906
+:108E4000002804D00121204608F0CEFE054601206E
+:108E5000357170711821F170307037E470B5B24C13
+:108E60000546403C2078002804D02E210E2000F03A
+:108E700044F92BE409F071FB0C22022815D1AA4811
+:108E8000007F002811D1A9482B88083841684888FC
+:108E900083421AD10846C030037A002B05D1203115
+:108EA000C97E0F2903D0102901D0227103E00521CA
+:108EB0000172002020710E20A0702E20E070288802
+:108EC000E08001206071207016E40220F2E770B5A6
+:108ED000954C0546403C2078002804D02D210E20DA
+:108EE00000F00BF908E409F038FB0C21022814D13A
+:108EF0008D48007F002810D18C4E2A88083E70686B
+:108F000043889A4220D1C822125C002A05D13B2214
+:108F1000125C0F2A03D0102A01D021710AE010221E
+:108F2000A91CD6300DF001F970680421C03001721F
+:108F3000002020710E20A0702D20E0702888E08095
+:108F40000120607120700DE40220F2E710B5017875
+:108F50000B000DF059FB3F9E9E399E9E599E9E9E92
+:108F60009E3C3F9E9E8752559E9E999E9E9E432963
+:108F70009E2D319E9E9E9E359E9E9E955C9E9E47FA
+:108F80009E4B4F9E21259E6C6064689E709E7F83E1
+:108F90007C788A8D74919E00801CFFF798FF76E0A4
+:108FA000801CFFF75BFF72E0801CFFF7D8FE6EE0CD
+:108FB000801CFFF7B5FE6AE0801CFFF729FE66E023
+:108FC000801CFFF706FE62E0FFF7D9FD5FE0FFF7C8
+:108FD000B3FD5CE0801CFFF777FD58E0801CFFF7D5
+:108FE00052FD54E0801CFFF7FDFC50E0801CFFF7B1
+:108FF000CDFC4CE0FFF7ACFC49E0FFF788FC46E015
+:10900000801CFFF744FC42E0FFF729FC3FE0801C96
+:10901000FFF7F2FB3BE0801CFFF7C4FB37E0801C4E
+:10902000FFF7A1FB33E0801CFFF767FB2FE0801CFC
+:10903000FFF742FB2BE0801CFFF7F8FA27E0801CCB
+:10904000FFF7A6FA23E0801CFFF764FA1FE0FFF7A2
+:109050003CFA1CE0801CFFF705FA18E0801CFFF7C3
+:10906000E0F914E0FFF7C4F911E0FFF762F90EE050
+:10907000801CFFF74BF90AE0801CFFF721F906E09E
+:10908000801CFFF70AF902E0801CFFF7DAF80120E4
+:1090900073E4002071E470B52349244C054640393F
+:1090A000083C0A460126403260682B000DF0ACFAFD
+:1090B00005171A1A04171A000122002108F093F963
+:1090C000616800220846C0310A724A7209F067FFDF
+:1090D000002803D016A11B480DF0A5F960E4167511
+:1090E00088655DE4174812A13330F5E70E4900208A
+:1090F000C031C8612039087270470B4A203A937E0C
+:10910000002B03D1D076117701209076704730B5CF
+:10911000134606E0CC18203CE47FD51A44555B1E6C
+:10912000DBB2002BF6D130BD940900206C0000208A
+:109130007372635C6C6C5F6374726C2E73302E633D
+:10914000000000005108000070B5FD4D040008D07B
+:10915000012C10D0022C07D0032C05D0F9A17020CF
+:1091600007E0F8A1672004E02878012803D0F5A1E2
+:109170006D200DF058F92C7070BD70B5F04D04469F
+:1091800010280AD0112C16D028468178122C07D02E
+:10919000132C0AD0EBA19F200BE0EAA1942008E059
+:1091A000112908D0E7A1992003E0112903D0E5A1F6
+:1091B0009C200DF038F9AC7070BD10B5E04894B04B
+:1091C000007B002819D0172069460870DC4900A8E8
+:1091D00006220D3102300CF0A8FF09A96846F9F704
+:1091E000C2FE0446112805D0002C03D0D5A1BB2017
+:1091F0000DF019F9204614B010BD3220E4E710B587
+:1092000001220023114603F0B5FC10BDFFB595B057
+:109210001D460E460746FFF7F2FF04000AD02078ED
+:10922000222804D3A07F8006C00FA84204D10820C2
+:1092300019B0F0BDC748FBE7372168460170478089
+:10924000002D05D00121017146711799817102E04D
+:1092500000206946087109A96846F9F784FEA07FD5
+:10926000DF21084069010843A0770020E0E770B5DE
+:109270000446084620380D4603000DF0C5F90A06DD
+:109280000A11232C334249505761FF20ADA1083009
+:1092900052E02078202851D1FF20AAA10B304BE0CA
+:1092A000A7480178032949D08078132846D0207830
+:1092B000242843D0252841D023283FD0FF20A1A136
+:1092C0000E3039E02078222838D0232836D8FF20E5
+:1092D0009CA1153030E0207822282FD0FF2099A1C2
+:1092E000193029E02078222828D0242826D02628C2
+:1092F00024D0272822D0292820D0FF2091A11C305B
+:109300001AE02078252819D0FF208EA1233013E001
+:109310002078252812D0FF208AA126300CE0207862
+:1093200025280BD0FF2087A1293005E020782828A8
+:1093300004D0FF2083A12C300DF075F8257070BD8E
+:10934000FF2080A12F30F7E730B5834C0B88834A8C
+:10935000022801D0934204D09D1FA54225D20228A5
+:1093600002D04D88954203D04D88AD1FA5421CD236
+:109370004C88A34219D88B88FF25F435AB4214D80A
+:10938000022802D0C888904205D0C888724D0A3899
+:109390002D1FA84209D2C888904208D0944206D016
+:1093A0005B1C63438000834201DB072030BD00204B
+:1093B00030BDF0B56A49884245D36A4A0125AD04FB
+:1093C0001368A84201D398423DD30279002A06D0FF
+:1093D000082A02D8067B082E05D90720F0BD047B99
+:1093E000002CFAD0F6E7002A06D004688C422AD373
+:1093F000AC4201D39C4226D3002E06D084688C4216
+:1094000021D3AC4201D39C421DD300240CE005685B
+:10941000A700ED598D4216D30127BF04BD4201D3E9
+:109420009D4210D3641CE4B2A242F0D80022012570
+:10943000AD040CE084689700E4598C4203D3AC423D
+:1094400003D39C4201D21020F0BD521CD2B29642EE
+:10945000F0D80020F0BDFFB50022099B002802D003
+:10946000994205DC58E0002902D1002004B0F0BD8B
+:109470000920FBE7845C002C12D087187D78112D21
+:1094800043D010DC2B000DF0BFF80A401726262C25
+:109490002C2E2E363640835C002B30D1521CD2B29B
+:1094A0008A42F8DBE1E71C2D2FDA123D2B000DF08C
+:1094B000ABF8042C2C121A2C022CD9D1BB78039CAB
+:1094C000072B237001D25B0701D40A20CEE7029B51
+:1094D00001241B7816E0E343DB0708E0012C08D0E9
+:1094E00013E00620C2E70F2523072D075B19002B89
+:1094F000F4D03046BAE7029B1B789C0701D50B20BD
+:10950000B4E702242343029C2370835C521C9A1804
+:10951000D2B28A4202DDABE7192676028A42A9DB83
+:10952000A3E710B504780B46002C1FD001210E4A8A
+:10953000012C1ED0022C22D0032C2AD125E00000C1
+:10954000740A00207372635C6761705F636F726599
+:109550002E630000023000007B0C0000FFFF0000C3
+:109560000080010028000020023200000021197054
+:1095700011E019708179890903290AD10BE019706A
+:1095800081798909012904D105E019708179890956
+:1095900001D0104610BD411C0622581C0CF0C5FD20
+:1095A000002010BD08B51346002806D0FEA00068B4
+:1095B000009048796A468009105C18700622581C91
+:1095C0000CF0B3FD08BD30B50C46097895B02229E2
+:1095D00002D2082015B030BD282369460B704880A0
+:1095E000132A03D03B2A01D00720F3E708460A716B
+:1095F00009A9F9F7B8FC050003D121212046FFF79E
+:1096000036FE2846E6E700B595B0232369460B7081
+:109610004880108888805088C880D0884881908889
+:10962000088100208881C88109A96846F9F79BFC58
+:1096300015B000BD70B50C00064610D0FFF7DFFD79
+:10964000050003D1D949DA480CF0EDFEA68028893F
+:10965000E0802889208168896081A889A08170BD07
+:1096600070B50E46050003D00021092003F027FF46
+:109670000120D04C022E207324D0032E04D0CC48DD
+:10968000CA491E300CF0CFFECA4806210D3003F047
+:1096900091FCA07C8006800EA074FFF78EFDA08B4D
+:1096A00000280ED0002D0CD08300012200210920BB
+:1096B00003F060FE092804D0BD48BC4928300CF0F6
+:1096C000B2FE70BDBB480321103003F073FCA07CD8
+:1096D00040218006800E0843A074B6480C3002F08A
+:1096E00015F9DAE77FB501A9012003F0C3FA0028D4
+:1096F00004D0AF48AD4967300CF095FEAE4E01A8DE
+:1097000003F0C6FA050002D0052D4CD048E0029CBB
+:10971000A07F01072CD520462230009068462346C2
+:10972000628E80882146343301F07BFA0546A07FA3
+:10973000F7210840A077002D05D0B5422FD09C48D6
+:109740009A49783029E0E17F480889074000C90F2D
+:1097500008432021095D4007400FC9000843E07716
+:10976000207828281CD129212046FFF780FD17E00A
+:109770004007C4D568462246808821460E32FFF74E
+:1097800042FF0546A07FFB210840A077002D07D0AF
+:10979000B54204D08648854992300CF044FE00253D
+:1097A000284604B070BD0020FBE7F8B5040004D1E2
+:1097B000ED207E4980000CF036FE7220207060683B
+:1097C00008250178091F0B000CF01EFF11F90A3D56
+:1097D0005FF83D0EF8F83E3D3D3D3DF986F93D0010
+:1097E00073487249AA3074E087883846FFF707FD4E
+:1097F000060004D16E486D49B2300CF014FE60785A
+:109800000421284360706B4CA07F0843A07721217E
+:109810003046FFF72CFDB07F8007800F012801D173
+:10982000801EA080384602F057FE3846FBF72AFE1D
+:109830003846FAF7C6F93946022003F040FEB07FF9
+:10984000EF210840B077F8BD86883046FFF7D7FC97
+:10985000002804D156485549D0300CF0E4FD60682A
+:109860008078012804D052485049D2300CF0DBFDFA
+:1098700060688179304602F04EFF0028E3D06178BD
+:10988000294361706168C880F8BD87883846FFF752
+:10989000B6FC060004D146484449E3300CF0C3FD51
+:1098A00060783946284360706068C088308160689D
+:1098B0000089708160684089B081022003F0FFFD5B
+:1098C0000020B075FFF70EFF0028DDD001203749DA
+:1098D00080020CF0A8FDF8BD80783C2815D0002748
+:1098E000022815D00026002804D031482F49F8302E
+:1098F0000CF099FD0021084603F0E1FD002107204E
+:1099000003F0DDFD002E05D046E001270026F1E73B
+:109910000126EAE76078284360702648817F294362
+:109920008177002F38D160688688304601F055F87D
+:109930000546807F6168800889798000012900D010
+:1099400002210843A87760680622C08A28816068DF
+:10995000008B68816068408BA8816068C079E87579
+:1099600061682846183008310CF0DFFB6068062279
+:10997000807B68706168A81C0F310CF0D6FBA87F53
+:109980008107890F304602F090FDA87F8007800F85
+:10999000012801D10748868006480178032913D0A1
+:1099A0008078132814D00BE00302FF0144950000D7
+:1099B00013030000740A0020023000000CE00FE0E6
+:1099C000FF20FCA1453084E70120FFF7BDFBF8BD77
+:1099D0001120FFF7D2FBF8BD204601F02AFCF8BDAC
+:1099E000607828436070F8BDF7B505460078002719
+:1099F00000090C463E4601287ED00022F14902288B
+:109A00007BD0072804D00A2878D0EAA1EE482DE1BF
+:109A1000686803780D2B31D006DC042B6FD0072B40
+:109A200036D00A2B6AD106E0122B38D0132B40D047
+:109A3000142BF7D1B2E011270726002C72D08088B2
+:109A4000A0806968FB238979A171E04905468A7F76
+:109A50001A408A77032103F0C5F80421284603F051
+:109A6000C1F80021284603F0BDF80221284603F082
+:109A7000B9F80121284603F0B5F8F9E001270926D5
+:109A8000002CDBD08088A080686880792072EFE0AD
+:109A900012270E2680882146FFF7CCFDE8E01A2722
+:109AA0000726002CCAD04088A08068680079A07181
+:109AB000DEE081783C2936D010271E26002CBDD050
+:109AC0008088A0806868C08A20836868C08AE08235
+:109AD0006868008B60836868408BA0836968207D1C
+:109AE000497F4008C9074000C90F084320756968CD
+:109AF000C007C00F497F03E05FE08AE0ADE01CE0F3
+:109B000049084900084320756968A21DC8790831D1
+:109B1000FFF748FD69682246887B0D320F31FFF759
+:109B200041FD05E074E019270726002C70D0A271D2
+:109B3000A648F722817F11407DE01B272E26002CAE
+:109B400066D0A1806968A21D0879491DFFF72AFD2A
+:109B500068682030C07A60736868C0780428A07B89
+:109B600019D040084000A073F921084069681F22FD
+:109B7000C9788907490F0843A07369684007C97A03
+:109B8000400FC9000843A073696820460F300C31AC
+:109B90000CF0CBFA6CE001210843E4E71E270E2607
+:109BA000002C6DD0A1806868E21D407AA0716968C0
+:109BB0008878C91CFFF7F6FC5AE0287A012805D0FE
+:109BC000022815D080487BA132384FE01D270E2691
+:109BD000002C55D06888A080A889E080E889208181
+:109BE000288A6081688AA0817848DF22817FA2E785
+:109BF00012270E266888FFF71DFD002C40D06878DC
+:109C00004007400F032833D17048FD22817F92E73F
+:109C100036E0287A03000CF0F7FC06041010202030
+:109C2000202619270726002C2AD0A1806748A27178
+:109C3000817F4908490081771AE019270726002CFF
+:109C40001ED0A180287A012805D00320A0715F488A
+:109C5000EF22817F6FE70220F8E721462846029A2B
+:109C600001F04BFCFEBD532052A100010CF0DBFBC8
+:109C70000298002C068001D0278066800020FEBD5F
+:109C800002980680FAE710B5504894B080781328FF
+:109C900002D0082014B010BD22206946087009A91E
+:109CA0006846F9F760F904460021072003F007FC35
+:109CB0002046EFE700B5454895B08078122801D0DE
+:109CC0000820B5E41E216846017000218170C17032
+:109CD00009A9F9F748F90028F3D10021072003F07A
+:109CE000EEFB1120FFF749FA0020A1E400B5374848
+:109CF00095B00078022801D0032818D11B2108A8AC
+:109D000001730021817369460BA8F9F72CF900282B
+:109D100004D1684640781B2801D0032088E4002144
+:109D2000084603F0CCFB68468078002801D0082064
+:109D30007EE40120FFF708FA002079E4F8B5234C0F
+:109D400003000CF061FC0A068017808080804B3590
+:109D50006E80FFF7CBFF00282AD1F7F7E9FD002836
+:109D600026D02221017000210172F7F7C2FDA07FE9
+:109D7000012152E08EB23046FFF741FA050004D1CE
+:109D800011480CA12E300CF04EFB287821280FD062
+:109D9000F7F7CEFD00281BD01221017002270772B1
+:109DA00046800020A875F7F7A4FDA07F3843A07770
+:109DB000F8BD00007372635C6761705F636F72650A
+:109DC0002E630000FFFF000036050000740A00202B
+:109DD000132229463046FFF7F6FBE9E7A578122D56
+:109DE00006D0132D07D0FA49FA480CF01CFBDFE728
+:109DF000FFF760FF01E0FFF746FF0028D8D1F7F733
+:109E000097FD0028D4D022210170122D07D0022105
+:109E10000172F7F76EFDA07F10210843C7E701210B
+:109E2000F6E7A07C810901290BD0800904D0E9481C
+:109E3000E74922300CF0F7FA03210020FFF710FC6D
+:109E4000B6E70221F9E7E348E1492930CDE7F7B564
+:109E500014460D0004D1DF48DD4931300CF0E3FA3F
+:109E600028780827012807D002281FD0D948D849C8
+:109E700062300CF0D8FAFEBD0098FFF7C0F906007A
+:109E800004D1D448D24938300CF0CDFA0220B07554
+:109E90001030207060783843607007CD083407C4F4
+:109EA000CD482022817F11438177FEBD0098FFF7C6
+:109EB000A6F9060004D1C748C54946300CF0B3FAEC
+:109EC000A988C648814208D1EA88824205D1132276
+:109ED00031460098FFF777FBFEBD814202D1E8884A
+:109EE000002809D01220207060783843607007CDB8
+:109EF000083407C4002006E07823002202200099DD
+:109F000003F038FA0120B075FEBDB34840897047B0
+:109F1000FFB591B01498F8F721FF00285DD1012416
+:109F2000684603218471C9028180002201A920466C
+:109F3000FAF719F9002850D16846152184714902B1
+:109F4000818000261C2102A800960CF04DF901200A
+:109F50000146684610310170002001466846417094
+:109F60008178F9273940891C21438170017A0225C3
+:109F70002943017212998186C6861F2101870C90A0
+:109F800011980F9001A80B9009AA0BA902A8F9F744
+:109F9000B5FE002821D168468F4E808CF08068463F
+:109FA00084718F498180807809AA3840801C4108DB
+:109FB0004900684681708586058713A80F900BA914
+:109FC00002A8F9F79BFE002807D16846808C3081F3
+:109FD00031460A311498F8F7D4FE15B0F0BD30B50B
+:109FE0000C46804995B08C4241D37F4901229204AE
+:109FF0000968944201D38C4239D3203800220125CC
+:10A0000003000CF001FB06042F494D535C64002152
+:10A01000082003F02EFA002802D0112015B030BD20
+:10A0200024206946087000A80522A11C02300CF00B
+:10A030007CF809A96846F8F796FF050002D0082DBC
+:10A040000ED031E0082300221146184603F092F9A1
+:10A05000082829D05F485E49D6300CF0E4F923E0A7
+:10A060000620DBE76068002803D0884201D2102078
+:10A07000D4E73D2168460170218841806188818054
+:10A0800009A9F8F770FF05000ED1606800280BD011
+:10A090006946098D018007E0206801F079FC02E043
+:10A0A000204600F0D8FC05462846B7E73E2007E0EA
+:10A0B000857000E0827009A9F8F755FFF3E73420B6
+:10A0C000694608702078C0076846F3D0F0E707209B
+:10A0D000A4E730B50C46444995B009688C4201D2DA
+:10A0E00010209BE7203803000CF08EFA0504212194
+:10A0F000232132002088FFF782F8002804D000785E
+:10A10000222803D2082089E7384887E725216846B6
+:10A1100001702188418009A9F8F725FF050015D1B4
+:10A120000AA905220231A01C0BF0FFFF0EE0062554
+:10A130000CE02068002805D0884201D2102505E0F7
+:10A1400001F01BFC24480025808BA080284665E791
+:10A15000072063E720481330704710B520211E48C0
+:10A160000CF040F80120FEF7EFFF1120FFF705F893
+:10A1700000211948C943818000218176E1218900AD
+:10A18000818301460C300D310446F7F751FC12482B
+:10A190000722214613300BF0C8FFFFF70EF8002806
+:10A1A00003D00B4912480CF03EF900F0D5FF10BD6A
+:10A1B00010B504463C210CF015F8A07F8008800003
+:10A1C000A077202020700020A0752034607010BD82
+:10A1D000B49D00008C050000740A0020FFFF000001
+:10A1E000012A000000800100280000200230000049
+:10A1F000FB0600007047FEB50546FF480C4681424D
+:10A2000007D301208004844205D3FC4800688442BF
+:10A2100001D21020FEBD002D02D0012D32D126E04A
+:10A22000F74908220F4668460BF07FFF3946204663
+:10A23000FFF777F90028EDD1FEF7BFFF060006D043
+:10A240000722694638460BF070FF3046FEBD207885
+:10A25000002801D0012805D1E94807223946C01D50
+:10A260000BF063FF0021092003F029F90FE00978C2
+:10A27000002907D0012905D0022905D0032903D0E0
+:10A28000E048FEBD0720FEBD0120FFF7E9F9DC48EC
+:10A290000C3885760020FEBD10B5D8490968884283
+:10A2A00001D2102093E7D64902460C390B7B0D31C1
+:10A2B0001846FFF777F9002089E7FFB599B0054602
+:10A2C000002069460871087208A9087408751446C8
+:10A2D000CA480122C849920400681E46002D05D0D4
+:10A2E0008D420BD3954201D3854207D3002C08D071
+:10A2F0008C4203D3944204D3844202D210201DB076
+:10A30000F0BD2846204318D01F270CAB01AA0097A8
+:10A3100028461A99FFF79FF80028F0D10DAB02AA42
+:10A32000314620460097FFF796F80028E7D16846A7
+:10A33000007AC10703D00A20E1E70720DFE78007A2
+:10A3400005D568460079800701D50B20D7E703AF14
+:10A35000002D0FD01A20694608731A988873294671
+:10A36000F81C1A9A0BF0E1FE0EA903A8F8F7FBFD02
+:10A370000028C4D1002C0ED02021684601738673BA
+:10A3800032462146F81C0BF0D0FE0EA903A8F8F7C0
+:10A39000EAFD0028B3D19A4908A8007C0C3948701E
+:10A3A0000020ACE770B504460A2020700D46204618
+:10A3B000F8F7D9FD002805D139202070294620461C
+:10A3C000F8F7D1FD70BDF7B500260C4605460B2702
+:10A3D0001AE02968B00009580978002903D001293A
+:10A3E00001D00720FEBDA170296806220958E01C93
+:10A3F000491C0BF09AFE277020460299F8F7B3FD2E
+:10A400000028EFD1761CF6B22879B042E1D80026B8
+:10A410003A270FE0A868B10041581022A01C0BF0A9
+:10A4200084FE277020460299F8F79DFD0028D9D1B7
+:10A43000761CF6B2287BB042ECD80020FEBDF0B509
+:10A44000044671A003C897B06B4B00271591149078
+:10A450009C4211D369480125AD040268AC4201D386
+:10A46000944209D32078012809D16168994203D325
+:10A47000A94204D3914202D2102017B0F0BD604926
+:10A480000C390A78012A0CD18A88614B9A4203D090
+:10A49000002806D0012804D08A7F13079B0F06D11D
+:10A4A00001E00820E9E7D30701D1910701D5112088
+:10A4B000E3E7218A574B0A46203A9A4207D30128FC
+:10A4C00075D1002973D1628A002A70D111E0022867
+:10A4D00001D0032801D1A02969D3012809D0484A15
+:10A4E0000C3A5278D20704D0628A002A5FD0B42A8C
+:10A4F0005DD8002806D0012808D0022804D00328FF
+:10A5000055D117E0002518E0022516E0002902D1F8
+:10A51000608A00280CD004256068007800280CD0E0
+:10A52000012809D0022807D0032805D03548A4E720
+:10A530000125F1E7032500E00127207A002806D055
+:10A54000012806D0022806D003287CD105E0002689
+:10A5500004E0012602E0022600E00326002D01D0DF
+:10A56000022D14D1002E12D0E068FEF722FF002841
+:10A5700083D123480C384078800702D02148401E00
+:10A580007BE7022D03D1022E5DD0032E5BD0182174
+:10A5900068460170218A4180218A8180857118482E
+:10A5A0000C38007B002803D001286FD104E04AE07A
+:10A5B00000216846C17102E001206946C871684601
+:10A5C000077221780930012937D006210BF00AFEE5
+:10A5D00069460E74207D8207C107D20F4007C90F5C
+:10A5E0005200C00F11438000014314A8405C69462B
+:10A5F000C873002827D00FE0008001002800002049
+:10A60000800A002002320000070605040302010050
+:10A61000FFFF0000E13F000009A96846F8F7A3FC2E
+:10A62000002884D109A96846FFF7BCFE0028A7D1FD
+:10A63000002D0AD0022D08D010E061680622491CC6
+:10A640000BF073FDC4E7072017E7002E06D009AA18
+:10A650006946E068FFF7B7FE002891D11B206946E4
+:10A6600008700120887009A96846F8F77CFC00286A
+:10A6700086D108A840791B2819D12B000BF0C4FF04
+:10A680000504040707040A00032001E00FE002208C
+:10A69000FEF75AFD012D0CD0608A002809D0002257
+:10A6A00083001146104602F065FE002801D0032009
+:10A6B000E3E60020E1E6F3B5032687B00D46002966
+:10A6C0000AD0FA4885426FD301208004854203D323
+:10A6D000F7480068854267D30798FEF790FD0400AD
+:10A6E00005D02078222804D2082009B0F0BDF14816
+:10A6F000FBE7A07F8707BF0F002D05D0294638460E
+:10A70000FEF722FE0600F0D139460027EA4801296B
+:10A7100007D0022931D0E949E9480BF084FE3046E0
+:10A72000E3E7A27D2946012A02D0827F920701D564
+:10A730001120DAE700291BD108216A46049711820B
+:10A740000592418904AADF48FAF7FDF80028CCD128
+:10A750006846008A082801D00320C6E768460188B9
+:10A7600001814188418181888181C188C18102A99B
+:10A77000079801F061FF0646D1E7A17D022916D1B5
+:10A78000807F800613D4002D04D0A07F40070CD416
+:10A79000002100E00121079801F08FFF0600BED1E3
+:10A7A000A775002DBBD004E01AE01126B7E7002DF5
+:10A7B00016D02A4621460798FEF725FF064611289F
+:10A7C000ADD1A07F4007AAD42046082229460E30EA
+:10A7D0000BF0ABFCA07F04210843A07700269EE786
+:10A7E000102082E770B50C460546FEF708FD010013
+:10A7F00004D022462846FEF7E6FE70BDAD4870BD87
+:10A8000000B50146143195B0192901D2810707D04E
+:10A8100001461E3104D00A3102D0072015B000BD18
+:10A82000312269460A70887009A96846F8F79BFBCF
+:10A83000F4E701B582B00220694608809E4802AB69
+:10A8400000896A460021F9F7E7FE6946098802296E
+:10A8500000D003200EBD1CB50021009102216A46E4
+:10A860001180934901900968884201D210201CBDD3
+:10A87000914801899348FAF766F8694609880229E0
+:10A88000F5D003201CBDF0B50E46884985B01746AB
+:10A8900005468E4207D386480122920400689642FC
+:10A8A00004D3864202D2102005B0F0BD1F2F01D97B
+:10A8B0000C20F9E7804C8D4226D3954201D3854286
+:10A8C00022D3E08803A9F9F758FE0028ECD12878B4
+:10A8D00069464873E08803A9F9F730FE0028E3D100
+:10A8E0006946009008780221084369460870497B50
+:10A8F000090703D00821084369460870E0886946C3
+:10A90000F9F7B5FD0028CFD169468F80E08833463E
+:10A9100001AA0021F9F780FE69468988B942C3D0AF
+:10A920000320C1E71CB50C4600210091019122884B
+:10A9300069460A805E4901900968002801D0884272
+:10A9400001D38C4201D210201CBD002801D0002A66
+:10A9500009D059486A46C1885A48F9F7F4FF694650
+:10A96000098821801CBD0C201CBD10B50123FEF7F9
+:10A970004DFC2CE4002310B51A461946FEF746FCA0
+:10A9800025E430B505464A4895B000680C4681423A
+:10A9900002D2102015B030BD2846FEF730FC00284A
+:10A9A00007D00178222902D3807F800603D40820B3
+:10A9B000F0E74048EEE7132168460170458009A999
+:10A9C000F8F7D1FA0028E5D108AA0A2151567F29C3
+:10A9D00001D02170DEE70520DCE7F8B5012304464D
+:10A9E0001A46194602F0C6F8074601231A46022104
+:10A9F000204602F0BFF8064601231A4604212046ED
+:10AA000002F0B8F8054601231A460321204602F059
+:10AA1000B1F80446002F03D128492B480BF003FD61
+:10AA2000002E04D1AD20254980000BF0FCFC002D48
+:10AA300004D125482149801C0BF0F5FC002C04D1E1
+:10AA400021481E49C01C0BF0EEFC22213846FEF7BF
+:10AA50000EFC3846F8BD10B50446006800280CD03E
+:10AA60001249884207D301218904884205D310493D
+:10AA70000968884201D2102014E400F071FFA08818
+:10AA80000D4CA083A07E01280DD10021092002F0E9
+:10AA9000F0FC002800D00120A17C8909012915D0F3
+:10AAA0000321FEF7DDFD002006E400000080010028
+:10AAB0002800002002300000740A0020B49D00002D
+:10AAC000C6090000FFFF0000B30200000221E8E712
+:10AAD00030B5F74B9A4207D301239B049A4205D322
+:10AAE000F44B1B689A4201D2102030BD1578EB065A
+:10AAF0005B0F042B07D85478072C04D39378102BC2
+:10AB000001D8A34201D2072030BDD3785B0702D41D
+:10AB100013795B0701D5062030BDC37FAC075B0806
+:10AB20005B00E40F2343C3770878EF2318401378C2
+:10AB30009B06DB0F1B0118430870F12318401378A4
+:10AB4000DB065B0F5B001843087050780873002029
+:10AB500030BD30B500240C70C378DB07DB0F0B7001
+:10AB6000C578AD07ED0F6D002B430B70C5786D07F1
+:10AB7000ED0FAD002B430B7014700179C907C90F9D
+:10AB8000117003799B07DB0F5B001943117000798B
+:10AB90004007C00F80000143117030BD70B51446EE
+:10ABA0000D460646F6F7C4FE002809D0A221017022
+:10ABB000142221460830F6F707FBF6F79AFE70BD1F
+:10ABC000132229463046FEF7FEFC70BD70B51446D0
+:10ABD0000E460546F6F7ACFE002809D0222101708A
+:10ABE00045802178017261784172F6F782FE70BD6E
+:10ABF000132231462846FEF7E6FC70BD10B5AE4C78
+:10AC0000207C00280CD1204621461038FDF762F840
+:10AC1000002803D0A9A1F2200BF005FC012020742C
+:10AC200010BD70B594B015460C462C226946189E8E
+:10AC30000A704880002B17D00822194601A80BF093
+:10AC400074FA68468581102231460E300BF06DFA99
+:10AC500009A96846F8F787F9002803D1A17F1022D7
+:10AC60001143A17714B070BD002001900290E8E775
+:10AC7000F0B50646008A97B080B20D460190FEF707
+:10AC8000BEFA04468C48317848380746E8370990C0
+:10AC90000B000BF0B9FC0EFCFB48085F8798B8D995
+:10ACA000FAF9F8F7F6FC002301221946019801F0A1
+:10ACB00061FF050004D1FF2080A130300BF0B3FB11
+:10ACC000002C04D1FF207DA131300BF0ACFB387E8D
+:10ACD000C00904D078486030C06DA86112E02B2014
+:10ACE000694608720BA902A8F8F73DF9002804D0BC
+:10ACF000FF2072A13C300BF096FB74490C980BF0CE
+:10AD00008EFAA9617068A862B068E862A07F8007C7
+:10AD1000800F012820780DD0252804D0FF2067A1BE
+:10AD20004D300BF080FB324621460198FFF736FF8D
+:10AD300017B0F0BD2528F6D0222806D0242804D04C
+:10AD4000FF205EA146300BF06EFB25212046FEF76A
+:10AD50008EFAE8E7002301221946019801F00AFF64
+:10AD6000060004D1FF2055A158300BF05CFB002CED
+:10AD700004D1FF2051A159300BF055FB2078252834
+:10AD800004D03078012108433070D1E702202870C8
+:10AD9000B068A860B068002802D000202871C7E71A
+:10ADA0000120FBE72B2069460870434968464C396F
+:10ADB000F8F7D9F8002804D0FF2040A178300BF034
+:10ADC00032FB03201BE02A206946087000A81022ED
+:10ADD000023071680BF0A9F904A810220230B168A2
+:10ADE0000BF0A3F9344968464C39F8F7BCF8002851
+:10ADF00004D0FF2031A189300BF015FB042028700E
+:10AE00000998686094E7B068002804D1FF202BA15E
+:10AE100095300BF008FBE07F400704D5FF2027A109
+:10AE200096300BF000FBB06806220A3800903379A8
+:10AE30000421019801F0FBF90028A6D0FF201FA1F2
+:10AE40009B300BF0F0FA73E7002C04D1FF201BA11C
+:10AE5000A3300BF0E8FA2046223010220546716834
+:10AE60000BF063F928212046FEF701FAA07F800746
+:10AE7000800F022814D100231A462146009501981C
+:10AE800006E04BE1BAE0B0E095E03FE071E05FE161
+:10AE9000FFF7C7FE11281BD029212046FEF7E7F94E
+:10AEA000E07F317A4007400FC9000843E0773FE771
+:10AEB0000080010028000020400B00207372635CBA
+:10AEC0006761705F7365632E6300000040420F008E
+:10AED000A07F000704D5FF20FD49B0300BF0A3FA96
+:10AEE000A07F08210843A0770020608620463430E8
+:10AEF0000BF078F9E07FFD220146C9071040890F69
+:10AF00000843E077307A2034207011E700230122D3
+:10AF10001946019801F02EFE040004D1FF20EC49EF
+:10AF2000CD300BF080FA2B2069460872E94902A85F
+:10AF3000F8F719F8002804D0FF20E549D2300BF0CB
+:10AF400072FAE4488188204621300176090A417668
+:10AF50000E2129702146FC316960017E2974407EF2
+:10AF60006874DC482C30A860103030346C61E860C4
+:10AF7000DEE6002C04D1FF20D549E6300BF053FA71
+:10AF80002078212893D93079012802D0022808D1CD
+:10AF900003E0E07F04210843E077387E0121084385
+:10AFA0003876324621460198FFF7F8FD23212046E6
+:10AFB000FEF75DF9BCE601220421019801F01FFCB7
+:10AFC0000028A2D0002301221946019801F0D2FDE9
+:10AFD000040003D1BE49C0480BF025FA0F202870A9
+:10AFE000172028716E34AC60A2E60421019801F0AC
+:10AFF00056FC002889D11020287099E600230122F0
+:10B000001946019801F0B6FD050004D18720B0492A
+:10B0100080000BF008FA2E462036307E41064DD5D2
+:10B02000A17F8F07BF0FC00713D029468031486F1B
+:10B0300000280ED0027CF37DD207D20F5B001A43AA
+:10B040000274486F5108E27F4900D207D20F1143C2
+:10B050000174307E000713D52A468032116F002913
+:10B060000ED0087CF37DC007C00F5B001843087446
+:10B07000116FE27F40084000D207D20F10430874DE
+:10B08000307E80070BD5F8204259002A07D0012FC7
+:10B0900005D02946307C31311032FEF783FA307EFC
+:10B0A000C0060BD5F8204259002A07D0012F05D140
+:10B0B0002946307C31311032FEF774FA0523684698
+:10B0C0000370357E4570834822216038019A0170F3
+:10B0D0004178C908C900C91C417042800372457299
+:10B0E000F6F78EFD2078252809D021280BD07A4844
+:10B0F00077495B300BF097F92078222803D9222179
+:10B100002046FEF7B4F80021019801F06BFD0028FD
+:10B1100000D10DE670486E49633092E674686D4D5B
+:10B1200020786035092802D00A28F2D10BE0E168C6
+:10B13000002902D02846F7F7E8FE2169002902D04D
+:10B140002846F7F7E2FE21462846F7F7DEFEEFE550
+:10B1500061485F49883074E65E4810B504222821B2
+:10B160006030F7F7B9FE5B480024EC30017E4906F9
+:10B17000490E01764038C465FCF739FD55493C312C
+:10B1800008461038F6F78BFC52484C30047410BD5A
+:10B1900070B50D46FEF733F8040004D14E484C4913
+:10B1A000A7300BF040F9FF21053128460BF01CF8C1
+:10B1B000A07F8007800F01280CD00221284688300C
+:10B1C000FCF716FD002804D043484149AC300BF091
+:10B1D0002AF970BD0121F1E70A46014610B5104673
+:10B1E0008830FCF71FFD10BD70B5054611200C46D8
+:10B1F0000870002161702121495D002908D00329D0
+:10B200000ED0042910D034483149C6300BF00BF968
+:10B2100020780009012802D9E87FC008607070BD5D
+:10B220000007000F203002E00007000F30302070D0
+:10B23000EEE7F0B504464068082601789BB008297F
+:10B240000DD00B2903D00C294BD1012181716068ED
+:10B2500087883846FDF7D3FF05004CD147E0478883
+:10B260003846FDF7CCFF050004D1172018494001EE
+:10B270000BF0D9F82878212833D0282833D16068FA
+:10B2800002210C3000F050FF00282CD0606808210B
+:10B29000001D00F049FF002825D02D2168460170CF
+:10B2A000478029461022223101A80AF03EFF0FA94B
+:10B2B0006846F7F758FE002804D007480449EF30E5
+:10B2C0000BF0B1F8A87F10210843A877292105E0E9
+:10B2D000BCAE0000F40A0020030200002846FDF77F
+:10B2E000C6FF1BB0F0BD607830436070F9E7FE49DF
+:10B2F000FE480BF098F8A87FEF210840A87729783E
+:10B3000021290FD061688A79002A02D08978002922
+:10B3100012D08007800F022849D0F448F249343017
+:10B320000BF081F8FEF7DEF90028DAD0EF48EE499D
+:10B330003F300BF078F8D4E7607830436070E87FF6
+:10B34000C00701D0042100E00321212041552878C5
+:10B3500029280BD03946062002F0B1F82878242895
+:10B36000E0D122212846FDF782FFDBE700230122FE
+:10B370001946384601F0FEFB040004D1C920DA4921
+:10B3800080000BF050F825212846FDF770FF0D20B6
+:10B3900008A90871204609A98830FCF735FC022865
+:10B3A000C0D00028BED0D148CF491D30B8E7607862
+:10B3B00030436070B6E7F7B58AB015460646FDF72C
+:10B3C0001EFF002841D0017822293ED323293CD0FA
+:10B3D000C17F490739D4807F8007800F01280DD0B5
+:10B3E000002301220021304601F0C4FB0746C0487B
+:10B3F0000290F7F781FD040007D101E00123F0E797
+:10B40000BA48B94959300BF00EF8002F1FD08837D1
+:10B4100067610298F7F770FD07460298F7F76CFD31
+:10B4200009212170266225710B99E760A1602061D6
+:10B4300003A92046FCF70CFC022806D0002804D003
+:10B44000AA48A94975300AF0EEFF0DB0F0BD002002
+:10B4500007466061E4E730B5002387B00546012266
+:10B46000194601F087FB04462846FDF7C8FE007820
+:10B4700022281BD9002C04D19C489B4981300AF01A
+:10B48000D2FF0F21684601701721017120466E30EE
+:10B49000029069461A30FCF7B7FB022806D0002854
+:10B4A00004D0E520904980000AF0BDFF07B030BD10
+:10B4B00030B5002387B005460122194601F05AFB3A
+:10B4C00004462846FDF79BFE00782228EED9002C82
+:10B4D00004D18648844993300AF0A5FF10206946BC
+:10B4E000087020468830FCF78FFB0028DED0E9206A
+:10B4F0007D4980000AF097FFD8E7F7B50546007848
+:10B500000027000982B00C463E4602287ED007285C
+:10B5100002D00A284AD14AE068680178082907D091
+:10B520000B2930D00C292ED070486F49D33060E100
+:10B5300014271A26002C6AD04088A080FDF75FFEF1
+:10B540000090002804D169486749AF300AF06BFFCA
+:10B5500000980099C07DA21D1831FEF723F8686895
+:10B5600008228089E081696820461030091D0AF0B0
+:10B57000DCFD207E01210843F92108402076009857
+:10B580004021807F47E018270826002CD3D08088F0
+:10B59000A080FDF734FE050004D1F7205249800059
+:10B5A0000AF041FFA11D2846FFF71EFE23E1002CF3
+:10B5B00001D0288BA080287A01287DD0022804D0D1
+:10B5C00003282FD048494B4813E11C270726002C9D
+:10B5D000B1D0A088FDF713FE0090002804D1FD2013
+:10B5E000414980000AF01FFF287B8007800F012857
+:10B5F000A07914D040084000A071FD210840297BAB
+:10B600004907C90F49000843A07101E0E3E0DFE00A
+:10B6100000988021807F084300998877EBE0012122
+:10B620000843E9E713270B26002C84D0A088FDF7F8
+:10B63000E6FD00900023A0880122194601F09AFA45
+:10B6400005460098002804D12A48274960380AF0A6
+:10B65000EAFE002D04D181202349C0000AF0E3FE58
+:10B660000098807F8007800F012859D0E86A817890
+:10B670008907890F0129A17954D049084900A1718E
+:10B680008278FD255207D20F294052001143A17143
+:10B69000E322114002785207D20E1143A171DF223A
+:10B6A00011404278D207920E1143A1710021E1713D
+:10B6B000C1782172427900E037E00179607AD307DE
+:10B6C00040084000DB0F18439307DB0F28405B0066
+:10B6D00018435207FB23D20F1840920010436072A8
+:10B6E000A07A4008400007E0BCAE00000E03000056
+:10B6F000540B002067040000CA07D20F10438A07CA
+:10B70000D20F2840520049071043C90F1840890042
+:10B710000843A0720098007823286CD92621AFE056
+:10B72000A86AA4E701221143A9E7297BFE48022960
+:10B7300010D017270C26002C4AD0012911D003293C
+:10B740001ED004291FD005291DD0F849F8480AF059
+:10B750006AFE23E019270726002C4CD00121A17195
+:10B7600005E00121A171E17989088900E171017E7B
+:10B77000CA094906D201890E49000A4302760DE042
+:10B780000220A07106E0687B0007000F8030A071E6
+:10B79000052918D0E07980088000E071A088FDF7C5
+:10B7A0002EFD05460078212825D0232804D0E04826
+:10B7B000DE490C300AF037FEA088002101F012FAB1
+:10B7C000222128465DE0E07980088000401CE4E703
+:10B7D0000498068015E0002C01D06888A080287AA3
+:10B7E000032828D004280FD005284DD0D048CF49B1
+:10B7F00064300AF018FE0498002C068001D02780DF
+:10B800006680002005B0F0BD15270C26002CDFD087
+:10B810000023A0880122194601F0ACF9050004D1EB
+:10B82000C348C2492A300AF0FEFD0622A11DA869BC
+:10B8300009F0DCF9DFE716270726002CC8D0A0881E
+:10B84000FDF7DDFC00900023A0880122194601F0DD
+:10B8500091F905460098002801D0002D04D1B44884
+:10B86000B24938300AF0DFFD2878C00601D5022041
+:10B8700000E00120A071009800782328BBD927217F
+:10B880000098FDF7F4FCB6E717270C26002C9FD094
+:10B89000A088FDF7B4FC00906D7A002804D1A4487C
+:10B8A000A2494B300AF0BFFD0621A01D0AF09AFC08
+:10B8B0000020A071207A032108432072FB21084058
+:10B8C0000099C97FC907490F08432072680692D5BD
+:10B8D000E07904210843E071A07AE90740084000BC
+:10B8E000C90F0843E17A2A0749084900D20F1143DA
+:10B8F000FD22AB07DB0F10405B001843A072E80687
+:10B90000C00F114040000143E17274E710B50446D6
+:10B91000807990B08009012804D04D20834900012E
+:10B920000AF081FDFFF76AF90120694608707E4838
+:10B930000AA9A0380190201D0290601C0B90684657
+:10B94000FCF786F9002804D07948784987300AF056
+:10B950006AFD0322601C0B990AF0E7FB10B010BDD2
+:10B9600010B5714CA03C002805D00146102220469D
+:10B970000AF0DBFB0120207410BD10B50446FFF770
+:10B980003DF969491022A03920460AF0CEFB10BDCE
+:10B9900070B50025644C00281CD06649884207D346
+:10B9A00001218904884205D363490968884201D28C
+:10B9B00010250DE0062109F003F9411C07D05A4972
+:10B9C0004039C865207E80210843207600E00725A5
+:10B9D000284670BD207E4006400EF6E7F3B50020F5
+:10B9E00089B00D46029000290AD0524885421CD3E6
+:10B9F00001208004854203D34F480068854214D358
+:10BA00000998FDF7FCFB060003D03078222815D1F9
+:10BA100002E04A480BB0F0BD002D08D1B07FC1094B
+:10BA200003D08007800F022801D01020F2E7B07FFA
+:10BA3000C10601D4000703D5002D01D00820E9E795
+:10BA40003948007EC00712D1F07F400701D50D2094
+:10BA5000E0E7002201231146099801F08BF8070066
+:10BA600005D0B07F8007800F022802D00BE01120A4
+:10BA7000D0E7002D07D02A4639463046FFF728F890
+:10BA800002900028C6D128488C38F7F735FA040010
+:10BA900003D126492A480AF0C6FC0A2020700998DA
+:10BAA000206238468830A060B07FFB218007800F7D
+:10BAB000012829D0002D4CD002202071381DE060D3
+:10BAC00038780007400F20743878C006C00F6074C3
+:10BAD000A07C2A788008D2078000D20F1043A0747F
+:10BAE0000840F17F01AAC907490F0843A074A8784C
+:10BAF000E07469462846FFF72CF8684600792075FF
+:10BB000068460078607528E001202071207B2A7843
+:10BB10008008D2078000D20F104320730840297894
+:10BB20008907C90F89000DE0E00B0020BCAE0000C2
+:10BB300053040000008001002800002002300000B3
+:10BB4000630500000843207324213046FDF78FFB76
+:10BB50000BE0032020710520207325213046FDF7DE
+:10BB600086FBB07F4006400EB07703A92046FCF765
+:10BB70006FF8022805D0002803D0FD49FD480AF0DF
+:10BB800052FC029846E7FFB581B00A9D06461C4666
+:10BB90001746142128460AF027FB0B980021016064
+:10BBA000F8070ED0F44920680968884239D312306A
+:10BBB00028602068143068602068A8600B982168AD
+:10BBC0000160B80726D56068002803D0EA490968F3
+:10BBD000884226D3029900290AD0FC3600280ED0CC
+:10BBE00031461030FDF79DFC00281BD1606810E045
+:10BBF000002816D0E86080366068B0670AE0FEF77B
+:10BC0000A9FA0146072230460AF08FFAFEF7F6FF3E
+:10BC1000DA48E860780707D5D749A06809688842FC
+:10BC200001D21020EEE528610020EBE5FFB5D44AF3
+:10BC30000E4607CA97B002AB07C3002700970197CB
+:10BC40001798FDF7DCFA050005D02878262804D0DF
+:10BC500008201BB0F0BDCB48FBE700231A4619466D
+:10BC6000179800F087FF040004D1C248C049803013
+:10BC70000AF0D9FBA87F8007800F1690012814D006
+:10BC8000022824D0BB48BA4999300AF0CCFB0121E4
+:10BC90000022852E31D01EDC002E26D0812E26D00B
+:10BCA000822E26D0832E1ED125E0002EEFD12146F4
+:10BCB0002846199AFEF70CFF0028CAD119988078F7
+:10BCC000009019980078C007C00F0190DFE719981D
+:10BCD000002808D1DBE7862E11D0882E11D0892EBE
+:10BCE00011D08A2E11D00720B3E710460EE0084687
+:10BCF0000CE002200AE0032008E0052006E0062010
+:10BD000004E0082002E0092000E00A20002222715D
+:10BD100001216A461176211D0791002801D020716A
+:10BD2000FAE0169801280CD0A66AE06A02220121E6
+:10BD300010900020A0602846173002291AD0012157
+:10BD400019E0E66AA06A1090032030702078FB2387
+:10BD5000C006C00F7070B07801221840009BF370CD
+:10BD60008008019B800018430221B0700020707190
+:10BD70003071DEE70021890009190861681C022A78
+:10BD800001D0012100E00021890009190861B07883
+:10BD90008007800F01285ED1109880788007800F7F
+:10BDA000012858D110980079844610984079009065
+:10BDB000169801281DD0317908A801747179017590
+:10BDC00008A8027C6046024008A8007D009908404F
+:10BDD000139010433FD06C491A98884207D3012131
+:10BDE0008904884215D364490968884211D2102019
+:10BDF0002FE70CAA0DA91998FEF7ABFE08A8007C46
+:10BE000061460840307108A8007D009908407071B3
+:10BE1000D6E720463C3021460090F031169801913B
+:10BE2000022834D000211A9B20460C33FFF7ABFECA
+:10BE30000028DDD12046503021460090F43116987C
+:10BE40000191012825D0002120461A9B139AFFF763
+:10BE50009AFE0028CCD110988078400702D4E87F61
+:10BE6000C0072BD0169902A8012914D0109909787F
+:10BE70004900405A21780907490F4900C8408707FF
+:10BE8000BF0F2AD0012F14D0022F0FD113E00121B0
+:10BE9000C9E70121D8E721780907490F4900405A2D
+:10BEA000109909784900C8408707BF0F032F04D0B5
+:10BEB00004E0022711E001270FE00227169801286D
+:10BEC0000BD1B078FB210840E97FC907490F08432F
+:10BED000B07020780007400F3070207810224008A2
+:10BEE000400020701099D2434978C907C90E114308
+:10BEF00008402070C00623D4022F21D0012F21D06A
+:10BF00000020A061E0612062606220461830A060DD
+:10BF1000E87F40084000E877204606A98830FBF714
+:10BF200073FE002806D0022804D06F2010490001BB
+:10BF30000AF079FA25212846FDF799F9002088E6CC
+:10BF4000032008E020460D211B300AF04BF9204663
+:10BF50001830A060042069460875E87F0121084375
+:10BF6000E87705AA29461798FEF730FED4E70000C7
+:10BF7000BCAE00008E05000028000020400B002011
+:10BF8000606701000230000000800100F0B587B05A
+:10BF900015460E0004460DD06A48854207D301209D
+:10BFA0008004854206D368480068854202D210208A
+:10BFB00007B0F0BD2046FDF722F9070004D038781D
+:10BFC000272803D00820F3E76048F1E700231A464A
+:10BFD0001946204600F0CEFD040003D15C495D48BF
+:10BFE0000AF021FA0020002E05D0022E08D0012EE2
+:10BFF00011D00720DCE701216A461171A06018E02A
+:10C00000234618336946A360087110222946184652
+:10C010000AF08BF80DE021461831A16069460871DD
+:10C02000A061E061206260620621284608F0C8FD38
+:10C03000A0612078C10714D0400840002070022081
+:10C04000694608702046183002907030FBF7DCFD1E
+:10C05000022806D0002804D03E483D4923300AF08B
+:10C06000E2F925213846FDF702F90020A0E770B576
+:10C0700094B00D460646002B02D0072014B070BDC8
+:10C08000FDF7BDF8040007D02078222802D3A07F56
+:10C09000400603D40820F1E72C48EFE7002D19D023
+:10C0A0002D216846017046801022294601A80AF019
+:10C0B0003CF8E07F297C4008C9074000C90F0843CD
+:10C0C000E077297C40078906400FC90EC900084364
+:10C0D000E07703E02E2168460170468009A9684692
+:10C0E000F6F741FF694609782D2905D1002803D1CB
+:10C0F000A17F10221143A177A17FBF221140A17718
+:10C10000BCE710B50C46FDF77AF8002805D00E49BB
+:10C1100009688C4203D2102010BD0C4810BD214686
+:10C12000FFF762F8002010BD05E00278401C002AED
+:10C1300001D0002070470A46491E89B2002AF4D176
+:10C14000012070470080010028000020023000001C
+:10C15000BCAE00000F07000030B50346072903D02E
+:10C160000820DA781C7916E00720FAE707290BD0B7
+:10C170005500ED186D79072D01D0401EC0B2521C3C
+:10C18000D2B20F2A07D105E05500ED186D79072DC1
+:10C19000F3D0F4E700222546641EE4B2002DE5D179
+:10C1A00030BDFFB581B00C461646114620460A9FA9
+:10C1B0000B9DFFF7D1FF00280AD020790F2803D369
+:10C1C000FEA1A0200AF02FF9A078C00907D019E03D
+:10C1D000072E02D0112005B0F0BDFD48FBE7019805
+:10C1E0002880381D6880002068712871EF800498CD
+:10C1F00028812846F6F7DFFE002803D1EFA1AD2005
+:10C200000AF011F9E07821794018491CC0B2217177
+:10C210000F2801D30F38C0B2400000194671817950
+:10C22000F12249084900114081710020D3E7FFB590
+:10C2300083B01C4616460F4600231A4602210C9D69
+:10C24000039800F097FC010008D033463A46019568
+:10C2500000940398FFF7A5FF07B0F0BDDC48801EEF
+:10C26000FAE7F0B5054616460F4650888DB0002314
+:10C270000122022100F07EFC040003D1CFA1DF20C7
+:10C280000AF0D1F8002069460871A078400603D171
+:10C29000CAA1E3200AF0C7F8042F5ED32A78D0079A
+:10C2A000C017401C06D161786B78994255D121782E
+:10C2B000090752D00121142A46DA012A42D0122A53
+:10C2C00002D0132A40D128E00C2F3DD1A27852068B
+:10C2D000520E012A38D0207800090001401C20703D
+:10C2E000687860706846017168792A7901021143A3
+:10C2F00068460181E879AA790102114368464181C3
+:10C30000687A2A7A0102114368468181E87AAA7A1A
+:10C31000010211436846C1811AE0062F14D120782A
+:10C320000009000120707188012001F0C8F8022185
+:10C3300068460171C91E018168792A790102114399
+:10C3400068461FE0062F0AD06A461279002A1BD0E1
+:10C350007088324601A9FDF77AFD0DB0F0BD207856
+:10C360000009000120707188012001F0A8F8022165
+:10C370006846017168792A79010211436846018192
+:10C380000021C9434181E3E70028E6D0748868466C
+:10C3900081766978C176022181830021C18304A856
+:10C3A00005220090062311462046FFF740FF002893
+:10C3B000D3D088A1D6200AF036F8CEE7F7B58CB0F6
+:10C3C00015460C990D98F9F7CEF9C0B2082851D14D
+:10C3D000002069468885688800230122022100F038
+:10C3E000C9FB040004D1FF2074A163300AF01BF8DC
+:10C3F00001230021E07822790BE046003619767996
+:10C400009E4201D1491CC9B2401CC0B20F2800D1C4
+:10C4100000201646521ED2B2002EEED1002902D1C3
+:10C4200017206946888504AB02330BAA00950C9946
+:10C430000D98F7F73BFC0006000E07D002281BD032
+:10C44000032817D0FF205DA1893011E06846808D58
+:10C4500000280FD002A901910090688804230122CE
+:10C460002146FFF79EFE002804D0FF2053A176301E
+:10C4700009F0D9FF0FB0F0BD68781021084368704B
+:10C48000F8E70020584902464300401CCA520828D9
+:10C49000FAD3704700218170017809090901017000
+:10C4A00000214170C1700171704770B50D460023C5
+:10C4B0000122022100F05EFB040004D1FF203FA115
+:10C4C000CF3009F0B0FFA0786906C009C001490E5D
+:10C4D0000843A07070BD704710B50146012000F000
+:10C4E000EEFF10BD3EB58DB2002301220221284689
+:10C4F00000F040FB040004D1FF2030A1E43009F03B
+:10C5000092FF20786946000900012070022008701F
+:10C5100036488880C88000222846FDF798FC3EBD3A
+:10C52000F7B505460078002700090C463E4601286D
+:10C5300004D0FF2021A1F33009F075FF287A0328E9
+:10C540000CD041201DA1C00009F06DFF0298002C05
+:10C55000068001D0278066800020FEBDEA89702712
+:10C5600010460A3086B2002C0AD06888A080A889BC
+:10C570002081E28020460A30296909F0D6FDE5E7EE
+:10C5800002980680E8E7F8B543680246D9799C79B5
+:10C59000090221435C7A1E7A25025C88981D354386
+:10C5A000241FA14238D11B79022B35D1042D34D060
+:10C5B000052D3DD0062D34D0402D19E07372635CFB
+:10C5C0006C326361705F636F72652E630000000000
+:10C5D000043000007372635C6C326361705F636F80
+:10C5E00072652E6300000000000C0020FFFF0000B9
+:10C5F00012D3061D0F461446284600F0E9F9082814
+:10C600000AD01120207003202072A581E7812661C5
+:10C610006078082108436070F8BD001DFFF7CEFE6A
+:10C62000F8BD031D50880A461946FEF7C4FEF8BD42
+:10C63000001DFFF716FEF8BD70B50D4600238CB047
+:10C6400006461A46022100F095FA040031D02078FF
+:10C650000007000F01282ED01220694688746078E8
+:10C660000523801CC874082088822888C8826888AE
+:10C670000883A8884883E888888302A90C20019150
+:10C6800000901A4621463046FFF78BFD00280ED158
+:10C69000F02300223146012000F06CFE20780009D2
+:10C6A0000001401C20706078801C607000200CB07D
+:10C6B00070BDCD48FBE71120F9E770B50D460023AA
+:10C6C0008CB006461A46022100F054FA040006D047
+:10C6D00020780007000F012803D00820E7E7C248B0
+:10C6E000E5E71321684681746178C1740221818273
+:10C6F000C58202A906200523019100901A46214611
+:10C700003046FFF74EFD0028D1D120780009000106
+:10C7100020700020CBE7F3B581B00D460023012245
+:10C720000221019800F026FA00260446002803D1D1
+:10C73000AE49AF4809F077FE2079A8423BD2AC4819
+:10C74000AA49401C09F06FFE35E0E07841000F195E
+:10C75000401C7979C0B20091E0700F2801D100200F
+:10C76000E0702079401E2071B879C00708D0009889
+:10C770000199042815D09D498220183109F053FEF3
+:10C78000B8790007410F08D0400F019904280CD058
+:10C7900096498F20183109F046FE009807280AD1E3
+:10C7A00007E00846FEF784FEEAE70846FEF753FE78
+:10C7B000F3E7761CF6B228466D1EEDB20028C4D110
+:10C7C0003046FEBD10B500230122022100F0D2F94F
+:10C7D000040004D1B5208549800009F024FEE078EA
+:10C7E00021794018C0B2E0700F2801D30F38E070F3
+:10C7F00000202071A07880210843A07010BDF8B5FA
+:10C8000017460D4600231A46022100F0B3F9040032
+:10C8100005D0002D0CD0002F07D0062006E0072DF4
+:10C8200001D00820F8BD0720F8BD0820A84204D890
+:10C830006F486E49423009F0F6FD29462046FFF761
+:10C840008BFC0646002F28D0002E26D1E0782179D7
+:10C850001CE0420012195379072B03D093791B0770
+:10C860005B0F04D0401CC0B20F280CD00CE040007D
+:10C8700000198079F12318406B071B0F1843907142
+:10C8800000290AD104E00020491EC9B20029E0D1E4
+:10C89000574856495A3009F0C6FD3046F8BDF8B53C
+:10C8A0000D4600231A46022100F064F9040004D169
+:10C8B0004F484E49683009F0B6FD681E052804D37C
+:10C8C0004B484A49693009F0AEFD0F21E2782079E2
+:10C8D000002310E0560036197779AF4206D1B179BE
+:10C8E00049084900B1715B1CDBB21146521CD2B23F
+:10C8F0000F2A00D100220646401EC0B2002EE9D108
+:10C900000F2905D248000019817901221143817154
+:10C910001846F8BD10B50446402801D2072010BDC6
+:10C9200000F056F8082802D03120000210BD002186
+:10C93000304802E0491C082903D24A00825A002AE2
+:10C94000F8D1082903D049004452002010BD04202A
+:10C9500010BD10B5402801D2072010BD00F038F8F6
+:10C96000082805D00021234A40001152084610BD76
+:10C97000052010BDF0B58BB016460C00074607D059
+:10C98000002E05D06188402904D207200BB0F0BDED
+:10C990001020FBE72088002801D0172801D90C209F
+:10C9A000F4E7084600F014F808280FD0258803A8FB
+:10C9B0002A463146023009F0B8FB01A8009062888F
+:10C9C0002B4607213846FFF732FCDFE70520DDE77D
+:10C9D00001460020074A02E0401C082803D2430019
+:10C9E000D35A8B42F8D1704702300000BCC500001A
+:10C9F000AD020000000C0020F8B50546E54C079E8E
+:10CA0000069821706270A370E6702071681C42085D
+:10CA10005200E14B0021880000198446C261605C2D
+:10CA200040008218002D0AD0002005E0664647002D
+:10CA3000F669401CF353C0B2665C8642F6D8491CC6
+:10CA4000C9B20529E7D30026D21C9708B000BF0061
+:10CA500000198760304600F042F9A15D761C48431A
+:10CA6000C219F6B2052EEFD3501B80B2F8BDF0B557
+:10CA70000546C84F8C460020FF247E5DA9009646DF
+:10CA80000346CF190CE0F9695A008A5AC2498A4212
+:10CA900004D1401CC0B2FF2C00D11C465B1CDBB291
+:10CAA0009E42F0D86146002909D100280BD0002D04
+:10CAB00007D0B84949788E4203D2401EC0B2002840
+:10CAC00001D071460C70F0BD70B5B24C8D000023E2
+:10CAD0002D19615C09E0EC695E00A45B844202D11F
+:10CAE0001370012070BD5B1CDBB29942F3D80020AB
+:10CAF00070BDFEB51C4617460D46060008D0002D39
+:10CB000006D0F01C80088000B04203D01020FEBD8B
+:10CB10000E20FEBD002F03D0002C01D0A74201D96A
+:10CB20000720FEBD0094234622463946002001948A
+:10CB3000FFF762FF2988814207D0814201D2042198
+:10CB400000E0092128800846FEBD009423462246C5
+:10CB5000394630460194FFF74FFF28800020FEBD84
+:10CB600010B5044600F0C5F8002801D0E0B210BDB1
+:10CB7000FF2010BDFFB50546874881B01E460C4614
+:10CB8000854204D0052C02D20398022802D300204B
+:10CB900005B0F0BD002769460F7028466A46214659
+:10CBA000FFF792FF00280ED068460178204600F07B
+:10CBB000A8F8002EECD00028EAD1284600F099F819
+:10CBC000002809D103E03846002EF6D1E0E7FF2027
+:10CBD00072A15C3009F027FC21462846039A00F038
+:10CBE0009CF8D5E7F8B505460C4600206A4E694624
+:10CBF0006E4F0870B5423BD0052C01D30720F8BD1D
+:10CC00000A4621462846FFF75FFF002830D06846D5
+:10CC10000178204600F075F8230009F0F5FC0504C2
+:10CC2000090C11161B0001462846FEF7D5FA15E03F
+:10CC3000FDF7E0FA12E001462846FFF74CFC0DE054
+:10CC400001462846F6F7B5FF08E001462846F8F702
+:10CC500012FC03E056A17B2009F0E5FB4D4A684633
+:10CC6000A10000788918C96940000E520020F8BD63
+:10CC70003846F8BD524A1268914201D210207047DE
+:10CC8000052801D3072070470872002048727047BA
+:10CC9000F8B504464A480068844201D21020F8BD25
+:10CCA000207A3C4A83009B18617A3B4D125C11E06C
+:10CCB000DE694F00F65BAE420AD04A1C6272DA6946
+:10CCC0004B00D25A228000F01CF860600020F8BDB2
+:10CCD000491CC9B28A42EBD861720520F8BD0EB575
+:10CCE000384B40000ECB0091029301926946085ADE
+:10CCF0000EBD28494978814201D9012070470020A2
+:10CD0000704770B50C460546FFF7E9FF214AA900B8
+:10CD1000891889686043401870BDF8B50C4606460E
+:10CD200000206946134608706A4619462046FFF7F8
+:10CD30009EFE002500282BD0164A6846A1000078E8
+:10CD40008918C96940000E52684601782046FFF7ED
+:10CD5000D8FF0546230009F057FC0504090C0F1401
+:10CD6000170029463046FEF713FA11E0FDF720FAC6
+:10CD70000EE0FFF78FFB0BE029463046F6F7E0FEAA
+:10CD800006E0F8F771FB03E009A1622009F04BFB14
+:10CD90002846F8BD100C0020FFFF00007372635C92
+:10CDA000686F73745F636D2E6300000002300000D3
+:10CDB0007372635C686F73745F636D2E6300000051
+:10CDC000280000206C67010010B5014620220948A8
+:10CDD00009F0ABF907490020C877084610BD06499D
+:10CDE000012048610548064A0168914201D10021AD
+:10CDF00001607047400C00200005004078000020D2
+:10CE0000BEBAFECA8107C90E002808DA0007000F63
+:10CE100008388008C24A80008018C06904E0800891
+:10CE2000C04A800080180068C8400006800F704724
+:10CE3000BD4948788978884201D3401A02E021220E
+:10CE4000511A0818C0B27047B74923314878897819
+:10CE5000884201D3401A02E02122511A0818C0B2B8
+:10CE60007047B149463148788978884201D3401AE1
+:10CE700002E02122511A0818C0B27047A94910B522
+:10CE80000C310868FF22120290430122D2031043A2
+:10CE90000860A54900202331487088702339487004
+:10CEA0008870463148708870A04808F0C8F89F48DC
+:10CEB000401C08F0C4F8F5F741FC00F028F910BD5B
+:10CEC00020207047B4E770B50C4605460026FFF7F2
+:10CED000AFFF9549A04214D30A46203A00232046CA
+:10CEE000641EE4B200280BD08878105C2870887823
+:10CEF0006D1C401CC0B288702128F0D18B70EEE709
+:10CF0000012600F004F9304670BD202070479BE7F1
+:10CF100070B50C4605460026FFF796FF824923317F
+:10CF2000A04214D30A46203A00232046641EE4B2ED
+:10CF300000280BD08878105C287088786D1C401C05
+:10CF4000C0B288702128F0D18B70EEE7012600F086
+:10CF5000DEF8304670BD202101700020704710B50A
+:10CF60000446FFF77EFF2070002010BD70B50C4610
+:10CF70000546FFF776FF6C494631A04215D30A46B5
+:10CF8000203A00232046641EE4B200280BD08878A3
+:10CF9000105C287088786D1C401CC0B288702128F5
+:10CFA000F0D18B70EEE7002400E0614C00F0AFF8A8
+:10CFB000204670BD70B50C460546212904D9FF20D6
+:10CFC0005CA1473009F02FFA55484068103840B24C
+:10CFD000FFF718FFC6B20D20FFF714FFC0B286425C
+:10CFE00007D2FF2053A14D3009F01DFA01E0F5F7FB
+:10CFF000E8FB21462846FFF766FF0028F7D070BD02
+:10D00000F8B507464948484C401E474E007825462B
+:10D0100046362335002806D1A9786878212200F009
+:10D020006BF800280ED0A1786078212200F064F817
+:10D03000002814D0B1787078212200F05DF8002823
+:10D0400028D033E038496878C91C0F546878401CF0
+:10D05000C0B26870212829D10020687026E03249CA
+:10D06000607820390F546078401CC0B2607021286D
+:10D0700001D1002060702D4F7F1E3878002815D018
+:10D08000A1786078212200F037F800280ED0002027
+:10D0900038700BE02449707826310F547078401CAA
+:10D0A000C0B27070212801D100207070A978687812
+:10D0B000212200F021F800281DD0A17860782122DB
+:10D0C00000F01AF8002816D0B1787078212200F00C
+:10D0D00013F800280FD0F5F756FB144807F0B7FFF8
+:10D0E00001214903884203D016A1C12009F09BF910
+:10D0F0000E4807F0C4FFF8BD401C884205D090429E
+:10D1000001D1002901D0002070470120704710B5DF
+:10D11000064807F09CFF002801D1F5F723FB10BD5E
+:10D1200000ED00E000E400E0800C00207D00002025
+:10D13000072000007372635C736F635F72616E64DB
+:10D140002E6300007372635C736F635F72616E6461
+:10D150002E6300000C4908784A78401CC0B2904207
+:10D1600000D008707047094A074820BF40BF20BF61
+:10D170004178037843701368002B02D103788B4207
+:10D18000F3D00020704700007F00002000E200E0A4
+:10D19000FEB5F34C07466068FF213E0181552178BA
+:10D1A000FF2913D00901083141583246491E08327F
+:10D1B00009020192090A805800F0C8F9002802D03B
+:10D1C0002478254615E06168207888552770FEBDD3
+:10D1D000E34842680198115828010090083010581F
+:10D1E00000F0B4F9002806D1DD482C4641680098CB
+:10D1F0000D5CFF2DECD1DA4821014068855547547C
+:10D20000FEBD70B5D64A04460020157A53680AE080
+:10D210000201561C9E5DA64203D10C329A588A42E6
+:10D2200004D0401CC0B28542F2D8FF2070BDF8B5D2
+:10D23000CB4F3E7801F013FE0146FF2E68D034013B
+:10D24000254678680835405900F080F9022802D94F
+:10D25000786840595AE0C2494868025D0A70A11CCA
+:10D26000425C002A0CD0521E425441590122D20580
+:10D2700089180902090A41513046FFF789FF30E059
+:10D28000631CC25C0092221D94468258002A10D072
+:10D2900001239B029A420FD99205920D43595703DD
+:10D2A000DB191B021B0A43516346C3589A1A920AA0
+:10D2B00009E0FF21C1540AE0435952039A181202AF
+:10D2C000120A4251002242543046FFF761FFA4483F
+:10D2D0000C344168C26800980959800012580098BF
+:10D2E00090479F4C2078FF2812D001F0B8FD0146EE
+:10D2F0002078626800010830105800F027F90128F2
+:10D3000096D92078616800010830085801F09AFD2C
+:10D31000F8BDF8B51C4615460E460746FF2B03D34D
+:10D3200090A1D32009F07FF88D48FF21C7604560A8
+:10D3300004720674017000224270104604E002017B
+:10D34000521C401CA954C0B2A042F8D3F8BD70B51D
+:10D35000834C06466578207C854203D381A1E62074
+:10D3600009F061F8E068A90046506078401C6070E0
+:10D37000284670BDFFB581B01D46FF2401F06FFD4A
+:10D38000774F064679780198814203D875A1F42039
+:10D3900009F049F872480021037A406810E00A0158
+:10D3A0009446521C825CFF2A24D0019FBA4205D1C8
+:10D3B00062460C328758029A97421DD0491CC9B266
+:10D3C0008B42ECD8FF2C17D021014B1C019AC25480
+:10D3D0000B33029AC250039B614F0022012B0ED0E7
+:10D3E0000B1DC25001239B029D4216D9AA05920D26
+:10D3F00008D008E00C46E1E7FF2005B0F0BD0B1DAA
+:10D40000C550EFE71A4653039B190E461B02083618
+:10D410001B0AAA1A8351920A09E0002D00D10125A6
+:10D420006B039B191D022D0A0B460833C550891C3E
+:10D4300042543D463E782046FFF7AAFE2878B04287
+:10D4400015D001F00CFD014628786A68000108300B
+:10D45000105800F07BF8012807D928786968000186
+:10D460000830085801F0EEFC01E0FFF7E0FE0198FB
+:10D47000C3E770B50C46054601F0F1FC06462146AF
+:10D480002846FFF7BEFEFF2817D0354D0401204681
+:10D49000696808300858314600F058F8012109033E
+:10D4A00040186968A41C095D400B002901D089025D
+:10D4B0000818002800D1012070BD002070BDF3B510
+:10D4C00081B00F460198FFF79CFEFF282AD0244D1B
+:10D4D0002E7869683246344604E0844205D02646F8
+:10D4E0002301CC5CFF2CF8D11CE0FF2C1AD0A64203
+:10D4F0001FD11001085C2870FF2818D001F0AFFC84
+:10D500002A780146120168680832805800F01EF837
+:10D51000012809D92878696800010830085801F005
+:10D5200091FC06E00020FEBDFFF781FE01E001F066
+:10D5300091FC39460198FFF79CFF22016968FF239F
+:10D54000541C0B558A5C3301CA54FEBD401A0002BC
+:10D550000121000AC905884200D900207047000057
+:10D56000CC0C00207372635C736F635F74696D65CC
+:10D57000722E6300F0B500241C4A01211C4B0803E5
+:10D58000546018601B4B1C601B4C20601B480469D6
+:10D59000E443E406E617046910252C430461184CA3
+:10D5A0006160184D2960761C00E020BF1F68002FC5
+:10D5B000FBD0002E03D107691026B743076190689E
+:10D5C0008005906801D5104A10436960A160002170
+:10D5D00019600121084A09031160F0BD10B5044625
+:10D5E000FFF7C8FF2060002010BD000000C500400C
+:10D5F00080E100E000C1004080E200E000ED00E0DA
+:10D6000000C3004000C0004000FCFFFF70B51F4990
+:10D610000A68002A17D000231D4601244A68521CBC
+:10D620004A60092A00D34D600E792246B2400E6846
+:10D6300016420AD072B60B6893430B6062B6496813
+:10D640000160002070BD052070BD5B1C092BE5D377
+:10D650000FA1362008F0E7FEF5E70120104980050C
+:10D6600008607047EFF31081CA07D20F72B601212C
+:10D6700081400648036819430160002A00D162B660
+:10D68000EBE7024800210160416070478400002000
+:10D690007372635C736F635F6576742E6300000062
+:10D6A00000E200E001208107086070470120810747
+:10D6B000486070471048C068C00700D0012070471C
+:10D6C0000D488068C00700D0012070470A484069B3
+:10D6D000C00700D0012070470748C069704706495D
+:10D6E0008A69D20306D589698907890F814201D1E8
+:10D6F000012070470020704700040040F8B5F84C46
+:10D70000207BE17A88421CD00126F64D0027E07A82
+:10D71000215C14200A4642435019037C052B11D08A
+:10D72000037C062B1CD0037C072B28D0437C012BC9
+:10D7300033D0EDA1EF4808F076FE207BE17A8842F5
+:10D74000E5D1F8BD0674E07A0A2807D0E07A401CDB
+:10D75000E072491CC8B2AA5802210CE00020F7E789
+:10D760000674E07A0A2808D0E07A401CE072491C6E
+:10D77000C8B2AA5803219047DFE70020F6E70674F5
+:10D78000E07A0A2807D0E07A401CE072491CC8B24F
+:10D79000AA580821EFE70020F7E74774E07A0A2843
+:10D7A00007D0E07A401CE072491CC8B2AA58072191
+:10D7B000E1E70020F7E770B50024CF4E0620707235
+:10D7C000CE4825464477047738300473C472CC4879
+:10D7D00007F035FCCB480575F572CB49601E8860B3
+:10D7E0007571B570F57035717570C848643905701C
+:10D7F00045701420604340180574641CE4B2052C85
+:10D80000F7D30120F5F764F80020F5F761F801205F
+:10D81000B071F4F727FDBE48F4F736FDBD4C20701B
+:10D82000BD48F4F731FD6070F4F7F2FF70BD10B53C
+:10D83000F5F719F8B74C2078F4F744FD6078F4F761
+:10D8400041FDAD4C207A002803D0F4F7CAFD00203A
+:10D85000207210BD70B5A84CA079002804D0A2A1F8
+:10D86000AE4808F0E0FD70BDE07A002803D19EA12B
+:10D87000AB4808F0D8FD0126A6710025E572607A54
+:10D88000042114225043974A801801749E488168ED
+:10D89000491C04D0691E81600120F5F719F80020A9
+:10D8A000F5F716F8F4F7FAFF07F00AFDF5F7FBF8BD
+:10D8B0009C480560056001209B49C0030860F5F79E
+:10D8C00071F992480078022804D0032804D1E07846
+:10D8D000002801D0A67000E0A570F5F7D0F870BD63
+:10D8E000034680490520142242435218203A127FF1
+:10D8F000002A04D0401E0006000EF4D17047142206
+:10D90000424351180A46803AD366012220390A77E9
+:10D910007047012805D0032805D1002903D1002034
+:10D9200070470029FBD010B4734C00236370774A12
+:10D93000002890700CD002280AD007291AD20800BB
+:10D9400078440079001887441505070D0F1113005E
+:10D95000D37003E01B2000E03A20D07001206070FB
+:10D9600010BC70475820F8E77720F6E79620F4E7D8
+:10D97000B520F2E710BC0020704710B5634840782E
+:10D98000F5F798F880B210BD411E1422504310B52F
+:10D99000544A8418203C042902D8207F002803D14F
+:10D9A00051A1624808F03FFD207F012804D0B32038
+:10D9B0004DA1800008F037FD0020207710BD70B524
+:10D9C0004E4C607F217F884201D1012500E0002577
+:10D9D000F5F709F8F5F76EF8617F227F914201D1E2
+:10D9E000012100E00021A942EBD170BDF7B5074647
+:10D9F000481E84468EB0C0B2142205905043394A66
+:10DA000085180495287C2D1D07282AD1344C002622
+:10DA1000E07A227B824221D0235C059A934201D195
+:10DA2000012601E0002E04D00A2811D0421CA25C7D
+:10DA300022540A280ED0401C227BC0B28242EBD175
+:10DA4000002E0BD0207B002806D0207B401E04E057
+:10DA50000022ECE70020EFE70A202073049A01205F
+:10DA600010746046244C042813D8142041431D48E8
+:10DA700008182038007F00280BD00498007C01286B
+:10DA80000BD00498007C012803D01098807A0128DC
+:10DA900007D015A1264808F0C6FC1098807A012806
+:10DAA0006FD104980F4B007C022845D00C4C207B92
+:10DAB0000A2872D0207BE17A401C884203D10AA157
+:10DAC0001C4808F0B0FC049901204874217B05989B
+:10DAD0006054207B0A2864D0207B401C20731CE10A
+:10DAE000D80D0020E80D00207372635C72656D2E06
+:10DAF00063000000CF0500006C0E0020A00D002088
+:10DB0000780E0020C00D00204C0E00208E0000205A
+:10DB10002FD200008C000020FDD600007D02000006
+:10DB20005E02000000F5004080E200E0CB02000051
+:10DB30001503000022030000607A059A0146904216
+:10DB400006D0014614267043C018807C9042F8D15C
+:10DB5000627A824208D1617A14225143C918897CC1
+:10DB600061720121A17207E014224243D2181426E7
+:10DB70007143927CC9188A74142206215043C0183C
+:10DB800081741098007A062819D201007944097925
+:10DB900049188F440812100E0C0AE07A00288ED023
+:10DBA00091E700209AE700200FE0B4200DE07320F9
+:10DBB0000BE0322009E00A2007E0062005E0FF2004
+:10DBC000FDA1E03008F02FFC0020029010980168C1
+:10DBD0000298081A28601099097A002912D00221A7
+:10DBE000401A0102090A296010980268406810185A
+:10DBF0000002000A68601098807A0228109803D00A
+:10DC0000007B74E00421EBE7007A002813D00222A5
+:10DC1000029810188446109842686046083016181A
+:10DC2000E848029A4078904202D9E278002A04D06B
+:10DC30003046083005E00422EAE7029A801A80198B
+:10DC40000830627A062A1CD0627A14235A43DE4BCB
+:10DC5000D2185268914214D0DC4B0793617A142297
+:10DC60005143D94A89184A688968D21BC91B1202D4
+:10DC70000902120A090A90423AD89A4238D89942BF
+:10DC800036D83818801B0002000A286010996044BA
+:10DC9000CF4AC9680002000A9446421A01239B0534
+:10DCA00007929A4201D2104614E00A1A09929A4247
+:10DCB00001D207980EE0079A6346624503D9591AC4
+:10DCC0000818401C06E0099A624506D9181A40183F
+:10DCD000401C4042002860DC03E0B7A1BD4808F0CA
+:10DCE000A2FB286880190002000A686000202872E0
+:10DCF0006868082608300002000A68601098407AB8
+:10DD0000A8721098007A687203280ED200280CD0EE
+:10DD1000FFF7D0FC002803D007E0002011B0F0BDD1
+:10DD200002983A210E1A32200290A6480178012961
+:10DD300001D0032909D141780298814205D9E078C0
+:10DD4000002802D10298081A861928689F4AC01B29
+:10DD5000844601026868090AC01B03021B0A029379
+:10DD60008E421AD81346914217D80299994214D874
+:10DD7000617A062915D0667A6146062203920092DE
+:10DD80001422914B7243D2189368DB1B8B4216D836
+:10DD90000396967C062EF3D177E0059801F055F9AD
+:10DDA000BBE70499022205980A74627A062A00D019
+:10DDB000627A8A7460720120A07211B0F0BD062EE2
+:10DDC00063D000223146944614227F4B4A43D21836
+:10DDD0005368DB1B834229D2917BAB7A99421FD8CF
+:10DDE00004980521059C01747B4D287B0A2811D0DD
+:10DDF000287BE97A401C884203D16FA1774808F05C
+:10DE000012FB287B2C54287B0A2807D0287B401C37
+:10DE1000287382E7E87A0028EFD0F2E70020F7E7DE
+:10DE200001218C46917C0629CED102E06046002873
+:10DE30002AD03546009114202A46424362480621E2
+:10DE4000171839741038007B0A28634816D0017BF4
+:10DE5000C07A491C814203D157A1614808F0E3FA16
+:10DE60005D48017B4554017B0A290BD0017B491C8D
+:10DE70000173BD7C0098A842DDD106E0C07A00287D
+:10DE8000EAD0EDE70021F3E70096049902204E4D19
+:10DE90000874607AB04207D1049900988874059894
+:10DEA00060720120A07221E00398062E0FD0062890
+:10DEB00003D141A14B4808F0B6FA0398142250430D
+:10DEC0004019059981740499009888740EE0062819
+:10DED00003D139A1444808F0A6FA0398142250430C
+:10DEE000401905998174049906208874012011B0A5
+:10DEF000F0BD70B50D463D4A441900210B46101A7D
+:10DF00008B4103D22CA13A4808F08DFA394885425A
+:10DF100003DD29A1384808F086FA3848854203DA3B
+:10DF200025A1374808F07FFA3648844205DA002CEC
+:10DF300001DB204670BD334800E03348201870BD37
+:10DF4000401E70B5C0B2142148431F494418607B7D
+:10DF5000062813D201007944097949188F44020C2C
+:10DF60000A080604002068E0B42010E073200EE0E8
+:10DF700032200CE00A200AE0062008E0FF200EA173
+:10DF8000E03008F050FA617B0020002955D00221D2
+:10DF90004018616840180002000AF4F78BFD0C2558
+:10DFA0006557124A441900210B46101A8B412FD293
+:10DFB00001A10F482AE000007372635C72656D2E48
+:10DFC000630000008E000020E80D0020FFFF3F00EE
+:10DFD000FFFFFF000E070000D80D00200702000021
+:10DFE000C5030000DD030000E3030000FF7F841E83
+:10DFF000F50300000020A107F603000000E05EF832
+:10E00000F70300000080841E00807BE108F00BFA1B
+:10E01000FB48854203DDFB49FB4808F004FAFB4856
+:10E02000854203DAF749FA4808F0FDF9F9488442D5
+:10E0300007DA002C03DB204670BD0421A8E7F54871
+:10E0400000E0F548201870BDF0B5064683B0F348EF
+:10E050000190457A029534687068001B0702F04809
+:10E060003F0A001B0090062D2DD014202946414365
+:10E07000EC480122081884464168E9489205864622
+:10E08000081B904210D3631A93420DD30246704688
+:10E09000724503D900984018401C05E073450ED91D
+:10E0A000411A0819401C404200280CDA60460295CB
+:10E0B000857C0198C0790028D5D003B0F0BDD14946
+:10E0C000D94808F0B0F90298854226D01421484377
+:10E0D000D4490123401802908068D1499B058C46A1
+:10E0E000011B8646994210D3221A9A420DD36346E9
+:10E0F000614503D900997144491C06E019466245FF
+:10E100002DD9091A0819401C4142002905DD029841
+:10E11000B17A807B814200D37446062D15D0C14967
+:10E120001420454368184268121B1202120ABA42B0
+:10E130000BD2B37A827B934200D38468857C0198AA
+:10E14000C0790028B9D1062DEAD13068A042B4D0F8
+:10E15000E0190002000A3460706003B0F0BDA94904
+:10E16000B14808F060F9D8E7F0B5B049044648680E
+:10E1700085B0C005C00D1CD0103840B200280CDAA4
+:10E180000207120F083A920892005118C9698007D5
+:10E19000C00EC1400806800F09E08108A44A89002A
+:10E1A000891809688007C00EC1400806800F002842
+:10E1B00008D000272078002806D0012804D00020AD
+:10E1C00005B0F0BD0127F5E72079062813D201003C
+:10E1D0007944097949188F44020C0A080604002082
+:10E1E00018E0B42010E073200EE032200CE00A208A
+:10E1F0000AE0062008E0FF208249E03008F013F929
+:10E2000021790020002905D002214618834D002FD6
+:10E2100002D003E00421F8E70020E871694602AA71
+:10E22000A068F4F751FC694608228A56E06801A903
+:10E2300080180122C01C1F2801DA019209E003AAFC
+:10E24000F4F742FC6846007B002802D00198401C8D
+:10E25000019000990198401808300002000A0190CE
+:10E26000881B0002000A0090607969468872009855
+:10E270000390F4F7B8FB009A019B121A181A6D4923
+:10E2800012020002120A000A8A4216D8884214D8E2
+:10E290006846FFF7D9FE00990398814205D0881996
+:10E2A0000002000AF4F706FCA0600120E9790029C9
+:10E2B00086D0002FB0D005B0F0BD0020F6E7F3B552
+:10E2C0008FB05D480C460B9006F0C1FE5B4A0F997B
+:10E2D000524F56185A4D203E00280BD05948007D09
+:10E2E000002803D058A15B4808F09DF82078012849
+:10E2F0007ED060E1687F0A280CD0687F297F401CAF
+:10E30000884203D150A1544808F08DF820780128A4
+:10E3100004D00CE0287F0028F4D0F7E7F07F002835
+:10E3200003D049A14D4808F07EF80120F077697FBD
+:10E330000F9814224A4E51438919087420780228F4
+:10E3400022D0687F14214843861920793072607981
+:10E35000707232460C323146A068F4F7B5FB0C20DF
+:10E3600030560F2804DD1F3830733068401C306091
+:10E370000C217156301DE26801905018C01C1F28F6
+:10E3800070DA01200199FDE028494868C005C00DF8
+:10E3900021D0103840B200280CDA0207120F083AD8
+:10E3A000920892005118C9698007C00EC140080642
+:10E3B000800F09E081081E4A8900891809688007D2
+:10E3C000C00EC1400806800F002804D105201EA100
+:10E3D000000208F028F8687F1421484386190021BC
+:10E3E000E0686A460691117006A9F4F76DFB00E03B
+:10E3F000D7E06A46002010560F2834DD012033E0B4
+:10E400000020A107B8DF0000F603000000E05EF87E
+:10E41000F70300000080841E00807BE16C0E00206A
+:10E42000FFFFFF00E80D00200E07000000ED00E0F8
+:10E4300000E400E0FFFF3F00780E00209200002083
+:10E44000A00D0020C00D00207372635C72656D2EFC
+:10E450006300000011050000EF040000F404000058
+:10E46000E00C002082E0002006994018079002206E
+:10E47000B0722079307260797072A068311DC01C52
+:10E4800006911F2801DA012009E0F4F71DFB684618
+:10E490000078002804D0069806990068401C08609F
+:10E4A000307A062813D201007944097949188F443B
+:10E4B000020C0A08060400200FE0B4200DE07320CF
+:10E4C0000BE0322009E00A2007E0062005E0FF20EB
+:10E4D000FD49E03007F0A7FF00202179002943D053
+:10E4E00002214018069071680830081807990890B2
+:10E4F00009180698081A0C900020F871F4F773FABE
+:10E5000004463060079820180002000AF060787A0C
+:10E51000062825D0797A14204143EC480818406831
+:10E520000899029040180002000A0390707A694628
+:10E53000887402A8FFF788FD0299039A091B121B31
+:10E5400009021202E24B090A120A0C98994207D8F2
+:10E55000824205D80299069808180002000A306025
+:10E56000F8790028C8D110E00421BAE704AA01997B
+:10E57000F4F7AAFA6846007C002804D001980199B3
+:10E580000068401C08602078B072687F0A2806D0B6
+:10E59000687F401C68770B9806F071FD47E000200B
+:10E5A000F8E7F07F002804D0A320CAA1C00007F03C
+:10E5B0003AFF0120F077CA490F98087420780228A2
+:10E5C00003D1C4A1C74807F02EFFC54E2079307291
+:10E5D0006079707232460C323146A068F4F774FAF2
+:10E5E0000C2030560F2804DD1F3830733068401C73
+:10E5F00030600C22B256301DE16801908818C01CB2
+:10E600001F2802DA012001990BE003AA0199F4F70F
+:10E610005BFA6846007B002804D0019801990068E5
+:10E62000401C08602078B072AD4901200875687FF1
+:10E63000297F884224D07C7A062C23D0F4F7D3F9A2
+:10E6400014214C43A14961180A7C042A18D00A7C81
+:10E65000032A15D04B6889681B1A081A1B0200028E
+:10E660009B4A1B0A000A082B0AD31146934207D87B
+:10E67000884205D8687F297F884201D0F4F7FFF9E6
+:10E6800011B0F0BD687F297F8842F7D111B0F0BD8D
+:10E6900010B50020F4F709F910BD10B50120F4F70A
+:10E6A00004F910BDF1B5009802281ED08E4C607A96
+:10E6B000062803D187A18D4807F0B5FE0026A67174
+:10E6C0000125E572607A03211422804F5043C0195E
+:10E6D0000174F4F7D9F9009800280BD0012829D04B
+:10E6E000032879D07BA1824844E082480078F3F780
+:10E6F000EFFDF8BD8048007F002803D075A17F485A
+:10E7000007F091FE65717C4D00202E60F4F7E0F873
+:10E71000A968481C04D0012300221846F4F70EF91A
+:10E72000607A617A401CC0B2142251437A580121A8
+:10E730009047F8BD0120F4F7CBF8607900280DD0A0
+:10E740006D488068401C09D0607A617A401CC0B274
+:10E75000142251437A5806219047F8BD6648007F3D
+:10E7600001280AD0022812D0032822D0042834D04D
+:10E7700058A1634807F057FEF8BD2079002803D060
+:10E780002671F4F786F9E5705B480677F8BD207AC4
+:10E79000002802D1F3F7FCFD2572607A617A401CF3
+:10E7A000C0B2142251437A5800219047524806774C
+:10E7B000F8BD514F0123397B78680022411A184671
+:10E7C000F4F7BCF82079002803D02671F4F761F93A
+:10E7D000E57002203877F8BD19E0474E217870685F
+:10E7E0000123411A00221846F4F7A8F8207A0028DD
+:10E7F00002D1F3F7CDFD2572607A617A401CC0B278
+:10E80000142251437A58002190473577F8BD607A39
+:10E81000617A401CC0B2142251437A5805219047B6
+:10E82000F8BD10B5304C607A062803D129A13548CF
+:10E8300007F0F9FD607A617A401CC0B2142251439E
+:10E84000224A52580421904710BDF0B583B00620EB
+:10E850000290F4F7C8F8244C0090617A2A4801909D
+:10E86000062920D0617A1420414318480918097CF0
+:10E87000042918D0617A142251430818007C032817
+:10E880007BD0019900980B6849681B1A081A1B0273
+:10E8900000020F4A1B0A000A082B6ED3114693424E
+:10E8A0006BD8884269D814488068401C03D009A1FD
+:10E8B000164807F0B8FD00206071607A06282CD158
+:10E8C0006078002829D023E0B8DF0000E80D0020A0
+:10E8D000FFFF3F007372635C72656D2E6300000082
+:10E8E000C00D00201E0500006C0E00204F0500002A
+:10E8F000A20500008C0000204C0E00205B050000EB
+:10E9000096050000A90500005C0E0020E50500004A
+:10E91000FE48C178417081780170607A062815D070
+:10E92000607A1421FA4A48438018007C04280DD1EB
+:10E93000607A0290607A0121142358438018017490
+:10E94000607A58438018807C6072A172F14D687FB4
+:10E95000297FF14F884233D0F04E287F142148435D
+:10E960008019007CC05D0128287F07D048438019AA
+:10E97000007CC05D02282FD044E0FDE11421484313
+:10E980008019807A01280AD0287F0221142250435E
+:10E990008019007CC155287F0A2808D009E0287F0B
+:10E9A0000021142250438019007CC1552AE0002028
+:10E9B00001E0287F401C2877687F297F8842CCD1DE
+:10E9C000D74D287D00284CD0287CC15D012928D056
+:10E9D000C05D022830D03AE0287F142148438019D6
+:10E9E000807A012803D0CFA1D14807F01CFD297FF0
+:10E9F00000201422514389198872297F51438919B3
+:10EA0000097CC855287F142148438219287F484330
+:10EA10008019017C0098FEF7E9FF287F0A28C8D1F9
+:10EA2000C5E7A97A012904D00221C1550020287523
+:10EA30000DE00021C1550AE0A87A012803D0B9A150
+:10EA4000BC4807F0F0FC0020A872297CC855287D3E
+:10EA5000002806D0297CB24A0098FEF7C7FF0020A4
+:10EA60002875029806281ED014214843A84940184A
+:10EA7000017C012917D107210174AF4D287B0A2899
+:10EA80003CD0287BE97A401C884203D1A5A1AB4841
+:10EA900007F0C9FC297B02986854287B0A2831D0EA
+:10EAA000287B401C2873607A06287DD0A07A002835
+:10EAB0007BD00020A072617A1420414394480E1844
+:10EAC0009F49B56873680A46F6687C32CB679660E2
+:10EAD00055609C4D697E002916D00226617A142269
+:10EAE0008B4851430818407B06281BD2010079440B
+:10EAF000097949188F440A1412100E0CE87A00287C
+:10EB0000C4D0C7E70020CDE70426E7E700210FE0E7
+:10EB1000B4210DE073210BE0322109E00A2107E066
+:10EB2000062105E0FF208849E03007F07CFC002149
+:10EB30002973687E022801D0012810D12869009A23
+:10EB40004018821A1202120A3A2A08D932380321CE
+:10EB500000026976000A28613220287308E0322911
+:10EB600006D2207A00280AD1F3F712FC012005E032
+:10EB7000207A002803D0F3F734FC00202072634988
+:10EB80000822487820700978012901D0032906D18C
+:10EB900001212171297B884201D9421A0832A378C8
+:10EBA000002B00D0921C01E08DE09BE02179002930
+:10EBB00001D1002B5DD09446644A00990092019ADD
+:10EBC000176852687F1A511A3F0209023F0A090A60
+:10EBD000BC451BD85D4A974218D8009A914215D877
+:10EBE000297B884223D92B69421A9A1A1202120AE7
+:10EBF000101880190002000A2A616860002914D0E8
+:10EC0000032028770006000E3ED14CE00020207142
+:10EC1000A070297B002925D028694018801900029E
+:10EC2000000A6860022028772EE00120E9E781428F
+:10EC30000BD92A69511889190902090A6960002843
+:10EC400001D00420DDE70220DBE7002B03D135A152
+:10EC50003F4807F0E8FB286980190002000A686055
+:10EC6000002004E0296989190902090A69602877E6
+:10EC700019E0287B00280FD02969081880190002A4
+:10EC8000000A686002202877286901238119002280
+:10EC90001846F3F753FE09E0286980190002000ABC
+:10ECA0006860002028770120F3F712FE607A1421B3
+:10ECB000484317490C2240188256012300206968F6
+:10ECC000F3F73CFE0EE00120F3F702FE0020F3F71D
+:10ECD000FFFDF3F7E3FD207A002803D0F3F781FB73
+:10ECE00000202072A078002804D0F3F7D2FE002084
+:10ECF000E070A0706078002804D00448C1784170AA
+:10ED000081780170207900282BD023E08E0000202C
+:10ED1000E80D0020A00D002091000020E00C002054
+:10ED2000C00D00207372635C72656D2E630000007D
+:10ED30000706000023060000D80D0020350600005D
+:10ED4000E00D00204C0E0020B8DF0000FFFF3F0068
+:10ED5000870600000020CF49E0700978002900D123
+:10ED60002071CD48017BC07A814203D0CB484078E6
+:10ED7000F3F7AEFA0120E07103B0F0BDF0B5C84C76
+:10ED80000746607A83B0062803D1C6A1C84807F0B9
+:10ED90004AFB607A1421C74E48438019007C03283F
+:10EDA00003D0C0A1C44807F03EFBC44DA868401C76
+:10EDB00003D0BCA1C24807F036FB607A1421484357
+:10EDC00081190C20085600216A4600911171C01962
+:10EDD00001AA6946F3F778FE6A46042010560F2808
+:10EDE00001DD012000E0002000994018696840180A
+:10EDF0000102090AA9606079002804D001230022D9
+:10EE00001846F3F79BFD03B0F0BD70B5AE4CAD4AAC
+:10EE10000B1AA34214D3451AA54211D3934203D926
+:10EE2000101A43185B1C0BE0954204D9511A0818BC
+:10EE3000401C434204E0A549A54807F0F4FA00232A
+:10EE4000184670BD10B50146012300220220F3F7D9
+:10EE500075FD10BD10B50220F3F73AFD10BD10B5D9
+:10EE6000F3F7C1FD10BDF0B58D4D0446E87A83B0CF
+:10EE7000002803D18BA1974807F0D5FA642C4DD315
+:10EE8000954900200246091B824147D39348417FA0
+:10EE9000007F814242D19248007D00283ED1687AAD
+:10EEA0001421844F4843854EC519306801AA0019C2
+:10EEB0006946F3F709FE694604200856002802DD7A
+:10EEC0000098401C0090A96800986B680A18D21A34
+:10EED0001202844B120A9A4220D8AA7C062A08D031
+:10EEE00014235A43D2195268511A0902090A81425D
+:10EEF00014D3B068401C05D00120F3F7E9FC0020D2
+:10EF0000C043B060306800193060A86800994018AC
+:10EF10000002000A7061012003B0F0BD002003B0C0
+:10EF2000F0BDF8B50646401EC5B2142061496843DD
+:10EF30004418207C002803D15AA16B4807F073FACB
+:10EF40006648017F407F81420CD0684A14234B43BE
+:10EF50009B181B7CB3420CD00A290CD0491CC9B2A7
+:10EF60008142F3D15E48017D002964D0007CB0422B
+:10EF700061D10020F8BD0021F1E7217C052905D0F1
+:10EF8000217C062902D0217C072928D10121217466
+:10EF9000C17A0023027B8A4221D00246565CAE42EF
+:10EFA00001D1012301E0002B04D00A2911D04E1C0D
+:10EFB000965D56540A290ED0491C167BC9B28E4262
+:10EFC000ECD1002B0BD0117B002906D0117B491E00
+:10EFD00004E00026ECE70021EFE70A211173617CD1
+:10EFE00000292AD06774C17A0023027B8A4224D088
+:10EFF000425CAA4201D1012301E0002B04D00A297E
+:10F0000012D04A1C825C42540A290FD0491C027B50
+:10F01000C9B28A42ECD1002B0FD0027B0146002AF4
+:10F0200006D00A7B521E04E00022EBE70021EEE747
+:10F030000A220A7301E018480027217C01299CD18B
+:10F04000617C002999D10120F8BD70B505461420D6
+:10F05000184A05216843801801740F4C207B0A2848
+:10F0600011D0207BE17A401C884203D11749204807
+:10F0700007F0D9F9207B2554207B0A2807D0207B74
+:10F08000401C207370BDE07A0028EFD0F2E700202A
+:10F09000F7E700008E000020D80D00208C00002033
+:10F0A0006C0E00207372635C72656D2E630000004D
+:10F0B000EA060000E80D0020EB0600004C0E0020E0
+:10F0C000EC060000FF7F841E0020A107B8DF0000CF
+:10F0D0000E0700002D070000FF1FA107A00D002054
+:10F0E000C00D0020FFFF3F006A070000E00C002079
+:10F0F0000702000070B5FF4D00246C702C70AC61ED
+:10F1000000F0CEFC284620304470C473AC6214304A
+:10F110002C6305F094FF002804D0FF20F6A14E30A8
+:10F1200007F081F92C7770BD0B23DB4310B5C21AB1
+:10F13000F54998421FD008DC1C3222D00A2A20D080
+:10F14000142A1CD0182A08D117E0083011D004283E
+:10F150000DD0082809D00C2805D0FF20E6A1753075
+:10F1600007F061F910BD04200CE000200AE0FC204B
+:10F1700008E0F82006E0F42004E0F02002E0EC20B3
+:10F1800000E0D820C86010BD70B50125DF49022617
+:10F190000E60DF490022CA63CD63DE49C96A0907F0
+:10F1A0000ED4DC494031CB6ADB4A53620B6B93626D
+:10F1B0004B6BD3628B6B1363C96BD30519435163DC
+:10F1C000D14C002826D0012828D0FF20CAA1A13088
+:10F1D00007F029F9D148A063FF200430606325635C
+:10F1E00003202061C849962040314860C1491C2055
+:10F1F0000856FFF799FFCB49C9488860C948CA49F2
+:10F2000080304160C9490160C9480660C949102081
+:10F21000486070BDC8486061C84803E0C848606184
+:10F22000C648801FA061D5E770B50C46B14D0146B8
+:10F230000622A81C06F079FF2C7270BDAD48203064
+:10F2400040787047AB4A517010707047F8B504466B
+:10F250000D465079117900020843690009190884A4
+:10F260001F461646501C06F0C1FF317800020843C5
+:10F27000A90060502846083001268640002F0ED095
+:10F28000012F04D0FF209CA1E83007F0CCF8206BC0
+:10F29000304301460120A84001432163F8BD206BA3
+:10F2A000B043F6E770B50D460446082904D9FF209F
+:10F2B00091A1F93007F0B7F80022A24809E09100C7
+:10F2C000635809180B6053001B191B8C0B62521CEE
+:10F2D000D2B2AA42F3D3206B9A494031086070BD84
+:10F2E00010B50446FFF720FF8248047710BD81481F
+:10F2F0002030007B704710B5834CC178616206F006
+:10F3000075FF0002E06110BD252808D0262808D02E
+:10F31000272808D041000A2807D8091D06E0022145
+:10F3200005E01A2103E0502101E0891DC9B2764AA7
+:10F33000916075494031486170476E4988617047F6
+:10F3400070B5002818D002226A4C784B0320A272B4
+:10F35000F0331860734D72486860002001262075F4
+:10F3600000290BD0012910D002291BD0952062A1C1
+:10F37000800007F058F870BD0122E5E77248012AC5
+:10F3800001D0466070BD066070BD5A48012A006B0E
+:10F3900005D00121490508432063696070BD012142
+:10F3A0000905F8E7A069002803D153A1674807F0D1
+:10F3B0003AF8A169A06A40186549886059486549CA
+:10F3C0008030816060491031C1600120216BC00331
+:10F3D00001432163686047482030C67370BD08B59B
+:10F3E0000C20694608705148002110380161564AC6
+:10F3F000012111610BE000BF00BF00BF00BF00BFD3
+:10F4000000BF00BF00BF6A461178491E11706946EF
+:10F410000978002902D001690029ECD068460078FB
+:10F42000002804D1494834A1203006F0FCFF08BD73
+:10F43000F8B53E4CF034206886083E48B600416876
+:10F44000C906CD0F10218160002727603549344857
+:10F450008860FFF7C4FF35481038076100F020FBD3
+:10F460002660002D02D0334910204860F8BD10B549
+:10F4700006F0BCFE00022449000AC86310BD2349FF
+:10F48000022008602A49086070472049022080391C
+:10F4900008607047304908707047164810B534301E
+:10F4A00005F0D5FD002804D0284813A15A3006F0F5
+:10F4B000BAFF10BD0F4810B5343005F0E0FD10BDA7
+:10F4C00011494860704770B50A4D0446A86AA042C9
+:10F4D00004D31E4808A16B3006F0A5FF0120287355
+:10F4E0001C49002008392C6148601948446000F02C
+:10F4F000DEFA70BD7C0E00207372635C68616C5F25
+:10F500007263732E630000000015004080E100E08C
+:10F51000C01F004080000010001700405B06000084
+:10F520000040000400F50140408000401011004000
+:10F5300080E200E000130040060102002500030203
+:10F5400005010300001600400010004047020000C3
+:10F5500040850040488100409700002010B5FF48DA
+:10F5600002210173C6210161FD4A00215160806AB8
+:10F57000FC49C630486000F09AFA10BD0121FA48F3
+:10F5800089058160F548026B8A430021026301739B
+:10F590007047F64801214160C160F1490020486090
+:10F5A000F0494860ED4988627047F149402008629F
+:10F5B000F0490A6802430A607047EE480168402239
+:10F5C00091430160EA49002008627047E9480168F8
+:10F5D000102291430160E849012088617047E749A2
+:10F5E0000020C861E34801681022114301607047A0
+:10F5F000E249CA69012A01D000207047DC4A9268BA
+:10F600005206520E524202700020C861012070471B
+:10F6100070B5D248D24D017B002902D0696801291A
+:10F6200009D00024D5490A69012A06D00023807A2E
+:10F63000012804D006E00124F4E74023F7E7CA6874
+:10F64000012A04D000221A43012802D004E020221B
+:10F65000F9E74B68012B05D000231343C84A022861
+:10F6600002D007E01023F8E71668012E02D1CE6819
+:10F67000012E04D000261E43022802D007E00826EF
+:10F68000F9E71268002A02D1CA68012A04D00022D0
+:10F690003243022802D005E00422F9E7002C01D011
+:10F6A000022300E000231343022807D14868012801
+:10F6B00004D16868012801D0012600E00026B14885
+:10F6C0001E4302681206120E02D04A69012A00D0B7
+:10F6D0000022A24C2034227300680006000E02D0E3
+:10F6E0008869012800D000206073A148006A0028C2
+:10F6F00003D000F0A8FA012800D00020A07300F089
+:10F70000C7F9002068603046F3E670B50C00054686
+:10F7100003D19D499D4806F086FEE00706D0012CE6
+:10F7200004D06D209849C00006F07DFE002D0ED05B
+:10F7300002218A4801294172C4728E4809D00229E7
+:10F740000AD0924890491A3006F06DFED1E60121A8
+:10F75000EFE70168042201E001680822114301601B
+:10F76000C7E670B57D4C0022E37A990701D54107C1
+:10F7700014D47A49DD062031002D05DA4D7B002DA9
+:10F7800002D08D7B002D09D01D0702D50D78002DEC
+:10F7900004D15B0703D54978002900D10122637A9F
+:10F7A0007449002B06D00225284010430CD0FFF7E7
+:10F7B0003FFE9EE66C4A76489060086880088000AC
+:10F7C000086000F06DF994E6012B07D0022B0ED0F3
+:10F7D0006E486D496B3006F026FE8AE60868042202
+:10F7E0009043086000F05CF90120A07281E608688F
+:10F7F00008229043086000F053F9A57279E6574952
+:10F8000008757047F8B5554F544D2037FA7B564C64
+:10F810000021286B002A31D00122D203A26090433C
+:10F820002A46544D10632E685A4A102090600020DA
+:10F8300028601014A060FFF7D2FD00F029F92E60B7
+:10F84000281460605349102048604448817A4A482F
+:10F8500001290DD002290ED04C484FA1801F06F07F
+:10F86000E2FD0020F8733D48007D022874D0F8BD09
+:10F8700001210160F5E701214160F2E73A4A906019
+:10F880000E462963FFF7C4FE044636482E754168CC
+:10F8900069620068A862AA7A022A0AD16A78002AF4
+:10F8A00007D0334B403B5B681B7813402A789A4360
+:10F8B00008D03E70E20708D0084603F04AFD012157
+:10F8C000A86A09E001223A70F4E7A10601D50221F5
+:10F8D00002E0A10702D5002103F04BFD2448403887
+:10F8E00041680622A81C093106F0F2FB002809D164
+:10F8F0001F48297A403840680078C009814201D108
+:10F90000012000E0002078702046FFF72AFF2648FB
+:10F91000007800280DD001284AD002285BD00328A7
+:10F9200078D01DA1214806F07EFDA87A022870D06B
+:10F93000A3E0A00701D502F0EDFB200702D50120CE
+:10F9400002F020FC600702D5002002F01BFCA0069C
+:10F95000EBD502F07CFBE8E793E000007C0E002092
+:10F96000408100404085004000F50140008000409B
+:10F9700040150040001200400010004000110040FF
+:10F980000014004040160040F8F40000630300003B
+:10F9900000400004001300407372635C68616C5F98
+:10F9A0007263732E6300000097000020E6040000DD
+:10F9B000A00701D504F0BBFF200702D5012004F009
+:10F9C00021FF600702D5002004F01CFFA006ACD583
+:10F9D00004F0A4FEA9E7A007BF27002802DA3C40F4
+:10F9E000F3F702FB200703D53C400120F3F7FBFAB5
+:10F9F000600703D53C400020F3F7F5FAA00602D5D6
+:10FA00003C40F3F7EFFA60068FD5F3F7EEFA8CE798
+:10FA100000E012E0A00701D5F3F7EAFA200702D5CB
+:10FA20000120F3F7E4FA600702D50020F3F7DFFACC
+:10FA3000A00690D5F3F7DAFA77E7287B00281CD0E8
+:10FA40001F494E6002281FD0012803D01D491E48BF
+:10FA500006F0E9FCA96A2869884204D81A481949BD
+:10FA6000401C06F0E0FC2969184841600120296B20
+:10FA700080050143296316494860287D012800D08C
+:10FA8000F5E6F3F7C5FAF8BD2969A86A4118EBE76E
+:10FA900010480021C160016141604161816170478E
+:10FAA0000D480021417281720121C17270470A48DC
+:10FAB0000121026B89050A430263054841607047D2
+:10FAC0004081004098F90000FB04000040850040A0
+:10FAD00000F50140001100407C0E00202E4800215E
+:10FAE00001704170704770B5064614460D460120FE
+:10FAF000F1F758FC28490120284B08709E60DC6013
+:10FB00001D6170BDF8B504460120F1F74BFC224998
+:10FB10000120087021494C60214900264E600321D4
+:10FB2000204D0906A960204F002C0AD0012C03D0DB
+:10FB30001EA1412006F077FC3E60032000066860AD
+:10FB4000F8BD386001200006F9E710B512480178C9
+:10FB500000290ED00321134A0906916010494A6812
+:10FB60000021002A03D0154A1268427000E041705B
+:10FB700001700020F1F716FC10BD0748017800293C
+:10FB800007D007484068002802D00C480068C0B27F
+:10FB900070474078704700009800002000F5004052
+:10FBA00000F1004000F5014000F200407372635C18
+:10FBB00068616C5F63636D2E6300000000F40040B9
+:10FBC0003A4800210170417010218170704770B572
+:10FBD000064614460D460220F1F7E4FB01203349A6
+:10FBE000334A0870E41E14619660556070BD10B50C
+:10FBF0000220F1F7D7FB2D49012008702D48002184
+:10FC000001604160816001202B49C005486010BD42
+:10FC100010B5264C2078002811D001202649C005B7
+:10FC2000886000F034F80021002804D001206070C2
+:10FC30002248006801E061701020A070217000204F
+:10FC4000F1F7B0FB10BD10B51848017800290BD0B2
+:10FC500018480068002805D000F019F8002800D0E6
+:10FC6000012010BD022010BD407810BD10B50F4816
+:10FC70000178002909D000F00AF8002803D00F48C5
+:10FC80000068C0B210BD102010BD807810BD0948BA
+:10FC90000168002905D04168002902D08068002849
+:10FCA00001D0002070470120704700009A0000201A
+:10FCB00000F5004000F1004000F5014000F4004074
+:10FCC000FFB593B0044600201D9E049015981C9D1E
+:10FCD0001027082806D0E06901F014F8002809D0A0
+:10FCE0003770CCE028880921384328801F980227E4
+:10FCF000017016E0E169012088710521E269C902FD
+:10FD00009180E1698872E169F9480881E169002020
+:10FD10008873288820210843288011211F980427F0
+:10FD200001701F980225801C0390307810900A20E3
+:10FD30003070204618301190F6F76BFC00206FE011
+:10FD40001598102809D1022D07D06846828A049997
+:10FD50000398401A8270110AC1706846C08A1699C9
+:10FD6000884203D9E349097A149106E0884204D114
+:10FD70001099002901D0317021E003990870000A20
+:10FD800048701E980088401BC01B83B2FF20C01B18
+:10FD9000984200D203460398149AC0190CA9009205
+:10FDA000019002912020015D6846C08A0022F6F78A
+:10FDB000A5FC3070002806D0C0B2832862D0684607
+:10FDC000C08A208345E00F98002805D0C948006804
+:10FDD00000790A2830D33CE06846008EC119C9B2C8
+:10FDE0000491022D0FD01F99049A4978914203D1B2
+:10FDF0006A46128C824209D0BE480491006801789C
+:10FE0000032909D027E008461F994870B9480068BF
+:10FE10000178042906D008E000790A281BD20120C5
+:10FE20000F9009E06946C98A8180039904980818EF
+:10FE300003900498281885B205AA14991198F6F72A
+:10FE4000EBFB002805D11E980088401BB84200DB60
+:10FE500076E7022D0ED01598102807D1049A039941
+:10FE60006846808A891A8870000AC8701E980580C2
+:10FE7000002030709F4800680078032802D00020DE
+:10FE800017B0F0BD0220FBE7F8B50446406B002632
+:10FE9000134600282BD0491F8DB2618F2A460832A5
+:10FEA000278F8A18BA4221D89A7840185F781102B1
+:10FEB00039430170090A41701A79DF781102394318
+:10FEC0008170090AC1700571290A41712A46591DBC
+:10FED000801D06F02AF9608FAD1D401980B2608741
+:10FEE000626B002110180170417000E00926304655
+:10FEF000F8BD30B50B88048F9C4212D9446BE018D2
+:10FF00004478057824022C430BD0447905792402E7
+:10FF10002C436404640CA41D1B190B80106000208A
+:10FF200030BD822030BDF7B588B000256846058217
+:10FF300005275DE00398417802780E021643417967
+:10FF4000027908021043000452D40A980123068063
+:10FF500005A802905B02002200970195304609999E
+:10FF6000F6F7CCFB04004AD16846018A0183039866
+:10FF70004179027909021143437802781C02144343
+:10FF8000B4421ED10A041CD44B0401215B0C89032A
+:10FF900000950B4301970295C17880780A020243CD
+:10FFA00020460999F6F7C6F9040011D1039948795A
+:10FFB0000A79000210430122D20310430871000A9B
+:10FFC000487103AA06A90898FFF793FF0400CED052
+:10FFD0000399009501970295487809780002084333
+:10FFE00069468B8A00220999F6F7A4F9822C06D17A
+:10FFF00003AA04A90898FFF77CFF04009AD068467A
+:020000040001F9
+:10000000058209E003984179027909021143490404
+:10001000490C0171090A417103AA04A90898FFF764
+:1000200068FF0028EED0822C02D020460BB0F0BD35
+:100030000020FBE730B50446406B002597B0002850
+:100040000DD00B2268460270228F0281606B0391F3
+:10005000019000216846F3F7E2FA6846057065638F
+:100060006587258717B030BDF8B50F460546696B23
+:100070000020069E144600290FD0012B0DD13246D8
+:1000800039462846FFF74FFF002806D1002C04D040
+:1000900032463946284600F044FEF8BD0022028070
+:1000A000C262831D0263C3614263428702872030BC
+:1000B0000170704710B50022D24302800420FDF782
+:1000C000FEF910BD10B596B00446FFF7B3FF208EC1
+:1000D000002808D0012069460870E06A01900021DC
+:1000E0006846F3F79CFA0020E062206316B010BD6A
+:1000F00001280000B40E00200146098800200A07EC
+:1001000000D501200A06120F01D002221043CA05B1
+:1001100001D5042210438A0501D510221043490558
+:1001200001D5202108437047FFB5A9B00600329DD4
+:10013000359C2B981F46229016D0007841060FD48C
+:100140008106890E1E2909D021884A05520E0BD13D
+:100150003A88172A08D3FE4A914205D0C10906D031
+:100160008006800E122802D003202DB0F0BD20465C
+:100170002C302690F7492A980872002018AA03907C
+:1001800010726A46107404AA0A60339A4A6020AA60
+:10019000908090812298007801908106681C1C90C4
+:1001A000701F1D902B98890EC21C2492224620326B
+:1001B0001B92083A401C02920B0006F025FA1FFD24
+:1001C000FD11FD1FFD8EFDFCFDFBFDFAFDF9FDFCA3
+:1001D000FDF8FDFDFDF7FDF6FDFDFDFDFDF5FD0066
+:1001E000032E76D102E018A9087219E303202870C3
+:1001F0001C9917220A7000224A70CFE2052EF0D116
+:100200004178027808021043208320A98880249A2C
+:100210005178127809021143618300287ED0884208
+:100220007CD800202072E080401E60840298F6F79F
+:10023000F0F905202870A81C0190022000901BAA4C
+:100240002A990298F6F7E8F9002868D118A8807C66
+:10025000012803D002206870102002E0012068709D
+:1002600002202490002225A91CA8F2F746FD0028B0
+:100270002BD120A8007D2499814226D13A8800996B
+:10028000801C511A814220DB10A8C18D0198017099
+:10029000090A417001991CA8891C01910099019AD1
+:1002A000891C009125A9F2F728FD20A8007D01995D
+:1002B0001BAA091801910099081880B200902A9988
+:1002C0000298F6F7A9F90028CCD00098022826D089
+:1002D00064E272E018A9087261E2072E6DD34178DA
+:1002E0000346027808021043208320A98880249ABC
+:1002F0005178127809021143618300280ED0884298
+:100300000CD8012020725879197900020843E08046
+:1003100000202073E06900F0F5FC01E098E0A9E01E
+:1003200000280ED1E169012088710521E269C90226
+:100330009180E1698872E16987480881E16900205C
+:100340008873F01F60842298C01D60620298F6F7DF
+:1003500060F907202870681C00900120019000209F
+:1003600010A9C8852FE00198012814D0E069807990
+:10037000012830D000981E38417F007F09020143D8
+:1003800000980170090A41700098801C0090019843
+:10039000801C80B2019010A8C18D00980170090ADC
+:1003A00041700098801C09E00AE296E13BE1DFE041
+:1003B00004E29BE077E036E016E2AFE000900198BF
+:1003C000801C80B201901BAA2A990298F6F724F9A2
+:1003D000002803D007E010A8818DD1E73988019863
+:1003E000081A0428BFDA0198012843D0E06980790F
+:1003F000012804D010A8818D5548814206D110A84B
+:10040000818D00980170090A417009E000981E383A
+:10041000417F027F0802009910430870000A48706B
+:100420000198801CBAE1072E01D0152E76D14178B3
+:10043000027808021043208320A98880249A5178EA
+:100440001278090211436183002801D0884201D942
+:1004500001203FE7012020720020E0802073052E5C
+:100460000AD01D982299E269C0B2491DF2F71FFC1B
+:10047000002801D00A202DE70020C04360841AA87C
+:10048000019023A9229802970395009100780023F8
+:100490008206920E20462A99FFF712FC0390208BC9
+:1004A00020A988807BE1032EC0D1402220A98A8127
+:1004B0004178027808021043208320A988802A9975
+:1004C0001EAB1C9A02930192009139880022491EAA
+:1004D0008BB21B990978F6F711F918A90872002850
+:1004E00033D10B20287010A8008F3FE0052E9DD13E
+:1004F000802220A98A814178027808021043208353
+:10050000249984464A78097812020A43628420A911
+:1005100088801248824202D30720DBE6AFE03F200A
+:100520008002024362842A981FAB1C9902930191B6
+:1005300000903888401E83B21B9801786046F6F719
+:10054000DDF818A9087200280CD08328AAD107E08A
+:10055000FFFF0000B40E002001280000010200008F
+:100560000220B8E00D20287010A8808F401C15E1F3
+:1005700001990C22C9095143C91CB14204D90198FF
+:1005800040067CD5002009E1427803781002184328
+:1005900020AA9080844622980078400609D505203C
+:1005A0006A46107422980078C00905D000201074A3
+:1005B0001DE106206A46107424981F902A9A009024
+:1005C0000023701A029383B21E9001921B9800229E
+:1005D00001786046F5F7AEFE18A908720022694658
+:1005E0000A74832801D102200390229800784006E3
+:1005F0000DD52088C00506D520A9208B8988884282
+:1006000001D100206062002018A90872C6E0FF2115
+:10061000013120A88181808820831E9860841F98E2
+:1006200060621320B8E0052E29D3417802780802D1
+:10063000104320A98880218F002902D0FE4A9142D0
+:1006400006D10A216A4611740121C943218702E0BB
+:1006500007216A46117422992A9A491D0192009134
+:1006600001221D990023D203029311438BB22499D6
+:100670004A78097812020A431B99097800E0C9E018
+:10068000F5F758FE18A90872002269460A7401227B
+:10069000520220A98A81832808D0002809D0218FFE
+:1006A000E54881427ED10020208778E08888208339
+:1006B0004DE7606B002808D031462046229AFFF7AC
+:1006C000E3FB18A90872002869D12B463A46304648
+:1006D000229900F056FB039061E02298022E4078A8
+:1006E00001907DD1002801D0012879D108206946E8
+:1006F00008740198087521A800901B9800220178C1
+:100700002046019BFFF7B0FC6946002248758A75B8
+:10071000002802D10198012809D0208F002806D096
+:10072000002008740120800220A988810EE004A81E
+:100730003399F2F774FF0390002069460874012092
+:10074000800220A988810398022807D0BB4800684E
+:100750008079002805D018A908722BE00198208321
+:100760001DE00398002803D0812018A9087240E0FA
+:1007700021A800901B98012201782046019BFFF7D9
+:1007800073FC18A9087220463499FFF753FC18A986
+:10079000087A002803D11920287001203880684683
+:1007A000007C00E03CE0002804D004A83399F2F774
+:1007B00036FF0390039800282ED01AE0062012E599
+:1007C0002078000713D5012E11D109216846017444
+:1007D000A188818204203499FCF771FE082100E091
+:1007E00005E020A88181CDE60198400612D50320BE
+:1007F000039020A9208889890843208020A988891E
+:100800004005400E04D026992B98086026988680D3
+:100810000398AAE40420E6E418A8007A00280ED081
+:100820000120287022980078687020A88088A8701D
+:10083000000AE87018A8007A28710520388020A9DD
+:100840002088898988432080E2E7FFB50746A1B068
+:1008500000201C903A7801209040794A7C68104032
+:1008600010AA1087744B22885B1C9A4203D0002880
+:1008700004D0100702D5012025B0F0BD249E002031
+:10088000307023980025028810A8028518A80575E5
+:100890006A4B68461972057404A8186020462C300B
+:1008A0001B902A985860249E94463878721C052123
+:1008B000039201282DD0022808D003287DD130785A
+:1008C000800980011D303070B889A08038780228F6
+:1008D00004D13078800980011B303070F01C1FAAD1
+:1008E00001900292009110A8008D0022C01E83B2D8
+:1008F0002020015DB889F5F701FF0028DED10398BB
+:10090000B9890170090A417010A9888FC01C088537
+:1009100028E1787B18AA10753A7B012A02D0022AB6
+:10092000CCD1FCE022887F231B011A4010AB1A8730
+:10093000802A4AD006DC102A10D0202A0ED0402A65
+:100940000AD124E0FF3A013A65D0FF3A013A79D062
+:10095000FF3AFF3A022A76D00525A2E02078C006A9
+:1009600001D5082000E010201C9004206A46107475
+:10097000002090821AA81DAA1EAB03960192029035
+:1009800000933B8A20461C9AFFF79AF984E0228B59
+:100990003B8A9646934268D10A221C92002839D19C
+:1009A000039801906046401E1FAA83B20292202045
+:1009B0000091015D0022704600E0BAE0F5F79EFE6E
+:1009C000014618A801750B201AE0228B3B8A964637
+:1009D00093424AD10C221C92002862D103980190C4
+:1009E00060461FAA401E0292009183B22020015D42
+:1009F000628C7046F5F782FE014618A801750D203D
+:100A0000307010A8818F491C01850421684601744B
+:100A1000218B818245E0238B3A8A9C469A4224D1DD
+:100A200012221C9200283CD1606A002813D00022B8
+:100A30006B4607C3638C07E0FEFF0000B40E002086
+:100A400009F800000DE04BE02020015D6046F5F75D
+:100A500071FC18A9087513203070012010A90885B1
+:100A60001FE0398A228B914201D00425B6E016217D
+:100A70001C91002815D11B98818802682046FFF739
+:100A800003FA18A9087500280BD11B983346016892
+:100A900080881AAA00F075F9054602281BD0042D9B
+:100AA00019D01B988088002811D06846007C002847
+:100AB00004D004A82A99F2F7B2FD05460120694640
+:100AC00008741B981B990068059000208880002DF1
+:100AD00048D0052D2ED06846007C032878D07DE0D4
+:100AE00018211C91002806D0388A20832046B96836
+:100AF000FFF7A0FAD5E72046183000902020015DCE
+:100B0000237E01222046FFF7AFFA18A908750028B6
+:100B1000ECD119203070012010A90885E6E7208863
+:100B200001214902084010A90887FF38FF38022830
+:100B300006D0052510A92088098F884320804DE024
+:100B4000208F9849884290D116201C90386900283F
+:100B500005D06063B88A20870020608702E000200B
+:100B6000C043208710A8008F7F21090102468A43D5
+:100B70000DD0782300220420B968FCF7FBFB3878FD
+:100B8000A07010A92088098F0843208002E02188E6
+:100B9000814321806846007C002805D08248416856
+:100BA00004A8F2F73CFD054618A8007D002815D0E2
+:100BB0001C98707001203070208BB070000AF070AB
+:100BC00018A8007D3071052110A8018506E0FFE717
+:100BD0007548416804A8F2F722FD05467248017A7B
+:100BE00020884005400E22D11B98808800281ED006
+:100BF000239A0026138810AA1385249A2A9B6F46ED
+:100C00004CC71B9A039412681AABFFF78DFA05467E
+:100C100002280CD00120694608741B982A990068A4
+:100C2000059004A8F2F7FBFC05461B98868010A8E7
+:100C3000018D2398018028461EE600B597B0042850
+:100C400007D102206A461070019100216846F2F730
+:100C5000E6FC17B000BD10B5534C037800222168A4
+:100C6000012B02D0022B42D126E00B78002B01D0C1
+:100C7000042B03D10A712268032111702168838833
+:100C80000A79D200921D8B5221680A79D20008326B
+:100C90008918C2880A80216803890A79D2000A3239
+:100CA0008B52428920680179C9000C314252216877
+:100CB0000879401C08711EE00A7482888A802168C5
+:100CC000C288CA80226801891181226841895181C4
+:100CD000C1682068C1606168F2F7A1FC0146022882
+:100CE00007D02068007C002802D1002903D0812091
+:100CF00010BD832010BD002010BD406B002800D027
+:100D0000012070478178012909D100880521C90295
+:100D1000884202D0491C884201D10020704705203A
+:100D20007047F7B586B00024684615460F468481A3
+:100D300005261AE0049841780278090211432980B7
+:100D4000811D019602940091417902790B021343AF
+:100D5000C178827809020A43417800780902084381
+:100D60003946F5F7E7FA002806D104AA03A9069840
+:100D7000FFF7BFF80028DDD0822800D1002009B09D
+:100D8000F0BD10B51488844201D2052010BD17248F
+:100D90001C701080421E581C491C05F0C6F900202A
+:100DA00010BD0000FEFF0000B40E002010B540484A
+:100DB00004F04DF9002801D00C2010BDFF211131A5
+:100DC0003C4805F011FA3B4901200870002048809A
+:100DD000E03188718874887520310871344804F0D6
+:100DE0004EF9002010BD10B5314804F028F9002854
+:100DF00003D031A1312005F016FBFFF7D7FF002803
+:100E000003D02DA1382005F00EFB10BD10B504460F
+:100E1000274804F01CF9002801D00C2010BD2549FA
+:100E20000878002807D0002008702148216004F0CD
+:100E300026F9002010BD1E4804F021F91F2010BD26
+:100E400070B505460C461A4804F001F9002801D097
+:100E50000C2070BD174A5088A84202D11078002893
+:100E600004D0134804F00BF9122070BD1048226022
+:100E700004F005F9002070BD10B504460C4804F0DC
+:100E8000E6F8002801D00C2010BD0A48017800299E
+:100E900007D00020C0432080054804F0F0F812205D
+:100EA00010BD40882080024804F0E9F8002010BD01
+:100EB0009D000020C00E00207372635C6C6C5F6448
+:100EC000622E630010B5282105F08CF910BD70B5B5
+:100ED000054600780A0700090001120F1043287028
+:100EE0000B0005F091FB07050705070509050B0039
+:100EF000062408E00C2406E0222404E00024F2A1E9
+:100F0000572005F090FA68788009800120436870C6
+:100F100070BD00780007000F704710B50622C01C96
+:100F200005F003F910BD10B50622093005F0FDF8F3
+:100F300010BD0278BF23C9071A40490E0A43027048
+:100F4000704702785206520EC9010A430270704778
+:100F500070B515460E4604461F2A03D9DAA1A8200B
+:100F600005F061FA20462A463146093005F0DDF8E1
+:100F70006078AD1D80098001A906890E0843607064
+:100F800070BD70B515460E4604461F2A03D9CEA182
+:100F9000CC2005F048FA20462A463146093005F0B3
+:100FA000C4F86078AD1D80098001A906890E084348
+:100FB000607070BD70B501780907090F03292ED044
+:100FC000052931D1411C827E0C46437E1102194312
+:100FD000037FC27D1D02037EC67E1B021343827DFA
+:100FE000407835438006800E22281DD106291BD368
+:100FF0001920C001814217D8FF26F436B54213D814
+:10100000002A11D0082A0FD88A420DD28B420BD861
+:10101000617F227F09021143814207D904E04078B1
+:101020008006800E0C2801D0002070BD012070BD0C
+:1010300000210A464254491C2229FBDB704710B5A7
+:1010400002788B07920892009B0F1A430270427835
+:10105000520952014270012908D0022906D0032901
+:1010600005D0FF2098A1EE3005F0DDF910BD01217B
+:101070000A43427010BD10B502788B0792089200A7
+:101080009B0F1A43027042785209520142700129A3
+:1010900007D0022905D0032904D08BA18E4805F082
+:1010A000C2F910BD01210A43427010BD00788007CB
+:1010B000800F70470278EF23C9071A40C90E0A4310
+:1010C0000270704770B50546C1700B0005F09CFAC0
+:1010D0000E080A0C0E1012120C14141212160C1810
+:1010E0000C2413E0082411E002240FE017240DE083
+:1010F0000D240BE0012409E0092407E0062405E0A3
+:101100007548002470A1A03005F08DF96878400979
+:1011100040012043687070BDC0787047017AC27981
+:10112000080210437047817A427A080210437047E0
+:10113000017BC27A08021043704781794279080224
+:101140001043704700797047817B427B080210434F
+:10115000704770B5017AC37909021943431C857A37
+:101160001C46467A2B023343657926792C02344398
+:10117000C21C5A4E00798D1FB54214D8FF25F43594
+:10118000AB4210D800280ED008280CD888420AD2CA
+:101190008C4208D8507A117A00020843B11D884267
+:1011A00001D8012070BD002070BD0B4610B5011D97
+:1011B0000522184604F0B9FF10BD817A427A080270
+:1011C0001043704701717047007970470B4610B5A6
+:1011D000011D0822184604F0A8FF10BD027B0A700A
+:1011E000407B487070470B46014610B508220E310F
+:1011F000184604F09AFF10BD0B46014610B50422B4
+:101200001631184604F091FF10BD10B50822001DDC
+:1012100004F08BFF10BD10B504220C3004F085FFE4
+:1012200010BD017170474171090A81717047C17128
+:10123000090A017270470079704781794279080282
+:1012400010437047017AC279080210437047017158
+:101250007047017170470B4610B5011D08221846F2
+:1012600004F063FF10BD10B50822001D04F05DFFFF
+:1012700010BD70B515460E4604461B2A03D912A1AF
+:10128000174805F0D0F82A463146E01C04F04DFF1F
+:101290006078E90640094001C90E0843607070BDDE
+:1012A00070B5054640780E46C406E40E1B2C04D9E2
+:1012B0000B4805A10C3005F0B6F82246E91C304673
+:1012C00004F033FF204670BD7372635C756C5F7011
+:1012D00064752E6300000000070200007A0C000015
+:1012E000F7030000C1074008C207C90FD20F511809
+:1012F0004008C207D20F51184008C207D20F511838
+:101300004008C207D20F51184208D007C00F40183A
+:101310005208D107C90F0918500840187047002219
+:1013200002808271C271C2720273427382738270D0
+:10133000C270027142714276828303464284203336
+:101340009A7102859A72C2750276C2730274DA7259
+:101350001A739A7319750284FF21603081709A752F
+:10136000704770B504460020A083208C1E46484379
+:101370001546114604F061FF2084F000294604F070
+:101380004EFF401C80B20146192269439202E0835D
+:10139000914201DD401EE0837D202946000204F0D9
+:1013A0003EFF401CA08470BD70B50546087B0E460C
+:1013B000C006C00E08730020A87504463019007AD4
+:1013C000FFF790FF29194874A97D641C0818E4B23E
+:1013D000A875052CF2D3C0B2252803D979A18A209B
+:1013E00005F021F870BDF8B5044630302646274692
+:1013F0002546C036A03780350090032909D0002942
+:101400001AD0012924D0022902D1A11CFFF7CCFF58
+:10141000F8BD1146FFF783FF002028836883A88367
+:10142000E883288468847871E88538732621085514
+:10143000A08430703071F8BD0020E885B871A188B3
+:1014400023890A460098FFF78CFFA11C0098DDE76E
+:101450000020E885B38A328AA1880098FFF781FFCF
+:10146000F8BD70B5867D0D460446002E01D0252EB0
+:1014700001D9122070BD002A18D0287EE17D50438A
+:101480000818252104F0CBFE0846E1754207520FEB
+:10149000C908504B69189A5C097A8A4368D031466A
+:1014A00004F0BDFE491CCAB2002007E0002070BD58
+:1014B000002803D02118097C511ACAB22118497C8E
+:1014C00091423AD32918097AC943CB07DB17D21ABC
+:1014D000521E1206120E35D08B07DB17D21A521E7F
+:1014E0001206120E30D04B07DB17D21A521E12060C
+:1014F000120E2CD00B07DB17D21A521E1206120E38
+:1015000028D0CB06DB17D21A521E1206120E24D098
+:101510008B06DB17D21A521E1206120E20D04B0673
+:10152000DB17D21A521E1206120E1CD00906C9175A
+:10153000511A491E0A06120E18D0401C0528B7DBA6
+:101540001F2070BDC00013E0C000401C10E0C000B0
+:10155000801C0DE0C000C01C0AE0C000001D07E0B8
+:10156000C000401D04E0C000801D01E0C000C01D9F
+:1015700020769BE738B505460C466846FEF738F8F6
+:1015800000281ED0694600200856207209216156A5
+:101590000022411A00D5494220356B798B420FDC7D
+:1015A000FF2B0DD0A17A491CC9B2A172AB79994227
+:1015B00002D8617A7F2903D160720020A0720122D3
+:1015C000104638BD7372635C6C6C5F7574696C2E09
+:1015D000630000007667010010B5040004D0FF200E
+:1015E000FAA1AB3004F01FFFFB4821464143FB4802
+:1015F000FF230918FF330022581C5A544254C81DB7
+:10160000FF30FA3002704270F448001FC378A342E2
+:1016100002D18270FF23C370EF48EF4BC01E081841
+:101620009B1EC91802700A7010BD70B5EB480026E9
+:10163000001F8670FF24C47035462846FFF7CCFF94
+:101640006D1C2D062D0EF8D00020E4490B229201CE
+:10165000E14B43435B189B181E74401C0006000EB0
+:10166000F6D0DF48FFF7E4FC0021DD48FFF722FD5C
+:101670000121DB48FFF7E3FCDA4804704470847012
+:10168000C4700471447170BDCFE71B20704730B542
+:101690000021D24A0B239B01CF4C4C43A418E418E1
+:1016A000247C002C05D0491C0906090EF4D000202A
+:1016B00030BDC94C01254C43A218D21815740170D5
+:1016C000284630BD10B5044600F0D0F900280CD0F3
+:1016D0002046FFF781FFC0490B224C43BF49002041
+:1016E0006118920189180874012010BD10B50446D4
+:1016F00000F0BCF9002802D0BA484471012010BDA6
+:10170000034610B5B748B44940794843B349421835
+:101710001046FF30E130C17F807F04F0D5FF10BD5F
+:1017200010B5B048AC4940790F224843AB49401846
+:10173000A949D239095CFF30FF3004F09FFF10BD8A
+:1017400010B5044600F092F9002802D0A5480471B3
+:10175000012010BD034610B5A2489F4900794843B7
+:101760009E4942181046FF30E130C17F807F04F06F
+:1017700098FF10BD70B59B4C97492079974D484311
+:101780004019C11DFF31F931FF30E130807F0F2258
+:1017900004F064FF002813D020798F494843401992
+:1017A000FF30FF3002300178491C01700178407829
+:1017B000814204D1884885A1773804F034FE0120A5
+:1017C00070BD884884490079484384494018FF30F7
+:1017D000E130C17F807F814201D10120704700202C
+:1017E000704770B57F487C49007948437B49401871
+:1017F000FF30E130867FC57F0F242946304604F054
+:1018000026FF002801D0204670BD70066906400EF4
+:10181000490E884201D3401A01E0081A201AC0B2CA
+:1018200070BD0F20704770B50C46054600F01EF9DC
+:1018300000280ED0002020706748454367482818CC
+:10184000FF30FF300230017842788A1A22704170EE
+:10185000012070BD70B50C46054600F007F9002860
+:101860000BD05D4845435D482818FF30FF300230FB
+:1018700001784078081A2070012070BD5849016035
+:10188000704710B5044600F0F1F8002802D0554822
+:101890000470012010BD5149091FCA78FF2A02D0E7
+:1018A0000021016007E08A784C492439012A02D0DE
+:1018B000016001207047002070474848801E017871
+:1018C000012908D001210170464801784348001FD2
+:1018D000C170012070470020704710B5044600F029
+:1018E000C5F8002802D03F484470012010BD3B4994
+:1018F0003C4B091FCA785B789A4206D18A78203916
+:10190000002A02D001600120704700207047334850
+:10191000344A001FC1785278914209D1FF21C17029
+:10192000801C0178002903D000210170012070473C
+:101930000020704729482B4A001FC17852789142F5
+:1019400004D18078002801D0002070470120704722
+:1019500010B5044600F08AF8002802D02148C4706F
+:10196000012010BD034610B51E481B49C0784843EE
+:101970001A494018C21DFF320B21FC328901401860
+:10198000C17B807B04F0A0FE10BD10B51548124944
+:10199000C0784843114940180B2189014118C97B7F
+:1019A0000D4AD21E8018062204F068FE10BD0D48B4
+:1019B0000949C0784843094941180B20800108189B
+:1019C000C17B807B81420FD1012070477372635CC1
+:1019D000646D5F712E630000D1020000F40F0020DF
+:1019E000C51200209E0000200020EEE710B504463E
+:1019F00000F03CF8002802D021488470012010BD7E
+:101A0000034610B51E481F49807848431E494018B8
+:101A1000C21DFF320B21FC3289014018C17B807B43
+:101A200004F03FFE10BD10B51548164980780B2212
+:101A300048431549920140181249891E41188018DF
+:101A4000807B062204F00AFE10BD0D480D49807807
+:101A500048430D4941180B2080010818C17B807B49
+:101A6000814201D10120B0E70020AEE7002805D176
+:101A70000648007C002801D00120A6E70020A4E74A
+:101A80009E000020D1020000F40F0020B4120020BC
+:101A9000F8B5FF4E0446B079002500280AD0002989
+:101AA0002DD1657010202070F079A070307AE07030
+:101AB000B57124E0F64F203F387A012804D0707ABF
+:101AC000012810D00020F8BD002918D1657013201E
+:101AD000EF4920701C221639A01C04F026FB0120BF
+:101AE000A0713D720BE0002909D165701420E8490E
+:101AF000207008220A31A01C04F017FB7572012027
+:101B0000F8BDF8B5E3480178002902D00C2630462C
+:101B1000F8BD0026DE4D3446403D2E756E75EE75DF
+:101B20002E76AE75294620396E730F464E734037B8
+:101B30007E717F218170687E002804D0FDF73DFD15
+:101B4000FEF766F86C763C72D14884711430FFF76A
+:101B5000B9F9CF483C30FFF7B5F9D8E710B5CD4B10
+:101B600000221A70CA4B203B1A711A46603A11665D
+:101B7000D065FFF7C6FF002804D0FF20C6A187303C
+:101B800004F051FC10BDC2484038007D7047C04988
+:101B900010B54039C87B897B42078307D20FDB0F22
+:101BA000D218C007C00F101840000B0004F02CFD25
+:101BB000050B060B04080F00BB4906E0BB4810BD2F
+:101BC000B949083101E0B8490839085A10BDFF2069
+:101BD000B1A1A73004F027FC002010BDAC48B449E7
+:101BE0004038008A48437047F8B5A94C0646407B08
+:101BF000403CE07337791346A773012F26D0308815
+:101C00002082A348B27B203882710546603D29704E
+:101C100006221946681C04F088FAB0796873062217
+:101C2000F11DE81D04F081FA607B0126002800D038
+:101C3000667597486038407B002800D0A6753B0049
+:101C400004F0E2FC0506082549084B000020D7E710
+:101C500000211DE08E4801211430FFF738F98C482F
+:101C6000E91D1430FFF75FF9687B002807D00128D1
+:101C700007D0FF2088A1EE3004F0D5FB0CE0002156
+:101C800000E0012182481430FFF75BF904E00621EF
+:101C90007F481430FFF71BF90020E07520767C4860
+:101CA000691C1430FFF739F9794829781430FFF7A7
+:101CB00040F9774804213C30FFF709F97448691C62
+:101CC0003C30FFF72AF9724829783C30FFF731F9A8
+:101CD00026750020F8BD0221DAE7FF206EA1F8305A
+:101CE000CAE770B56A4C0125403C0346257620467C
+:101CF0002030007A002801D03A2070BD64480022CC
+:101D0000803806789E4206D1E2750622401C04F017
+:101D10000CFAE57500E02276002070BD70B504462F
+:101D20005B4D0020403DA87528462246323804F01D
+:101D3000FCF92846203844730120A87570BD544929
+:101D400020390871704710B5514C0022403C627533
+:101D5000607302462046123804F0E7F901206075EE
+:101D600010BD4B49203948717047F8B500F0A4FB0D
+:101D7000474C0025403C607E002804D0FDF71DFC48
+:101D8000FDF746FF6576434F3D70FDF793FBA07B63
+:101D9000012804D00021084601F0A6FAF8BD002170
+:101DA000022001F0A1FA3A4C203C207A002809D008
+:101DB000374881790029F1D11321C17105720121C0
+:101DC0008171F8BD78780028FBD0314E0622803E24
+:101DD000707BE0733078A0753046F11D703004F0F0
+:101DE000A4F930460622711C773004F09EF93C209D
+:101DF000A072012020727D70F8BD10B5244C403CCB
+:101E0000E17BA07CCA0701D0C2070BD08A070FD59F
+:101E100082070DD42620FDF777FAA07C0221084323
+:101E2000A07410BD2520FDF76FFAA07C0121F6E714
+:101E30004907F6D54007F4D42720FDF765FAA07CC2
+:101E40000421ECE770B5134E3078002872D1104CA5
+:101E5000403C207D00286DD0FDF71FFB0025A574B8
+:101E6000E57475702846FDF715FB0020FDF78CF929
+:101E70000D480D38FDF73FFA0B481038FDF7F7FA1B
+:101E8000FDF76CFBFFF7B9FFFDF7FFFA012111E049
+:101E900068130020A40000207372635C6C6C5F61A7
+:101EA00064762E63000000008E6701009A8913009B
+:101EB000710200000020FDF743FA0F210520FDF715
+:101EC000C1F92646403E3178701CFDF7ADF9A07B84
+:101ED00001280CD004280AD0607D002807D02146B4
+:101EE00012390846627B6630FFF732F86575A07DCF
+:101EF000002807D0FE480146427B12399C30FFF78C
+:101F000040F8A575306E0178002903D00178001DD6
+:101F1000FDF7C8F9F06D0178002906D0F44A401C9D
+:101F2000C732FDF754FE01206076FDF7C3FA0020AA
+:101F300070BDFFE70C20FBE7EE494860704770B5C5
+:101F4000050001D0FFF759FFE94C2034E07C002860
+:101F50000AD0A07B012804D19920E749C00004F0F1
+:101F600062FAFFF702FFE3E7002D0DD00221002007
+:101F7000FDF7E6F9DE4840300079032801D001285A
+:101F800002D10220FDF73BFCE07D002600280DD0A9
+:101F9000D74D203D2846691C9430FEF7BEFF2846E9
+:101FA000691CBC30FEF7B9FFE6752676D048743060
+:101FB000FDF786FAA07B030004F026FB0504040469
+:101FC0000D04090001210846FDF79FFB03E0CA4903
+:101FD000CA4804F028FAE17BA07C81430120002953
+:101FE00003D1A17B012903D0E074C24908709FE7A7
+:101FF000A674FAE710B5FDF750FABE48007800283D
+:1020000018D1BB482030007D002813D00020FFF7F6
+:1020100096FFB74840300079002809D001280FD03A
+:10202000022805D003280BD0B349B54804F0FBF9CA
+:10203000002010BD00F040FAFDF73CFA0C2010BD66
+:10204000F0F7E6FFF4E7AB49012048707047F8B5B8
+:10205000002400F0E0FF002824D0FF202D30FDF701
+:102060006CF9A44D2878A24F403701281DD00228D2
+:1020700001D0032834D0A2489F496B3004F0D3F933
+:10208000287800280DD0387900280AD0012808D0F7
+:10209000022838D0032836D099489749803004F078
+:1020A000C2F9F8BDFFF761FEF8BD914E2036B07B56
+:1020B000032815D0707E002803D0FDF798FDFDF7AA
+:1020C00074FA8B48C430FDF7FBF9B07B012812D0BD
+:1020D000042810D0B879012806D0032804D004E0E1
+:1020E0000120FFF72CFFCBE7102421460E200143EF
+:1020F0000020FDF70AFB7879012801D1FDF76FFA7E
+:1021000002202870BCE728780228CDD10120FDF7F5
+:1021100076FBF8BD70B5764840304079012801D192
+:1021200000F0D4F9724C2034607E002803D0FDF713
+:1021300044FAFDF76DFD00F06EFF00280CD06D4DE8
+:102140002878022804D06E486B49A33004F06BF95C
+:10215000A07B012803D006E0FFF707FEE8E6992000
+:102160008000FDF7EAF80120FFF7E9FE2878002853
+:10217000F4D028780128F1D039205F49000104F01B
+:1021800052F9D5E6F0B5074689B000200690FDF774
+:10219000AEF800900020019056480078022804D044
+:1021A00057485549F03004F03EF9514D40356879B3
+:1021B000012801D100F08AF94D48C430FEF7A9FE8C
+:1021C0004B4E04462036002F70D03046A430FEF728
+:1021D000F1FE0028F8D0FDF731F80028F4D0707E29
+:1021E00000280AD005277F1EFFB2FDF72CFD02282C
+:1021F0000FD0012800D0002001903D492046C43175
+:102200000C46643C030004F0FFF906A4A4A40CA44B
+:1022100056A4002FE7D177203AA1C00004F003F9BB
+:10222000E9E7B07B012841D004283FD0019A00980B
+:10223000104304D1A879002801D0022836D168794A
+:1022400001281DD1607A00281AD101206072087817
+:1022500006224006C00FA0722548C91C6B3003F04F
+:1022600064FF244C224FA07871377F2804D1A92025
+:1022700024A1C00004F0D7F8A07838707F20A070A7
+:102280001B489C30FDF71CF91A480321017028797E
+:10229000002860D001280AD002285CD0032806D08C
+:1022A000164818A1E03804F0BEF854E051E00120CF
+:1022B000FDF7A5FA4FE00E480F462038C978C079DF
+:1022C000814230D10A4839792038027A91422AD1A4
+:1022D0007979427A914226D1B979827A914222D192
+:1022E000F979C27A91421ED1397A027B914211E08A
+:1022F00008130020A4000020981E0100F60400002E
+:10230000DE0200007372635C6C6C5F6164762E6346
+:102310000000000007D13978407B4906C90F81428F
+:1023200001D1012100E00021B07B012801D0042867
+:1023300001D100290AD100280BD101990098084346
+:1023400004D1A879002801D0012802D1307E0028CC
+:102350001FD001200690707E002803D0FDF72DF9D4
+:10236000FDF756FC0698002802D00120FFF7E7FD94
+:102370005D48017800290AD00178012907D000784A
+:10238000032804D095205949C00004F04CF809B046
+:10239000F0BD55480422406855490F3003F0C5FE92
+:1023A000387806224006C10F4F4840680177F91C73
+:1023B0001D3003F0BAFE4C484D4940680322091D08
+:1023C000133003F0B2FE4848494A4068B97D817530
+:1023D0000F3A117ED37D09021943018311468B7E8A
+:1023E0004F7E1B023B438380137FD77E1A023A4302
+:1023F000C2808A7F4B7F1102194301813C4905222B
+:1024000010310A3003F091FE3948374A1130017912
+:102410005768C906C90EB97600794009F876287A56
+:10242000002809D0A07900283AD11320E0710020BB
+:1024300020720120A07133E00020A8727888B08556
+:10244000387FE8732A48394606221D31833803F065
+:102450006CFE27490622F3390878A87508467730BC
+:10246000491C03F062FEB888F087F888208038891C
+:102470006080F87E20710198002860790BD00121DE
+:1024800008436071FDF7F2FB61794000C907C90F8D
+:102490000143617102E04008400060710120287230
+:1024A000114C0020207000F007F8FDF703F8012020
+:1024B000616800F019FF4EE710B5FDF76AF8FDF707
+:1024C0005DF8FCF7B5FFFCF7DAFF10BD064810B564
+:1024D000801CFDF78DF8002802D103497F20887009
+:1024E000FDF774F810BD0000A400002004230100D3
+:1024F000DB1300208107C90E002808DA0007000F4F
+:1025000008388008F74A80008018C06904E0800815
+:10251000F54A800080180068C8400006800F7047A8
+:1025200010B500F03BFF10BD70B5F04C0546626879
+:10253000002908D0002A04D0FF20EDA10C3003F0C0
+:1025400072FF656070BD002A04D1FF20E8A112303F
+:1025500003F069FF0020606070BDE948C07E7047ED
+:10256000E7482830C07E704738B5E04C20680168E5
+:102570004978012925D001216846FAF7C9FC684647
+:102580000078E049000203F04AFE2068426AC06811
+:1025900012685118FBF7ADFC2168C860D84A206862
+:1025A00028320321904218D0028B002A15D0012234
+:1025B0004272017200210171021D017F00F0FBFED9
+:1025C00038BD7D21C068C900FBF793FC2168C86055
+:1025D000FFF7DDFA21680861E0E7028B521C0283F5
+:1025E0004172E6E7FFB5C64E85B0706A346805688B
+:1025F00060680190306A0390298E0798401A80B273
+:1026000002900898002804D02746383720464830E2
+:1026100002E0371D2846A830009003203871059845
+:10262000002820D001287DD002285ED003287AD04F
+:10263000AFA1B54803F0F7FE0898002807D0387915
+:10264000032804D0B048AAA1093003F0ECFEA16A27
+:102650007069FBF74EFCB860616A206A88427DD9D8
+:10266000009801601FE1306A002804D1A648A0A1AB
+:102670007A3803F0D8FEA449288B373948434018EC
+:10268000069900F0A6FEA0619F49A8883739484303
+:10269000069900F09EFEE061316A9B48891CA162A8
+:1026A0002A8B37384243A069974B121AE63BD2185F
+:1026B0005118A162944BAA7D373B5A4340008018C1
+:1026C000FF30193020626062306A081AED21FF384D
+:1026D000C90015388842AFD28C49884204D28A4852
+:1026E00083A15D3803F09FFEB6E0874A288B373A16
+:1026F000E16850430818069900F06BFEA06182491A
+:10270000A88837394843069900F063FEE061306AD3
+:10271000002804D17C4876A1553803F084FEAE2011
+:10272000405B01E02CE05AE00028288B784AE16801
+:102730001DD050430818A169401AA0622169A06801
+:10274000734A4843A1694018A97D4000514340188D
+:10275000FF3017302062A888504300E0A1E0E16913
+:10276000411A6F20C000081A6062A06A34E050432A
+:102770000818A169401A3168D63849684018DCE762
+:10278000284680300190C08D002802D0306A002891
+:1027900004D15F4856A1401F03F045FEA8885C495C
+:1027A000E3694843C01AA06201999C46CA8D216919
+:1027B000A368521A4B43A169591863465343C91879
+:1027C000AA7D534B49005A438918FF3117312162C2
+:1027D0006F21C900411A6162316A401A35E00898D8
+:1027E000002803D03420005D002878D1A88848490B
+:1027F0004843E169401A02994843A0622846803064
+:102800000490C08D0028019829D0002804D03E48AB
+:1028100037A1163803F007FE04983D4AC18D02988F
+:102820000818E16948434000FF3017302062A8884B
+:102830005043411A6F20C000081A606200F0AEFDDC
+:1028400000281CD0A16A0398081AED21FF38C9009E
+:102850005538884200D3EFE601203871ECE60028B5
+:1028600002D00398002804D1294821A11A3003F08E
+:10287000DAFD0198A16AD6380818A062CCE7FBF708
+:102880009EF8726901461046FCF7BFFAA16A081A61
+:10289000ED21FF38C90050388842DCD2012009B050
+:1028A000F0BD0099086000981A4900688035081842
+:1028B000F860298B0798081A00B2002804DD0598F3
+:1028C000022801D0032000E00120787108983870B8
+:1028D0000898002820D03420005D00281CD0022059
+:1028E000DDE7000000ED00E000E400E0B4000020BF
+:1028F0007372635C6C6C5F6C6D2E73302E630000C2
+:10290000F413002010270000190500002902000020
+:10291000E20400004B1700000898012148402034D1
+:102920006075317F3A46304600F045FD0020B6E73D
+:1029300010B5FE4900280A68516A096807D0126874
+:102940008988FB4BD2695943891A03F068FC10BD92
+:10295000F8B5F64F38680468416A26460D68203697
+:10296000717D00290AD0618E2A8E914206D1407A6B
+:10297000012803D1EF49F04803F055FDFBF71FF89C
+:10298000014638684069FCF740FAFFF7D1FF2A8E0C
+:10299000618E1318994202DB491C618602E0401CDB
+:1029A00010186086B07D002806D19C21608E495B9E
+:1029B000884201D1401C6086DC480168088B0328EE
+:1029C00002D2401C088302E0618E982041532846C1
+:1029D00040300646C1898089081A298E401E401859
+:1029E00087B218E0D148EB7E00685B00406A00794E
+:1029F0004100D248415AC05A401881B2207D00237C
+:102A0000FFF7F0FD00280FD001280ED0CA48C949B1
+:102A10003A3003F008FD628EB81A00B20028E1DAFD
+:102A20000820B07200F010FEF8BD608E401C608679
+:102A3000F1E770B5BD4D002168680162C27E1300E8
+:102A400003F0E2FD045656034A56426A14680268CF
+:102A500011700268516000682030407D002808D164
+:102A6000FAF7ADFF69680968096CFCF7CEF9002830
+:102A700018DC6868228E0168498E914206D1214691
+:102A800080318B8B9A1ACA83238605E0891A9E228D
+:102A900011530168498E21860268C1681164C168BA
+:102AA000416111E068680168098E228E8B1A224606
+:102AB0008032D3830168098E218601680B6CC36064
+:102AC0000B6C4361886C9062204601F0D8FC0028B2
+:102AD0000DD098499A4808E0C1684161FFF7B2F902
+:102AE000002804D096489349801D03F09CFC70BDDB
+:102AF000934890490D30F8E710B58C4A0B001268E6
+:102B000003F082FD0906090F1F0C2E2E082B2E0044
+:102B1000FFF78FFF10BD00F068FC10BDFCF772FEE0
+:102B200010BDD07E022806D0D07E032806D0FF201C
+:102B30008049A3300EE0FFF70BFF10BDFFF714FD37
+:102B400010BDD07E0228F6D0D07E0328F6D0FF201C
+:102B50007849AE3003F067FCF0E7FAF715FF10BDD7
+:102B6000FF207449BC3003F05EFC10BDF3B581B0AA
+:102B70000E4601276D4D734C0B0003F045FD090611
+:102B80002F39392F40403939400001216D48FFF776
+:102B9000CBFC31460198FFF7AFFFE07E022826D13B
+:102BA00068680568406A0668FAF7E7FEB188604A17
+:102BB0005143EA69891AD639E962B72802D26248D4
+:102BC000081803E0081A6049B7314018E8625F4806
+:102BD000E96A814200D80846E86205E00198FFF7FB
+:102BE0008BFFE07E022802D1206820300775FEBDF1
+:102BF0002C600198FFF780FF00202860FEBDFF20B9
+:102C00004C495C3003F00FFCFEBD70B50C46064627
+:102C10000B0003F0F9FC09060D10100D1A1A101024
+:102C20001A00484801212830FFF77EFC2146304633
+:102C3000FFF762FF70BD43483C4D283028603046A6
+:102C4000FFF75AFF0020286070BDFF20394982300D
+:102C500003F0E9FB70BDF0B5344C0020216885B06D
+:102C600003258D76CA7E0746032A03D0C97E002934
+:102C700029D029E0087F002803D12E49344803F0E9
+:102C8000D2FB2068067F684605714571FAF797FE0A
+:102C90000290FF20F53003900121684601706946DB
+:102CA0003046FBF70CFB00E020BF2068007FFCF7FC
+:102CB00038F90028F8D02068007FFAF765FE206810
+:102CC000077700F072FB012021688F7605B0F0BD18
+:102CD00016490A68907600E020BF0A68D07E002876
+:102CE00003D0D07E937E9842F6D0D07E002803D0C9
+:102CF00000200021917670470120FAE770B5114954
+:102D00000024CA7E094D032A03D02831CA7E032A33
+:102D10002ED12960002827D0012821D00C48054950
+:102D2000973003F080FB0020296813E0B4000020F6
+:102D3000E2040000F0280100F70500009E67010092
+:102D4000A1030000F4130020C4F8FFFF38120000B4
+:102D500072020000086048622860002C08D070BD34
+:102D60000320FFF7B5FF01E0FFF775FF0446DAE740
+:102D70000C2070BDF8B5F94F04461F25E67E3300E0
+:102D800003F042FC042920031B20F548844204D0B0
+:102D9000FF20F449FC3003F046FB02203C60FFF7C3
+:102DA00097FF002805D03968002008604862386025
+:102DB00011E00C25002038600AE00120FFF79EFF9B
+:102DC000054603E0E749E84803F02DFB002D02D05B
+:102DD000E07EB042D2D1E07E002804D0E248E14952
+:102DE000801D03F020FBF8BD10B5DD48FFF7C2FFE2
+:102DF000DB482830FFF7BEFFD94900205031087565
+:102E0000D649C91F4870D64948610A4628325061E0
+:102E100088769076D1494860086010BD70B5044648
+:102E20000120FFF767FBC5B20B20FFF763FBC0B2C1
+:102E3000854204D0FF20CB49C63003F0F4FA0120CC
+:102E4000FFF758FBC5B21820FFF754FBC0B285420C
+:102E500004D0FF20C349C73003F0E5FA0420C04383
+:102E6000FFF748FBC5B21920FFF744FBC0B285420B
+:102E700004D0FF20BB49C83003F0D5FAB748B849A1
+:102E8000083804700020C87688760A462832D07642
+:102E90009076B24B012408331C711860486250626E
+:102EA00008601060FFF7A0FF70BDAC4908310871E1
+:102EB0007047FEB5AA49CA7E08462830A74C002AAA
+:102EC00002D1C27E002A03D0C97E022903D005E0C8
+:102ED000A648216006E0C17E002901D00C20FEBD7D
+:102EE0002060A348FAF7FCFC216808779B4920681A
+:102EF000C91F0160C91C4162007F002804D1AD20B8
+:102F00009849800003F08FFAFAF737FD9949884213
+:102F100000D20846FF30C83086B220680325C57647
+:102F2000FEF735FE21680861FEF758FE00270028ED
+:102F300027D0FEF753FE21684A6A10600968012015
+:102F4000087001466846F9F7E3FF684600788A4949
+:102F5000000203F064F90191FAF731FD019971184B
+:102F6000FAF7C7FF2168C8602068057245720771CB
+:102F7000021D017F00F01FFA2068078300202760F0
+:102F8000FEBDFAF71CFD3146FAF7B3FF2168C860B1
+:102F900008680770096801204870E5E77047F8B5D0
+:102FA0006F4EF17E002904D131462831C97E0029B7
+:102FB00001D00C20F8BD0221F176694C674F5034E6
+:102FC0000837776234600025386025753979C07E0E
+:102FD0004A006A4940008A5A085A2B46101881B2A2
+:102FE0002A462846FFF7FEFA002804D0CF205D4984
+:102FF000800003F018FA25610120A5602075658620
+:1030000025865748703085753968088E401E0886B9
+:1030100035830020F8BD10B5504801244068817EFA
+:1030200003290CD001684978002906D0006A544968
+:10303000884202D90024FFF706F8204610BD00247C
+:10304000FBE74648406802681178491C1170016A24
+:103050000068C26A914204D8007D012801D0012095
+:1030600070470020704700207047F8B53B4C3C4843
+:103070002060416A00680D68002634210E54A621A4
+:10308000495D00294BD1007D032848D1FAF797FC10
+:10309000014620684069FBF7B8FE00283FDDFFF7D6
+:1030A00047FC298E401C4118206802681186006880
+:1030B000018E9C22525B511A09B200292FDD012199
+:1030C0002030817528464030C1898089081A298EB0
+:1030D000401E401887B21BE0496A09794A00274917
+:1030E0008B5A028E007D9446EA7E5200895AC91896
+:1030F00089B201236246FFF775FA00280FD0012834
+:103100000FD002280BD01B481649193803F08BF951
+:1031100021680868028EBA1A12B2002ADCDA266028
+:10312000F8BD20680068018E491C0186F0E7F8B5FB
+:103130000A4D00266A680128516A0C6853D1087943
+:103140000E4940000B5A1068077D032F1AD0027DEC
+:10315000022A24D0007D012834D044E0B4000020AD
+:10316000F4130020F0280100070200006D2B01007D
+:103170000B2C0100F6050000102700009E670100DF
+:10318000D98213000661106886609C20025BE07E95
+:103190004000085AC01881B2002303201BE02246D9
+:1031A0008032D78D0761E07E928B4000085AC018AC
+:1031B00081B200230220FFF715FA6A680121126824
+:1031C00011750AE09C20025BE07E4000085AC0189E
+:1031D00081B200230120FFF705FA002803D09C49A3
+:1031E0009C4803F020F9FAF735FB9B480078EFF78D
+:1031F0006FF8686806830268218E51860068203067
+:103200008675F8BD38B5944C0021083460680D46C9
+:1032100000684278002A01D045701FE0007800283D
+:1032200009D001216846F9F773FE684600788B499A
+:10323000000202F0F4FF6068426AC0681268511828
+:10324000FAF757FE01466068C160057103214172BB
+:10325000021D017F00F0AFF860680583FAF7FAFA03
+:103260007D480078EFF734F838BD7B4A10B5014649
+:10327000083250680B0003F0C7F9060D1504081753
+:103280000C31012100F0D1F807E00021106800F0B6
+:10329000CCF810BD0120FFF74AFF00210846FFF7D8
+:1032A00043F910BD032116E0416A02680968D36939
+:1032B00093608A886A4B5A430368DA600A46C032D0
+:1032C000D3890B83137B8B75138A8B80538ACB80B6
+:1032D000928A0A8102210068017510BD5D485C492F
+:1032E000913003F0A0F810BD70B500280BD05A4CF7
+:1032F000083401280ED002281ED056485449B43054
+:1033000003F091F870BDFFF77DFF00210846FFF73D
+:103310000BF970BD6068002501684D7000F045F83C
+:103320000320F5F7B8FEFAF795FA4B486560007888
+:10333000EEF7CEFF656070BDFFF764FF606800F0D8
+:1033400034F800210846FFF7EFF80420F5F7A3FE54
+:1033500070BD414908314968CA7E022A08D10A680D
+:103360001378002B04D150600968CA6A1018C8622B
+:103370007047394A10B50832526800290CD001292B
+:1033800007D0022907D033483149D93003F04BF830
+:1033900010BD801E00E0401F106210BD2E48083096
+:1033A0004068002800D0012070470021C176817656
+:1033B00001604162704710B50B46C17E847EA14218
+:1033C00004D011461846FAF77AFF10BDFFF7EDFF5B
+:1033D00010BD024610B50020002905D00846504314
+:1033E000204902F01CFF401C10BD1B4810B50830DE
+:1033F0004068C07E030003F007F9041515030B15A0
+:1034000001F05EF900280CD00F2017A1800106E022
+:10341000FEF7F0FD002804D0F12013A1800003F096
+:1034200002F810BD10A11448F9E710B504460029B0
+:1034300003D00020FFF77BFE03E007480078EEF79B
+:1034400047FF2046FFF7B1FF0020F5F724FE10BD2F
+:10345000F028010092060000AC00002010270000B8
+:10346000E204000040420F007372635C6C6C5F6C9E
+:103470006D2E73302E630000CB030000F8B5FEF70D
+:10348000B0F90446FEF756FAF84E0546706920304A
+:10349000407D002809D0012827D002282AD00328FF
+:1034A00032D0FF20F2A19A3037E0F0481830FEF712
+:1034B0001EFA002801D003200FE0EC481830FEF778
+:1034C00049F9002804D070695B21095C002908D003
+:1034D000E6481830FEF7D2F90120716920314875AD
+:1034E0001DE002212030417519E0E0481830FEF758
+:1034F000C5F914E0DD481830FEF72CF900280ED18C
+:10350000FF20DBA18C3008E0D8481830FEF7EFF937
+:10351000002804D1FF20D6A1943002F084FFB069C6
+:10352000F72201781140017072692032937DDB0728
+:103530001B0F1943FB2319400170D37DDB075B0F81
+:1035400019430170577DEF23022F04D0012F07D0BC
+:10355000032F07D00CE0012C06D8002D04D007E083
+:103560006D1E2C43002C03D019401023194300E09A
+:1035700019400170D17F002916D0517D012913D047
+:10358000BF48FBF79DFFBE480021283001767269D5
+:10359000916ED26E42610161B949B269FCF7A3FA3A
+:1035A0000020FCF7AFFA03E0FBF78AFFFCF7CDFA47
+:1035B000B0690078C00606D4F0690078C00602D46D
+:1035C000F079002806D0B079002803D101210846FF
+:1035D000FCF79BF8032030703079002803D1FBF70B
+:1035E000BDFF01203071F8BD70B5A0481C30FEF75A
+:1035F000B9F901259D4C002802D00020607002E03E
+:1036000065709F48E061606940300078002802D012
+:103610006078002805D0E069FBF752FFFCF795FAC7
+:1036200070BD9748FBF74CFF9548283005766269D6
+:10363000116F526F42610161914AE169FCF753FADF
+:103640000120FCF75FFA70BD10B588490023486976
+:1036500002462030C3768377012049239854A03254
+:103660009279002A03D008700021022001E0002195
+:103670000320FFF7FAFD10BD70B57C4C6079C206DF
+:103680002046406901468031002A01DA002202E02A
+:10369000CA8DCB8BD218CA850246C0321379002B53
+:1036A00005D0034640331D8AC98B69181982617A97
+:1036B000002903D03D2001F051F94AE003462033B0
+:1036C000D97E042945D0217A002913D0480701D496
+:1036D000C80601D51E2030E0080701D53D202CE0AA
+:1036E000C80705D1880703D461A1664802F09BFE94
+:1036F0002A2022E04030817D002905D0418A4D1CDE
+:103700004582858AA9420FD2517A062902D0117AC0
+:10371000062905D1018B4A1C0283828A914203D279
+:10372000028AC1898A4201D3222006E09A7F8089D9
+:10373000002A0AD088420FD3082001F00FF96069EF
+:103740002030C07E042804D006E0062804D33E20A2
+:10375000F3E7FFF779FF70BD0120207000210846D4
+:10376000FFF783FD70BD10B5404840690146203128
+:103770008A7F002A29D0012A27D0022A06D0032ACC
+:1037800004D03BA1404802F04EFE10BDC97E032983
+:103790000FD0082919D001464031CA898989511AA8
+:1037A000891E89B2032900D303218030828B5118EE
+:1037B00009E0014640318A89032A06D3028EC9896D
+:1037C00080305118491C018310BD8030818BFAE78D
+:1037D00000B5030002F018FF0604070B0F121217C2
+:1037E00000290ED00FE0891E02290AD90BE0891F9B
+:1037F000012906D907E0082903D004E00B390C2978
+:1038000001D8012000BD002000BDFEB505461748C7
+:103810001830FEF740F8002804D11B4814A1D13815
+:1038200002F001FE114CA069FDF702FC0321A06922
+:10383000FDF721FCA069EF220178114001702946B3
+:10384000FDF740FC002601272B0002F0DDFE0E5C98
+:103850005C085C2C6060255C4C5C603C375C60699B
+:103860006521095C002911D0062111E0C400002067
+:103870007372635C6C6C5F736C6176652E630000C1
+:1038800090140020430200005C080000C030417921
+:10389000A069FDF797FC3AE060698030417CA0693F
+:1038A000FDF7D7FC33E06169A069B831FDF7ADFCE5
+:1038B0006169A0698C31FDF7AEFC28E00621A069A2
+:1038C000FDF7C5FC23E020690178A069FDF7A9FC9C
+:1038D00020698188A069FDF7A6FC20694188A0695C
+:1038E000FDF7A5FC13E00096019660696030007951
+:1038F000002803D069460878384308706946A069F3
+:10390000FDF7B1FC03E0F949F94802F08CFDFDF741
+:10391000D4FF002804D1F648F449801D02F083FD4D
+:103920000C2D06D0072D03D0606940304682877584
+:10393000FEBD606940300683FEBDF0B5ED4CC82089
+:1039400061698DB0405C04280AD0052835D15C201F
+:10395000405C00282AD0012060314871022026E016
+:1039600010226846D63101F030F86169102204A8AF
+:10397000B03101F02AF8684601F0DFFB08AE8DCEC9
+:10398000616984250E4678360DC66F5000250D6797
+:103990004D67012540267554D74D88318DC5284681
+:1039A0000822093002F0C1FB052000E00D20FFF7DE
+:1039B0002CFF61690020C03108720DB0F0BDF8B570
+:1039C000CC481830FDF767FF002848D0C94C207A52
+:1039D000002844D16069C421095C002500290ED06B
+:1039E0002030C17E0120FFF7F3FE002807D1606977
+:1039F0002030C17E0420FFF7EBFE002806D060696E
+:103A0000C921095C0126062907D00DE06069502113
+:103A10000D526030457102204EE02030C17E0420FE
+:103A2000FFF7D6FE002813D0616908462030C27E19
+:103A3000921E130002F0E8FD166262621D6262626D
+:103A400060621F6262622843626262626262466210
+:103A500060695E21095CC90702D0C0304572F8BDBB
+:103A60000C20FFF7D2FE60694030817F31438177BF
+:103A7000F8BD072020E0FDF79AFF0028F8D0606924
+:103A8000403005700B2017E0F9F741FA0C28EFD30E
+:103A900060690821B830F9F73BFA002806D0606960
+:103AA00004218C30F9F734FA002804D1C72093A1FF
+:103AB000C00002F0B8FC0420FFF7A7FEF8BDFFF736
+:103AC0003CFFF8BD00228A66CA66C6770A4678318E
+:103AD000C8C9894878322838D26842632830C8C0BB
+:103AE00008220D30091D02F020FB0620FFF78DFE95
+:103AF000606940308575F8BD0920DDE700F036FFCC
+:103B0000F8BD70B57B4C3B216069095C08292FD159
+:103B10000146028EC0314B89521C9A4228D1227A2A
+:103B2000002A25D10A8A83889A4207D14B8AC58800
+:103B3000AB4203D18B8A0589AB4209D043884B85C0
+:103B40008A854A8ACA858A8A0A860122E6210A5417
+:103B500001221146FDF747FC00210420FFF785FBF9
+:103B600060690021C92211542030C1760321817778
+:103B700070BD70B55F4C60692030C07E172803D0DF
+:103B80005EA1624802F04FFC616900220B4640339F
+:103B9000DA7608469A75E030867D0B240125002EE2
+:103BA00006D0837C002B14D1C4740275857410E098
+:103BB0001E7F002E07D01A774C88FA235C520276BB
+:103BC0000C23837505E04E88FA235E520276057752
+:103BD00084752031CA7670BD70B5464CA0798007D7
+:103BE00036D5207A002833D160692030C17E01208B
+:103BF000FFF7EEFD00282BD1A0690126C078002533
+:103C0000030002F001FD0E8585088537465F0A85B1
+:103C1000168526625285032152E060692030C07EFD
+:103C2000052804D0394835A1333802F0FCFB60691F
+:103C30000CE060692030C07E092804D033482FA1F1
+:103C40002D3802F0F0FB606956210D542030C57606
+:103C500070BD60692030C07E0B2804D02B4827A19E
+:103C6000263802F0E0FB60695B210E540C21203005
+:103C7000C17670BD60692030C07E0F2804D0234813
+:103C80001EA11F3802F0CFFB60695B210E5410218A
+:103C9000EDE760692030C07E102804D01B4817A1D2
+:103CA000183802F0C0FB12210AE060692030C07EA3
+:103CB000102804D0154811A1123802F0B4FB1421C9
+:103CC0006069D4E7FFF755FF70BD60690146C030F9
+:103CD000027A062A04D14031897F890700D505720E
+:103CE000417A0629F0D1457270BD0000703801009C
+:103CF000CD070000C4000020B81400207372635C7C
+:103D00006C6C5F736C6176652E6300004C0500007F
+:103D1000FD49FE4802F087FBE6E710B5FC4C606900
+:103D20002030C17E0020FFF753FD002803D1207A08
+:103D3000012108432072207A002808D1E069FDF7AC
+:103D4000EBF961699122505405202031C87610BDED
+:103D500010B5EF4C60690146C0314A7A002A06D09E
+:103D6000097A062903D0217A012211432172217A8E
+:103D7000002928D14030807F800715D4E069FDF705
+:103D80005AFA61694031C877E069FDF756FA61690E
+:103D900040310884E069FDF755FA6169022240313B
+:103DA0004884887F10438877606900220146C031CB
+:103DB0000B7A062B00D10A724030837FDB0702D1D9
+:103DC00006234B72028310BDF8B5D14C60692030D8
+:103DD000C17E0020FFF7FCFC0125002807D16069A7
+:103DE0004030007F002802D1207A28432072207AB8
+:103DF000002830D160690026014640304682857532
+:103E0000B031E069FDF7EFF96169E0698831FDF7EC
+:103E1000F3F960690146E030827D0827002A06D068
+:103E2000817C002913D1C774067585740FE04A8818
+:103E3000F8204252FA31E069FDF7C8F96169E0699A
+:103E4000FF310331FDF7CAF96069E03087756069B9
+:103E50000F212030C176F8BD10B5AD4C606920301F
+:103E6000C17E0020FFF7B4FC002803D1207A012195
+:103E700008432072207A002812D1E069FDF769F921
+:103E800000280ED0E069FDF75FF96169CA2250523F
+:103E9000098E00F0D6FD002806D0282000F05EFD37
+:103EA00010BDFFF73AFF10BDE069FDF74BF96169FE
+:103EB000C0310873E069FDF740F96169C031C8811C
+:103EC000E069FDF72BF96169C0310882E069FDF70F
+:103ED0002AF96169C0314882E069FDF729F9616911
+:103EE000D422505208202031C87610BDF8B5884C35
+:103EF000A079C00776D0207A002873D1606920307D
+:103F0000C17E0120FFF764FC002863D1E069002531
+:103F1000C178022701260B0002F076FB0D1613086C
+:103F2000415A5A445C575A192F545A00FDF74CF91C
+:103F30006169C62250543B20475440314D828E75F2
+:103F400048E000F093FD45E0FFF786FF42E060693E
+:103F50002030C17E0020FFF73BFC002802D1207AF0
+:103F600030432072207A002834D160690146403104
+:103F70004D828E750B2120300FE0606901462030A4
+:103F8000C27E0C2A02D0227A3A432272227A002A76
+:103F900020D1C57740310E770D21C1761AE0FFF7A9
+:103FA00013FF17E0606901462030C27E122A02D05A
+:103FB000227A3A432272227A002A0BD140318D753F
+:103FC0001721EAE7FFF7C4FE04E000F00DFD01E071
+:103FD000FFF7A3FE62690023106F516F401C594127
+:103FE00051671067F8BDF8B5494C05466069203047
+:103FF0008079012801D1FBF7E9FA012D14D160691C
+:104000004021095C002903D12030C07F002801D065
+:10401000FBF79BFDFBF7BDFAFBF7B0FAFBF708FADD
+:10402000FBF72DFAFBF746FA60790225C107012656
+:10403000002901D180070ED560692030817F0029D9
+:1040400002D0032902D006E0867700E085770021C0
+:104050000120FFF70AF960692030817F012903D12F
+:104060006179090700D58577607A002803D100F0CF
+:1040700027FDFFF7A4FC207900250028606902D005
+:104080008030058403E08030018C491C0184607914
+:10409000C00705D06069AC210D544030858104E033
+:1040A000616940318889401C8881E079002806D008
+:1040B0006169A031087B022806D8401C087360693A
+:1040C000A030007B022806D9606901468030058453
+:1040D0004584A0310D7360692030C17E0020FFF758
+:1040E00077FB002804D160692030C07E072855D1B5
+:1040F00060690146C0310A7A062A4FD0497A0629FA
+:104100004CD03E21095C05E0FC3C0100BA050000F2
+:10411000C4000020022941D1A030007B00283DD1FD
+:10412000FDF74FFB002839D0FDF704FC002835D0FF
+:1041300061690A468032508B01282FD90846A03089
+:10414000844646716038C7898389B81E834201DB83
+:10415000012002E0F81A401E80B2138CA789BB42EE
+:1041600001D3012302E0FB1A5B1C9BB2984200D9E9
+:104170001846012801D163465D71C0310B78002BD0
+:1041800010D0528C49888A4201D3012102E0891A59
+:10419000491C89B2884205D9084603E061690120BB
+:1041A000A0314D7161690A8E803110188883FFF744
+:1041B000DAFAFFF761FAFEF756FF002809D06069C6
+:1041C0000146FF3001300279002A02D14988C180BE
+:1041D00006716069A0308571F8BD70B5F84C6069F2
+:1041E0002030407D00283ED0022810D1FDF7C2FAD1
+:1041F000002804D17120F349000102F014F962692A
+:104200000023916ED06E491C58419166D06660695A
+:10421000002520304575017D012904D10575A1795E
+:1042200010221143A171C17C012915D1C574A07957
+:1042300008210843A071FDF76AFB002804D1E5209E
+:10424000E049C00002F0EFF860690023816EC26EA1
+:10425000491C5A41C266816660692030817D01290E
+:1042600002D0012181753FE585753DE570B5D44CDF
+:104270000026E169012508788207920F0420012AAF
+:1042800015D0022A13D0032A03D0217A01432172C8
+:104290002AE560780028FBD1606920308574A17917
+:1042A0002943A17122E0C6751EE5C5751CE5497854
+:1042B000CA0624D06278002AEAD1C906C90E1B2991
+:1042C00018D8617901436171FDF75FFB002804D1C3
+:1042D0003B20BC49400102F0A6F860690023016F51
+:1042E000426F491C5A41426701672030C17D012954
+:1042F000DBD1D8E7207A102108432072F4E460690A
+:10430000F3E77CB504460020C0436946888001A8D5
+:10431000FCF7B2FD00287AD169468888FCF790FD49
+:10432000002803D0A749A84802F07DF8009801466C
+:10433000E030827C0025002A08D0657010212170B1
+:10434000C17CA170017DE170857472E082799C4E20
+:10435000002A13D065700720207008E07169E620FC
+:104360008D8445540A22A01CE83101F0DEFE00983D
+:10437000E03080790028F1D1A5705AE0827D002AD2
+:1043800038D0827D130002F03FF90D2F2F2F2F2FF1
+:104390002F2F2F112F2F24082F0065700C21217033
+:1043A000017EA17071694988A18010E065700820C4
+:1043B00020707069082240886080201DFA3101F069
+:1043C000B4FEFF2100980331095AA181E0308575C0
+:1043D0002FE065700B212170017EA1707169498801
+:1043E000A180017FA171F2E7774876495D3002F044
+:1043F0001AF81EE0C81DF9300279002A08D01122EF
+:1044000065702270811C89886180057111E012E05D
+:10441000027A002A0FD012226570FF312270033118
+:1044200004E005720A8962804A89A280027A002A21
+:10443000F7D101207CBD00207CBD614800780128B7
+:1044400001D00C2070470020704770B55C4C0546C9
+:104450002078002804D05C485A49933001F0E3FFEB
+:1044600000202561A07201202070FFF7E6FF0028E0
+:1044700004D0554853499E3001F0D5FF34E4F8B5D7
+:104480004F4F3978012901D00C20F8BD0126A62113
+:1044900078610E548030807CFDF752F900282FD0CF
+:1044A00078698030807CFDF753FA002828D078693D
+:1044B0008030807CFDF7E5F9002821D078698030D4
+:1044C000807CFDF70AFA00281AD0FAF7E6FF78692F
+:1044D00000258030408B002827D039481830FDF760
+:1044E000DAF9002821D07869C421095C00291CD0A0
+:1044F0002030C17E0120FFF76BF9002802D014E0C4
+:104500001220F8BD78692030C17E0420FFF760F9E1
+:1045100000280AD1786950210D526030457102207F
+:10452000FFF773F97869A03045717869E621095C75
+:10453000002903D1818CC288914200D8C188B981F9
+:1045400001468031CA8B521E93B20A8CD21892B2A5
+:104550000A8494460246A0321479002C02D04D847D
+:10456000157102E04C8CE4184C8404464034A78951
+:10457000FF18A7814C8B012C01D8641C4C83002BA5
+:1045800000D015732030C07E0D4C04281ED0507909
+:1045900000281DD0A1898C451AD2FDF712F90028F8
+:1045A00016D060690146C0310A78002A10D08030E8
+:1045B000408C498888420BD3A570E6700AE0000061
+:1045C000C4000020FC3C010081080000A67001E04E
+:1045D000A570E5706069A5210D543B21095C062991
+:1045E00001D0072918D1CA21028E095A511A09B2DD
+:1045F000002911DB01460522CC310A3001F095FD7E
+:10460000012202216069FCF7EEFE6069C9210D54A8
+:104610003B210D546030867160699E210A5A811CCD
+:104620003030FCF71EFFA07800283DD16069C02122
+:10463000095C002901D0803045840120FAF7A4FDEF
+:1046400060691330FAF713FF60690F30FAF753FE11
+:104650000120FAF71FFF61694020405C002803D168
+:104660003F20405C00280DD00A467831C8C9F9487F
+:104670007832D26842632830C8C008220D30091D44
+:1046800001F053FDFAF701FF01210846FAF758FE41
+:1046900060698030806AFAF716FFFEF7A5FF60694F
+:1046A0004030007AFAF730FE6571E571A571257228
+:1046B0006572257102202070FAF7FCFE0020F8BD1B
+:1046C00010B5E54C2078022801D00C2010BDA07850
+:1046D000002803D00020FFF786FC17E0FAF7DDFE84
+:1046E00000F033F9606920308079012801D1FAF7B0
+:1046F00076FFA07A002809D0012807D0022807D029
+:10470000032805D0D549D64801F08DFE002010BD04
+:10471000EEF77EFCFAE7D0498872704710B5CE4CB0
+:104720002078032804D0CE48CC49293001F07BFE04
+:10473000606901212030827C002A06D00022827428
+:104740000175A27904231A43A271A2691378DB438D
+:104750009B0707D1C37C002B04D1C174A07902212F
+:104760000843A0711078C00606D4E0690078C0063E
+:1047700002D4E07900280CD06078002809D1A07913
+:10478000002806D1FEF75DFC002802D0207A002820
+:1047900003D00120FFF727FC03E0FEF725FF00F020
+:1047A000D4F8207801280DD0A07A00280AD001285A
+:1047B00008D0022807D0032805D0A948A7496830A7
+:1047C00001F031FE10BD0120FBF719F810BD10B546
+:1047D000A14C606920308079012812D1FAF7F6FEE9
+:1047E0006169881C3031FCF7C5FE002809D060697A
+:1047F000C21D4388F93253812030007E107301209E
+:10480000107210BD70B5944C05462078042804D071
+:1048100093489249803001F006FE617910200143EF
+:104820006171002D50D0FBF7A8F96178012508438C
+:10483000002811D160694021095C00290CD0E16990
+:104840004A78D20608D0097820300907C07DC90F00
+:10485000814201D165724EE0E078002809D0E0691C
+:104860004178C90605D10078C00602D4FFF7AFFF32
+:1048700041E0FFF7ACFFE06900784007C10F6069D5
+:104880002030807D814205D0FFF7A7FC60790821A8
+:1048900008436071E06900780007C10F606920304B
+:1048A000C07D814201D1FFF7E1FC6079284360714E
+:1048B0000020E071A079000704D560692030C07E37
+:1048C000032818D0207A14E0022001436171E079B6
+:1048D000401CC0B2E07101280DD8606940300078FA
+:1048E00000280CD05B484078C106C90E052906D2C5
+:1048F000C006002803D00120FFF775FB01E0FEF79A
+:10490000BDFD207801280DD0A07A00280AD001280A
+:1049100009D0022806D0032805D051484F49E2307B
+:1049200001F081FD9FE40120FAF769FF9BE410B5D7
+:1049300049480078042804D049484849EA3001F041
+:1049400072FD0120FFF74FFB10BD10B501210020C3
+:10495000FAF7DBFE40490420087010BD3E494A22A8
+:104960004969505404202031C876704710B53A4C3C
+:10497000C8206169405C00281CD0062806D0203180
+:10498000C97E0020FEF724FF002813D0606901468D
+:10499000C0310A7A130001F037FE070D0D0D0D0D21
+:1049A0000D050D004030807FC20704D0C043800752
+:1049B00000D1087210BD0C20FEF727FF60690122AC
+:1049C0004030817F1143817710BD10B5002A0AD095
+:1049D000002306E0D41A6418203CE47FC4545B1C16
+:1049E000DBB29342F6D310BD7CB51B4C606920301E
+:1049F000C17E0020FEF7ECFE0125002802D1207ABE
+:104A000028432072207A00281AD16946E069FCF711
+:104A100022FC684600780022C107C90F6846017071
+:104A20006069002902D06030057101E060300271D8
+:104A30006069014640304282857509202031C87680
+:104A40007CBD401A074900B2884201DC00280BDC1B
+:104A50000120704790140020C4000020FC3C01009D
+:104A6000F4090000FE7F00000020F2E710B5534C6F
+:104A700060692030C17E0020FEF7AAFE0028207A5F
+:104A800010D000280DD1E069FCF797FB6169CA22BC
+:104A90005052098EFFF7D5FF002807D02820FFF7D6
+:104AA0005DFF10BD01210843207210BD6169E069FE
+:104AB000CC31FCF77AFB606906212030C17610BD4D
+:104AC00010B500F04EF83D4C607940070BD5606999
+:104AD0002030C17E0520FEF77BFE002803D0207A1F
+:104AE000082108432072FFF701FA00F018F8FFF7D9
+:104AF00073F8A079C0060FD5207A00280CD1606920
+:104B00002030C17E0B0001F07FFD07070707070774
+:104B1000070507000721C176FEF7F3FF10BD10B5AA
+:104B200026488179490715D5017A002912D14069B3
+:104B30003B21095C891E0B0001F066FD07050C0C8A
+:104B40000C0D0C0F0C00002256210A54C030807945
+:104B5000FFF704FF10BD012100E00221C0304172C7
+:104B600010BD10B515488179090720D5017A0029B3
+:104B70001DD1406902462032D47EA41E230001F0DC
+:104B800043FD13160B1616161616161616161616BF
+:104B90001616161616171600562211546030407954
+:104BA000002801D0062000E01620FFF7D7FE10BD38
+:104BB0004030C1768175D17610BD0000C400002060
+:104BC00030B50346002002460DE09C5C2546303D92
+:104BD0000A2D02D30020C04330BD0A256843303877
+:104BE0002018521CD2B28A42EFD330BD70B50D46A8
+:104BF000144608E00A2101F012FB2A193031203A4C
+:104C0000641ED177E4B2002CF4D170BD10B500233E
+:104C100010E0040A00020443A0B2CC5C4440200629
+:104C2000000F60400407240C44402006C00C604084
+:104C30005B1C9BB29342ECD310BD000010B572B662
+:104C400000F0DCF800280BD0ECF72AFBF8F7EFFDBA
+:104C500000F0A5FD6E490020C86288626D490860B9
+:104C600062B6002010BDF3B5002501200007C06A20
+:104C700081B0C0430006000E04D167480068401CA4
+:104C800000D1012572B600F0B9F8002802D062B652
+:104C90000820FEBDECF75AFAECF706FB5F4B604EBE
+:104CA00000211A68CA40D2071FD00246CA40D20764
+:104CB00018D14AB2002A07DA1407240F083CA408C6
+:104CC000A400A419E46904E09408564FA400E41970
+:104CD00024689207D20ED4402206920F012A04D0F3
+:104CE000032A02D062B65048FEBD491C2029D8D301
+:104CF0000198030001F088FC14212323232323239C
+:104D000023230B0D0F11131F1517191B1D2E002424
+:104D100016E0012414E0022412E0032410E004242D
+:104D20000EE008240CE009240AE00A2408E00B2421
+:104D300006E00C2404E0052402E0072400E0062439
+:104D4000F06901210002000AC9070843F061002D43
+:104D500004D009E062B601200003FEBD2C4D3348AB
+:104D6000E862ECF7A1FAA8622A49314808603149A3
+:104D700002980860ECF798FA214600F0F7FCF8F783
+:104D80001AFD00F0FDFE00F073FD0198ECF756FAF5
+:104D9000040062B603D0FFF751FF2046FEBD00209D
+:104DA000FEBD10B5044600F029F8002800D001200F
+:104DB0002070002010BD204908600020704710B509
+:104DC0000C46102808D011280BD012280CD013281C
+:104DD0000ED00120086010BD03CC083CFFF743FF54
+:104DE0000AE0FFF72BFF07E02068FFF7DAFF03E098
+:104DF0001149206808600020206010BD05480C495A
+:104E00000068884201D101207047002070470000EF
+:104E100000050040780000200010001000E100E0D4
+:104E200000ED00E000E400E00110000000190000C7
+:104E3000BEBAFECAE40000200400002010B52038ED
+:104E40000C46030001F0E0FB33A6AAAEB2B8BCC02A
+:104E5000C5E0DBE41B1F23272C31373C41474D5075
+:104E600054585C606D71656974787C8084888C901E
+:104E700094989C9FA2CACFE9F0F3D3D7F80020689A
+:104E800000F0DDF8D6E0206800F0E1F8D2E020681C
+:104E900000F0F5F8CEE0207840B200F0D7FAC9E093
+:104EA000207840B200F0F5FAC4E02078616840B2A2
+:104EB00000F008FBBEE0207840B200F018FBB9E03B
+:104EC000207840B200F023FBB4E02078217940B292
+:104ED00000F02EFBAEE02078616840B200F058FB95
+:104EE000A8E000F064FBA5E0206800F068FBA1E00A
+:104EF000207800F07DFB9DE02068F8F72CF899E021
+:104F00002068F8F72CF895E021792068F8F72EF85A
+:104F100090E0206800F0E6F98CE0206800F0E7F906
+:104F200088E0207800F0E7F984E000F0F1F981E012
+:104F3000207800F0F3F97DE0207800F005FA79E0C0
+:104F4000206800F01EFA75E0206800F020FA71E099
+:104F5000206800F022FA6DE0206800F023FA69E092
+:104F6000206800F025FA65E0206800F027FA61E08B
+:104F7000206800F028FA5DE00846ECF7FFF859E0F9
+:104F8000EDF719FA56E0EDF746FA53E02068EDF731
+:104F90004EFA4FE0206800F0E1F84BE0206800F0A6
+:104FA000E9F847E0206800F0F0F843E02078A268D4
+:104FB000616800F0F5F83DE0207800F006F939E08E
+:104FC000207800F017F935E02078616800F027F9C3
+:104FD00030E02078616800F03AF92BE02179207800
+:104FE00000F016FC26E0206800F06BF822E0206854
+:104FF000F8F70CFB1EE02068F8F7F0FA1AE007CC8F
+:105000000C3C00F0FFFC15E0206800F052FD11E0C0
+:1050100003CC083C00F07DFD0CE0206800F06EFF42
+:1050200008E009E003E0FFE700F080FF02E020680D
+:1050300000F0B8FF206010BD0120086010BD002105
+:105040000170084670470146002008707047EFF372
+:105050001081C907C90F72B60278012A01D0012256
+:1050600000E0002201230370002900D162B6002A6B
+:1050700001D000207047012040037047E7E7EFF3BD
+:105080001081C907C90F72B600220270002900D131
+:1050900062B600207047F2E710B52848FFF7CFFF4F
+:1050A000002803D026A11D2001F0BDF92348401C93
+:1050B000FFF7C5FF002803D021A1212001F0B3F99B
+:1050C00010BDF1B5224D6F6801261C48FFF7BFFFE8
+:1050D0001A4C002803D10026601CFFF7D0FF1D4AA0
+:1050E0001D490120506000BF00BF00BF00BF00BFCE
+:1050F00000230B604B60009B6B60106000BF00BF23
+:1051000000BF00BF00BF0868002802D1486800281F
+:10511000F9D048680028E4D1002E04D06F60601CEC
+:10512000FFF795FF07E0601CFFF791FF0028D3D140
+:105130000248FFF7A4FF0020F8BDC2E7E800002006
+:105140007372635C736F635F6563622E630000005C
+:1051500000E5004000E0004000E100405A495B4BA0
+:105160000A685B499A42096801D18904890C016087
+:10517000002070475449554B0A6855499A4201D15D
+:105180008004800C4860002070474F494F4B0A68EC
+:105190004F499A4201D18004800C886000207047FA
+:1051A00030B5494B494D1C684A4BAC4202D01028DF
+:1051B00002D203E00E2801D3184630BDC300444894
+:1051C000181801614261002030BD3F493F4B0A6819
+:1051D0004049491C9A4202D0042802D203E0022826
+:1051E00001D3084670473C4A0121C0008018016085
+:1051F000002070473449354B0A683649491C9A42A9
+:1052000002D0042802D203E0022801D308467047E6
+:10521000314A0121C000801841600020704770B5FC
+:10522000294A2C4B14682D4E284D82005B1C921984
+:10523000AC4203D0042803D2116006E0022801D357
+:10524000184670BD8804800C1060002070BD70B5D9
+:105250001D4A204B1468214E1C4D82005B1C921984
+:10526000AC4203D0042803D2106806E0022801D320
+:10527000184670BD10688004800C0860002070BD66
+:1052800010B5134A164890600E200021C3009B18E9
+:1052900019615961401C1028F8D300200F4A05E01D
+:1052A000022803D383009B18196005E083009B1834
+:1052B0001C68A404A40C1C60401C0428F0D310BD7E
+:1052C000034907488860704778000020BEBAFECACC
+:1052D00000F501400820000000F0014000F8014006
+:1052E00000C0FFFF47490968016000207047454939
+:1052F0000860002070470121434A002803D001289C
+:1053000003D042487047916300E0D16300207047AA
+:105310003F49012008603D48801C704704223D4BF6
+:105320003B49002805D05A600869012210430861F2
+:1053300008E008694008400008619A60324900208E
+:10534000C03188600020704731490622002808D00B
+:10535000012809D002280DD003280FD02B48401C6B
+:1053600070470869904302E008699043801C086117
+:105370000020704708699043001DF8E70869104352
+:10538000F5E723494A6A02434A62002070472049F0
+:105390004A6A82434A62002070471D49496A016097
+:1053A000002070471A49CA690243CA610020704749
+:1053B0001749CA698243CA61002070471449C96904
+:1053C0000160002070471249024600204031002A47
+:1053D00003D0012A01D0072070478A6370470D4926
+:1053E0000420886008490020C03188600A480168AC
+:1053F0008022090A0902114301600849012008605E
+:1054000070470000000400404000004004200000FD
+:10541000000500400003004000E400E000E100E07F
+:105420008107C90E002808DA0007000F0838800835
+:10543000814A80008018C06904E080087F4A8000AB
+:1054400080180068C8400006800F704710B50446F9
+:1054500000F0DBF8002813D02046FFF7E1FFC0B2D0
+:1054600000F0E1F800280DD07549E2060B78D20E65
+:1054700001209040002B08D04A681043486006E0A5
+:10548000704810BD6F48401C10BD6F490860002077
+:1054900010BD10B5044600F0B8F800280BD06849DC
+:1054A000E2060B78D20E01209040002B05D04A680E
+:1054B00082434A6004E0634810BD6349803108605C
+:1054C000002010BD70B50D46044600F09EF800287F
+:1054D0000BD05E480068E206D20E012191400840E0
+:1054E00000D001202860002070BD564870BD10B566
+:1054F000044600F08AF8002807D0E106C90E012012
+:10550000884052490860002010BD4E4810BD10B5BB
+:10551000044600F07AF8002808D0E106C90E012000
+:1055200088404A4980310860002010BD454810BDC0
+:1055300070B50D46044600F068F8002819D02846DA
+:1055400000F071F8002816D0A007C10EFF228A4093
+:10555000A807000E8840002C10DA2107090F08392F
+:105560008B0835499B005B18D96991430143D96188
+:105570000CE0344870BD3348401C70BDA3082F496F
+:105580009B005B181968914301431960002070BDAE
+:1055900070B50C46054600F038F8002805D02846BE
+:1055A000FFF73EFF2070002070BD264870BDBFF39E
+:1055B0004F8F21492648C860BFF34F8FFEE770B573
+:1055C0001F4C05462178012000290ED1207072B6AB
+:1055D00000F0F4F81C4E803631688143616000F0C1
+:1055E000EDF8C043306062B600202870002070BD26
+:1055F00013490A78002A06D0002804D1124A4868C4
+:105600001060002008700020704710B50446202864
+:1056100007DA00F0D3F80121A140084201D10120AE
+:1056200010BD002010BD012803D0032801D00020A8
+:10563000704701207047000000ED00E000E400E04A
+:10564000EC0000200120000000E100E000E200E0AA
+:105650000400FA05F8B50446800700250126002855
+:1056600004DA5848C563C66302208443E00404D5C5
+:105670005548C563C66380148443600003D553480E
+:10568000456080058443E00504D55148C563C66381
+:1056900080158443A00404D54E48C563C6634014F6
+:1056A000844360042704C00FF90F884203D04AA145
+:1056B000612000F0B8FEB80F0AD04C49CD634C48C9
+:1056C000C563C563CE63C663C6630320800384439A
+:1056D00020050AD5474FFD632F20EBF765FDFE63DC
+:1056E0002F20EBF761FDF8148443FFF7C9FD424812
+:1056F000044203D038A18D2000F095FEF8BDF0B52E
+:1057000000210A46FF230446CC40E4072AD04CB2CD
+:10571000E606F60E0125B540384E3560384E356048
+:10572000002C11DA25072D0F083DAE08354DB600C7
+:105730007719FD69A407E60E1C46B440A54314463C
+:10574000B4402543FD610DE0A6082F4DB600761943
+:105750003568A407E70E1C46BC40A5431446BC4070
+:1057600025433560491C2029CDD3F0BD70B5274CA9
+:105770000D462060FFF76EFF2068FFF7C0FF284648
+:10578000ECF7EAFEFFF788FCF7F778FBFFF778FD08
+:10579000FFF725FEECF766FD00F06AF870BD10B566
+:1057A0001A4C2068FFF756FF2068FFF7A8FFFFF7A5
+:1057B00067FDECF74BFF0020206010BD1348006828
+:1057C00070470000C01F0040C0CF004000E501400E
+:1057D000C08F0040C0DF00407372635C736F635F13
+:1057E000636F6E6669672E6300000000C0EF0040C3
+:1057F000C0FF0040C0BF0040FEFF0FFC80E100E0A2
+:1058000080E200E000ED00E000E400E0F4000020B1
+:1058100070B5002402460D4620462146002A1ED0BF
+:10582000012A04D0022A04D0032A1ED103E0012059
+:1058300002E0022013E003202B0000F0E5FE071633
+:105840000507090B0D0F1600012108E0022106E0F3
+:10585000032104E0042102E0052100E00621F8F71D
+:1058600058F8002801D0204670BD0724FBE700004F
+:10587000B348002101708170704770B5B14D0123AC
+:105880006B60B14B1C68002CFCD0002407E00E6854
+:1058900006601E68002EFCD0001D091D641C944289
+:1058A000F5D30020686018680028FCD070BD70B582
+:1058B000A34C0E466178884203D0A4A16F2000F06B
+:1058C000B2FD0325330000F09FFE09520624245246
+:1058D0005252524952002078022803D09BA17320D3
+:1058E00000F0A1FD2570A078022802D0012804D084
+:1058F00008E0A06800F0D2FB04E02046083007C8AA
+:10590000FFF7BBFF0020A070F7F7A4FF0420207072
+:1059100070BDF8F754F801466068F9F776FA064664
+:105920002078022803D089A1872000F07CFD8B4AD3
+:105930008B498C48964205D86269032A02D2521CD0
+:10594000626102E0864207D84D71801BC8608449BD
+:105950006078F8F7B4FC70BD032003E0A07800285D
+:10596000FAD10220F7F77EFE00F0E1F870BD77A1D2
+:10597000B12000F058FD70BD70B50546F8F71FF86E
+:105980006F4C60602078012803D070A1B82000F02F
+:105990004AFD73490220087000220A718D600422BA
+:1059A0004A71704ACA6020706078F8F788FC70BD50
+:1059B00010B5634CA078002802D12078002801D0CF
+:1059C000112010BD6848F7F78BFF607060780028E1
+:1059D00004D0012020700020606110BD032010BDA4
+:1059E00010B50124020B64040121604BA04202D2D5
+:1059F0009140186802E0203A58689140084000D071
+:105A0000012010BDF8B50E46910005464F19144609
+:105A10003F1F009100F053FB009980028919091F74
+:105A2000B14201D2012200E00022002C03D0FF216C
+:105A300001318C4201D90920F8BD4D498D4219D35D
+:105A4000AF4217D3854205D2874203D2284630435E
+:105A5000800701D01020F8BD8E420BD3002A09D157
+:105A60002846FFF7BDFF002804D13846FFF7B8FFEE
+:105A7000002801D00F20F8BD3E483F490068884209
+:105A800005D0224631462846FFF7F7FE0FE0FFF724
+:105A90008FFF0028EFD12A480121C660856004618C
+:105AA00081702046302148431830FFF765FF002001
+:105AB000F8BD10B504462E48800A84420BD300F08E
+:105AC000FEFAA04201D8102010BDA0020446FFF744
+:105AD00087FF002801D00F2010BD26482649006806
+:105AE000884203D0204600F0D9FA0AE0FFF760FFB1
+:105AF0000028F1D112480221846081701F48FFF70D
+:105B00003BFF002010BD1A48010B01208840401EB9
+:105B1000704700B50B460246FFF7F5FF104201D073
+:105B20000F2000BD114802604360002000BD10B589
+:105B3000034C6078F7F728FF00202070A07010BD9C
+:105B4000F800002000E5014000E401407372635C4E
+:105B5000736F635F666C6173682E6300307500005D
+:105B6000E0140020D0FB0100AF5801000006004007
+:105B70000080010078000020BEBAFECA3A5600003C
+:105B8000F74805218170002101704170C17081606A
+:105B9000704710B5F3490A78022A07D0CA6810186E
+:105BA000C860C8689638F9F7E9F810BD8A68101817
+:105BB00088608868F6E70378EB49EC4A002B02D04E
+:105BC000012B10D014E00379002B01D0012B0FD151
+:105BD0004379002B01D0012B0AD18368643B8B42AF
+:105BE00006D2C06810E00379002B03D0012B01D04E
+:105BF000002070474379002B01D0012BF8D1C368F6
+:105C0000643B8B42F4D280689042F1D80120704707
+:105C1000F8B504460226F8F740FD0068002803D0D6
+:105C2000D3A1BD2000F0FFFB0127CD4D002C08D0F3
+:105C30002078002817D0012805D0022811D0032889
+:105C400013D02F710DE06068C82808D3F9F70BF95D
+:105C5000002804D06068FFF79CFF012603E00026BF
+:105C600001E000F0F9F93046F8BD28780028F8D1B5
+:105C70006068FFF7A0FF0028E3D060680078002884
+:105C800026D0A878042803D0B9A1F72000F0CBFBD8
+:105C9000B44F0020387060680079012800D00020DF
+:105CA000387160684079002837D0042078716068C6
+:105CB0008168E868F8F71DF9B8606068C0689630D8
+:105CC000F8600320A870A749E878F8F7F8FAC8E761
+:105CD000A4480221017061680979012919D00021C5
+:105CE000017161684979002915D004214171616809
+:105CF0008968963181606168C968C160C068984CE4
+:105D000014346060F7F75BFE20606F700220A870AB
+:105D1000A7E70321E4E70321E8E70320C6E7F8B596
+:105D20008F4C0D46E178884204D0FF2090A11930B5
+:105D300000F079FB28468A4F00250126143703001E
+:105D400000F062FC090612375A7C8D97C4A0C4008B
+:105D5000A078032807D0A078022804D0FF2084A1CF
+:105D60001D3000F060FBF8BDA078032807D0A078B4
+:105D7000022804D0FF207EA1213000F054FB042033
+:105D8000A07025712078002810D1FFF702FFE0787D
+:105D9000F8F7D6F8E0607D49886A7D4A02402261C2
+:105DA0007B4AD24310408862002050E000F054F952
+:105DB000F8BDA078032807D0A078022804D0FF20DF
+:105DC0006BA1423000F02FFB2078002802D000F0B9
+:105DD0004FF9F8BDA07803281FD104202AE0091A42
+:105DE0006048C1600146E078F8F769FAF8BD042020
+:105DF000F7F738FCA570F8BDA078032807D0A07885
+:105E0000022804D0FF205AA1633000F00CFB207858
+:105E10000028DCD1A07803280BD0F7F7D0FD01468D
+:105E20003868F8F7F2FF0028E1DB79688142DEDBB1
+:105E3000D5E70520F7F716FCA670F8BDA078042872
+:105E400004D0FF204AA1843000F0EDFA0220A168BE
+:105E50008847FFF7DDFEFF260546BD3642E0A07805
+:105E6000042804D0FF2042A1893000F0DCFA012090
+:105E7000EDE7A078042899D0FF203DA18E3000F0F6
+:105E8000D2FA93E7A07804280AD06078002802D0DC
+:105E9000A078022804D0FF2035A1933000F0C3FA87
+:105EA0002078002893D12079002804D00620F7F725
+:105EB000D9FB2571C0E76078002805D02949E07832
+:105EC000F8F7FDF96570F8BD0720B3E7FF2028A1BA
+:105ED000AE3046E7002D0AD0012D06D024A1304671
+:105EE00000F0A1FA022DF5D1F8BD042000E0032056
+:105EF000A1688847FFF78CFE0546F3E770B50500FB
+:105F000005D0174CA078052803D0112070BD1020B3
+:105F100070BD2048F7F7E4FCE070E078002803D07B
+:105F2000A5600020A07070BD032070BD10B50C48A6
+:105F30000178002901D0112010BD817805292BD0CE
+:105F4000817801292AD08178002927D00121017088
+:105F50008178012922D0807800281FD020E000001D
+:105F600010010020F01400203D860100FF1FA10752
+:105F70007372635C736F635F726164696F5F74698E
+:105F80006D65736C6F742E630000000000050040A7
+:105F9000028100001F5D01000F2010BD00F068F8B5
+:105FA000002010BDF8B5394E0446B078002801D065
+:105FB00001280DD1002C0DD02046FFF7FCFD002854
+:105FC0000AD02078324D002808D0B078012823D09C
+:105FD0000F20F8BD1020F8BD0720F8BD02272F7054
+:105FE0002079012814D0002028716079002811D070
+:105FF00004206871A0689630A860E068E860E868EE
+:10600000224C14346060F7F7DAFC2060B77019E0B6
+:106010000320E9E70320ECE700202870207901281D
+:1060200016D0002028716079002813D004206871F0
+:10603000A168F068F7F75DFFA860E0689630E86057
+:106040000320B0701249F078F8F739F90020F8BD54
+:106050000320E7E70320EAE710B50E48816A0E4AFD
+:1060600011400A4A126911438162F7F7F3FB10BD30
+:1060700010B5064CE078F7F787FC0820F7F7F2FA3E
+:106080000520A07000202070607010BD100100205D
+:10609000F014002000050040FD7EFFFF0A4A0221A7
+:1060A00051600A490B68002BFCD0906008680028FA
+:1060B000FCD00020506008680028FCD07047012008
+:1060C000000740697047000000E5014000E401401E
+:1060D000034610B50B439B070FD1042A0DD308C804
+:1060E00010C9121FA342F8D018BA21BA884201D9A8
+:1060F000012010BD0020C04310BD002A03D0D307EB
+:1061000003D0521C07E0002010BD03780C78401C1F
+:10611000491C1B1B07D103780C78401C491C1B1B16
+:1061200001D1921EF1D1184610BDF8B5042A2CD326
+:10613000830712D00B78491C0370401C521E830742
+:106140000BD00B78491C0370401C521E830704D0EF
+:106150000B78491C0370401C521E8B079B0F05D007
+:10616000C91ADF002023DE1B08C90AE0EBF72CF870
+:10617000F8BD1D4608C9FD401C46B4402C4310C064
+:10618000121F042AF5D2F308C91A521EF0D40B7854
+:10619000491C0370401C521EEAD40B78491C037042
+:1061A000401C012AE4D409780170F8BD01E004C064
+:1061B000091F0429FBD28B0701D50280801CC90767
+:1061C00000D00270704700290BD0C30702D00270C4
+:1061D000401C491E022904D3830702D50280801C7B
+:1061E000891EE3E70022EEE70022DFE70378C278AA
+:1061F0001946437812061B0219438378C0781B04A2
+:10620000194311430902090A000608437047020AAC
+:1062100008704A70020C8A70020ECA707047002221
+:1062200003098B4273D3030A8B4258D3030B8B426F
+:106230003CD3030C8B4221D312E003460B437FD4A3
+:10624000002243088B4274D303098B425FD3030AB5
+:106250008B4244D3030B8B4228D3030C8B420DD3C8
+:10626000FF22090212BA030C8B4202D31212090256
+:1062700065D0030B8B4219D300E0090AC30B8B4294
+:1062800001D3CB03C01A5241830B8B4201D38B0342
+:10629000C01A5241430B8B4201D34B03C01A5241E7
+:1062A000030B8B4201D30B03C01A5241C30A8B422A
+:1062B00001D3CB02C01A5241830A8B4201D38B0215
+:1062C000C01A5241430A8B4201D34B02C01A5241B9
+:1062D000030A8B4201D30B02C01A5241CDD2C3092B
+:1062E0008B4201D3CB01C01A524183098B4201D3A7
+:1062F0008B01C01A524143098B4201D34B01C01A92
+:10630000524103098B4201D30B01C01A5241C30809
+:106310008B4201D3CB00C01A524183088B4201D378
+:106320008B00C01A524143088B4201D34B00C01A64
+:106330005241411A00D201465241104670475DE079
+:10634000CA0F00D04942031000D3404253400022FC
+:106350009C4603098B422DD3030A8B4212D3FC22A5
+:10636000890112BA030A8B420CD3890192118B4224
+:1063700008D3890192118B4204D389013AD092113A
+:1063800000E08909C3098B4201D3CB01C01A5241F5
+:1063900083098B4201D38B01C01A524143098B42BE
+:1063A00001D34B01C01A524103098B4201D30B01A7
+:1063B000C01A5241C3088B4201D3CB00C01A5241CC
+:1063C00083088B4201D38B00C01A5241D9D24308B3
+:1063D0008B4201D34B00C01A5241411A00D20146F0
+:1063E000634652415B10104601D34042002B00D55A
+:1063F0004942704763465B1000D3404201B500201C
+:10640000C046C04602BD70477047704710B500F0E7
+:106410003BF810BD012308CB134B1860134B1960D8
+:10642000134B1A607047134A134B13607246053AB8
+:10643000F0E7114A0F4B1B689A420ED10D4B00201A
+:10644000186001980D4B04B598470CBC9E46024657
+:10645000029800990A4B1B68184706980599094B42
+:106460001B68DB6818470000340100203801002059
+:106470003C0100202C010020EFBEADDEC9CD0000A4
+:10648000E4000020040000201D481E497047FFF76B
+:10649000FBFFEAF753FE00BD01200007C06AC0B24F
+:1064A000FF2804D1184819490968884202D01848C1
+:1064B00018490160184819490968884203D1184AE7
+:1064C00013605B68184700BD20BFFDE71248134901
+:1064D000096888420ED1134B18680B498842F3D0E3
+:1064E00080F308881049884204DD104802680221C0
+:1064F0000A4302600E4880470E4880470E48004716
+:106500000015002000150020FFFFFFFF0010001005
+:106510002C050040080000000010000000000020D2
+:10652000040000200080010000200020240500401D
+:10653000DFCD000099640100156401001348704527
+:1065400002D1EFF3098101E0EFF308818869023895
+:106550000078102814DB202810DB2B280BDB0C4ADA
+:1065600012680C4B9A4203D1602804DB0A4A104798
+:10657000022008607047094A10470000084A104787
+:10658000084A12682C32126810470000FDFFFFFF16
+:1065900078000020BEBAFECAAD1200003D4E0100D8
+:1065A000BF4D0100040000200D4B0E4908470E4B63
+:1065B0000C4908470D4B0B4908470D4B0949084743
+:1065C0000C4B084908470C4B064908470B4B05493B
+:1065D00008470B4B034908470A4B0249084700008C
+:1065E00079250000192200009D2B00003F2A0000A1
+:1065F000ED2900009F270000B912000013140000CD
+:10660000012B00000F23000030B47446641E25786F
+:10661000641CAB4200D21D46635D5B00E31830BCD6
+:10662000184703B5684600784006400E401C884273
+:1066300005D269460878401CC0B208700CBD684697
+:106640000078000601D500200CBD80200CBD414023
+:10665000802901D0002070470120704737B50878A5
+:106660000C4669460978884206D020781146FFF723
+:10667000D8FF207001203EBD00203EBD37B5044646
+:106680000078154669460979FFF7E1FF002801D037
+:1066900000203EBD20782946FFF7C3FF207001206F
+:1066A0003EBD0FB568460179007881420AD0684640
+:1066B000007922214006400E4843801818600120CE
+:1066C00004B000BD0020FBE77FB5684601791C4699
+:1066D00015460078FFF7BBFF002802D0002004B069
+:1066E00070BD6846007822214006400E484340199C
+:1066F00020600120F3E70000FFFFFFFF0000FFFF25
+:106700000100030000000100000000000000000084
+:1067100000000000000000008700000000000000F2
+:10672000000000000000000000000001020304005F
+:106730000D0E0F100000000033690000516B0000C7
+:10674000196C0000736C0000C76C00002F6D000016
+:106750008D690000456A0000D16D0000DF790000FE
+:10676000100110013A0200001A02000004013C006E
+:10677000230044000E0001020408102040805555FB
+:1067800055D6BE898E0000007006120DB4130000AD
+:1067900014035A06A00900006004F208840DF401F5
+:1067A000FA00960064004B0032001E001400000046
+:1067B000E067010008000020100000000411000044
+:1067C000F0670100180000202801000004110000FB
+:1067D0001869010040010020C013000020110000D2
+:1067E0000249022208681042FCD0704700E200E033
+:1067F0000000000000000000000000000000000099
+:106800000000000000000000000000000000000088
+:106810000000000000000000000000000000000078
+:10682000000000000100010054000020FB349B5FC9
+:106830008000008000100000000000000000000048
+:106840000000000000000000000000000000000048
+:106850000000000001000000000000000000000037
+:106860000000000000000000000000000000000028
+:106870000000000000000000000000000000000018
+:106880000000000000000000000000000000000008
+:1068900000000000000000000000000000000000F8
+:1068A00000000000000000000000000000000000E8
+:1068B00000000000000000000000000000000000D8
+:1068C00000000000000000000000000000000000C8
+:1068D00000000000000000000000000000000000B8
+:1068E00000000000000000000000000000000000A8
+:1068F0000000000000000000000000000000000098
+:106900000000000000000000196401000000000009
+:0869100000000000000000007F
+:00000001FF
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index 2c64876afd..3efd014359 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -419,7 +419,7 @@ class K20D50M(Target):
 
 class TEENSY3_1(Target):
     OUTPUT_EXT = 'hex'
-    
+
     def __init__(self):
         Target.__init__(self)
         self.core = "Cortex-M4"
@@ -630,7 +630,7 @@ class ARCH_MAX(Target):
         self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
         self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
         self.supported_form_factors = ["ARDUINO"]
-        
+
     def program_cycle_s(self):
         return 2
 
@@ -809,15 +809,19 @@ class NRF51822(Target):
     # of preference.
     EXPECTED_SOFTDEVICES_WITH_OFFSETS = [
         {
-            'name' : 's110_nrf51822_7.1.0_softdevice.hex',
+            'name'   : 's110_nrf51822_8.0.0_softdevice.hex',
+            'offset' : 0x18000
+        },
+        {
+            'name'   : 's110_nrf51822_7.1.0_softdevice.hex',
             'offset' : 0x16000
         },
         {
-            'name' : 's110_nrf51822_7.0.0_softdevice.hex',
+            'name'   : 's110_nrf51822_7.0.0_softdevice.hex',
             'offset' : 0x16000
         },
         {
-            'name' : 's110_nrf51822_6.0.0_softdevice.hex',
+            'name'   : 's110_nrf51822_6.0.0_softdevice.hex',
             'offset' : 0x14000
         }
     ]
@@ -918,7 +922,7 @@ class NRF51_DK_BOOT(NRF51822):
         self.supported_toolchains = ["ARM", "GCC_ARM"]
         self.MERGE_SOFT_DEVICE = True
         self.MERGE_BOOTLOADER = True
-        
+
 class NRF51_DK_OTA(NRF51822):
     def __init__(self):
         NRF51822.__init__(self)

From 3b5bda9aa4968f05017822b73a1c3ea1a17d347c Mon Sep 17 00:00:00 2001
From: ytsuboi <ytsuboi@gmail.com>
Date: Tue, 21 Apr 2015 01:35:11 +0900
Subject: [PATCH 40/45] [LPC1114] Add GCC_CR to official mbed library build

---
 workspace_tools/build_release.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 602560831b..3a921fdcf5 100755
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -38,7 +38,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('LPC1347',      ('ARM','IAR')),
     ('LPC4088',      ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
     ('LPC4088_DM',   ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
-    ('LPC1114',      ('uARM','GCC_ARM', 'IAR')),
+    ('LPC1114',      ('uARM','GCC_ARM', 'GCC_CR', 'IAR')),
     ('LPC11U35_401', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
     ('LPC11U35_501', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
     ('LPC1549',      ('uARM','GCC_ARM','GCC_CR', 'IAR')),

From f522ea7967185b865505a17692c33b5806fa0a06 Mon Sep 17 00:00:00 2001
From: Neil Thiessen <neilt66@icloud.com>
Date: Mon, 20 Apr 2015 12:28:47 -0600
Subject: [PATCH 41/45] NUCLEO-F411RE USB clock frequency fix

HAL: NUCLEO_F411RE - Corrected USB clock frequency

Modified the main PLL settings so that the USB clock will run at a proper 48MHz instead of 44.44MHz. Consequently, the core clock will now run at 96MHz instead of 100MHz.
---
 .../TARGET_NUCLEO_F411RE/system_stm32f4xx.c   | 42 +++++++++----------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
index efb6464a73..2bb21f1617 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
@@ -27,15 +27,15 @@
   *                                    | 2- PLL_HSE_XTAL        |
   *                                    | (external 8 MHz xtal)  |
   *-----------------------------------------------------------------------------
-  * SYSCLK(MHz)                        | 100                    | 100
+  * SYSCLK(MHz)                        | 96                     | 96
   *-----------------------------------------------------------------------------
-  * AHBCLK (MHz)                       | 100                    | 100
+  * AHBCLK (MHz)                       | 96                     | 96
   *-----------------------------------------------------------------------------
-  * APB1CLK (MHz)                      | 50                     | 50
+  * APB1CLK (MHz)                      | 48                     | 48
   *-----------------------------------------------------------------------------
-  * APB2CLK (MHz)                      | 100                    | 100
+  * APB2CLK (MHz)                      | 96                     | 96
   *-----------------------------------------------------------------------------
-  * USB capable (48 MHz precise clock) | NO                     | NO
+  * USB capable (48 MHz precise clock) | YES                    | YES
   *-----------------------------------------------------------------------------  
   ******************************************************************************
   * @attention
@@ -611,11 +611,11 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
   RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
   //RCC_OscInitStruct.PLL.PLLM          = 8;             // VCO input clock = 1 MHz (8 MHz / 8)
-  //RCC_OscInitStruct.PLL.PLLN          = 400;           // VCO output clock = 400 MHz (1 MHz * 400)
+  //RCC_OscInitStruct.PLL.PLLN          = 384;           // VCO output clock = 384 MHz (1 MHz * 384)
   RCC_OscInitStruct.PLL.PLLM            = 4;             // VCO input clock = 2 MHz (8 MHz / 4)
-  RCC_OscInitStruct.PLL.PLLN            = 200;           // VCO output clock = 400 MHz (2 MHz * 200)
-  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 100 MHz (400 MHz / 4)
-  RCC_OscInitStruct.PLL.PLLQ            = 9;             // USB clock = 44.44 MHz (400 MHz / 9) --> Not good for USB
+  RCC_OscInitStruct.PLL.PLLN            = 192;           // VCO output clock = 384 MHz (2 MHz * 192)
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 96 MHz (384 MHz / 4)
+  RCC_OscInitStruct.PLL.PLLQ            = 8;             // USB clock = 48 MHz (384 MHz / 8) --> Good for USB
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
   {
     return 0; // FAIL
@@ -623,10 +623,10 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
  
   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
   RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 100 MHz
-  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 100 MHz
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           //  50 MHz
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 100 MHz
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 96 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 96 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 48 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 96 MHz
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
   {
     return 0; // FAIL
@@ -665,11 +665,11 @@ uint8_t SetSysClock_PLL_HSI(void)
   RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;   
   //RCC_OscInitStruct.PLL.PLLM          = 16;            // VCO input clock = 1 MHz (16 MHz / 16)
-  //RCC_OscInitStruct.PLL.PLLN          = 400;           // VCO output clock = 400 MHz (1 MHz * 400)
+  //RCC_OscInitStruct.PLL.PLLN          = 384;           // VCO output clock = 384 MHz (1 MHz * 384)
   RCC_OscInitStruct.PLL.PLLM            = 8;             // VCO input clock = 2 MHz (16 MHz / 8)
-  RCC_OscInitStruct.PLL.PLLN            = 200;           // VCO output clock = 400 MHz (2 MHz * 200)
-  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 100 MHz (400 MHz / 4)
-  RCC_OscInitStruct.PLL.PLLQ            = 9;             // USB clock = 44.44 MHz (400 MHz / 9) --> Not good for USB
+  RCC_OscInitStruct.PLL.PLLN            = 192;           // VCO output clock = 384 MHz (2 MHz * 192)
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV4; // PLLCLK = 96 MHz (384 MHz / 4)
+  RCC_OscInitStruct.PLL.PLLQ            = 8;             // USB clock = 48 MHz (384 MHz / 8) --> Good for USB
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
   {
     return 0; // FAIL
@@ -677,10 +677,10 @@ uint8_t SetSysClock_PLL_HSI(void)
  
   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
   RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 100 MHz
-  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 100 MHz
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           //  50 MHz
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 100 MHz
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 96 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 96 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;           // 48 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 96 MHz
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
   {
     return 0; // FAIL

From bae48d52edc2b6e7124d6e71f778cd10a1f28d13 Mon Sep 17 00:00:00 2001
From: Yihui Xiong <xiongyihui3@gmail.com>
Date: Tue, 21 Apr 2015 15:03:52 +0800
Subject: [PATCH 42/45] fix LSI clock value for Arch Max (STM32F407)

---
 workspace_tools/targets.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index 3efd014359..685cea4171 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -630,6 +630,7 @@ class ARCH_MAX(Target):
         self.extra_labels = ['STM', 'STM32F4', 'STM32F407', 'STM32F407VG']
         self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
         self.supported_form_factors = ["ARDUINO"]
+        self.macros = ['LSI_VALUE=32000']
 
     def program_cycle_s(self):
         return 2

From f3936afa344dcec377c594de204cb896423eba69 Mon Sep 17 00:00:00 2001
From: Martin Kojtal <c0170@rocketmail.com>
Date: Tue, 21 Apr 2015 11:24:58 +0100
Subject: [PATCH 43/45] Revert "Fixed interrupt handler in serial_api.c for the
 Nordic NRF51. The last b..."

---
 .../TARGET_MCU_NRF51822/serial_api.c          | 39 +++++--------------
 1 file changed, 10 insertions(+), 29 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
index 4cf1819f60..8e3e8c34c7 100755
--- a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
@@ -76,7 +76,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     obj->uart->TXD = 0;
 
     obj->index = 0;
-
+    
     obj->uart->PSELRTS = RTS_PIN_NUMBER;
     obj->uart->PSELTXD = tx; //TX_PIN_NUMBER;
     obj->uart->PSELCTS = CTS_PIN_NUMBER;
@@ -162,20 +162,14 @@ extern "C" {
 #endif
 void UART0_IRQHandler()
 {
-    if((NRF_UART0->INTENSET & UART_INTENSET_TXDRDY_Msk) && NRF_UART0->EVENTS_TXDRDY)
-    {
-        uart_irq(1, 0);
+    uint32_t irtype = 0;
 
-        /*  Explicitly clear TX flag to prevent interrupt from firing
-            immediately after returning from ISR. This ensures that the
-            last interrupt in a transmission sequence is correcly handled.
-        */
-        NRF_UART0->EVENTS_TXDRDY = 0;
-    }
-    else if((NRF_UART0->INTENSET & UART_INTENSET_RXDRDY_Msk) && NRF_UART0->EVENTS_RXDRDY)
-    {
-        uart_irq(2, 0);
+    if((NRF_UART0->INTENSET & 0x80) && NRF_UART0->EVENTS_TXDRDY) {
+        irtype = 1;
+    } else if((NRF_UART0->INTENSET & 0x04) && NRF_UART0->EVENTS_RXDRDY) {
+        irtype = 2;
     }
+    uart_irq(irtype, 0);
 }
 
 #ifdef __cplusplus
@@ -245,24 +239,11 @@ int serial_getc(serial_t *obj)
 
 void serial_putc(serial_t *obj, int c)
 {
-    /*  In interrupt mode, send character immediately. Otherwise, block until
-        UART is ready to receive next character before sending.
-
-        The TXDRDY flag is cleared in interrupt handler to ensure that it is
-        cleared even if there are no more characters to send.
-    */
-    if (NRF_UART0->INTENSET & UART_INTENSET_TXDRDY_Msk)
-    {
-        obj->uart->TXD = (uint8_t)c;
+    while (!serial_writable(obj)) {
     }
-    else
-    {
-        while (!serial_writable(obj)) {
-        }
 
-        obj->uart->EVENTS_TXDRDY = 0;
-        obj->uart->TXD = (uint8_t)c;
-    }
+    obj->uart->EVENTS_TXDRDY = 0;
+    obj->uart->TXD = (uint8_t)c;
 }
 
 int serial_readable(serial_t *obj)

From f67632b347a117d2f98ec57bc8e349cd438c3f13 Mon Sep 17 00:00:00 2001
From: Giuliano Dianda <giuliano.dianda@gimmail.com>
Date: Tue, 21 Apr 2015 16:01:30 +0200
Subject: [PATCH 44/45] STM32: Fix HSE/HSI clk source detection

When using online compiler (Keil) SystemInit (and systick stuff) is call
before RW  data is initialized, so static and global variables contains
garbage. AHBPrescTable was one of these.
---
 .../TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c   | 1 +
 .../TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c  | 1 +
 .../TARGET_STM32F1/TARGET_DISCO_F100RB/system_stm32f1xx.c   | 2 +-
 .../TARGET_STM32F1/TARGET_NUCLEO_F103RB/system_stm32f1xx.c  | 2 +-
 .../cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_rcc.c       | 4 ++--
 .../cmsis/TARGET_STM/TARGET_STM32F3XX/system_stm32f30x.c    | 2 +-
 .../TARGET_STM32F4/TARGET_DISCO_F429ZI/system_stm32f4xx.c   | 2 +-
 .../TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c          | 2 +-
 .../TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c               | 2 +-
 .../TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c  | 2 +-
 .../TARGET_STM32F4/TARGET_UBLOX_C029/system_stm32f4xx.c     | 2 +-
 .../cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h     | 2 +-
 .../cmsis/TARGET_STM/TARGET_STM32F4XX/system_stm32f4xx.c    | 2 +-
 .../TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c   | 6 +++---
 .../TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c  | 6 +++---
 .../TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c  | 6 +++---
 .../cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h    | 2 +-
 .../cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c     | 4 ++--
 .../cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_conf.h    | 2 +-
 19 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c
index b20d91c33b..164d05f195 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c
@@ -209,6 +209,7 @@ void SystemInit(void)
   RCC->CIR = 0x00000000;
 
   /* Configure the Cube driver */
+  SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
   HAL_Init();
 
   /* Configure the System clock source, PLL Multiplier and Divider factors,
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c
index b2fc901df2..5b7227f3c8 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c
@@ -226,6 +226,7 @@ void SystemInit(void)
   RCC->CIR = 0x00000000;
 
   /* Configure the Cube driver */
+  SystemCoreClock = 8000000; // At this stage the HSI is used as system clock
   HAL_Init();
 
   /* Configure the System clock source, PLL Multiplier and Divider factors,
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/system_stm32f1xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/system_stm32f1xx.c
index 937b24e597..abbe81c0f0 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/system_stm32f1xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/system_stm32f1xx.c
@@ -159,7 +159,7 @@
   uint32_t SystemCoreClock         = 72000000;        /*!< System Clock Frequency (Core Clock) */
 #endif
 
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 /**
   * @}
   */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/system_stm32f1xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/system_stm32f1xx.c
index 5073ffc87c..196ddfff57 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/system_stm32f1xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/system_stm32f1xx.c
@@ -161,7 +161,7 @@
   uint32_t SystemCoreClock         = 72000000;        /*!< System Clock Frequency (Core Clock) */
 #endif
 
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 /**
   * @}
   */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_rcc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_rcc.c
index 3b8f7b6f32..d70377b7d7 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_rcc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/stm32f30x_rcc.c
@@ -141,8 +141,8 @@
 
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
-static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
-static __I uint16_t ADCPrescTable[16] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256, 0, 0, 0, 0 };
+const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint16_t ADCPrescTable[16] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256, 0, 0, 0, 0 };
 
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/system_stm32f30x.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/system_stm32f30x.c
index fb191f7aa8..5741c6da81 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/system_stm32f30x.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F3XX/system_stm32f30x.c
@@ -143,7 +143,7 @@
 
 uint32_t SystemCoreClock = 64000000; /* Default with HSI. Will be updated if HSE is used */
 
-__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/system_stm32f4xx.c
index c935079912..793c597be4 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/system_stm32f4xx.c
@@ -155,7 +155,7 @@
                variable is updated automatically.
   */
   uint32_t SystemCoreClock = 168000000;
-  __IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c
index 47507ff930..bbe76cd827 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c
@@ -158,7 +158,7 @@
                variable is updated automatically.
   */
 uint32_t SystemCoreClock = 16000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c
index 036582380a..2a2ff56b73 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c
@@ -163,7 +163,7 @@
                variable is updated automatically.
   */
 uint32_t SystemCoreClock = 16000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
index efb6464a73..4f4a6339c7 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/system_stm32f4xx.c
@@ -157,7 +157,7 @@
                variable is updated automatically.
   */
 uint32_t SystemCoreClock = 16000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/system_stm32f4xx.c
index efb6464a73..4f4a6339c7 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_C029/system_stm32f4xx.c
@@ -157,7 +157,7 @@
                variable is updated automatically.
   */
 uint32_t SystemCoreClock = 16000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h
index 3164db2057..fa720c9474 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.h
@@ -190,7 +190,7 @@ typedef struct
 
 
 #define DBP_TIMEOUT_VALUE          ((uint32_t)100)
-#define LSE_TIMEOUT_VALUE          ((uint32_t)600)
+#define LSE_TIMEOUT_VALUE          ((uint32_t)5000)
 /**
   * @}
   */
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/system_stm32f4xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/system_stm32f4xx.c
index 9e0004e7bf..02eb8f81df 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/system_stm32f4xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/system_stm32f4xx.c
@@ -184,7 +184,7 @@
 
   uint32_t SystemCoreClock = 168000000;
 
-  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c
index 2c7167a6a7..f2a95c6667 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c
@@ -145,9 +145,9 @@
                is no need to call the 2 first functions listed above, since SystemCoreClock
                variable is updated automatically.
   */
-  uint32_t SystemCoreClock = 32000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-__IO const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
+uint32_t SystemCoreClock = 32000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c
index 2c7167a6a7..f2a95c6667 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c
@@ -145,9 +145,9 @@
                is no need to call the 2 first functions listed above, since SystemCoreClock
                variable is updated automatically.
   */
-  uint32_t SystemCoreClock = 32000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-__IO const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
+uint32_t SystemCoreClock = 32000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c
index 2c7167a6a7..f2a95c6667 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c
@@ -145,9 +145,9 @@
                is no need to call the 2 first functions listed above, since SystemCoreClock
                variable is updated automatically.
   */
-  uint32_t SystemCoreClock = 32000000;
-__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-__IO const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
+uint32_t SystemCoreClock = 32000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h
index e769428483..b68cdd89e1 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h
@@ -123,7 +123,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c
index 01a586c3f7..f48f17eb5a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c
@@ -118,8 +118,8 @@
 /** @defgroup RCC_Private_Vatiables RCC Private Data
   * @{
   */ 
-static __IO const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
-static __IO const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
+const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
 
 /**
   * @}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_conf.h
index f085833f52..81c5571b5f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_conf.h
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)500)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    

From 809d8aa82baa0e196695d0c8bfec84e654676705 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Thu, 23 Apr 2015 08:55:29 +0100
Subject: [PATCH 45/45] Squashed commit of the following (PR #1023):

commit 5390a0eb7fc28dda30993602652350fd0ad87df0
Merge: 7c4831f 3998966
Author: 0xc0170 <c0170@rocketmail.com>
Date:   Thu Apr 23 08:48:31 2015 +0100

    Merge branch 'master' of https://github.com/dudmuck/mbed into dudmuck-master

    Conflicts:
    	workspace_tools/export/uvision4.py

commit 3998966b1b130716855ac01142d8da917c3e1d2f
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Thu Apr 9 13:45:09 2015 -0700

    using defines for platform specific requirement

commit 755c5d9b0713768771d110468a6750abf506bb1c
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Wed Apr 8 14:59:47 2015 -0700

    added device ID for MOTE_L152RC

commit d812fb0002dbc1eea64984bdaf4c18b335979d7d
Merge: 6ad66e8 158cbeb
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Wed Apr 8 07:25:23 2015 -0700

    Merge remote-tracking branch 'upstream/master'

commit 6ad66e89d818e595a9327710a9c79bee078b067f
Merge: 14a1807 cfb9dd1
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Fri Mar 27 15:54:03 2015 -0700

    merged upstream

commit 14a18078ca11b4126779914b02df6b75225e1315
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Mar 24 10:01:02 2015 -0700

    RTC subSeconds at 16384Hz

commit 32d75d04c18177b2fb823f011e002ec36190005a
Merge: bc84c03 ea01d61
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Mar 24 09:59:43 2015 -0700

    Merge remote-tracking branch 'upstream/master'

commit bc84c03a37e10c819e55592aa1efcb621900460b
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Mon Mar 16 16:26:18 2015 -0700

    handle HSE-PLL enabled upone deepsleep wakeup

commit 11bfe693b9a03744b1624f943fa6ed0f6b05ede6
Merge: b7cec55 fdc75bf
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Mon Mar 16 14:37:11 2015 -0700

    Merge remote-tracking branch 'upstream/master'

commit b7cec55d08020fd007046ea93f0ed968e0fb953e
Merge: c5b61f5 4b74c54
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Mon Mar 9 13:15:56 2015 -0700

    syncd with upstream

commit c5b61f5c1d366a789b426f9147cee3fc6e8cd6e3
Merge: c16a115 9d2fd3e
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Mar 3 14:05:54 2015 -0800

    syncd with upstream

commit c16a115e183b340589fb8d61f79ada1f1ce8a7e2
Merge: 51efd61 1b2a621
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 24 09:48:55 2015 -0800

    Merge remote-tracking branch 'upstream/master'

commit 51efd619f14b0534037167d5a2080106a2ac0adc
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 24 09:48:22 2015 -0800

    MOTE_L152RC

commit a122226e460e2910dfcc8e379ac3484fd5ac5e78
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 24 09:46:08 2015 -0800

    renamed SEMTECH_LORA915 to MOTE_L152RC

commit 88fcf53069d8a7e602ddfc997947d2871cb93ffa
Merge: 3e291c1 8648ff5
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Mon Feb 23 08:11:48 2015 -0800

    Merge remote-tracking branch 'upstream/master'

commit 3e291c1ccec69901c498b061a6108f0df4b6db2f
Merge: a59aefc c9e93d2
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 17 19:04:04 2015 -0800

    Merge remote-tracking branch 'upstream/master'

    syncing my fork with master

commit a59aefc6eddfeda6df91ad526f3727c2afcd1da2
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 17 18:46:27 2015 -0800

    added SEMTECH_LORA915 to python scripts

commit 15b1989b692673edfa1d69ef7ffdd7b5795e9778
Author: U-owner-PC\owner <Wayne Roberts>
Date:   Tue Feb 17 18:42:13 2015 -0800

    added platform SEMTECH_LORA915
---
 .../TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.s |  325 +
 .../TOOLCHAIN_ARM_MICRO/stm32l152rc.sct       |   45 +
 .../TOOLCHAIN_ARM_MICRO/sys.cpp               |   56 +
 .../TOOLCHAIN_ARM_STD/startup_stm32l152xc.s   |  298 +
 .../TOOLCHAIN_ARM_STD/stm32l152rc.sct         |   45 +
 .../TOOLCHAIN_ARM_STD/sys.cpp                 |   56 +
 .../TOOLCHAIN_GCC_ARM/STM32L152XC.ld          |  156 +
 .../TOOLCHAIN_GCC_ARM/startup_stm32l152xc.s   |  421 ++
 .../TOOLCHAIN_IAR/startup_stm32l152xc.s       |  536 ++
 .../TOOLCHAIN_IAR/stm32l152xc.icf             |   30 +
 .../TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis.h |   38 +
 .../TARGET_MOTE_L152RC/cmsis_nvic.c           |   55 +
 .../TARGET_MOTE_L152RC/cmsis_nvic.h           |   55 +
 .../TARGET_MOTE_L152RC/hal_tick.c             |  121 +
 .../TARGET_MOTE_L152RC/hal_tick.h             |   60 +
 .../TARGET_MOTE_L152RC/stm32l152xc.h          | 5793 +++++++++++++++++
 .../TARGET_MOTE_L152RC/stm32l1xx.h            |  247 +
 .../TARGET_MOTE_L152RC/system_stm32l1xx.c     |  607 ++
 .../TARGET_MOTE_L152RC/system_stm32l1xx.h     |  123 +
 .../TARGET_MOTE_L152RC/PeripheralNames.h      |   82 +
 .../TARGET_MOTE_L152RC/PeripheralPins.c       |  188 +
 .../TARGET_MOTE_L152RC/PinNames.h             |  183 +
 .../TARGET_MOTE_L152RC/PortNames.h            |   48 +
 .../TARGET_MOTE_L152RC/device.h               |   70 +
 .../TARGET_MOTE_L152RC/objects.h              |  110 +
 .../TARGET_STM/TARGET_STM32L1/gpio_object.h   |    4 +
 .../hal/TARGET_STM/TARGET_STM32L1/rtc_api.c   |    6 +
 .../TARGET_STM/TARGET_STM32L1/serial_api.c    |   18 +-
 .../hal/TARGET_STM/TARGET_STM32L1/sleep.c     |   31 +
 workspace_tools/export/coide.py               |    1 +
 .../export/coide_mote_l152rc.coproj.tmpl      |   90 +
 .../export/gcc_arm_mote_l152rc.tmpl           |   71 +
 workspace_tools/export/gccarm.py              |    3 +-
 workspace_tools/export/iar.py                 |    1 +
 .../export/iar_mote_l152rc.ewp.tmpl           | 1903 ++++++
 workspace_tools/export/uvision4.py            |    2 +
 .../export/uvision4_mote_l152rc.uvopt.tmpl    |  218 +
 .../export/uvision4_mote_l152rc.uvproj.tmpl   |  438 ++
 workspace_tools/targets.py                    |   10 +
 39 files changed, 12541 insertions(+), 3 deletions(-)
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.s
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/sys.cpp
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/startup_stm32l152xc.s
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/stm32l152rc.sct
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/sys.cpp
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/STM32L152XC.ld
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/startup_stm32l152xc.s
 create mode 100755 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/startup_stm32l152xc.s
 create mode 100755 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/stm32l152xc.icf
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.c
 create mode 100755 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.c
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.h
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l152xc.h
 create mode 100755 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx.h
 create mode 100755 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.c
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.h
 create mode 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralNames.h
 create mode 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralPins.c
 create mode 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PinNames.h
 create mode 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PortNames.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
 create mode 100644 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h
 mode change 100644 => 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/gpio_object.h
 mode change 100644 => 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
 mode change 100644 => 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c
 mode change 100644 => 100755 libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c
 mode change 100644 => 100755 workspace_tools/export/coide.py
 create mode 100755 workspace_tools/export/coide_mote_l152rc.coproj.tmpl
 create mode 100644 workspace_tools/export/gcc_arm_mote_l152rc.tmpl
 mode change 100644 => 100755 workspace_tools/export/gccarm.py
 mode change 100644 => 100755 workspace_tools/export/iar.py
 create mode 100755 workspace_tools/export/iar_mote_l152rc.ewp.tmpl
 create mode 100755 workspace_tools/export/uvision4_mote_l152rc.uvopt.tmpl
 create mode 100755 workspace_tools/export/uvision4_mote_l152rc.uvproj.tmpl
 mode change 100644 => 100755 workspace_tools/targets.py

diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.s
new file mode 100644
index 0000000000..3ad2ad7815
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.s
@@ -0,0 +1,325 @@
+; STM32L152RC Ultra Low Power High-density Devices vector table for MDK ARM_MICRO toolchain
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+                EXPORT  __initial_sp
+                
+Stack_Mem       SPACE   Stack_Size
+__initial_sp    EQU     0x20008000 ; Top of RAM (32 KB)
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000400
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+                
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit    EQU (__initial_sp - Stack_Size)
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler           ; Window Watchdog
+                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
+                DCD     TAMPER_STAMP_IRQHandler   ; Tamper and Time Stamp
+                DCD     RTC_WKUP_IRQHandler       ; RTC Wakeup
+                DCD     FLASH_IRQHandler          ; FLASH
+                DCD     RCC_IRQHandler            ; RCC
+                DCD     EXTI0_IRQHandler          ; EXTI Line 0
+                DCD     EXTI1_IRQHandler          ; EXTI Line 1
+                DCD     EXTI2_IRQHandler          ; EXTI Line 2
+                DCD     EXTI3_IRQHandler          ; EXTI Line 3
+                DCD     EXTI4_IRQHandler          ; EXTI Line 4
+                DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler           ; ADC1
+                DCD     USB_HP_IRQHandler         ; USB High Priority
+                DCD     USB_LP_IRQHandler         ; USB Low  Priority
+                DCD     DAC_IRQHandler            ; DAC
+                DCD     COMP_IRQHandler           ; COMP through EXTI Line
+                DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
+                DCD     LCD_IRQHandler            ; LCD
+                DCD     TIM9_IRQHandler           ; TIM9
+                DCD     TIM10_IRQHandler          ; TIM10
+                DCD     TIM11_IRQHandler          ; TIM11
+                DCD     TIM2_IRQHandler           ; TIM2
+                DCD     TIM3_IRQHandler           ; TIM3
+                DCD     TIM4_IRQHandler           ; TIM4
+                DCD     I2C1_EV_IRQHandler        ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler        ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler        ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler        ; I2C2 Error
+                DCD     SPI1_IRQHandler           ; SPI1
+                DCD     SPI2_IRQHandler           ; SPI2
+                DCD     USART1_IRQHandler         ; USART1
+                DCD     USART2_IRQHandler         ; USART2
+                DCD     USART3_IRQHandler         ; USART3
+                DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
+                DCD     RTC_Alarm_IRQHandler      ; RTC Alarm through EXTI Line
+                DCD     USB_FS_WKUP_IRQHandler    ; USB FS Wakeup from suspend
+                DCD     TIM6_IRQHandler           ; TIM6
+                DCD     TIM7_IRQHandler           ; TIM7
+                DCD     0                         ; Reserved
+                DCD     TIM5_IRQHandler           ; TIM5
+                DCD     SPI3_IRQHandler           ; SPI3
+                DCD     UART4_IRQHandler          ; UART4
+                DCD     UART5_IRQHandler          ; UART5
+                DCD     DMA2_Channel1_IRQHandler  ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler  ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler  ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler  ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler  ; DMA2 Channel 5
+                DCD     0                         ; Reserved
+                DCD     COMP_ACQ_IRQHandler       ; Comparator Channel Acquisition
+                
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+     IMPORT  __main
+     IMPORT  SystemInit
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler            [WEAK]
+                EXPORT  PVD_IRQHandler             [WEAK]
+                EXPORT  TAMPER_STAMP_IRQHandler    [WEAK]
+                EXPORT  RTC_WKUP_IRQHandler        [WEAK]
+                EXPORT  FLASH_IRQHandler           [WEAK]
+                EXPORT  RCC_IRQHandler             [WEAK]
+                EXPORT  EXTI0_IRQHandler           [WEAK]
+                EXPORT  EXTI1_IRQHandler           [WEAK]
+                EXPORT  EXTI2_IRQHandler           [WEAK]
+                EXPORT  EXTI3_IRQHandler           [WEAK]
+                EXPORT  EXTI4_IRQHandler           [WEAK]
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
+                EXPORT  ADC1_IRQHandler            [WEAK]
+                EXPORT  USB_HP_IRQHandler          [WEAK]
+                EXPORT  USB_LP_IRQHandler          [WEAK]
+                EXPORT  DAC_IRQHandler             [WEAK]
+                EXPORT  COMP_IRQHandler            [WEAK]
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
+                EXPORT  LCD_IRQHandler             [WEAK]
+                EXPORT  TIM9_IRQHandler            [WEAK]
+                EXPORT  TIM10_IRQHandler           [WEAK]
+                EXPORT  TIM11_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler            [WEAK]
+                EXPORT  TIM3_IRQHandler            [WEAK]
+                EXPORT  TIM4_IRQHandler            [WEAK]
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
+                EXPORT  SPI1_IRQHandler            [WEAK]
+                EXPORT  SPI2_IRQHandler            [WEAK]
+                EXPORT  USART1_IRQHandler          [WEAK]
+                EXPORT  USART2_IRQHandler          [WEAK]
+                EXPORT  USART3_IRQHandler          [WEAK]
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
+                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
+                EXPORT  USB_FS_WKUP_IRQHandler     [WEAK]
+                EXPORT  TIM6_IRQHandler            [WEAK]
+                EXPORT  TIM7_IRQHandler            [WEAK]
+                EXPORT  TIM5_IRQHandler            [WEAK]                                
+                EXPORT  SPI3_IRQHandler            [WEAK]
+                EXPORT  UART4_IRQHandler           [WEAK]
+                EXPORT  UART5_IRQHandler           [WEAK]
+                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
+                EXPORT  COMP_ACQ_IRQHandler        [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMPER_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+DAC_IRQHandler
+COMP_IRQHandler
+EXTI9_5_IRQHandler
+LCD_IRQHandler
+TIM9_IRQHandler
+TIM10_IRQHandler
+TIM11_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USB_FS_WKUP_IRQHandler
+TIM6_IRQHandler
+TIM7_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_ACQ_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+                END
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct
new file mode 100644
index 0000000000..2526dd7acc
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct
@@ -0,0 +1,45 @@
+; Scatter-Loading Description File
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; STM32L152RC: 256KB FLASH + 32KB SRAM
+LR_IROM1 0x08000000 0x40000  {    ; load region size_region
+
+  ER_IROM1 0x08000000 0x40000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+
+  ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
+  RW_IRAM1 (0x20000000+0x124) (0x8000-0x124)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+
+}
+
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/sys.cpp
new file mode 100644
index 0000000000..bb665909b9
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_MICRO/sys.cpp
@@ -0,0 +1,56 @@
+/* mbed Microcontroller Library - stackheap
+ * Setup a fixed single stack/heap memory model, 
+ * between the top of the RW/ZI region and the stackpointer
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
+#include <rt_misc.h>
+#include <stdint.h>
+
+extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+    uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+    uint32_t sp_limit = __current_sp();
+
+    zi_limit = (zi_limit + 7) & ~0x7;    // ensure zi_limit is 8-byte aligned
+
+    struct __initial_stackheap r;
+    r.heap_base = zi_limit;
+    r.heap_limit = sp_limit;
+    return r;
+}
+
+#ifdef __cplusplus
+}
+#endif 
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/startup_stm32l152xc.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/startup_stm32l152xc.s
new file mode 100644
index 0000000000..944c7b6812
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/startup_stm32l152xc.s
@@ -0,0 +1,298 @@
+; STM32L152RC Ultra Low Power High-density Devices vector table for MDK ARM_STD toolchain
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+__initial_sp    EQU     0x20008000 ; Top of RAM (32 KB)
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler           ; Window Watchdog
+                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
+                DCD     TAMPER_STAMP_IRQHandler   ; Tamper and Time Stamp
+                DCD     RTC_WKUP_IRQHandler       ; RTC Wakeup
+                DCD     FLASH_IRQHandler          ; FLASH
+                DCD     RCC_IRQHandler            ; RCC
+                DCD     EXTI0_IRQHandler          ; EXTI Line 0
+                DCD     EXTI1_IRQHandler          ; EXTI Line 1
+                DCD     EXTI2_IRQHandler          ; EXTI Line 2
+                DCD     EXTI3_IRQHandler          ; EXTI Line 3
+                DCD     EXTI4_IRQHandler          ; EXTI Line 4
+                DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler           ; ADC1
+                DCD     USB_HP_IRQHandler         ; USB High Priority
+                DCD     USB_LP_IRQHandler         ; USB Low  Priority
+                DCD     DAC_IRQHandler            ; DAC
+                DCD     COMP_IRQHandler           ; COMP through EXTI Line
+                DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
+                DCD     LCD_IRQHandler            ; LCD
+                DCD     TIM9_IRQHandler           ; TIM9
+                DCD     TIM10_IRQHandler          ; TIM10
+                DCD     TIM11_IRQHandler          ; TIM11
+                DCD     TIM2_IRQHandler           ; TIM2
+                DCD     TIM3_IRQHandler           ; TIM3
+                DCD     TIM4_IRQHandler           ; TIM4
+                DCD     I2C1_EV_IRQHandler        ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler        ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler        ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler        ; I2C2 Error
+                DCD     SPI1_IRQHandler           ; SPI1
+                DCD     SPI2_IRQHandler           ; SPI2
+                DCD     USART1_IRQHandler         ; USART1
+                DCD     USART2_IRQHandler         ; USART2
+                DCD     USART3_IRQHandler         ; USART3
+                DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
+                DCD     RTC_Alarm_IRQHandler      ; RTC Alarm through EXTI Line
+                DCD     USB_FS_WKUP_IRQHandler    ; USB FS Wakeup from suspend
+                DCD     TIM6_IRQHandler           ; TIM6
+                DCD     TIM7_IRQHandler           ; TIM7
+                DCD     0                         ; Reserved
+                DCD     TIM5_IRQHandler           ; TIM5
+                DCD     SPI3_IRQHandler           ; SPI3
+                DCD     UART4_IRQHandler          ; UART4
+                DCD     UART5_IRQHandler          ; UART5
+                DCD     DMA2_Channel1_IRQHandler  ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler  ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler  ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler  ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler  ; DMA2 Channel 5
+                DCD     0                         ; Reserved
+                DCD     COMP_ACQ_IRQHandler       ; Comparator Channel Acquisition
+                
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+     IMPORT  __main
+     IMPORT  SystemInit
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler            [WEAK]
+                EXPORT  PVD_IRQHandler             [WEAK]
+                EXPORT  TAMPER_STAMP_IRQHandler    [WEAK]
+                EXPORT  RTC_WKUP_IRQHandler        [WEAK]
+                EXPORT  FLASH_IRQHandler           [WEAK]
+                EXPORT  RCC_IRQHandler             [WEAK]
+                EXPORT  EXTI0_IRQHandler           [WEAK]
+                EXPORT  EXTI1_IRQHandler           [WEAK]
+                EXPORT  EXTI2_IRQHandler           [WEAK]
+                EXPORT  EXTI3_IRQHandler           [WEAK]
+                EXPORT  EXTI4_IRQHandler           [WEAK]
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
+                EXPORT  ADC1_IRQHandler            [WEAK]
+                EXPORT  USB_HP_IRQHandler          [WEAK]
+                EXPORT  USB_LP_IRQHandler          [WEAK]
+                EXPORT  DAC_IRQHandler             [WEAK]
+                EXPORT  COMP_IRQHandler            [WEAK]
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
+                EXPORT  LCD_IRQHandler             [WEAK]
+                EXPORT  TIM9_IRQHandler            [WEAK]
+                EXPORT  TIM10_IRQHandler           [WEAK]
+                EXPORT  TIM11_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler            [WEAK]
+                EXPORT  TIM3_IRQHandler            [WEAK]
+                EXPORT  TIM4_IRQHandler            [WEAK]
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
+                EXPORT  SPI1_IRQHandler            [WEAK]
+                EXPORT  SPI2_IRQHandler            [WEAK]
+                EXPORT  USART1_IRQHandler          [WEAK]
+                EXPORT  USART2_IRQHandler          [WEAK]
+                EXPORT  USART3_IRQHandler          [WEAK]
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
+                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
+                EXPORT  USB_FS_WKUP_IRQHandler     [WEAK]
+                EXPORT  TIM6_IRQHandler            [WEAK]
+                EXPORT  TIM7_IRQHandler            [WEAK]
+                EXPORT  TIM5_IRQHandler            [WEAK]                                
+                EXPORT  SPI3_IRQHandler            [WEAK]
+                EXPORT  UART4_IRQHandler           [WEAK]
+                EXPORT  UART5_IRQHandler           [WEAK]
+                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
+                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
+                EXPORT  COMP_ACQ_IRQHandler        [WEAK]
+
+WWDG_IRQHandler
+PVD_IRQHandler
+TAMPER_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+USB_HP_IRQHandler
+USB_LP_IRQHandler
+DAC_IRQHandler
+COMP_IRQHandler
+EXTI9_5_IRQHandler
+LCD_IRQHandler
+TIM9_IRQHandler
+TIM10_IRQHandler
+TIM11_IRQHandler
+TIM2_IRQHandler
+TIM3_IRQHandler
+TIM4_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+USB_FS_WKUP_IRQHandler
+TIM6_IRQHandler
+TIM7_IRQHandler
+TIM5_IRQHandler
+SPI3_IRQHandler
+UART4_IRQHandler
+UART5_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_ACQ_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+                END
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/stm32l152rc.sct b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/stm32l152rc.sct
new file mode 100644
index 0000000000..2526dd7acc
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/stm32l152rc.sct
@@ -0,0 +1,45 @@
+; Scatter-Loading Description File
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Copyright (c) 2014, STMicroelectronics
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice,
+;     this list of conditions and the following disclaimer.
+; 2. Redistributions in binary form must reproduce the above copyright notice,
+;    this list of conditions and the following disclaimer in the documentation
+;    and/or other materials provided with the distribution.
+; 3. Neither the name of STMicroelectronics nor the names of its contributors
+;    may be used to endorse or promote products derived from this software
+;    without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; STM32L152RC: 256KB FLASH + 32KB SRAM
+LR_IROM1 0x08000000 0x40000  {    ; load region size_region
+
+  ER_IROM1 0x08000000 0x40000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+
+  ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
+  RW_IRAM1 (0x20000000+0x124) (0x8000-0x124)  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+
+}
+
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/sys.cpp
new file mode 100644
index 0000000000..bb665909b9
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_ARM_STD/sys.cpp
@@ -0,0 +1,56 @@
+/* mbed Microcontroller Library - stackheap
+ * Setup a fixed single stack/heap memory model, 
+ * between the top of the RW/ZI region and the stackpointer
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+ *******************************************************************************
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
+#include <rt_misc.h>
+#include <stdint.h>
+
+extern char Image$$RW_IRAM1$$ZI$$Limit[];
+
+extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
+    uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
+    uint32_t sp_limit = __current_sp();
+
+    zi_limit = (zi_limit + 7) & ~0x7;    // ensure zi_limit is 8-byte aligned
+
+    struct __initial_stackheap r;
+    r.heap_base = zi_limit;
+    r.heap_limit = sp_limit;
+    return r;
+}
+
+#ifdef __cplusplus
+}
+#endif 
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/STM32L152XC.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/STM32L152XC.ld
new file mode 100644
index 0000000000..3a778eb3bb
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/STM32L152XC.ld
@@ -0,0 +1,156 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  /* 256KB FLASH, 32KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292
+   * bytes (0x124) in RAM. But all GCC scripts seem to require BootRAM @0x138
+   */
+  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k
+  RAM (rwx) : ORIGIN = 0x2000013C, LENGTH = 0x8000-0x13C
+}
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   _estack
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        KEEP(*(.isr_vector))
+        *(.text*)
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+
+        KEEP(*(.eh_frame*))
+    } > FLASH
+
+    .ARM.extab : 
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    __etext = .;
+    _sidata = .;
+
+    .data : AT (__etext)
+    {
+        __data_start__ = .;
+        _sdata = .;
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+        . = ALIGN(4);
+        /* All data end */
+        __data_end__ = .;
+        _edata = .;
+
+    } > RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        _sbss = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+        _ebss = .;
+    } > RAM
+
+    .heap (COPY):
+    {
+        __end__ = .;
+        end = __end__;
+        *(.heap*)
+        __HeapLimit = .;
+    } > RAM
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > RAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
+    _estack = __StackTop;
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/startup_stm32l152xc.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/startup_stm32l152xc.s
new file mode 100644
index 0000000000..8ff7570d7b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_GCC_ARM/startup_stm32l152xc.s
@@ -0,0 +1,421 @@
+/**
+  ******************************************************************************
+  * @file      startup_stm32l152xc.s
+  * @author    MCD Application Team
+  * @version   V2.0.0
+  * @date      5-September-2014
+  * @brief     STM32L152XC Devices vector table for 
+  *            Atollic toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Configure the clock system
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M3 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+  .cpu cortex-m3
+  .fpu softvfp
+  .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ  BootRAM, 0xF108F85F
+/**
+ * @brief  This is the code that gets called when the processor first
+ *          starts execution following a reset event. Only the absolutely
+ *          necessary set is performed, after which the application
+ *          supplied main() routine is called.
+ * @param  None
+ * @retval : None
+*/
+
+  .section .text.Reset_Handler
+  .weak Reset_Handler
+  .type Reset_Handler, %function
+Reset_Handler:
+
+/* Copy the data segment initializers from flash to SRAM */
+  movs r1, #0
+  b LoopCopyDataInit
+
+CopyDataInit:
+  ldr r3, =_sidata
+  ldr r3, [r3, r1]
+  str r3, [r0, r1]
+  adds r1, r1, #4
+
+LoopCopyDataInit:
+  ldr r0, =_sdata
+  ldr r3, =_edata
+  adds r2, r0, r1
+  cmp r2, r3
+  bcc CopyDataInit
+  ldr r2, =_sbss
+  b LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+  movs r3, #0
+  str r3, [r2], #4
+
+LoopFillZerobss:
+  ldr r3, = _ebss
+  cmp r2, r3
+  bcc FillZerobss
+
+/* Call the clock system intitialization function.*/
+    bl  SystemInit
+/* Call static constructors */
+    bl __libc_init_array
+/* Call the application's entry point.*/
+  bl main
+  bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval : None
+*/
+    .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b Infinite_Loop
+  .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex M3.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+   .section .isr_vector,"a",%progbits
+  .type g_pfnVectors, %object
+  .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+  .word _estack
+  .word Reset_Handler
+  .word NMI_Handler
+  .word HardFault_Handler
+  .word MemManage_Handler
+  .word BusFault_Handler
+  .word UsageFault_Handler
+  .word 0
+  .word 0
+  .word 0
+  .word 0
+  .word SVC_Handler
+  .word DebugMon_Handler
+  .word 0
+  .word PendSV_Handler
+  .word SysTick_Handler
+  .word WWDG_IRQHandler
+  .word PVD_IRQHandler
+  .word TAMPER_STAMP_IRQHandler
+  .word RTC_WKUP_IRQHandler
+  .word FLASH_IRQHandler
+  .word RCC_IRQHandler
+  .word EXTI0_IRQHandler
+  .word EXTI1_IRQHandler
+  .word EXTI2_IRQHandler
+  .word EXTI3_IRQHandler
+  .word EXTI4_IRQHandler
+  .word DMA1_Channel1_IRQHandler
+  .word DMA1_Channel2_IRQHandler
+  .word DMA1_Channel3_IRQHandler
+  .word DMA1_Channel4_IRQHandler
+  .word DMA1_Channel5_IRQHandler
+  .word DMA1_Channel6_IRQHandler
+  .word DMA1_Channel7_IRQHandler
+  .word ADC1_IRQHandler
+  .word USB_HP_IRQHandler
+  .word USB_LP_IRQHandler
+  .word DAC_IRQHandler
+  .word COMP_IRQHandler
+  .word EXTI9_5_IRQHandler
+  .word LCD_IRQHandler  
+  .word TIM9_IRQHandler
+  .word TIM10_IRQHandler
+  .word TIM11_IRQHandler
+  .word TIM2_IRQHandler
+  .word TIM3_IRQHandler
+  .word TIM4_IRQHandler
+  .word I2C1_EV_IRQHandler
+  .word I2C1_ER_IRQHandler
+  .word I2C2_EV_IRQHandler
+  .word I2C2_ER_IRQHandler
+  .word SPI1_IRQHandler
+  .word SPI2_IRQHandler
+  .word USART1_IRQHandler
+  .word USART2_IRQHandler
+  .word USART3_IRQHandler
+  .word EXTI15_10_IRQHandler
+  .word RTC_Alarm_IRQHandler
+  .word USB_FS_WKUP_IRQHandler
+  .word TIM6_IRQHandler
+  .word TIM7_IRQHandler
+  .word 0
+  .word TIM5_IRQHandler
+  .word SPI3_IRQHandler
+  .word 0
+  .word 0
+  .word DMA2_Channel1_IRQHandler
+  .word DMA2_Channel2_IRQHandler
+  .word DMA2_Channel3_IRQHandler
+  .word DMA2_Channel4_IRQHandler
+  .word DMA2_Channel5_IRQHandler
+  .word 0
+  .word COMP_ACQ_IRQHandler
+  .word 0
+  .word 0
+  .word 0
+  .word 0
+  .word 0
+  .word BootRAM          /* @0x108. This is for boot in RAM mode for 
+                            STM32L152XE devices. */
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+  .weak NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+
+  .weak HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+
+  .weak MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+
+  .weak BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
+
+  .weak UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
+
+  .weak SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
+
+  .weak DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
+
+  .weak PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
+
+  .weak SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
+
+  .weak WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
+
+  .weak PVD_IRQHandler
+  .thumb_set PVD_IRQHandler,Default_Handler
+
+  .weak TAMPER_STAMP_IRQHandler
+  .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
+
+  .weak RTC_WKUP_IRQHandler
+  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+  .weak FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
+
+  .weak RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
+
+  .weak EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
+
+  .weak EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
+
+  .weak EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
+
+  .weak EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
+
+  .weak EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+  .weak DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+  .weak ADC1_IRQHandler
+  .thumb_set ADC1_IRQHandler,Default_Handler
+
+  .weak USB_HP_IRQHandler
+  .thumb_set USB_HP_IRQHandler,Default_Handler
+
+  .weak USB_LP_IRQHandler
+  .thumb_set USB_LP_IRQHandler,Default_Handler
+
+  .weak DAC_IRQHandler
+  .thumb_set DAC_IRQHandler,Default_Handler
+
+  .weak COMP_IRQHandler
+  .thumb_set COMP_IRQHandler,Default_Handler
+
+  .weak EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+  .weak LCD_IRQHandler
+  .thumb_set LCD_IRQHandler,Default_Handler  
+
+  .weak TIM9_IRQHandler
+  .thumb_set TIM9_IRQHandler,Default_Handler
+
+  .weak TIM10_IRQHandler
+  .thumb_set TIM10_IRQHandler,Default_Handler
+
+  .weak TIM11_IRQHandler
+  .thumb_set TIM11_IRQHandler,Default_Handler
+
+  .weak TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
+
+  .weak TIM3_IRQHandler
+  .thumb_set TIM3_IRQHandler,Default_Handler
+
+  .weak TIM4_IRQHandler
+  .thumb_set TIM4_IRQHandler,Default_Handler
+
+  .weak I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+  .weak I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+  .weak I2C2_EV_IRQHandler
+  .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+  .weak I2C2_ER_IRQHandler
+  .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+  .weak SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
+
+  .weak SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
+
+  .weak USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
+
+  .weak USART2_IRQHandler
+  .thumb_set USART2_IRQHandler,Default_Handler
+
+  .weak USART3_IRQHandler
+  .thumb_set USART3_IRQHandler,Default_Handler
+
+  .weak EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+  .weak RTC_Alarm_IRQHandler
+  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+  .weak USB_FS_WKUP_IRQHandler
+  .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
+
+  .weak TIM6_IRQHandler
+  .thumb_set TIM6_IRQHandler,Default_Handler
+
+  .weak TIM7_IRQHandler
+  .thumb_set TIM7_IRQHandler,Default_Handler
+
+  .weak TIM5_IRQHandler
+  .thumb_set TIM5_IRQHandler,Default_Handler
+  
+  .weak SPI3_IRQHandler
+  .thumb_set SPI3_IRQHandler,Default_Handler
+
+  .weak DMA2_Channel1_IRQHandler
+  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+  .weak DMA2_Channel2_IRQHandler
+  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+  .weak DMA2_Channel3_IRQHandler
+  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+  .weak DMA2_Channel4_IRQHandler
+  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+  .weak DMA2_Channel5_IRQHandler
+  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+  .weak COMP_ACQ_IRQHandler
+   .thumb_set COMP_ACQ_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/startup_stm32l152xc.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/startup_stm32l152xc.s
new file mode 100755
index 0000000000..44c8aacb9c
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/startup_stm32l152xc.s
@@ -0,0 +1,536 @@
+;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
+;* File Name          : startup_stm32l152xc.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.0
+;* Date               : 5-September-2014
+;* Description        : STM32L152XC Devices vector for EWARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == __iar_program_start,
+;*                      - Set the vector table entries with the exceptions ISR 
+;*                        address.
+;*                      - Configure the system clock
+;*                      - Branches to main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M3 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;********************************************************************************
+;*
+;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit        
+        PUBLIC  __vector_table
+
+        DATA
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler             ; Reset Handler
+
+        DCD     NMI_Handler               ; NMI Handler
+        DCD     HardFault_Handler         ; Hard Fault Handler
+        DCD     MemManage_Handler         ; MPU Fault Handler
+        DCD     BusFault_Handler          ; Bus Fault Handler
+        DCD     UsageFault_Handler        ; Usage Fault Handler
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     SVC_Handler               ; SVCall Handler
+        DCD     DebugMon_Handler          ; Debug Monitor Handler
+        DCD     0                         ; Reserved
+        DCD     PendSV_Handler            ; PendSV Handler
+        DCD     SysTick_Handler           ; SysTick Handler
+
+         ; External Interrupts
+        DCD     WWDG_IRQHandler           ; Window Watchdog
+        DCD     PVD_IRQHandler            ; PVD through EXTI Line detect
+        DCD     TAMPER_STAMP_IRQHandler   ; Tamper and Time Stamp
+        DCD     RTC_WKUP_IRQHandler       ; RTC Wakeup
+        DCD     FLASH_IRQHandler          ; FLASH
+        DCD     RCC_IRQHandler            ; RCC
+        DCD     EXTI0_IRQHandler          ; EXTI Line 0
+        DCD     EXTI1_IRQHandler          ; EXTI Line 1
+        DCD     EXTI2_IRQHandler          ; EXTI Line 2
+        DCD     EXTI3_IRQHandler          ; EXTI Line 3
+        DCD     EXTI4_IRQHandler          ; EXTI Line 4
+        DCD     DMA1_Channel1_IRQHandler  ; DMA1 Channel 1
+        DCD     DMA1_Channel2_IRQHandler  ; DMA1 Channel 2
+        DCD     DMA1_Channel3_IRQHandler  ; DMA1 Channel 3
+        DCD     DMA1_Channel4_IRQHandler  ; DMA1 Channel 4
+        DCD     DMA1_Channel5_IRQHandler  ; DMA1 Channel 5
+        DCD     DMA1_Channel6_IRQHandler  ; DMA1 Channel 6
+        DCD     DMA1_Channel7_IRQHandler  ; DMA1 Channel 7
+        DCD     ADC1_IRQHandler           ; ADC1
+        DCD     USB_HP_IRQHandler         ; USB High Priority
+        DCD     USB_LP_IRQHandler         ; USB Low  Priority
+        DCD     DAC_IRQHandler            ; DAC
+        DCD     COMP_IRQHandler           ; COMP through EXTI Line
+        DCD     EXTI9_5_IRQHandler        ; EXTI Line 9..5
+        DCD     LCD_IRQHandler            ; LCD
+        DCD     TIM9_IRQHandler           ; TIM9
+        DCD     TIM10_IRQHandler          ; TIM10
+        DCD     TIM11_IRQHandler          ; TIM11
+        DCD     TIM2_IRQHandler           ; TIM2
+        DCD     TIM3_IRQHandler           ; TIM3
+        DCD     TIM4_IRQHandler           ; TIM4
+        DCD     I2C1_EV_IRQHandler        ; I2C1 Event
+        DCD     I2C1_ER_IRQHandler        ; I2C1 Error
+        DCD     I2C2_EV_IRQHandler        ; I2C2 Event
+        DCD     I2C2_ER_IRQHandler        ; I2C2 Error
+        DCD     SPI1_IRQHandler           ; SPI1
+        DCD     SPI2_IRQHandler           ; SPI2
+        DCD     USART1_IRQHandler         ; USART1
+        DCD     USART2_IRQHandler         ; USART2
+        DCD     USART3_IRQHandler         ; USART3
+        DCD     EXTI15_10_IRQHandler      ; EXTI Line 15..10
+        DCD     RTC_Alarm_IRQHandler      ; RTC Alarm through EXTI Line
+        DCD     USB_FS_WKUP_IRQHandler    ; USB FS Wakeup from suspend
+        DCD     TIM6_IRQHandler           ; TIM6
+        DCD     TIM7_IRQHandler           ; TIM7
+        DCD     0                         ; Reserved
+        DCD     TIM5_IRQHandler           ; TIM5
+        DCD     SPI3_IRQHandler           ; SPI3
+        DCD     0                         ; Reserved
+        DCD     0                         ; Reserved
+        DCD     DMA2_Channel1_IRQHandler  ; DMA2 Channel 1
+        DCD     DMA2_Channel2_IRQHandler  ; DMA2 Channel 2
+        DCD     DMA2_Channel3_IRQHandler  ; DMA2 Channel 3
+        DCD     DMA2_Channel4_IRQHandler  ; DMA2 Channel 4
+        DCD     DMA2_Channel5_IRQHandler  ; DMA2 Channel 5
+        DCD     0                         ; Reserved
+        DCD     COMP_ACQ_IRQHandler       ; Comparator Channel Acquisition 
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+        
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+        B NMI_Handler
+        
+        
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+        B HardFault_Handler
+        
+        
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+MemManage_Handler
+        B MemManage_Handler
+        
+                
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+        B BusFault_Handler
+        
+        
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+        B UsageFault_Handler
+        
+        
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+        B SVC_Handler
+        
+        
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+        B DebugMon_Handler
+        
+        
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+        B PendSV_Handler
+        
+        
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+        B SysTick_Handler
+        
+        
+        PUBWEAK WWDG_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+WWDG_IRQHandler
+        B WWDG_IRQHandler
+        
+        
+        PUBWEAK PVD_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+PVD_IRQHandler
+        B PVD_IRQHandler
+        
+        
+        PUBWEAK TAMPER_STAMP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TAMPER_STAMP_IRQHandler
+        B TAMPER_STAMP_IRQHandler
+        
+        
+        PUBWEAK RTC_WKUP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+RTC_WKUP_IRQHandler
+        B RTC_WKUP_IRQHandler
+        
+        
+        PUBWEAK FLASH_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+FLASH_IRQHandler
+        B FLASH_IRQHandler
+        
+        
+        PUBWEAK RCC_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+RCC_IRQHandler
+        B RCC_IRQHandler
+        
+        
+        PUBWEAK EXTI0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI0_IRQHandler
+        B EXTI0_IRQHandler
+        
+        
+        PUBWEAK EXTI1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI1_IRQHandler
+        B EXTI1_IRQHandler
+        
+        
+        PUBWEAK EXTI2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI2_IRQHandler
+        B EXTI2_IRQHandler
+        
+        
+        PUBWEAK EXTI3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI3_IRQHandler
+        B EXTI3_IRQHandler
+        
+        
+        PUBWEAK EXTI4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI4_IRQHandler
+        B EXTI4_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel1_IRQHandler
+        B DMA1_Channel1_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel2_IRQHandler
+        B DMA1_Channel2_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel3_IRQHandler
+        B DMA1_Channel3_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel4_IRQHandler
+        B DMA1_Channel4_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel5_IRQHandler
+        B DMA1_Channel5_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel6_IRQHandler
+        B DMA1_Channel6_IRQHandler
+        
+        
+        PUBWEAK DMA1_Channel7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA1_Channel7_IRQHandler
+        B DMA1_Channel7_IRQHandler
+        
+        
+        PUBWEAK ADC1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ADC1_IRQHandler
+        B ADC1_IRQHandler
+        
+        
+        PUBWEAK USB_HP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USB_HP_IRQHandler
+        B USB_HP_IRQHandler
+        
+        
+        PUBWEAK USB_LP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USB_LP_IRQHandler
+        B USB_LP_IRQHandler
+        
+        
+        PUBWEAK DAC_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DAC_IRQHandler
+        B DAC_IRQHandler
+        
+        
+        PUBWEAK COMP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+COMP_IRQHandler
+        B COMP_IRQHandler
+        
+        
+        PUBWEAK EXTI9_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI9_5_IRQHandler
+        B EXTI9_5_IRQHandler
+        
+        
+        PUBWEAK LCD_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+LCD_IRQHandler
+        B LCD_IRQHandler
+        
+        
+        PUBWEAK TIM9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM9_IRQHandler
+        B TIM9_IRQHandler
+        
+        
+        PUBWEAK TIM10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM10_IRQHandler
+        B TIM10_IRQHandler
+        
+        
+        PUBWEAK TIM11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM11_IRQHandler
+        B TIM11_IRQHandler
+        
+        
+        PUBWEAK TIM2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM2_IRQHandler
+        B TIM2_IRQHandler
+        
+        
+        PUBWEAK TIM3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM3_IRQHandler
+        B TIM3_IRQHandler
+        
+        
+        PUBWEAK TIM4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM4_IRQHandler
+        B TIM4_IRQHandler
+        
+        
+        PUBWEAK I2C1_EV_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+I2C1_EV_IRQHandler
+        B I2C1_EV_IRQHandler
+        
+        
+        PUBWEAK I2C1_ER_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+I2C1_ER_IRQHandler
+        B I2C1_ER_IRQHandler
+        
+        
+        PUBWEAK I2C2_EV_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+I2C2_EV_IRQHandler
+        B I2C2_EV_IRQHandler
+        
+        
+        PUBWEAK I2C2_ER_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+I2C2_ER_IRQHandler
+        B I2C2_ER_IRQHandler
+        
+        
+        PUBWEAK SPI1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SPI1_IRQHandler
+        B SPI1_IRQHandler
+        
+        
+        PUBWEAK SPI2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SPI2_IRQHandler
+        B SPI2_IRQHandler
+        
+        
+        PUBWEAK USART1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USART1_IRQHandler
+        B USART1_IRQHandler
+        
+        
+        PUBWEAK USART2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USART2_IRQHandler
+        B USART2_IRQHandler
+        
+        
+        PUBWEAK USART3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USART3_IRQHandler
+        B USART3_IRQHandler
+        
+        
+        PUBWEAK EXTI15_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+EXTI15_10_IRQHandler
+        B EXTI15_10_IRQHandler
+        
+        
+        PUBWEAK RTC_Alarm_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+RTC_Alarm_IRQHandler
+        B RTC_Alarm_IRQHandler
+        
+        
+        PUBWEAK USB_FS_WKUP_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+USB_FS_WKUP_IRQHandler
+        B USB_FS_WKUP_IRQHandler
+        
+
+        PUBWEAK TIM6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM6_IRQHandler
+        B TIM6_IRQHandler
+        
+
+        PUBWEAK TIM7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM7_IRQHandler
+        B TIM7_IRQHandler
+
+
+        PUBWEAK TIM5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIM5_IRQHandler
+        B TIM5_IRQHandler
+
+        PUBWEAK SPI3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SPI3_IRQHandler
+        B SPI3_IRQHandler
+
+
+        PUBWEAK DMA2_Channel1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA2_Channel1_IRQHandler
+        B DMA2_Channel1_IRQHandler
+
+        
+        PUBWEAK DMA2_Channel2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA2_Channel2_IRQHandler
+        B DMA2_Channel2_IRQHandler
+
+        
+        PUBWEAK DMA2_Channel3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA2_Channel3_IRQHandler
+        B DMA2_Channel3_IRQHandler
+
+        
+        PUBWEAK DMA2_Channel4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA2_Channel4_IRQHandler
+        B DMA2_Channel4_IRQHandler
+
+        
+        PUBWEAK DMA2_Channel5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DMA2_Channel5_IRQHandler
+        B DMA2_Channel5_IRQHandler
+
+
+        PUBWEAK COMP_ACQ_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+COMP_ACQ_IRQHandler
+        B COMP_ACQ_IRQHandler
+
+        END
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/stm32l152xc.icf b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/stm32l152xc.icf
new file mode 100755
index 0000000000..aed878fb05
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/TOOLCHAIN_IAR/stm32l152xc.icf
@@ -0,0 +1,30 @@
+/* [ROM = 256kb = 0x40000] */
+define symbol __intvec_start__     = 0x08000000;
+define symbol __region_ROM_start__ = 0x08000000;
+define symbol __region_ROM_end__   = 0x0803FFFF;
+
+/* [RAM = 32kb = 0x8000] Vector table dynamic copy: 73 vectors = 292 bytes (0x124) to be reserved in RAM */
+define symbol __NVIC_start__          = 0x20000000;
+define symbol __NVIC_end__            = 0x20000127; /* Add 4 more bytes to be aligned on 8 bytes */
+define symbol __region_RAM_start__    = 0x20000128;
+define symbol __region_RAM_end__      = 0x20007FFF;
+
+/* Memory regions */
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
+define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
+
+/* Stack and Heap */
+define symbol __size_cstack__ = 0x800;
+define symbol __size_heap__   = 0x800;
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+
+initialize by copy with packing = zeros { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite, block STACKHEAP };
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis.h
new file mode 100644
index 0000000000..8c32259ba3
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis.h
@@ -0,0 +1,38 @@
+/* mbed Microcontroller Library
+ * A generic CMSIS include header
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#ifndef MBED_CMSIS_H
+#define MBED_CMSIS_H
+
+#include "stm32l1xx.h"
+#include "cmsis_nvic.h"
+
+#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.c
new file mode 100644
index 0000000000..2da63fc9af
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.c
@@ -0,0 +1,55 @@
+/* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */ 
+#include "cmsis_nvic.h"
+
+#define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
+#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
+    uint32_t *vectors = (uint32_t *)SCB->VTOR;
+    uint32_t i;
+
+    // Copy and switch to dynamic vectors if the first time called
+    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+        uint32_t *old_vectors = vectors;
+        vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
+        for (i=0; i<NVIC_NUM_VECTORS; i++) {
+            vectors[i] = old_vectors[i];
+        }
+        SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
+    }
+    vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+}
+
+uint32_t NVIC_GetVector(IRQn_Type IRQn) {
+    uint32_t *vectors = (uint32_t*)SCB->VTOR;
+    return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.h
new file mode 100755
index 0000000000..29fbb15f40
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/cmsis_nvic.h
@@ -0,0 +1,55 @@
+/* mbed Microcontroller Library
+ * CMSIS-style functionality to support dynamic vectors
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */ 
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+// STM32L152RC
+// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
+// MCU Peripherals: 57 vectors = 228 bytes from 0x40 to 0x123
+// Total: 73 vectors = 292 bytes (0x124) to be reserved in RAM
+#define NVIC_NUM_VECTORS      73
+#define NVIC_USER_IRQ_OFFSET  16
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
+uint32_t NVIC_GetVector(IRQn_Type IRQn);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.c
new file mode 100644
index 0000000000..ec96c6ce0d
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.c
@@ -0,0 +1,121 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.c
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#include "hal_tick.h"
+
+TIM_HandleTypeDef TimMasterHandle;
+uint32_t PreviousVal = 0;
+
+void us_ticker_irq_handler(void);
+
+void timer_irq_handler(void) {
+    // Channel 1 for mbed timeout
+    if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
+        us_ticker_irq_handler();
+    }
+
+    // Channel 2 for HAL tick
+    if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
+        __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
+        uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
+        if ((val - PreviousVal) >= HAL_TICK_DELAY) {
+            // Increment HAL variable
+            HAL_IncTick();
+            // Prepare next interrupt
+            __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
+            PreviousVal = val;
+#if 0 // For DEBUG only
+            HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
+#endif
+        }
+    }
+}
+
+// Reconfigure the HAL tick using a standard timer instead of systick.
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
+    // Enable timer clock
+    TIM_MST_RCC;
+
+    // Reset timer
+    TIM_MST_RESET_ON;
+    TIM_MST_RESET_OFF;
+
+    // Update the SystemCoreClock variable
+    SystemCoreClockUpdate();
+
+    // Configure time base
+    TimMasterHandle.Instance = TIM_MST;
+    TimMasterHandle.Init.Period            = 0xFFFFFFFF;
+    TimMasterHandle.Init.Prescaler         = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 us tick
+    TimMasterHandle.Init.ClockDivision     = 0;
+    TimMasterHandle.Init.CounterMode       = TIM_COUNTERMODE_UP;
+    HAL_TIM_OC_Init(&TimMasterHandle);
+
+    NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
+    NVIC_EnableIRQ(TIM_MST_IRQ);
+
+    // Channel 1 for mbed timeout
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
+
+    // Channel 2 for HAL tick
+    HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
+    PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
+    __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
+    __HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
+
+#if 0 // For DEBUG only
+    __GPIOB_CLK_ENABLE();
+    GPIO_InitTypeDef GPIO_InitStruct;
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+    GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+#endif
+
+    return HAL_OK;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */    
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.h
new file mode 100644
index 0000000000..ee23af91ec
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/hal_tick.h
@@ -0,0 +1,60 @@
+/**
+  ******************************************************************************
+  * @file    hal_tick.h
+  * @author  MCD Application Team
+  * @brief   Initialization of HAL tick
+  ******************************************************************************  
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************  
+  */ 
+#ifndef __HAL_TICK_H
+#define __HAL_TICK_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "stm32l1xx.h"
+#include "cmsis_nvic.h"
+   
+#define TIM_MST      TIM5
+#define TIM_MST_IRQ  TIM5_IRQn
+#define TIM_MST_RCC  __TIM5_CLK_ENABLE()
+
+#define TIM_MST_RESET_ON   __TIM5_FORCE_RESET()
+#define TIM_MST_RESET_OFF  __TIM5_RELEASE_RESET()
+
+#define HAL_TICK_DELAY (1000) // 1 ms
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __HAL_TICK_H
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l152xc.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l152xc.h
new file mode 100644
index 0000000000..7951485466
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l152xc.h
@@ -0,0 +1,5793 @@
+/**
+  ******************************************************************************
+  * @file    stm32l152xc.h
+  * @author  MCD Application Team
+  * @version V2.0.0
+  * @date    5-September-2014
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer Header File. 
+  *          This file contains all the peripheral register's definitions, bits 
+  *          definitions and memory mapping for STM32L1xx devices.            
+  *            
+  *          This file contains:
+  *           - Data structures and the address mapping for all peripherals
+  *           - Peripheral's registers declarations and bits definition
+  *           - Macros to access peripheral’s registers hardware
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32l152xc
+  * @{
+  */
+    
+#ifndef __STM32L152xC_H
+#define __STM32L152xC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+  
+
+  /** @addtogroup Configuration_section_for_CMSIS
+  * @{
+  */
+/**
+  * @brief Configuration of the Cortex-M3 Processor and Core Peripherals 
+ */
+#define __CM3_REV                 0x200 /*!< Cortex-M3 Revision r2p0                  */
+#define __MPU_PRESENT             1     /*!< STM32L1xx provides MPU                          */
+#define __NVIC_PRIO_BITS          4     /*!< STM32L1xx uses 4 Bits for the Priority Levels    */
+#define __Vendor_SysTickConfig    0     /*!< Set to 1 if different SysTick Config is used */
+ 
+/**
+  * @}
+  */
+   
+/** @addtogroup Peripheral_interrupt_number_definition
+  * @{
+  */
+
+/**
+ * @brief STM32L1xx Interrupt Number Definition, according to the selected device 
+ *        in @ref Library_configuration_section 
+ */
+
+ /*!< Interrupt Number Definition */
+typedef enum
+{
+/******  Cortex-M3 Processor Exceptions Numbers ******************************************************/
+  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                                */
+  MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt                 */
+  BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                         */
+  UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                       */
+  SVC_IRQn                    = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                          */
+  DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                    */
+  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                          */
+  SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                      */
+
+/******  STM32L specific Interrupt Numbers ***********************************************************/
+  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                               */
+  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detection Interrupt               */
+  TAMPER_STAMP_IRQn           = 2,      /*!< Tamper and TimeStamp interrupts through the EXTI line   */
+  RTC_WKUP_IRQn               = 3,      /*!< RTC Wakeup Timer through EXTI Line Interrupt            */
+  FLASH_IRQn                  = 4,      /*!< FLASH global Interrupt                                  */
+  RCC_IRQn                    = 5,      /*!< RCC global Interrupt                                    */
+  EXTI0_IRQn                  = 6,      /*!< EXTI Line0 Interrupt                                    */
+  EXTI1_IRQn                  = 7,      /*!< EXTI Line1 Interrupt                                    */
+  EXTI2_IRQn                  = 8,      /*!< EXTI Line2 Interrupt                                    */
+  EXTI3_IRQn                  = 9,      /*!< EXTI Line3 Interrupt                                    */
+  EXTI4_IRQn                  = 10,     /*!< EXTI Line4 Interrupt                                    */
+  DMA1_Channel1_IRQn          = 11,     /*!< DMA1 Channel 1 global Interrupt                         */
+  DMA1_Channel2_IRQn          = 12,     /*!< DMA1 Channel 2 global Interrupt                         */
+  DMA1_Channel3_IRQn          = 13,     /*!< DMA1 Channel 3 global Interrupt                         */
+  DMA1_Channel4_IRQn          = 14,     /*!< DMA1 Channel 4 global Interrupt                         */
+  DMA1_Channel5_IRQn          = 15,     /*!< DMA1 Channel 5 global Interrupt                         */
+  DMA1_Channel6_IRQn          = 16,     /*!< DMA1 Channel 6 global Interrupt                         */
+  DMA1_Channel7_IRQn          = 17,     /*!< DMA1 Channel 7 global Interrupt                         */
+  ADC1_IRQn                   = 18,     /*!< ADC1 global Interrupt                                   */
+  USB_HP_IRQn                 = 19,     /*!< USB High Priority Interrupt                             */
+  USB_LP_IRQn                 = 20,     /*!< USB Low Priority Interrupt                              */
+  DAC_IRQn                    = 21,     /*!< DAC Interrupt                                           */
+  COMP_IRQn                   = 22,     /*!< Comparator through EXTI Line Interrupt                  */
+  EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                           */
+  LCD_IRQn                    = 24,     /*!< LCD Interrupt                                           */
+  TIM9_IRQn                   = 25,     /*!< TIM9 global Interrupt                                   */
+  TIM10_IRQn                  = 26,     /*!< TIM10 global Interrupt                                  */
+  TIM11_IRQn                  = 27,     /*!< TIM11 global Interrupt                                  */
+  TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                   */
+  TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                   */
+  TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                   */
+  I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                    */
+  I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                    */
+  I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                    */
+  I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                    */
+  SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                   */
+  SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                   */
+  USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                                 */
+  USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                                 */
+  USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                                 */
+  EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                         */
+  RTC_Alarm_IRQn              = 41,     /*!< RTC Alarm through EXTI Line Interrupt                   */
+  USB_FS_WKUP_IRQn            = 42,     /*!< USB FS WakeUp from suspend through EXTI Line Interrupt  */
+  TIM6_IRQn                   = 43,     /*!< TIM6 global Interrupt                                   */
+  TIM7_IRQn                   = 44,     /*!< TIM7 global Interrupt                                   */
+  TIM5_IRQn                   = 46,     /*!< TIM5 global Interrupt                                   */
+  SPI3_IRQn                   = 47,     /*!< SPI3 global Interrupt                                   */
+  DMA2_Channel1_IRQn          = 50,     /*!< DMA2 Channel 1 global Interrupt                         */
+  DMA2_Channel2_IRQn          = 51,     /*!< DMA2 Channel 2 global Interrupt                         */
+  DMA2_Channel3_IRQn          = 52,     /*!< DMA2 Channel 3 global Interrupt                         */
+  DMA2_Channel4_IRQn          = 53,     /*!< DMA2 Channel 4 global Interrupt                         */
+  DMA2_Channel5_IRQn          = 54,     /*!< DMA2 Channel 5 global Interrupt                         */
+  COMP_ACQ_IRQn               = 56      /*!< Comparator Channel Acquisition global Interrupt         */
+} IRQn_Type;
+
+/**
+  * @}
+  */
+
+#include "core_cm3.h"
+#include "system_stm32l1xx.h"
+#include <stdint.h>
+
+/** @addtogroup Peripheral_registers_structures
+  * @{
+  */   
+
+/** 
+  * @brief Analog to Digital Converter
+  */
+
+typedef struct
+{
+  __IO uint32_t SR;           /*!< ADC status register,                         Address offset: 0x00 */
+  __IO uint32_t CR1;          /*!< ADC control register 1,                      Address offset: 0x04 */
+  __IO uint32_t CR2;          /*!< ADC control register 2,                      Address offset: 0x08 */
+  __IO uint32_t SMPR1;        /*!< ADC sample time register 1,                  Address offset: 0x0C */
+  __IO uint32_t SMPR2;        /*!< ADC sample time register 2,                  Address offset: 0x10 */
+  __IO uint32_t SMPR3;        /*!< ADC sample time register 3,                  Address offset: 0x14 */
+  __IO uint32_t JOFR1;        /*!< ADC injected channel data offset register 1, Address offset: 0x18 */
+  __IO uint32_t JOFR2;        /*!< ADC injected channel data offset register 2, Address offset: 0x1C */
+  __IO uint32_t JOFR3;        /*!< ADC injected channel data offset register 3, Address offset: 0x20 */
+  __IO uint32_t JOFR4;        /*!< ADC injected channel data offset register 4, Address offset: 0x24 */
+  __IO uint32_t HTR;          /*!< ADC watchdog higher threshold register,      Address offset: 0x28 */
+  __IO uint32_t LTR;          /*!< ADC watchdog lower threshold register,       Address offset: 0x2C */
+  __IO uint32_t SQR1;         /*!< ADC regular sequence register 1,             Address offset: 0x30 */
+  __IO uint32_t SQR2;         /*!< ADC regular sequence register 2,             Address offset: 0x34 */
+  __IO uint32_t SQR3;         /*!< ADC regular sequence register 3,             Address offset: 0x38 */
+  __IO uint32_t SQR4;         /*!< ADC regular sequence register 4,             Address offset: 0x3C */
+  __IO uint32_t SQR5;         /*!< ADC regular sequence register 5,             Address offset: 0x40 */
+  __IO uint32_t JSQR;         /*!< ADC injected sequence register,              Address offset: 0x44 */
+  __IO uint32_t JDR1;         /*!< ADC injected data register 1,                Address offset: 0x48 */
+  __IO uint32_t JDR2;         /*!< ADC injected data register 2,                Address offset: 0x4C */
+  __IO uint32_t JDR3;         /*!< ADC injected data register 3,                Address offset: 0x50 */
+  __IO uint32_t JDR4;         /*!< ADC injected data register 4,                Address offset: 0x54 */
+  __IO uint32_t DR;           /*!< ADC regular data register,                   Address offset: 0x58 */
+  uint32_t RESERVED;          /*!< Reserved,                                    Address offset: 0x5C */
+} ADC_TypeDef;
+
+typedef struct
+{
+  __IO uint32_t CSR;          /*!< ADC common status register,                  Address offset: ADC1 base address + 0x300 */
+  __IO uint32_t CCR;          /*!< ADC common control register,                 Address offset: ADC1 base address + 0x304 */
+} ADC_Common_TypeDef;
+
+/** 
+  * @brief Comparator 
+  */
+
+typedef struct
+{
+  __IO uint32_t CSR;          /*!< COMP comparator control and status register, Address offset: 0x00 */
+} COMP_TypeDef;
+
+/** 
+  * @brief CRC calculation unit
+  */
+
+typedef struct
+{
+  __IO uint32_t DR;           /*!< CRC Data register,                           Address offset: 0x00 */
+  __IO uint32_t  IDR;          /*!< CRC Independent data register,               Address offset: 0x04 */
+  __IO uint32_t CR;           /*!< CRC Control register,                        Address offset: 0x08 */ 
+} CRC_TypeDef;
+
+/** 
+  * @brief Digital to Analog Converter
+  */
+
+typedef struct
+{
+  __IO uint32_t CR;           /*!< DAC control register,                                     Address offset: 0x00 */
+  __IO uint32_t SWTRIGR;      /*!< DAC software trigger register,                            Address offset: 0x04 */
+  __IO uint32_t DHR12R1;      /*!< DAC channel1 12-bit right-aligned data holding register,  Address offset: 0x08 */
+  __IO uint32_t DHR12L1;      /*!< DAC channel1 12-bit left aligned data holding register,   Address offset: 0x0C */
+  __IO uint32_t DHR8R1;       /*!< DAC channel1 8-bit right aligned data holding register,   Address offset: 0x10 */
+  __IO uint32_t DHR12R2;      /*!< DAC channel2 12-bit right aligned data holding register,  Address offset: 0x14 */
+  __IO uint32_t DHR12L2;      /*!< DAC channel2 12-bit left aligned data holding register,   Address offset: 0x18 */
+  __IO uint32_t DHR8R2;       /*!< DAC channel2 8-bit right-aligned data holding register,   Address offset: 0x1C */
+  __IO uint32_t DHR12RD;      /*!< Dual DAC 12-bit right-aligned data holding register,      Address offset: 0x20 */
+  __IO uint32_t DHR12LD;      /*!< DUAL DAC 12-bit left aligned data holding register,       Address offset: 0x24 */
+  __IO uint32_t DHR8RD;       /*!< DUAL DAC 8-bit right aligned data holding register,       Address offset: 0x28 */
+  __IO uint32_t DOR1;         /*!< DAC channel1 data output register,                        Address offset: 0x2C */
+  __IO uint32_t DOR2;         /*!< DAC channel2 data output register,                        Address offset: 0x30 */
+  __IO uint32_t SR;           /*!< DAC status register,                                      Address offset: 0x34 */
+} DAC_TypeDef;
+
+/** 
+  * @brief Debug MCU
+  */
+
+typedef struct
+{
+  __IO uint32_t IDCODE;       /*!< MCU device ID code,                          Address offset: 0x00 */
+  __IO uint32_t CR;           /*!< Debug MCU configuration register,            Address offset: 0x04 */
+  __IO uint32_t APB1FZ;       /*!< Debug MCU APB1 freeze register,              Address offset: 0x08 */
+  __IO uint32_t APB2FZ;       /*!< Debug MCU APB2 freeze register,              Address offset: 0x0C */
+}DBGMCU_TypeDef;
+
+/** 
+  * @brief DMA Controller
+  */
+
+typedef struct
+{
+  __IO uint32_t CCR;          /*!< DMA channel x configuration register        */
+  __IO uint32_t CNDTR;        /*!< DMA channel x number of data register       */
+  __IO uint32_t CPAR;         /*!< DMA channel x peripheral address register   */
+  __IO uint32_t CMAR;         /*!< DMA channel x memory address register       */
+} DMA_Channel_TypeDef;
+
+typedef struct
+{
+  __IO uint32_t ISR;          /*!< DMA interrupt status register,               Address offset: 0x00 */
+  __IO uint32_t IFCR;         /*!< DMA interrupt flag clear register,           Address offset: 0x04 */
+} DMA_TypeDef;
+
+/** 
+  * @brief External Interrupt/Event Controller
+  */
+
+typedef struct
+{
+  __IO uint32_t IMR;          /*!<EXTI Interrupt mask register,                 Address offset: 0x00 */
+  __IO uint32_t EMR;          /*!<EXTI Event mask register,                     Address offset: 0x04 */
+  __IO uint32_t RTSR;         /*!<EXTI Rising trigger selection register ,      Address offset: 0x08 */
+  __IO uint32_t FTSR;         /*!<EXTI Falling trigger selection register,      Address offset: 0x0C */
+  __IO uint32_t SWIER;        /*!<EXTI Software interrupt event register,       Address offset: 0x10 */
+  __IO uint32_t PR;           /*!<EXTI Pending register,                        Address offset: 0x14 */
+} EXTI_TypeDef;
+
+/** 
+  * @brief FLASH Registers
+  */
+typedef struct
+{
+  __IO uint32_t ACR;          /*!< Access control register,                     Address offset: 0x00 */
+  __IO uint32_t PECR;         /*!< Program/erase control register,              Address offset: 0x04 */
+  __IO uint32_t PDKEYR;       /*!< Power down key register,                     Address offset: 0x08 */
+  __IO uint32_t PEKEYR;       /*!< Program/erase key register,                  Address offset: 0x0c */
+  __IO uint32_t PRGKEYR;      /*!< Program memory key register,                 Address offset: 0x10 */
+  __IO uint32_t OPTKEYR;      /*!< Option byte key register,                    Address offset: 0x14 */
+  __IO uint32_t SR;           /*!< Status register,                             Address offset: 0x18 */
+  __IO uint32_t OBR;          /*!< Option byte register,                        Address offset: 0x1c */
+  __IO uint32_t WRPR1;        /*!< Write protection register 1,                 Address offset: 0x20 */
+  uint32_t   RESERVED[23];    /*!< Reserved,                                    Address offset: 0x24 */
+  __IO uint32_t WRPR2;        /*!< Write protection register 2,                 Address offset: 0x80 */
+} FLASH_TypeDef;
+
+/** 
+  * @brief Option Bytes Registers
+  */
+typedef struct
+{
+  __IO uint32_t RDP;              /*!< Read protection register,               Address offset: 0x00 */
+  __IO uint32_t USER;             /*!< user register,                          Address offset: 0x04 */
+  __IO uint32_t WRP01;            /*!< write protection register 0 1,          Address offset: 0x08 */
+  __IO uint32_t WRP23;            /*!< write protection register 2 3,          Address offset: 0x0C */
+  __IO uint32_t WRP45;            /*!< write protection register 4 5,          Address offset: 0x10 */
+  __IO uint32_t WRP67;            /*!< write protection register 6 7,          Address offset: 0x14 */
+} OB_TypeDef;
+
+/** 
+  * @brief Operational Amplifier (OPAMP)
+  */
+typedef struct
+{
+  __IO uint32_t CSR;          /*!< OPAMP control/status register,                     Address offset: 0x00 */
+  __IO uint32_t OTR;          /*!< OPAMP offset trimming register for normal mode,    Address offset: 0x04 */ 
+  __IO uint32_t LPOTR;        /*!< OPAMP offset trimming register for low power mode, Address offset: 0x08 */
+} OPAMP_TypeDef;
+
+/** 
+  * @brief General Purpose IO
+  */
+
+typedef struct
+{
+  __IO uint32_t MODER;        /*!< GPIO port mode register,                     Address offset: 0x00      */
+  __IO uint32_t OTYPER;       /*!< GPIO port output type register,              Address offset: 0x04      */
+  __IO uint32_t OSPEEDR;      /*!< GPIO port output speed register,             Address offset: 0x08      */
+  __IO uint32_t PUPDR;        /*!< GPIO port pull-up/pull-down register,        Address offset: 0x0C      */
+  __IO uint32_t IDR;          /*!< GPIO port input data register,               Address offset: 0x10      */
+  __IO uint32_t ODR;          /*!< GPIO port output data register,              Address offset: 0x14      */
+  __IO uint32_t BSRR;         /*!< GPIO port bit set/reset registerBSRR,        Address offset: 0x18      */
+  __IO uint32_t LCKR;         /*!< GPIO port configuration lock register,       Address offset: 0x1C      */
+  __IO uint32_t AFR[2];       /*!< GPIO alternate function register,            Address offset: 0x20-0x24 */
+  __IO uint32_t BRR;          /*!< GPIO bit reset register,                     Address offset: 0x28      */
+} GPIO_TypeDef;
+
+/** 
+  * @brief SysTem Configuration
+  */
+
+typedef struct
+{
+  __IO uint32_t MEMRMP;       /*!< SYSCFG memory remap register,                      Address offset: 0x00      */
+  __IO uint32_t PMC;          /*!< SYSCFG peripheral mode configuration register,     Address offset: 0x04      */
+  __IO uint32_t EXTICR[4];    /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */
+} SYSCFG_TypeDef;
+
+/** 
+  * @brief Inter-integrated Circuit Interface
+  */
+
+typedef struct
+{
+  __IO uint32_t CR1;          /*!< I2C Control register 1,                      Address offset: 0x00 */
+  __IO uint32_t CR2;          /*!< I2C Control register 2,                      Address offset: 0x04 */
+  __IO uint32_t OAR1;         /*!< I2C Own address register 1,                  Address offset: 0x08 */
+  __IO uint32_t OAR2;         /*!< I2C Own address register 2,                  Address offset: 0x0C */
+  __IO uint32_t DR;           /*!< I2C Data register,                           Address offset: 0x10 */
+  __IO uint32_t SR1;          /*!< I2C Status register 1,                       Address offset: 0x14 */
+  __IO uint32_t SR2;          /*!< I2C Status register 2,                       Address offset: 0x18 */
+  __IO uint32_t CCR;          /*!< I2C Clock control register,                  Address offset: 0x1C */
+  __IO uint32_t TRISE;        /*!< I2C TRISE register,                          Address offset: 0x20 */
+} I2C_TypeDef;
+
+/** 
+  * @brief Independent WATCHDOG
+  */
+
+typedef struct
+{
+  __IO uint32_t KR;           /*!< Key register,                                Address offset: 0x00 */
+  __IO uint32_t PR;           /*!< Prescaler register,                          Address offset: 0x04 */
+  __IO uint32_t RLR;          /*!< Reload register,                             Address offset: 0x08 */
+  __IO uint32_t SR;           /*!< Status register,                             Address offset: 0x0C */
+} IWDG_TypeDef;
+
+/** 
+  * @brief LCD
+  */
+
+typedef struct
+{
+  __IO uint32_t CR;        /*!< LCD control register,                           Address offset: 0x00 */
+  __IO uint32_t FCR;       /*!< LCD frame control register,                     Address offset: 0x04 */
+  __IO uint32_t SR;        /*!< LCD status register,                            Address offset: 0x08 */
+  __IO uint32_t CLR;       /*!< LCD clear register,                             Address offset: 0x0C */
+  uint32_t RESERVED;       /*!< Reserved,                                       Address offset: 0x10 */
+  __IO uint32_t RAM[16];   /*!< LCD display memory,                             Address offset: 0x14-0x50 */
+} LCD_TypeDef;
+
+/** 
+  * @brief Power Control
+  */
+
+typedef struct
+{
+  __IO uint32_t CR;   /*!< PWR power control register,                          Address offset: 0x00 */
+  __IO uint32_t CSR;  /*!< PWR power control/status register,                   Address offset: 0x04 */
+} PWR_TypeDef;
+
+/** 
+  * @brief Reset and Clock Control
+  */
+
+typedef struct
+{
+  __IO uint32_t CR;            /*!< RCC clock control register,                                   Address offset: 0x00 */
+  __IO uint32_t ICSCR;         /*!< RCC Internal clock sources calibration register,              Address offset: 0x04 */
+  __IO uint32_t CFGR;          /*!< RCC Clock configuration register,                             Address offset: 0x08 */
+  __IO uint32_t CIR;           /*!< RCC Clock interrupt register,                                 Address offset: 0x0C */
+  __IO uint32_t AHBRSTR;       /*!< RCC AHB peripheral reset register,                            Address offset: 0x10 */
+  __IO uint32_t APB2RSTR;      /*!< RCC APB2 peripheral reset register,                           Address offset: 0x14 */
+  __IO uint32_t APB1RSTR;      /*!< RCC APB1 peripheral reset register,                           Address offset: 0x18 */
+  __IO uint32_t AHBENR;        /*!< RCC AHB peripheral clock enable register,                     Address offset: 0x1C */
+  __IO uint32_t APB2ENR;       /*!< RCC APB2 peripheral clock enable register,                    Address offset: 0x20 */
+  __IO uint32_t APB1ENR;       /*!< RCC APB1 peripheral clock enable register,                    Address offset: 0x24 */
+  __IO uint32_t AHBLPENR;      /*!< RCC AHB peripheral clock enable in low power mode register,   Address offset: 0x28 */
+  __IO uint32_t APB2LPENR;     /*!< RCC APB2 peripheral clock enable in low power mode register,  Address offset: 0x2C */
+  __IO uint32_t APB1LPENR;     /*!< RCC APB1 peripheral clock enable in low power mode register,  Address offset: 0x30 */
+  __IO uint32_t CSR;           /*!< RCC Control/status register,                                  Address offset: 0x34 */
+} RCC_TypeDef;
+
+/** 
+  * @brief Routing Interface 
+  */
+
+typedef struct
+{
+  __IO uint32_t ICR;        /*!< RI input capture register,                     Address offset: 0x00 */
+  __IO uint32_t ASCR1;      /*!< RI analog switches control register,       Address offset: 0x04 */
+  __IO uint32_t ASCR2;      /*!< RI analog switch control register 2,        Address offset: 0x08 */
+  __IO uint32_t HYSCR1;     /*!< RI hysteresis control register,                Address offset: 0x0C */
+  __IO uint32_t HYSCR2;     /*!< RI Hysteresis control register,               Address offset: 0x10 */
+  __IO uint32_t HYSCR3;     /*!< RI Hysteresis control register,               Address offset: 0x14 */
+  uint32_t RESERVED1;       /*!< Reserved, 0x18                                                                  */
+  __IO uint32_t ASMR1;      /*!< RI Analog switch mode register 1,         Address offset: 0x1C */
+  __IO uint32_t CMR1;       /*!< RI Channel mask register 1,                   Address offset: 0x20 */
+  __IO uint32_t CICR1;      /*!< RI Channel Iden for capture register 1,  Address offset: 0x24 */
+  __IO uint32_t ASMR2;      /*!< RI Analog switch mode register 2,         Address offset: 0x28 */
+  __IO uint32_t CMR2;       /*!< RI Channel mask register 2,                   Address offset: 0x2C */
+  __IO uint32_t CICR2;      /*!< RI Channel Iden for capture register 2,  Address offset: 0x30 */
+  __IO uint32_t ASMR3;      /*!< RI Analog switch mode register 3,         Address offset: 0x34 */
+  __IO uint32_t CMR3;       /*!< RI Channel mask register 3,                   Address offset: 0x38 */
+  __IO uint32_t CICR3;      /*!< RI Channel Iden for capture register 3,  Address offset: 0x3C */
+} RI_TypeDef;
+
+/** 
+  * @brief Real-Time Clock
+  */
+typedef struct
+{
+  __IO uint32_t TR;         /*!< RTC time register,                                         Address offset: 0x00 */
+  __IO uint32_t DR;         /*!< RTC date register,                                         Address offset: 0x04 */
+  __IO uint32_t CR;         /*!< RTC control register,                                      Address offset: 0x08 */                                                                                            
+  __IO uint32_t ISR;        /*!< RTC initialization and status register,                    Address offset: 0x0C */
+  __IO uint32_t PRER;       /*!< RTC prescaler register,                                    Address offset: 0x10 */
+  __IO uint32_t WUTR;       /*!< RTC wakeup timer register,                                 Address offset: 0x14 */
+  __IO uint32_t CALIBR;     /*!< RTC calibration register,                                  Address offset: 0x18 */
+  __IO uint32_t ALRMAR;     /*!< RTC alarm A register,                                      Address offset: 0x1C */
+  __IO uint32_t ALRMBR;     /*!< RTC alarm B register,                                      Address offset: 0x20 */
+  __IO uint32_t WPR;        /*!< RTC write protection register,                             Address offset: 0x24 */
+  __IO uint32_t SSR;        /*!< RTC sub second register,                                   Address offset: 0x28 */
+  __IO uint32_t SHIFTR;     /*!< RTC shift control register,                                Address offset: 0x2C */
+  __IO uint32_t TSTR;       /*!< RTC time stamp time register,                              Address offset: 0x30 */
+  __IO uint32_t TSDR;       /*!< RTC time stamp date register,                              Address offset: 0x34 */
+  __IO uint32_t TSSSR;      /*!< RTC time-stamp sub second register,                        Address offset: 0x38 */
+  __IO uint32_t CALR;       /*!< RRTC calibration register,                                 Address offset: 0x3C */
+  __IO uint32_t TAFCR;      /*!< RTC tamper and alternate function configuration register,  Address offset: 0x40 */
+  __IO uint32_t ALRMASSR;   /*!< RTC alarm A sub second register,                           Address offset: 0x44 */
+  __IO uint32_t ALRMBSSR;   /*!< RTC alarm B sub second register,                           Address offset: 0x48 */
+  uint32_t RESERVED7;       /*!< Reserved, 0x4C                                                                  */
+  __IO uint32_t BKP0R;      /*!< RTC backup register 0,                                     Address offset: 0x50 */
+  __IO uint32_t BKP1R;      /*!< RTC backup register 1,                                     Address offset: 0x54 */
+  __IO uint32_t BKP2R;      /*!< RTC backup register 2,                                     Address offset: 0x58 */
+  __IO uint32_t BKP3R;      /*!< RTC backup register 3,                                     Address offset: 0x5C */
+  __IO uint32_t BKP4R;      /*!< RTC backup register 4,                                     Address offset: 0x60 */
+  __IO uint32_t BKP5R;      /*!< RTC backup register 5,                                     Address offset: 0x64 */
+  __IO uint32_t BKP6R;      /*!< RTC backup register 6,                                     Address offset: 0x68 */
+  __IO uint32_t BKP7R;      /*!< RTC backup register 7,                                     Address offset: 0x6C */
+  __IO uint32_t BKP8R;      /*!< RTC backup register 8,                                     Address offset: 0x70 */
+  __IO uint32_t BKP9R;      /*!< RTC backup register 9,                                     Address offset: 0x74 */
+  __IO uint32_t BKP10R;     /*!< RTC backup register 10,                                    Address offset: 0x78 */
+  __IO uint32_t BKP11R;     /*!< RTC backup register 11,                                    Address offset: 0x7C */
+  __IO uint32_t BKP12R;     /*!< RTC backup register 12,                                    Address offset: 0x80 */
+  __IO uint32_t BKP13R;     /*!< RTC backup register 13,                                    Address offset: 0x84 */
+  __IO uint32_t BKP14R;     /*!< RTC backup register 14,                                    Address offset: 0x88 */
+  __IO uint32_t BKP15R;     /*!< RTC backup register 15,                                    Address offset: 0x8C */
+  __IO uint32_t BKP16R;     /*!< RTC backup register 16,                                    Address offset: 0x90 */
+  __IO uint32_t BKP17R;     /*!< RTC backup register 17,                                    Address offset: 0x94 */
+  __IO uint32_t BKP18R;     /*!< RTC backup register 18,                                    Address offset: 0x98 */
+  __IO uint32_t BKP19R;     /*!< RTC backup register 19,                                    Address offset: 0x9C */
+  __IO uint32_t BKP20R;     /*!< RTC backup register 20,                                    Address offset: 0xA0 */
+  __IO uint32_t BKP21R;     /*!< RTC backup register 21,                                    Address offset: 0xA4 */
+  __IO uint32_t BKP22R;     /*!< RTC backup register 22,                                    Address offset: 0xA8 */
+  __IO uint32_t BKP23R;     /*!< RTC backup register 23,                                    Address offset: 0xAC */
+  __IO uint32_t BKP24R;     /*!< RTC backup register 24,                                    Address offset: 0xB0 */
+  __IO uint32_t BKP25R;     /*!< RTC backup register 25,                                    Address offset: 0xB4 */
+  __IO uint32_t BKP26R;     /*!< RTC backup register 26,                                    Address offset: 0xB8 */
+  __IO uint32_t BKP27R;     /*!< RTC backup register 27,                                    Address offset: 0xBC */
+  __IO uint32_t BKP28R;     /*!< RTC backup register 28,                                    Address offset: 0xC0 */
+  __IO uint32_t BKP29R;     /*!< RTC backup register 29,                                    Address offset: 0xC4 */
+  __IO uint32_t BKP30R;     /*!< RTC backup register 30,                                    Address offset: 0xC8 */
+  __IO uint32_t BKP31R;     /*!< RTC backup register 31,                                    Address offset: 0xCC */
+} RTC_TypeDef;
+
+/** 
+  * @brief Serial Peripheral Interface
+  */
+
+typedef struct
+{
+  __IO uint32_t CR1;        /*!< SPI Control register 1 (not used in I2S mode),      Address offset: 0x00 */
+  __IO uint32_t CR2;        /*!< SPI Control register 2,                             Address offset: 0x04 */
+  __IO uint32_t SR;         /*!< SPI Status register,                                Address offset: 0x08 */
+  __IO uint32_t DR;         /*!< SPI data register,                                  Address offset: 0x0C */
+  __IO uint32_t CRCPR;      /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
+  __IO uint32_t RXCRCR;     /*!< SPI Rx CRC register (not used in I2S mode),         Address offset: 0x14 */
+  __IO uint32_t TXCRCR;     /*!< SPI Tx CRC register (not used in I2S mode),         Address offset: 0x18 */
+  __IO uint32_t I2SCFGR;    /*!< SPI_I2S configuration register,                     Address offset: 0x1C */
+  __IO uint32_t I2SPR;      /*!< SPI_I2S prescaler register,                         Address offset: 0x20 */
+} SPI_TypeDef;
+
+/** 
+  * @brief TIM
+  */
+typedef struct
+{
+  __IO uint32_t CR1;          /*!< TIM control register 1,              Address offset: 0x00 */
+  __IO uint32_t CR2;          /*!< TIM control register 2,              Address offset: 0x04 */
+  __IO uint32_t SMCR;         /*!< TIM slave Mode Control register,     Address offset: 0x08 */
+  __IO uint32_t DIER;         /*!< TIM DMA/interrupt enable register,   Address offset: 0x0C */
+  __IO uint32_t SR;           /*!< TIM status register,                 Address offset: 0x10 */
+  __IO uint32_t EGR;          /*!< TIM event generation register,       Address offset: 0x14 */
+  __IO uint32_t CCMR1;        /*!< TIM capture/compare mode register 1, Address offset: 0x18 */
+  __IO uint32_t CCMR2;        /*!< TIM capture/compare mode register 2, Address offset: 0x1C */
+  __IO uint32_t CCER;         /*!< TIM capture/compare enable register, Address offset: 0x20 */
+  __IO uint32_t CNT;          /*!< TIM counter register,                Address offset: 0x24 */
+  __IO uint32_t PSC;          /*!< TIM prescaler register,              Address offset: 0x28 */
+  __IO uint32_t ARR;          /*!< TIM auto-reload register,            Address offset: 0x2C */
+  uint32_t      RESERVED12;   /*!< Reserved, 0x30                                            */    
+  __IO uint32_t CCR1;         /*!< TIM capture/compare register 1,      Address offset: 0x34 */    
+  __IO uint32_t CCR2;         /*!< TIM capture/compare register 2,      Address offset: 0x38 */    
+  __IO uint32_t CCR3;         /*!< TIM capture/compare register 3,      Address offset: 0x3C */
+  __IO uint32_t CCR4;         /*!< TIM capture/compare register 4,      Address offset: 0x40 */
+  uint32_t      RESERVED17;   /*!< Reserved, 0x44                                            */ 
+  __IO uint32_t DCR;          /*!< TIM DMA control register,            Address offset: 0x48 */
+  __IO uint32_t DMAR;         /*!< TIM DMA address for full transfer,   Address offset: 0x4C */
+  __IO uint32_t OR;           /*!< TIM option register,                 Address offset: 0x50 */
+} TIM_TypeDef;
+/** 
+  * @brief Universal Synchronous Asynchronous Receiver Transmitter
+  */
+ 
+typedef struct
+{
+  __IO uint32_t SR;         /*!< USART Status register,                   Address offset: 0x00 */
+  __IO uint32_t DR;         /*!< USART Data register,                     Address offset: 0x04 */
+  __IO uint32_t BRR;        /*!< USART Baud rate register,                Address offset: 0x08 */
+  __IO uint32_t CR1;        /*!< USART Control register 1,                Address offset: 0x0C */
+  __IO uint32_t CR2;        /*!< USART Control register 2,                Address offset: 0x10 */
+  __IO uint32_t CR3;        /*!< USART Control register 3,                Address offset: 0x14 */
+  __IO uint32_t GTPR;       /*!< USART Guard time and prescaler register, Address offset: 0x18 */
+} USART_TypeDef;
+
+/** 
+  * @brief Universal Serial Bus Full Speed Device
+  */
+  
+typedef struct
+{
+  __IO uint16_t EP0R;            /*!< USB Endpoint 0 register,                Address offset: 0x00 */ 
+  __IO uint16_t RESERVED0;       /*!< Reserved */     
+  __IO uint16_t EP1R;            /*!< USB Endpoint 1 register,                Address offset: 0x04 */
+  __IO uint16_t RESERVED1;       /*!< Reserved */       
+  __IO uint16_t EP2R;            /*!< USB Endpoint 2 register,                Address offset: 0x08 */
+  __IO uint16_t RESERVED2;       /*!< Reserved */       
+  __IO uint16_t EP3R;            /*!< USB Endpoint 3 register,                Address offset: 0x0C */ 
+  __IO uint16_t RESERVED3;       /*!< Reserved */       
+  __IO uint16_t EP4R;            /*!< USB Endpoint 4 register,                Address offset: 0x10 */
+  __IO uint16_t RESERVED4;       /*!< Reserved */       
+  __IO uint16_t EP5R;            /*!< USB Endpoint 5 register,                Address offset: 0x14 */
+  __IO uint16_t RESERVED5;       /*!< Reserved */       
+  __IO uint16_t EP6R;            /*!< USB Endpoint 6 register,                Address offset: 0x18 */
+  __IO uint16_t RESERVED6;       /*!< Reserved */       
+  __IO uint16_t EP7R;            /*!< USB Endpoint 7 register,                Address offset: 0x1C */
+  __IO uint16_t RESERVED7[17];   /*!< Reserved */     
+  __IO uint16_t CNTR;            /*!< Control register,                       Address offset: 0x40 */
+  __IO uint16_t RESERVED8;       /*!< Reserved */       
+  __IO uint16_t ISTR;            /*!< Interrupt status register,              Address offset: 0x44 */
+  __IO uint16_t RESERVED9;       /*!< Reserved */       
+  __IO uint16_t FNR;             /*!< Frame number register,                  Address offset: 0x48 */
+  __IO uint16_t RESERVEDA;       /*!< Reserved */       
+  __IO uint16_t DADDR;           /*!< Device address register,                Address offset: 0x4C */
+  __IO uint16_t RESERVEDB;       /*!< Reserved */       
+  __IO uint16_t BTABLE;          /*!< Buffer Table address register,          Address offset: 0x50 */
+  __IO uint16_t RESERVEDC;       /*!< Reserved */       
+} USB_TypeDef;
+
+/** 
+  * @brief Window WATCHDOG
+  */
+typedef struct
+{
+  __IO uint32_t CR;   /*!< WWDG Control register,       Address offset: 0x00 */
+  __IO uint32_t CFR;  /*!< WWDG Configuration register, Address offset: 0x04 */
+  __IO uint32_t SR;   /*!< WWDG Status register,        Address offset: 0x08 */
+} WWDG_TypeDef;
+
+/** 
+  * @brief Universal Serial Bus Full Speed Device
+  */
+/** 
+  * @}
+  */
+  
+/** @addtogroup Peripheral_memory_map
+  * @{
+  */
+
+#define FLASH_BASE            ((uint32_t)0x08000000)              /*!< FLASH base address in the alias region */
+#define FLASH_EEPROM_BASE     ((uint32_t)(FLASH_BASE + 0x80000))  /*!< FLASH EEPROM base address in the alias region */
+#define SRAM_BASE             ((uint32_t)0x20000000)              /*!< SRAM base address in the alias region */
+#define PERIPH_BASE           ((uint32_t)0x40000000)              /*!< Peripheral base address in the alias region */
+#define SRAM_BB_BASE          ((uint32_t)0x22000000)              /*!< SRAM base address in the bit-band region */
+#define PERIPH_BB_BASE        ((uint32_t)0x42000000)              /*!< Peripheral base address in the bit-band region */
+#define FLASH_END             ((uint32_t)0x0803FFFF)              /*!< Program end FLASH address for Cat3 */
+#define FLASH_EEPROM_END      ((uint32_t)0x08081FFF)              /*!< FLASH EEPROM end address (8KB) */
+
+/*!< Peripheral memory map */
+#define APB1PERIPH_BASE       PERIPH_BASE
+#define APB2PERIPH_BASE       (PERIPH_BASE + 0x00010000)
+#define AHBPERIPH_BASE        (PERIPH_BASE + 0x00020000)
+
+/*!< APB1 peripherals */
+#define TIM2_BASE             (APB1PERIPH_BASE + 0x00000000)
+#define TIM3_BASE             (APB1PERIPH_BASE + 0x00000400)
+#define TIM4_BASE             (APB1PERIPH_BASE + 0x00000800)
+#define TIM5_BASE             (APB1PERIPH_BASE + 0x00000C00)
+#define TIM6_BASE             (APB1PERIPH_BASE + 0x00001000)
+#define TIM7_BASE             (APB1PERIPH_BASE + 0x00001400)
+#define LCD_BASE              (APB1PERIPH_BASE + 0x00002400)
+#define RTC_BASE              (APB1PERIPH_BASE + 0x00002800)
+#define WWDG_BASE             (APB1PERIPH_BASE + 0x00002C00)
+#define IWDG_BASE             (APB1PERIPH_BASE + 0x00003000)
+#define SPI2_BASE             (APB1PERIPH_BASE + 0x00003800)
+#define SPI3_BASE             (APB1PERIPH_BASE + 0x00003C00)
+#define USART2_BASE           (APB1PERIPH_BASE + 0x00004400)
+#define USART3_BASE           (APB1PERIPH_BASE + 0x00004800)
+#define I2C1_BASE             (APB1PERIPH_BASE + 0x00005400)
+#define I2C2_BASE             (APB1PERIPH_BASE + 0x00005800)
+
+/* USB device FS */
+#define USB_BASE              (APB1PERIPH_BASE + 0x00005C00) /*!< USB_IP Peripheral Registers base address */
+#define USB_PMAADDR           (APB1PERIPH_BASE + 0x00006000) /*!< USB_IP Packet Memory Area base address */
+
+/* USB device FS SRAM */
+#define PWR_BASE              (APB1PERIPH_BASE + 0x00007000)
+#define DAC_BASE              (APB1PERIPH_BASE + 0x00007400)
+#define COMP_BASE             (APB1PERIPH_BASE + 0x00007C00)
+#define RI_BASE               (APB1PERIPH_BASE + 0x00007C04)
+#define OPAMP_BASE            (APB1PERIPH_BASE + 0x00007C5C)
+
+/*!< APB2 peripherals */
+#define SYSCFG_BASE           (APB2PERIPH_BASE + 0x00000000)
+#define EXTI_BASE             (APB2PERIPH_BASE + 0x00000400)
+#define TIM9_BASE             (APB2PERIPH_BASE + 0x00000800)
+#define TIM10_BASE            (APB2PERIPH_BASE + 0x00000C00)
+#define TIM11_BASE            (APB2PERIPH_BASE + 0x00001000)
+#define ADC1_BASE             (APB2PERIPH_BASE + 0x00002400)
+#define ADC_BASE              (APB2PERIPH_BASE + 0x00002700)
+#define SPI1_BASE             (APB2PERIPH_BASE + 0x00003000)
+#define USART1_BASE           (APB2PERIPH_BASE + 0x00003800)
+
+/*!< AHB peripherals */
+#define GPIOA_BASE            (AHBPERIPH_BASE + 0x00000000)
+#define GPIOB_BASE            (AHBPERIPH_BASE + 0x00000400)
+#define GPIOC_BASE            (AHBPERIPH_BASE + 0x00000800)
+#define GPIOD_BASE            (AHBPERIPH_BASE + 0x00000C00)
+#define GPIOE_BASE            (AHBPERIPH_BASE + 0x00001000)
+#define GPIOH_BASE            (AHBPERIPH_BASE + 0x00001400)
+#define CRC_BASE              (AHBPERIPH_BASE + 0x00003000)
+#define RCC_BASE              (AHBPERIPH_BASE + 0x00003800)
+#define FLASH_R_BASE          (AHBPERIPH_BASE + 0x00003C00) /*!< FLASH registers base address */
+#define OB_BASE               ((uint32_t)0x1FF80000)    /*!< FLASH Option Bytes base address */
+#define DMA1_BASE             (AHBPERIPH_BASE + 0x00006000)
+#define DMA1_Channel1_BASE    (DMA1_BASE + 0x00000008)
+#define DMA1_Channel2_BASE    (DMA1_BASE + 0x0000001C)
+#define DMA1_Channel3_BASE    (DMA1_BASE + 0x00000030)
+#define DMA1_Channel4_BASE    (DMA1_BASE + 0x00000044)
+#define DMA1_Channel5_BASE    (DMA1_BASE + 0x00000058)
+#define DMA1_Channel6_BASE    (DMA1_BASE + 0x0000006C)
+#define DMA1_Channel7_BASE    (DMA1_BASE + 0x00000080)
+#define DMA2_BASE             (AHBPERIPH_BASE + 0x00006400)
+#define DMA2_Channel1_BASE    (DMA2_BASE + 0x00000008)
+#define DMA2_Channel2_BASE    (DMA2_BASE + 0x0000001C)
+#define DMA2_Channel3_BASE    (DMA2_BASE + 0x00000030)
+#define DMA2_Channel4_BASE    (DMA2_BASE + 0x00000044)
+#define DMA2_Channel5_BASE    (DMA2_BASE + 0x00000058)
+#define DBGMCU_BASE           ((uint32_t)0xE0042000)     /*!< Debug MCU registers base address */
+
+/**
+  * @}
+  */
+  
+/** @addtogroup Peripheral_declaration
+  * @{
+  */  
+
+#define TIM2                ((TIM_TypeDef *) TIM2_BASE)
+#define TIM3                ((TIM_TypeDef *) TIM3_BASE)
+#define TIM4                ((TIM_TypeDef *) TIM4_BASE)
+#define TIM5                ((TIM_TypeDef *) TIM5_BASE)
+#define TIM6                ((TIM_TypeDef *) TIM6_BASE)
+#define TIM7                ((TIM_TypeDef *) TIM7_BASE)
+#define LCD                 ((LCD_TypeDef *) LCD_BASE)
+#define RTC                 ((RTC_TypeDef *) RTC_BASE)
+#define WWDG                ((WWDG_TypeDef *) WWDG_BASE)
+#define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
+#define SPI2                ((SPI_TypeDef *) SPI2_BASE)
+#define SPI3                ((SPI_TypeDef *) SPI3_BASE)
+#define USART2              ((USART_TypeDef *) USART2_BASE)
+#define USART3              ((USART_TypeDef *) USART3_BASE)
+#define I2C1                ((I2C_TypeDef *) I2C1_BASE)
+#define I2C2                ((I2C_TypeDef *) I2C2_BASE)
+/* USB device FS */
+#define USB                   ((USB_TypeDef *) USB_BASE)
+/* USB device FS SRAM */
+#define PWR                 ((PWR_TypeDef *) PWR_BASE)
+#define DAC                 ((DAC_TypeDef *) DAC_BASE)
+#define COMP                ((COMP_TypeDef *) COMP_BASE)
+#define COMP1               ((COMP_TypeDef *) COMP_BASE)
+#define COMP2               ((COMP_TypeDef *) (COMP_BASE + 0x00000001))
+#define RI                  ((RI_TypeDef *) RI_BASE)
+#define OPAMP               ((OPAMP_TypeDef *) OPAMP_BASE)
+#define OPAMP1              ((OPAMP_TypeDef *) OPAMP_BASE)
+#define OPAMP2              ((OPAMP_TypeDef *) (OPAMP_BASE + 0x00000001))
+#define SYSCFG              ((SYSCFG_TypeDef *) SYSCFG_BASE)
+#define EXTI                ((EXTI_TypeDef *) EXTI_BASE)
+#define TIM9                ((TIM_TypeDef *) TIM9_BASE)
+#define TIM10               ((TIM_TypeDef *) TIM10_BASE)
+#define TIM11               ((TIM_TypeDef *) TIM11_BASE)
+#define ADC1                ((ADC_TypeDef *) ADC1_BASE)
+#define ADC                 ((ADC_Common_TypeDef *) ADC_BASE)
+#define SPI1                ((SPI_TypeDef *) SPI1_BASE)
+#define USART1              ((USART_TypeDef *) USART1_BASE)
+#define GPIOA               ((GPIO_TypeDef *) GPIOA_BASE)
+#define GPIOB               ((GPIO_TypeDef *) GPIOB_BASE)
+#define GPIOC               ((GPIO_TypeDef *) GPIOC_BASE)
+#define GPIOD               ((GPIO_TypeDef *) GPIOD_BASE)
+#define GPIOE               ((GPIO_TypeDef *) GPIOE_BASE)
+#define GPIOH               ((GPIO_TypeDef *) GPIOH_BASE)
+#define CRC                 ((CRC_TypeDef *) CRC_BASE)
+#define RCC                 ((RCC_TypeDef *) RCC_BASE)
+#define FLASH               ((FLASH_TypeDef *) FLASH_R_BASE)
+#define OB                  ((OB_TypeDef *) OB_BASE) 
+#define DMA1                ((DMA_TypeDef *) DMA1_BASE)
+#define DMA1_Channel1       ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)
+#define DMA1_Channel2       ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
+#define DMA1_Channel3       ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)
+#define DMA1_Channel4       ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE)
+#define DMA1_Channel5       ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
+#define DMA1_Channel6       ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)
+#define DMA1_Channel7       ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
+#define DMA2                ((DMA_TypeDef *) DMA2_BASE)
+#define DMA2_Channel1       ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)
+#define DMA2_Channel2       ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)
+#define DMA2_Channel3       ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)
+#define DMA2_Channel4       ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
+#define DMA2_Channel5       ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)
+#define DBGMCU              ((DBGMCU_TypeDef *) DBGMCU_BASE)
+
+ /**
+  * @}
+  */
+
+/** @addtogroup Exported_constants
+  * @{
+  */
+
+/** @addtogroup Peripheral_Registers_Bits_Definition
+  * @{
+  */
+    
+/******************************************************************************/
+/*                         Peripheral Registers Bits Definition               */
+/******************************************************************************/
+/******************************************************************************/
+/*                                                                            */
+/*                      Analog to Digital Converter (ADC)                     */
+/*                                                                            */
+/******************************************************************************/
+
+/********************  Bit definition for ADC_SR register  ********************/
+#define  ADC_SR_AWD                          ((uint32_t)0x00000001)        /*!< Analog watchdog flag */
+#define  ADC_SR_EOC                          ((uint32_t)0x00000002)        /*!< End of conversion */
+#define  ADC_SR_JEOC                         ((uint32_t)0x00000004)        /*!< Injected channel end of conversion */
+#define  ADC_SR_JSTRT                        ((uint32_t)0x00000008)        /*!< Injected channel Start flag */
+#define  ADC_SR_STRT                         ((uint32_t)0x00000010)        /*!< Regular channel Start flag */
+#define  ADC_SR_OVR                          ((uint32_t)0x00000020)        /*!< Overrun flag */
+#define  ADC_SR_ADONS                        ((uint32_t)0x00000040)        /*!< ADC ON status */
+#define  ADC_SR_RCNR                         ((uint32_t)0x00000100)        /*!< Regular channel not ready flag */
+#define  ADC_SR_JCNR                         ((uint32_t)0x00000200)        /*!< Injected channel not ready flag */
+
+/*******************  Bit definition for ADC_CR1 register  ********************/
+#define  ADC_CR1_AWDCH                       ((uint32_t)0x0000001F)        /*!< AWDCH[4:0] bits (Analog watchdog channel select bits) */
+#define  ADC_CR1_AWDCH_0                     ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_CR1_AWDCH_1                     ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_CR1_AWDCH_2                     ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_CR1_AWDCH_3                     ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_CR1_AWDCH_4                     ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_CR1_EOCIE                       ((uint32_t)0x00000020)        /*!< Interrupt enable for EOC */
+#define  ADC_CR1_AWDIE                       ((uint32_t)0x00000040)        /*!< Analog Watchdog interrupt enable */
+#define  ADC_CR1_JEOCIE                      ((uint32_t)0x00000080)        /*!< Interrupt enable for injected channels */
+#define  ADC_CR1_SCAN                        ((uint32_t)0x00000100)        /*!< Scan mode */
+#define  ADC_CR1_AWDSGL                      ((uint32_t)0x00000200)        /*!< Enable the watchdog on a single channel in scan mode */
+#define  ADC_CR1_JAUTO                       ((uint32_t)0x00000400)        /*!< Automatic injected group conversion */
+#define  ADC_CR1_DISCEN                      ((uint32_t)0x00000800)        /*!< Discontinuous mode on regular channels */
+#define  ADC_CR1_JDISCEN                     ((uint32_t)0x00001000)        /*!< Discontinuous mode on injected channels */
+
+#define  ADC_CR1_DISCNUM                     ((uint32_t)0x0000E000)        /*!< DISCNUM[2:0] bits (Discontinuous mode channel count) */
+#define  ADC_CR1_DISCNUM_0                   ((uint32_t)0x00002000)        /*!< Bit 0 */
+#define  ADC_CR1_DISCNUM_1                   ((uint32_t)0x00004000)        /*!< Bit 1 */
+#define  ADC_CR1_DISCNUM_2                   ((uint32_t)0x00008000)        /*!< Bit 2 */
+
+#define  ADC_CR1_PDD                         ((uint32_t)0x00010000)        /*!< Power Down during Delay phase */
+#define  ADC_CR1_PDI                         ((uint32_t)0x00020000)        /*!< Power Down during Idle phase */
+
+#define  ADC_CR1_JAWDEN                      ((uint32_t)0x00400000)        /*!< Analog watchdog enable on injected channels */
+#define  ADC_CR1_AWDEN                       ((uint32_t)0x00800000)        /*!< Analog watchdog enable on regular channels */
+
+#define  ADC_CR1_RES                         ((uint32_t)0x03000000)        /*!< RES[1:0] bits (Resolution) */
+#define  ADC_CR1_RES_0                       ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  ADC_CR1_RES_1                       ((uint32_t)0x02000000)        /*!< Bit 1 */
+
+#define  ADC_CR1_OVRIE                       ((uint32_t)0x04000000)        /*!< Overrun interrupt enable */
+  
+/*******************  Bit definition for ADC_CR2 register  ********************/
+#define  ADC_CR2_ADON                        ((uint32_t)0x00000001)        /*!< A/D Converter ON / OFF */
+#define  ADC_CR2_CONT                        ((uint32_t)0x00000002)        /*!< Continuous Conversion */
+#define  ADC_CR2_CFG                         ((uint32_t)0x00000004)        /*!< ADC Configuration */
+
+#define  ADC_CR2_DELS                        ((uint32_t)0x00000070)        /*!< DELS[2:0] bits (Delay selection) */
+#define  ADC_CR2_DELS_0                      ((uint32_t)0x00000010)        /*!< Bit 0 */
+#define  ADC_CR2_DELS_1                      ((uint32_t)0x00000020)        /*!< Bit 1 */
+#define  ADC_CR2_DELS_2                      ((uint32_t)0x00000040)        /*!< Bit 2 */
+
+#define  ADC_CR2_DMA                         ((uint32_t)0x00000100)        /*!< Direct Memory access mode */
+#define  ADC_CR2_DDS                         ((uint32_t)0x00000200)        /*!< DMA disable selection (Single ADC) */
+#define  ADC_CR2_EOCS                        ((uint32_t)0x00000400)        /*!< End of conversion selection */
+#define  ADC_CR2_ALIGN                       ((uint32_t)0x00000800)        /*!< Data Alignment */
+
+#define  ADC_CR2_JEXTSEL                     ((uint32_t)0x000F0000)        /*!< JEXTSEL[3:0] bits (External event select for injected group) */
+#define  ADC_CR2_JEXTSEL_0                   ((uint32_t)0x00010000)        /*!< Bit 0 */
+#define  ADC_CR2_JEXTSEL_1                   ((uint32_t)0x00020000)        /*!< Bit 1 */
+#define  ADC_CR2_JEXTSEL_2                   ((uint32_t)0x00040000)        /*!< Bit 2 */
+#define  ADC_CR2_JEXTSEL_3                   ((uint32_t)0x00080000)        /*!< Bit 3 */
+
+#define  ADC_CR2_JEXTEN                      ((uint32_t)0x00300000)        /*!< JEXTEN[1:0] bits (External Trigger Conversion mode for injected channels) */
+#define  ADC_CR2_JEXTEN_0                    ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_CR2_JEXTEN_1                    ((uint32_t)0x00200000)        /*!< Bit 1 */
+
+#define  ADC_CR2_JSWSTART                    ((uint32_t)0x00400000)        /*!< Start Conversion of injected channels */
+
+#define  ADC_CR2_EXTSEL                      ((uint32_t)0x0F000000)        /*!< EXTSEL[3:0] bits (External Event Select for regular group) */
+#define  ADC_CR2_EXTSEL_0                    ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  ADC_CR2_EXTSEL_1                    ((uint32_t)0x02000000)        /*!< Bit 1 */
+#define  ADC_CR2_EXTSEL_2                    ((uint32_t)0x04000000)        /*!< Bit 2 */
+#define  ADC_CR2_EXTSEL_3                    ((uint32_t)0x08000000)        /*!< Bit 3 */
+
+#define  ADC_CR2_EXTEN                       ((uint32_t)0x30000000)        /*!< EXTEN[1:0] bits (External Trigger Conversion mode for regular channels) */
+#define  ADC_CR2_EXTEN_0                     ((uint32_t)0x10000000)        /*!< Bit 0 */
+#define  ADC_CR2_EXTEN_1                     ((uint32_t)0x20000000)        /*!< Bit 1 */
+
+#define  ADC_CR2_SWSTART                     ((uint32_t)0x40000000)        /*!< Start Conversion of regular channels */
+
+/******************  Bit definition for ADC_SMPR1 register  *******************/
+#define  ADC_SMPR1_SMP20                     ((uint32_t)0x00000007)        /*!< SMP20[2:0] bits (Channel 20 Sample time selection) */
+#define  ADC_SMPR1_SMP20_0                   ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP20_1                   ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP20_2                   ((uint32_t)0x00000004)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP21                     ((uint32_t)0x00000038)        /*!< SMP21[2:0] bits (Channel 21 Sample time selection) */
+#define  ADC_SMPR1_SMP21_0                   ((uint32_t)0x00000008)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP21_1                   ((uint32_t)0x00000010)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP21_2                   ((uint32_t)0x00000020)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP22                     ((uint32_t)0x000001C0)        /*!< SMP22[2:0] bits (Channel 22 Sample time selection) */
+#define  ADC_SMPR1_SMP22_0                   ((uint32_t)0x00000040)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP22_1                   ((uint32_t)0x00000080)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP22_2                   ((uint32_t)0x00000100)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP23                     ((uint32_t)0x00000E00)        /*!< SMP23[2:0] bits (Channel 23 Sample time selection) */
+#define  ADC_SMPR1_SMP23_0                   ((uint32_t)0x00000200)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP23_1                   ((uint32_t)0x00000400)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP23_2                   ((uint32_t)0x00000800)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP24                     ((uint32_t)0x00007000)        /*!< SMP24[2:0] bits (Channel 24 Sample time selection) */
+#define  ADC_SMPR1_SMP24_0                   ((uint32_t)0x00001000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP24_1                   ((uint32_t)0x00002000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP24_2                   ((uint32_t)0x00004000)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP25                     ((uint32_t)0x00038000)        /*!< SMP25[2:0] bits (Channel 25 Sample time selection) */
+#define  ADC_SMPR1_SMP25_0                   ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP25_1                   ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP25_2                   ((uint32_t)0x00020000)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP26                     ((uint32_t)0x001C0000)        /*!< SMP26[2:0] bits (Channel 26 Sample time selection) */
+#define  ADC_SMPR1_SMP26_0                   ((uint32_t)0x00040000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP26_1                   ((uint32_t)0x00080000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP26_2                   ((uint32_t)0x00100000)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP27                     ((uint32_t)0x00E00000)        /*!< SMP27[2:0] bits (Channel 27 Sample time selection) */
+#define  ADC_SMPR1_SMP27_0                   ((uint32_t)0x00200000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP27_1                   ((uint32_t)0x00400000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP27_2                   ((uint32_t)0x00800000)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP28                     ((uint32_t)0x07000000)        /*!< SMP28[2:0] bits (Channel 28 Sample time selection) */
+#define  ADC_SMPR1_SMP28_0                   ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP28_1                   ((uint32_t)0x02000000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP28_2                   ((uint32_t)0x04000000)        /*!< Bit 2 */
+
+#define  ADC_SMPR1_SMP29                     ((uint32_t)0x38000000)        /*!< SMP29[2:0] bits (Channel 29 Sample time selection) */
+#define  ADC_SMPR1_SMP29_0                   ((uint32_t)0x08000000)        /*!< Bit 0 */
+#define  ADC_SMPR1_SMP29_1                   ((uint32_t)0x10000000)        /*!< Bit 1 */
+#define  ADC_SMPR1_SMP29_2                   ((uint32_t)0x20000000)        /*!< Bit 2 */
+
+/******************  Bit definition for ADC_SMPR2 register  *******************/
+#define  ADC_SMPR2_SMP10                     ((uint32_t)0x00000007)        /*!< SMP10[2:0] bits (Channel 10 Sample time selection) */
+#define  ADC_SMPR2_SMP10_0                   ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP10_1                   ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP10_2                   ((uint32_t)0x00000004)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP11                     ((uint32_t)0x00000038)        /*!< SMP11[2:0] bits (Channel 11 Sample time selection) */
+#define  ADC_SMPR2_SMP11_0                   ((uint32_t)0x00000008)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP11_1                   ((uint32_t)0x00000010)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP11_2                   ((uint32_t)0x00000020)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP12                     ((uint32_t)0x000001C0)        /*!< SMP12[2:0] bits (Channel 12 Sample time selection) */
+#define  ADC_SMPR2_SMP12_0                   ((uint32_t)0x00000040)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP12_1                   ((uint32_t)0x00000080)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP12_2                   ((uint32_t)0x00000100)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP13                     ((uint32_t)0x00000E00)        /*!< SMP13[2:0] bits (Channel 13 Sample time selection) */
+#define  ADC_SMPR2_SMP13_0                   ((uint32_t)0x00000200)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP13_1                   ((uint32_t)0x00000400)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP13_2                   ((uint32_t)0x00000800)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP14                     ((uint32_t)0x00007000)        /*!< SMP14[2:0] bits (Channel 14 Sample time selection) */
+#define  ADC_SMPR2_SMP14_0                   ((uint32_t)0x00001000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP14_1                   ((uint32_t)0x00002000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP14_2                   ((uint32_t)0x00004000)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP15                     ((uint32_t)0x00038000)        /*!< SMP15[2:0] bits (Channel 5 Sample time selection) */
+#define  ADC_SMPR2_SMP15_0                   ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP15_1                   ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP15_2                   ((uint32_t)0x00020000)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP16                     ((uint32_t)0x001C0000)        /*!< SMP16[2:0] bits (Channel 16 Sample time selection) */
+#define  ADC_SMPR2_SMP16_0                   ((uint32_t)0x00040000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP16_1                   ((uint32_t)0x00080000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP16_2                   ((uint32_t)0x00100000)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP17                     ((uint32_t)0x00E00000)        /*!< SMP17[2:0] bits (Channel 17 Sample time selection) */
+#define  ADC_SMPR2_SMP17_0                   ((uint32_t)0x00200000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP17_1                   ((uint32_t)0x00400000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP17_2                   ((uint32_t)0x00800000)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP18                     ((uint32_t)0x07000000)        /*!< SMP18[2:0] bits (Channel 18 Sample time selection) */
+#define  ADC_SMPR2_SMP18_0                   ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP18_1                   ((uint32_t)0x02000000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP18_2                   ((uint32_t)0x04000000)        /*!< Bit 2 */
+
+#define  ADC_SMPR2_SMP19                     ((uint32_t)0x38000000)        /*!< SMP19[2:0] bits (Channel 19 Sample time selection) */
+#define  ADC_SMPR2_SMP19_0                   ((uint32_t)0x08000000)        /*!< Bit 0 */
+#define  ADC_SMPR2_SMP19_1                   ((uint32_t)0x10000000)        /*!< Bit 1 */
+#define  ADC_SMPR2_SMP19_2                   ((uint32_t)0x20000000)        /*!< Bit 2 */
+
+/******************  Bit definition for ADC_SMPR3 register  *******************/
+#define  ADC_SMPR3_SMP0                      ((uint32_t)0x00000007)        /*!< SMP0[2:0] bits (Channel 0 Sample time selection) */
+#define  ADC_SMPR3_SMP0_0                    ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP0_1                    ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP0_2                    ((uint32_t)0x00000004)        /*!< Bit 2 */
+ 
+#define  ADC_SMPR3_SMP1                      ((uint32_t)0x00000038)        /*!< SMP1[2:0] bits (Channel 1 Sample time selection) */
+#define  ADC_SMPR3_SMP1_0                    ((uint32_t)0x00000008)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP1_1                    ((uint32_t)0x00000010)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP1_2                    ((uint32_t)0x00000020)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP2                      ((uint32_t)0x000001C0)        /*!< SMP2[2:0] bits (Channel 2 Sample time selection) */
+#define  ADC_SMPR3_SMP2_0                    ((uint32_t)0x00000040)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP2_1                    ((uint32_t)0x00000080)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP2_2                    ((uint32_t)0x00000100)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP3                      ((uint32_t)0x00000E00)        /*!< SMP3[2:0] bits (Channel 3 Sample time selection) */
+#define  ADC_SMPR3_SMP3_0                    ((uint32_t)0x00000200)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP3_1                    ((uint32_t)0x00000400)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP3_2                    ((uint32_t)0x00000800)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP4                      ((uint32_t)0x00007000)        /*!< SMP4[2:0] bits (Channel 4 Sample time selection) */
+#define  ADC_SMPR3_SMP4_0                    ((uint32_t)0x00001000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP4_1                    ((uint32_t)0x00002000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP4_2                    ((uint32_t)0x00004000)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP5                      ((uint32_t)0x00038000)        /*!< SMP5[2:0] bits (Channel 5 Sample time selection) */
+#define  ADC_SMPR3_SMP5_0                    ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP5_1                    ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP5_2                    ((uint32_t)0x00020000)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP6                      ((uint32_t)0x001C0000)        /*!< SMP6[2:0] bits (Channel 6 Sample time selection) */
+#define  ADC_SMPR3_SMP6_0                    ((uint32_t)0x00040000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP6_1                    ((uint32_t)0x00080000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP6_2                    ((uint32_t)0x00100000)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP7                      ((uint32_t)0x00E00000)        /*!< SMP7[2:0] bits (Channel 7 Sample time selection) */
+#define  ADC_SMPR3_SMP7_0                    ((uint32_t)0x00200000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP7_1                    ((uint32_t)0x00400000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP7_2                    ((uint32_t)0x00800000)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP8                      ((uint32_t)0x07000000)        /*!< SMP8[2:0] bits (Channel 8 Sample time selection) */
+#define  ADC_SMPR3_SMP8_0                    ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP8_1                    ((uint32_t)0x02000000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP8_2                    ((uint32_t)0x04000000)        /*!< Bit 2 */
+
+#define  ADC_SMPR3_SMP9                      ((uint32_t)0x38000000)        /*!< SMP9[2:0] bits (Channel 9 Sample time selection) */
+#define  ADC_SMPR3_SMP9_0                    ((uint32_t)0x08000000)        /*!< Bit 0 */
+#define  ADC_SMPR3_SMP9_1                    ((uint32_t)0x10000000)        /*!< Bit 1 */
+#define  ADC_SMPR3_SMP9_2                    ((uint32_t)0x20000000)        /*!< Bit 2 */
+
+/******************  Bit definition for ADC_JOFR1 register  *******************/
+#define  ADC_JOFR1_JOFFSET1                  ((uint32_t)0x00000FFF)        /*!< Data offset for injected channel 1 */
+
+/******************  Bit definition for ADC_JOFR2 register  *******************/
+#define  ADC_JOFR2_JOFFSET2                  ((uint32_t)0x00000FFF)        /*!< Data offset for injected channel 2 */
+
+/******************  Bit definition for ADC_JOFR3 register  *******************/
+#define  ADC_JOFR3_JOFFSET3                  ((uint32_t)0x00000FFF)        /*!< Data offset for injected channel 3 */
+
+/******************  Bit definition for ADC_JOFR4 register  *******************/
+#define  ADC_JOFR4_JOFFSET4                  ((uint32_t)0x00000FFF)        /*!< Data offset for injected channel 4 */
+
+/*******************  Bit definition for ADC_HTR register  ********************/
+#define  ADC_HTR_HT                          ((uint32_t)0x00000FFF)        /*!< Analog watchdog high threshold */
+
+/*******************  Bit definition for ADC_LTR register  ********************/
+#define  ADC_LTR_LT                          ((uint32_t)0x00000FFF)         /*!< Analog watchdog low threshold */
+
+/*******************  Bit definition for ADC_SQR1 register  *******************/
+#define  ADC_SQR1_L                          ((uint32_t)0x01F00000)        /*!< L[4:0] bits (Regular channel sequence length) */
+#define  ADC_SQR1_L_0                        ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_SQR1_L_1                        ((uint32_t)0x00200000)        /*!< Bit 1 */
+#define  ADC_SQR1_L_2                        ((uint32_t)0x00400000)        /*!< Bit 2 */
+#define  ADC_SQR1_L_3                        ((uint32_t)0x00800000)        /*!< Bit 3 */
+#define  ADC_SQR1_L_4                        ((uint32_t)0x01000000)        /*!< Bit 4 */
+
+#define  ADC_SQR1_SQ28                       ((uint32_t)0x000F8000)        /*!< SQ28[4:0] bits (25th conversion in regular sequence) */
+#define  ADC_SQR1_SQ28_0                     ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SQR1_SQ28_1                     ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SQR1_SQ28_2                     ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_SQR1_SQ28_3                     ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_SQR1_SQ28_4                     ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_SQR1_SQ27                       ((uint32_t)0x00007C00)        /*!< SQ27[4:0] bits (27th conversion in regular sequence) */
+#define  ADC_SQR1_SQ27_0                     ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_SQR1_SQ27_1                     ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_SQR1_SQ27_2                     ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_SQR1_SQ27_3                     ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_SQR1_SQ27_4                     ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_SQR1_SQ26                       ((uint32_t)0x000003E0)        /*!< SQ26[4:0] bits (26th conversion in regular sequence) */
+#define  ADC_SQR1_SQ26_0                     ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_SQR1_SQ26_1                     ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_SQR1_SQ26_2                     ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_SQR1_SQ26_3                     ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_SQR1_SQ26_4                     ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_SQR1_SQ25                       ((uint32_t)0x0000001F)        /*!< SQ25[4:0] bits (25th conversion in regular sequence) */
+#define  ADC_SQR1_SQ25_0                     ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SQR1_SQ25_1                     ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SQR1_SQ25_2                     ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_SQR1_SQ25_3                     ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_SQR1_SQ25_4                     ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+/*******************  Bit definition for ADC_SQR2 register  *******************/
+#define  ADC_SQR2_SQ19                       ((uint32_t)0x0000001F)        /*!< SQ19[4:0] bits (19th conversion in regular sequence) */
+#define  ADC_SQR2_SQ19_0                     ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ19_1                     ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ19_2                     ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ19_3                     ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ19_4                     ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_SQR2_SQ20                       ((uint32_t)0x000003E0)        /*!< SQ20[4:0] bits (20th conversion in regular sequence) */
+#define  ADC_SQR2_SQ20_0                     ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ20_1                     ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ20_2                     ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ20_3                     ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ20_4                     ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_SQR2_SQ21                       ((uint32_t)0x00007C00)        /*!< SQ21[4:0] bits (21th conversion in regular sequence) */
+#define  ADC_SQR2_SQ21_0                     ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ21_1                     ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ21_2                     ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ21_3                     ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ21_4                     ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_SQR2_SQ22                       ((uint32_t)0x000F8000)        /*!< SQ22[4:0] bits (22th conversion in regular sequence) */
+#define  ADC_SQR2_SQ22_0                     ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ22_1                     ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ22_2                     ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ22_3                     ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ22_4                     ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_SQR2_SQ23                       ((uint32_t)0x01F00000)        /*!< SQ23[4:0] bits (23th conversion in regular sequence) */
+#define  ADC_SQR2_SQ23_0                     ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ23_1                     ((uint32_t)0x00200000)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ23_2                     ((uint32_t)0x00400000)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ23_3                     ((uint32_t)0x00800000)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ23_4                     ((uint32_t)0x01000000)        /*!< Bit 4 */
+
+#define  ADC_SQR2_SQ24                       ((uint32_t)0x3E000000)        /*!< SQ24[4:0] bits (24th conversion in regular sequence) */
+#define  ADC_SQR2_SQ24_0                     ((uint32_t)0x02000000)        /*!< Bit 0 */
+#define  ADC_SQR2_SQ24_1                     ((uint32_t)0x04000000)        /*!< Bit 1 */
+#define  ADC_SQR2_SQ24_2                     ((uint32_t)0x08000000)        /*!< Bit 2 */
+#define  ADC_SQR2_SQ24_3                     ((uint32_t)0x10000000)        /*!< Bit 3 */
+#define  ADC_SQR2_SQ24_4                     ((uint32_t)0x20000000)        /*!< Bit 4 */
+
+/*******************  Bit definition for ADC_SQR3 register  *******************/
+#define  ADC_SQR3_SQ13                       ((uint32_t)0x0000001F)        /*!< SQ13[4:0] bits (13th conversion in regular sequence) */
+#define  ADC_SQR3_SQ13_0                     ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ13_1                     ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ13_2                     ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ13_3                     ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ13_4                     ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_SQR3_SQ14                       ((uint32_t)0x000003E0)        /*!< SQ14[4:0] bits (14th conversion in regular sequence) */
+#define  ADC_SQR3_SQ14_0                     ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ14_1                     ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ14_2                     ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ14_3                     ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ14_4                     ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_SQR3_SQ15                       ((uint32_t)0x00007C00)        /*!< SQ15[4:0] bits (15th conversion in regular sequence) */
+#define  ADC_SQR3_SQ15_0                     ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ15_1                     ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ15_2                     ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ15_3                     ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ15_4                     ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_SQR3_SQ16                       ((uint32_t)0x000F8000)        /*!< SQ16[4:0] bits (16th conversion in regular sequence) */
+#define  ADC_SQR3_SQ16_0                     ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ16_1                     ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ16_2                     ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ16_3                     ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ16_4                     ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_SQR3_SQ17                       ((uint32_t)0x01F00000)        /*!< SQ17[4:0] bits (17th conversion in regular sequence) */
+#define  ADC_SQR3_SQ17_0                     ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ17_1                     ((uint32_t)0x00200000)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ17_2                     ((uint32_t)0x00400000)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ17_3                     ((uint32_t)0x00800000)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ17_4                     ((uint32_t)0x01000000)        /*!< Bit 4 */
+
+#define  ADC_SQR3_SQ18                       ((uint32_t)0x3E000000)        /*!< SQ18[4:0] bits (18th conversion in regular sequence) */
+#define  ADC_SQR3_SQ18_0                     ((uint32_t)0x02000000)        /*!< Bit 0 */
+#define  ADC_SQR3_SQ18_1                     ((uint32_t)0x04000000)        /*!< Bit 1 */
+#define  ADC_SQR3_SQ18_2                     ((uint32_t)0x08000000)        /*!< Bit 2 */
+#define  ADC_SQR3_SQ18_3                     ((uint32_t)0x10000000)        /*!< Bit 3 */
+#define  ADC_SQR3_SQ18_4                     ((uint32_t)0x20000000)        /*!< Bit 4 */
+
+/*******************  Bit definition for ADC_SQR4 register  *******************/
+#define  ADC_SQR4_SQ7                        ((uint32_t)0x0000001F)        /*!< SQ7[4:0] bits (7th conversion in regular sequence) */
+#define  ADC_SQR4_SQ7_0                      ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ7_1                      ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ7_2                      ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ7_3                      ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ7_4                      ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_SQR4_SQ8                        ((uint32_t)0x000003E0)        /*!< SQ8[4:0] bits (8th conversion in regular sequence) */
+#define  ADC_SQR4_SQ8_0                      ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ8_1                      ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ8_2                      ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ8_3                      ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ8_4                      ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_SQR4_SQ9                        ((uint32_t)0x00007C00)        /*!< SQ9[4:0] bits (9th conversion in regular sequence) */
+#define  ADC_SQR4_SQ9_0                      ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ9_1                      ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ9_2                      ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ9_3                      ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ9_4                      ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_SQR4_SQ10                        ((uint32_t)0x000F8000)        /*!< SQ10[4:0] bits (10th conversion in regular sequence) */
+#define  ADC_SQR4_SQ10_0                      ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ10_1                      ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ10_2                      ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ10_3                      ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ10_4                      ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_SQR4_SQ11                        ((uint32_t)0x01F00000)        /*!< SQ11[4:0] bits (11th conversion in regular sequence) */
+#define  ADC_SQR4_SQ11_0                      ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ11_1                      ((uint32_t)0x00200000)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ11_2                      ((uint32_t)0x00400000)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ11_3                      ((uint32_t)0x00800000)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ11_4                      ((uint32_t)0x01000000)        /*!< Bit 4 */
+
+#define  ADC_SQR4_SQ12                        ((uint32_t)0x3E000000)        /*!< SQ12[4:0] bits (12th conversion in regular sequence) */
+#define  ADC_SQR4_SQ12_0                      ((uint32_t)0x02000000)        /*!< Bit 0 */
+#define  ADC_SQR4_SQ12_1                      ((uint32_t)0x04000000)        /*!< Bit 1 */
+#define  ADC_SQR4_SQ12_2                      ((uint32_t)0x08000000)        /*!< Bit 2 */
+#define  ADC_SQR4_SQ12_3                      ((uint32_t)0x10000000)        /*!< Bit 3 */
+#define  ADC_SQR4_SQ12_4                      ((uint32_t)0x20000000)        /*!< Bit 4 */
+
+/*******************  Bit definition for ADC_SQR5 register  *******************/
+#define  ADC_SQR5_SQ1                        ((uint32_t)0x0000001F)        /*!< SQ1[4:0] bits (1st conversion in regular sequence) */
+#define  ADC_SQR5_SQ1_0                      ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ1_1                      ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ1_2                      ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ1_3                      ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ1_4                      ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_SQR5_SQ2                        ((uint32_t)0x000003E0)        /*!< SQ2[4:0] bits (2nd conversion in regular sequence) */
+#define  ADC_SQR5_SQ2_0                      ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ2_1                      ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ2_2                      ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ2_3                      ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ2_4                      ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_SQR5_SQ3                        ((uint32_t)0x00007C00)        /*!< SQ3[4:0] bits (3rd conversion in regular sequence) */
+#define  ADC_SQR5_SQ3_0                      ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ3_1                      ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ3_2                      ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ3_3                      ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ3_4                      ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_SQR5_SQ4                        ((uint32_t)0x000F8000)        /*!< SQ4[4:0] bits (4th conversion in regular sequence) */
+#define  ADC_SQR5_SQ4_0                      ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ4_1                      ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ4_2                      ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ4_3                      ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ4_4                      ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_SQR5_SQ5                        ((uint32_t)0x01F00000)        /*!< SQ5[4:0] bits (5th conversion in regular sequence) */
+#define  ADC_SQR5_SQ5_0                      ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ5_1                      ((uint32_t)0x00200000)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ5_2                      ((uint32_t)0x00400000)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ5_3                      ((uint32_t)0x00800000)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ5_4                      ((uint32_t)0x01000000)        /*!< Bit 4 */
+
+#define  ADC_SQR5_SQ6                        ((uint32_t)0x3E000000)        /*!< SQ6[4:0] bits (6th conversion in regular sequence) */
+#define  ADC_SQR5_SQ6_0                      ((uint32_t)0x02000000)        /*!< Bit 0 */
+#define  ADC_SQR5_SQ6_1                      ((uint32_t)0x04000000)        /*!< Bit 1 */
+#define  ADC_SQR5_SQ6_2                      ((uint32_t)0x08000000)        /*!< Bit 2 */
+#define  ADC_SQR5_SQ6_3                      ((uint32_t)0x10000000)        /*!< Bit 3 */
+#define  ADC_SQR5_SQ6_4                      ((uint32_t)0x20000000)        /*!< Bit 4 */
+
+
+/*******************  Bit definition for ADC_JSQR register  *******************/
+#define  ADC_JSQR_JSQ1                       ((uint32_t)0x0000001F)        /*!< JSQ1[4:0] bits (1st conversion in injected sequence) */  
+#define  ADC_JSQR_JSQ1_0                     ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  ADC_JSQR_JSQ1_1                     ((uint32_t)0x00000002)        /*!< Bit 1 */
+#define  ADC_JSQR_JSQ1_2                     ((uint32_t)0x00000004)        /*!< Bit 2 */
+#define  ADC_JSQR_JSQ1_3                     ((uint32_t)0x00000008)        /*!< Bit 3 */
+#define  ADC_JSQR_JSQ1_4                     ((uint32_t)0x00000010)        /*!< Bit 4 */
+
+#define  ADC_JSQR_JSQ2                       ((uint32_t)0x000003E0)        /*!< JSQ2[4:0] bits (2nd conversion in injected sequence) */
+#define  ADC_JSQR_JSQ2_0                     ((uint32_t)0x00000020)        /*!< Bit 0 */
+#define  ADC_JSQR_JSQ2_1                     ((uint32_t)0x00000040)        /*!< Bit 1 */
+#define  ADC_JSQR_JSQ2_2                     ((uint32_t)0x00000080)        /*!< Bit 2 */
+#define  ADC_JSQR_JSQ2_3                     ((uint32_t)0x00000100)        /*!< Bit 3 */
+#define  ADC_JSQR_JSQ2_4                     ((uint32_t)0x00000200)        /*!< Bit 4 */
+
+#define  ADC_JSQR_JSQ3                       ((uint32_t)0x00007C00)        /*!< JSQ3[4:0] bits (3rd conversion in injected sequence) */
+#define  ADC_JSQR_JSQ3_0                     ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  ADC_JSQR_JSQ3_1                     ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  ADC_JSQR_JSQ3_2                     ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  ADC_JSQR_JSQ3_3                     ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  ADC_JSQR_JSQ3_4                     ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  ADC_JSQR_JSQ4                       ((uint32_t)0x000F8000)        /*!< JSQ4[4:0] bits (4th conversion in injected sequence) */
+#define  ADC_JSQR_JSQ4_0                     ((uint32_t)0x00008000)        /*!< Bit 0 */
+#define  ADC_JSQR_JSQ4_1                     ((uint32_t)0x00010000)        /*!< Bit 1 */
+#define  ADC_JSQR_JSQ4_2                     ((uint32_t)0x00020000)        /*!< Bit 2 */
+#define  ADC_JSQR_JSQ4_3                     ((uint32_t)0x00040000)        /*!< Bit 3 */
+#define  ADC_JSQR_JSQ4_4                     ((uint32_t)0x00080000)        /*!< Bit 4 */
+
+#define  ADC_JSQR_JL                         ((uint32_t)0x00300000)        /*!< JL[1:0] bits (Injected Sequence length) */
+#define  ADC_JSQR_JL_0                       ((uint32_t)0x00100000)        /*!< Bit 0 */
+#define  ADC_JSQR_JL_1                       ((uint32_t)0x00200000)        /*!< Bit 1 */
+
+/*******************  Bit definition for ADC_JDR1 register  *******************/
+#define  ADC_JDR1_JDATA                      ((uint32_t)0x0000FFFF)        /*!< Injected data */
+
+/*******************  Bit definition for ADC_JDR2 register  *******************/
+#define  ADC_JDR2_JDATA                      ((uint32_t)0x0000FFFF)        /*!< Injected data */
+
+/*******************  Bit definition for ADC_JDR3 register  *******************/
+#define  ADC_JDR3_JDATA                      ((uint32_t)0x0000FFFF)        /*!< Injected data */
+
+/*******************  Bit definition for ADC_JDR4 register  *******************/
+#define  ADC_JDR4_JDATA                      ((uint32_t)0x0000FFFF)        /*!< Injected data */
+
+/********************  Bit definition for ADC_DR register  ********************/
+#define  ADC_DR_DATA                         ((uint32_t)0x0000FFFF)        /*!< Regular data */
+
+/*******************  Bit definition for ADC_CSR register  ********************/
+#define  ADC_CSR_AWD1                        ((uint32_t)0x00000001)        /*!< ADC1 Analog watchdog flag */
+#define  ADC_CSR_EOC1                        ((uint32_t)0x00000002)        /*!< ADC1 End of conversion */
+#define  ADC_CSR_JEOC1                       ((uint32_t)0x00000004)        /*!< ADC1 Injected channel end of conversion */
+#define  ADC_CSR_JSTRT1                      ((uint32_t)0x00000008)        /*!< ADC1 Injected channel Start flag */
+#define  ADC_CSR_STRT1                       ((uint32_t)0x00000010)        /*!< ADC1 Regular channel Start flag */
+#define  ADC_CSR_OVR1                        ((uint32_t)0x00000020)        /*!< ADC1 overrun  flag */
+#define  ADC_CSR_ADONS1                      ((uint32_t)0x00000040)        /*!< ADON status of ADC1 */
+
+/*******************  Bit definition for ADC_CCR register  ********************/
+#define  ADC_CCR_ADCPRE                      ((uint32_t)0x00030000)        /*!< ADC prescaler*/
+#define  ADC_CCR_ADCPRE_0                    ((uint32_t)0x00010000)        /*!< Bit 0 */
+#define  ADC_CCR_ADCPRE_1                    ((uint32_t)0x00020000)        /*!< Bit 1 */ 
+#define  ADC_CCR_TSVREFE                     ((uint32_t)0x00800000)        /*!< Temperature Sensor and VREFINT Enable */
+
+/******************************************************************************/
+/*                                                                            */
+/*                      Analog Comparators (COMP)                             */
+/*                                                                            */
+/******************************************************************************/
+
+/******************  Bit definition for COMP_CSR register  ********************/
+#define  COMP_CSR_10KPU                      ((uint32_t)0x00000001)        /*!< 10K pull-up resistor */
+#define  COMP_CSR_400KPU                     ((uint32_t)0x00000002)        /*!< 400K pull-up resistor */
+#define  COMP_CSR_10KPD                      ((uint32_t)0x00000004)        /*!< 10K pull-down resistor */
+#define  COMP_CSR_400KPD                     ((uint32_t)0x00000008)        /*!< 400K pull-down resistor */
+#define  COMP_CSR_CMP1EN                     ((uint32_t)0x00000010)        /*!< Comparator 1 enable */
+#define  COMP_CSR_CMP1OUT                    ((uint32_t)0x00000080)        /*!< Comparator 1 output */
+
+#define  COMP_CSR_SPEED                      ((uint32_t)0x00001000)        /*!< Comparator 2 speed */
+#define  COMP_CSR_CMP2OUT                    ((uint32_t)0x00002000)        /*!< Comparator 2 ouput */
+#define  COMP_CSR_VREFOUTEN                  ((uint32_t)0x00010000)        /*!< Comparator Vref Enable */
+#define  COMP_CSR_WNDWE                      ((uint32_t)0x00020000)        /*!< Window mode enable */
+#define  COMP_CSR_INSEL                      ((uint32_t)0x001C0000)        /*!< INSEL[2:0] Inversion input Selection */
+#define  COMP_CSR_INSEL_0                    ((uint32_t)0x00040000)        /*!< Bit 0 */
+#define  COMP_CSR_INSEL_1                    ((uint32_t)0x00080000)        /*!< Bit 1 */
+#define  COMP_CSR_INSEL_2                    ((uint32_t)0x00100000)        /*!< Bit 2 */
+#define  COMP_CSR_OUTSEL                     ((uint32_t)0x00E00000)        /*!< OUTSEL[2:0] comparator 2 output redirection */
+#define  COMP_CSR_OUTSEL_0                   ((uint32_t)0x00200000)        /*!< Bit 0 */
+#define  COMP_CSR_OUTSEL_1                   ((uint32_t)0x00400000)        /*!< Bit 1 */
+#define  COMP_CSR_OUTSEL_2                   ((uint32_t)0x00800000)        /*!< Bit 2 */
+
+#define  COMP_CSR_FCH3                       ((uint32_t)0x04000000)        /*!< Bit 26 */
+#define  COMP_CSR_FCH8                       ((uint32_t)0x08000000)        /*!< Bit 27 */
+#define  COMP_CSR_RCH13                      ((uint32_t)0x10000000)        /*!< Bit 28 */
+
+#define  COMP_CSR_CAIE                       ((uint32_t)0x20000000)        /*!< Bit 29 */
+#define  COMP_CSR_CAIF                       ((uint32_t)0x40000000)        /*!< Bit 30 */
+#define  COMP_CSR_TSUSP                      ((uint32_t)0x80000000)        /*!< Bit 31 */
+
+/******************************************************************************/
+/*                                                                            */
+/*                         Operational Amplifier (OPAMP)                      */
+/*                                                                            */
+/******************************************************************************/
+/*******************  Bit definition for OPAMP_CSR register  ******************/
+#define OPAMP_CSR_OPA1PD                     ((uint32_t)0x00000001)        /*!< OPAMP1 disable */
+#define OPAMP_CSR_S3SEL1                     ((uint32_t)0x00000002)        /*!< Switch 3 for OPAMP1 Enable */
+#define OPAMP_CSR_S4SEL1                     ((uint32_t)0x00000004)        /*!< Switch 4 for OPAMP1 Enable */
+#define OPAMP_CSR_S5SEL1                     ((uint32_t)0x00000008)        /*!< Switch 5 for OPAMP1 Enable */
+#define OPAMP_CSR_S6SEL1                     ((uint32_t)0x00000010)        /*!< Switch 6 for OPAMP1 Enable */
+#define OPAMP_CSR_OPA1CAL_L                  ((uint32_t)0x00000020)        /*!< OPAMP1 Offset calibration for P differential pair */
+#define OPAMP_CSR_OPA1CAL_H                  ((uint32_t)0x00000040)        /*!< OPAMP1 Offset calibration for N differential pair */
+#define OPAMP_CSR_OPA1LPM                    ((uint32_t)0x00000080)        /*!< OPAMP1 Low power enable */
+#define OPAMP_CSR_OPA2PD                     ((uint32_t)0x00000100)        /*!< OPAMP2 disable */
+#define OPAMP_CSR_S3SEL2                     ((uint32_t)0x00000200)        /*!< Switch 3 for OPAMP2 Enable */
+#define OPAMP_CSR_S4SEL2                     ((uint32_t)0x00000400)        /*!< Switch 4 for OPAMP2 Enable */
+#define OPAMP_CSR_S5SEL2                     ((uint32_t)0x00000800)        /*!< Switch 5 for OPAMP2 Enable */
+#define OPAMP_CSR_S6SEL2                     ((uint32_t)0x00001000)        /*!< Switch 6 for OPAMP2 Enable */
+#define OPAMP_CSR_OPA2CAL_L                  ((uint32_t)0x00002000)        /*!< OPAMP2 Offset calibration for P differential pair */
+#define OPAMP_CSR_OPA2CAL_H                  ((uint32_t)0x00004000)        /*!< OPAMP2 Offset calibration for N differential pair */
+#define OPAMP_CSR_OPA2LPM                    ((uint32_t)0x00008000)        /*!< OPAMP2 Low power enable */
+#define OPAMP_CSR_ANAWSEL1                   ((uint32_t)0x01000000)        /*!< Switch ANA Enable for OPAMP1 */ 
+#define OPAMP_CSR_ANAWSEL2                   ((uint32_t)0x02000000)        /*!< Switch ANA Enable for OPAMP2 */
+#define OPAMP_CSR_S7SEL2                     ((uint32_t)0x08000000)        /*!< Switch 7 for OPAMP2 Enable */
+#define OPAMP_CSR_AOP_RANGE                  ((uint32_t)0x10000000)        /*!< Power range selection */
+#define OPAMP_CSR_OPA1CALOUT                 ((uint32_t)0x20000000)        /*!< OPAMP1 calibration output */
+#define OPAMP_CSR_OPA2CALOUT                 ((uint32_t)0x40000000)        /*!< OPAMP2 calibration output */
+
+/*******************  Bit definition for OPAMP_OTR register  ******************/
+#define OPAMP_OTR_AO1_OPT_OFFSET_TRIM_LOW    ((uint32_t)0x0000001F)        /*!< Offset trim for transistors differential pair PMOS of OPAMP1 */
+#define OPAMP_OTR_AO1_OPT_OFFSET_TRIM_HIGH   ((uint32_t)0x000003E0)        /*!< Offset trim for transistors differential pair NMOS of OPAMP1 */
+#define OPAMP_OTR_AO2_OPT_OFFSET_TRIM_LOW    ((uint32_t)0x00007C00)        /*!< Offset trim for transistors differential pair PMOS of OPAMP2 */
+#define OPAMP_OTR_AO2_OPT_OFFSET_TRIM_HIGH   ((uint32_t)0x000F8000)        /*!< Offset trim for transistors differential pair NMOS of OPAMP2 */
+#define OPAMP_OTR_OT_USER                    ((uint32_t)0x80000000)        /*!< Switch to OPAMP offset user trimmed values */
+
+/*******************  Bit definition for OPAMP_LPOTR register  ****************/
+#define OPAMP_OTR_AO1_OPT_OFFSET_TRIM_LP_LOW  ((uint32_t)0x0000001F)        /*!< Offset trim for transistors differential pair PMOS of OPAMP1 */
+#define OPAMP_OTR_AO1_OPT_OFFSET_TRIM_LP_HIGH ((uint32_t)0x000003E0)        /*!< Offset trim for transistors differential pair NMOS of OPAMP1 */
+#define OPAMP_OTR_AO2_OPT_OFFSET_TRIM_LP_LOW  ((uint32_t)0x00007C00)        /*!< Offset trim for transistors differential pair PMOS of OPAMP2 */
+#define OPAMP_OTR_AO2_OPT_OFFSET_TRIM_LP_HIGH ((uint32_t)0x000F8000)        /*!< Offset trim for transistors differential pair NMOS of OPAMP2 */
+
+/******************************************************************************/
+/*                                                                            */
+/*                       CRC calculation unit (CRC)                           */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for CRC_DR register  *********************/
+#define  CRC_DR_DR                           ((uint32_t)0xFFFFFFFF)        /*!< Data register bits */
+
+/*******************  Bit definition for CRC_IDR register  ********************/
+#define  CRC_IDR_IDR                         ((uint32_t)0x000000FF)               /*!< General-purpose 8-bit data register bits */
+
+/********************  Bit definition for CRC_CR register  ********************/
+#define  CRC_CR_RESET                        ((uint32_t)0x00000001)        /*!< RESET bit */
+
+/******************************************************************************/
+/*                                                                            */
+/*                    Digital to Analog Converter (DAC)                       */
+/*                                                                            */
+/******************************************************************************/
+
+/********************  Bit definition for DAC_CR register  ********************/
+#define  DAC_CR_EN1                          ((uint32_t)0x00000001)        /*!<DAC channel1 enable */
+#define  DAC_CR_BOFF1                        ((uint32_t)0x00000002)        /*!<DAC channel1 output buffer disable */
+#define  DAC_CR_TEN1                         ((uint32_t)0x00000004)        /*!<DAC channel1 Trigger enable */
+
+#define  DAC_CR_TSEL1                        ((uint32_t)0x00000038)        /*!<TSEL1[2:0] (DAC channel1 Trigger selection) */
+#define  DAC_CR_TSEL1_0                      ((uint32_t)0x00000008)        /*!<Bit 0 */
+#define  DAC_CR_TSEL1_1                      ((uint32_t)0x00000010)        /*!<Bit 1 */
+#define  DAC_CR_TSEL1_2                      ((uint32_t)0x00000020)        /*!<Bit 2 */
+
+#define  DAC_CR_WAVE1                        ((uint32_t)0x000000C0)        /*!<WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable) */
+#define  DAC_CR_WAVE1_0                      ((uint32_t)0x00000040)        /*!<Bit 0 */
+#define  DAC_CR_WAVE1_1                      ((uint32_t)0x00000080)        /*!<Bit 1 */
+
+#define  DAC_CR_MAMP1                        ((uint32_t)0x00000F00)        /*!<MAMP1[3:0] (DAC channel1 Mask/Amplitude selector) */
+#define  DAC_CR_MAMP1_0                      ((uint32_t)0x00000100)        /*!<Bit 0 */
+#define  DAC_CR_MAMP1_1                      ((uint32_t)0x00000200)        /*!<Bit 1 */
+#define  DAC_CR_MAMP1_2                      ((uint32_t)0x00000400)        /*!<Bit 2 */
+#define  DAC_CR_MAMP1_3                      ((uint32_t)0x00000800)        /*!<Bit 3 */
+
+#define  DAC_CR_DMAEN1                       ((uint32_t)0x00001000)        /*!<DAC channel1 DMA enable */
+#define  DAC_CR_DMAUDRIE1                    ((uint32_t)0x00002000)        /*!<DAC channel1 DMA Interrupt enable */
+#define  DAC_CR_EN2                          ((uint32_t)0x00010000)        /*!<DAC channel2 enable */
+#define  DAC_CR_BOFF2                        ((uint32_t)0x00020000)        /*!<DAC channel2 output buffer disable */
+#define  DAC_CR_TEN2                         ((uint32_t)0x00040000)        /*!<DAC channel2 Trigger enable */
+
+#define  DAC_CR_TSEL2                        ((uint32_t)0x00380000)        /*!<TSEL2[2:0] (DAC channel2 Trigger selection) */
+#define  DAC_CR_TSEL2_0                      ((uint32_t)0x00080000)        /*!<Bit 0 */
+#define  DAC_CR_TSEL2_1                      ((uint32_t)0x00100000)        /*!<Bit 1 */
+#define  DAC_CR_TSEL2_2                      ((uint32_t)0x00200000)        /*!<Bit 2 */
+
+#define  DAC_CR_WAVE2                        ((uint32_t)0x00C00000)        /*!<WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable) */
+#define  DAC_CR_WAVE2_0                      ((uint32_t)0x00400000)        /*!<Bit 0 */
+#define  DAC_CR_WAVE2_1                      ((uint32_t)0x00800000)        /*!<Bit 1 */
+
+#define  DAC_CR_MAMP2                        ((uint32_t)0x0F000000)        /*!<MAMP2[3:0] (DAC channel2 Mask/Amplitude selector) */
+#define  DAC_CR_MAMP2_0                      ((uint32_t)0x01000000)        /*!<Bit 0 */
+#define  DAC_CR_MAMP2_1                      ((uint32_t)0x02000000)        /*!<Bit 1 */
+#define  DAC_CR_MAMP2_2                      ((uint32_t)0x04000000)        /*!<Bit 2 */
+#define  DAC_CR_MAMP2_3                      ((uint32_t)0x08000000)        /*!<Bit 3 */
+
+#define  DAC_CR_DMAEN2                       ((uint32_t)0x10000000)        /*!<DAC channel2 DMA enabled */
+#define  DAC_CR_DMAUDRIE2                    ((uint32_t)0x20000000)        /*!<DAC channel2 DMA underrun interrupt enable */
+/*****************  Bit definition for DAC_SWTRIGR register  ******************/
+#define  DAC_SWTRIGR_SWTRIG1                 ((uint32_t)0x00000001)        /*!<DAC channel1 software trigger */
+#define  DAC_SWTRIGR_SWTRIG2                 ((uint32_t)0x00000002)        /*!<DAC channel2 software trigger */
+
+/*****************  Bit definition for DAC_DHR12R1 register  ******************/
+#define  DAC_DHR12R1_DACC1DHR                ((uint32_t)0x00000FFF)        /*!<DAC channel1 12-bit Right aligned data */
+
+/*****************  Bit definition for DAC_DHR12L1 register  ******************/
+#define  DAC_DHR12L1_DACC1DHR                ((uint32_t)0x0000FFF0)        /*!<DAC channel1 12-bit Left aligned data */
+
+/******************  Bit definition for DAC_DHR8R1 register  ******************/
+#define  DAC_DHR8R1_DACC1DHR                 ((uint32_t)0x000000FF)        /*!<DAC channel1 8-bit Right aligned data */
+
+/*****************  Bit definition for DAC_DHR12R2 register  ******************/
+#define  DAC_DHR12R2_DACC2DHR                ((uint32_t)0x00000FFF)        /*!<DAC channel2 12-bit Right aligned data */
+
+/*****************  Bit definition for DAC_DHR12L2 register  ******************/
+#define  DAC_DHR12L2_DACC2DHR                ((uint32_t)0x0000FFF0)        /*!<DAC channel2 12-bit Left aligned data */
+
+/******************  Bit definition for DAC_DHR8R2 register  ******************/
+#define  DAC_DHR8R2_DACC2DHR                 ((uint32_t)0x000000FF)        /*!<DAC channel2 8-bit Right aligned data */
+
+/*****************  Bit definition for DAC_DHR12RD register  ******************/
+#define  DAC_DHR12RD_DACC1DHR                ((uint32_t)0x00000FFF)        /*!<DAC channel1 12-bit Right aligned data */
+#define  DAC_DHR12RD_DACC2DHR                ((uint32_t)0x0FFF0000)        /*!<DAC channel2 12-bit Right aligned data */
+
+/*****************  Bit definition for DAC_DHR12LD register  ******************/
+#define  DAC_DHR12LD_DACC1DHR                ((uint32_t)0x0000FFF0)        /*!<DAC channel1 12-bit Left aligned data */
+#define  DAC_DHR12LD_DACC2DHR                ((uint32_t)0xFFF00000)        /*!<DAC channel2 12-bit Left aligned data */
+
+/******************  Bit definition for DAC_DHR8RD register  ******************/
+#define  DAC_DHR8RD_DACC1DHR                 ((uint32_t)0x000000FF)        /*!<DAC channel1 8-bit Right aligned data */
+#define  DAC_DHR8RD_DACC2DHR                 ((uint32_t)0x0000FF00)        /*!<DAC channel2 8-bit Right aligned data */
+
+/*******************  Bit definition for DAC_DOR1 register  *******************/
+#define  DAC_DOR1_DACC1DOR                   ((uint32_t)0x00000FFF)        /*!<DAC channel1 data output */
+
+/*******************  Bit definition for DAC_DOR2 register  *******************/
+#define  DAC_DOR2_DACC2DOR                   ((uint_t)0x00000FFF)          /*!<DAC channel2 data output */
+
+/********************  Bit definition for DAC_SR register  ********************/
+#define  DAC_SR_DMAUDR1                      ((uint32_t)0x00002000)        /*!<DAC channel1 DMA underrun flag */
+#define  DAC_SR_DMAUDR2                      ((uint32_t)0x20000000)        /*!<DAC channel2 DMA underrun flag */
+
+/******************************************************************************/
+/*                                                                            */
+/*                           Debug MCU (DBGMCU)                               */
+/*                                                                            */
+/******************************************************************************/
+
+/****************  Bit definition for DBGMCU_IDCODE register  *****************/
+#define  DBGMCU_IDCODE_DEV_ID                ((uint32_t)0x00000FFF)        /*!< Device Identifier */
+
+#define  DBGMCU_IDCODE_REV_ID                ((uint32_t)0xFFFF0000)        /*!< REV_ID[15:0] bits (Revision Identifier) */
+#define  DBGMCU_IDCODE_REV_ID_0              ((uint32_t)0x00010000)        /*!< Bit 0 */
+#define  DBGMCU_IDCODE_REV_ID_1              ((uint32_t)0x00020000)        /*!< Bit 1 */
+#define  DBGMCU_IDCODE_REV_ID_2              ((uint32_t)0x00040000)        /*!< Bit 2 */
+#define  DBGMCU_IDCODE_REV_ID_3              ((uint32_t)0x00080000)        /*!< Bit 3 */
+#define  DBGMCU_IDCODE_REV_ID_4              ((uint32_t)0x00100000)        /*!< Bit 4 */
+#define  DBGMCU_IDCODE_REV_ID_5              ((uint32_t)0x00200000)        /*!< Bit 5 */
+#define  DBGMCU_IDCODE_REV_ID_6              ((uint32_t)0x00400000)        /*!< Bit 6 */
+#define  DBGMCU_IDCODE_REV_ID_7              ((uint32_t)0x00800000)        /*!< Bit 7 */
+#define  DBGMCU_IDCODE_REV_ID_8              ((uint32_t)0x01000000)        /*!< Bit 8 */
+#define  DBGMCU_IDCODE_REV_ID_9              ((uint32_t)0x02000000)        /*!< Bit 9 */
+#define  DBGMCU_IDCODE_REV_ID_10             ((uint32_t)0x04000000)        /*!< Bit 10 */
+#define  DBGMCU_IDCODE_REV_ID_11             ((uint32_t)0x08000000)        /*!< Bit 11 */
+#define  DBGMCU_IDCODE_REV_ID_12             ((uint32_t)0x10000000)        /*!< Bit 12 */
+#define  DBGMCU_IDCODE_REV_ID_13             ((uint32_t)0x20000000)        /*!< Bit 13 */
+#define  DBGMCU_IDCODE_REV_ID_14             ((uint32_t)0x40000000)        /*!< Bit 14 */
+#define  DBGMCU_IDCODE_REV_ID_15             ((uint32_t)0x80000000)        /*!< Bit 15 */
+
+/******************  Bit definition for DBGMCU_CR register  *******************/
+#define  DBGMCU_CR_DBG_SLEEP                 ((uint32_t)0x00000001)        /*!< Debug Sleep Mode */
+#define  DBGMCU_CR_DBG_STOP                  ((uint32_t)0x00000002)        /*!< Debug Stop Mode */
+#define  DBGMCU_CR_DBG_STANDBY               ((uint32_t)0x00000004)        /*!< Debug Standby mode */
+#define  DBGMCU_CR_TRACE_IOEN                ((uint32_t)0x00000020)        /*!< Trace Pin Assignment Control */
+
+#define  DBGMCU_CR_TRACE_MODE                ((uint32_t)0x000000C0)        /*!< TRACE_MODE[1:0] bits (Trace Pin Assignment Control) */
+#define  DBGMCU_CR_TRACE_MODE_0              ((uint32_t)0x00000040)        /*!< Bit 0 */
+#define  DBGMCU_CR_TRACE_MODE_1              ((uint32_t)0x00000080)        /*!< Bit 1 */
+
+/******************  Bit definition for DBGMCU_APB1_FZ register  **************/
+
+#define  DBGMCU_APB1_FZ_DBG_TIM2_STOP             ((uint32_t)0x00000001)   /*!< TIM2 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_TIM3_STOP             ((uint32_t)0x00000002)   /*!< TIM3 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_TIM4_STOP             ((uint32_t)0x00000004)   /*!< TIM4 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_TIM5_STOP             ((uint32_t)0x00000008)   /*!< TIM5 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_TIM6_STOP             ((uint32_t)0x00000010)   /*!< TIM6 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_TIM7_STOP             ((uint32_t)0x00000020)   /*!< TIM7 counter stopped when core is halted */
+#define  DBGMCU_APB1_FZ_DBG_RTC_STOP              ((uint32_t)0x00000400)   /*!< RTC Counter stopped when Core is halted */
+#define  DBGMCU_APB1_FZ_DBG_WWDG_STOP             ((uint32_t)0x00000800)   /*!< Debug Window Watchdog stopped when Core is halted */
+#define  DBGMCU_APB1_FZ_DBG_IWDG_STOP             ((uint32_t)0x00001000)   /*!< Debug Independent Watchdog stopped when Core is halted */
+#define  DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT    ((uint32_t)0x00200000)   /*!< SMBUS timeout mode stopped when Core is halted */
+#define  DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT    ((uint32_t)0x00400000)   /*!< SMBUS timeout mode stopped when Core is halted */
+
+/******************  Bit definition for DBGMCU_APB2_FZ register  **************/
+
+#define  DBGMCU_APB2_FZ_DBG_TIM9_STOP             ((uint32_t)0x00000004)   /*!< TIM9 counter stopped when core is halted */
+#define  DBGMCU_APB2_FZ_DBG_TIM10_STOP            ((uint32_t)0x00000008)   /*!< TIM10 counter stopped when core is halted */
+#define  DBGMCU_APB2_FZ_DBG_TIM11_STOP            ((uint32_t)0x00000010)   /*!< TIM11 counter stopped when core is halted */
+
+/******************************************************************************/
+/*                                                                            */
+/*                           DMA Controller (DMA)                             */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for DMA_ISR register  ********************/
+#define  DMA_ISR_GIF1                        ((uint32_t)0x00000001)        /*!< Channel 1 Global interrupt flag */
+#define  DMA_ISR_TCIF1                       ((uint32_t)0x00000002)        /*!< Channel 1 Transfer Complete flag */
+#define  DMA_ISR_HTIF1                       ((uint32_t)0x00000004)        /*!< Channel 1 Half Transfer flag */
+#define  DMA_ISR_TEIF1                       ((uint32_t)0x00000008)        /*!< Channel 1 Transfer Error flag */
+#define  DMA_ISR_GIF2                        ((uint32_t)0x00000010)        /*!< Channel 2 Global interrupt flag */
+#define  DMA_ISR_TCIF2                       ((uint32_t)0x00000020)        /*!< Channel 2 Transfer Complete flag */
+#define  DMA_ISR_HTIF2                       ((uint32_t)0x00000040)        /*!< Channel 2 Half Transfer flag */
+#define  DMA_ISR_TEIF2                       ((uint32_t)0x00000080)        /*!< Channel 2 Transfer Error flag */
+#define  DMA_ISR_GIF3                        ((uint32_t)0x00000100)        /*!< Channel 3 Global interrupt flag */
+#define  DMA_ISR_TCIF3                       ((uint32_t)0x00000200)        /*!< Channel 3 Transfer Complete flag */
+#define  DMA_ISR_HTIF3                       ((uint32_t)0x00000400)        /*!< Channel 3 Half Transfer flag */
+#define  DMA_ISR_TEIF3                       ((uint32_t)0x00000800)        /*!< Channel 3 Transfer Error flag */
+#define  DMA_ISR_GIF4                        ((uint32_t)0x00001000)        /*!< Channel 4 Global interrupt flag */
+#define  DMA_ISR_TCIF4                       ((uint32_t)0x00002000)        /*!< Channel 4 Transfer Complete flag */
+#define  DMA_ISR_HTIF4                       ((uint32_t)0x00004000)        /*!< Channel 4 Half Transfer flag */
+#define  DMA_ISR_TEIF4                       ((uint32_t)0x00008000)        /*!< Channel 4 Transfer Error flag */
+#define  DMA_ISR_GIF5                        ((uint32_t)0x00010000)        /*!< Channel 5 Global interrupt flag */
+#define  DMA_ISR_TCIF5                       ((uint32_t)0x00020000)        /*!< Channel 5 Transfer Complete flag */
+#define  DMA_ISR_HTIF5                       ((uint32_t)0x00040000)        /*!< Channel 5 Half Transfer flag */
+#define  DMA_ISR_TEIF5                       ((uint32_t)0x00080000)        /*!< Channel 5 Transfer Error flag */
+#define  DMA_ISR_GIF6                        ((uint32_t)0x00100000)        /*!< Channel 6 Global interrupt flag */
+#define  DMA_ISR_TCIF6                       ((uint32_t)0x00200000)        /*!< Channel 6 Transfer Complete flag */
+#define  DMA_ISR_HTIF6                       ((uint32_t)0x00400000)        /*!< Channel 6 Half Transfer flag */
+#define  DMA_ISR_TEIF6                       ((uint32_t)0x00800000)        /*!< Channel 6 Transfer Error flag */
+#define  DMA_ISR_GIF7                        ((uint32_t)0x01000000)        /*!< Channel 7 Global interrupt flag */
+#define  DMA_ISR_TCIF7                       ((uint32_t)0x02000000)        /*!< Channel 7 Transfer Complete flag */
+#define  DMA_ISR_HTIF7                       ((uint32_t)0x04000000)        /*!< Channel 7 Half Transfer flag */
+#define  DMA_ISR_TEIF7                       ((uint32_t)0x08000000)        /*!< Channel 7 Transfer Error flag */
+
+/*******************  Bit definition for DMA_IFCR register  *******************/
+#define  DMA_IFCR_CGIF1                      ((uint32_t)0x00000001)        /*!< Channel 1 Global interrupt clear */
+#define  DMA_IFCR_CTCIF1                     ((uint32_t)0x00000002)        /*!< Channel 1 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF1                     ((uint32_t)0x00000004)        /*!< Channel 1 Half Transfer clear */
+#define  DMA_IFCR_CTEIF1                     ((uint32_t)0x00000008)        /*!< Channel 1 Transfer Error clear */
+#define  DMA_IFCR_CGIF2                      ((uint32_t)0x00000010)        /*!< Channel 2 Global interrupt clear */
+#define  DMA_IFCR_CTCIF2                     ((uint32_t)0x00000020)        /*!< Channel 2 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF2                     ((uint32_t)0x00000040)        /*!< Channel 2 Half Transfer clear */
+#define  DMA_IFCR_CTEIF2                     ((uint32_t)0x00000080)        /*!< Channel 2 Transfer Error clear */
+#define  DMA_IFCR_CGIF3                      ((uint32_t)0x00000100)        /*!< Channel 3 Global interrupt clear */
+#define  DMA_IFCR_CTCIF3                     ((uint32_t)0x00000200)        /*!< Channel 3 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF3                     ((uint32_t)0x00000400)        /*!< Channel 3 Half Transfer clear */
+#define  DMA_IFCR_CTEIF3                     ((uint32_t)0x00000800)        /*!< Channel 3 Transfer Error clear */
+#define  DMA_IFCR_CGIF4                      ((uint32_t)0x00001000)        /*!< Channel 4 Global interrupt clear */
+#define  DMA_IFCR_CTCIF4                     ((uint32_t)0x00002000)        /*!< Channel 4 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF4                     ((uint32_t)0x00004000)        /*!< Channel 4 Half Transfer clear */
+#define  DMA_IFCR_CTEIF4                     ((uint32_t)0x00008000)        /*!< Channel 4 Transfer Error clear */
+#define  DMA_IFCR_CGIF5                      ((uint32_t)0x00010000)        /*!< Channel 5 Global interrupt clear */
+#define  DMA_IFCR_CTCIF5                     ((uint32_t)0x00020000)        /*!< Channel 5 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF5                     ((uint32_t)0x00040000)        /*!< Channel 5 Half Transfer clear */
+#define  DMA_IFCR_CTEIF5                     ((uint32_t)0x00080000)        /*!< Channel 5 Transfer Error clear */
+#define  DMA_IFCR_CGIF6                      ((uint32_t)0x00100000)        /*!< Channel 6 Global interrupt clear */
+#define  DMA_IFCR_CTCIF6                     ((uint32_t)0x00200000)        /*!< Channel 6 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF6                     ((uint32_t)0x00400000)        /*!< Channel 6 Half Transfer clear */
+#define  DMA_IFCR_CTEIF6                     ((uint32_t)0x00800000)        /*!< Channel 6 Transfer Error clear */
+#define  DMA_IFCR_CGIF7                      ((uint32_t)0x01000000)        /*!< Channel 7 Global interrupt clear */
+#define  DMA_IFCR_CTCIF7                     ((uint32_t)0x02000000)        /*!< Channel 7 Transfer Complete clear */
+#define  DMA_IFCR_CHTIF7                     ((uint32_t)0x04000000)        /*!< Channel 7 Half Transfer clear */
+#define  DMA_IFCR_CTEIF7                     ((uint32_t)0x08000000)        /*!< Channel 7 Transfer Error clear */
+
+/*******************  Bit definition for DMA_CCR register  *******************/
+#define  DMA_CCR_EN                         ((uint32_t)0x00000001)            /*!< Channel enable*/
+#define  DMA_CCR_TCIE                       ((uint32_t)0x00000002)            /*!< Transfer complete interrupt enable */
+#define  DMA_CCR_HTIE                       ((uint32_t)0x00000004)            /*!< Half Transfer interrupt enable */
+#define  DMA_CCR_TEIE                       ((uint32_t)0x00000008)            /*!< Transfer error interrupt enable */
+#define  DMA_CCR_DIR                        ((uint32_t)0x00000010)            /*!< Data transfer direction */
+#define  DMA_CCR_CIRC                       ((uint32_t)0x00000020)            /*!< Circular mode */
+#define  DMA_CCR_PINC                       ((uint32_t)0x00000040)            /*!< Peripheral increment mode */
+#define  DMA_CCR_MINC                       ((uint32_t)0x00000080)            /*!< Memory increment mode */
+
+#define  DMA_CCR_PSIZE                      ((uint32_t)0x00000300)            /*!< PSIZE[1:0] bits (Peripheral size) */
+#define  DMA_CCR_PSIZE_0                    ((uint32_t)0x00000100)            /*!< Bit 0 */
+#define  DMA_CCR_PSIZE_1                    ((uint32_t)0x00000200)            /*!< Bit 1 */
+
+#define  DMA_CCR_MSIZE                      ((uint32_t)0x00000C00)            /*!< MSIZE[1:0] bits (Memory size) */
+#define  DMA_CCR_MSIZE_0                    ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  DMA_CCR_MSIZE_1                    ((uint32_t)0x00000800)            /*!< Bit 1 */
+
+#define  DMA_CCR_PL                         ((uint32_t)0x00003000)            /*!< PL[1:0] bits(Channel Priority level) */
+#define  DMA_CCR_PL_0                       ((uint32_t)0x00001000)            /*!< Bit 0 */
+#define  DMA_CCR_PL_1                       ((uint32_t)0x00002000)            /*!< Bit 1 */
+
+#define  DMA_CCR_MEM2MEM                    ((uint32_t)0x00004000)            /*!< Memory to memory mode */
+
+/******************  Bit definition for DMA_CNDTR1 register  ******************/
+#define  DMA_CNDTR1_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR2 register  ******************/
+#define  DMA_CNDTR2_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR3 register  ******************/
+#define  DMA_CNDTR3_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR4 register  ******************/
+#define  DMA_CNDTR4_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR5 register  ******************/
+#define  DMA_CNDTR5_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR6 register  ******************/
+#define  DMA_CNDTR6_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CNDTR7 register  ******************/
+#define  DMA_CNDTR7_NDT                      ((uint32_t)0x0000FFFF)            /*!< Number of data to Transfer */
+
+/******************  Bit definition for DMA_CPAR1 register  *******************/
+#define  DMA_CPAR1_PA                        ((uint32_t)0xFFFFFFFF)            /*!< Peripheral Address */
+
+/******************  Bit definition for DMA_CPAR2 register  *******************/
+#define  DMA_CPAR2_PA                        ((uint32_t)0xFFFFFFFF)            /*!< Peripheral Address */
+
+/******************  Bit definition for DMA_CPAR3 register  *******************/
+#define  DMA_CPAR3_PA                        ((uint32_t)0xFFFFFFFF)        /*!< Peripheral Address */
+
+
+/******************  Bit definition for DMA_CPAR4 register  *******************/
+#define  DMA_CPAR4_PA                        ((uint32_t)0xFFFFFFFF)        /*!< Peripheral Address */
+
+/******************  Bit definition for DMA_CPAR5 register  *******************/
+#define  DMA_CPAR5_PA                        ((uint32_t)0xFFFFFFFF)        /*!< Peripheral Address */
+
+/******************  Bit definition for DMA_CPAR6 register  *******************/
+#define  DMA_CPAR6_PA                        ((uint32_t)0xFFFFFFFF)        /*!< Peripheral Address */
+
+
+/******************  Bit definition for DMA_CPAR7 register  *******************/
+#define  DMA_CPAR7_PA                        ((uint32_t)0xFFFFFFFF)        /*!< Peripheral Address */
+
+/******************  Bit definition for DMA_CMAR1 register  *******************/
+#define  DMA_CMAR1_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************  Bit definition for DMA_CMAR2 register  *******************/
+#define  DMA_CMAR2_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************  Bit definition for DMA_CMAR3 register  *******************/
+#define  DMA_CMAR3_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+
+/******************  Bit definition for DMA_CMAR4 register  *******************/
+#define  DMA_CMAR4_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************  Bit definition for DMA_CMAR5 register  *******************/
+#define  DMA_CMAR5_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************  Bit definition for DMA_CMAR6 register  *******************/
+#define  DMA_CMAR6_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************  Bit definition for DMA_CMAR7 register  *******************/
+#define  DMA_CMAR7_MA                        ((uint32_t)0xFFFFFFFF)        /*!< Memory Address */
+
+/******************************************************************************/
+/*                                                                            */
+/*                  External Interrupt/Event Controller (EXTI)                */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for EXTI_IMR register  *******************/
+#define  EXTI_IMR_MR0                        ((uint32_t)0x00000001)        /*!< Interrupt Mask on line 0 */
+#define  EXTI_IMR_MR1                        ((uint32_t)0x00000002)        /*!< Interrupt Mask on line 1 */
+#define  EXTI_IMR_MR2                        ((uint32_t)0x00000004)        /*!< Interrupt Mask on line 2 */
+#define  EXTI_IMR_MR3                        ((uint32_t)0x00000008)        /*!< Interrupt Mask on line 3 */
+#define  EXTI_IMR_MR4                        ((uint32_t)0x00000010)        /*!< Interrupt Mask on line 4 */
+#define  EXTI_IMR_MR5                        ((uint32_t)0x00000020)        /*!< Interrupt Mask on line 5 */
+#define  EXTI_IMR_MR6                        ((uint32_t)0x00000040)        /*!< Interrupt Mask on line 6 */
+#define  EXTI_IMR_MR7                        ((uint32_t)0x00000080)        /*!< Interrupt Mask on line 7 */
+#define  EXTI_IMR_MR8                        ((uint32_t)0x00000100)        /*!< Interrupt Mask on line 8 */
+#define  EXTI_IMR_MR9                        ((uint32_t)0x00000200)        /*!< Interrupt Mask on line 9 */
+#define  EXTI_IMR_MR10                       ((uint32_t)0x00000400)        /*!< Interrupt Mask on line 10 */
+#define  EXTI_IMR_MR11                       ((uint32_t)0x00000800)        /*!< Interrupt Mask on line 11 */
+#define  EXTI_IMR_MR12                       ((uint32_t)0x00001000)        /*!< Interrupt Mask on line 12 */
+#define  EXTI_IMR_MR13                       ((uint32_t)0x00002000)        /*!< Interrupt Mask on line 13 */
+#define  EXTI_IMR_MR14                       ((uint32_t)0x00004000)        /*!< Interrupt Mask on line 14 */
+#define  EXTI_IMR_MR15                       ((uint32_t)0x00008000)        /*!< Interrupt Mask on line 15 */
+#define  EXTI_IMR_MR16                       ((uint32_t)0x00010000)        /*!< Interrupt Mask on line 16 */
+#define  EXTI_IMR_MR17                       ((uint32_t)0x00020000)        /*!< Interrupt Mask on line 17 */
+#define  EXTI_IMR_MR18                       ((uint32_t)0x00040000)        /*!< Interrupt Mask on line 18 */
+#define  EXTI_IMR_MR19                       ((uint32_t)0x00080000)        /*!< Interrupt Mask on line 19 */
+#define  EXTI_IMR_MR20                       ((uint32_t)0x00100000)        /*!< Interrupt Mask on line 20 */
+#define  EXTI_IMR_MR21                       ((uint32_t)0x00200000)        /*!< Interrupt Mask on line 21 */
+#define  EXTI_IMR_MR22                       ((uint32_t)0x00400000)        /*!< Interrupt Mask on line 22 */
+#define  EXTI_IMR_MR23                       ((uint32_t)0x00800000)        /*!< Interrupt Mask on line 23 */
+
+/*******************  Bit definition for EXTI_EMR register  *******************/
+#define  EXTI_EMR_MR0                        ((uint32_t)0x00000001)        /*!< Event Mask on line 0 */
+#define  EXTI_EMR_MR1                        ((uint32_t)0x00000002)        /*!< Event Mask on line 1 */
+#define  EXTI_EMR_MR2                        ((uint32_t)0x00000004)        /*!< Event Mask on line 2 */
+#define  EXTI_EMR_MR3                        ((uint32_t)0x00000008)        /*!< Event Mask on line 3 */
+#define  EXTI_EMR_MR4                        ((uint32_t)0x00000010)        /*!< Event Mask on line 4 */
+#define  EXTI_EMR_MR5                        ((uint32_t)0x00000020)        /*!< Event Mask on line 5 */
+#define  EXTI_EMR_MR6                        ((uint32_t)0x00000040)        /*!< Event Mask on line 6 */
+#define  EXTI_EMR_MR7                        ((uint32_t)0x00000080)        /*!< Event Mask on line 7 */
+#define  EXTI_EMR_MR8                        ((uint32_t)0x00000100)        /*!< Event Mask on line 8 */
+#define  EXTI_EMR_MR9                        ((uint32_t)0x00000200)        /*!< Event Mask on line 9 */
+#define  EXTI_EMR_MR10                       ((uint32_t)0x00000400)        /*!< Event Mask on line 10 */
+#define  EXTI_EMR_MR11                       ((uint32_t)0x00000800)        /*!< Event Mask on line 11 */
+#define  EXTI_EMR_MR12                       ((uint32_t)0x00001000)        /*!< Event Mask on line 12 */
+#define  EXTI_EMR_MR13                       ((uint32_t)0x00002000)        /*!< Event Mask on line 13 */
+#define  EXTI_EMR_MR14                       ((uint32_t)0x00004000)        /*!< Event Mask on line 14 */
+#define  EXTI_EMR_MR15                       ((uint32_t)0x00008000)        /*!< Event Mask on line 15 */
+#define  EXTI_EMR_MR16                       ((uint32_t)0x00010000)        /*!< Event Mask on line 16 */
+#define  EXTI_EMR_MR17                       ((uint32_t)0x00020000)        /*!< Event Mask on line 17 */
+#define  EXTI_EMR_MR18                       ((uint32_t)0x00040000)        /*!< Event Mask on line 18 */
+#define  EXTI_EMR_MR19                       ((uint32_t)0x00080000)        /*!< Event Mask on line 19 */
+#define  EXTI_EMR_MR20                       ((uint32_t)0x00100000)        /*!< Event Mask on line 20 */
+#define  EXTI_EMR_MR21                       ((uint32_t)0x00200000)        /*!< Event Mask on line 21 */
+#define  EXTI_EMR_MR22                       ((uint32_t)0x00400000)        /*!< Event Mask on line 22 */
+#define  EXTI_EMR_MR23                       ((uint32_t)0x00800000)        /*!< Event Mask on line 23 */
+
+/******************  Bit definition for EXTI_RTSR register  *******************/
+#define  EXTI_RTSR_TR0                       ((uint32_t)0x00000001)        /*!< Rising trigger event configuration bit of line 0 */
+#define  EXTI_RTSR_TR1                       ((uint32_t)0x00000002)        /*!< Rising trigger event configuration bit of line 1 */
+#define  EXTI_RTSR_TR2                       ((uint32_t)0x00000004)        /*!< Rising trigger event configuration bit of line 2 */
+#define  EXTI_RTSR_TR3                       ((uint32_t)0x00000008)        /*!< Rising trigger event configuration bit of line 3 */
+#define  EXTI_RTSR_TR4                       ((uint32_t)0x00000010)        /*!< Rising trigger event configuration bit of line 4 */
+#define  EXTI_RTSR_TR5                       ((uint32_t)0x00000020)        /*!< Rising trigger event configuration bit of line 5 */
+#define  EXTI_RTSR_TR6                       ((uint32_t)0x00000040)        /*!< Rising trigger event configuration bit of line 6 */
+#define  EXTI_RTSR_TR7                       ((uint32_t)0x00000080)        /*!< Rising trigger event configuration bit of line 7 */
+#define  EXTI_RTSR_TR8                       ((uint32_t)0x00000100)        /*!< Rising trigger event configuration bit of line 8 */
+#define  EXTI_RTSR_TR9                       ((uint32_t)0x00000200)        /*!< Rising trigger event configuration bit of line 9 */
+#define  EXTI_RTSR_TR10                      ((uint32_t)0x00000400)        /*!< Rising trigger event configuration bit of line 10 */
+#define  EXTI_RTSR_TR11                      ((uint32_t)0x00000800)        /*!< Rising trigger event configuration bit of line 11 */
+#define  EXTI_RTSR_TR12                      ((uint32_t)0x00001000)        /*!< Rising trigger event configuration bit of line 12 */
+#define  EXTI_RTSR_TR13                      ((uint32_t)0x00002000)        /*!< Rising trigger event configuration bit of line 13 */
+#define  EXTI_RTSR_TR14                      ((uint32_t)0x00004000)        /*!< Rising trigger event configuration bit of line 14 */
+#define  EXTI_RTSR_TR15                      ((uint32_t)0x00008000)        /*!< Rising trigger event configuration bit of line 15 */
+#define  EXTI_RTSR_TR16                      ((uint32_t)0x00010000)        /*!< Rising trigger event configuration bit of line 16 */
+#define  EXTI_RTSR_TR17                      ((uint32_t)0x00020000)        /*!< Rising trigger event configuration bit of line 17 */
+#define  EXTI_RTSR_TR18                      ((uint32_t)0x00040000)        /*!< Rising trigger event configuration bit of line 18 */
+#define  EXTI_RTSR_TR19                      ((uint32_t)0x00080000)        /*!< Rising trigger event configuration bit of line 19 */
+#define  EXTI_RTSR_TR20                      ((uint32_t)0x00100000)        /*!< Rising trigger event configuration bit of line 20 */
+#define  EXTI_RTSR_TR21                      ((uint32_t)0x00200000)        /*!< Rising trigger event configuration bit of line 21 */
+#define  EXTI_RTSR_TR22                      ((uint32_t)0x00400000)        /*!< Rising trigger event configuration bit of line 22 */
+#define  EXTI_RTSR_TR23                      ((uint32_t)0x00800000)        /*!< Rising trigger event configuration bit of line 23 */
+
+/******************  Bit definition for EXTI_FTSR register  *******************/
+#define  EXTI_FTSR_TR0                       ((uint32_t)0x00000001)        /*!< Falling trigger event configuration bit of line 0 */
+#define  EXTI_FTSR_TR1                       ((uint32_t)0x00000002)        /*!< Falling trigger event configuration bit of line 1 */
+#define  EXTI_FTSR_TR2                       ((uint32_t)0x00000004)        /*!< Falling trigger event configuration bit of line 2 */
+#define  EXTI_FTSR_TR3                       ((uint32_t)0x00000008)        /*!< Falling trigger event configuration bit of line 3 */
+#define  EXTI_FTSR_TR4                       ((uint32_t)0x00000010)        /*!< Falling trigger event configuration bit of line 4 */
+#define  EXTI_FTSR_TR5                       ((uint32_t)0x00000020)        /*!< Falling trigger event configuration bit of line 5 */
+#define  EXTI_FTSR_TR6                       ((uint32_t)0x00000040)        /*!< Falling trigger event configuration bit of line 6 */
+#define  EXTI_FTSR_TR7                       ((uint32_t)0x00000080)        /*!< Falling trigger event configuration bit of line 7 */
+#define  EXTI_FTSR_TR8                       ((uint32_t)0x00000100)        /*!< Falling trigger event configuration bit of line 8 */
+#define  EXTI_FTSR_TR9                       ((uint32_t)0x00000200)        /*!< Falling trigger event configuration bit of line 9 */
+#define  EXTI_FTSR_TR10                      ((uint32_t)0x00000400)        /*!< Falling trigger event configuration bit of line 10 */
+#define  EXTI_FTSR_TR11                      ((uint32_t)0x00000800)        /*!< Falling trigger event configuration bit of line 11 */
+#define  EXTI_FTSR_TR12                      ((uint32_t)0x00001000)        /*!< Falling trigger event configuration bit of line 12 */
+#define  EXTI_FTSR_TR13                      ((uint32_t)0x00002000)        /*!< Falling trigger event configuration bit of line 13 */
+#define  EXTI_FTSR_TR14                      ((uint32_t)0x00004000)        /*!< Falling trigger event configuration bit of line 14 */
+#define  EXTI_FTSR_TR15                      ((uint32_t)0x00008000)        /*!< Falling trigger event configuration bit of line 15 */
+#define  EXTI_FTSR_TR16                      ((uint32_t)0x00010000)        /*!< Falling trigger event configuration bit of line 16 */
+#define  EXTI_FTSR_TR17                      ((uint32_t)0x00020000)        /*!< Falling trigger event configuration bit of line 17 */
+#define  EXTI_FTSR_TR18                      ((uint32_t)0x00040000)        /*!< Falling trigger event configuration bit of line 18 */
+#define  EXTI_FTSR_TR19                      ((uint32_t)0x00080000)        /*!< Falling trigger event configuration bit of line 19 */
+#define  EXTI_FTSR_TR20                      ((uint32_t)0x00100000)        /*!< Falling trigger event configuration bit of line 20 */
+#define  EXTI_FTSR_TR21                      ((uint32_t)0x00200000)        /*!< Falling trigger event configuration bit of line 21 */
+#define  EXTI_FTSR_TR22                      ((uint32_t)0x00400000)        /*!< Falling trigger event configuration bit of line 22 */
+#define  EXTI_FTSR_TR23                      ((uint32_t)0x00800000)        /*!< Falling trigger event configuration bit of line 23 */
+
+/******************  Bit definition for EXTI_SWIER register  ******************/
+#define  EXTI_SWIER_SWIER0                   ((uint32_t)0x00000001)        /*!< Software Interrupt on line 0 */
+#define  EXTI_SWIER_SWIER1                   ((uint32_t)0x00000002)        /*!< Software Interrupt on line 1 */
+#define  EXTI_SWIER_SWIER2                   ((uint32_t)0x00000004)        /*!< Software Interrupt on line 2 */
+#define  EXTI_SWIER_SWIER3                   ((uint32_t)0x00000008)        /*!< Software Interrupt on line 3 */
+#define  EXTI_SWIER_SWIER4                   ((uint32_t)0x00000010)        /*!< Software Interrupt on line 4 */
+#define  EXTI_SWIER_SWIER5                   ((uint32_t)0x00000020)        /*!< Software Interrupt on line 5 */
+#define  EXTI_SWIER_SWIER6                   ((uint32_t)0x00000040)        /*!< Software Interrupt on line 6 */
+#define  EXTI_SWIER_SWIER7                   ((uint32_t)0x00000080)        /*!< Software Interrupt on line 7 */
+#define  EXTI_SWIER_SWIER8                   ((uint32_t)0x00000100)        /*!< Software Interrupt on line 8 */
+#define  EXTI_SWIER_SWIER9                   ((uint32_t)0x00000200)        /*!< Software Interrupt on line 9 */
+#define  EXTI_SWIER_SWIER10                  ((uint32_t)0x00000400)        /*!< Software Interrupt on line 10 */
+#define  EXTI_SWIER_SWIER11                  ((uint32_t)0x00000800)        /*!< Software Interrupt on line 11 */
+#define  EXTI_SWIER_SWIER12                  ((uint32_t)0x00001000)        /*!< Software Interrupt on line 12 */
+#define  EXTI_SWIER_SWIER13                  ((uint32_t)0x00002000)        /*!< Software Interrupt on line 13 */
+#define  EXTI_SWIER_SWIER14                  ((uint32_t)0x00004000)        /*!< Software Interrupt on line 14 */
+#define  EXTI_SWIER_SWIER15                  ((uint32_t)0x00008000)        /*!< Software Interrupt on line 15 */
+#define  EXTI_SWIER_SWIER16                  ((uint32_t)0x00010000)        /*!< Software Interrupt on line 16 */
+#define  EXTI_SWIER_SWIER17                  ((uint32_t)0x00020000)        /*!< Software Interrupt on line 17 */
+#define  EXTI_SWIER_SWIER18                  ((uint32_t)0x00040000)        /*!< Software Interrupt on line 18 */
+#define  EXTI_SWIER_SWIER19                  ((uint32_t)0x00080000)        /*!< Software Interrupt on line 19 */
+#define  EXTI_SWIER_SWIER20                  ((uint32_t)0x00100000)        /*!< Software Interrupt on line 20 */
+#define  EXTI_SWIER_SWIER21                  ((uint32_t)0x00200000)        /*!< Software Interrupt on line 21 */
+#define  EXTI_SWIER_SWIER22                  ((uint32_t)0x00400000)        /*!< Software Interrupt on line 22 */
+#define  EXTI_SWIER_SWIER23                  ((uint32_t)0x00800000)        /*!< Software Interrupt on line 23 */
+
+/*******************  Bit definition for EXTI_PR register  ********************/
+#define  EXTI_PR_PR0                         ((uint32_t)0x00000001)        /*!< Pending bit 0 */
+#define  EXTI_PR_PR1                         ((uint32_t)0x00000002)        /*!< Pending bit 1 */
+#define  EXTI_PR_PR2                         ((uint32_t)0x00000004)        /*!< Pending bit 2 */
+#define  EXTI_PR_PR3                         ((uint32_t)0x00000008)        /*!< Pending bit 3 */
+#define  EXTI_PR_PR4                         ((uint32_t)0x00000010)        /*!< Pending bit 4 */
+#define  EXTI_PR_PR5                         ((uint32_t)0x00000020)        /*!< Pending bit 5 */
+#define  EXTI_PR_PR6                         ((uint32_t)0x00000040)        /*!< Pending bit 6 */
+#define  EXTI_PR_PR7                         ((uint32_t)0x00000080)        /*!< Pending bit 7 */
+#define  EXTI_PR_PR8                         ((uint32_t)0x00000100)        /*!< Pending bit 8 */
+#define  EXTI_PR_PR9                         ((uint32_t)0x00000200)        /*!< Pending bit 9 */
+#define  EXTI_PR_PR10                        ((uint32_t)0x00000400)        /*!< Pending bit 10 */
+#define  EXTI_PR_PR11                        ((uint32_t)0x00000800)        /*!< Pending bit 11 */
+#define  EXTI_PR_PR12                        ((uint32_t)0x00001000)        /*!< Pending bit 12 */
+#define  EXTI_PR_PR13                        ((uint32_t)0x00002000)        /*!< Pending bit 13 */
+#define  EXTI_PR_PR14                        ((uint32_t)0x00004000)        /*!< Pending bit 14 */
+#define  EXTI_PR_PR15                        ((uint32_t)0x00008000)        /*!< Pending bit 15 */
+#define  EXTI_PR_PR16                        ((uint32_t)0x00010000)        /*!< Pending bit 16 */
+#define  EXTI_PR_PR17                        ((uint32_t)0x00020000)        /*!< Pending bit 17 */
+#define  EXTI_PR_PR18                        ((uint32_t)0x00040000)        /*!< Pending bit 18 */
+#define  EXTI_PR_PR19                        ((uint32_t)0x00080000)        /*!< Pending bit 19 */
+#define  EXTI_PR_PR20                        ((uint32_t)0x00100000)        /*!< Pending bit 20 */
+#define  EXTI_PR_PR21                        ((uint32_t)0x00200000)        /*!< Pending bit 21 */
+#define  EXTI_PR_PR22                        ((uint32_t)0x00400000)        /*!< Pending bit 22 */
+#define  EXTI_PR_PR23                        ((uint32_t)0x00800000)        /*!< Pending bit 23 */
+
+/******************************************************************************/
+/*                                                                            */
+/*                FLASH, DATA EEPROM and Option Bytes Registers               */
+/*                        (FLASH, DATA_EEPROM, OB)                            */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for FLASH_ACR register  ******************/
+#define  FLASH_ACR_LATENCY                   ((uint32_t)0x00000001)        /*!< Latency */
+#define  FLASH_ACR_PRFTEN                    ((uint32_t)0x00000002)        /*!< Prefetch Buffer Enable */
+#define  FLASH_ACR_ACC64                     ((uint32_t)0x00000004)        /*!< Access 64 bits */
+#define  FLASH_ACR_SLEEP_PD                  ((uint32_t)0x00000008)        /*!< Flash mode during sleep mode */
+#define  FLASH_ACR_RUN_PD                    ((uint32_t)0x00000010)        /*!< Flash mode during RUN mode */
+
+/*******************  Bit definition for FLASH_PECR register  ******************/
+#define FLASH_PECR_PELOCK                    ((uint32_t)0x00000001)        /*!< FLASH_PECR and Flash data Lock */
+#define FLASH_PECR_PRGLOCK                   ((uint32_t)0x00000002)        /*!< Program matrix Lock */
+#define FLASH_PECR_OPTLOCK                   ((uint32_t)0x00000004)        /*!< Option byte matrix Lock */
+#define FLASH_PECR_PROG                      ((uint32_t)0x00000008)        /*!< Program matrix selection */
+#define FLASH_PECR_DATA                      ((uint32_t)0x00000010)        /*!< Data matrix selection */
+#define FLASH_PECR_FTDW                      ((uint32_t)0x00000100)        /*!< Fixed Time Data write for Word/Half Word/Byte programming */
+#define FLASH_PECR_ERASE                     ((uint32_t)0x00000200)        /*!< Page erasing mode */
+#define FLASH_PECR_FPRG                      ((uint32_t)0x00000400)        /*!< Fast Page/Half Page programming mode */
+#define FLASH_PECR_EOPIE                     ((uint32_t)0x00010000)        /*!< End of programming interrupt */ 
+#define FLASH_PECR_ERRIE                     ((uint32_t)0x00020000)        /*!< Error interrupt */ 
+#define FLASH_PECR_OBL_LAUNCH                ((uint32_t)0x00040000)        /*!< Launch the option byte loading */ 
+
+/******************  Bit definition for FLASH_PDKEYR register  ******************/
+#define  FLASH_PDKEYR_PDKEYR                 ((uint32_t)0xFFFFFFFF)       /*!< FLASH_PEC and data matrix Key */
+
+/******************  Bit definition for FLASH_PEKEYR register  ******************/
+#define  FLASH_PEKEYR_PEKEYR                 ((uint32_t)0xFFFFFFFF)       /*!< FLASH_PEC and data matrix Key */
+
+/******************  Bit definition for FLASH_PRGKEYR register  ******************/
+#define  FLASH_PRGKEYR_PRGKEYR               ((uint32_t)0xFFFFFFFF)        /*!< Program matrix Key */
+
+/******************  Bit definition for FLASH_OPTKEYR register  ******************/
+#define  FLASH_OPTKEYR_OPTKEYR               ((uint32_t)0xFFFFFFFF)        /*!< Option bytes matrix Key */
+
+/******************  Bit definition for FLASH_SR register  *******************/
+#define  FLASH_SR_BSY                        ((uint32_t)0x00000001)        /*!< Busy */
+#define  FLASH_SR_EOP                        ((uint32_t)0x00000002)        /*!< End Of Programming*/
+#define  FLASH_SR_ENDHV                       ((uint32_t)0x00000004)        /*!< End of high voltage */
+#define  FLASH_SR_READY                      ((uint32_t)0x00000008)        /*!< Flash ready after low power mode */
+
+#define  FLASH_SR_WRPERR                     ((uint32_t)0x00000100)        /*!< Write protected error */
+#define  FLASH_SR_PGAERR                     ((uint32_t)0x00000200)        /*!< Programming Alignment Error */
+#define  FLASH_SR_SIZERR                     ((uint32_t)0x00000400)        /*!< Size error */
+#define  FLASH_SR_OPTVERR                    ((uint32_t)0x00000800)        /*!< Option validity error */
+#define  FLASH_SR_OPTVERRUSR                 ((uint32_t)0x00001000)        /*!< Option User validity error */
+#define  FLASH_SR_RDERR                      ((uint32_t)0x00002000)        /*!< Read protected error */
+
+/******************  Bit definition for FLASH_OBR register  *******************/
+#define  FLASH_OBR_RDPRT                     ((uint32_t)0x000000FF)        /*!< Read Protection */
+#define  FLASH_OBR_SPRMOD                    ((uint32_t)0x00000100)        /*!< Selection of protection mode of WPRi bits */
+#define  FLASH_OBR_BOR_LEV                   ((uint32_t)0x000F0000)        /*!< BOR_LEV[3:0] Brown Out Reset Threshold Level*/
+#define  FLASH_OBR_USER                      ((uint32_t)0x00700000)        /*!< User Option Bytes */
+#define  FLASH_OBR_IWDG_SW                   ((uint32_t)0x00100000)        /*!< IWDG_SW */
+#define  FLASH_OBR_nRST_STOP                 ((uint32_t)0x00200000)        /*!< nRST_STOP */
+#define  FLASH_OBR_nRST_STDBY                ((uint32_t)0x00400000)        /*!< nRST_STDBY */
+
+/******************  Bit definition for FLASH_WRPR register  ******************/
+#define  FLASH_WRPR1_WRP                      ((uint32_t)0xFFFFFFFF)        /*!< Write Protect */
+#define  FLASH_WRPR2_WRP                      ((uint32_t)0xFFFFFFFF)        /*!< Write Protect */             
+
+/******************************************************************************/
+/*                                                                            */
+/*                            General Purpose I/O                             */
+/*                                                                            */
+/******************************************************************************/
+/******************  Bits definition for GPIO_MODER register  *****************/
+#define GPIO_MODER_MODER0          ((uint32_t)0x00000003)
+#define GPIO_MODER_MODER0_0        ((uint32_t)0x00000001)
+#define GPIO_MODER_MODER0_1        ((uint32_t)0x00000002)
+
+#define GPIO_MODER_MODER1          ((uint32_t)0x0000000C)
+#define GPIO_MODER_MODER1_0        ((uint32_t)0x00000004)
+#define GPIO_MODER_MODER1_1        ((uint32_t)0x00000008)
+
+#define GPIO_MODER_MODER2          ((uint32_t)0x00000030)
+#define GPIO_MODER_MODER2_0        ((uint32_t)0x00000010)
+#define GPIO_MODER_MODER2_1        ((uint32_t)0x00000020)
+
+#define GPIO_MODER_MODER3          ((uint32_t)0x000000C0)
+#define GPIO_MODER_MODER3_0        ((uint32_t)0x00000040)
+#define GPIO_MODER_MODER3_1        ((uint32_t)0x00000080)
+
+#define GPIO_MODER_MODER4          ((uint32_t)0x00000300)
+#define GPIO_MODER_MODER4_0        ((uint32_t)0x00000100)
+#define GPIO_MODER_MODER4_1        ((uint32_t)0x00000200)
+
+#define GPIO_MODER_MODER5          ((uint32_t)0x00000C00)
+#define GPIO_MODER_MODER5_0        ((uint32_t)0x00000400)
+#define GPIO_MODER_MODER5_1        ((uint32_t)0x00000800)
+
+#define GPIO_MODER_MODER6          ((uint32_t)0x00003000)
+#define GPIO_MODER_MODER6_0        ((uint32_t)0x00001000)
+#define GPIO_MODER_MODER6_1        ((uint32_t)0x00002000)
+
+#define GPIO_MODER_MODER7          ((uint32_t)0x0000C000)
+#define GPIO_MODER_MODER7_0        ((uint32_t)0x00004000)
+#define GPIO_MODER_MODER7_1        ((uint32_t)0x00008000)
+
+#define GPIO_MODER_MODER8          ((uint32_t)0x00030000)
+#define GPIO_MODER_MODER8_0        ((uint32_t)0x00010000)
+#define GPIO_MODER_MODER8_1        ((uint32_t)0x00020000)
+
+#define GPIO_MODER_MODER9          ((uint32_t)0x000C0000)
+#define GPIO_MODER_MODER9_0        ((uint32_t)0x00040000)
+#define GPIO_MODER_MODER9_1        ((uint32_t)0x00080000)
+
+#define GPIO_MODER_MODER10         ((uint32_t)0x00300000)
+#define GPIO_MODER_MODER10_0       ((uint32_t)0x00100000)
+#define GPIO_MODER_MODER10_1       ((uint32_t)0x00200000)
+
+#define GPIO_MODER_MODER11         ((uint32_t)0x00C00000)
+#define GPIO_MODER_MODER11_0       ((uint32_t)0x00400000)
+#define GPIO_MODER_MODER11_1       ((uint32_t)0x00800000)
+
+#define GPIO_MODER_MODER12         ((uint32_t)0x03000000)
+#define GPIO_MODER_MODER12_0       ((uint32_t)0x01000000)
+#define GPIO_MODER_MODER12_1       ((uint32_t)0x02000000)
+
+#define GPIO_MODER_MODER13         ((uint32_t)0x0C000000)
+#define GPIO_MODER_MODER13_0       ((uint32_t)0x04000000)
+#define GPIO_MODER_MODER13_1       ((uint32_t)0x08000000)
+
+#define GPIO_MODER_MODER14         ((uint32_t)0x30000000)
+#define GPIO_MODER_MODER14_0       ((uint32_t)0x10000000)
+#define GPIO_MODER_MODER14_1       ((uint32_t)0x20000000)
+
+#define GPIO_MODER_MODER15         ((uint32_t)0xC0000000)
+#define GPIO_MODER_MODER15_0       ((uint32_t)0x40000000)
+#define GPIO_MODER_MODER15_1       ((uint32_t)0x80000000)
+
+/******************  Bits definition for GPIO_OTYPER register  ****************/
+#define GPIO_OTYPER_OT_0           ((uint32_t)0x00000001)
+#define GPIO_OTYPER_OT_1           ((uint32_t)0x00000002)
+#define GPIO_OTYPER_OT_2           ((uint32_t)0x00000004)
+#define GPIO_OTYPER_OT_3           ((uint32_t)0x00000008)
+#define GPIO_OTYPER_OT_4           ((uint32_t)0x00000010)
+#define GPIO_OTYPER_OT_5           ((uint32_t)0x00000020)
+#define GPIO_OTYPER_OT_6           ((uint32_t)0x00000040)
+#define GPIO_OTYPER_OT_7           ((uint32_t)0x00000080)
+#define GPIO_OTYPER_OT_8           ((uint32_t)0x00000100)
+#define GPIO_OTYPER_OT_9           ((uint32_t)0x00000200)
+#define GPIO_OTYPER_OT_10          ((uint32_t)0x00000400)
+#define GPIO_OTYPER_OT_11          ((uint32_t)0x00000800)
+#define GPIO_OTYPER_OT_12          ((uint32_t)0x00001000)
+#define GPIO_OTYPER_OT_13          ((uint32_t)0x00002000)
+#define GPIO_OTYPER_OT_14          ((uint32_t)0x00004000)
+#define GPIO_OTYPER_OT_15          ((uint32_t)0x00008000)
+
+/******************  Bits definition for GPIO_OSPEEDR register  ***************/
+#define GPIO_OSPEEDER_OSPEEDR0     ((uint32_t)0x00000003)
+#define GPIO_OSPEEDER_OSPEEDR0_0   ((uint32_t)0x00000001)
+#define GPIO_OSPEEDER_OSPEEDR0_1   ((uint32_t)0x00000002)
+
+#define GPIO_OSPEEDER_OSPEEDR1     ((uint32_t)0x0000000C)
+#define GPIO_OSPEEDER_OSPEEDR1_0   ((uint32_t)0x00000004)
+#define GPIO_OSPEEDER_OSPEEDR1_1   ((uint32_t)0x00000008)
+
+#define GPIO_OSPEEDER_OSPEEDR2     ((uint32_t)0x00000030)
+#define GPIO_OSPEEDER_OSPEEDR2_0   ((uint32_t)0x00000010)
+#define GPIO_OSPEEDER_OSPEEDR2_1   ((uint32_t)0x00000020)
+
+#define GPIO_OSPEEDER_OSPEEDR3     ((uint32_t)0x000000C0)
+#define GPIO_OSPEEDER_OSPEEDR3_0   ((uint32_t)0x00000040)
+#define GPIO_OSPEEDER_OSPEEDR3_1   ((uint32_t)0x00000080)
+
+#define GPIO_OSPEEDER_OSPEEDR4     ((uint32_t)0x00000300)
+#define GPIO_OSPEEDER_OSPEEDR4_0   ((uint32_t)0x00000100)
+#define GPIO_OSPEEDER_OSPEEDR4_1   ((uint32_t)0x00000200)
+
+#define GPIO_OSPEEDER_OSPEEDR5     ((uint32_t)0x00000C00)
+#define GPIO_OSPEEDER_OSPEEDR5_0   ((uint32_t)0x00000400)
+#define GPIO_OSPEEDER_OSPEEDR5_1   ((uint32_t)0x00000800)
+
+#define GPIO_OSPEEDER_OSPEEDR6     ((uint32_t)0x00003000)
+#define GPIO_OSPEEDER_OSPEEDR6_0   ((uint32_t)0x00001000)
+#define GPIO_OSPEEDER_OSPEEDR6_1   ((uint32_t)0x00002000)
+
+#define GPIO_OSPEEDER_OSPEEDR7     ((uint32_t)0x0000C000)
+#define GPIO_OSPEEDER_OSPEEDR7_0   ((uint32_t)0x00004000)
+#define GPIO_OSPEEDER_OSPEEDR7_1   ((uint32_t)0x00008000)
+
+#define GPIO_OSPEEDER_OSPEEDR8     ((uint32_t)0x00030000)
+#define GPIO_OSPEEDER_OSPEEDR8_0   ((uint32_t)0x00010000)
+#define GPIO_OSPEEDER_OSPEEDR8_1   ((uint32_t)0x00020000)
+
+#define GPIO_OSPEEDER_OSPEEDR9     ((uint32_t)0x000C0000)
+#define GPIO_OSPEEDER_OSPEEDR9_0   ((uint32_t)0x00040000)
+#define GPIO_OSPEEDER_OSPEEDR9_1   ((uint32_t)0x00080000)
+
+#define GPIO_OSPEEDER_OSPEEDR10    ((uint32_t)0x00300000)
+#define GPIO_OSPEEDER_OSPEEDR10_0  ((uint32_t)0x00100000)
+#define GPIO_OSPEEDER_OSPEEDR10_1  ((uint32_t)0x00200000)
+
+#define GPIO_OSPEEDER_OSPEEDR11    ((uint32_t)0x00C00000)
+#define GPIO_OSPEEDER_OSPEEDR11_0  ((uint32_t)0x00400000)
+#define GPIO_OSPEEDER_OSPEEDR11_1  ((uint32_t)0x00800000)
+
+#define GPIO_OSPEEDER_OSPEEDR12    ((uint32_t)0x03000000)
+#define GPIO_OSPEEDER_OSPEEDR12_0  ((uint32_t)0x01000000)
+#define GPIO_OSPEEDER_OSPEEDR12_1  ((uint32_t)0x02000000)
+
+#define GPIO_OSPEEDER_OSPEEDR13    ((uint32_t)0x0C000000)
+#define GPIO_OSPEEDER_OSPEEDR13_0  ((uint32_t)0x04000000)
+#define GPIO_OSPEEDER_OSPEEDR13_1  ((uint32_t)0x08000000)
+
+#define GPIO_OSPEEDER_OSPEEDR14    ((uint32_t)0x30000000)
+#define GPIO_OSPEEDER_OSPEEDR14_0  ((uint32_t)0x10000000)
+#define GPIO_OSPEEDER_OSPEEDR14_1  ((uint32_t)0x20000000)
+
+#define GPIO_OSPEEDER_OSPEEDR15    ((uint32_t)0xC0000000)
+#define GPIO_OSPEEDER_OSPEEDR15_0  ((uint32_t)0x40000000)
+#define GPIO_OSPEEDER_OSPEEDR15_1  ((uint32_t)0x80000000)
+
+/******************  Bits definition for GPIO_PUPDR register  *****************/
+#define GPIO_PUPDR_PUPDR0          ((uint32_t)0x00000003)
+#define GPIO_PUPDR_PUPDR0_0        ((uint32_t)0x00000001)
+#define GPIO_PUPDR_PUPDR0_1        ((uint32_t)0x00000002)
+
+#define GPIO_PUPDR_PUPDR1          ((uint32_t)0x0000000C)
+#define GPIO_PUPDR_PUPDR1_0        ((uint32_t)0x00000004)
+#define GPIO_PUPDR_PUPDR1_1        ((uint32_t)0x00000008)
+
+#define GPIO_PUPDR_PUPDR2          ((uint32_t)0x00000030)
+#define GPIO_PUPDR_PUPDR2_0        ((uint32_t)0x00000010)
+#define GPIO_PUPDR_PUPDR2_1        ((uint32_t)0x00000020)
+
+#define GPIO_PUPDR_PUPDR3          ((uint32_t)0x000000C0)
+#define GPIO_PUPDR_PUPDR3_0        ((uint32_t)0x00000040)
+#define GPIO_PUPDR_PUPDR3_1        ((uint32_t)0x00000080)
+
+#define GPIO_PUPDR_PUPDR4          ((uint32_t)0x00000300)
+#define GPIO_PUPDR_PUPDR4_0        ((uint32_t)0x00000100)
+#define GPIO_PUPDR_PUPDR4_1        ((uint32_t)0x00000200)
+
+#define GPIO_PUPDR_PUPDR5          ((uint32_t)0x00000C00)
+#define GPIO_PUPDR_PUPDR5_0        ((uint32_t)0x00000400)
+#define GPIO_PUPDR_PUPDR5_1        ((uint32_t)0x00000800)
+
+#define GPIO_PUPDR_PUPDR6          ((uint32_t)0x00003000)
+#define GPIO_PUPDR_PUPDR6_0        ((uint32_t)0x00001000)
+#define GPIO_PUPDR_PUPDR6_1        ((uint32_t)0x00002000)
+
+#define GPIO_PUPDR_PUPDR7          ((uint32_t)0x0000C000)
+#define GPIO_PUPDR_PUPDR7_0        ((uint32_t)0x00004000)
+#define GPIO_PUPDR_PUPDR7_1        ((uint32_t)0x00008000)
+
+#define GPIO_PUPDR_PUPDR8          ((uint32_t)0x00030000)
+#define GPIO_PUPDR_PUPDR8_0        ((uint32_t)0x00010000)
+#define GPIO_PUPDR_PUPDR8_1        ((uint32_t)0x00020000)
+
+#define GPIO_PUPDR_PUPDR9          ((uint32_t)0x000C0000)
+#define GPIO_PUPDR_PUPDR9_0        ((uint32_t)0x00040000)
+#define GPIO_PUPDR_PUPDR9_1        ((uint32_t)0x00080000)
+
+#define GPIO_PUPDR_PUPDR10         ((uint32_t)0x00300000)
+#define GPIO_PUPDR_PUPDR10_0       ((uint32_t)0x00100000)
+#define GPIO_PUPDR_PUPDR10_1       ((uint32_t)0x00200000)
+
+#define GPIO_PUPDR_PUPDR11         ((uint32_t)0x00C00000)
+#define GPIO_PUPDR_PUPDR11_0       ((uint32_t)0x00400000)
+#define GPIO_PUPDR_PUPDR11_1       ((uint32_t)0x00800000)
+
+#define GPIO_PUPDR_PUPDR12         ((uint32_t)0x03000000)
+#define GPIO_PUPDR_PUPDR12_0       ((uint32_t)0x01000000)
+#define GPIO_PUPDR_PUPDR12_1       ((uint32_t)0x02000000)
+
+#define GPIO_PUPDR_PUPDR13         ((uint32_t)0x0C000000)
+#define GPIO_PUPDR_PUPDR13_0       ((uint32_t)0x04000000)
+#define GPIO_PUPDR_PUPDR13_1       ((uint32_t)0x08000000)
+
+#define GPIO_PUPDR_PUPDR14         ((uint32_t)0x30000000)
+#define GPIO_PUPDR_PUPDR14_0       ((uint32_t)0x10000000)
+#define GPIO_PUPDR_PUPDR14_1       ((uint32_t)0x20000000)
+#define GPIO_PUPDR_PUPDR15         ((uint32_t)0xC0000000)
+#define GPIO_PUPDR_PUPDR15_0       ((uint32_t)0x40000000)
+#define GPIO_PUPDR_PUPDR15_1       ((uint32_t)0x80000000)
+
+/******************  Bits definition for GPIO_IDR register  *******************/
+#define GPIO_IDR_IDR_0                       ((uint32_t)0x00000001)
+#define GPIO_IDR_IDR_1                       ((uint32_t)0x00000002)
+#define GPIO_IDR_IDR_2                       ((uint32_t)0x00000004)
+#define GPIO_IDR_IDR_3                       ((uint32_t)0x00000008)
+#define GPIO_IDR_IDR_4                       ((uint32_t)0x00000010)
+#define GPIO_IDR_IDR_5                       ((uint32_t)0x00000020)
+#define GPIO_IDR_IDR_6                       ((uint32_t)0x00000040)
+#define GPIO_IDR_IDR_7                       ((uint32_t)0x00000080)
+#define GPIO_IDR_IDR_8                       ((uint32_t)0x00000100)
+#define GPIO_IDR_IDR_9                       ((uint32_t)0x00000200)
+#define GPIO_IDR_IDR_10                      ((uint32_t)0x00000400)
+#define GPIO_IDR_IDR_11                      ((uint32_t)0x00000800)
+#define GPIO_IDR_IDR_12                      ((uint32_t)0x00001000)
+#define GPIO_IDR_IDR_13                      ((uint32_t)0x00002000)
+#define GPIO_IDR_IDR_14                      ((uint32_t)0x00004000)
+#define GPIO_IDR_IDR_15                      ((uint32_t)0x00008000)
+
+/******************  Bits definition for GPIO_ODR register  *******************/
+#define GPIO_ODR_ODR_0                       ((uint32_t)0x00000001)
+#define GPIO_ODR_ODR_1                       ((uint32_t)0x00000002)
+#define GPIO_ODR_ODR_2                       ((uint32_t)0x00000004)
+#define GPIO_ODR_ODR_3                       ((uint32_t)0x00000008)
+#define GPIO_ODR_ODR_4                       ((uint32_t)0x00000010)
+#define GPIO_ODR_ODR_5                       ((uint32_t)0x00000020)
+#define GPIO_ODR_ODR_6                       ((uint32_t)0x00000040)
+#define GPIO_ODR_ODR_7                       ((uint32_t)0x00000080)
+#define GPIO_ODR_ODR_8                       ((uint32_t)0x00000100)
+#define GPIO_ODR_ODR_9                       ((uint32_t)0x00000200)
+#define GPIO_ODR_ODR_10                      ((uint32_t)0x00000400)
+#define GPIO_ODR_ODR_11                      ((uint32_t)0x00000800)
+#define GPIO_ODR_ODR_12                      ((uint32_t)0x00001000)
+#define GPIO_ODR_ODR_13                      ((uint32_t)0x00002000)
+#define GPIO_ODR_ODR_14                      ((uint32_t)0x00004000)
+#define GPIO_ODR_ODR_15                      ((uint32_t)0x00008000)
+
+/******************  Bits definition for GPIO_BSRR register  ******************/
+#define GPIO_BSRR_BS_0             ((uint32_t)0x00000001)
+#define GPIO_BSRR_BS_1             ((uint32_t)0x00000002)
+#define GPIO_BSRR_BS_2             ((uint32_t)0x00000004)
+#define GPIO_BSRR_BS_3             ((uint32_t)0x00000008)
+#define GPIO_BSRR_BS_4             ((uint32_t)0x00000010)
+#define GPIO_BSRR_BS_5             ((uint32_t)0x00000020)
+#define GPIO_BSRR_BS_6             ((uint32_t)0x00000040)
+#define GPIO_BSRR_BS_7             ((uint32_t)0x00000080)
+#define GPIO_BSRR_BS_8             ((uint32_t)0x00000100)
+#define GPIO_BSRR_BS_9             ((uint32_t)0x00000200)
+#define GPIO_BSRR_BS_10            ((uint32_t)0x00000400)
+#define GPIO_BSRR_BS_11            ((uint32_t)0x00000800)
+#define GPIO_BSRR_BS_12            ((uint32_t)0x00001000)
+#define GPIO_BSRR_BS_13            ((uint32_t)0x00002000)
+#define GPIO_BSRR_BS_14            ((uint32_t)0x00004000)
+#define GPIO_BSRR_BS_15            ((uint32_t)0x00008000)
+#define GPIO_BSRR_BR_0             ((uint32_t)0x00010000)
+#define GPIO_BSRR_BR_1             ((uint32_t)0x00020000)
+#define GPIO_BSRR_BR_2             ((uint32_t)0x00040000)
+#define GPIO_BSRR_BR_3             ((uint32_t)0x00080000)
+#define GPIO_BSRR_BR_4             ((uint32_t)0x00100000)
+#define GPIO_BSRR_BR_5             ((uint32_t)0x00200000)
+#define GPIO_BSRR_BR_6             ((uint32_t)0x00400000)
+#define GPIO_BSRR_BR_7             ((uint32_t)0x00800000)
+#define GPIO_BSRR_BR_8             ((uint32_t)0x01000000)
+#define GPIO_BSRR_BR_9             ((uint32_t)0x02000000)
+#define GPIO_BSRR_BR_10            ((uint32_t)0x04000000)
+#define GPIO_BSRR_BR_11            ((uint32_t)0x08000000)
+#define GPIO_BSRR_BR_12            ((uint32_t)0x10000000)
+#define GPIO_BSRR_BR_13            ((uint32_t)0x20000000)
+#define GPIO_BSRR_BR_14            ((uint32_t)0x40000000)
+#define GPIO_BSRR_BR_15            ((uint32_t)0x80000000)
+
+/****************** Bit definition for GPIO_LCKR register  ********************/
+#define GPIO_LCKR_LCK0             ((uint32_t)0x00000001)
+#define GPIO_LCKR_LCK1             ((uint32_t)0x00000002)
+#define GPIO_LCKR_LCK2             ((uint32_t)0x00000004)
+#define GPIO_LCKR_LCK3             ((uint32_t)0x00000008)
+#define GPIO_LCKR_LCK4             ((uint32_t)0x00000010)
+#define GPIO_LCKR_LCK5             ((uint32_t)0x00000020)
+#define GPIO_LCKR_LCK6             ((uint32_t)0x00000040)
+#define GPIO_LCKR_LCK7             ((uint32_t)0x00000080)
+#define GPIO_LCKR_LCK8             ((uint32_t)0x00000100)
+#define GPIO_LCKR_LCK9             ((uint32_t)0x00000200)
+#define GPIO_LCKR_LCK10            ((uint32_t)0x00000400)
+#define GPIO_LCKR_LCK11            ((uint32_t)0x00000800)
+#define GPIO_LCKR_LCK12            ((uint32_t)0x00001000)
+#define GPIO_LCKR_LCK13            ((uint32_t)0x00002000)
+#define GPIO_LCKR_LCK14            ((uint32_t)0x00004000)
+#define GPIO_LCKR_LCK15            ((uint32_t)0x00008000)
+#define GPIO_LCKR_LCKK             ((uint32_t)0x00010000)
+
+/****************** Bit definition for GPIO_AFRL register  ********************/
+#define GPIO_AFRL_AFRL0            ((uint32_t)0x0000000F)
+#define GPIO_AFRL_AFRL1            ((uint32_t)0x000000F0)
+#define GPIO_AFRL_AFRL2            ((uint32_t)0x00000F00)
+#define GPIO_AFRL_AFRL3            ((uint32_t)0x0000F000)
+#define GPIO_AFRL_AFRL4            ((uint32_t)0x000F0000)
+#define GPIO_AFRL_AFRL5            ((uint32_t)0x00F00000)
+#define GPIO_AFRL_AFRL6            ((uint32_t)0x0F000000)
+#define GPIO_AFRL_AFRL7            ((uint32_t)0xF0000000)
+
+/****************** Bit definition for GPIO_AFRH register  ********************/
+#define GPIO_AFRH_AFRH0            ((uint32_t)0x0000000F)
+#define GPIO_AFRH_AFRH1            ((uint32_t)0x000000F0)
+#define GPIO_AFRH_AFRH2            ((uint32_t)0x00000F00)
+#define GPIO_AFRH_AFRH3            ((uint32_t)0x0000F000)
+#define GPIO_AFRH_AFRH4            ((uint32_t)0x000F0000)
+#define GPIO_AFRH_AFRH5            ((uint32_t)0x00F00000)
+#define GPIO_AFRH_AFRH6            ((uint32_t)0x0F000000)
+#define GPIO_AFRH_AFRH7            ((uint32_t)0xF0000000)
+
+/****************** Bit definition for GPIO_BRR register  *********************/
+#define GPIO_BRR_BR_0              ((uint32_t)0x00000001)
+#define GPIO_BRR_BR_1              ((uint32_t)0x00000002)
+#define GPIO_BRR_BR_2              ((uint32_t)0x00000004)
+#define GPIO_BRR_BR_3              ((uint32_t)0x00000008)
+#define GPIO_BRR_BR_4              ((uint32_t)0x00000010)
+#define GPIO_BRR_BR_5              ((uint32_t)0x00000020)
+#define GPIO_BRR_BR_6              ((uint32_t)0x00000040)
+#define GPIO_BRR_BR_7              ((uint32_t)0x00000080)
+#define GPIO_BRR_BR_8              ((uint32_t)0x00000100)
+#define GPIO_BRR_BR_9              ((uint32_t)0x00000200)
+#define GPIO_BRR_BR_10             ((uint32_t)0x00000400)
+#define GPIO_BRR_BR_11             ((uint32_t)0x00000800)
+#define GPIO_BRR_BR_12             ((uint32_t)0x00001000)
+#define GPIO_BRR_BR_13             ((uint32_t)0x00002000)
+#define GPIO_BRR_BR_14             ((uint32_t)0x00004000)
+#define GPIO_BRR_BR_15             ((uint32_t)0x00008000)
+
+
+/******************************************************************************/
+/*                                                                            */
+/*                   Inter-integrated Circuit Interface (I2C)                 */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for I2C_CR1 register  ********************/
+#define  I2C_CR1_PE                          ((uint32_t)0x00000001)            /*!< Peripheral Enable */
+#define  I2C_CR1_SMBUS                       ((uint32_t)0x00000002)            /*!< SMBus Mode */
+#define  I2C_CR1_SMBTYPE                     ((uint32_t)0x00000008)            /*!< SMBus Type */
+#define  I2C_CR1_ENARP                       ((uint32_t)0x00000010)            /*!< ARP Enable */
+#define  I2C_CR1_ENPEC                       ((uint32_t)0x00000020)            /*!< PEC Enable */
+#define  I2C_CR1_ENGC                        ((uint32_t)0x00000040)            /*!< General Call Enable */
+#define  I2C_CR1_NOSTRETCH                   ((uint32_t)0x00000080)            /*!< Clock Stretching Disable (Slave mode) */
+#define  I2C_CR1_START                       ((uint32_t)0x00000100)            /*!< Start Generation */
+#define  I2C_CR1_STOP                        ((uint32_t)0x00000200)            /*!< Stop Generation */
+#define  I2C_CR1_ACK                         ((uint32_t)0x00000400)            /*!< Acknowledge Enable */
+#define  I2C_CR1_POS                         ((uint32_t)0x00000800)            /*!< Acknowledge/PEC Position (for data reception) */
+#define  I2C_CR1_PEC                         ((uint32_t)0x00001000)            /*!< Packet Error Checking */
+#define  I2C_CR1_ALERT                       ((uint32_t)0x00002000)            /*!< SMBus Alert */
+#define  I2C_CR1_SWRST                       ((uint32_t)0x00008000)            /*!< Software Reset */
+
+/*******************  Bit definition for I2C_CR2 register  ********************/
+#define  I2C_CR2_FREQ                        ((uint32_t)0x0000003F)            /*!< FREQ[5:0] bits (Peripheral Clock Frequency) */
+#define  I2C_CR2_FREQ_0                      ((uint32_t)0x00000001)            /*!< Bit 0 */
+#define  I2C_CR2_FREQ_1                      ((uint32_t)0x00000002)            /*!< Bit 1 */
+#define  I2C_CR2_FREQ_2                      ((uint32_t)0x00000004)            /*!< Bit 2 */
+#define  I2C_CR2_FREQ_3                      ((uint32_t)0x00000008)            /*!< Bit 3 */
+#define  I2C_CR2_FREQ_4                      ((uint32_t)0x00000010)            /*!< Bit 4 */
+#define  I2C_CR2_FREQ_5                      ((uint32_t)0x00000020)            /*!< Bit 5 */
+
+#define  I2C_CR2_ITERREN                     ((uint32_t)0x00000100)            /*!< Error Interrupt Enable */
+#define  I2C_CR2_ITEVTEN                     ((uint32_t)0x00000200)            /*!< Event Interrupt Enable */
+#define  I2C_CR2_ITBUFEN                     ((uint32_t)0x00000400)            /*!< Buffer Interrupt Enable */
+#define  I2C_CR2_DMAEN                       ((uint32_t)0x00000800)            /*!< DMA Requests Enable */
+#define  I2C_CR2_LAST                        ((uint32_t)0x00001000)            /*!< DMA Last Transfer */
+
+/*******************  Bit definition for I2C_OAR1 register  *******************/
+#define  I2C_OAR1_ADD1_7                     ((uint32_t)0x000000FE)            /*!< Interface Address */
+#define  I2C_OAR1_ADD8_9                     ((uint32_t)0x00000300)            /*!< Interface Address */
+
+#define  I2C_OAR1_ADD0                       ((uint32_t)0x00000001)            /*!< Bit 0 */
+#define  I2C_OAR1_ADD1                       ((uint32_t)0x00000002)            /*!< Bit 1 */
+#define  I2C_OAR1_ADD2                       ((uint32_t)0x00000004)            /*!< Bit 2 */
+#define  I2C_OAR1_ADD3                       ((uint32_t)0x00000008)            /*!< Bit 3 */
+#define  I2C_OAR1_ADD4                       ((uint32_t)0x00000010)            /*!< Bit 4 */
+#define  I2C_OAR1_ADD5                       ((uint32_t)0x00000020)            /*!< Bit 5 */
+#define  I2C_OAR1_ADD6                       ((uint32_t)0x00000040)            /*!< Bit 6 */
+#define  I2C_OAR1_ADD7                       ((uint32_t)0x00000080)            /*!< Bit 7 */
+#define  I2C_OAR1_ADD8                       ((uint32_t)0x00000100)            /*!< Bit 8 */
+#define  I2C_OAR1_ADD9                       ((uint32_t)0x00000200)            /*!< Bit 9 */
+
+#define  I2C_OAR1_ADDMODE                    ((uint32_t)0x00008000)            /*!< Addressing Mode (Slave mode) */
+
+/*******************  Bit definition for I2C_OAR2 register  *******************/
+#define  I2C_OAR2_ENDUAL                     ((uint32_t)0x00000001)               /*!< Dual addressing mode enable */
+#define  I2C_OAR2_ADD2                       ((uint32_t)0x000000FE)               /*!< Interface address */
+
+/********************  Bit definition for I2C_DR register  ********************/
+#define  I2C_DR_DR                           ((uint32_t)0x000000FF)               /*!< 8-bit Data Register */
+
+/*******************  Bit definition for I2C_SR1 register  ********************/
+#define  I2C_SR1_SB                          ((uint32_t)0x00000001)            /*!< Start Bit (Master mode) */
+#define  I2C_SR1_ADDR                        ((uint32_t)0x00000002)            /*!< Address sent (master mode)/matched (slave mode) */
+#define  I2C_SR1_BTF                         ((uint32_t)0x00000004)            /*!< Byte Transfer Finished */
+#define  I2C_SR1_ADD10                       ((uint32_t)0x00000008)            /*!< 10-bit header sent (Master mode) */
+#define  I2C_SR1_STOPF                       ((uint32_t)0x00000010)            /*!< Stop detection (Slave mode) */
+#define  I2C_SR1_RXNE                        ((uint32_t)0x00000040)            /*!< Data Register not Empty (receivers) */
+#define  I2C_SR1_TXE                         ((uint32_t)0x00000080)            /*!< Data Register Empty (transmitters) */
+#define  I2C_SR1_BERR                        ((uint32_t)0x00000100)            /*!< Bus Error */
+#define  I2C_SR1_ARLO                        ((uint32_t)0x00000200)            /*!< Arbitration Lost (master mode) */
+#define  I2C_SR1_AF                          ((uint32_t)0x00000400)            /*!< Acknowledge Failure */
+#define  I2C_SR1_OVR                         ((uint32_t)0x00000800)            /*!< Overrun/Underrun */
+#define  I2C_SR1_PECERR                      ((uint32_t)0x00001000)            /*!< PEC Error in reception */
+#define  I2C_SR1_TIMEOUT                     ((uint32_t)0x00004000)            /*!< Timeout or Tlow Error */
+#define  I2C_SR1_SMBALERT                    ((uint32_t)0x00008000)            /*!< SMBus Alert */
+
+/*******************  Bit definition for I2C_SR2 register  ********************/
+#define  I2C_SR2_MSL                         ((uint32_t)0x00000001)            /*!< Master/Slave */
+#define  I2C_SR2_BUSY                        ((uint32_t)0x00000002)            /*!< Bus Busy */
+#define  I2C_SR2_TRA                         ((uint32_t)0x00000004)            /*!< Transmitter/Receiver */
+#define  I2C_SR2_GENCALL                     ((uint32_t)0x00000010)            /*!< General Call Address (Slave mode) */
+#define  I2C_SR2_SMBDEFAULT                  ((uint32_t)0x00000020)            /*!< SMBus Device Default Address (Slave mode) */
+#define  I2C_SR2_SMBHOST                     ((uint32_t)0x00000040)            /*!< SMBus Host Header (Slave mode) */
+#define  I2C_SR2_DUALF                       ((uint32_t)0x00000080)            /*!< Dual Flag (Slave mode) */
+#define  I2C_SR2_PEC                         ((uint32_t)0x0000FF00)            /*!< Packet Error Checking Register */
+
+/*******************  Bit definition for I2C_CCR register  ********************/
+#define  I2C_CCR_CCR                         ((uint32_t)0x00000FFF)            /*!< Clock Control Register in Fast/Standard mode (Master mode) */
+#define  I2C_CCR_DUTY                        ((uint32_t)0x00004000)            /*!< Fast Mode Duty Cycle */
+#define  I2C_CCR_FS                          ((uint32_t)0x00008000)            /*!< I2C Master Mode Selection */
+
+/******************  Bit definition for I2C_TRISE register  *******************/
+#define  I2C_TRISE_TRISE                     ((uint32_t)0x0000003F)               /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */
+
+/******************************************************************************/
+/*                                                                            */
+/*                        Independent WATCHDOG (IWDG)                         */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for IWDG_KR register  ********************/
+#define  IWDG_KR_KEY                         ((uint32_t)0x0000FFFF)            /*!< Key value (write only, read 0000h) */
+
+/*******************  Bit definition for IWDG_PR register  ********************/
+#define  IWDG_PR_PR                          ((uint32_t)0x00000007)               /*!< PR[2:0] (Prescaler divider) */
+#define  IWDG_PR_PR_0                        ((uint32_t)0x00000001)               /*!< Bit 0 */
+#define  IWDG_PR_PR_1                        ((uint32_t)0x00000002)               /*!< Bit 1 */
+#define  IWDG_PR_PR_2                        ((uint32_t)0x00000004)               /*!< Bit 2 */
+
+/*******************  Bit definition for IWDG_RLR register  *******************/
+#define  IWDG_RLR_RL                         ((uint32_t)0x00000FFF)            /*!< Watchdog counter reload value */
+
+/*******************  Bit definition for IWDG_SR register  ********************/
+#define  IWDG_SR_PVU                         ((uint32_t)0x00000001)               /*!< Watchdog prescaler value update */
+#define  IWDG_SR_RVU                         ((uint32_t)0x00000002)               /*!< Watchdog counter reload value update */
+
+/******************************************************************************/
+/*                                                                            */
+/*                          LCD Controller (LCD)                              */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for LCD_CR register  *********************/
+#define LCD_CR_LCDEN               ((uint32_t)0x00000001)     /*!< LCD Enable Bit */
+#define LCD_CR_VSEL                ((uint32_t)0x00000002)     /*!< Voltage source selector Bit */
+
+#define LCD_CR_DUTY                ((uint32_t)0x0000001C)     /*!< DUTY[2:0] bits (Duty selector) */
+#define LCD_CR_DUTY_0              ((uint32_t)0x00000004)     /*!< Duty selector Bit 0 */
+#define LCD_CR_DUTY_1              ((uint32_t)0x00000008)     /*!< Duty selector Bit 1 */
+#define LCD_CR_DUTY_2              ((uint32_t)0x00000010)     /*!< Duty selector Bit 2 */
+
+#define LCD_CR_BIAS                ((uint32_t)0x00000060)     /*!< BIAS[1:0] bits (Bias selector) */
+#define LCD_CR_BIAS_0              ((uint32_t)0x00000020)     /*!< Bias selector Bit 0 */
+#define LCD_CR_BIAS_1              ((uint32_t)0x00000040)     /*!< Bias selector Bit 1 */
+
+#define LCD_CR_MUX_SEG             ((uint32_t)0x00000080)     /*!< Mux Segment Enable Bit */
+
+/*******************  Bit definition for LCD_FCR register  ********************/
+#define LCD_FCR_HD                 ((uint32_t)0x00000001)     /*!< High Drive Enable Bit */
+#define LCD_FCR_SOFIE              ((uint32_t)0x00000002)     /*!< Start of Frame Interrupt Enable Bit */
+#define LCD_FCR_UDDIE              ((uint32_t)0x00000008)     /*!< Update Display Done Interrupt Enable Bit */
+
+#define LCD_FCR_PON                ((uint32_t)0x00000070)     /*!< PON[2:0] bits (Puls ON Duration) */
+#define LCD_FCR_PON_0              ((uint32_t)0x00000010)     /*!< Bit 0 */
+#define LCD_FCR_PON_1              ((uint32_t)0x00000020)     /*!< Bit 1 */
+#define LCD_FCR_PON_2              ((uint32_t)0x00000040)     /*!< Bit 2 */
+
+#define LCD_FCR_DEAD               ((uint32_t)0x00000380)     /*!< DEAD[2:0] bits (DEAD Time) */
+#define LCD_FCR_DEAD_0             ((uint32_t)0x00000080)     /*!< Bit 0 */
+#define LCD_FCR_DEAD_1             ((uint32_t)0x00000100)     /*!< Bit 1 */
+#define LCD_FCR_DEAD_2             ((uint32_t)0x00000200)     /*!< Bit 2 */
+
+#define LCD_FCR_CC                 ((uint32_t)0x00001C00)     /*!< CC[2:0] bits (Contrast Control) */
+#define LCD_FCR_CC_0               ((uint32_t)0x00000400)     /*!< Bit 0 */
+#define LCD_FCR_CC_1               ((uint32_t)0x00000800)     /*!< Bit 1 */
+#define LCD_FCR_CC_2               ((uint32_t)0x00001000)     /*!< Bit 2 */
+
+#define LCD_FCR_BLINKF             ((uint32_t)0x0000E000)     /*!< BLINKF[2:0] bits (Blink Frequency) */
+#define LCD_FCR_BLINKF_0           ((uint32_t)0x00002000)     /*!< Bit 0 */
+#define LCD_FCR_BLINKF_1           ((uint32_t)0x00004000)     /*!< Bit 1 */
+#define LCD_FCR_BLINKF_2           ((uint32_t)0x00008000)     /*!< Bit 2 */
+
+#define LCD_FCR_BLINK              ((uint32_t)0x00030000)     /*!< BLINK[1:0] bits (Blink Enable) */
+#define LCD_FCR_BLINK_0            ((uint32_t)0x00010000)     /*!< Bit 0 */
+#define LCD_FCR_BLINK_1            ((uint32_t)0x00020000)     /*!< Bit 1 */
+
+#define LCD_FCR_DIV                ((uint32_t)0x003C0000)     /*!< DIV[3:0] bits (Divider) */
+#define LCD_FCR_PS                 ((uint32_t)0x03C00000)     /*!< PS[3:0] bits (Prescaler) */
+
+/*******************  Bit definition for LCD_SR register  *********************/
+#define LCD_SR_ENS                 ((uint32_t)0x00000001)     /*!< LCD Enabled Bit */
+#define LCD_SR_SOF                 ((uint32_t)0x00000002)     /*!< Start Of Frame Flag Bit */
+#define LCD_SR_UDR                 ((uint32_t)0x00000004)     /*!< Update Display Request Bit */
+#define LCD_SR_UDD                 ((uint32_t)0x00000008)     /*!< Update Display Done Flag Bit */
+#define LCD_SR_RDY                 ((uint32_t)0x00000010)     /*!< Ready Flag Bit */
+#define LCD_SR_FCRSR               ((uint32_t)0x00000020)     /*!< LCD FCR Register Synchronization Flag Bit */
+
+/*******************  Bit definition for LCD_CLR register  ********************/
+#define LCD_CLR_SOFC               ((uint32_t)0x00000002)     /*!< Start Of Frame Flag Clear Bit */
+#define LCD_CLR_UDDC               ((uint32_t)0x00000008)     /*!< Update Display Done Flag Clear Bit */
+
+/*******************  Bit definition for LCD_RAM register  ********************/
+#define LCD_RAM_SEGMENT_DATA       ((uint32_t)0xFFFFFFFF)     /*!< Segment Data Bits */
+
+/******************************************************************************/
+/*                                                                            */
+/*                          Power Control (PWR)                               */
+/*                                                                            */
+/******************************************************************************/
+
+/********************  Bit definition for PWR_CR register  ********************/
+#define  PWR_CR_LPSDSR                       ((uint32_t)0x00000001)     /*!< Low-power deepsleep/sleep/low power run */
+#define  PWR_CR_PDDS                         ((uint32_t)0x00000002)     /*!< Power Down Deepsleep */
+#define  PWR_CR_CWUF                         ((uint32_t)0x00000004)     /*!< Clear Wakeup Flag */
+#define  PWR_CR_CSBF                         ((uint32_t)0x00000008)     /*!< Clear Standby Flag */
+#define  PWR_CR_PVDE                         ((uint32_t)0x00000010)     /*!< Power Voltage Detector Enable */
+
+#define  PWR_CR_PLS                          ((uint32_t)0x000000E0)     /*!< PLS[2:0] bits (PVD Level Selection) */
+#define  PWR_CR_PLS_0                        ((uint32_t)0x00000020)     /*!< Bit 0 */
+#define  PWR_CR_PLS_1                        ((uint32_t)0x00000040)     /*!< Bit 1 */
+#define  PWR_CR_PLS_2                        ((uint32_t)0x00000080)     /*!< Bit 2 */
+
+/*!< PVD level configuration */
+#define  PWR_CR_PLS_LEV0                     ((uint32_t)0x00000000)     /*!< PVD level 0 */
+#define  PWR_CR_PLS_LEV1                     ((uint32_t)0x00000020)     /*!< PVD level 1 */
+#define  PWR_CR_PLS_LEV2                     ((uint32_t)0x00000040)     /*!< PVD level 2 */
+#define  PWR_CR_PLS_LEV3                     ((uint32_t)0x00000060)     /*!< PVD level 3 */
+#define  PWR_CR_PLS_LEV4                     ((uint32_t)0x00000080)     /*!< PVD level 4 */
+#define  PWR_CR_PLS_LEV5                     ((uint32_t)0x000000A0)     /*!< PVD level 5 */
+#define  PWR_CR_PLS_LEV6                     ((uint32_t)0x000000C0)     /*!< PVD level 6 */
+#define  PWR_CR_PLS_LEV7                     ((uint32_t)0x000000E0)     /*!< PVD level 7 */
+
+#define  PWR_CR_DBP                          ((uint32_t)0x00000100)     /*!< Disable Backup Domain write protection */
+#define  PWR_CR_ULP                          ((uint32_t)0x00000200)     /*!< Ultra Low Power mode */
+#define  PWR_CR_FWU                          ((uint32_t)0x00000400)     /*!< Fast wakeup */
+
+#define  PWR_CR_VOS                          ((uint32_t)0x00001800)     /*!< VOS[1:0] bits (Voltage scaling range selection) */
+#define  PWR_CR_VOS_0                        ((uint32_t)0x00000800)     /*!< Bit 0 */
+#define  PWR_CR_VOS_1                        ((uint32_t)0x00001000)     /*!< Bit 1 */
+#define  PWR_CR_LPRUN                        ((uint32_t)0x00004000)     /*!< Low power run mode */
+
+/*******************  Bit definition for PWR_CSR register  ********************/
+#define  PWR_CSR_WUF                         ((uint32_t)0x00000001)     /*!< Wakeup Flag */
+#define  PWR_CSR_SBF                         ((uint32_t)0x00000002)     /*!< Standby Flag */
+#define  PWR_CSR_PVDO                        ((uint32_t)0x00000004)     /*!< PVD Output */
+#define  PWR_CSR_VREFINTRDYF                 ((uint32_t)0x00000008)     /*!< Internal voltage reference (VREFINT) ready flag */
+#define  PWR_CSR_VOSF                        ((uint32_t)0x00000010)     /*!< Voltage Scaling select flag */
+#define  PWR_CSR_REGLPF                      ((uint32_t)0x00000020)     /*!< Regulator LP flag */
+
+#define  PWR_CSR_EWUP1                       ((uint32_t)0x00000100)     /*!< Enable WKUP pin 1 */
+#define  PWR_CSR_EWUP2                       ((uint32_t)0x00000200)     /*!< Enable WKUP pin 2 */
+#define  PWR_CSR_EWUP3                       ((uint32_t)0x00000400)     /*!< Enable WKUP pin 3 */
+
+/******************************************************************************/
+/*                                                                            */
+/*                      Reset and Clock Control (RCC)                         */
+/*                                                                            */
+/******************************************************************************/
+/********************  Bit definition for RCC_CR register  ********************/
+#define  RCC_CR_HSION                        ((uint32_t)0x00000001)        /*!< Internal High Speed clock enable */
+#define  RCC_CR_HSIRDY                       ((uint32_t)0x00000002)        /*!< Internal High Speed clock ready flag */
+
+#define  RCC_CR_MSION                        ((uint32_t)0x00000100)        /*!< Internal Multi Speed clock enable */
+#define  RCC_CR_MSIRDY                       ((uint32_t)0x00000200)        /*!< Internal Multi Speed clock ready flag */
+
+#define  RCC_CR_HSEON                        ((uint32_t)0x00010000)        /*!< External High Speed clock enable */
+#define  RCC_CR_HSERDY                       ((uint32_t)0x00020000)        /*!< External High Speed clock ready flag */
+#define  RCC_CR_HSEBYP                       ((uint32_t)0x00040000)        /*!< External High Speed clock Bypass */
+
+#define  RCC_CR_PLLON                        ((uint32_t)0x01000000)        /*!< PLL enable */
+#define  RCC_CR_PLLRDY                       ((uint32_t)0x02000000)        /*!< PLL clock ready flag */
+#define  RCC_CR_CSSON                        ((uint32_t)0x10000000)        /*!< Clock Security System enable */
+
+#define  RCC_CR_RTCPRE                       ((uint32_t)0x60000000)        /*!< RTC/LCD Prescaler */
+#define  RCC_CR_RTCPRE_0                     ((uint32_t)0x20000000)        /*!< Bit0 */
+#define  RCC_CR_RTCPRE_1                     ((uint32_t)0x40000000)        /*!< Bit1 */
+
+/********************  Bit definition for RCC_ICSCR register  *****************/
+#define  RCC_ICSCR_HSICAL                    ((uint32_t)0x000000FF)        /*!< Internal High Speed clock Calibration */
+#define  RCC_ICSCR_HSITRIM                   ((uint32_t)0x00001F00)        /*!< Internal High Speed clock trimming */
+
+#define  RCC_ICSCR_MSIRANGE                  ((uint32_t)0x0000E000)        /*!< Internal Multi Speed clock Range */
+#define  RCC_ICSCR_MSIRANGE_0                ((uint32_t)0x00000000)        /*!< Internal Multi Speed clock Range 65.536 KHz */
+#define  RCC_ICSCR_MSIRANGE_1                ((uint32_t)0x00002000)        /*!< Internal Multi Speed clock Range 131.072 KHz */
+#define  RCC_ICSCR_MSIRANGE_2                ((uint32_t)0x00004000)        /*!< Internal Multi Speed clock Range 262.144 KHz */
+#define  RCC_ICSCR_MSIRANGE_3                ((uint32_t)0x00006000)        /*!< Internal Multi Speed clock Range 524.288 KHz */
+#define  RCC_ICSCR_MSIRANGE_4                ((uint32_t)0x00008000)        /*!< Internal Multi Speed clock Range 1.048 MHz */
+#define  RCC_ICSCR_MSIRANGE_5                ((uint32_t)0x0000A000)        /*!< Internal Multi Speed clock Range 2.097 MHz */
+#define  RCC_ICSCR_MSIRANGE_6                ((uint32_t)0x0000C000)        /*!< Internal Multi Speed clock Range 4.194 MHz */
+#define  RCC_ICSCR_MSICAL                    ((uint32_t)0x00FF0000)        /*!< Internal Multi Speed clock Calibration */
+#define  RCC_ICSCR_MSITRIM                   ((uint32_t)0xFF000000)        /*!< Internal Multi Speed clock trimming */
+
+/********************  Bit definition for RCC_CFGR register  ******************/
+#define  RCC_CFGR_SW                         ((uint32_t)0x00000003)        /*!< SW[1:0] bits (System clock Switch) */
+#define  RCC_CFGR_SW_0                       ((uint32_t)0x00000001)        /*!< Bit 0 */
+#define  RCC_CFGR_SW_1                       ((uint32_t)0x00000002)        /*!< Bit 1 */
+
+/*!< SW configuration */
+#define  RCC_CFGR_SW_MSI                     ((uint32_t)0x00000000)        /*!< MSI selected as system clock */
+#define  RCC_CFGR_SW_HSI                     ((uint32_t)0x00000001)        /*!< HSI selected as system clock */
+#define  RCC_CFGR_SW_HSE                     ((uint32_t)0x00000002)        /*!< HSE selected as system clock */
+#define  RCC_CFGR_SW_PLL                     ((uint32_t)0x00000003)        /*!< PLL selected as system clock */
+
+#define  RCC_CFGR_SWS                        ((uint32_t)0x0000000C)        /*!< SWS[1:0] bits (System Clock Switch Status) */
+#define  RCC_CFGR_SWS_0                      ((uint32_t)0x00000004)        /*!< Bit 0 */
+#define  RCC_CFGR_SWS_1                      ((uint32_t)0x00000008)        /*!< Bit 1 */
+
+/*!< SWS configuration */
+#define  RCC_CFGR_SWS_MSI                    ((uint32_t)0x00000000)        /*!< MSI oscillator used as system clock */
+#define  RCC_CFGR_SWS_HSI                    ((uint32_t)0x00000004)        /*!< HSI oscillator used as system clock */
+#define  RCC_CFGR_SWS_HSE                    ((uint32_t)0x00000008)        /*!< HSE oscillator used as system clock */
+#define  RCC_CFGR_SWS_PLL                    ((uint32_t)0x0000000C)        /*!< PLL used as system clock */
+
+#define  RCC_CFGR_HPRE                       ((uint32_t)0x000000F0)        /*!< HPRE[3:0] bits (AHB prescaler) */
+#define  RCC_CFGR_HPRE_0                     ((uint32_t)0x00000010)        /*!< Bit 0 */
+#define  RCC_CFGR_HPRE_1                     ((uint32_t)0x00000020)        /*!< Bit 1 */
+#define  RCC_CFGR_HPRE_2                     ((uint32_t)0x00000040)        /*!< Bit 2 */
+#define  RCC_CFGR_HPRE_3                     ((uint32_t)0x00000080)        /*!< Bit 3 */
+
+/*!< HPRE configuration */
+#define  RCC_CFGR_HPRE_DIV1                  ((uint32_t)0x00000000)        /*!< SYSCLK not divided */
+#define  RCC_CFGR_HPRE_DIV2                  ((uint32_t)0x00000080)        /*!< SYSCLK divided by 2 */
+#define  RCC_CFGR_HPRE_DIV4                  ((uint32_t)0x00000090)        /*!< SYSCLK divided by 4 */
+#define  RCC_CFGR_HPRE_DIV8                  ((uint32_t)0x000000A0)        /*!< SYSCLK divided by 8 */
+#define  RCC_CFGR_HPRE_DIV16                 ((uint32_t)0x000000B0)        /*!< SYSCLK divided by 16 */
+#define  RCC_CFGR_HPRE_DIV64                 ((uint32_t)0x000000C0)        /*!< SYSCLK divided by 64 */
+#define  RCC_CFGR_HPRE_DIV128                ((uint32_t)0x000000D0)        /*!< SYSCLK divided by 128 */
+#define  RCC_CFGR_HPRE_DIV256                ((uint32_t)0x000000E0)        /*!< SYSCLK divided by 256 */
+#define  RCC_CFGR_HPRE_DIV512                ((uint32_t)0x000000F0)        /*!< SYSCLK divided by 512 */
+
+#define  RCC_CFGR_PPRE1                      ((uint32_t)0x00000700)        /*!< PRE1[2:0] bits (APB1 prescaler) */
+#define  RCC_CFGR_PPRE1_0                    ((uint32_t)0x00000100)        /*!< Bit 0 */
+#define  RCC_CFGR_PPRE1_1                    ((uint32_t)0x00000200)        /*!< Bit 1 */
+#define  RCC_CFGR_PPRE1_2                    ((uint32_t)0x00000400)        /*!< Bit 2 */
+
+/*!< PPRE1 configuration */
+#define  RCC_CFGR_PPRE1_DIV1                 ((uint32_t)0x00000000)        /*!< HCLK not divided */
+#define  RCC_CFGR_PPRE1_DIV2                 ((uint32_t)0x00000400)        /*!< HCLK divided by 2 */
+#define  RCC_CFGR_PPRE1_DIV4                 ((uint32_t)0x00000500)        /*!< HCLK divided by 4 */
+#define  RCC_CFGR_PPRE1_DIV8                 ((uint32_t)0x00000600)        /*!< HCLK divided by 8 */
+#define  RCC_CFGR_PPRE1_DIV16                ((uint32_t)0x00000700)        /*!< HCLK divided by 16 */
+
+#define  RCC_CFGR_PPRE2                      ((uint32_t)0x00003800)        /*!< PRE2[2:0] bits (APB2 prescaler) */
+#define  RCC_CFGR_PPRE2_0                    ((uint32_t)0x00000800)        /*!< Bit 0 */
+#define  RCC_CFGR_PPRE2_1                    ((uint32_t)0x00001000)        /*!< Bit 1 */
+#define  RCC_CFGR_PPRE2_2                    ((uint32_t)0x00002000)        /*!< Bit 2 */
+
+/*!< PPRE2 configuration */
+#define  RCC_CFGR_PPRE2_DIV1                 ((uint32_t)0x00000000)        /*!< HCLK not divided */
+#define  RCC_CFGR_PPRE2_DIV2                 ((uint32_t)0x00002000)        /*!< HCLK divided by 2 */
+#define  RCC_CFGR_PPRE2_DIV4                 ((uint32_t)0x00002800)        /*!< HCLK divided by 4 */
+#define  RCC_CFGR_PPRE2_DIV8                 ((uint32_t)0x00003000)        /*!< HCLK divided by 8 */
+#define  RCC_CFGR_PPRE2_DIV16                ((uint32_t)0x00003800)        /*!< HCLK divided by 16 */
+
+/*!< PLL entry clock source*/
+#define  RCC_CFGR_PLLSRC                     ((uint32_t)0x00010000)        /*!< PLL entry clock source */
+
+#define  RCC_CFGR_PLLSRC_HSI                 ((uint32_t)0x00000000)        /*!< HSI as PLL entry clock source */
+#define  RCC_CFGR_PLLSRC_HSE                 ((uint32_t)0x00010000)        /*!< HSE as PLL entry clock source */
+
+
+/*!< PLLMUL configuration */
+#define  RCC_CFGR_PLLMUL                     ((uint32_t)0x003C0000)        /*!< PLLMUL[3:0] bits (PLL multiplication factor) */
+#define  RCC_CFGR_PLLMUL_0                   ((uint32_t)0x00040000)        /*!< Bit 0 */
+#define  RCC_CFGR_PLLMUL_1                   ((uint32_t)0x00080000)        /*!< Bit 1 */
+#define  RCC_CFGR_PLLMUL_2                   ((uint32_t)0x00100000)        /*!< Bit 2 */
+#define  RCC_CFGR_PLLMUL_3                   ((uint32_t)0x00200000)        /*!< Bit 3 */
+
+/*!< PLLMUL configuration */
+#define  RCC_CFGR_PLLMUL3                    ((uint32_t)0x00000000)        /*!< PLL input clock * 3 */
+#define  RCC_CFGR_PLLMUL4                    ((uint32_t)0x00040000)        /*!< PLL input clock * 4 */
+#define  RCC_CFGR_PLLMUL6                    ((uint32_t)0x00080000)        /*!< PLL input clock * 6 */
+#define  RCC_CFGR_PLLMUL8                    ((uint32_t)0x000C0000)        /*!< PLL input clock * 8 */
+#define  RCC_CFGR_PLLMUL12                   ((uint32_t)0x00100000)        /*!< PLL input clock * 12 */
+#define  RCC_CFGR_PLLMUL16                   ((uint32_t)0x00140000)        /*!< PLL input clock * 16 */
+#define  RCC_CFGR_PLLMUL24                   ((uint32_t)0x00180000)        /*!< PLL input clock * 24 */
+#define  RCC_CFGR_PLLMUL32                   ((uint32_t)0x001C0000)        /*!< PLL input clock * 32 */
+#define  RCC_CFGR_PLLMUL48                   ((uint32_t)0x00200000)        /*!< PLL input clock * 48 */
+
+/*!< PLLDIV configuration */
+#define  RCC_CFGR_PLLDIV                     ((uint32_t)0x00C00000)        /*!< PLLDIV[1:0] bits (PLL Output Division) */
+#define  RCC_CFGR_PLLDIV_0                   ((uint32_t)0x00400000)        /*!< Bit0 */
+#define  RCC_CFGR_PLLDIV_1                   ((uint32_t)0x00800000)        /*!< Bit1 */
+
+
+/*!< PLLDIV configuration */
+#define  RCC_CFGR_PLLDIV1                    ((uint32_t)0x00000000)        /*!< PLL clock output = CKVCO / 1 */
+#define  RCC_CFGR_PLLDIV2                    ((uint32_t)0x00400000)        /*!< PLL clock output = CKVCO / 2 */
+#define  RCC_CFGR_PLLDIV3                    ((uint32_t)0x00800000)        /*!< PLL clock output = CKVCO / 3 */
+#define  RCC_CFGR_PLLDIV4                    ((uint32_t)0x00C00000)        /*!< PLL clock output = CKVCO / 4 */
+
+
+#define  RCC_CFGR_MCOSEL                     ((uint32_t)0x07000000)        /*!< MCO[2:0] bits (Microcontroller Clock Output) */
+#define  RCC_CFGR_MCOSEL_0                   ((uint32_t)0x01000000)        /*!< Bit 0 */
+#define  RCC_CFGR_MCOSEL_1                   ((uint32_t)0x02000000)        /*!< Bit 1 */
+#define  RCC_CFGR_MCOSEL_2                   ((uint32_t)0x04000000)        /*!< Bit 2 */
+
+/*!< MCO configuration */
+#define  RCC_CFGR_MCO_NOCLOCK                ((uint32_t)0x00000000)        /*!< No clock */
+#define  RCC_CFGR_MCO_SYSCLK                 ((uint32_t)0x01000000)        /*!< System clock selected */
+#define  RCC_CFGR_MCO_HSI                    ((uint32_t)0x02000000)        /*!< Internal 16 MHz RC oscillator clock selected */
+#define  RCC_CFGR_MCO_MSI                    ((uint32_t)0x03000000)        /*!< Internal Medium Speed RC oscillator clock selected */
+#define  RCC_CFGR_MCO_HSE                    ((uint32_t)0x04000000)        /*!< External 1-25 MHz oscillator clock selected */
+#define  RCC_CFGR_MCO_PLL                    ((uint32_t)0x05000000)        /*!< PLL clock divided */
+#define  RCC_CFGR_MCO_LSI                    ((uint32_t)0x06000000)        /*!< LSI selected */
+#define  RCC_CFGR_MCO_LSE                    ((uint32_t)0x07000000)        /*!< LSE selected */
+
+#define  RCC_CFGR_MCOPRE                     ((uint32_t)0x70000000)        /*!< MCOPRE[2:0] bits (Microcontroller Clock Output Prescaler) */
+#define  RCC_CFGR_MCOPRE_0                   ((uint32_t)0x10000000)        /*!< Bit 0 */
+#define  RCC_CFGR_MCOPRE_1                   ((uint32_t)0x20000000)        /*!< Bit 1 */
+#define  RCC_CFGR_MCOPRE_2                   ((uint32_t)0x40000000)        /*!< Bit 2 */
+
+/*!< MCO Prescaler configuration */
+#define  RCC_CFGR_MCO_DIV1                   ((uint32_t)0x00000000)        /*!< MCO Clock divided by 1 */
+#define  RCC_CFGR_MCO_DIV2                   ((uint32_t)0x10000000)        /*!< MCO Clock divided by 2 */
+#define  RCC_CFGR_MCO_DIV4                   ((uint32_t)0x20000000)        /*!< MCO Clock divided by 4 */
+#define  RCC_CFGR_MCO_DIV8                   ((uint32_t)0x30000000)        /*!< MCO Clock divided by 8 */
+#define  RCC_CFGR_MCO_DIV16                  ((uint32_t)0x40000000)        /*!< MCO Clock divided by 16 */
+
+/*!<******************  Bit definition for RCC_CIR register  ********************/
+#define  RCC_CIR_LSIRDYF                     ((uint32_t)0x00000001)        /*!< LSI Ready Interrupt flag */
+#define  RCC_CIR_LSERDYF                     ((uint32_t)0x00000002)        /*!< LSE Ready Interrupt flag */
+#define  RCC_CIR_HSIRDYF                     ((uint32_t)0x00000004)        /*!< HSI Ready Interrupt flag */
+#define  RCC_CIR_HSERDYF                     ((uint32_t)0x00000008)        /*!< HSE Ready Interrupt flag */
+#define  RCC_CIR_PLLRDYF                     ((uint32_t)0x00000010)        /*!< PLL Ready Interrupt flag */
+#define  RCC_CIR_MSIRDYF                     ((uint32_t)0x00000020)        /*!< MSI Ready Interrupt flag */
+#define  RCC_CIR_LSECSS                      ((uint32_t)0x00000040)        /*!< LSE CSS Interrupt flag */
+#define  RCC_CIR_CSSF                        ((uint32_t)0x00000080)        /*!< Clock Security System Interrupt flag */
+
+#define  RCC_CIR_LSIRDYIE                    ((uint32_t)0x00000100)        /*!< LSI Ready Interrupt Enable */
+#define  RCC_CIR_LSERDYIE                    ((uint32_t)0x00000200)        /*!< LSE Ready Interrupt Enable */
+#define  RCC_CIR_HSIRDYIE                    ((uint32_t)0x00000400)        /*!< HSI Ready Interrupt Enable */
+#define  RCC_CIR_HSERDYIE                    ((uint32_t)0x00000800)        /*!< HSE Ready Interrupt Enable */
+#define  RCC_CIR_PLLRDYIE                    ((uint32_t)0x00001000)        /*!< PLL Ready Interrupt Enable */
+#define  RCC_CIR_MSIRDYIE                    ((uint32_t)0x00002000)        /*!< MSI Ready Interrupt Enable */
+#define  RCC_CIR_LSECSSIE                    ((uint32_t)0x00004000)        /*!< LSE CSS Interrupt Enable */
+
+#define  RCC_CIR_LSIRDYC                     ((uint32_t)0x00010000)        /*!< LSI Ready Interrupt Clear */
+#define  RCC_CIR_LSERDYC                     ((uint32_t)0x00020000)        /*!< LSE Ready Interrupt Clear */
+#define  RCC_CIR_HSIRDYC                     ((uint32_t)0x00040000)        /*!< HSI Ready Interrupt Clear */
+#define  RCC_CIR_HSERDYC                     ((uint32_t)0x00080000)        /*!< HSE Ready Interrupt Clear */
+#define  RCC_CIR_PLLRDYC                     ((uint32_t)0x00100000)        /*!< PLL Ready Interrupt Clear */
+#define  RCC_CIR_MSIRDYC                     ((uint32_t)0x00200000)        /*!< MSI Ready Interrupt Clear */
+#define  RCC_CIR_LSECSSC                     ((uint32_t)0x00400000)        /*!< LSE CSS Interrupt Clear */
+#define  RCC_CIR_CSSC                        ((uint32_t)0x00800000)        /*!< Clock Security System Interrupt Clear */
+
+/*****************  Bit definition for RCC_AHBRSTR register  ******************/
+#define  RCC_AHBRSTR_GPIOARST                ((uint32_t)0x00000001)        /*!< GPIO port A reset */
+#define  RCC_AHBRSTR_GPIOBRST                ((uint32_t)0x00000002)        /*!< GPIO port B reset */
+#define  RCC_AHBRSTR_GPIOCRST                ((uint32_t)0x00000004)        /*!< GPIO port C reset */
+#define  RCC_AHBRSTR_GPIODRST                ((uint32_t)0x00000008)        /*!< GPIO port D reset */
+#define  RCC_AHBRSTR_GPIOERST                ((uint32_t)0x00000010)        /*!< GPIO port E reset */
+#define  RCC_AHBRSTR_GPIOHRST                ((uint32_t)0x00000020)        /*!< GPIO port H reset */
+#define  RCC_AHBRSTR_CRCRST                  ((uint32_t)0x00001000)        /*!< CRC reset */
+#define  RCC_AHBRSTR_FLITFRST                ((uint32_t)0x00008000)        /*!< FLITF reset */
+#define  RCC_AHBRSTR_DMA1RST                 ((uint32_t)0x01000000)        /*!< DMA1 reset */
+#define  RCC_AHBRSTR_DMA2RST                 ((uint32_t)0x02000000)        /*!< DMA2 reset */
+ 
+/*****************  Bit definition for RCC_APB2RSTR register  *****************/
+#define  RCC_APB2RSTR_SYSCFGRST              ((uint32_t)0x00000001)        /*!< System Configuration SYSCFG reset */
+#define  RCC_APB2RSTR_TIM9RST                ((uint32_t)0x00000004)        /*!< TIM9 reset */
+#define  RCC_APB2RSTR_TIM10RST               ((uint32_t)0x00000008)        /*!< TIM10 reset */
+#define  RCC_APB2RSTR_TIM11RST               ((uint32_t)0x00000010)        /*!< TIM11 reset */
+#define  RCC_APB2RSTR_ADC1RST                ((uint32_t)0x00000200)        /*!< ADC1 reset */
+#define  RCC_APB2RSTR_SPI1RST                ((uint32_t)0x00001000)        /*!< SPI1 reset */
+#define  RCC_APB2RSTR_USART1RST              ((uint32_t)0x00004000)        /*!< USART1 reset */
+
+/*****************  Bit definition for RCC_APB1RSTR register  *****************/
+#define  RCC_APB1RSTR_TIM2RST                ((uint32_t)0x00000001)        /*!< Timer 2 reset */
+#define  RCC_APB1RSTR_TIM3RST                ((uint32_t)0x00000002)        /*!< Timer 3 reset */
+#define  RCC_APB1RSTR_TIM4RST                ((uint32_t)0x00000004)        /*!< Timer 4 reset */
+#define  RCC_APB1RSTR_TIM5RST                ((uint32_t)0x00000008)        /*!< Timer 5 reset */
+#define  RCC_APB1RSTR_TIM6RST                ((uint32_t)0x00000010)        /*!< Timer 6 reset */
+#define  RCC_APB1RSTR_TIM7RST                ((uint32_t)0x00000020)        /*!< Timer 7 reset */
+#define  RCC_APB1RSTR_LCDRST                 ((uint32_t)0x00000200)        /*!< LCD reset */
+#define  RCC_APB1RSTR_WWDGRST                ((uint32_t)0x00000800)        /*!< Window Watchdog reset */
+#define  RCC_APB1RSTR_SPI2RST                ((uint32_t)0x00004000)        /*!< SPI 2 reset */
+#define  RCC_APB1RSTR_SPI3RST                ((uint32_t)0x00008000)        /*!< SPI 3 reset */
+#define  RCC_APB1RSTR_USART2RST              ((uint32_t)0x00020000)        /*!< USART 2 reset */
+#define  RCC_APB1RSTR_USART3RST              ((uint32_t)0x00040000)        /*!< USART 3 reset */
+#define  RCC_APB1RSTR_I2C1RST                ((uint32_t)0x00200000)        /*!< I2C 1 reset */
+#define  RCC_APB1RSTR_I2C2RST                ((uint32_t)0x00400000)        /*!< I2C 2 reset */
+#define  RCC_APB1RSTR_USBRST                 ((uint32_t)0x00800000)        /*!< USB reset */
+#define  RCC_APB1RSTR_PWRRST                 ((uint32_t)0x10000000)        /*!< Power interface reset */
+#define  RCC_APB1RSTR_DACRST                 ((uint32_t)0x20000000)        /*!< DAC interface reset */
+#define  RCC_APB1RSTR_COMPRST                ((uint32_t)0x80000000)        /*!< Comparator interface reset */
+
+/******************  Bit definition for RCC_AHBENR register  ******************/
+#define  RCC_AHBENR_GPIOAEN                  ((uint32_t)0x00000001)        /*!< GPIO port A clock enable */
+#define  RCC_AHBENR_GPIOBEN                  ((uint32_t)0x00000002)        /*!< GPIO port B clock enable */
+#define  RCC_AHBENR_GPIOCEN                  ((uint32_t)0x00000004)        /*!< GPIO port C clock enable */
+#define  RCC_AHBENR_GPIODEN                  ((uint32_t)0x00000008)        /*!< GPIO port D clock enable */
+#define  RCC_AHBENR_GPIOEEN                  ((uint32_t)0x00000010)        /*!< GPIO port E clock enable */
+#define  RCC_AHBENR_GPIOHEN                  ((uint32_t)0x00000020)        /*!< GPIO port H clock enable */
+#define  RCC_AHBENR_CRCEN                    ((uint32_t)0x00001000)        /*!< CRC clock enable */
+#define  RCC_AHBENR_FLITFEN                  ((uint32_t)0x00008000)        /*!< FLITF clock enable (has effect only when
+                                                                                the Flash memory is in power down mode) */
+#define  RCC_AHBENR_DMA1EN                   ((uint32_t)0x01000000)        /*!< DMA1 clock enable */
+#define  RCC_AHBENR_DMA2EN                   ((uint32_t)0x02000000)        /*!< DMA2 clock enable */
+
+/******************  Bit definition for RCC_APB2ENR register  *****************/
+#define  RCC_APB2ENR_SYSCFGEN                ((uint32_t)0x00000001)         /*!< System Configuration SYSCFG clock enable */
+#define  RCC_APB2ENR_TIM9EN                  ((uint32_t)0x00000004)         /*!< TIM9 interface clock enable */
+#define  RCC_APB2ENR_TIM10EN                 ((uint32_t)0x00000008)         /*!< TIM10 interface clock enable */
+#define  RCC_APB2ENR_TIM11EN                 ((uint32_t)0x00000010)         /*!< TIM11 Timer clock enable */
+#define  RCC_APB2ENR_ADC1EN                  ((uint32_t)0x00000200)         /*!< ADC1 clock enable */
+#define  RCC_APB2ENR_SPI1EN                  ((uint32_t)0x00001000)         /*!< SPI1 clock enable */
+#define  RCC_APB2ENR_USART1EN                ((uint32_t)0x00004000)         /*!< USART1 clock enable */
+
+/*****************  Bit definition for RCC_APB1ENR register  ******************/
+#define  RCC_APB1ENR_TIM2EN                  ((uint32_t)0x00000001)        /*!< Timer 2 clock enabled*/
+#define  RCC_APB1ENR_TIM3EN                  ((uint32_t)0x00000002)        /*!< Timer 3 clock enable */
+#define  RCC_APB1ENR_TIM4EN                  ((uint32_t)0x00000004)        /*!< Timer 4 clock enable */
+#define  RCC_APB1ENR_TIM5EN                  ((uint32_t)0x00000008)        /*!< Timer 5 clock enable */
+#define  RCC_APB1ENR_TIM6EN                  ((uint32_t)0x00000010)        /*!< Timer 6 clock enable */
+#define  RCC_APB1ENR_TIM7EN                  ((uint32_t)0x00000020)        /*!< Timer 7 clock enable */
+#define  RCC_APB1ENR_LCDEN                   ((uint32_t)0x00000200)        /*!< LCD clock enable */
+#define  RCC_APB1ENR_WWDGEN                  ((uint32_t)0x00000800)        /*!< Window Watchdog clock enable */
+#define  RCC_APB1ENR_SPI2EN                  ((uint32_t)0x00004000)        /*!< SPI 2 clock enable */
+#define  RCC_APB1ENR_SPI3EN                  ((uint32_t)0x00008000)        /*!< SPI 3 clock enable */
+#define  RCC_APB1ENR_USART2EN                ((uint32_t)0x00020000)        /*!< USART 2 clock enable */
+#define  RCC_APB1ENR_USART3EN                ((uint32_t)0x00040000)        /*!< USART 3 clock enable */
+#define  RCC_APB1ENR_I2C1EN                  ((uint32_t)0x00200000)        /*!< I2C 1 clock enable */
+#define  RCC_APB1ENR_I2C2EN                  ((uint32_t)0x00400000)        /*!< I2C 2 clock enable */
+#define  RCC_APB1ENR_USBEN                   ((uint32_t)0x00800000)        /*!< USB clock enable */
+#define  RCC_APB1ENR_PWREN                   ((uint32_t)0x10000000)        /*!< Power interface clock enable */
+#define  RCC_APB1ENR_DACEN                   ((uint32_t)0x20000000)        /*!< DAC interface clock enable */
+#define  RCC_APB1ENR_COMPEN                  ((uint32_t)0x80000000)        /*!< Comparator interface clock enable */
+
+/******************  Bit definition for RCC_AHBLPENR register  ****************/
+#define  RCC_AHBLPENR_GPIOALPEN              ((uint32_t)0x00000001)        /*!< GPIO port A clock enabled in sleep mode */
+#define  RCC_AHBLPENR_GPIOBLPEN              ((uint32_t)0x00000002)        /*!< GPIO port B clock enabled in sleep mode */
+#define  RCC_AHBLPENR_GPIOCLPEN              ((uint32_t)0x00000004)        /*!< GPIO port C clock enabled in sleep mode */
+#define  RCC_AHBLPENR_GPIODLPEN              ((uint32_t)0x00000008)        /*!< GPIO port D clock enabled in sleep mode */
+#define  RCC_AHBLPENR_GPIOELPEN              ((uint32_t)0x00000010)        /*!< GPIO port E clock enabled in sleep mode */
+#define  RCC_AHBLPENR_GPIOHLPEN              ((uint32_t)0x00000020)        /*!< GPIO port H clock enabled in sleep mode */
+#define  RCC_AHBLPENR_CRCLPEN                ((uint32_t)0x00001000)        /*!< CRC clock enabled in sleep mode */
+#define  RCC_AHBLPENR_FLITFLPEN              ((uint32_t)0x00008000)        /*!< Flash Interface clock enabled in sleep mode
+                                                                                (has effect only when the Flash memory is
+                                                                                 in power down mode) */
+#define  RCC_AHBLPENR_SRAMLPEN               ((uint32_t)0x00010000)        /*!< SRAM clock enabled in sleep mode */
+#define  RCC_AHBLPENR_DMA1LPEN               ((uint32_t)0x01000000)        /*!< DMA1 clock enabled in sleep mode */
+#define  RCC_AHBLPENR_DMA2LPEN               ((uint32_t)0x02000000)        /*!< DMA2 clock enabled in sleep mode */
+
+/******************  Bit definition for RCC_APB2LPENR register  ***************/
+#define  RCC_APB2LPENR_SYSCFGLPEN            ((uint32_t)0x00000001)         /*!< System Configuration SYSCFG clock enabled in sleep mode */
+#define  RCC_APB2LPENR_TIM9LPEN              ((uint32_t)0x00000004)         /*!< TIM9 interface clock enabled in sleep mode */
+#define  RCC_APB2LPENR_TIM10LPEN             ((uint32_t)0x00000008)         /*!< TIM10 interface clock enabled in sleep mode */
+#define  RCC_APB2LPENR_TIM11LPEN             ((uint32_t)0x00000010)         /*!< TIM11 Timer clock enabled in sleep mode */
+#define  RCC_APB2LPENR_ADC1LPEN              ((uint32_t)0x00000200)         /*!< ADC1 clock enabled in sleep mode */
+#define  RCC_APB2LPENR_SPI1LPEN              ((uint32_t)0x00001000)         /*!< SPI1 clock enabled in sleep mode */
+#define  RCC_APB2LPENR_USART1LPEN            ((uint32_t)0x00004000)         /*!< USART1 clock enabled in sleep mode */
+
+/*****************  Bit definition for RCC_APB1LPENR register  ****************/
+#define  RCC_APB1LPENR_TIM2LPEN              ((uint32_t)0x00000001)        /*!< Timer 2 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_TIM3LPEN              ((uint32_t)0x00000002)        /*!< Timer 3 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_TIM4LPEN              ((uint32_t)0x00000004)        /*!< Timer 4 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_TIM5LPEN              ((uint32_t)0x00000008)        /*!< Timer 5 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_TIM6LPEN              ((uint32_t)0x00000010)        /*!< Timer 6 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_TIM7LPEN              ((uint32_t)0x00000020)        /*!< Timer 7 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_LCDLPEN               ((uint32_t)0x00000200)        /*!< LCD clock enabled in sleep mode */
+#define  RCC_APB1LPENR_WWDGLPEN              ((uint32_t)0x00000800)        /*!< Window Watchdog clock enabled in sleep mode */
+#define  RCC_APB1LPENR_SPI2LPEN              ((uint32_t)0x00004000)        /*!< SPI 2 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_SPI3LPEN              ((uint32_t)0x00008000)        /*!< SPI 3 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_USART2LPEN            ((uint32_t)0x00020000)        /*!< USART 2 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_USART3LPEN            ((uint32_t)0x00040000)        /*!< USART 3 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_I2C1LPEN              ((uint32_t)0x00200000)        /*!< I2C 1 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_I2C2LPEN              ((uint32_t)0x00400000)        /*!< I2C 2 clock enabled in sleep mode */
+#define  RCC_APB1LPENR_USBLPEN               ((uint32_t)0x00800000)        /*!< USB clock enabled in sleep mode */
+#define  RCC_APB1LPENR_PWRLPEN               ((uint32_t)0x10000000)        /*!< Power interface clock enabled in sleep mode */
+#define  RCC_APB1LPENR_DACLPEN               ((uint32_t)0x20000000)        /*!< DAC interface clock enabled in sleep mode */
+#define  RCC_APB1LPENR_COMPLPEN              ((uint32_t)0x80000000)        /*!< Comparator interface clock enabled in sleep mode*/
+
+/*******************  Bit definition for RCC_CSR register  ********************/
+#define  RCC_CSR_LSION                      ((uint32_t)0x00000001)        /*!< Internal Low Speed oscillator enable */
+#define  RCC_CSR_LSIRDY                     ((uint32_t)0x00000002)        /*!< Internal Low Speed oscillator Ready */
+
+#define  RCC_CSR_LSEON                      ((uint32_t)0x00000100)        /*!< External Low Speed oscillator enable */
+#define  RCC_CSR_LSERDY                     ((uint32_t)0x00000200)        /*!< External Low Speed oscillator Ready */
+#define  RCC_CSR_LSEBYP                     ((uint32_t)0x00000400)        /*!< External Low Speed oscillator Bypass */
+
+#define  RCC_CSR_LSECSSON                   ((uint32_t)0x00000800)        /*!< External Low Speed oscillator CSS Enable */
+#define  RCC_CSR_LSECSSD                    ((uint32_t)0x00001000)        /*!< External Low Speed oscillator CSS Detected */
+
+#define  RCC_CSR_RTCSEL                     ((uint32_t)0x00030000)        /*!< RTCSEL[1:0] bits (RTC clock source selection) */
+#define  RCC_CSR_RTCSEL_0                   ((uint32_t)0x00010000)        /*!< Bit 0 */
+#define  RCC_CSR_RTCSEL_1                   ((uint32_t)0x00020000)        /*!< Bit 1 */
+
+/*!< RTC congiguration */
+#define  RCC_CSR_RTCSEL_NOCLOCK             ((uint32_t)0x00000000)        /*!< No clock */
+#define  RCC_CSR_RTCSEL_LSE                 ((uint32_t)0x00010000)        /*!< LSE oscillator clock used as RTC clock */
+#define  RCC_CSR_RTCSEL_LSI                 ((uint32_t)0x00020000)        /*!< LSI oscillator clock used as RTC clock */
+#define  RCC_CSR_RTCSEL_HSE                 ((uint32_t)0x00030000)        /*!< HSE oscillator clock divided by 2, 4, 8 or 16 by RTCPRE used as RTC clock */
+
+#define  RCC_CSR_RTCEN                      ((uint32_t)0x00400000)        /*!< RTC clock enable */
+#define  RCC_CSR_RTCRST                     ((uint32_t)0x00800000)        /*!< RTC reset  */
+ 
+#define  RCC_CSR_RMVF                       ((uint32_t)0x01000000)        /*!< Remove reset flag */
+#define  RCC_CSR_OBLRSTF                    ((uint32_t)0x02000000)        /*!< Option Bytes Loader reset flag */
+#define  RCC_CSR_PINRSTF                    ((uint32_t)0x04000000)        /*!< PIN reset flag */
+#define  RCC_CSR_PORRSTF                    ((uint32_t)0x08000000)        /*!< POR/PDR reset flag */
+#define  RCC_CSR_SFTRSTF                    ((uint32_t)0x10000000)        /*!< Software Reset flag */
+#define  RCC_CSR_IWDGRSTF                   ((uint32_t)0x20000000)        /*!< Independent Watchdog reset flag */
+#define  RCC_CSR_WWDGRSTF                   ((uint32_t)0x40000000)        /*!< Window watchdog reset flag */
+#define  RCC_CSR_LPWRRSTF                   ((uint32_t)0x80000000)        /*!< Low-Power reset flag */
+
+/******************************************************************************/
+/*                                                                            */
+/*                           Real-Time Clock (RTC)                            */
+/*                                                                            */
+/******************************************************************************/
+/********************  Bits definition for RTC_TR register  *******************/
+#define RTC_TR_PM                            ((uint32_t)0x00400000)
+#define RTC_TR_HT                            ((uint32_t)0x00300000)
+#define RTC_TR_HT_0                          ((uint32_t)0x00100000)
+#define RTC_TR_HT_1                          ((uint32_t)0x00200000)
+#define RTC_TR_HU                            ((uint32_t)0x000F0000)
+#define RTC_TR_HU_0                          ((uint32_t)0x00010000)
+#define RTC_TR_HU_1                          ((uint32_t)0x00020000)
+#define RTC_TR_HU_2                          ((uint32_t)0x00040000)
+#define RTC_TR_HU_3                          ((uint32_t)0x00080000)
+#define RTC_TR_MNT                           ((uint32_t)0x00007000)
+#define RTC_TR_MNT_0                         ((uint32_t)0x00001000)
+#define RTC_TR_MNT_1                         ((uint32_t)0x00002000)
+#define RTC_TR_MNT_2                         ((uint32_t)0x00004000)
+#define RTC_TR_MNU                           ((uint32_t)0x00000F00)
+#define RTC_TR_MNU_0                         ((uint32_t)0x00000100)
+#define RTC_TR_MNU_1                         ((uint32_t)0x00000200)
+#define RTC_TR_MNU_2                         ((uint32_t)0x00000400)
+#define RTC_TR_MNU_3                         ((uint32_t)0x00000800)
+#define RTC_TR_ST                            ((uint32_t)0x00000070)
+#define RTC_TR_ST_0                          ((uint32_t)0x00000010)
+#define RTC_TR_ST_1                          ((uint32_t)0x00000020)
+#define RTC_TR_ST_2                          ((uint32_t)0x00000040)
+#define RTC_TR_SU                            ((uint32_t)0x0000000F)
+#define RTC_TR_SU_0                          ((uint32_t)0x00000001)
+#define RTC_TR_SU_1                          ((uint32_t)0x00000002)
+#define RTC_TR_SU_2                          ((uint32_t)0x00000004)
+#define RTC_TR_SU_3                          ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_DR register  *******************/
+#define RTC_DR_YT                            ((uint32_t)0x00F00000)
+#define RTC_DR_YT_0                          ((uint32_t)0x00100000)
+#define RTC_DR_YT_1                          ((uint32_t)0x00200000)
+#define RTC_DR_YT_2                          ((uint32_t)0x00400000)
+#define RTC_DR_YT_3                          ((uint32_t)0x00800000)
+#define RTC_DR_YU                            ((uint32_t)0x000F0000)
+#define RTC_DR_YU_0                          ((uint32_t)0x00010000)
+#define RTC_DR_YU_1                          ((uint32_t)0x00020000)
+#define RTC_DR_YU_2                          ((uint32_t)0x00040000)
+#define RTC_DR_YU_3                          ((uint32_t)0x00080000)
+#define RTC_DR_WDU                           ((uint32_t)0x0000E000)
+#define RTC_DR_WDU_0                         ((uint32_t)0x00002000)
+#define RTC_DR_WDU_1                         ((uint32_t)0x00004000)
+#define RTC_DR_WDU_2                         ((uint32_t)0x00008000)
+#define RTC_DR_MT                            ((uint32_t)0x00001000)
+#define RTC_DR_MU                            ((uint32_t)0x00000F00)
+#define RTC_DR_MU_0                          ((uint32_t)0x00000100)
+#define RTC_DR_MU_1                          ((uint32_t)0x00000200)
+#define RTC_DR_MU_2                          ((uint32_t)0x00000400)
+#define RTC_DR_MU_3                          ((uint32_t)0x00000800)
+#define RTC_DR_DT                            ((uint32_t)0x00000030)
+#define RTC_DR_DT_0                          ((uint32_t)0x00000010)
+#define RTC_DR_DT_1                          ((uint32_t)0x00000020)
+#define RTC_DR_DU                            ((uint32_t)0x0000000F)
+#define RTC_DR_DU_0                          ((uint32_t)0x00000001)
+#define RTC_DR_DU_1                          ((uint32_t)0x00000002)
+#define RTC_DR_DU_2                          ((uint32_t)0x00000004)
+#define RTC_DR_DU_3                          ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_CR register  *******************/
+#define RTC_CR_COE                           ((uint32_t)0x00800000)
+#define RTC_CR_OSEL                          ((uint32_t)0x00600000)
+#define RTC_CR_OSEL_0                        ((uint32_t)0x00200000)
+#define RTC_CR_OSEL_1                        ((uint32_t)0x00400000)
+#define RTC_CR_POL                           ((uint32_t)0x00100000)
+#define RTC_CR_COSEL                         ((uint32_t)0x00080000)
+#define RTC_CR_BCK                           ((uint32_t)0x00040000)
+#define RTC_CR_SUB1H                         ((uint32_t)0x00020000)
+#define RTC_CR_ADD1H                         ((uint32_t)0x00010000)
+#define RTC_CR_TSIE                          ((uint32_t)0x00008000)
+#define RTC_CR_WUTIE                         ((uint32_t)0x00004000)
+#define RTC_CR_ALRBIE                        ((uint32_t)0x00002000)
+#define RTC_CR_ALRAIE                        ((uint32_t)0x00001000)
+#define RTC_CR_TSE                           ((uint32_t)0x00000800)
+#define RTC_CR_WUTE                          ((uint32_t)0x00000400)
+#define RTC_CR_ALRBE                         ((uint32_t)0x00000200)
+#define RTC_CR_ALRAE                         ((uint32_t)0x00000100)
+#define RTC_CR_DCE                           ((uint32_t)0x00000080)
+#define RTC_CR_FMT                           ((uint32_t)0x00000040)
+#define RTC_CR_BYPSHAD                       ((uint32_t)0x00000020)
+#define RTC_CR_REFCKON                       ((uint32_t)0x00000010)
+#define RTC_CR_TSEDGE                        ((uint32_t)0x00000008)
+#define RTC_CR_WUCKSEL                       ((uint32_t)0x00000007)
+#define RTC_CR_WUCKSEL_0                     ((uint32_t)0x00000001)
+#define RTC_CR_WUCKSEL_1                     ((uint32_t)0x00000002)
+#define RTC_CR_WUCKSEL_2                     ((uint32_t)0x00000004)
+
+/********************  Bits definition for RTC_ISR register  ******************/
+#define RTC_ISR_RECALPF                      ((uint32_t)0x00010000)
+#define RTC_ISR_TAMP3F                       ((uint32_t)0x00008000)
+#define RTC_ISR_TAMP2F                       ((uint32_t)0x00004000)
+#define RTC_ISR_TAMP1F                       ((uint32_t)0x00002000)
+#define RTC_ISR_TSOVF                        ((uint32_t)0x00001000)
+#define RTC_ISR_TSF                          ((uint32_t)0x00000800)
+#define RTC_ISR_WUTF                         ((uint32_t)0x00000400)
+#define RTC_ISR_ALRBF                        ((uint32_t)0x00000200)
+#define RTC_ISR_ALRAF                        ((uint32_t)0x00000100)
+#define RTC_ISR_INIT                         ((uint32_t)0x00000080)
+#define RTC_ISR_INITF                        ((uint32_t)0x00000040)
+#define RTC_ISR_RSF                          ((uint32_t)0x00000020)
+#define RTC_ISR_INITS                        ((uint32_t)0x00000010)
+#define RTC_ISR_SHPF                         ((uint32_t)0x00000008)
+#define RTC_ISR_WUTWF                        ((uint32_t)0x00000004)
+#define RTC_ISR_ALRBWF                       ((uint32_t)0x00000002)
+#define RTC_ISR_ALRAWF                       ((uint32_t)0x00000001)
+
+/********************  Bits definition for RTC_PRER register  *****************/
+#define RTC_PRER_PREDIV_A                    ((uint32_t)0x007F0000)
+#define RTC_PRER_PREDIV_S                    ((uint32_t)0x00007FFF)
+
+/********************  Bits definition for RTC_WUTR register  *****************/
+#define RTC_WUTR_WUT                         ((uint32_t)0x0000FFFF)
+
+/********************  Bits definition for RTC_CALIBR register  ***************/
+#define RTC_CALIBR_DCS                       ((uint32_t)0x00000080)
+#define RTC_CALIBR_DC                        ((uint32_t)0x0000001F)
+
+/********************  Bits definition for RTC_ALRMAR register  ***************/
+#define RTC_ALRMAR_MSK4                      ((uint32_t)0x80000000)
+#define RTC_ALRMAR_WDSEL                     ((uint32_t)0x40000000)
+#define RTC_ALRMAR_DT                        ((uint32_t)0x30000000)
+#define RTC_ALRMAR_DT_0                      ((uint32_t)0x10000000)
+#define RTC_ALRMAR_DT_1                      ((uint32_t)0x20000000)
+#define RTC_ALRMAR_DU                        ((uint32_t)0x0F000000)
+#define RTC_ALRMAR_DU_0                      ((uint32_t)0x01000000)
+#define RTC_ALRMAR_DU_1                      ((uint32_t)0x02000000)
+#define RTC_ALRMAR_DU_2                      ((uint32_t)0x04000000)
+#define RTC_ALRMAR_DU_3                      ((uint32_t)0x08000000)
+#define RTC_ALRMAR_MSK3                      ((uint32_t)0x00800000)
+#define RTC_ALRMAR_PM                        ((uint32_t)0x00400000)
+#define RTC_ALRMAR_HT                        ((uint32_t)0x00300000)
+#define RTC_ALRMAR_HT_0                      ((uint32_t)0x00100000)
+#define RTC_ALRMAR_HT_1                      ((uint32_t)0x00200000)
+#define RTC_ALRMAR_HU                        ((uint32_t)0x000F0000)
+#define RTC_ALRMAR_HU_0                      ((uint32_t)0x00010000)
+#define RTC_ALRMAR_HU_1                      ((uint32_t)0x00020000)
+#define RTC_ALRMAR_HU_2                      ((uint32_t)0x00040000)
+#define RTC_ALRMAR_HU_3                      ((uint32_t)0x00080000)
+#define RTC_ALRMAR_MSK2                      ((uint32_t)0x00008000)
+#define RTC_ALRMAR_MNT                       ((uint32_t)0x00007000)
+#define RTC_ALRMAR_MNT_0                     ((uint32_t)0x00001000)
+#define RTC_ALRMAR_MNT_1                     ((uint32_t)0x00002000)
+#define RTC_ALRMAR_MNT_2                     ((uint32_t)0x00004000)
+#define RTC_ALRMAR_MNU                       ((uint32_t)0x00000F00)
+#define RTC_ALRMAR_MNU_0                     ((uint32_t)0x00000100)
+#define RTC_ALRMAR_MNU_1                     ((uint32_t)0x00000200)
+#define RTC_ALRMAR_MNU_2                     ((uint32_t)0x00000400)
+#define RTC_ALRMAR_MNU_3                     ((uint32_t)0x00000800)
+#define RTC_ALRMAR_MSK1                      ((uint32_t)0x00000080)
+#define RTC_ALRMAR_ST                        ((uint32_t)0x00000070)
+#define RTC_ALRMAR_ST_0                      ((uint32_t)0x00000010)
+#define RTC_ALRMAR_ST_1                      ((uint32_t)0x00000020)
+#define RTC_ALRMAR_ST_2                      ((uint32_t)0x00000040)
+#define RTC_ALRMAR_SU                        ((uint32_t)0x0000000F)
+#define RTC_ALRMAR_SU_0                      ((uint32_t)0x00000001)
+#define RTC_ALRMAR_SU_1                      ((uint32_t)0x00000002)
+#define RTC_ALRMAR_SU_2                      ((uint32_t)0x00000004)
+#define RTC_ALRMAR_SU_3                      ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_ALRMBR register  ***************/
+#define RTC_ALRMBR_MSK4                      ((uint32_t)0x80000000)
+#define RTC_ALRMBR_WDSEL                     ((uint32_t)0x40000000)
+#define RTC_ALRMBR_DT                        ((uint32_t)0x30000000)
+#define RTC_ALRMBR_DT_0                      ((uint32_t)0x10000000)
+#define RTC_ALRMBR_DT_1                      ((uint32_t)0x20000000)
+#define RTC_ALRMBR_DU                        ((uint32_t)0x0F000000)
+#define RTC_ALRMBR_DU_0                      ((uint32_t)0x01000000)
+#define RTC_ALRMBR_DU_1                      ((uint32_t)0x02000000)
+#define RTC_ALRMBR_DU_2                      ((uint32_t)0x04000000)
+#define RTC_ALRMBR_DU_3                      ((uint32_t)0x08000000)
+#define RTC_ALRMBR_MSK3                      ((uint32_t)0x00800000)
+#define RTC_ALRMBR_PM                        ((uint32_t)0x00400000)
+#define RTC_ALRMBR_HT                        ((uint32_t)0x00300000)
+#define RTC_ALRMBR_HT_0                      ((uint32_t)0x00100000)
+#define RTC_ALRMBR_HT_1                      ((uint32_t)0x00200000)
+#define RTC_ALRMBR_HU                        ((uint32_t)0x000F0000)
+#define RTC_ALRMBR_HU_0                      ((uint32_t)0x00010000)
+#define RTC_ALRMBR_HU_1                      ((uint32_t)0x00020000)
+#define RTC_ALRMBR_HU_2                      ((uint32_t)0x00040000)
+#define RTC_ALRMBR_HU_3                      ((uint32_t)0x00080000)
+#define RTC_ALRMBR_MSK2                      ((uint32_t)0x00008000)
+#define RTC_ALRMBR_MNT                       ((uint32_t)0x00007000)
+#define RTC_ALRMBR_MNT_0                     ((uint32_t)0x00001000)
+#define RTC_ALRMBR_MNT_1                     ((uint32_t)0x00002000)
+#define RTC_ALRMBR_MNT_2                     ((uint32_t)0x00004000)
+#define RTC_ALRMBR_MNU                       ((uint32_t)0x00000F00)
+#define RTC_ALRMBR_MNU_0                     ((uint32_t)0x00000100)
+#define RTC_ALRMBR_MNU_1                     ((uint32_t)0x00000200)
+#define RTC_ALRMBR_MNU_2                     ((uint32_t)0x00000400)
+#define RTC_ALRMBR_MNU_3                     ((uint32_t)0x00000800)
+#define RTC_ALRMBR_MSK1                      ((uint32_t)0x00000080)
+#define RTC_ALRMBR_ST                        ((uint32_t)0x00000070)
+#define RTC_ALRMBR_ST_0                      ((uint32_t)0x00000010)
+#define RTC_ALRMBR_ST_1                      ((uint32_t)0x00000020)
+#define RTC_ALRMBR_ST_2                      ((uint32_t)0x00000040)
+#define RTC_ALRMBR_SU                        ((uint32_t)0x0000000F)
+#define RTC_ALRMBR_SU_0                      ((uint32_t)0x00000001)
+#define RTC_ALRMBR_SU_1                      ((uint32_t)0x00000002)
+#define RTC_ALRMBR_SU_2                      ((uint32_t)0x00000004)
+#define RTC_ALRMBR_SU_3                      ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_WPR register  ******************/
+#define RTC_WPR_KEY                          ((uint32_t)0x000000FF)
+
+/********************  Bits definition for RTC_SSR register  ******************/
+#define RTC_SSR_SS                           ((uint32_t)0x0000FFFF)
+
+/********************  Bits definition for RTC_SHIFTR register  ***************/
+#define RTC_SHIFTR_SUBFS                     ((uint32_t)0x00007FFF)
+#define RTC_SHIFTR_ADD1S                     ((uint32_t)0x80000000)
+
+/********************  Bits definition for RTC_TSTR register  *****************/
+#define RTC_TSTR_PM                          ((uint32_t)0x00400000)
+#define RTC_TSTR_HT                          ((uint32_t)0x00300000)
+#define RTC_TSTR_HT_0                        ((uint32_t)0x00100000)
+#define RTC_TSTR_HT_1                        ((uint32_t)0x00200000)
+#define RTC_TSTR_HU                          ((uint32_t)0x000F0000)
+#define RTC_TSTR_HU_0                        ((uint32_t)0x00010000)
+#define RTC_TSTR_HU_1                        ((uint32_t)0x00020000)
+#define RTC_TSTR_HU_2                        ((uint32_t)0x00040000)
+#define RTC_TSTR_HU_3                        ((uint32_t)0x00080000)
+#define RTC_TSTR_MNT                         ((uint32_t)0x00007000)
+#define RTC_TSTR_MNT_0                       ((uint32_t)0x00001000)
+#define RTC_TSTR_MNT_1                       ((uint32_t)0x00002000)
+#define RTC_TSTR_MNT_2                       ((uint32_t)0x00004000)
+#define RTC_TSTR_MNU                         ((uint32_t)0x00000F00)
+#define RTC_TSTR_MNU_0                       ((uint32_t)0x00000100)
+#define RTC_TSTR_MNU_1                       ((uint32_t)0x00000200)
+#define RTC_TSTR_MNU_2                       ((uint32_t)0x00000400)
+#define RTC_TSTR_MNU_3                       ((uint32_t)0x00000800)
+#define RTC_TSTR_ST                          ((uint32_t)0x00000070)
+#define RTC_TSTR_ST_0                        ((uint32_t)0x00000010)
+#define RTC_TSTR_ST_1                        ((uint32_t)0x00000020)
+#define RTC_TSTR_ST_2                        ((uint32_t)0x00000040)
+#define RTC_TSTR_SU                          ((uint32_t)0x0000000F)
+#define RTC_TSTR_SU_0                        ((uint32_t)0x00000001)
+#define RTC_TSTR_SU_1                        ((uint32_t)0x00000002)
+#define RTC_TSTR_SU_2                        ((uint32_t)0x00000004)
+#define RTC_TSTR_SU_3                        ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_TSDR register  *****************/
+#define RTC_TSDR_WDU                         ((uint32_t)0x0000E000)
+#define RTC_TSDR_WDU_0                       ((uint32_t)0x00002000)
+#define RTC_TSDR_WDU_1                       ((uint32_t)0x00004000)
+#define RTC_TSDR_WDU_2                       ((uint32_t)0x00008000)
+#define RTC_TSDR_MT                          ((uint32_t)0x00001000)
+#define RTC_TSDR_MU                          ((uint32_t)0x00000F00)
+#define RTC_TSDR_MU_0                        ((uint32_t)0x00000100)
+#define RTC_TSDR_MU_1                        ((uint32_t)0x00000200)
+#define RTC_TSDR_MU_2                        ((uint32_t)0x00000400)
+#define RTC_TSDR_MU_3                        ((uint32_t)0x00000800)
+#define RTC_TSDR_DT                          ((uint32_t)0x00000030)
+#define RTC_TSDR_DT_0                        ((uint32_t)0x00000010)
+#define RTC_TSDR_DT_1                        ((uint32_t)0x00000020)
+#define RTC_TSDR_DU                          ((uint32_t)0x0000000F)
+#define RTC_TSDR_DU_0                        ((uint32_t)0x00000001)
+#define RTC_TSDR_DU_1                        ((uint32_t)0x00000002)
+#define RTC_TSDR_DU_2                        ((uint32_t)0x00000004)
+#define RTC_TSDR_DU_3                        ((uint32_t)0x00000008)
+
+/********************  Bits definition for RTC_TSSSR register  ****************/
+#define RTC_TSSSR_SS                         ((uint32_t)0x0000FFFF)
+
+/********************  Bits definition for RTC_CAL register  *****************/
+#define RTC_CALR_CALP                        ((uint32_t)0x00008000)
+#define RTC_CALR_CALW8                       ((uint32_t)0x00004000)
+#define RTC_CALR_CALW16                      ((uint32_t)0x00002000)
+#define RTC_CALR_CALM                        ((uint32_t)0x000001FF)
+#define RTC_CALR_CALM_0                      ((uint32_t)0x00000001)
+#define RTC_CALR_CALM_1                      ((uint32_t)0x00000002)
+#define RTC_CALR_CALM_2                      ((uint32_t)0x00000004)
+#define RTC_CALR_CALM_3                      ((uint32_t)0x00000008)
+#define RTC_CALR_CALM_4                      ((uint32_t)0x00000010)
+#define RTC_CALR_CALM_5                      ((uint32_t)0x00000020)
+#define RTC_CALR_CALM_6                      ((uint32_t)0x00000040)
+#define RTC_CALR_CALM_7                      ((uint32_t)0x00000080)
+#define RTC_CALR_CALM_8                      ((uint32_t)0x00000100)
+
+/********************  Bits definition for RTC_TAFCR register  ****************/
+#define RTC_TAFCR_ALARMOUTTYPE               ((uint32_t)0x00040000)
+#define RTC_TAFCR_TAMPPUDIS                  ((uint32_t)0x00008000)
+#define RTC_TAFCR_TAMPPRCH                   ((uint32_t)0x00006000)
+#define RTC_TAFCR_TAMPPRCH_0                 ((uint32_t)0x00002000)
+#define RTC_TAFCR_TAMPPRCH_1                 ((uint32_t)0x00004000)
+#define RTC_TAFCR_TAMPFLT                    ((uint32_t)0x00001800)
+#define RTC_TAFCR_TAMPFLT_0                  ((uint32_t)0x00000800)
+#define RTC_TAFCR_TAMPFLT_1                  ((uint32_t)0x00001000)
+#define RTC_TAFCR_TAMPFREQ                   ((uint32_t)0x00000700)
+#define RTC_TAFCR_TAMPFREQ_0                 ((uint32_t)0x00000100)
+#define RTC_TAFCR_TAMPFREQ_1                 ((uint32_t)0x00000200)
+#define RTC_TAFCR_TAMPFREQ_2                 ((uint32_t)0x00000400)
+#define RTC_TAFCR_TAMPTS                     ((uint32_t)0x00000080)
+#define RTC_TAFCR_TAMP3TRG                   ((uint32_t)0x00000040)
+#define RTC_TAFCR_TAMP3E                     ((uint32_t)0x00000020)
+#define RTC_TAFCR_TAMP2TRG                   ((uint32_t)0x00000010)
+#define RTC_TAFCR_TAMP2E                     ((uint32_t)0x00000008)
+#define RTC_TAFCR_TAMPIE                     ((uint32_t)0x00000004)
+#define RTC_TAFCR_TAMP1TRG                   ((uint32_t)0x00000002)
+#define RTC_TAFCR_TAMP1E                     ((uint32_t)0x00000001)
+
+/********************  Bits definition for RTC_ALRMASSR register  *************/
+#define RTC_ALRMASSR_MASKSS                  ((uint32_t)0x0F000000)
+#define RTC_ALRMASSR_MASKSS_0                ((uint32_t)0x01000000)
+#define RTC_ALRMASSR_MASKSS_1                ((uint32_t)0x02000000)
+#define RTC_ALRMASSR_MASKSS_2                ((uint32_t)0x04000000)
+#define RTC_ALRMASSR_MASKSS_3                ((uint32_t)0x08000000)
+#define RTC_ALRMASSR_SS                      ((uint32_t)0x00007FFF)
+
+/********************  Bits definition for RTC_ALRMBSSR register  *************/
+#define RTC_ALRMBSSR_MASKSS                  ((uint32_t)0x0F000000)
+#define RTC_ALRMBSSR_MASKSS_0                ((uint32_t)0x01000000)
+#define RTC_ALRMBSSR_MASKSS_1                ((uint32_t)0x02000000)
+#define RTC_ALRMBSSR_MASKSS_2                ((uint32_t)0x04000000)
+#define RTC_ALRMBSSR_MASKSS_3                ((uint32_t)0x08000000)
+#define RTC_ALRMBSSR_SS                      ((uint32_t)0x00007FFF)
+
+/********************  Bits definition for RTC_BKP0R register  ****************/
+#define RTC_BKP0R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP1R register  ****************/
+#define RTC_BKP1R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP2R register  ****************/
+#define RTC_BKP2R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP3R register  ****************/
+#define RTC_BKP3R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP4R register  ****************/
+#define RTC_BKP4R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP5R register  ****************/
+#define RTC_BKP5R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP6R register  ****************/
+#define RTC_BKP6R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP7R register  ****************/
+#define RTC_BKP7R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP8R register  ****************/
+#define RTC_BKP8R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP9R register  ****************/
+#define RTC_BKP9R                            ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP10R register  ***************/
+#define RTC_BKP10R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP11R register  ***************/
+#define RTC_BKP11R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP12R register  ***************/
+#define RTC_BKP12R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP13R register  ***************/
+#define RTC_BKP13R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP14R register  ***************/
+#define RTC_BKP14R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP15R register  ***************/
+#define RTC_BKP15R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP16R register  ***************/
+#define RTC_BKP16R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP17R register  ***************/
+#define RTC_BKP17R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP18R register  ***************/
+#define RTC_BKP18R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP19R register  ***************/
+#define RTC_BKP19R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP20R register  ***************/
+#define RTC_BKP20R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP21R register  ***************/
+#define RTC_BKP21R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP22R register  ***************/
+#define RTC_BKP22R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP23R register  ***************/
+#define RTC_BKP23R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP24R register  ***************/
+#define RTC_BKP24R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP25R register  ***************/
+#define RTC_BKP25R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP26R register  ***************/
+#define RTC_BKP26R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP27R register  ***************/
+#define RTC_BKP27R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP28R register  ***************/
+#define RTC_BKP28R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP29R register  ***************/
+#define RTC_BKP29R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP30R register  ***************/
+#define RTC_BKP30R                           ((uint32_t)0xFFFFFFFF)
+
+/********************  Bits definition for RTC_BKP31R register  ***************/
+#define RTC_BKP31R                           ((uint32_t)0xFFFFFFFF)
+
+/******************** Number of backup registers ******************************/
+#define RTC_BKP_NUMBER 32
+
+/******************************************************************************/
+/*                                                                            */
+/*                     Serial Peripheral Interface (SPI)                      */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for SPI_CR1 register  ********************/
+#define  SPI_CR1_CPHA                        ((uint32_t)0x00000001)            /*!< Clock Phase */
+#define  SPI_CR1_CPOL                        ((uint32_t)0x00000002)            /*!< Clock Polarity */
+#define  SPI_CR1_MSTR                        ((uint32_t)0x00000004)            /*!< Master Selection */
+
+#define  SPI_CR1_BR                          ((uint32_t)0x00000038)            /*!< BR[2:0] bits (Baud Rate Control) */
+#define  SPI_CR1_BR_0                        ((uint32_t)0x00000008)            /*!< Bit 0 */
+#define  SPI_CR1_BR_1                        ((uint32_t)0x00000010)            /*!< Bit 1 */
+#define  SPI_CR1_BR_2                        ((uint32_t)0x00000020)            /*!< Bit 2 */
+
+#define  SPI_CR1_SPE                         ((uint32_t)0x00000040)            /*!< SPI Enable */
+#define  SPI_CR1_LSBFIRST                    ((uint32_t)0x00000080)            /*!< Frame Format */
+#define  SPI_CR1_SSI                         ((uint32_t)0x00000100)            /*!< Internal slave select */
+#define  SPI_CR1_SSM                         ((uint32_t)0x00000200)            /*!< Software slave management */
+#define  SPI_CR1_RXONLY                      ((uint32_t)0x00000400)            /*!< Receive only */
+#define  SPI_CR1_DFF                         ((uint32_t)0x00000800)            /*!< Data Frame Format */
+#define  SPI_CR1_CRCNEXT                     ((uint32_t)0x00001000)            /*!< Transmit CRC next */
+#define  SPI_CR1_CRCEN                       ((uint32_t)0x00002000)            /*!< Hardware CRC calculation enable */
+#define  SPI_CR1_BIDIOE                      ((uint32_t)0x00004000)            /*!< Output enable in bidirectional mode */
+#define  SPI_CR1_BIDIMODE                    ((uint32_t)0x00008000)            /*!< Bidirectional data mode enable */
+
+/*******************  Bit definition for SPI_CR2 register  ********************/
+#define  SPI_CR2_RXDMAEN                     ((uint32_t)0x00000001)               /*!< Rx Buffer DMA Enable */
+#define  SPI_CR2_TXDMAEN                     ((uint32_t)0x00000002)               /*!< Tx Buffer DMA Enable */
+#define  SPI_CR2_SSOE                        ((uint32_t)0x00000004)               /*!< SS Output Enable */
+#define  SPI_CR2_FRF                         ((uint32_t)0x00000010)               /*!< Frame format */
+#define  SPI_CR2_ERRIE                       ((uint32_t)0x00000020)               /*!< Error Interrupt Enable */
+#define  SPI_CR2_RXNEIE                      ((uint32_t)0x00000040)               /*!< RX buffer Not Empty Interrupt Enable */
+#define  SPI_CR2_TXEIE                       ((uint32_t)0x00000080)               /*!< Tx buffer Empty Interrupt Enable */
+
+/********************  Bit definition for SPI_SR register  ********************/
+#define  SPI_SR_RXNE                         ((uint32_t)0x00000001)               /*!< Receive buffer Not Empty */
+#define  SPI_SR_TXE                          ((uint32_t)0x00000002)               /*!< Transmit buffer Empty */
+#define  SPI_SR_CHSIDE                       ((uint32_t)0x00000004)               /*!< Channel side */
+#define  SPI_SR_UDR                          ((uint32_t)0x00000008)               /*!< Underrun flag */
+#define  SPI_SR_CRCERR                       ((uint32_t)0x00000010)               /*!< CRC Error flag */
+#define  SPI_SR_MODF                         ((uint32_t)0x00000020)               /*!< Mode fault */
+#define  SPI_SR_OVR                          ((uint32_t)0x00000040)               /*!< Overrun flag */
+#define  SPI_SR_BSY                          ((uint32_t)0x00000080)               /*!< Busy flag */
+#define  SPI_SR_FRE                          ((uint32_t)0x00000100)               /*!<Frame format error flag  */
+
+/********************  Bit definition for SPI_DR register  ********************/
+#define  SPI_DR_DR                           ((uint32_t)0x0000FFFF)            /*!< Data Register */
+
+/*******************  Bit definition for SPI_CRCPR register  ******************/
+#define  SPI_CRCPR_CRCPOLY                   ((uint32_t)0x0000FFFF)            /*!< CRC polynomial register */
+
+/******************  Bit definition for SPI_RXCRCR register  ******************/
+#define  SPI_RXCRCR_RXCRC                    ((uint32_t)0x0000FFFF)            /*!< Rx CRC Register */
+
+/******************  Bit definition for SPI_TXCRCR register  ******************/
+#define  SPI_TXCRCR_TXCRC                    ((uint32_t)0x0000FFFF)            /*!< Tx CRC Register */
+
+/******************  Bit definition for SPI_I2SCFGR register  *****************/
+#define  SPI_I2SCFGR_CHLEN                   ((uint32_t)0x00000001)            /*!<Channel length (number of bits per audio channel) */
+
+#define  SPI_I2SCFGR_DATLEN                  ((uint32_t)0x00000006)            /*!<DATLEN[1:0] bits (Data length to be transferred) */
+#define  SPI_I2SCFGR_DATLEN_0                ((uint32_t)0x00000002)            /*!<Bit 0 */
+#define  SPI_I2SCFGR_DATLEN_1                ((uint32_t)0x00000004)            /*!<Bit 1 */
+
+#define  SPI_I2SCFGR_CKPOL                   ((uint32_t)0x00000008)            /*!<steady state clock polarity */
+
+#define  SPI_I2SCFGR_I2SSTD                  ((uint32_t)0x00000030)            /*!<I2SSTD[1:0] bits (I2S standard selection) */
+#define  SPI_I2SCFGR_I2SSTD_0                ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  SPI_I2SCFGR_I2SSTD_1                ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  SPI_I2SCFGR_PCMSYNC                 ((uint32_t)0x00000080)            /*!<PCM frame synchronization */
+
+#define  SPI_I2SCFGR_I2SCFG                  ((uint32_t)0x00000300)            /*!<I2SCFG[1:0] bits (I2S configuration mode) */
+#define  SPI_I2SCFGR_I2SCFG_0                ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  SPI_I2SCFGR_I2SCFG_1                ((uint32_t)0x00000200)            /*!<Bit 1 */
+
+#define  SPI_I2SCFGR_I2SE                    ((uint32_t)0x00000400)            /*!<I2S Enable */
+#define  SPI_I2SCFGR_I2SMOD                  ((uint32_t)0x00000800)            /*!<I2S mode selection */
+
+/******************  Bit definition for SPI_I2SPR register  *******************/
+#define  SPI_I2SPR_I2SDIV                    ((uint32_t)0x000000FF)            /*!<I2S Linear prescaler */
+#define  SPI_I2SPR_ODD                       ((uint32_t)0x00000100)            /*!<Odd factor for the prescaler */
+#define  SPI_I2SPR_MCKOE                     ((uint32_t)0x00000200)            /*!<Master Clock Output Enable */
+
+/******************************************************************************/
+/*                                                                            */
+/*                       System Configuration (SYSCFG)                        */
+/*                                                                            */
+/******************************************************************************/
+/*****************  Bit definition for SYSCFG_MEMRMP register  ****************/
+#define SYSCFG_MEMRMP_MEM_MODE          ((uint32_t)0x00000003) /*!< SYSCFG_Memory Remap Config */
+#define SYSCFG_MEMRMP_MEM_MODE_0        ((uint32_t)0x00000001) /*!< Bit 0 */
+#define SYSCFG_MEMRMP_MEM_MODE_1        ((uint32_t)0x00000002) /*!< Bit 1 */
+#define SYSCFG_MEMRMP_BOOT_MODE         ((uint32_t)0x00000300) /*!< Boot mode Config */
+#define SYSCFG_MEMRMP_BOOT_MODE_0       ((uint32_t)0x00000100) /*!< Bit 0 */
+#define SYSCFG_MEMRMP_BOOT_MODE_1       ((uint32_t)0x00000200) /*!< Bit 1 */
+
+/*****************  Bit definition for SYSCFG_PMC register  *******************/
+#define SYSCFG_PMC_USB_PU               ((uint32_t)0x00000001) /*!< SYSCFG PMC */
+
+/*****************  Bit definition for SYSCFG_EXTICR1 register  ***************/
+#define SYSCFG_EXTICR1_EXTI0            ((uint32_t)0x0000000F) /*!< EXTI 0 configuration */
+#define SYSCFG_EXTICR1_EXTI1            ((uint32_t)0x000000F0) /*!< EXTI 1 configuration */
+#define SYSCFG_EXTICR1_EXTI2            ((uint32_t)0x00000F00) /*!< EXTI 2 configuration */
+#define SYSCFG_EXTICR1_EXTI3            ((uint32_t)0x0000F000) /*!< EXTI 3 configuration */
+
+/** 
+  * @brief  EXTI0 configuration  
+  */ 
+#define SYSCFG_EXTICR1_EXTI0_PA         ((uint32_t)0x00000000) /*!< PA[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PB         ((uint32_t)0x00000001) /*!< PB[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PC         ((uint32_t)0x00000002) /*!< PC[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PD         ((uint32_t)0x00000003) /*!< PD[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PE         ((uint32_t)0x00000004) /*!< PE[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PH         ((uint32_t)0x00000005) /*!< PH[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PF         ((uint32_t)0x00000006) /*!< PF[0] pin */
+#define SYSCFG_EXTICR1_EXTI0_PG         ((uint32_t)0x00000007) /*!< PG[0] pin */
+
+/** 
+  * @brief  EXTI1 configuration  
+  */ 
+#define SYSCFG_EXTICR1_EXTI1_PA         ((uint32_t)0x00000000) /*!< PA[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PB         ((uint32_t)0x00000010) /*!< PB[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PC         ((uint32_t)0x00000020) /*!< PC[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PD         ((uint32_t)0x00000030) /*!< PD[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PE         ((uint32_t)0x00000040) /*!< PE[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PH         ((uint32_t)0x00000050) /*!< PH[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PF         ((uint32_t)0x00000060) /*!< PF[1] pin */
+#define SYSCFG_EXTICR1_EXTI1_PG         ((uint32_t)0x00000070) /*!< PG[1] pin */
+
+/** 
+  * @brief  EXTI2 configuration  
+  */ 
+#define SYSCFG_EXTICR1_EXTI2_PA         ((uint32_t)0x00000000) /*!< PA[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PB         ((uint32_t)0x00000100) /*!< PB[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PC         ((uint32_t)0x00000200) /*!< PC[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PD         ((uint32_t)0x00000300) /*!< PD[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PE         ((uint32_t)0x00000400) /*!< PE[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PH         ((uint32_t)0x00000500) /*!< PH[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PF         ((uint32_t)0x00000600) /*!< PF[2] pin */
+#define SYSCFG_EXTICR1_EXTI2_PG         ((uint32_t)0x00000700) /*!< PG[2] pin */
+
+/** 
+  * @brief  EXTI3 configuration  
+  */ 
+#define SYSCFG_EXTICR1_EXTI3_PA         ((uint32_t)0x00000000) /*!< PA[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PB         ((uint32_t)0x00001000) /*!< PB[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PC         ((uint32_t)0x00002000) /*!< PC[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PD         ((uint32_t)0x00003000) /*!< PD[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PE         ((uint32_t)0x00004000) /*!< PE[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PF         ((uint32_t)0x00003000) /*!< PF[3] pin */
+#define SYSCFG_EXTICR1_EXTI3_PG         ((uint32_t)0x00004000) /*!< PG[3] pin */
+
+/*****************  Bit definition for SYSCFG_EXTICR2 register  *****************/
+#define SYSCFG_EXTICR2_EXTI4            ((uint32_t)0x0000000F) /*!< EXTI 4 configuration */
+#define SYSCFG_EXTICR2_EXTI5            ((uint32_t)0x000000F0) /*!< EXTI 5 configuration */
+#define SYSCFG_EXTICR2_EXTI6            ((uint32_t)0x00000F00) /*!< EXTI 6 configuration */
+#define SYSCFG_EXTICR2_EXTI7            ((uint32_t)0x0000F000) /*!< EXTI 7 configuration */
+
+/** 
+  * @brief  EXTI4 configuration  
+  */ 
+#define SYSCFG_EXTICR2_EXTI4_PA         ((uint32_t)0x00000000) /*!< PA[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PB         ((uint32_t)0x00000001) /*!< PB[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PC         ((uint32_t)0x00000002) /*!< PC[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PD         ((uint32_t)0x00000003) /*!< PD[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PE         ((uint32_t)0x00000004) /*!< PE[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PF         ((uint32_t)0x00000006) /*!< PF[4] pin */
+#define SYSCFG_EXTICR2_EXTI4_PG         ((uint32_t)0x00000007) /*!< PG[4] pin */
+
+/** 
+  * @brief  EXTI5 configuration  
+  */ 
+#define SYSCFG_EXTICR2_EXTI5_PA         ((uint32_t)0x00000000) /*!< PA[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PB         ((uint32_t)0x00000010) /*!< PB[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PC         ((uint32_t)0x00000020) /*!< PC[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PD         ((uint32_t)0x00000030) /*!< PD[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PE         ((uint32_t)0x00000040) /*!< PE[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PF         ((uint32_t)0x00000060) /*!< PF[5] pin */
+#define SYSCFG_EXTICR2_EXTI5_PG         ((uint32_t)0x00000070) /*!< PG[5] pin */
+
+/** 
+  * @brief  EXTI6 configuration  
+  */ 
+#define SYSCFG_EXTICR2_EXTI6_PA         ((uint32_t)0x00000000) /*!< PA[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PB         ((uint32_t)0x00000100) /*!< PB[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PC         ((uint32_t)0x00000200) /*!< PC[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PD         ((uint32_t)0x00000300) /*!< PD[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PE         ((uint32_t)0x00000400) /*!< PE[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PF         ((uint32_t)0x00000600) /*!< PF[6] pin */
+#define SYSCFG_EXTICR2_EXTI6_PG         ((uint32_t)0x00000700) /*!< PG[6] pin */
+
+/** 
+  * @brief  EXTI7 configuration  
+  */ 
+#define SYSCFG_EXTICR2_EXTI7_PA         ((uint32_t)0x00000000) /*!< PA[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PB         ((uint32_t)0x00001000) /*!< PB[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PC         ((uint32_t)0x00002000) /*!< PC[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PD         ((uint32_t)0x00003000) /*!< PD[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PE         ((uint32_t)0x00004000) /*!< PE[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PF         ((uint32_t)0x00006000) /*!< PF[7] pin */
+#define SYSCFG_EXTICR2_EXTI7_PG         ((uint32_t)0x00007000) /*!< PG[7] pin */
+
+/*****************  Bit definition for SYSCFG_EXTICR3 register  *****************/
+#define SYSCFG_EXTICR3_EXTI8            ((uint32_t)0x0000000F) /*!< EXTI 8 configuration */
+#define SYSCFG_EXTICR3_EXTI9            ((uint32_t)0x000000F0) /*!< EXTI 9 configuration */
+#define SYSCFG_EXTICR3_EXTI10           ((uint32_t)0x00000F00) /*!< EXTI 10 configuration */
+#define SYSCFG_EXTICR3_EXTI11           ((uint32_t)0x0000F000) /*!< EXTI 11 configuration */
+
+/** 
+  * @brief  EXTI8 configuration  
+  */ 
+#define SYSCFG_EXTICR3_EXTI8_PA         ((uint32_t)0x00000000) /*!< PA[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PB         ((uint32_t)0x00000001) /*!< PB[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PC         ((uint32_t)0x00000002) /*!< PC[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PD         ((uint32_t)0x00000003) /*!< PD[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PE         ((uint32_t)0x00000004) /*!< PE[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PF         ((uint32_t)0x00000006) /*!< PF[8] pin */
+#define SYSCFG_EXTICR3_EXTI8_PG         ((uint32_t)0x00000007) /*!< PG[8] pin */
+
+/** 
+  * @brief  EXTI9 configuration  
+  */ 
+#define SYSCFG_EXTICR3_EXTI9_PA         ((uint32_t)0x00000000) /*!< PA[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PB         ((uint32_t)0x00000010) /*!< PB[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PC         ((uint32_t)0x00000020) /*!< PC[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PD         ((uint32_t)0x00000030) /*!< PD[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PE         ((uint32_t)0x00000040) /*!< PE[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PF         ((uint32_t)0x00000060) /*!< PF[9] pin */
+#define SYSCFG_EXTICR3_EXTI9_PG         ((uint32_t)0x00000070) /*!< PG[9] pin */
+
+/** 
+  * @brief  EXTI10 configuration  
+  */ 
+#define SYSCFG_EXTICR3_EXTI10_PA        ((uint32_t)0x00000000) /*!< PA[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PB        ((uint32_t)0x00000100) /*!< PB[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PC        ((uint32_t)0x00000200) /*!< PC[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PD        ((uint32_t)0x00000300) /*!< PD[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PE        ((uint32_t)0x00000400) /*!< PE[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PF        ((uint32_t)0x00000600) /*!< PF[10] pin */
+#define SYSCFG_EXTICR3_EXTI10_PG        ((uint32_t)0x00000700) /*!< PG[10] pin */
+
+/** 
+  * @brief  EXTI11 configuration  
+  */ 
+#define SYSCFG_EXTICR3_EXTI11_PA        ((uint32_t)0x00000000) /*!< PA[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PB        ((uint32_t)0x00001000) /*!< PB[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PC        ((uint32_t)0x00002000) /*!< PC[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PD        ((uint32_t)0x00003000) /*!< PD[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PE        ((uint32_t)0x00004000) /*!< PE[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PF        ((uint32_t)0x00006000) /*!< PF[11] pin */
+#define SYSCFG_EXTICR3_EXTI11_PG        ((uint32_t)0x00007000) /*!< PG[11] pin */
+
+/*****************  Bit definition for SYSCFG_EXTICR4 register  *****************/
+#define SYSCFG_EXTICR4_EXTI12           ((uint32_t)0x0000000F) /*!< EXTI 12 configuration */
+#define SYSCFG_EXTICR4_EXTI13           ((uint32_t)0x000000F0) /*!< EXTI 13 configuration */
+#define SYSCFG_EXTICR4_EXTI14           ((uint32_t)0x00000F00) /*!< EXTI 14 configuration */
+#define SYSCFG_EXTICR4_EXTI15           ((uint32_t)0x0000F000) /*!< EXTI 15 configuration */
+
+/** 
+  * @brief  EXTI12 configuration  
+  */ 
+#define SYSCFG_EXTICR4_EXTI12_PA        ((uint32_t)0x00000000) /*!< PA[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PB        ((uint32_t)0x00000001) /*!< PB[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PC        ((uint32_t)0x00000002) /*!< PC[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PD        ((uint32_t)0x00000003) /*!< PD[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PE        ((uint32_t)0x00000004) /*!< PE[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PF        ((uint32_t)0x00000006) /*!< PF[12] pin */
+#define SYSCFG_EXTICR4_EXTI12_PG        ((uint32_t)0x00000007) /*!< PG[12] pin */
+
+/** 
+  * @brief  EXTI13 configuration  
+  */ 
+#define SYSCFG_EXTICR4_EXTI13_PA        ((uint32_t)0x00000000) /*!< PA[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PB        ((uint32_t)0x00000010) /*!< PB[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PC        ((uint32_t)0x00000020) /*!< PC[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PD        ((uint32_t)0x00000030) /*!< PD[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PE        ((uint32_t)0x00000040) /*!< PE[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PF        ((uint32_t)0x00000060) /*!< PF[13] pin */
+#define SYSCFG_EXTICR4_EXTI13_PG        ((uint32_t)0x00000070) /*!< PG[13] pin */
+
+/** 
+  * @brief  EXTI14 configuration  
+  */ 
+#define SYSCFG_EXTICR4_EXTI14_PA        ((uint32_t)0x00000000) /*!< PA[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PB        ((uint32_t)0x00000100) /*!< PB[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PC        ((uint32_t)0x00000200) /*!< PC[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PD        ((uint32_t)0x00000300) /*!< PD[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PE        ((uint32_t)0x00000400) /*!< PE[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PF        ((uint32_t)0x00000600) /*!< PF[14] pin */
+#define SYSCFG_EXTICR4_EXTI14_PG        ((uint32_t)0x00000700) /*!< PG[14] pin */
+
+/** 
+  * @brief  EXTI15 configuration  
+  */ 
+#define SYSCFG_EXTICR4_EXTI15_PA        ((uint32_t)0x00000000) /*!< PA[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PB        ((uint32_t)0x00001000) /*!< PB[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PC        ((uint32_t)0x00002000) /*!< PC[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PD        ((uint32_t)0x00003000) /*!< PD[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PE        ((uint32_t)0x00004000) /*!< PE[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PF        ((uint32_t)0x00006000) /*!< PF[15] pin */
+#define SYSCFG_EXTICR4_EXTI15_PG        ((uint32_t)0x00007000) /*!< PG[15] pin */
+ 
+/******************************************************************************/
+/*                                                                            */
+/*                       Routing Interface (RI)                               */
+/*                                                                            */
+/******************************************************************************/
+
+/********************  Bit definition for RI_ICR register  ********************/
+#define  RI_ICR_IC1OS                    ((uint32_t)0x0000000F) /*!< IC1OS[3:0] bits (Input Capture 1 select bits) */
+#define  RI_ICR_IC1OS_0                  ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_ICR_IC1OS_1                  ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_ICR_IC1OS_2                  ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_ICR_IC1OS_3                  ((uint32_t)0x00000008) /*!< Bit 3 */
+
+#define  RI_ICR_IC2OS                    ((uint32_t)0x000000F0) /*!< IC2OS[3:0] bits (Input Capture 2 select bits) */
+#define  RI_ICR_IC2OS_0                  ((uint32_t)0x00000010) /*!< Bit 0 */
+#define  RI_ICR_IC2OS_1                  ((uint32_t)0x00000020) /*!< Bit 1 */
+#define  RI_ICR_IC2OS_2                  ((uint32_t)0x00000040) /*!< Bit 2 */
+#define  RI_ICR_IC2OS_3                  ((uint32_t)0x00000080) /*!< Bit 3 */
+
+#define  RI_ICR_IC3OS                    ((uint32_t)0x00000F00) /*!< IC3OS[3:0] bits (Input Capture 3 select bits) */
+#define  RI_ICR_IC3OS_0                  ((uint32_t)0x00000100) /*!< Bit 0 */
+#define  RI_ICR_IC3OS_1                  ((uint32_t)0x00000200) /*!< Bit 1 */
+#define  RI_ICR_IC3OS_2                  ((uint32_t)0x00000400) /*!< Bit 2 */
+#define  RI_ICR_IC3OS_3                  ((uint32_t)0x00000800) /*!< Bit 3 */
+
+#define  RI_ICR_IC4OS                    ((uint32_t)0x0000F000) /*!< IC4OS[3:0] bits (Input Capture 4 select bits) */
+#define  RI_ICR_IC4OS_0                  ((uint32_t)0x00001000) /*!< Bit 0 */
+#define  RI_ICR_IC4OS_1                  ((uint32_t)0x00002000) /*!< Bit 1 */
+#define  RI_ICR_IC4OS_2                  ((uint32_t)0x00004000) /*!< Bit 2 */
+#define  RI_ICR_IC4OS_3                  ((uint32_t)0x00008000) /*!< Bit 3 */
+
+#define  RI_ICR_TIM                     ((uint32_t)0x00030000) /*!< TIM[3:0] bits (Timers select bits) */
+#define  RI_ICR_TIM_0                   ((uint32_t)0x00010000) /*!< Bit 0 */
+#define  RI_ICR_TIM_1                   ((uint32_t)0x00020000) /*!< Bit 1 */
+
+#define  RI_ICR_IC1                     ((uint32_t)0x00040000) /*!< Input capture 1 */
+#define  RI_ICR_IC2                     ((uint32_t)0x00080000) /*!< Input capture 2 */
+#define  RI_ICR_IC3                     ((uint32_t)0x00100000) /*!< Input capture 3 */
+#define  RI_ICR_IC4                     ((uint32_t)0x00200000) /*!< Input capture 4 */
+
+/********************  Bit definition for RI_ASCR1 register  ********************/
+#define  RI_ASCR1_CH                    ((uint32_t)0x7BFDFFFF) /*!< AS_CH[25:18] & AS_CH[15:0] bits ( Analog switches selection bits) */
+#define  RI_ASCR1_CH_0                  ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_ASCR1_CH_1                  ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_ASCR1_CH_2                  ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_ASCR1_CH_3                  ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_ASCR1_CH_4                  ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_ASCR1_CH_5                  ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_ASCR1_CH_6                  ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_ASCR1_CH_7                  ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_ASCR1_CH_8                  ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_ASCR1_CH_9                  ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_ASCR1_CH_10                 ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_ASCR1_CH_11                 ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_ASCR1_CH_12                 ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_ASCR1_CH_13                 ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_ASCR1_CH_14                 ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_ASCR1_CH_15                 ((uint32_t)0x00008000) /*!< Bit 15 */
+#define  RI_ASCR1_CH_31                 ((uint32_t)0x00010000) /*!< Bit 16 */
+#define  RI_ASCR1_CH_18                 ((uint32_t)0x00040000) /*!< Bit 18 */
+#define  RI_ASCR1_CH_19                 ((uint32_t)0x00080000) /*!< Bit 19 */
+#define  RI_ASCR1_CH_20                 ((uint32_t)0x00100000) /*!< Bit 20 */
+#define  RI_ASCR1_CH_21                 ((uint32_t)0x00200000) /*!< Bit 21 */
+#define  RI_ASCR1_CH_22                 ((uint32_t)0x00400000) /*!< Bit 22 */
+#define  RI_ASCR1_CH_23                 ((uint32_t)0x00800000) /*!< Bit 23 */
+#define  RI_ASCR1_CH_24                 ((uint32_t)0x01000000) /*!< Bit 24 */
+#define  RI_ASCR1_CH_25                 ((uint32_t)0x02000000) /*!< Bit 25 */
+#define  RI_ASCR1_VCOMP                 ((uint32_t)0x04000000) /*!< ADC analog switch selection for internal node to COMP1 */
+#define  RI_ASCR1_CH_27                 ((uint32_t)0x00400000) /*!< Bit 27 */
+#define  RI_ASCR1_CH_28                 ((uint32_t)0x00800000) /*!< Bit 28 */
+#define  RI_ASCR1_CH_29                 ((uint32_t)0x01000000) /*!< Bit 29 */
+#define  RI_ASCR1_CH_30                 ((uint32_t)0x02000000) /*!< Bit 30 */
+#define  RI_ASCR1_SCM                   ((uint32_t)0x80000000) /*!< I/O Switch control mode */
+
+/********************  Bit definition for RI_ASCR2 register  ********************/
+#define  RI_ASCR2_GR10_1                ((uint32_t)0x00000001) /*!< GR10-1 selection bit */
+#define  RI_ASCR2_GR10_2                ((uint32_t)0x00000002) /*!< GR10-2 selection bit */
+#define  RI_ASCR2_GR10_3                ((uint32_t)0x00000004) /*!< GR10-3 selection bit */
+#define  RI_ASCR2_GR10_4                ((uint32_t)0x00000008) /*!< GR10-4 selection bit */
+#define  RI_ASCR2_GR6_1                 ((uint32_t)0x00000010) /*!< GR6-1 selection bit */
+#define  RI_ASCR2_GR6_2                 ((uint32_t)0x00000020) /*!< GR6-2 selection bit */
+#define  RI_ASCR2_GR5_1                 ((uint32_t)0x00000040) /*!< GR5-1 selection bit */
+#define  RI_ASCR2_GR5_2                 ((uint32_t)0x00000080) /*!< GR5-2 selection bit */
+#define  RI_ASCR2_GR5_3                 ((uint32_t)0x00000100) /*!< GR5-3 selection bit */
+#define  RI_ASCR2_GR4_1                 ((uint32_t)0x00000200) /*!< GR4-1 selection bit */
+#define  RI_ASCR2_GR4_2                 ((uint32_t)0x00000400) /*!< GR4-2 selection bit */
+#define  RI_ASCR2_GR4_3                 ((uint32_t)0x00000800) /*!< GR4-3 selection bit */
+#define  RI_ASCR2_GR4_4                 ((uint32_t)0x00008000) /*!< GR4-4 selection bit */
+#define  RI_ASCR2_CH0b                  ((uint32_t)0x00010000) /*!< CH0b selection bit */
+#define  RI_ASCR2_GR6_3                 ((uint32_t)0x08000000) /*!< GR6-3 selection bit */
+#define  RI_ASCR2_GR6_4                 ((uint32_t)0x10000000) /*!< GR6-4 selection bit */
+
+/********************  Bit definition for RI_HYSCR1 register  ********************/
+#define  RI_HYSCR1_PA                   ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A Hysteresis selection */
+#define  RI_HYSCR1_PA_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_HYSCR1_PA_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_HYSCR1_PA_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_HYSCR1_PA_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_HYSCR1_PA_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_HYSCR1_PA_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_HYSCR1_PA_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_HYSCR1_PA_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_HYSCR1_PA_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_HYSCR1_PA_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_HYSCR1_PA_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_HYSCR1_PA_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_HYSCR1_PA_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_HYSCR1_PA_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_HYSCR1_PA_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_HYSCR1_PA_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+#define  RI_HYSCR1_PB                   ((uint32_t)0xFFFF0000) /*!< PB[15:0] Port B Hysteresis selection */
+#define  RI_HYSCR1_PB_0                 ((uint32_t)0x00010000) /*!< Bit 0 */
+#define  RI_HYSCR1_PB_1                 ((uint32_t)0x00020000) /*!< Bit 1 */
+#define  RI_HYSCR1_PB_2                 ((uint32_t)0x00040000) /*!< Bit 2 */
+#define  RI_HYSCR1_PB_3                 ((uint32_t)0x00080000) /*!< Bit 3 */
+#define  RI_HYSCR1_PB_4                 ((uint32_t)0x00100000) /*!< Bit 4 */
+#define  RI_HYSCR1_PB_5                 ((uint32_t)0x00200000) /*!< Bit 5 */
+#define  RI_HYSCR1_PB_6                 ((uint32_t)0x00400000) /*!< Bit 6 */
+#define  RI_HYSCR1_PB_7                 ((uint32_t)0x00800000) /*!< Bit 7 */
+#define  RI_HYSCR1_PB_8                 ((uint32_t)0x01000000) /*!< Bit 8 */
+#define  RI_HYSCR1_PB_9                 ((uint32_t)0x02000000) /*!< Bit 9 */
+#define  RI_HYSCR1_PB_10                ((uint32_t)0x04000000) /*!< Bit 10 */
+#define  RI_HYSCR1_PB_11                ((uint32_t)0x08000000) /*!< Bit 11 */
+#define  RI_HYSCR1_PB_12                ((uint32_t)0x10000000) /*!< Bit 12 */
+#define  RI_HYSCR1_PB_13                ((uint32_t)0x20000000) /*!< Bit 13 */
+#define  RI_HYSCR1_PB_14                ((uint32_t)0x40000000) /*!< Bit 14 */
+#define  RI_HYSCR1_PB_15                ((uint32_t)0x80000000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_HYSCR2 register  ********************/
+#define  RI_HYSCR2_PC                   ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C Hysteresis selection */
+#define  RI_HYSCR2_PC_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_HYSCR2_PC_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_HYSCR2_PC_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_HYSCR2_PC_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_HYSCR2_PC_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_HYSCR2_PC_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_HYSCR2_PC_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_HYSCR2_PC_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_HYSCR2_PC_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_HYSCR2_PC_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_HYSCR2_PC_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_HYSCR2_PC_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_HYSCR2_PC_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_HYSCR2_PC_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_HYSCR2_PC_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_HYSCR2_PC_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+#define  RI_HYSCR2_PD                   ((uint32_t)0xFFFF0000) /*!< PD[15:0] Port D Hysteresis selection */
+#define  RI_HYSCR2_PD_0                 ((uint32_t)0x00010000) /*!< Bit 0 */
+#define  RI_HYSCR2_PD_1                 ((uint32_t)0x00020000) /*!< Bit 1 */
+#define  RI_HYSCR2_PD_2                 ((uint32_t)0x00040000) /*!< Bit 2 */
+#define  RI_HYSCR2_PD_3                 ((uint32_t)0x00080000) /*!< Bit 3 */
+#define  RI_HYSCR2_PD_4                 ((uint32_t)0x00100000) /*!< Bit 4 */
+#define  RI_HYSCR2_PD_5                 ((uint32_t)0x00200000) /*!< Bit 5 */
+#define  RI_HYSCR2_PD_6                 ((uint32_t)0x00400000) /*!< Bit 6 */
+#define  RI_HYSCR2_PD_7                 ((uint32_t)0x00800000) /*!< Bit 7 */
+#define  RI_HYSCR2_PD_8                 ((uint32_t)0x01000000) /*!< Bit 8 */
+#define  RI_HYSCR2_PD_9                 ((uint32_t)0x02000000) /*!< Bit 9 */
+#define  RI_HYSCR2_PD_10                ((uint32_t)0x04000000) /*!< Bit 10 */
+#define  RI_HYSCR2_PD_11                ((uint32_t)0x08000000) /*!< Bit 11 */
+#define  RI_HYSCR2_PD_12                ((uint32_t)0x10000000) /*!< Bit 12 */
+#define  RI_HYSCR2_PD_13                ((uint32_t)0x20000000) /*!< Bit 13 */
+#define  RI_HYSCR2_PD_14                ((uint32_t)0x40000000) /*!< Bit 14 */
+#define  RI_HYSCR2_PD_15                ((uint32_t)0x80000000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_HYSCR3 register  ********************/
+#define  RI_HYSCR3_PE                   ((uint32_t)0x0000FFFF) /*!< PE[15:0] Port E Hysteresis selection */
+#define  RI_HYSCR3_PE_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_HYSCR3_PE_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_HYSCR3_PE_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_HYSCR3_PE_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_HYSCR3_PE_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_HYSCR3_PE_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_HYSCR3_PE_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_HYSCR3_PE_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_HYSCR3_PE_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_HYSCR3_PE_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_HYSCR3_PE_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_HYSCR3_PE_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_HYSCR3_PE_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_HYSCR3_PE_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_HYSCR3_PE_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_HYSCR3_PE_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_ASMR1 register  ********************/
+#define  RI_ASMR1_PA                   ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A selection*/
+#define  RI_ASMR1_PA_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_ASMR1_PA_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_ASMR1_PA_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_ASMR1_PA_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_ASMR1_PA_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_ASMR1_PA_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_ASMR1_PA_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_ASMR1_PA_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_ASMR1_PA_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_ASMR1_PA_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_ASMR1_PA_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_ASMR1_PA_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_ASMR1_PA_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_ASMR1_PA_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_ASMR1_PA_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_ASMR1_PA_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CMR1 register  ********************/
+#define  RI_CMR1_PA                    ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A selection*/
+#define  RI_CMR1_PA_0                  ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CMR1_PA_1                  ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CMR1_PA_2                  ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CMR1_PA_3                  ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CMR1_PA_4                  ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CMR1_PA_5                  ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CMR1_PA_6                  ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CMR1_PA_7                  ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CMR1_PA_8                  ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CMR1_PA_9                  ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CMR1_PA_10                 ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CMR1_PA_11                 ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CMR1_PA_12                 ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CMR1_PA_13                 ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CMR1_PA_14                 ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CMR1_PA_15                 ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CICR1 register  ********************/
+#define  RI_CICR1_PA                   ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A selection*/
+#define  RI_CICR1_PA_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CICR1_PA_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CICR1_PA_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CICR1_PA_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CICR1_PA_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CICR1_PA_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CICR1_PA_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CICR1_PA_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CICR1_PA_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CICR1_PA_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CICR1_PA_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CICR1_PA_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CICR1_PA_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CICR1_PA_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CICR1_PA_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CICR1_PA_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_ASMR2 register  ********************/
+#define  RI_ASMR2_PB                   ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B selection */
+#define  RI_ASMR2_PB_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_ASMR2_PB_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_ASMR2_PB_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_ASMR2_PB_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_ASMR2_PB_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_ASMR2_PB_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_ASMR2_PB_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_ASMR2_PB_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_ASMR2_PB_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_ASMR2_PB_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_ASMR2_PB_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_ASMR2_PB_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_ASMR2_PB_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_ASMR2_PB_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_ASMR2_PB_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_ASMR2_PB_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CMR2 register  ********************/
+#define  RI_CMR2_PB                    ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B selection */
+#define  RI_CMR2_PB_0                  ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CMR2_PB_1                  ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CMR2_PB_2                  ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CMR2_PB_3                  ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CMR2_PB_4                  ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CMR2_PB_5                  ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CMR2_PB_6                  ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CMR2_PB_7                  ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CMR2_PB_8                  ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CMR2_PB_9                  ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CMR2_PB_10                 ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CMR2_PB_11                 ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CMR2_PB_12                 ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CMR2_PB_13                 ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CMR2_PB_14                 ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CMR2_PB_15                 ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CICR2 register  ********************/
+#define  RI_CICR2_PB                   ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B selection */
+#define  RI_CICR2_PB_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CICR2_PB_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CICR2_PB_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CICR2_PB_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CICR2_PB_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CICR2_PB_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CICR2_PB_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CICR2_PB_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CICR2_PB_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CICR2_PB_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CICR2_PB_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CICR2_PB_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CICR2_PB_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CICR2_PB_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CICR2_PB_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CICR2_PB_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_ASMR3 register  ********************/
+#define  RI_ASMR3_PC                   ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C selection */
+#define  RI_ASMR3_PC_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_ASMR3_PC_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_ASMR3_PC_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_ASMR3_PC_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_ASMR3_PC_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_ASMR3_PC_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_ASMR3_PC_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_ASMR3_PC_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_ASMR3_PC_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_ASMR3_PC_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_ASMR3_PC_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_ASMR3_PC_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_ASMR3_PC_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_ASMR3_PC_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_ASMR3_PC_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_ASMR3_PC_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CMR3 register  ********************/
+#define  RI_CMR3_PC                    ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C selection */
+#define  RI_CMR3_PC_0                  ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CMR3_PC_1                  ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CMR3_PC_2                  ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CMR3_PC_3                  ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CMR3_PC_4                  ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CMR3_PC_5                  ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CMR3_PC_6                  ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CMR3_PC_7                  ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CMR3_PC_8                  ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CMR3_PC_9                  ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CMR3_PC_10                 ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CMR3_PC_11                 ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CMR3_PC_12                 ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CMR3_PC_13                 ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CMR3_PC_14                 ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CMR3_PC_15                 ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/********************  Bit definition for RI_CICR3 register  ********************/
+#define  RI_CICR3_PC                   ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C selection */
+#define  RI_CICR3_PC_0                 ((uint32_t)0x00000001) /*!< Bit 0 */
+#define  RI_CICR3_PC_1                 ((uint32_t)0x00000002) /*!< Bit 1 */
+#define  RI_CICR3_PC_2                 ((uint32_t)0x00000004) /*!< Bit 2 */
+#define  RI_CICR3_PC_3                 ((uint32_t)0x00000008) /*!< Bit 3 */
+#define  RI_CICR3_PC_4                 ((uint32_t)0x00000010) /*!< Bit 4 */
+#define  RI_CICR3_PC_5                 ((uint32_t)0x00000020) /*!< Bit 5 */
+#define  RI_CICR3_PC_6                 ((uint32_t)0x00000040) /*!< Bit 6 */
+#define  RI_CICR3_PC_7                 ((uint32_t)0x00000080) /*!< Bit 7 */
+#define  RI_CICR3_PC_8                 ((uint32_t)0x00000100) /*!< Bit 8 */
+#define  RI_CICR3_PC_9                 ((uint32_t)0x00000200) /*!< Bit 9 */
+#define  RI_CICR3_PC_10                ((uint32_t)0x00000400) /*!< Bit 10 */
+#define  RI_CICR3_PC_11                ((uint32_t)0x00000800) /*!< Bit 11 */
+#define  RI_CICR3_PC_12                ((uint32_t)0x00001000) /*!< Bit 12 */
+#define  RI_CICR3_PC_13                ((uint32_t)0x00002000) /*!< Bit 13 */
+#define  RI_CICR3_PC_14                ((uint32_t)0x00004000) /*!< Bit 14 */
+#define  RI_CICR3_PC_15                ((uint32_t)0x00008000) /*!< Bit 15 */
+
+/******************************************************************************/
+/*                                                                            */
+/*                               Timers (TIM)                                 */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for TIM_CR1 register  ********************/
+#define  TIM_CR1_CEN                         ((uint32_t)0x00000001)            /*!<Counter enable */
+#define  TIM_CR1_UDIS                        ((uint32_t)0x00000002)            /*!<Update disable */
+#define  TIM_CR1_URS                         ((uint32_t)0x00000004)            /*!<Update request source */
+#define  TIM_CR1_OPM                         ((uint32_t)0x00000008)            /*!<One pulse mode */
+#define  TIM_CR1_DIR                         ((uint32_t)0x00000010)            /*!<Direction */
+
+#define  TIM_CR1_CMS                         ((uint32_t)0x00000060)            /*!<CMS[1:0] bits (Center-aligned mode selection) */
+#define  TIM_CR1_CMS_0                       ((uint32_t)0x00000020)            /*!<Bit 0 */
+#define  TIM_CR1_CMS_1                       ((uint32_t)0x00000040)            /*!<Bit 1 */
+
+#define  TIM_CR1_ARPE                        ((uint32_t)0x00000080)            /*!<Auto-reload preload enable */
+
+#define  TIM_CR1_CKD                         ((uint32_t)0x00000300)            /*!<CKD[1:0] bits (clock division) */
+#define  TIM_CR1_CKD_0                       ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  TIM_CR1_CKD_1                       ((uint32_t)0x00000200)            /*!<Bit 1 */
+
+/*******************  Bit definition for TIM_CR2 register  ********************/
+#define  TIM_CR2_CCDS                        ((uint32_t)0x00000008)            /*!<Capture/Compare DMA Selection */
+
+#define  TIM_CR2_MMS                         ((uint32_t)0x00000070)            /*!<MMS[2:0] bits (Master Mode Selection) */
+#define  TIM_CR2_MMS_0                       ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_CR2_MMS_1                       ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_CR2_MMS_2                       ((uint32_t)0x00000040)            /*!<Bit 2 */
+
+#define  TIM_CR2_TI1S                        ((uint32_t)0x00000080)            /*!<TI1 Selection */
+
+/*******************  Bit definition for TIM_SMCR register  *******************/
+#define  TIM_SMCR_SMS                        ((uint32_t)0x00000007)            /*!<SMS[2:0] bits (Slave mode selection) */
+#define  TIM_SMCR_SMS_0                      ((uint32_t)0x00000001)            /*!<Bit 0 */
+#define  TIM_SMCR_SMS_1                      ((uint32_t)0x00000002)            /*!<Bit 1 */
+#define  TIM_SMCR_SMS_2                      ((uint32_t)0x00000004)            /*!<Bit 2 */
+
+#define  TIM_SMCR_OCCS                       ((uint32_t)0x00000008)            /*!< OCREF clear selection */
+
+#define  TIM_SMCR_TS                         ((uint32_t)0x00000070)            /*!<TS[2:0] bits (Trigger selection) */
+#define  TIM_SMCR_TS_0                       ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_SMCR_TS_1                       ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_SMCR_TS_2                       ((uint32_t)0x00000040)            /*!<Bit 2 */
+
+#define  TIM_SMCR_MSM                        ((uint32_t)0x00000080)            /*!<Master/slave mode */
+
+#define  TIM_SMCR_ETF                        ((uint32_t)0x00000F00)            /*!<ETF[3:0] bits (External trigger filter) */
+#define  TIM_SMCR_ETF_0                      ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  TIM_SMCR_ETF_1                      ((uint32_t)0x00000200)            /*!<Bit 1 */
+#define  TIM_SMCR_ETF_2                      ((uint32_t)0x00000400)            /*!<Bit 2 */
+#define  TIM_SMCR_ETF_3                      ((uint32_t)0x00000800)            /*!<Bit 3 */
+
+#define  TIM_SMCR_ETPS                       ((uint32_t)0x00003000)            /*!<ETPS[1:0] bits (External trigger prescaler) */
+#define  TIM_SMCR_ETPS_0                     ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  TIM_SMCR_ETPS_1                     ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  TIM_SMCR_ECE                        ((uint32_t)0x00004000)            /*!<External clock enable */
+#define  TIM_SMCR_ETP                        ((uint32_t)0x00008000)            /*!<External trigger polarity */
+
+/*******************  Bit definition for TIM_DIER register  *******************/
+#define  TIM_DIER_UIE                        ((uint32_t)0x00000001)            /*!<Update interrupt enable */
+#define  TIM_DIER_CC1IE                      ((uint32_t)0x00000002)            /*!<Capture/Compare 1 interrupt enable */
+#define  TIM_DIER_CC2IE                      ((uint32_t)0x00000004)            /*!<Capture/Compare 2 interrupt enable */
+#define  TIM_DIER_CC3IE                      ((uint32_t)0x00000008)            /*!<Capture/Compare 3 interrupt enable */
+#define  TIM_DIER_CC4IE                      ((uint32_t)0x00000010)            /*!<Capture/Compare 4 interrupt enable */
+#define  TIM_DIER_TIE                        ((uint32_t)0x00000040)            /*!<Trigger interrupt enable */
+#define  TIM_DIER_UDE                        ((uint32_t)0x00000100)            /*!<Update DMA request enable */
+#define  TIM_DIER_CC1DE                      ((uint32_t)0x00000200)            /*!<Capture/Compare 1 DMA request enable */
+#define  TIM_DIER_CC2DE                      ((uint32_t)0x00000400)            /*!<Capture/Compare 2 DMA request enable */
+#define  TIM_DIER_CC3DE                      ((uint32_t)0x00000800)            /*!<Capture/Compare 3 DMA request enable */
+#define  TIM_DIER_CC4DE                      ((uint32_t)0x00001000)            /*!<Capture/Compare 4 DMA request enable */
+#define  TIM_DIER_COMDE                      ((uint16_t)0x2000)            /*!<COM DMA request enable */
+#define  TIM_DIER_TDE                        ((uint32_t)0x00004000)            /*!<Trigger DMA request enable */
+
+/********************  Bit definition for TIM_SR register  ********************/
+#define  TIM_SR_UIF                          ((uint32_t)0x00000001)            /*!<Update interrupt Flag */
+#define  TIM_SR_CC1IF                        ((uint32_t)0x00000002)            /*!<Capture/Compare 1 interrupt Flag */
+#define  TIM_SR_CC2IF                        ((uint32_t)0x00000004)            /*!<Capture/Compare 2 interrupt Flag */
+#define  TIM_SR_CC3IF                        ((uint32_t)0x00000008)            /*!<Capture/Compare 3 interrupt Flag */
+#define  TIM_SR_CC4IF                        ((uint32_t)0x00000010)            /*!<Capture/Compare 4 interrupt Flag */
+#define  TIM_SR_TIF                          ((uint32_t)0x00000040)            /*!<Trigger interrupt Flag */
+#define  TIM_SR_CC1OF                        ((uint32_t)0x00000200)            /*!<Capture/Compare 1 Overcapture Flag */
+#define  TIM_SR_CC2OF                        ((uint32_t)0x00000400)            /*!<Capture/Compare 2 Overcapture Flag */
+#define  TIM_SR_CC3OF                        ((uint32_t)0x00000800)            /*!<Capture/Compare 3 Overcapture Flag */
+#define  TIM_SR_CC4OF                        ((uint32_t)0x00001000)            /*!<Capture/Compare 4 Overcapture Flag */
+
+/*******************  Bit definition for TIM_EGR register  ********************/
+#define  TIM_EGR_UG                          ((uint32_t)0x00000001)               /*!<Update Generation */
+#define  TIM_EGR_CC1G                        ((uint32_t)0x00000002)               /*!<Capture/Compare 1 Generation */
+#define  TIM_EGR_CC2G                        ((uint32_t)0x00000004)               /*!<Capture/Compare 2 Generation */
+#define  TIM_EGR_CC3G                        ((uint32_t)0x00000008)               /*!<Capture/Compare 3 Generation */
+#define  TIM_EGR_CC4G                        ((uint32_t)0x00000010)               /*!<Capture/Compare 4 Generation */
+#define  TIM_EGR_TG                          ((uint32_t)0x00000040)               /*!<Trigger Generation */
+                   
+/******************  Bit definition for TIM_CCMR1 register  *******************/
+#define  TIM_CCMR1_CC1S                      ((uint32_t)0x00000003)            /*!<CC1S[1:0] bits (Capture/Compare 1 Selection) */
+#define  TIM_CCMR1_CC1S_0                    ((uint32_t)0x00000001)            /*!<Bit 0 */
+#define  TIM_CCMR1_CC1S_1                    ((uint32_t)0x00000002)            /*!<Bit 1 */
+
+#define  TIM_CCMR1_OC1FE                     ((uint32_t)0x00000004)            /*!<Output Compare 1 Fast enable */
+#define  TIM_CCMR1_OC1PE                     ((uint32_t)0x00000008)            /*!<Output Compare 1 Preload enable */
+
+#define  TIM_CCMR1_OC1M                      ((uint32_t)0x00000070)            /*!<OC1M[2:0] bits (Output Compare 1 Mode) */
+#define  TIM_CCMR1_OC1M_0                    ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_CCMR1_OC1M_1                    ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_CCMR1_OC1M_2                    ((uint32_t)0x00000040)            /*!<Bit 2 */
+
+#define  TIM_CCMR1_OC1CE                     ((uint32_t)0x00000080)            /*!<Output Compare 1Clear Enable */
+
+#define  TIM_CCMR1_CC2S                      ((uint32_t)0x00000300)            /*!<CC2S[1:0] bits (Capture/Compare 2 Selection) */
+#define  TIM_CCMR1_CC2S_0                    ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  TIM_CCMR1_CC2S_1                    ((uint32_t)0x00000200)            /*!<Bit 1 */
+
+#define  TIM_CCMR1_OC2FE                     ((uint32_t)0x00000400)            /*!<Output Compare 2 Fast enable */
+#define  TIM_CCMR1_OC2PE                     ((uint32_t)0x00000800)            /*!<Output Compare 2 Preload enable */
+
+#define  TIM_CCMR1_OC2M                      ((uint32_t)0x00007000)            /*!<OC2M[2:0] bits (Output Compare 2 Mode) */
+#define  TIM_CCMR1_OC2M_0                    ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  TIM_CCMR1_OC2M_1                    ((uint32_t)0x00002000)            /*!<Bit 1 */
+#define  TIM_CCMR1_OC2M_2                    ((uint32_t)0x00004000)            /*!<Bit 2 */
+
+#define  TIM_CCMR1_OC2CE                     ((uint32_t)0x00008000)            /*!<Output Compare 2 Clear Enable */
+
+/*----------------------------------------------------------------------------*/
+
+#define  TIM_CCMR1_IC1PSC                    ((uint32_t)0x0000000C)            /*!<IC1PSC[1:0] bits (Input Capture 1 Prescaler) */
+#define  TIM_CCMR1_IC1PSC_0                  ((uint32_t)0x00000004)            /*!<Bit 0 */
+#define  TIM_CCMR1_IC1PSC_1                  ((uint32_t)0x00000008)            /*!<Bit 1 */
+
+#define  TIM_CCMR1_IC1F                      ((uint32_t)0x000000F0)            /*!<IC1F[3:0] bits (Input Capture 1 Filter) */
+#define  TIM_CCMR1_IC1F_0                    ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_CCMR1_IC1F_1                    ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_CCMR1_IC1F_2                    ((uint32_t)0x00000040)            /*!<Bit 2 */
+#define  TIM_CCMR1_IC1F_3                    ((uint32_t)0x00000080)            /*!<Bit 3 */
+
+#define  TIM_CCMR1_IC2PSC                    ((uint32_t)0x00000C00)            /*!<IC2PSC[1:0] bits (Input Capture 2 Prescaler) */
+#define  TIM_CCMR1_IC2PSC_0                  ((uint32_t)0x00000400)            /*!<Bit 0 */
+#define  TIM_CCMR1_IC2PSC_1                  ((uint32_t)0x00000800)            /*!<Bit 1 */
+
+#define  TIM_CCMR1_IC2F                      ((uint32_t)0x0000F000)            /*!<IC2F[3:0] bits (Input Capture 2 Filter) */
+#define  TIM_CCMR1_IC2F_0                    ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  TIM_CCMR1_IC2F_1                    ((uint32_t)0x00002000)            /*!<Bit 1 */
+#define  TIM_CCMR1_IC2F_2                    ((uint32_t)0x00004000)            /*!<Bit 2 */
+#define  TIM_CCMR1_IC2F_3                    ((uint32_t)0x00008000)            /*!<Bit 3 */
+
+/******************  Bit definition for TIM_CCMR2 register  *******************/
+#define  TIM_CCMR2_CC3S                      ((uint32_t)0x00000003)            /*!<CC3S[1:0] bits (Capture/Compare 3 Selection) */
+#define  TIM_CCMR2_CC3S_0                    ((uint32_t)0x00000001)            /*!<Bit 0 */
+#define  TIM_CCMR2_CC3S_1                    ((uint32_t)0x00000002)            /*!<Bit 1 */
+
+#define  TIM_CCMR2_OC3FE                     ((uint32_t)0x00000004)            /*!<Output Compare 3 Fast enable */
+#define  TIM_CCMR2_OC3PE                     ((uint32_t)0x00000008)            /*!<Output Compare 3 Preload enable */
+
+#define  TIM_CCMR2_OC3M                      ((uint32_t)0x00000070)            /*!<OC3M[2:0] bits (Output Compare 3 Mode) */
+#define  TIM_CCMR2_OC3M_0                    ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_CCMR2_OC3M_1                    ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_CCMR2_OC3M_2                    ((uint32_t)0x00000040)            /*!<Bit 2 */
+
+#define  TIM_CCMR2_OC3CE                     ((uint32_t)0x00000080)            /*!<Output Compare 3 Clear Enable */
+
+#define  TIM_CCMR2_CC4S                      ((uint32_t)0x00000300)            /*!<CC4S[1:0] bits (Capture/Compare 4 Selection) */
+#define  TIM_CCMR2_CC4S_0                    ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  TIM_CCMR2_CC4S_1                    ((uint32_t)0x00000200)            /*!<Bit 1 */
+
+#define  TIM_CCMR2_OC4FE                     ((uint32_t)0x00000400)            /*!<Output Compare 4 Fast enable */
+#define  TIM_CCMR2_OC4PE                     ((uint32_t)0x00000800)            /*!<Output Compare 4 Preload enable */
+
+#define  TIM_CCMR2_OC4M                      ((uint32_t)0x00007000)            /*!<OC4M[2:0] bits (Output Compare 4 Mode) */
+#define  TIM_CCMR2_OC4M_0                    ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  TIM_CCMR2_OC4M_1                    ((uint32_t)0x00002000)            /*!<Bit 1 */
+#define  TIM_CCMR2_OC4M_2                    ((uint32_t)0x00004000)            /*!<Bit 2 */
+
+#define  TIM_CCMR2_OC4CE                     ((uint32_t)0x00008000)            /*!<Output Compare 4 Clear Enable */
+
+/*----------------------------------------------------------------------------*/
+
+#define  TIM_CCMR2_IC3PSC                    ((uint32_t)0x0000000C)            /*!<IC3PSC[1:0] bits (Input Capture 3 Prescaler) */
+#define  TIM_CCMR2_IC3PSC_0                  ((uint32_t)0x00000004)            /*!<Bit 0 */
+#define  TIM_CCMR2_IC3PSC_1                  ((uint32_t)0x00000008)            /*!<Bit 1 */
+
+#define  TIM_CCMR2_IC3F                      ((uint32_t)0x000000F0)            /*!<IC3F[3:0] bits (Input Capture 3 Filter) */
+#define  TIM_CCMR2_IC3F_0                    ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  TIM_CCMR2_IC3F_1                    ((uint32_t)0x00000020)            /*!<Bit 1 */
+#define  TIM_CCMR2_IC3F_2                    ((uint32_t)0x00000040)            /*!<Bit 2 */
+#define  TIM_CCMR2_IC3F_3                    ((uint32_t)0x00000080)            /*!<Bit 3 */
+
+#define  TIM_CCMR2_IC4PSC                    ((uint32_t)0x00000C00)            /*!<IC4PSC[1:0] bits (Input Capture 4 Prescaler) */
+#define  TIM_CCMR2_IC4PSC_0                  ((uint32_t)0x00000400)            /*!<Bit 0 */
+#define  TIM_CCMR2_IC4PSC_1                  ((uint32_t)0x00000800)            /*!<Bit 1 */
+
+#define  TIM_CCMR2_IC4F                      ((uint32_t)0x0000F000)            /*!<IC4F[3:0] bits (Input Capture 4 Filter) */
+#define  TIM_CCMR2_IC4F_0                    ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  TIM_CCMR2_IC4F_1                    ((uint32_t)0x00002000)            /*!<Bit 1 */
+#define  TIM_CCMR2_IC4F_2                    ((uint32_t)0x00004000)            /*!<Bit 2 */
+#define  TIM_CCMR2_IC4F_3                    ((uint32_t)0x00008000)            /*!<Bit 3 */
+
+/*******************  Bit definition for TIM_CCER register  *******************/
+#define  TIM_CCER_CC1E                       ((uint32_t)0x00000001)            /*!<Capture/Compare 1 output enable */
+#define  TIM_CCER_CC1P                       ((uint32_t)0x00000002)            /*!<Capture/Compare 1 output Polarity */
+#define  TIM_CCER_CC1NP                      ((uint32_t)0x00000008)            /*!<Capture/Compare 1 Complementary output Polarity */
+#define  TIM_CCER_CC2E                       ((uint32_t)0x00000010)            /*!<Capture/Compare 2 output enable */
+#define  TIM_CCER_CC2P                       ((uint32_t)0x00000020)            /*!<Capture/Compare 2 output Polarity */
+#define  TIM_CCER_CC2NP                      ((uint32_t)0x00000080)            /*!<Capture/Compare 2 Complementary output Polarity */
+#define  TIM_CCER_CC3E                       ((uint32_t)0x00000100)            /*!<Capture/Compare 3 output enable */
+#define  TIM_CCER_CC3P                       ((uint32_t)0x00000200)            /*!<Capture/Compare 3 output Polarity */
+#define  TIM_CCER_CC3NP                      ((uint32_t)0x00000800)            /*!<Capture/Compare 3 Complementary output Polarity */
+#define  TIM_CCER_CC4E                       ((uint32_t)0x00001000)            /*!<Capture/Compare 4 output enable */
+#define  TIM_CCER_CC4P                       ((uint32_t)0x00002000)            /*!<Capture/Compare 4 output Polarity */
+#define  TIM_CCER_CC4NP                      ((uint32_t)0x00008000)            /*!<Capture/Compare 4 Complementary output Polarity */
+
+/*******************  Bit definition for TIM_CNT register  ********************/
+#define  TIM_CNT_CNT                         ((uint32_t)0x0000FFFF)            /*!<Counter Value */
+
+/*******************  Bit definition for TIM_PSC register  ********************/
+#define  TIM_PSC_PSC                         ((uint32_t)0x0000FFFF)            /*!<Prescaler Value */
+
+/*******************  Bit definition for TIM_ARR register  ********************/
+#define  TIM_ARR_ARR                         ((uint32_t)0x0000FFFF)            /*!<actual auto-reload Value */
+           
+/*******************  Bit definition for TIM_CCR1 register  *******************/
+#define  TIM_CCR1_CCR1                       ((uint32_t)0x0000FFFF)            /*!<Capture/Compare 1 Value */
+
+/*******************  Bit definition for TIM_CCR2 register  *******************/
+#define  TIM_CCR2_CCR2                       ((uint32_t)0x0000FFFF)            /*!<Capture/Compare 2 Value */
+
+/*******************  Bit definition for TIM_CCR3 register  *******************/
+#define  TIM_CCR3_CCR3                       ((uint32_t)0x0000FFFF)            /*!<Capture/Compare 3 Value */
+
+/*******************  Bit definition for TIM_CCR4 register  *******************/
+#define  TIM_CCR4_CCR4                       ((uint32_t)0x0000FFFF)            /*!<Capture/Compare 4 Value */
+
+/*******************  Bit definition for TIM_DCR register  ********************/
+#define  TIM_DCR_DBA                         ((uint32_t)0x0000001F)            /*!<DBA[4:0] bits (DMA Base Address) */
+#define  TIM_DCR_DBA_0                       ((uint32_t)0x00000001)            /*!<Bit 0 */
+#define  TIM_DCR_DBA_1                       ((uint32_t)0x00000002)            /*!<Bit 1 */
+#define  TIM_DCR_DBA_2                       ((uint32_t)0x00000004)            /*!<Bit 2 */
+#define  TIM_DCR_DBA_3                       ((uint32_t)0x00000008)            /*!<Bit 3 */
+#define  TIM_DCR_DBA_4                       ((uint32_t)0x00000010)            /*!<Bit 4 */
+
+#define  TIM_DCR_DBL                         ((uint32_t)0x00001F00)            /*!<DBL[4:0] bits (DMA Burst Length) */
+#define  TIM_DCR_DBL_0                       ((uint32_t)0x00000100)            /*!<Bit 0 */
+#define  TIM_DCR_DBL_1                       ((uint32_t)0x00000200)            /*!<Bit 1 */
+#define  TIM_DCR_DBL_2                       ((uint32_t)0x00000400)            /*!<Bit 2 */
+#define  TIM_DCR_DBL_3                       ((uint32_t)0x00000800)            /*!<Bit 3 */
+#define  TIM_DCR_DBL_4                       ((uint32_t)0x00001000)            /*!<Bit 4 */
+
+/*******************  Bit definition for TIM_DMAR register  *******************/
+#define  TIM_DMAR_DMAB                       ((uint32_t)0x0000FFFF)            /*!<DMA register for burst accesses */
+
+/*******************  Bit definition for TIM_OR register  *********************/
+#define  TIM_OR_TI1RMP                       ((uint32_t)0x00000003)            /*!<TI1_RMP[1:0] bits (TIM Input 1 remap) */
+#define  TIM_OR_TI1RMP_0                     ((uint32_t)0x00000001)            /*!<Bit 0 */
+#define  TIM_OR_TI1RMP_1                     ((uint32_t)0x00000002)            /*!<Bit 1 */
+
+#define  TIM_OR_ETR_RMP                      ((uint32_t)0x00000004)            /*!<ETR_RMP bit (TIM10/11 ETR remap)*/
+#define  TIM_OR_TI1_RMP_RI                   ((uint32_t)0x00000008)            /*!<TI1_RMP_RI bit (TIM10/11 Input 1 remap for Routing interface) */
+
+/*----------------------------------------------------------------------------*/
+#define  TIM9_OR_ITR1_RMP                    ((uint32_t)0x00000004)            /*!<ITR1_RMP bit (TIM9 Internal trigger 1 remap) */
+
+/*----------------------------------------------------------------------------*/
+#define  TIM2_OR_ITR1_RMP                    ((uint32_t)0x00000001)            /*!<ITR1_RMP bit (TIM2 Internal trigger 1 remap) */
+
+/*----------------------------------------------------------------------------*/
+#define  TIM3_OR_ITR2_RMP                    ((uint32_t)0x00000001)            /*!<ITR2_RMP bit (TIM3 Internal trigger 2 remap) */
+
+/*----------------------------------------------------------------------------*/
+
+
+/******************************************************************************/
+/*                                                                            */
+/*      Universal Synchronous Asynchronous Receiver Transmitter (USART)       */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for USART_SR register  *******************/
+#define  USART_SR_PE                         ((uint32_t)0x00000001)            /*!< Parity Error */
+#define  USART_SR_FE                         ((uint32_t)0x00000002)            /*!< Framing Error */
+#define  USART_SR_NE                         ((uint32_t)0x00000004)            /*!< Noise Error Flag */
+#define  USART_SR_ORE                        ((uint32_t)0x00000008)            /*!< OverRun Error */
+#define  USART_SR_IDLE                       ((uint32_t)0x00000010)            /*!< IDLE line detected */
+#define  USART_SR_RXNE                       ((uint32_t)0x00000020)            /*!< Read Data Register Not Empty */
+#define  USART_SR_TC                         ((uint32_t)0x00000040)            /*!< Transmission Complete */
+#define  USART_SR_TXE                        ((uint32_t)0x00000080)            /*!< Transmit Data Register Empty */
+#define  USART_SR_LBD                        ((uint32_t)0x00000100)            /*!< LIN Break Detection Flag */
+#define  USART_SR_CTS                        ((uint32_t)0x00000200)            /*!< CTS Flag */
+
+/*******************  Bit definition for USART_DR register  *******************/
+#define  USART_DR_DR                         ((uint32_t)0x000001FF)            /*!< Data value */
+
+/******************  Bit definition for USART_BRR register  *******************/
+#define  USART_BRR_DIV_FRACTION              ((uint32_t)0x0000000F)            /*!< Fraction of USARTDIV */
+#define  USART_BRR_DIV_MANTISSA              ((uint32_t)0x0000FFF0)            /*!< Mantissa of USARTDIV */
+
+/******************  Bit definition for USART_CR1 register  *******************/
+#define  USART_CR1_SBK                       ((uint32_t)0x00000001)            /*!< Send Break */
+#define  USART_CR1_RWU                       ((uint32_t)0x00000002)            /*!< Receiver wakeup */
+#define  USART_CR1_RE                        ((uint32_t)0x00000004)            /*!< Receiver Enable */
+#define  USART_CR1_TE                        ((uint32_t)0x00000008)            /*!< Transmitter Enable */
+#define  USART_CR1_IDLEIE                    ((uint32_t)0x00000010)            /*!< IDLE Interrupt Enable */
+#define  USART_CR1_RXNEIE                    ((uint32_t)0x00000020)            /*!< RXNE Interrupt Enable */
+#define  USART_CR1_TCIE                      ((uint32_t)0x00000040)            /*!< Transmission Complete Interrupt Enable */
+#define  USART_CR1_TXEIE                     ((uint32_t)0x00000080)            /*!< PE Interrupt Enable */
+#define  USART_CR1_PEIE                      ((uint32_t)0x00000100)            /*!< PE Interrupt Enable */
+#define  USART_CR1_PS                        ((uint32_t)0x00000200)            /*!< Parity Selection */
+#define  USART_CR1_PCE                       ((uint32_t)0x00000400)            /*!< Parity Control Enable */
+#define  USART_CR1_WAKE                      ((uint32_t)0x00000800)            /*!< Wakeup method */
+#define  USART_CR1_M                         ((uint32_t)0x00001000)            /*!< Word length */
+#define  USART_CR1_UE                        ((uint32_t)0x00002000)            /*!< USART Enable */
+#define  USART_CR1_OVER8                     ((uint32_t)0x00008000)            /*!< Oversampling by 8-bit mode */
+
+/******************  Bit definition for USART_CR2 register  *******************/
+#define  USART_CR2_ADD                       ((uint32_t)0x0000000F)            /*!< Address of the USART node */
+#define  USART_CR2_LBDL                      ((uint32_t)0x00000020)            /*!< LIN Break Detection Length */
+#define  USART_CR2_LBDIE                     ((uint32_t)0x00000040)            /*!< LIN Break Detection Interrupt Enable */
+#define  USART_CR2_LBCL                      ((uint32_t)0x00000100)            /*!< Last Bit Clock pulse */
+#define  USART_CR2_CPHA                      ((uint32_t)0x00000200)            /*!< Clock Phase */
+#define  USART_CR2_CPOL                      ((uint32_t)0x00000400)            /*!< Clock Polarity */
+#define  USART_CR2_CLKEN                     ((uint32_t)0x00000800)            /*!< Clock Enable */
+
+#define  USART_CR2_STOP                      ((uint32_t)0x00003000)            /*!< STOP[1:0] bits (STOP bits) */
+#define  USART_CR2_STOP_0                    ((uint32_t)0x00001000)            /*!< Bit 0 */
+#define  USART_CR2_STOP_1                    ((uint32_t)0x00002000)            /*!< Bit 1 */
+
+#define  USART_CR2_LINEN                     ((uint32_t)0x00004000)            /*!< LIN mode enable */
+
+/******************  Bit definition for USART_CR3 register  *******************/
+#define  USART_CR3_EIE                       ((uint32_t)0x00000001)            /*!< Error Interrupt Enable */
+#define  USART_CR3_IREN                      ((uint32_t)0x00000002)            /*!< IrDA mode Enable */
+#define  USART_CR3_IRLP                      ((uint32_t)0x00000004)            /*!< IrDA Low-Power */
+#define  USART_CR3_HDSEL                     ((uint32_t)0x00000008)            /*!< Half-Duplex Selection */
+#define  USART_CR3_NACK                      ((uint32_t)0x00000010)            /*!< Smartcard NACK enable */
+#define  USART_CR3_SCEN                      ((uint32_t)0x00000020)            /*!< Smartcard mode enable */
+#define  USART_CR3_DMAR                      ((uint32_t)0x00000040)            /*!< DMA Enable Receiver */
+#define  USART_CR3_DMAT                      ((uint32_t)0x00000080)            /*!< DMA Enable Transmitter */
+#define  USART_CR3_RTSE                      ((uint32_t)0x00000100)            /*!< RTS Enable */
+#define  USART_CR3_CTSE                      ((uint32_t)0x00000200)            /*!< CTS Enable */
+#define  USART_CR3_CTSIE                     ((uint32_t)0x00000400)            /*!< CTS Interrupt Enable */
+#define  USART_CR3_ONEBIT                    ((uint32_t)0x00000800)            /*!< One sample bit method enable */
+
+/******************  Bit definition for USART_GTPR register  ******************/
+#define  USART_GTPR_PSC                      ((uint32_t)0x000000FF)            /*!< PSC[7:0] bits (Prescaler value) */
+#define  USART_GTPR_PSC_0                    ((uint32_t)0x00000001)            /*!< Bit 0 */
+#define  USART_GTPR_PSC_1                    ((uint32_t)0x00000002)            /*!< Bit 1 */
+#define  USART_GTPR_PSC_2                    ((uint32_t)0x00000004)            /*!< Bit 2 */
+#define  USART_GTPR_PSC_3                    ((uint32_t)0x00000008)            /*!< Bit 3 */
+#define  USART_GTPR_PSC_4                    ((uint32_t)0x00000010)            /*!< Bit 4 */
+#define  USART_GTPR_PSC_5                    ((uint32_t)0x00000020)            /*!< Bit 5 */
+#define  USART_GTPR_PSC_6                    ((uint32_t)0x00000040)            /*!< Bit 6 */
+#define  USART_GTPR_PSC_7                    ((uint32_t)0x00000080)            /*!< Bit 7 */
+
+#define  USART_GTPR_GT                       ((uint32_t)0x0000FF00)            /*!< Guard time value */
+
+/******************************************************************************/
+/*                                                                            */
+/*                     Universal Serial Bus (USB)                             */
+/*                                                                            */
+/******************************************************************************/
+
+/*!<Endpoint-specific registers */
+
+#define  USB_EP0R                              USB_BASE                        /*!< endpoint 0 register address */
+#define  USB_EP1R                             (USB_BASE + 0x00000004)         /*!< endpoint 1 register address */
+#define  USB_EP2R                             (USB_BASE + 0x00000008)         /*!< endpoint 2 register address */
+#define  USB_EP3R                             (USB_BASE + 0x0000000C)         /*!< endpoint 3 register address */
+#define  USB_EP4R                             (USB_BASE + 0x00000010)         /*!< endpoint 4 register address */
+#define  USB_EP5R                             (USB_BASE + 0x00000014)         /*!< endpoint 5 register address */
+#define  USB_EP6R                             (USB_BASE + 0x00000018)         /*!< endpoint 6 register address */
+#define  USB_EP7R                             (USB_BASE + 0x0000001C)         /*!< endpoint 7 register address */
+
+/* bit positions */ 
+#define  USB_EP_CTR_RX                        ((uint32_t)0x00008000)           /*!<  EndPoint Correct TRansfer RX */
+#define  USB_EP_DTOG_RX                       ((uint32_t)0x00004000)           /*!<  EndPoint Data TOGGLE RX */
+#define  USB_EPRX_STAT                        ((uint32_t)0x00003000)           /*!<  EndPoint RX STATus bit field */
+#define  USB_EP_SETUP                         ((uint32_t)0x00000800)           /*!<  EndPoint SETUP */
+#define  USB_EP_T_FIELD                       ((uint32_t)0x00000600)           /*!<  EndPoint TYPE */
+#define  USB_EP_KIND                          ((uint32_t)0x00000100)           /*!<  EndPoint KIND */
+#define  USB_EP_CTR_TX                        ((uint32_t)0x00000080)           /*!<  EndPoint Correct TRansfer TX */
+#define  USB_EP_DTOG_TX                       ((uint32_t)0x00000040)           /*!<  EndPoint Data TOGGLE TX */
+#define  USB_EPTX_STAT                        ((uint32_t)0x00000030)           /*!<  EndPoint TX STATus bit field */
+#define  USB_EPADDR_FIELD                     ((uint32_t)0x0000000F)           /*!<  EndPoint ADDRess FIELD */
+
+/* EndPoint REGister MASK (no toggle fields) */
+#define  USB_EPREG_MASK     (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD)
+                                                                               /*!< EP_TYPE[1:0] EndPoint TYPE */
+#define  USB_EP_TYPE_MASK                     ((uint32_t)0x00000600)           /*!< EndPoint TYPE Mask */
+#define  USB_EP_BULK                          ((uint32_t)0x00000000)           /*!< EndPoint BULK */
+#define  USB_EP_CONTROL                       ((uint32_t)0x00000200)           /*!< EndPoint CONTROL */
+#define  USB_EP_ISOCHRONOUS                   ((uint32_t)0x00000400)           /*!< EndPoint ISOCHRONOUS */
+#define  USB_EP_INTERRUPT                     ((uint32_t)0x00000600)           /*!< EndPoint INTERRUPT */
+#define  USB_EP_T_MASK      (~USB_EP_T_FIELD & USB_EPREG_MASK)
+                                                                 
+#define  USB_EPKIND_MASK    (~USB_EP_KIND & USB_EPREG_MASK)            /*!< EP_KIND EndPoint KIND */
+                                                                               /*!< STAT_TX[1:0] STATus for TX transfer */
+#define  USB_EP_TX_DIS                        ((uint32_t)0x00000000)           /*!< EndPoint TX DISabled */
+#define  USB_EP_TX_STALL                      ((uint32_t)0x00000010)           /*!< EndPoint TX STALLed */
+#define  USB_EP_TX_NAK                        ((uint32_t)0x00000020)           /*!< EndPoint TX NAKed */
+#define  USB_EP_TX_VALID                      ((uint32_t)0x00000030)           /*!< EndPoint TX VALID */
+#define  USB_EPTX_DTOG1                       ((uint32_t)0x00000010)           /*!< EndPoint TX Data TOGgle bit1 */
+#define  USB_EPTX_DTOG2                       ((uint32_t)0x00000020)           /*!< EndPoint TX Data TOGgle bit2 */
+#define  USB_EPTX_DTOGMASK  (USB_EPTX_STAT|USB_EPREG_MASK)
+                                                                               /*!< STAT_RX[1:0] STATus for RX transfer */
+#define  USB_EP_RX_DIS                        ((uint32_t)0x00000000)           /*!< EndPoint RX DISabled */
+#define  USB_EP_RX_STALL                      ((uint32_t)0x00001000)           /*!< EndPoint RX STALLed */
+#define  USB_EP_RX_NAK                        ((uint32_t)0x00002000)           /*!< EndPoint RX NAKed */
+#define  USB_EP_RX_VALID                      ((uint32_t)0x00003000)           /*!< EndPoint RX VALID */
+#define  USB_EPRX_DTOG1                       ((uint32_t)0x00001000)           /*!< EndPoint RX Data TOGgle bit1 */
+#define  USB_EPRX_DTOG2                       ((uint32_t)0x00002000)           /*!< EndPoint RX Data TOGgle bit1 */
+#define  USB_EPRX_DTOGMASK  (USB_EPRX_STAT|USB_EPREG_MASK)
+
+/*******************  Bit definition for USB_EP0R register  *******************/
+#define  USB_EP0R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP0R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP0R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP0R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP0R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP0R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP0R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP0R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP0R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP0R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP0R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP0R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP0R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP0R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP0R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP0R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP1R register  *******************/
+#define  USB_EP1R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP1R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP1R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP1R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP1R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP1R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP1R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP1R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP1R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP1R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP1R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP1R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP1R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP1R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP1R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP1R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP2R register  *******************/
+#define  USB_EP2R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP2R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP2R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP2R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP2R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP2R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP2R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP2R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP2R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP2R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP2R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP2R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP2R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP2R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP2R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP2R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP3R register  *******************/
+#define  USB_EP3R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP3R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP3R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP3R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP3R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP3R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP3R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP3R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP3R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP3R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP3R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP3R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP3R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP3R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP3R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP3R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP4R register  *******************/
+#define  USB_EP4R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP4R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP4R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP4R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP4R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP4R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP4R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP4R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP4R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP4R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP4R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP4R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP4R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP4R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP4R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP4R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP5R register  *******************/
+#define  USB_EP5R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP5R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP5R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP5R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP5R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP5R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP5R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP5R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP5R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP5R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP5R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP5R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP5R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP5R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP5R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP5R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP6R register  *******************/
+#define  USB_EP6R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP6R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP6R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP6R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP6R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP6R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP6R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP6R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP6R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP6R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP6R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP6R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP6R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP6R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP6R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP6R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*******************  Bit definition for USB_EP7R register  *******************/
+#define  USB_EP7R_EA                         ((uint32_t)0x0000000F)            /*!<Endpoint Address */
+
+#define  USB_EP7R_STAT_TX                    ((uint32_t)0x00000030)            /*!<STAT_TX[1:0] bits (Status bits, for transmission transfers) */
+#define  USB_EP7R_STAT_TX_0                  ((uint32_t)0x00000010)            /*!<Bit 0 */
+#define  USB_EP7R_STAT_TX_1                  ((uint32_t)0x00000020)            /*!<Bit 1 */
+
+#define  USB_EP7R_DTOG_TX                    ((uint32_t)0x00000040)            /*!<Data Toggle, for transmission transfers */
+#define  USB_EP7R_CTR_TX                     ((uint32_t)0x00000080)            /*!<Correct Transfer for transmission */
+#define  USB_EP7R_EP_KIND                    ((uint32_t)0x00000100)            /*!<Endpoint Kind */
+
+#define  USB_EP7R_EP_TYPE                    ((uint32_t)0x00000600)            /*!<EP_TYPE[1:0] bits (Endpoint type) */
+#define  USB_EP7R_EP_TYPE_0                  ((uint32_t)0x00000200)            /*!<Bit 0 */
+#define  USB_EP7R_EP_TYPE_1                  ((uint32_t)0x00000400)            /*!<Bit 1 */
+
+#define  USB_EP7R_SETUP                      ((uint32_t)0x00000800)            /*!<Setup transaction completed */
+
+#define  USB_EP7R_STAT_RX                    ((uint32_t)0x00003000)            /*!<STAT_RX[1:0] bits (Status bits, for reception transfers) */
+#define  USB_EP7R_STAT_RX_0                  ((uint32_t)0x00001000)            /*!<Bit 0 */
+#define  USB_EP7R_STAT_RX_1                  ((uint32_t)0x00002000)            /*!<Bit 1 */
+
+#define  USB_EP7R_DTOG_RX                    ((uint32_t)0x00004000)            /*!<Data Toggle, for reception transfers */
+#define  USB_EP7R_CTR_RX                     ((uint32_t)0x00008000)            /*!<Correct Transfer for reception */
+
+/*!<Common registers */
+
+#define  USB_CNTR                             (USB_BASE + 0x00000040)          /*!< Control register */
+#define  USB_ISTR                             (USB_BASE + 0x00000044)          /*!< Interrupt status register */
+#define  USB_FNR                              (USB_BASE + 0x00000048)          /*!< Frame number register */
+#define  USB_DADDR                            (USB_BASE + 0x0000004C)          /*!< Device address register */
+#define  USB_BTABLE                           (USB_BASE + 0x00000050)          /*!< Buffer Table address register */
+
+
+
+/*******************  Bit definition for USB_CNTR register  *******************/
+#define  USB_CNTR_FRES                       ((uint32_t)0x00000001)            /*!<Force USB Reset */
+#define  USB_CNTR_PDWN                       ((uint32_t)0x00000002)            /*!<Power down */
+#define  USB_CNTR_LP_MODE                    ((uint32_t)0x00000004)            /*!<Low-power mode */
+#define  USB_CNTR_FSUSP                      ((uint32_t)0x00000008)            /*!<Force suspend */
+#define  USB_CNTR_RESUME                     ((uint32_t)0x00000010)            /*!<Resume request */
+#define  USB_CNTR_ESOFM                      ((uint32_t)0x00000100)            /*!<Expected Start Of Frame Interrupt Mask */
+#define  USB_CNTR_SOFM                       ((uint32_t)0x00000200)            /*!<Start Of Frame Interrupt Mask */
+#define  USB_CNTR_RESETM                     ((uint32_t)0x00000400)            /*!<RESET Interrupt Mask */
+#define  USB_CNTR_SUSPM                      ((uint32_t)0x00000800)            /*!<Suspend mode Interrupt Mask */
+#define  USB_CNTR_WKUPM                      ((uint32_t)0x00001000)            /*!<Wakeup Interrupt Mask */
+#define  USB_CNTR_ERRM                       ((uint32_t)0x00002000)            /*!<Error Interrupt Mask */
+#define  USB_CNTR_PMAOVRM                    ((uint32_t)0x00004000)            /*!<Packet Memory Area Over / Underrun Interrupt Mask */
+#define  USB_CNTR_CTRM                       ((uint32_t)0x00008000)            /*!<Correct Transfer Interrupt Mask */
+
+/*******************  Bit definition for USB_ISTR register  *******************/
+#define  USB_ISTR_EP_ID                      ((uint32_t)0x0000000F)            /*!<Endpoint Identifier */
+#define  USB_ISTR_DIR                        ((uint32_t)0x00000010)            /*!<Direction of transaction */
+#define  USB_ISTR_ESOF                       ((uint32_t)0x00000100)            /*!<Expected Start Of Frame */
+#define  USB_ISTR_SOF                        ((uint32_t)0x00000200)            /*!<Start Of Frame */
+#define  USB_ISTR_RESET                      ((uint32_t)0x00000400)            /*!<USB RESET request */
+#define  USB_ISTR_SUSP                       ((uint32_t)0x00000800)            /*!<Suspend mode request */
+#define  USB_ISTR_WKUP                       ((uint32_t)0x00001000)            /*!<Wake up */
+#define  USB_ISTR_ERR                        ((uint32_t)0x00002000)            /*!<Error */
+#define  USB_ISTR_PMAOVRM                    ((uint32_t)0x00004000)            /*!<Packet Memory Area Over / Underrun */
+#define  USB_ISTR_CTR                        ((uint32_t)0x00008000)            /*!<Correct Transfer */
+
+#define  USB_CLR_CTR                          (~USB_ISTR_CTR)                  /*!< clear Correct TRansfer bit */
+#define  USB_CLR_PMAOVRM                      (~USB_ISTR_PMAOVR)               /*!< clear DMA OVeR/underrun bit*/
+#define  USB_CLR_ERR                          (~USB_ISTR_ERR)                  /*!< clear ERRor bit */
+#define  USB_CLR_WKUP                         (~USB_ISTR_WKUP)                 /*!< clear WaKe UP bit */
+#define  USB_CLR_SUSP                         (~USB_ISTR_SUSP)                 /*!< clear SUSPend bit */
+#define  USB_CLR_RESET                        (~USB_ISTR_RESET)                /*!< clear RESET bit */
+#define  USB_CLR_SOF                          (~USB_ISTR_SOF)                  /*!< clear Start Of Frame bit */
+#define  USB_CLR_ESOF                         (~USB_ISTR_ESOF)                 /*!< clear Expected Start Of Frame bit */
+
+
+/*******************  Bit definition for USB_FNR register  ********************/
+#define  USB_FNR_FN                          ((uint32_t)0x000007FF)            /*!<Frame Number */
+#define  USB_FNR_LSOF                        ((uint32_t)0x00001800)            /*!<Lost SOF */
+#define  USB_FNR_LCK                         ((uint32_t)0x00002000)            /*!<Locked */
+#define  USB_FNR_RXDM                        ((uint32_t)0x00004000)            /*!<Receive Data - Line Status */
+#define  USB_FNR_RXDP                        ((uint32_t)0x00008000)            /*!<Receive Data + Line Status */
+
+/******************  Bit definition for USB_DADDR register  *******************/
+#define  USB_DADDR_ADD                       ((uint32_t)0x0000007F)               /*!<ADD[6:0] bits (Device Address) */
+#define  USB_DADDR_ADD0                      ((uint32_t)0x00000001)               /*!<Bit 0 */
+#define  USB_DADDR_ADD1                      ((uint32_t)0x00000002)               /*!<Bit 1 */
+#define  USB_DADDR_ADD2                      ((uint32_t)0x00000004)               /*!<Bit 2 */
+#define  USB_DADDR_ADD3                      ((uint32_t)0x00000008)               /*!<Bit 3 */
+#define  USB_DADDR_ADD4                      ((uint32_t)0x00000010)               /*!<Bit 4 */
+#define  USB_DADDR_ADD5                      ((uint32_t)0x00000020)               /*!<Bit 5 */
+#define  USB_DADDR_ADD6                      ((uint32_t)0x00000040)               /*!<Bit 6 */
+
+#define  USB_DADDR_EF                        ((uint32_t)0x00000080)               /*!<Enable Function */
+
+/******************  Bit definition for USB_BTABLE register  ******************/    
+#define  USB_BTABLE_BTABLE                   ((uint32_t)0x0000FFF8)            /*!<Buffer Table */
+
+/*!< Buffer descriptor table */
+/*****************  Bit definition for USB_ADDR0_TX register  *****************/
+#define  USB_ADDR0_TX_ADDR0_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 0 */
+
+/*****************  Bit definition for USB_ADDR1_TX register  *****************/
+#define  USB_ADDR1_TX_ADDR1_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 1 */
+
+/*****************  Bit definition for USB_ADDR2_TX register  *****************/
+#define  USB_ADDR2_TX_ADDR2_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 2 */
+
+/*****************  Bit definition for USB_ADDR3_TX register  *****************/
+#define  USB_ADDR3_TX_ADDR3_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 3 */
+
+/*****************  Bit definition for USB_ADDR4_TX register  *****************/
+#define  USB_ADDR4_TX_ADDR4_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 4 */
+
+/*****************  Bit definition for USB_ADDR5_TX register  *****************/
+#define  USB_ADDR5_TX_ADDR5_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 5 */
+
+/*****************  Bit definition for USB_ADDR6_TX register  *****************/
+#define  USB_ADDR6_TX_ADDR6_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 6 */
+
+/*****************  Bit definition for USB_ADDR7_TX register  *****************/
+#define  USB_ADDR7_TX_ADDR7_TX               ((uint32_t)0x0000FFFE)            /*!< Transmission Buffer Address 7 */
+
+/*----------------------------------------------------------------------------*/
+
+/*****************  Bit definition for USB_COUNT0_TX register  ****************/
+#define  USB_COUNT0_TX_COUNT0_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 0 */
+
+/*****************  Bit definition for USB_COUNT1_TX register  ****************/
+#define  USB_COUNT1_TX_COUNT1_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 1 */
+
+/*****************  Bit definition for USB_COUNT2_TX register  ****************/
+#define  USB_COUNT2_TX_COUNT2_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 2 */
+
+/*****************  Bit definition for USB_COUNT3_TX register  ****************/
+#define  USB_COUNT3_TX_COUNT3_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 3 */
+
+/*****************  Bit definition for USB_COUNT4_TX register  ****************/
+#define  USB_COUNT4_TX_COUNT4_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 4 */
+
+/*****************  Bit definition for USB_COUNT5_TX register  ****************/
+#define  USB_COUNT5_TX_COUNT5_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 5 */
+
+/*****************  Bit definition for USB_COUNT6_TX register  ****************/
+#define  USB_COUNT6_TX_COUNT6_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 6 */
+
+/*****************  Bit definition for USB_COUNT7_TX register  ****************/
+#define  USB_COUNT7_TX_COUNT7_TX             ((uint32_t)0x000003FF)            /*!< Transmission Byte Count 7 */
+
+/*----------------------------------------------------------------------------*/
+
+/****************  Bit definition for USB_COUNT0_TX_0 register  ***************/
+#define  USB_COUNT0_TX_0_COUNT0_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 0 (low) */
+
+/****************  Bit definition for USB_COUNT0_TX_1 register  ***************/
+#define  USB_COUNT0_TX_1_COUNT0_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 0 (high) */
+
+/****************  Bit definition for USB_COUNT1_TX_0 register  ***************/
+#define  USB_COUNT1_TX_0_COUNT1_TX_0          ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 1 (low) */
+
+/****************  Bit definition for USB_COUNT1_TX_1 register  ***************/
+#define  USB_COUNT1_TX_1_COUNT1_TX_1          ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 1 (high) */
+
+/****************  Bit definition for USB_COUNT2_TX_0 register  ***************/
+#define  USB_COUNT2_TX_0_COUNT2_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 2 (low) */
+
+/****************  Bit definition for USB_COUNT2_TX_1 register  ***************/
+#define  USB_COUNT2_TX_1_COUNT2_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 2 (high) */
+
+/****************  Bit definition for USB_COUNT3_TX_0 register  ***************/
+#define  USB_COUNT3_TX_0_COUNT3_TX_0         ((uint32_t)0x0000000003FF)        /*!< Transmission Byte Count 3 (low) */
+
+/****************  Bit definition for USB_COUNT3_TX_1 register  ***************/
+#define  USB_COUNT3_TX_1_COUNT3_TX_1         ((uint32_t)0x000003FF0000)        /*!< Transmission Byte Count 3 (high) */
+
+/****************  Bit definition for USB_COUNT4_TX_0 register  ***************/
+#define  USB_COUNT4_TX_0_COUNT4_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 4 (low) */
+
+/****************  Bit definition for USB_COUNT4_TX_1 register  ***************/
+#define  USB_COUNT4_TX_1_COUNT4_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 4 (high) */
+
+/****************  Bit definition for USB_COUNT5_TX_0 register  ***************/
+#define  USB_COUNT5_TX_0_COUNT5_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 5 (low) */
+
+/****************  Bit definition for USB_COUNT5_TX_1 register  ***************/
+#define  USB_COUNT5_TX_1_COUNT5_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 5 (high) */
+
+/****************  Bit definition for USB_COUNT6_TX_0 register  ***************/
+#define  USB_COUNT6_TX_0_COUNT6_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 6 (low) */
+
+/****************  Bit definition for USB_COUNT6_TX_1 register  ***************/
+#define  USB_COUNT6_TX_1_COUNT6_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 6 (high) */
+
+/****************  Bit definition for USB_COUNT7_TX_0 register  ***************/
+#define  USB_COUNT7_TX_0_COUNT7_TX_0         ((uint32_t)0x000003FF)        /*!< Transmission Byte Count 7 (low) */
+
+/****************  Bit definition for USB_COUNT7_TX_1 register  ***************/
+#define  USB_COUNT7_TX_1_COUNT7_TX_1         ((uint32_t)0x03FF0000)        /*!< Transmission Byte Count 7 (high) */
+
+/*----------------------------------------------------------------------------*/
+
+/*****************  Bit definition for USB_ADDR0_RX register  *****************/
+#define  USB_ADDR0_RX_ADDR0_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 0 */
+
+/*****************  Bit definition for USB_ADDR1_RX register  *****************/
+#define  USB_ADDR1_RX_ADDR1_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 1 */
+
+/*****************  Bit definition for USB_ADDR2_RX register  *****************/
+#define  USB_ADDR2_RX_ADDR2_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 2 */
+
+/*****************  Bit definition for USB_ADDR3_RX register  *****************/
+#define  USB_ADDR3_RX_ADDR3_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 3 */
+
+/*****************  Bit definition for USB_ADDR4_RX register  *****************/
+#define  USB_ADDR4_RX_ADDR4_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 4 */
+
+/*****************  Bit definition for USB_ADDR5_RX register  *****************/
+#define  USB_ADDR5_RX_ADDR5_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 5 */
+
+/*****************  Bit definition for USB_ADDR6_RX register  *****************/
+#define  USB_ADDR6_RX_ADDR6_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 6 */
+
+/*****************  Bit definition for USB_ADDR7_RX register  *****************/
+#define  USB_ADDR7_RX_ADDR7_RX               ((uint32_t)0x0000FFFE)            /*!< Reception Buffer Address 7 */
+
+/*----------------------------------------------------------------------------*/
+
+/*****************  Bit definition for USB_COUNT0_RX register  ****************/
+#define  USB_COUNT0_RX_COUNT0_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT0_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT0_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT0_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT0_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT0_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT0_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT0_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT1_RX register  ****************/
+#define  USB_COUNT1_RX_COUNT1_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT1_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT1_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT1_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT1_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT1_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT1_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT1_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT2_RX register  ****************/
+#define  USB_COUNT2_RX_COUNT2_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT2_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT2_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT2_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT2_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT2_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT2_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT2_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT3_RX register  ****************/
+#define  USB_COUNT3_RX_COUNT3_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT3_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT3_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT3_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT3_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT3_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT3_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT3_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT4_RX register  ****************/
+#define  USB_COUNT4_RX_COUNT4_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT4_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT4_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT4_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT4_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT4_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT4_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT4_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT5_RX register  ****************/
+#define  USB_COUNT5_RX_COUNT5_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT5_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT5_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT5_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT5_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT5_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT5_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT5_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT6_RX register  ****************/
+#define  USB_COUNT6_RX_COUNT6_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT6_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT6_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT6_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT6_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT6_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT6_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT6_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*****************  Bit definition for USB_COUNT7_RX register  ****************/
+#define  USB_COUNT7_RX_COUNT7_RX             ((uint32_t)0x000003FF)            /*!< Reception Byte Count */
+
+#define  USB_COUNT7_RX_NUM_BLOCK             ((uint32_t)0x00007C00)            /*!< NUM_BLOCK[4:0] bits (Number of blocks) */
+#define  USB_COUNT7_RX_NUM_BLOCK_0           ((uint32_t)0x00000400)            /*!< Bit 0 */
+#define  USB_COUNT7_RX_NUM_BLOCK_1           ((uint32_t)0x00000800)            /*!< Bit 1 */
+#define  USB_COUNT7_RX_NUM_BLOCK_2           ((uint32_t)0x00001000)            /*!< Bit 2 */
+#define  USB_COUNT7_RX_NUM_BLOCK_3           ((uint32_t)0x00002000)            /*!< Bit 3 */
+#define  USB_COUNT7_RX_NUM_BLOCK_4           ((uint32_t)0x00004000)            /*!< Bit 4 */
+
+#define  USB_COUNT7_RX_BLSIZE                ((uint32_t)0x00008000)            /*!< BLock SIZE */
+
+/*----------------------------------------------------------------------------*/
+
+/****************  Bit definition for USB_COUNT0_RX_0 register  ***************/
+#define  USB_COUNT0_RX_0_COUNT0_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT0_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT0_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT0_RX_1 register  ***************/
+#define  USB_COUNT0_RX_1_COUNT0_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 1 */
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT0_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT0_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/****************  Bit definition for USB_COUNT1_RX_0 register  ***************/
+#define  USB_COUNT1_RX_0_COUNT1_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT1_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT1_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT1_RX_1 register  ***************/
+#define  USB_COUNT1_RX_1_COUNT1_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT1_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT1_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/****************  Bit definition for USB_COUNT2_RX_0 register  ***************/
+#define  USB_COUNT2_RX_0_COUNT2_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT2_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT2_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT2_RX_1 register  ***************/
+#define  USB_COUNT2_RX_1_COUNT2_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT2_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT2_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/****************  Bit definition for USB_COUNT3_RX_0 register  ***************/
+#define  USB_COUNT3_RX_0_COUNT3_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT3_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT3_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT3_RX_1 register  ***************/
+#define  USB_COUNT3_RX_1_COUNT3_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT3_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT3_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/****************  Bit definition for USB_COUNT4_RX_0 register  ***************/
+#define  USB_COUNT4_RX_0_COUNT4_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0_0      ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0_1      ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0_2      ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0_3      ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT4_RX_0_NUM_BLOCK_0_4      ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT4_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT4_RX_1 register  ***************/
+#define  USB_COUNT4_RX_1_COUNT4_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT4_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT4_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/****************  Bit definition for USB_COUNT5_RX_0 register  ***************/
+#define  USB_COUNT5_RX_0_COUNT5_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT5_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT5_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT5_RX_1 register  ***************/
+#define  USB_COUNT5_RX_1_COUNT5_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT5_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT5_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/***************  Bit definition for USB_COUNT6_RX_0  register  ***************/
+#define  USB_COUNT6_RX_0_COUNT6_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT6_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT6_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/****************  Bit definition for USB_COUNT6_RX_1 register  ***************/
+#define  USB_COUNT6_RX_1_COUNT6_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT6_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT6_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/***************  Bit definition for USB_COUNT7_RX_0 register  ****************/
+#define  USB_COUNT7_RX_0_COUNT7_RX_0         ((uint32_t)0x000003FF)        /*!< Reception Byte Count (low) */
+
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0         ((uint32_t)0x00007C00)        /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0_0       ((uint32_t)0x00000400)        /*!< Bit 0 */
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0_1       ((uint32_t)0x00000800)        /*!< Bit 1 */
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0_2       ((uint32_t)0x00001000)        /*!< Bit 2 */
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0_3       ((uint32_t)0x00002000)        /*!< Bit 3 */
+#define  USB_COUNT7_RX_0_NUM_BLOCK_0_4       ((uint32_t)0x00004000)        /*!< Bit 4 */
+
+#define  USB_COUNT7_RX_0_BLSIZE_0            ((uint32_t)0x00008000)        /*!< BLock SIZE (low) */
+
+/***************  Bit definition for USB_COUNT7_RX_1 register  ****************/
+#define  USB_COUNT7_RX_1_COUNT7_RX_1         ((uint32_t)0x03FF0000)        /*!< Reception Byte Count (high) */
+
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1         ((uint32_t)0x7C000000)        /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1_0       ((uint32_t)0x04000000)        /*!< Bit 0 */
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1_1       ((uint32_t)0x08000000)        /*!< Bit 1 */
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1_2       ((uint32_t)0x10000000)        /*!< Bit 2 */
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1_3       ((uint32_t)0x20000000)        /*!< Bit 3 */
+#define  USB_COUNT7_RX_1_NUM_BLOCK_1_4       ((uint32_t)0x40000000)        /*!< Bit 4 */
+
+#define  USB_COUNT7_RX_1_BLSIZE_1            ((uint32_t)0x80000000)        /*!< BLock SIZE (high) */
+
+/******************************************************************************/
+/*                                                                            */
+/*                         Window WATCHDOG (WWDG)                             */
+/*                                                                            */
+/******************************************************************************/
+
+/*******************  Bit definition for WWDG_CR register  ********************/
+#define  WWDG_CR_T                           ((uint32_t)0x0000007F)               /*!< T[6:0] bits (7-Bit counter (MSB to LSB)) */
+#define  WWDG_CR_T0                          ((uint32_t)0x00000001)               /*!< Bit 0 */
+#define  WWDG_CR_T1                          ((uint32_t)0x00000002)               /*!< Bit 1 */
+#define  WWDG_CR_T2                          ((uint32_t)0x00000004)               /*!< Bit 2 */
+#define  WWDG_CR_T3                          ((uint32_t)0x00000008)               /*!< Bit 3 */
+#define  WWDG_CR_T4                          ((uint32_t)0x00000010)               /*!< Bit 4 */
+#define  WWDG_CR_T5                          ((uint32_t)0x00000020)               /*!< Bit 5 */
+#define  WWDG_CR_T6                          ((uint32_t)0x00000040)               /*!< Bit 6 */
+
+#define  WWDG_CR_WDGA                        ((uint32_t)0x00000080)               /*!< Activation bit */
+
+/*******************  Bit definition for WWDG_CFR register  *******************/
+#define  WWDG_CFR_W                          ((uint32_t)0x0000007F)            /*!< W[6:0] bits (7-bit window value) */
+#define  WWDG_CFR_W0                         ((uint32_t)0x00000001)            /*!< Bit 0 */
+#define  WWDG_CFR_W1                         ((uint32_t)0x00000002)            /*!< Bit 1 */
+#define  WWDG_CFR_W2                         ((uint32_t)0x00000004)            /*!< Bit 2 */
+#define  WWDG_CFR_W3                         ((uint32_t)0x00000008)            /*!< Bit 3 */
+#define  WWDG_CFR_W4                         ((uint32_t)0x00000010)            /*!< Bit 4 */
+#define  WWDG_CFR_W5                         ((uint32_t)0x00000020)            /*!< Bit 5 */
+#define  WWDG_CFR_W6                         ((uint32_t)0x00000040)            /*!< Bit 6 */
+
+#define  WWDG_CFR_WDGTB                      ((uint32_t)0x00000180)            /*!< WDGTB[1:0] bits (Timer Base) */
+#define  WWDG_CFR_WDGTB0                     ((uint32_t)0x00000080)            /*!< Bit 0 */
+#define  WWDG_CFR_WDGTB1                     ((uint32_t)0x00000100)            /*!< Bit 1 */
+
+#define  WWDG_CFR_EWI                        ((uint32_t)0x00000200)            /*!< Early Wakeup Interrupt */
+
+/*******************  Bit definition for WWDG_SR register  ********************/
+#define  WWDG_SR_EWIF                        ((uint32_t)0x00000001)               /*!< Early Wakeup Interrupt Flag */
+
+/******************************************************************************/
+/*                                                                            */
+/*                        SystemTick (SysTick)                                */
+/*                                                                            */
+/******************************************************************************/
+
+/*****************  Bit definition for SysTick_CTRL register  *****************/
+#define  SysTick_CTRL_ENABLE                 ((uint32_t)0x00000001)        /*!< Counter enable */
+#define  SysTick_CTRL_TICKINT                ((uint32_t)0x00000002)        /*!< Counting down to 0 pends the SysTick handler */
+#define  SysTick_CTRL_CLKSOURCE              ((uint32_t)0x00000004)        /*!< Clock source */
+#define  SysTick_CTRL_COUNTFLAG              ((uint32_t)0x00010000)        /*!< Count Flag */
+
+/*****************  Bit definition for SysTick_LOAD register  *****************/
+#define  SysTick_LOAD_RELOAD                 ((uint32_t)0x00FFFFFF)        /*!< Value to load into the SysTick Current Value Register when the counter reaches 0 */
+
+/*****************  Bit definition for SysTick_VAL register  ******************/
+#define  SysTick_VAL_CURRENT                 ((uint32_t)0x00FFFFFF)        /*!< Current value at the time the register is accessed */
+
+/*****************  Bit definition for SysTick_CALIB register  ****************/
+#define  SysTick_CALIB_TENMS                 ((uint32_t)0x00FFFFFF)        /*!< Reload value to use for 10ms timing */
+#define  SysTick_CALIB_SKEW                  ((uint32_t)0x40000000)        /*!< Calibration value is not exactly 10 ms */
+#define  SysTick_CALIB_NOREF                 ((uint32_t)0x80000000)        /*!< The reference clock is not provided */
+
+/******************************************************************************/
+/*                                                                            */
+/*               Nested Vectored Interrupt Controller (NVIC)                  */
+/*                                                                            */
+/******************************************************************************/
+
+/******************  Bit definition for NVIC_ISER register  *******************/
+#define  NVIC_ISER_SETENA                    ((uint32_t)0xFFFFFFFF)        /*!< Interrupt set enable bits */
+#define  NVIC_ISER_SETENA_0                  ((uint32_t)0x00000001)        /*!< bit 0 */
+#define  NVIC_ISER_SETENA_1                  ((uint32_t)0x00000002)        /*!< bit 1 */
+#define  NVIC_ISER_SETENA_2                  ((uint32_t)0x00000004)        /*!< bit 2 */
+#define  NVIC_ISER_SETENA_3                  ((uint32_t)0x00000008)        /*!< bit 3 */
+#define  NVIC_ISER_SETENA_4                  ((uint32_t)0x00000010)        /*!< bit 4 */
+#define  NVIC_ISER_SETENA_5                  ((uint32_t)0x00000020)        /*!< bit 5 */
+#define  NVIC_ISER_SETENA_6                  ((uint32_t)0x00000040)        /*!< bit 6 */
+#define  NVIC_ISER_SETENA_7                  ((uint32_t)0x00000080)        /*!< bit 7 */
+#define  NVIC_ISER_SETENA_8                  ((uint32_t)0x00000100)        /*!< bit 8 */
+#define  NVIC_ISER_SETENA_9                  ((uint32_t)0x00000200)        /*!< bit 9 */
+#define  NVIC_ISER_SETENA_10                 ((uint32_t)0x00000400)        /*!< bit 10 */
+#define  NVIC_ISER_SETENA_11                 ((uint32_t)0x00000800)        /*!< bit 11 */
+#define  NVIC_ISER_SETENA_12                 ((uint32_t)0x00001000)        /*!< bit 12 */
+#define  NVIC_ISER_SETENA_13                 ((uint32_t)0x00002000)        /*!< bit 13 */
+#define  NVIC_ISER_SETENA_14                 ((uint32_t)0x00004000)        /*!< bit 14 */
+#define  NVIC_ISER_SETENA_15                 ((uint32_t)0x00008000)        /*!< bit 15 */
+#define  NVIC_ISER_SETENA_16                 ((uint32_t)0x00010000)        /*!< bit 16 */
+#define  NVIC_ISER_SETENA_17                 ((uint32_t)0x00020000)        /*!< bit 17 */
+#define  NVIC_ISER_SETENA_18                 ((uint32_t)0x00040000)        /*!< bit 18 */
+#define  NVIC_ISER_SETENA_19                 ((uint32_t)0x00080000)        /*!< bit 19 */
+#define  NVIC_ISER_SETENA_20                 ((uint32_t)0x00100000)        /*!< bit 20 */
+#define  NVIC_ISER_SETENA_21                 ((uint32_t)0x00200000)        /*!< bit 21 */
+#define  NVIC_ISER_SETENA_22                 ((uint32_t)0x00400000)        /*!< bit 22 */
+#define  NVIC_ISER_SETENA_23                 ((uint32_t)0x00800000)        /*!< bit 23 */
+#define  NVIC_ISER_SETENA_24                 ((uint32_t)0x01000000)        /*!< bit 24 */
+#define  NVIC_ISER_SETENA_25                 ((uint32_t)0x02000000)        /*!< bit 25 */
+#define  NVIC_ISER_SETENA_26                 ((uint32_t)0x04000000)        /*!< bit 26 */
+#define  NVIC_ISER_SETENA_27                 ((uint32_t)0x08000000)        /*!< bit 27 */
+#define  NVIC_ISER_SETENA_28                 ((uint32_t)0x10000000)        /*!< bit 28 */
+#define  NVIC_ISER_SETENA_29                 ((uint32_t)0x20000000)        /*!< bit 29 */
+#define  NVIC_ISER_SETENA_30                 ((uint32_t)0x40000000)        /*!< bit 30 */
+#define  NVIC_ISER_SETENA_31                 ((uint32_t)0x80000000)        /*!< bit 31 */
+
+/******************  Bit definition for NVIC_ICER register  *******************/
+#define  NVIC_ICER_CLRENA                   ((uint32_t)0xFFFFFFFF)        /*!< Interrupt clear-enable bits */
+#define  NVIC_ICER_CLRENA_0                  ((uint32_t)0x00000001)        /*!< bit 0 */
+#define  NVIC_ICER_CLRENA_1                  ((uint32_t)0x00000002)        /*!< bit 1 */
+#define  NVIC_ICER_CLRENA_2                  ((uint32_t)0x00000004)        /*!< bit 2 */
+#define  NVIC_ICER_CLRENA_3                  ((uint32_t)0x00000008)        /*!< bit 3 */
+#define  NVIC_ICER_CLRENA_4                  ((uint32_t)0x00000010)        /*!< bit 4 */
+#define  NVIC_ICER_CLRENA_5                  ((uint32_t)0x00000020)        /*!< bit 5 */
+#define  NVIC_ICER_CLRENA_6                  ((uint32_t)0x00000040)        /*!< bit 6 */
+#define  NVIC_ICER_CLRENA_7                  ((uint32_t)0x00000080)        /*!< bit 7 */
+#define  NVIC_ICER_CLRENA_8                  ((uint32_t)0x00000100)        /*!< bit 8 */
+#define  NVIC_ICER_CLRENA_9                  ((uint32_t)0x00000200)        /*!< bit 9 */
+#define  NVIC_ICER_CLRENA_10                 ((uint32_t)0x00000400)        /*!< bit 10 */
+#define  NVIC_ICER_CLRENA_11                 ((uint32_t)0x00000800)        /*!< bit 11 */
+#define  NVIC_ICER_CLRENA_12                 ((uint32_t)0x00001000)        /*!< bit 12 */
+#define  NVIC_ICER_CLRENA_13                 ((uint32_t)0x00002000)        /*!< bit 13 */
+#define  NVIC_ICER_CLRENA_14                 ((uint32_t)0x00004000)        /*!< bit 14 */
+#define  NVIC_ICER_CLRENA_15                 ((uint32_t)0x00008000)        /*!< bit 15 */
+#define  NVIC_ICER_CLRENA_16                 ((uint32_t)0x00010000)        /*!< bit 16 */
+#define  NVIC_ICER_CLRENA_17                 ((uint32_t)0x00020000)        /*!< bit 17 */
+#define  NVIC_ICER_CLRENA_18                 ((uint32_t)0x00040000)        /*!< bit 18 */
+#define  NVIC_ICER_CLRENA_19                 ((uint32_t)0x00080000)        /*!< bit 19 */
+#define  NVIC_ICER_CLRENA_20                 ((uint32_t)0x00100000)        /*!< bit 20 */
+#define  NVIC_ICER_CLRENA_21                 ((uint32_t)0x00200000)        /*!< bit 21 */
+#define  NVIC_ICER_CLRENA_22                 ((uint32_t)0x00400000)        /*!< bit 22 */
+#define  NVIC_ICER_CLRENA_23                 ((uint32_t)0x00800000)        /*!< bit 23 */
+#define  NVIC_ICER_CLRENA_24                 ((uint32_t)0x01000000)        /*!< bit 24 */
+#define  NVIC_ICER_CLRENA_25                 ((uint32_t)0x02000000)        /*!< bit 25 */
+#define  NVIC_ICER_CLRENA_26                 ((uint32_t)0x04000000)        /*!< bit 26 */
+#define  NVIC_ICER_CLRENA_27                 ((uint32_t)0x08000000)        /*!< bit 27 */
+#define  NVIC_ICER_CLRENA_28                 ((uint32_t)0x10000000)        /*!< bit 28 */
+#define  NVIC_ICER_CLRENA_29                 ((uint32_t)0x20000000)        /*!< bit 29 */
+#define  NVIC_ICER_CLRENA_30                 ((uint32_t)0x40000000)        /*!< bit 30 */
+#define  NVIC_ICER_CLRENA_31                 ((uint32_t)0x80000000)        /*!< bit 31 */
+
+/******************  Bit definition for NVIC_ISPR register  *******************/
+#define  NVIC_ISPR_SETPEND                   ((uint32_t)0xFFFFFFFF)        /*!< Interrupt set-pending bits */
+#define  NVIC_ISPR_SETPEND_0                 ((uint32_t)0x00000001)        /*!< bit 0 */
+#define  NVIC_ISPR_SETPEND_1                 ((uint32_t)0x00000002)        /*!< bit 1 */
+#define  NVIC_ISPR_SETPEND_2                 ((uint32_t)0x00000004)        /*!< bit 2 */
+#define  NVIC_ISPR_SETPEND_3                 ((uint32_t)0x00000008)        /*!< bit 3 */
+#define  NVIC_ISPR_SETPEND_4                 ((uint32_t)0x00000010)        /*!< bit 4 */
+#define  NVIC_ISPR_SETPEND_5                 ((uint32_t)0x00000020)        /*!< bit 5 */
+#define  NVIC_ISPR_SETPEND_6                 ((uint32_t)0x00000040)        /*!< bit 6 */
+#define  NVIC_ISPR_SETPEND_7                 ((uint32_t)0x00000080)        /*!< bit 7 */
+#define  NVIC_ISPR_SETPEND_8                 ((uint32_t)0x00000100)        /*!< bit 8 */
+#define  NVIC_ISPR_SETPEND_9                 ((uint32_t)0x00000200)        /*!< bit 9 */
+#define  NVIC_ISPR_SETPEND_10                ((uint32_t)0x00000400)        /*!< bit 10 */
+#define  NVIC_ISPR_SETPEND_11                ((uint32_t)0x00000800)        /*!< bit 11 */
+#define  NVIC_ISPR_SETPEND_12                ((uint32_t)0x00001000)        /*!< bit 12 */
+#define  NVIC_ISPR_SETPEND_13                ((uint32_t)0x00002000)        /*!< bit 13 */
+#define  NVIC_ISPR_SETPEND_14                ((uint32_t)0x00004000)        /*!< bit 14 */
+#define  NVIC_ISPR_SETPEND_15                ((uint32_t)0x00008000)        /*!< bit 15 */
+#define  NVIC_ISPR_SETPEND_16                ((uint32_t)0x00010000)        /*!< bit 16 */
+#define  NVIC_ISPR_SETPEND_17                ((uint32_t)0x00020000)        /*!< bit 17 */
+#define  NVIC_ISPR_SETPEND_18                ((uint32_t)0x00040000)        /*!< bit 18 */
+#define  NVIC_ISPR_SETPEND_19                ((uint32_t)0x00080000)        /*!< bit 19 */
+#define  NVIC_ISPR_SETPEND_20                ((uint32_t)0x00100000)        /*!< bit 20 */
+#define  NVIC_ISPR_SETPEND_21                ((uint32_t)0x00200000)        /*!< bit 21 */
+#define  NVIC_ISPR_SETPEND_22                ((uint32_t)0x00400000)        /*!< bit 22 */
+#define  NVIC_ISPR_SETPEND_23                ((uint32_t)0x00800000)        /*!< bit 23 */
+#define  NVIC_ISPR_SETPEND_24                ((uint32_t)0x01000000)        /*!< bit 24 */
+#define  NVIC_ISPR_SETPEND_25                ((uint32_t)0x02000000)        /*!< bit 25 */
+#define  NVIC_ISPR_SETPEND_26                ((uint32_t)0x04000000)        /*!< bit 26 */
+#define  NVIC_ISPR_SETPEND_27                ((uint32_t)0x08000000)        /*!< bit 27 */
+#define  NVIC_ISPR_SETPEND_28                ((uint32_t)0x10000000)        /*!< bit 28 */
+#define  NVIC_ISPR_SETPEND_29                ((uint32_t)0x20000000)        /*!< bit 29 */
+#define  NVIC_ISPR_SETPEND_30                ((uint32_t)0x40000000)        /*!< bit 30 */
+#define  NVIC_ISPR_SETPEND_31                ((uint32_t)0x80000000)        /*!< bit 31 */
+
+/******************  Bit definition for NVIC_ICPR register  *******************/
+#define  NVIC_ICPR_CLRPEND                   ((uint32_t)0xFFFFFFFF)        /*!< Interrupt clear-pending bits */
+#define  NVIC_ICPR_CLRPEND_0                 ((uint32_t)0x00000001)        /*!< bit 0 */
+#define  NVIC_ICPR_CLRPEND_1                 ((uint32_t)0x00000002)        /*!< bit 1 */
+#define  NVIC_ICPR_CLRPEND_2                 ((uint32_t)0x00000004)        /*!< bit 2 */
+#define  NVIC_ICPR_CLRPEND_3                 ((uint32_t)0x00000008)        /*!< bit 3 */
+#define  NVIC_ICPR_CLRPEND_4                 ((uint32_t)0x00000010)        /*!< bit 4 */
+#define  NVIC_ICPR_CLRPEND_5                 ((uint32_t)0x00000020)        /*!< bit 5 */
+#define  NVIC_ICPR_CLRPEND_6                 ((uint32_t)0x00000040)        /*!< bit 6 */
+#define  NVIC_ICPR_CLRPEND_7                 ((uint32_t)0x00000080)        /*!< bit 7 */
+#define  NVIC_ICPR_CLRPEND_8                 ((uint32_t)0x00000100)        /*!< bit 8 */
+#define  NVIC_ICPR_CLRPEND_9                 ((uint32_t)0x00000200)        /*!< bit 9 */
+#define  NVIC_ICPR_CLRPEND_10                ((uint32_t)0x00000400)        /*!< bit 10 */
+#define  NVIC_ICPR_CLRPEND_11                ((uint32_t)0x00000800)        /*!< bit 11 */
+#define  NVIC_ICPR_CLRPEND_12                ((uint32_t)0x00001000)        /*!< bit 12 */
+#define  NVIC_ICPR_CLRPEND_13                ((uint32_t)0x00002000)        /*!< bit 13 */
+#define  NVIC_ICPR_CLRPEND_14                ((uint32_t)0x00004000)        /*!< bit 14 */
+#define  NVIC_ICPR_CLRPEND_15                ((uint32_t)0x00008000)        /*!< bit 15 */
+#define  NVIC_ICPR_CLRPEND_16                ((uint32_t)0x00010000)        /*!< bit 16 */
+#define  NVIC_ICPR_CLRPEND_17                ((uint32_t)0x00020000)        /*!< bit 17 */
+#define  NVIC_ICPR_CLRPEND_18                ((uint32_t)0x00040000)        /*!< bit 18 */
+#define  NVIC_ICPR_CLRPEND_19                ((uint32_t)0x00080000)        /*!< bit 19 */
+#define  NVIC_ICPR_CLRPEND_20                ((uint32_t)0x00100000)        /*!< bit 20 */
+#define  NVIC_ICPR_CLRPEND_21                ((uint32_t)0x00200000)        /*!< bit 21 */
+#define  NVIC_ICPR_CLRPEND_22                ((uint32_t)0x00400000)        /*!< bit 22 */
+#define  NVIC_ICPR_CLRPEND_23                ((uint32_t)0x00800000)        /*!< bit 23 */
+#define  NVIC_ICPR_CLRPEND_24                ((uint32_t)0x01000000)        /*!< bit 24 */
+#define  NVIC_ICPR_CLRPEND_25                ((uint32_t)0x02000000)        /*!< bit 25 */
+#define  NVIC_ICPR_CLRPEND_26                ((uint32_t)0x04000000)        /*!< bit 26 */
+#define  NVIC_ICPR_CLRPEND_27                ((uint32_t)0x08000000)        /*!< bit 27 */
+#define  NVIC_ICPR_CLRPEND_28                ((uint32_t)0x10000000)        /*!< bit 28 */
+#define  NVIC_ICPR_CLRPEND_29                ((uint32_t)0x20000000)        /*!< bit 29 */
+#define  NVIC_ICPR_CLRPEND_30                ((uint32_t)0x40000000)        /*!< bit 30 */
+#define  NVIC_ICPR_CLRPEND_31                ((uint32_t)0x80000000)        /*!< bit 31 */
+
+/******************  Bit definition for NVIC_IABR register  *******************/
+#define  NVIC_IABR_ACTIVE                    ((uint32_t)0xFFFFFFFF)        /*!< Interrupt active flags */
+#define  NVIC_IABR_ACTIVE_0                  ((uint32_t)0x00000001)        /*!< bit 0 */
+#define  NVIC_IABR_ACTIVE_1                  ((uint32_t)0x00000002)        /*!< bit 1 */
+#define  NVIC_IABR_ACTIVE_2                  ((uint32_t)0x00000004)        /*!< bit 2 */
+#define  NVIC_IABR_ACTIVE_3                  ((uint32_t)0x00000008)        /*!< bit 3 */
+#define  NVIC_IABR_ACTIVE_4                  ((uint32_t)0x00000010)        /*!< bit 4 */
+#define  NVIC_IABR_ACTIVE_5                  ((uint32_t)0x00000020)        /*!< bit 5 */
+#define  NVIC_IABR_ACTIVE_6                  ((uint32_t)0x00000040)        /*!< bit 6 */
+#define  NVIC_IABR_ACTIVE_7                  ((uint32_t)0x00000080)        /*!< bit 7 */
+#define  NVIC_IABR_ACTIVE_8                  ((uint32_t)0x00000100)        /*!< bit 8 */
+#define  NVIC_IABR_ACTIVE_9                  ((uint32_t)0x00000200)        /*!< bit 9 */
+#define  NVIC_IABR_ACTIVE_10                 ((uint32_t)0x00000400)        /*!< bit 10 */
+#define  NVIC_IABR_ACTIVE_11                 ((uint32_t)0x00000800)        /*!< bit 11 */
+#define  NVIC_IABR_ACTIVE_12                 ((uint32_t)0x00001000)        /*!< bit 12 */
+#define  NVIC_IABR_ACTIVE_13                 ((uint32_t)0x00002000)        /*!< bit 13 */
+#define  NVIC_IABR_ACTIVE_14                 ((uint32_t)0x00004000)        /*!< bit 14 */
+#define  NVIC_IABR_ACTIVE_15                 ((uint32_t)0x00008000)        /*!< bit 15 */
+#define  NVIC_IABR_ACTIVE_16                 ((uint32_t)0x00010000)        /*!< bit 16 */
+#define  NVIC_IABR_ACTIVE_17                 ((uint32_t)0x00020000)        /*!< bit 17 */
+#define  NVIC_IABR_ACTIVE_18                 ((uint32_t)0x00040000)        /*!< bit 18 */
+#define  NVIC_IABR_ACTIVE_19                 ((uint32_t)0x00080000)        /*!< bit 19 */
+#define  NVIC_IABR_ACTIVE_20                 ((uint32_t)0x00100000)        /*!< bit 20 */
+#define  NVIC_IABR_ACTIVE_21                 ((uint32_t)0x00200000)        /*!< bit 21 */
+#define  NVIC_IABR_ACTIVE_22                 ((uint32_t)0x00400000)        /*!< bit 22 */
+#define  NVIC_IABR_ACTIVE_23                 ((uint32_t)0x00800000)        /*!< bit 23 */
+#define  NVIC_IABR_ACTIVE_24                 ((uint32_t)0x01000000)        /*!< bit 24 */
+#define  NVIC_IABR_ACTIVE_25                 ((uint32_t)0x02000000)        /*!< bit 25 */
+#define  NVIC_IABR_ACTIVE_26                 ((uint32_t)0x04000000)        /*!< bit 26 */
+#define  NVIC_IABR_ACTIVE_27                 ((uint32_t)0x08000000)        /*!< bit 27 */
+#define  NVIC_IABR_ACTIVE_28                 ((uint32_t)0x10000000)        /*!< bit 28 */
+#define  NVIC_IABR_ACTIVE_29                 ((uint32_t)0x20000000)        /*!< bit 29 */
+#define  NVIC_IABR_ACTIVE_30                 ((uint32_t)0x40000000)        /*!< bit 30 */
+#define  NVIC_IABR_ACTIVE_31                 ((uint32_t)0x80000000)        /*!< bit 31 */
+
+/******************  Bit definition for NVIC_PRI0 register  *******************/
+#define  NVIC_IPR0_PRI_0                     ((uint32_t)0x000000FF)        /*!< Priority of interrupt 0 */
+#define  NVIC_IPR0_PRI_1                     ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 1 */
+#define  NVIC_IPR0_PRI_2                     ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 2 */
+#define  NVIC_IPR0_PRI_3                     ((uint32_t)0xFF000000)        /*!< Priority of interrupt 3 */
+
+/******************  Bit definition for NVIC_PRI1 register  *******************/
+#define  NVIC_IPR1_PRI_4                     ((uint32_t)0x000000FF)        /*!< Priority of interrupt 4 */
+#define  NVIC_IPR1_PRI_5                     ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 5 */
+#define  NVIC_IPR1_PRI_6                     ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 6 */
+#define  NVIC_IPR1_PRI_7                     ((uint32_t)0xFF000000)        /*!< Priority of interrupt 7 */
+
+/******************  Bit definition for NVIC_PRI2 register  *******************/
+#define  NVIC_IPR2_PRI_8                     ((uint32_t)0x000000FF)        /*!< Priority of interrupt 8 */
+#define  NVIC_IPR2_PRI_9                     ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 9 */
+#define  NVIC_IPR2_PRI_10                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 10 */
+#define  NVIC_IPR2_PRI_11                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 11 */
+
+/******************  Bit definition for NVIC_PRI3 register  *******************/
+#define  NVIC_IPR3_PRI_12                    ((uint32_t)0x000000FF)        /*!< Priority of interrupt 12 */
+#define  NVIC_IPR3_PRI_13                    ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 13 */
+#define  NVIC_IPR3_PRI_14                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 14 */
+#define  NVIC_IPR3_PRI_15                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 15 */
+
+/******************  Bit definition for NVIC_PRI4 register  *******************/
+#define  NVIC_IPR4_PRI_16                    ((uint32_t)0x000000FF)        /*!< Priority of interrupt 16 */
+#define  NVIC_IPR4_PRI_17                    ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 17 */
+#define  NVIC_IPR4_PRI_18                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 18 */
+#define  NVIC_IPR4_PRI_19                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 19 */
+
+/******************  Bit definition for NVIC_PRI5 register  *******************/
+#define  NVIC_IPR5_PRI_20                    ((uint32_t)0x000000FF)        /*!< Priority of interrupt 20 */
+#define  NVIC_IPR5_PRI_21                    ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 21 */
+#define  NVIC_IPR5_PRI_22                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 22 */
+#define  NVIC_IPR5_PRI_23                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 23 */
+
+/******************  Bit definition for NVIC_PRI6 register  *******************/
+#define  NVIC_IPR6_PRI_24                    ((uint32_t)0x000000FF)        /*!< Priority of interrupt 24 */
+#define  NVIC_IPR6_PRI_25                    ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 25 */
+#define  NVIC_IPR6_PRI_26                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 26 */
+#define  NVIC_IPR6_PRI_27                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 27 */
+
+/******************  Bit definition for NVIC_PRI7 register  *******************/
+#define  NVIC_IPR7_PRI_28                    ((uint32_t)0x000000FF)        /*!< Priority of interrupt 28 */
+#define  NVIC_IPR7_PRI_29                    ((uint32_t)0x0000FF00)        /*!< Priority of interrupt 29 */
+#define  NVIC_IPR7_PRI_30                    ((uint32_t)0x00FF0000)        /*!< Priority of interrupt 30 */
+#define  NVIC_IPR7_PRI_31                    ((uint32_t)0xFF000000)        /*!< Priority of interrupt 31 */
+
+/******************  Bit definition for SCB_CPUID register  *******************/
+#define  SCB_CPUID_REVISION                  ((uint32_t)0x0000000F)        /*!< Implementation defined revision number */
+#define  SCB_CPUID_PARTNO                    ((uint32_t)0x0000FFF0)        /*!< Number of processor within family */
+#define  SCB_CPUID_Constant                  ((uint32_t)0x000F0000)        /*!< Reads as 0x0F */
+#define  SCB_CPUID_VARIANT                   ((uint32_t)0x00F00000)        /*!< Implementation defined variant number */
+#define  SCB_CPUID_IMPLEMENTER               ((uint32_t)0xFF000000)        /*!< Implementer code. ARM is 0x41 */
+
+/*******************  Bit definition for SCB_ICSR register  *******************/
+#define  SCB_ICSR_VECTACTIVE                 ((uint32_t)0x000001FF)        /*!< Active ISR number field */
+#define  SCB_ICSR_RETTOBASE                  ((uint32_t)0x00000800)        /*!< All active exceptions minus the IPSR_current_exception yields the empty set */
+#define  SCB_ICSR_VECTPENDING                ((uint32_t)0x003FF000)        /*!< Pending ISR number field */
+#define  SCB_ICSR_ISRPENDING                 ((uint32_t)0x00400000)        /*!< Interrupt pending flag */
+#define  SCB_ICSR_ISRPREEMPT                 ((uint32_t)0x00800000)        /*!< It indicates that a pending interrupt becomes active in the next running cycle */
+#define  SCB_ICSR_PENDSTCLR                  ((uint32_t)0x02000000)        /*!< Clear pending SysTick bit */
+#define  SCB_ICSR_PENDSTSET                  ((uint32_t)0x04000000)        /*!< Set pending SysTick bit */
+#define  SCB_ICSR_PENDSVCLR                  ((uint32_t)0x08000000)        /*!< Clear pending pendSV bit */
+#define  SCB_ICSR_PENDSVSET                  ((uint32_t)0x10000000)        /*!< Set pending pendSV bit */
+#define  SCB_ICSR_NMIPENDSET                 ((uint32_t)0x80000000)        /*!< Set pending NMI bit */
+
+/*******************  Bit definition for SCB_VTOR register  *******************/
+#define  SCB_VTOR_TBLOFF                     ((uint32_t)0x1FFFFF80)        /*!< Vector table base offset field */
+#define  SCB_VTOR_TBLBASE                    ((uint32_t)0x20000000)        /*!< Table base in code(0) or RAM(1) */
+
+/*!<*****************  Bit definition for SCB_AIRCR register  *******************/
+#define  SCB_AIRCR_VECTRESET                 ((uint32_t)0x00000001)        /*!< System Reset bit */
+#define  SCB_AIRCR_VECTCLRACTIVE             ((uint32_t)0x00000002)        /*!< Clear active vector bit */
+#define  SCB_AIRCR_SYSRESETREQ               ((uint32_t)0x00000004)        /*!< Requests chip control logic to generate a reset */
+
+#define  SCB_AIRCR_PRIGROUP                  ((uint32_t)0x00000700)        /*!< PRIGROUP[2:0] bits (Priority group) */
+#define  SCB_AIRCR_PRIGROUP_0                ((uint32_t)0x00000100)        /*!< Bit 0 */
+#define  SCB_AIRCR_PRIGROUP_1                ((uint32_t)0x00000200)        /*!< Bit 1 */
+#define  SCB_AIRCR_PRIGROUP_2                ((uint32_t)0x00000400)        /*!< Bit 2  */
+
+/* prority group configuration */
+#define  SCB_AIRCR_PRIGROUP0                 ((uint32_t)0x00000000)        /*!< Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority) */
+#define  SCB_AIRCR_PRIGROUP1                 ((uint32_t)0x00000100)        /*!< Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP2                 ((uint32_t)0x00000200)        /*!< Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP3                 ((uint32_t)0x00000300)        /*!< Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP4                 ((uint32_t)0x00000400)        /*!< Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP5                 ((uint32_t)0x00000500)        /*!< Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP6                 ((uint32_t)0x00000600)        /*!< Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority) */
+#define  SCB_AIRCR_PRIGROUP7                 ((uint32_t)0x00000700)        /*!< Priority group=7 (no pre-emption priority, 8 bits of subpriority) */
+
+#define  SCB_AIRCR_ENDIANESS                 ((uint32_t)0x00008000)        /*!< Data endianness bit */
+#define  SCB_AIRCR_VECTKEY                   ((uint32_t)0xFFFF0000)        /*!< Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT) */
+
+/*******************  Bit definition for SCB_SCR register  ********************/
+#define  SCB_SCR_SLEEPONEXIT                 ((uint32_t)0x00000002)               /*!< Sleep on exit bit */
+#define  SCB_SCR_SLEEPDEEP                   ((uint32_t)0x00000004)               /*!< Sleep deep bit */
+#define  SCB_SCR_SEVONPEND                   ((uint32_t)0x00000010)               /*!< Wake up from WFE */
+
+/********************  Bit definition for SCB_CCR register  *******************/
+#define  SCB_CCR_NONBASETHRDENA              ((uint32_t)0x00000001)            /*!< Thread mode can be entered from any level in Handler mode by controlled return value */
+#define  SCB_CCR_USERSETMPEND                ((uint32_t)0x00000002)            /*!< Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception */
+#define  SCB_CCR_UNALIGN_TRP                 ((uint32_t)0x00000008)            /*!< Trap for unaligned access */
+#define  SCB_CCR_DIV_0_TRP                   ((uint32_t)0x00000010)            /*!< Trap on Divide by 0 */
+#define  SCB_CCR_BFHFNMIGN                   ((uint32_t)0x00000100)            /*!< Handlers running at priority -1 and -2 */
+#define  SCB_CCR_STKALIGN                    ((uint32_t)0x00000200)            /*!< On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned */
+
+/*******************  Bit definition for SCB_SHPR register ********************/
+#define  SCB_SHPR_PRI_N                      ((uint32_t)0x000000FF)        /*!< Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor */
+#define  SCB_SHPR_PRI_N1                     ((uint32_t)0x0000FF00)        /*!< Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved */
+#define  SCB_SHPR_PRI_N2                     ((uint32_t)0x00FF0000)        /*!< Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV */
+#define  SCB_SHPR_PRI_N3                     ((uint32_t)0xFF000000)        /*!< Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick */
+
+/******************  Bit definition for SCB_SHCSR register  *******************/
+#define  SCB_SHCSR_MEMFAULTACT               ((uint32_t)0x00000001)        /*!< MemManage is active */
+#define  SCB_SHCSR_BUSFAULTACT               ((uint32_t)0x00000002)        /*!< BusFault is active */
+#define  SCB_SHCSR_USGFAULTACT               ((uint32_t)0x00000008)        /*!< UsageFault is active */
+#define  SCB_SHCSR_SVCALLACT                 ((uint32_t)0x00000080)        /*!< SVCall is active */
+#define  SCB_SHCSR_MONITORACT                ((uint32_t)0x00000100)        /*!< Monitor is active */
+#define  SCB_SHCSR_PENDSVACT                 ((uint32_t)0x00000400)        /*!< PendSV is active */
+#define  SCB_SHCSR_SYSTICKACT                ((uint32_t)0x00000800)        /*!< SysTick is active */
+#define  SCB_SHCSR_USGFAULTPENDED            ((uint32_t)0x00001000)        /*!< Usage Fault is pended */
+#define  SCB_SHCSR_MEMFAULTPENDED            ((uint32_t)0x00002000)        /*!< MemManage is pended */
+#define  SCB_SHCSR_BUSFAULTPENDED            ((uint32_t)0x00004000)        /*!< Bus Fault is pended */
+#define  SCB_SHCSR_SVCALLPENDED              ((uint32_t)0x00008000)        /*!< SVCall is pended */
+#define  SCB_SHCSR_MEMFAULTENA               ((uint32_t)0x00010000)        /*!< MemManage enable */
+#define  SCB_SHCSR_BUSFAULTENA               ((uint32_t)0x00020000)        /*!< Bus Fault enable */
+#define  SCB_SHCSR_USGFAULTENA               ((uint32_t)0x00040000)        /*!< UsageFault enable */
+
+/*******************  Bit definition for SCB_CFSR register  *******************/
+/*!< MFSR */
+#define  SCB_CFSR_IACCVIOL                   ((uint32_t)0x00000001)        /*!< Instruction access violation */
+#define  SCB_CFSR_DACCVIOL                   ((uint32_t)0x00000002)        /*!< Data access violation */
+#define  SCB_CFSR_MUNSTKERR                  ((uint32_t)0x00000008)        /*!< Unstacking error */
+#define  SCB_CFSR_MSTKERR                    ((uint32_t)0x00000010)        /*!< Stacking error */
+#define  SCB_CFSR_MMARVALID                  ((uint32_t)0x00000080)        /*!< Memory Manage Address Register address valid flag */
+/*!< BFSR */
+#define  SCB_CFSR_IBUSERR                    ((uint32_t)0x00000100)        /*!< Instruction bus error flag */
+#define  SCB_CFSR_PRECISERR                  ((uint32_t)0x00000200)        /*!< Precise data bus error */
+#define  SCB_CFSR_IMPRECISERR                ((uint32_t)0x00000400)        /*!< Imprecise data bus error */
+#define  SCB_CFSR_UNSTKERR                   ((uint32_t)0x00000800)        /*!< Unstacking error */
+#define  SCB_CFSR_STKERR                     ((uint32_t)0x00001000)        /*!< Stacking error */
+#define  SCB_CFSR_BFARVALID                  ((uint32_t)0x00008000)        /*!< Bus Fault Address Register address valid flag */
+/*!< UFSR */
+#define  SCB_CFSR_UNDEFINSTR                 ((uint32_t)0x00010000)        /*!< The processor attempt to excecute an undefined instruction */
+#define  SCB_CFSR_INVSTATE                   ((uint32_t)0x00020000)        /*!< Invalid combination of EPSR and instruction */
+#define  SCB_CFSR_INVPC                      ((uint32_t)0x00040000)        /*!< Attempt to load EXC_RETURN into pc illegally */
+#define  SCB_CFSR_NOCP                       ((uint32_t)0x00080000)        /*!< Attempt to use a coprocessor instruction */
+#define  SCB_CFSR_UNALIGNED                  ((uint32_t)0x01000000)        /*!< Fault occurs when there is an attempt to make an unaligned memory access */
+#define  SCB_CFSR_DIVBYZERO                  ((uint32_t)0x02000000)        /*!< Fault occurs when SDIV or DIV instruction is used with a divisor of 0 */
+
+/*******************  Bit definition for SCB_HFSR register  *******************/
+#define  SCB_HFSR_VECTTBL                    ((uint32_t)0x00000002)        /*!< Fault occures because of vector table read on exception processing */
+#define  SCB_HFSR_FORCED                     ((uint32_t)0x40000000)        /*!< Hard Fault activated when a configurable Fault was received and cannot activate */
+#define  SCB_HFSR_DEBUGEVT                   ((uint32_t)0x80000000)        /*!< Fault related to debug */
+
+/*******************  Bit definition for SCB_DFSR register  *******************/
+#define  SCB_DFSR_HALTED                     ((uint32_t)0x00000001)               /*!< Halt request flag */
+#define  SCB_DFSR_BKPT                       ((uint32_t)0x00000002)               /*!< BKPT flag */
+#define  SCB_DFSR_DWTTRAP                    ((uint32_t)0x00000004)               /*!< Data Watchpoint and Trace (DWT) flag */
+#define  SCB_DFSR_VCATCH                     ((uint32_t)0x00000008)               /*!< Vector catch flag */
+#define  SCB_DFSR_EXTERNAL                   ((uint32_t)0x00000010)               /*!< External debug request flag */
+
+/*******************  Bit definition for SCB_MMFAR register  ******************/
+#define  SCB_MMFAR_ADDRESS                   ((uint32_t)0xFFFFFFFF)        /*!< Mem Manage fault address field */
+
+/*******************  Bit definition for SCB_BFAR register  *******************/
+#define  SCB_BFAR_ADDRESS                    ((uint32_t)0xFFFFFFFF)        /*!< Bus fault address field */
+
+/*******************  Bit definition for SCB_afsr register  *******************/
+#define  SCB_AFSR_IMPDEF                     ((uint32_t)0xFFFFFFFF)        /*!< Implementation defined */
+/**
+  * @}
+  */
+
+ /**
+  * @}
+  */ 
+/** @addtogroup Exported_macro
+  * @{
+  */
+      
+/****************************** ADC Instances *********************************/
+#define IS_ADC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == ADC1)
+
+/******************************** COMP Instances ******************************/
+#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \
+                                        ((INSTANCE) == COMP2))
+
+/****************************** CRC Instances *********************************/
+#define IS_CRC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CRC)
+
+/****************************** DAC Instances *********************************/
+#define IS_DAC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == DAC)
+
+/****************************** DMA Instances *********************************/
+#define IS_DMA_ALL_INSTANCE(INSTANCE) (((INSTANCE) == DMA1_Channel1) || \
+                                       ((INSTANCE) == DMA1_Channel2) || \
+                                       ((INSTANCE) == DMA1_Channel3) || \
+                                       ((INSTANCE) == DMA1_Channel4) || \
+                                       ((INSTANCE) == DMA1_Channel5) || \
+                                       ((INSTANCE) == DMA1_Channel6) || \
+                                       ((INSTANCE) == DMA1_Channel7) || \
+                                       ((INSTANCE) == DMA2_Channel1) || \
+                                       ((INSTANCE) == DMA2_Channel2) || \
+                                       ((INSTANCE) == DMA2_Channel3) || \
+                                       ((INSTANCE) == DMA2_Channel4) || \
+                                       ((INSTANCE) == DMA2_Channel5))
+
+/******************************* GPIO Instances *******************************/
+#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
+                                        ((INSTANCE) == GPIOB) || \
+                                        ((INSTANCE) == GPIOC) || \
+                                        ((INSTANCE) == GPIOD) || \
+                                        ((INSTANCE) == GPIOE) || \
+                                        ((INSTANCE) == GPIOH))
+
+/**************************** GPIO Lock Instances *****************************/
+/* On L1, all GPIO Bank support the Lock mechanism */
+#define IS_GPIO_LOCK_INSTANCE(INSTANCE) IS_GPIO_ALL_INSTANCE(INSTANCE)
+
+/******************************** I2C Instances *******************************/
+#define IS_I2C_ALL_INSTANCE(INSTANCE) (((INSTANCE) == I2C1) || \
+                                       ((INSTANCE) == I2C2))
+
+#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
+                                       ((INSTANCE) == SPI2) || \
+                                       ((INSTANCE) == SPI3))
+/****************************** IWDG Instances ********************************/
+#define IS_IWDG_ALL_INSTANCE(INSTANCE)  ((INSTANCE) == IWDG)
+
+/****************************** OPAMP Instances *******************************/
+#define IS_OPAMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == OPAMP1) || \
+                                         ((INSTANCE) == OPAMP2))
+                                         
+/****************************** RTC Instances *********************************/
+#define IS_RTC_ALL_INSTANCE(INSTANCE)  ((INSTANCE) == RTC)
+
+/******************************** SPI Instances *******************************/
+#define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \
+                                       ((INSTANCE) == SPI2) || \
+                                       ((INSTANCE) == SPI3))
+
+/****************************** TIM Instances *********************************/ 
+#define IS_TIM_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)    || \
+                                   ((INSTANCE) == TIM3)    || \
+                                   ((INSTANCE) == TIM4)    || \
+                                   ((INSTANCE) == TIM5)    || \
+                                   ((INSTANCE) == TIM6)    || \
+                                   ((INSTANCE) == TIM7)    || \
+                                   ((INSTANCE) == TIM9)    || \
+                                   ((INSTANCE) == TIM10)   || \
+                                   ((INSTANCE) == TIM11))
+
+#define IS_TIM_CC1_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                       ((INSTANCE) == TIM3)  || \
+                                       ((INSTANCE) == TIM4)  || \
+                                       ((INSTANCE) == TIM5)  || \
+                                       ((INSTANCE) == TIM9)  || \
+                                       ((INSTANCE) == TIM10) || \
+                                       ((INSTANCE) == TIM11))
+
+#define IS_TIM_CC2_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                       ((INSTANCE) == TIM3)  || \
+                                       ((INSTANCE) == TIM4)  || \
+                                       ((INSTANCE) == TIM5)  || \
+                                       ((INSTANCE) == TIM9))
+
+#define IS_TIM_CC3_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                       ((INSTANCE) == TIM3)  || \
+                                       ((INSTANCE) == TIM4)  || \
+                                       ((INSTANCE) == TIM5))
+
+#define IS_TIM_CC4_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                       ((INSTANCE) == TIM3)  || \
+                                       ((INSTANCE) == TIM4)  || \
+                                       ((INSTANCE) == TIM5))
+
+#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                        ((INSTANCE) == TIM3)  || \
+                                                        ((INSTANCE) == TIM4)  || \
+                                                        ((INSTANCE) == TIM5)  || \
+                                                        ((INSTANCE) == TIM9))
+
+#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                        ((INSTANCE) == TIM3)  || \
+                                                        ((INSTANCE) == TIM4)  || \
+                                                        ((INSTANCE) == TIM5)  || \
+                                                        ((INSTANCE) == TIM9)  || \
+                                                        ((INSTANCE) == TIM10) || \
+                                                        ((INSTANCE) == TIM11))
+
+#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                   ((INSTANCE) == TIM3)  || \
+                                                   ((INSTANCE) == TIM4)  || \
+                                                   ((INSTANCE) == TIM5)  || \
+                                                   ((INSTANCE) == TIM9))
+
+#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                    ((INSTANCE) == TIM3)  || \
+                                                    ((INSTANCE) == TIM4)  || \
+                                                    ((INSTANCE) == TIM5)  || \
+                                                    ((INSTANCE) == TIM9))
+
+#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                ((INSTANCE) == TIM3)  || \
+                                                ((INSTANCE) == TIM4))
+
+#define IS_TIM_XOR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                       ((INSTANCE) == TIM3)  || \
+                                       ((INSTANCE) == TIM4)  || \
+                                       ((INSTANCE) == TIM5))
+
+#define IS_TIM_MASTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                          ((INSTANCE) == TIM3)  || \
+                                          ((INSTANCE) == TIM4)  || \
+                                          ((INSTANCE) == TIM5)  || \
+                                          ((INSTANCE) == TIM6)  || \
+                                          ((INSTANCE) == TIM7)  || \
+                                          ((INSTANCE) == TIM9))
+
+#define IS_TIM_SLAVE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                         ((INSTANCE) == TIM3)  || \
+                                         ((INSTANCE) == TIM4)  || \
+                                         ((INSTANCE) == TIM5)  || \
+                                         ((INSTANCE) == TIM9))
+
+#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) ((INSTANCE) == TIM5)
+
+#define IS_TIM_DMABURST_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                            ((INSTANCE) == TIM3)  || \
+                                            ((INSTANCE) == TIM4)  || \
+                                            ((INSTANCE) == TIM5))
+
+#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) \
+    ((((INSTANCE) == TIM2) &&                   \
+     (((CHANNEL) == TIM_CHANNEL_1) ||          \
+      ((CHANNEL) == TIM_CHANNEL_2) ||          \
+      ((CHANNEL) == TIM_CHANNEL_3) ||          \
+      ((CHANNEL) == TIM_CHANNEL_4)))           \
+    ||                                         \
+    (((INSTANCE) == TIM3) &&                   \
+     (((CHANNEL) == TIM_CHANNEL_1) ||          \
+      ((CHANNEL) == TIM_CHANNEL_2) ||          \
+      ((CHANNEL) == TIM_CHANNEL_3) ||          \
+      ((CHANNEL) == TIM_CHANNEL_4)))           \
+    ||                                         \
+    (((INSTANCE) == TIM4) &&                   \
+     (((CHANNEL) == TIM_CHANNEL_1) ||          \
+      ((CHANNEL) == TIM_CHANNEL_2) ||          \
+      ((CHANNEL) == TIM_CHANNEL_3) ||          \
+      ((CHANNEL) == TIM_CHANNEL_4)))           \
+    ||                                         \
+    (((INSTANCE) == TIM5) &&                   \
+     (((CHANNEL) == TIM_CHANNEL_1) ||          \
+      ((CHANNEL) == TIM_CHANNEL_2) ||          \
+      ((CHANNEL) == TIM_CHANNEL_3) ||          \
+      ((CHANNEL) == TIM_CHANNEL_4)))           \
+    ||                                         \
+    (((INSTANCE) == TIM9) &&                  \
+     (((CHANNEL) == TIM_CHANNEL_1) ||          \
+      ((CHANNEL) == TIM_CHANNEL_2)))           \
+    ||                                         \
+    (((INSTANCE) == TIM10) &&                  \
+     (((CHANNEL) == TIM_CHANNEL_1)))           \
+    ||                                         \
+    (((INSTANCE) == TIM11) &&                  \
+     (((CHANNEL) == TIM_CHANNEL_1))))
+
+#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                  ((INSTANCE) == TIM3)  || \
+                                                  ((INSTANCE) == TIM4)  || \
+                                                  ((INSTANCE) == TIM5)  || \
+                                                  ((INSTANCE) == TIM9)  || \
+                                                  ((INSTANCE) == TIM10) || \
+                                                  ((INSTANCE) == TIM11))
+
+#define IS_TIM_DMA_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)    || \
+                                       ((INSTANCE) == TIM3)    || \
+                                       ((INSTANCE) == TIM4)    || \
+                                       ((INSTANCE) == TIM5)    || \
+                                       ((INSTANCE) == TIM6)    || \
+                                       ((INSTANCE) == TIM7))
+    
+#define IS_TIM_DMA_CC_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                          ((INSTANCE) == TIM3)  || \
+                                          ((INSTANCE) == TIM4)  || \
+                                          ((INSTANCE) == TIM5))
+
+#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)    || \
+                                                       ((INSTANCE) == TIM3)    || \
+                                                       ((INSTANCE) == TIM4)    || \
+                                                       ((INSTANCE) == TIM5)    || \
+                                                       ((INSTANCE) == TIM9))
+
+#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)  || \
+                                                     ((INSTANCE) == TIM3)  || \
+                                                     ((INSTANCE) == TIM4)  || \
+                                                     ((INSTANCE) == TIM5)  || \
+                                                     ((INSTANCE) == TIM9))
+
+#define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM2)    || \
+                                         ((INSTANCE) == TIM3)    || \
+                                         ((INSTANCE) == TIM9)    || \
+                                         ((INSTANCE) == TIM10)   || \
+                                         ((INSTANCE) == TIM11))
+
+/******************** USART Instances : Synchronous mode **********************/                                           
+#define IS_USART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
+                                     ((INSTANCE) == USART2) || \
+                                     ((INSTANCE) == USART3))
+
+/******************** UART Instances : Asynchronous mode **********************/
+#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
+                                    ((INSTANCE) == USART2) || \
+                                    ((INSTANCE) == USART3))
+
+/******************** UART Instances : Half-Duplex mode **********************/
+#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)   (((INSTANCE) == USART1) || \
+                                                 ((INSTANCE) == USART2) || \
+                                                 ((INSTANCE) == USART3))                                       
+
+/******************** UART Instances : LIN mode **********************/
+#define IS_UART_LIN_INSTANCE(INSTANCE)   (((INSTANCE) == USART1) || \
+                                          ((INSTANCE) == USART2) || \
+                                          ((INSTANCE) == USART3)) 
+
+/****************** UART Instances : Hardware Flow control ********************/                                    
+#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
+                                           ((INSTANCE) == USART2) || \
+                                           ((INSTANCE) == USART3))
+
+/********************* UART Instances : Smard card mode ***********************/
+#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
+                                         ((INSTANCE) == USART2) || \
+                                         ((INSTANCE) == USART3))
+
+/*********************** UART Instances : IRDA mode ***************************/
+#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
+                                    ((INSTANCE) == USART2) || \
+                                    ((INSTANCE) == USART3))
+
+/***************** UART Instances : Multi-Processor mode **********************/
+#define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE)   (((INSTANCE) == USART1) || \
+                                                     ((INSTANCE) == USART2) || \
+                                                     ((INSTANCE) == USART3)) 
+
+/****************************** WWDG Instances ********************************/
+#define IS_WWDG_ALL_INSTANCE(INSTANCE)  ((INSTANCE) == WWDG)
+
+
+/****************************** LCD Instances ********************************/
+#define IS_LCD_ALL_INSTANCE(INSTANCE) ((INSTANCE) == LCD)
+
+/****************************** USB Instances ********************************/
+#define IS_USB_ALL_INSTANCE(INSTANCE) ((INSTANCE) == USB)
+
+/**
+  * @}
+  */
+
+/******************************************************************************/
+/*  For a painless codes migration between the STM32L1xx device product       */
+/*  lines, the aliases defined below are put in place to overcome the         */
+/*  differences in the interrupt handlers and IRQn definitions.               */
+/*  No need to update developed interrupt code when moving across             */ 
+/*  product lines within the same STM32L1 Family                              */
+/******************************************************************************/
+
+/* Aliases for __IRQn */
+
+/* Aliases for __IRQHandler */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __STM32L152xC_H */
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx.h
new file mode 100755
index 0000000000..a7840b240b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx.h
@@ -0,0 +1,247 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx.h
+  * @author  MCD Application Team
+  * @version V2.0.0
+  * @date    5-September-2014
+  * @brief   CMSIS STM32L1xx Device Peripheral Access Layer Header File. 
+  *
+  *          The file is the unique include file that the application programmer
+  *          is using in the C source code, usually in main.c. This file contains:
+  *            - Configuration section that allows to select:
+  *              - The STM32L1xx device used in the target application
+  *              - To use or not the peripheral’s drivers in application code(i.e. 
+  *                code will be based on direct access to peripheral’s registers 
+  *                rather than drivers API), this option is controlled by 
+  *                "#define USE_HAL_DRIVER"
+  *  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32l1xx
+  * @{
+  */
+    
+#ifndef __STM32L1XX_H
+#define __STM32L1XX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif /* __cplusplus */
+  
+/** @addtogroup Library_configuration_section
+  * @{
+  */
+
+/* Uncomment the line below according to the target STM32L device used in your 
+   application 
+  */
+
+#if !defined (STM32L100xB) && !defined (STM32L100xBA) && !defined (STM32L100xC) && \
+    !defined (STM32L151xB) && !defined (STM32L151xBA) && !defined (STM32L151xC) && !defined (STM32L151xCA) && !defined (STM32L151xD) && !defined (STM32L151xE) && \
+    !defined (STM32L152xB) && !defined (STM32L152xBA) && !defined (STM32L152xC) && !defined (STM32L152xCA) && !defined (STM32L152xD) && !defined (STM32L152xE) && \
+    !defined (STM32L162xC) && !defined (STM32L162xCA) && !defined (STM32L162xD) && !defined (STM32L162xE)
+  /* #define STM32L100xB  */   /*!< STM32L100C6, STM32L100R and STM32L100RB Devices */
+  /* #define STM32L100xBA */   /*!< STM32L100C6-A, STM32L100R8-A and STM32L100RB-A Devices */
+  /* #define STM32L100xC  */   /*!< STM32L100RC Devices */
+  /* #define STM32L151xB  */   /*!< STM32L151C6, STM32L151R6, STM32L151C8, STM32L151R8, STM32L151V8, STM32L151CB, STM32L151RB and STM32L151VB */
+  /* #define STM32L151xBA */   /*!< STM32L151C6-A, STM32L151R6-A, STM32L151C8-A, STM32L151R8-A, STM32L151V8-A, STM32L151CB-A, STM32L151RB-A and STM32L151VB-A */ 
+  /* #define STM32L151xC  */   /*!< STM32L151CC, STM32L151UC, STM32L151RC and STM32L151VC */
+  /* #define STM32L151xCA */   /*!< STM32L151RC-A, STM32L151VC-A, STM32L151QC and STM32L151ZC */
+  /* #define STM32L151xD  */   /*!< STM32L151QD, STM32L151RD, STM32L151VD & STM32L151ZD */
+  /* #define STM32L151xE  */   /*!< STM32L151QE, STM32L151RE, STM32L151VE and STM32L151ZE */
+  /* #define STM32L152xB  */   /*!< STM32L152C6, STM32L152R6, STM32L152C8, STM32L152R8, STM32L152V8, STM32L152CB, STM32L152RB and STM32L152VB */
+  /* #define STM32L152xBA */   /*!< STM32L152C6-A, STM32L152R6-A, STM32L152C8-A, STM32L152R8-A, STM32L152V8-A, STM32L152CB-A, STM32L152RB-A and STM32L152VB-A */
+#define STM32L152xC    /*!< STM32L152CC, STM32L152UC, STM32L152RC and STM32L152VC */
+  /* #define STM32L152xCA */   /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */
+  /* #define STM32L152xD  */   /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */  
+  /* #define STM32L152xE  */   /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */
+  /* #define STM32L162xC  */   /*!< STM32L162RC and STM32L162VC */
+  /* #define STM32L162xCA */   /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */
+  /* #define STM32L162xD  */   /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */
+  /* #define STM32L162xE  */   /*!< STM32L162RE, STM32L162VE and STM32L162ZE */
+#endif
+
+/*  Tip: To avoid modifying this file each time you need to switch between these
+        devices, you can define the device in your toolchain compiler preprocessor.
+  */
+  
+#if !defined  (USE_HAL_DRIVER)
+/**
+ * @brief Comment the line below if you will not use the peripherals drivers.
+   In this case, these drivers will not be included and the application code will 
+   be based on direct access to peripherals registers 
+   */
+#define USE_HAL_DRIVER
+#endif /* USE_HAL_DRIVER */
+
+/**
+  * @brief CMSIS Device version number V2.0.0
+  */
+#define __STM32L1xx_CMSIS_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */                                  
+#define __STM32L1xx_CMSIS_DEVICE_VERSION_SUB1   (0x00) /*!< [23:16] sub1 version */
+#define __STM32L1xx_CMSIS_DEVICE_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32L1xx_CMSIS_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
+#define __STM32L1xx_CMSIS_DEVICE_VERSION        ((__CMSIS_DEVICE_VERSION_MAIN     << 24)\
+                                      |(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
+                                      |(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
+                                      |(__CMSIS_DEVICE_HAL_VERSION_RC))
+
+/**
+  * @}
+  */
+
+/** @addtogroup Device_Included
+  * @{
+  */
+
+#if defined(STM32L100xB)
+  #include "stm32l100xb.h"
+#elif defined(STM32L100xBA)
+  #include "stm32l100xba.h"
+#elif defined(STM32L100xC)
+  #include "stm32l100xc.h"
+#elif defined(STM32L151xB)
+  #include "stm32l151xb.h"
+#elif defined(STM32L151xBA)
+  #include "stm32l151xba.h"
+#elif defined(STM32L151xC)
+  #include "stm32l151xc.h"
+#elif defined(STM32L151xCA)
+  #include "stm32l151xca.h"
+#elif defined(STM32L151xD)
+  #include "stm32l151xd.h"
+#elif defined(STM32L151xE)
+  #include "stm32l151xe.h"
+#elif defined(STM32L152xB)
+  #include "stm32l152xb.h"
+#elif defined(STM32L152xBA)
+  #include "stm32l152xba.h"
+#elif defined(STM32L152xC)
+  #include "stm32l152xc.h"
+#elif defined(STM32L152xCA)
+  #include "stm32l152xca.h"
+#elif defined(STM32L152xD)
+  #include "stm32l152xd.h"
+#elif defined(STM32L152xE)
+  #include "stm32l152xe.h"
+#elif defined(STM32L162xC)
+  #include "stm32l162xc.h"
+#elif defined(STM32L162xCA)
+  #include "stm32l162xca.h"
+#elif defined(STM32L162xD)
+  #include "stm32l162xd.h"
+#elif defined(STM32L162xE)
+  #include "stm32l162xe.h"
+#else
+ #error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)"
+#endif
+
+/**
+  * @}
+  */
+
+/** @addtogroup Exported_types
+  * @{
+  */  
+typedef enum 
+{
+  RESET = 0, 
+  SET = !RESET
+} FlagStatus, ITStatus;
+
+typedef enum 
+{
+  DISABLE = 0, 
+  ENABLE = !DISABLE
+} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+
+typedef enum 
+{
+  ERROR = 0, 
+  SUCCESS = !ERROR
+} ErrorStatus;
+
+/**
+  * @}
+  */
+
+
+/** @addtogroup Exported_macros
+  * @{
+  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+
+#define CLEAR_REG(REG)        ((REG) = (0x0))
+
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+
+#define READ_REG(REG)         ((REG))
+
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
+
+
+/**
+  * @}
+  */
+
+#if defined (USE_HAL_DRIVER)
+ #include "stm32l1xx_hal.h"
+#endif /* USE_HAL_DRIVER */
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __STM32L1xx_H */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.c
new file mode 100755
index 0000000000..b0c277141a
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.c
@@ -0,0 +1,607 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32l1xx.c
+  * @author  MCD Application Team
+  * @version V2.0.0
+  * @date    5-September-2014
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32l1xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * This file configures the system clock as follows:
+  *-----------------------------------------------------------------------------
+  * System clock source                | 1- PLL_HSE_EXTC        | 3- PLL_HSI
+  *                                    | (external 8 MHz clock) | (internal 16 MHz)
+  *                                    | 2- PLL_HSE_XTAL        |
+  *                                    | (external 8 MHz xtal)  |
+  *-----------------------------------------------------------------------------
+  * SYSCLK(MHz)                        | 24                     | 32
+  *-----------------------------------------------------------------------------
+  * AHBCLK (MHz)                       | 24                     | 32
+  *-----------------------------------------------------------------------------
+  * APB1CLK (MHz)                      | 24                     | 32
+  *-----------------------------------------------------------------------------
+  * APB2CLK (MHz)                      | 24                     | 32
+  *-----------------------------------------------------------------------------
+  * USB capable (48 MHz precise clock) | YES                    | NO
+  *-----------------------------------------------------------------------------
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32l1xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32L1xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32l1xx.h"
+#include "hal_tick.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_Defines
+  * @{
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
+                                                This value can be provided and adapted by the user application. */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Default value of the Internal oscillator in Hz.
+                                                This value can be provided and adapted by the user application. */
+#endif /* HSI_VALUE */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM32L152D_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+  
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */ 
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
+                                  This value must be a multiple of 0x200. */
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_Macros
+  * @{
+  */
+
+/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
+#define USE_PLL_HSE_EXTC (0) /* Use external clock */
+#define USE_PLL_HSE_XTAL (1) /* Use external xtal */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = 32000000; /* Default with HSI. Will be updated if HSE is used */
+const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
+#endif
+
+uint8_t SetSysClock_PLL_HSI(void);
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemCoreClock variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit (void)
+{
+  /*!< Set MSION bit */
+  RCC->CR |= (uint32_t)0x00000100;
+
+  /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
+  RCC->CFGR &= (uint32_t)0x88FFC00C;
+  
+  /*!< Reset HSION, HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xEEFEFFFE;
+
+  /*!< Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
+  RCC->CFGR &= (uint32_t)0xFF02FFFF;
+
+  /*!< Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+    
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
+#endif
+
+  /* Configure the Cube driver */
+  SystemCoreClock = 16000000; // At this stage the HSI is used as system clock
+  HAL_Init();
+
+  /* Configure the System clock source, PLL Multiplier and Divider factors,
+     AHB/APBx prescalers and Flash settings */
+  SetSysClock();
+  
+  /* Reset the timer to avoid issues after the RAM initialization */
+  TIM_MST_RESET_ON;
+  TIM_MST_RESET_OFF;
+}
+
+/**
+  * @brief  Update SystemCoreClock according to Clock Register Values
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI 
+  *             value as defined by the MSI range.
+  *                                   
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
+  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate (void)
+{
+  uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+  
+  switch (tmp)
+  {
+    case 0x00:  /* MSI used as system clock */
+      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+      SystemCoreClock = (32768 * (1 << (msirange + 1)));
+      break;
+    case 0x04:  /* HSI used as system clock */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x08:  /* HSE used as system clock */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x0C:  /* PLL used as system clock */
+      /* Get PLL clock source and multiplication factor ----------------------*/
+      pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
+      plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
+      pllmul = PLLMulTable[(pllmul >> 18)];
+      plldiv = (plldiv >> 22) + 1;
+      
+      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+
+      if (pllsource == 0x00)
+      {
+        /* HSI oscillator clock selected as PLL clock entry */
+        SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
+      }
+      else
+      {
+        /* HSE selected as PLL clock entry */
+        SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
+      }
+      break;
+    default: /* MSI used as system clock */
+      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
+      SystemCoreClock = (32768 * (1 << (msirange + 1)));
+      break;
+  }
+  /* Compute HCLK clock frequency --------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK clock frequency */
+  SystemCoreClock >>= tmp;
+}
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in SystemInit() function before jump to main.
+  *         This function configures the external SRAM mounted on STM32L152D_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                   +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 | 
+ | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 | 
+ | PD14 <-> FSMC_D0  | PE15 <-> FSMC_D12  |------------------+
+ | PD15 <-> FSMC_D1  |--------------------+ 
+ +-------------------+
+*/
+
+  /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHBENR   = 0x000080D8;
+  
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CC00CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A0A;
+  /* Configure PDx pins speed to 40 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0F0F;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00000CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA800A;
+  /* Configure PEx pins speed to 40 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC00F;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00CCCCCC;
+  GPIOF->AFR[1]  = 0xCCCC0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA000AAA;
+  /* Configure PFx pins speed to 40 MHz */ 
+  GPIOF->OSPEEDR = 0xFF000FFF;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00CCCCCC;
+  GPIOG->AFR[1]  = 0x00000C00;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00200AAA;
+  /* Configure PGx pins speed to 40 MHz */ 
+  GPIOG->OSPEEDR = 0x00300FFF;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHBENR    = 0x400080D8;
+
+  /* Configure and enable Bank1_SRAM3 */
+  FSMC_Bank1->BTCR[4]  = 0x00001011;
+  FSMC_Bank1->BTCR[5]  = 0x00000300;
+  FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
+/*
+  Bank1_SRAM3 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 0;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 3;
+  p.FSMC_BusTurnAroundDuration = 0;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+
+  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); 
+
+  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
+*/
+  
+}
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors,
+  *               AHB/APBx prescalers and Flash settings
+  * @note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).             
+  * @param  None
+  * @retval None
+  */
+void SetSysClock(void)
+{
+  /* 1- Try to start with HSE and external clock */
+#if USE_PLL_HSE_EXTC != 0
+  if (SetSysClock_PLL_HSE(1) == 0)
+#endif
+  {
+    /* 2- If fail try to start with HSE and external xtal */
+    #if USE_PLL_HSE_XTAL != 0
+    if (SetSysClock_PLL_HSE(0) == 0)
+    #endif
+    {
+      /* 3- If fail start with HSI clock */
+      if (SetSysClock_PLL_HSI() == 0)
+      {
+        while(1)
+        {
+          // [TODO] Put something here to tell the user that a problem occured...
+        }
+      }
+    }
+  }
+  
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
+}
+
+#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL)
+    return 1;   // already on HSE PLL, could occur from deepsleep waking
+
+  /* Used to gain time after DeepSleep in case HSI is used */
+  if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+  {
+    return 0;
+  }
+  
+  /* The voltage scaling allows optimizing the power consumption when the device is 
+     clocked below the maximum system frequency, to update the voltage scaling value 
+     regarding system frequency refer to product datasheet. */
+  __PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  
+  /* Enable HSE and HSI48 oscillators and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+  if (bypass == 0)
+  {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
+  }
+  else
+  {
+    RCC_OscInitStruct.HSEState          = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
+  }
+  RCC_OscInitStruct.HSIState            = RCC_HSI_OFF;
+  // SYSCLK = 24 MHz ((8 MHz * 6) / 2)
+  // USBCLK = 48 MHz (8 MHz * 6) --> USB OK
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL6;
+  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+ 
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 24 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 24 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;           // 24 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 24 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //if (bypass == 0)
+    //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
+  //else
+    //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
+  
+  return 1; // OK
+}
+#endif
+
+/******************************************************************************/
+/*            PLL (clocked by HSI) used as System clock source                */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSI(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* The voltage scaling allows optimizing the power consumption when the device is 
+     clocked below the maximum system frequency, to update the voltage scaling value 
+     regarding system frequency refer to product datasheet. */
+  __PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  
+  /* Enable HSI oscillator and activate PLL with HSI as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState            = RCC_HSE_OFF;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  // SYSCLK = 32 MHz ((16 MHz * 4) / 2)
+  // USBCLK = 64 MHz (16 MHz * 4) --> USB not possible
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL4;
+  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLL_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+  
+  /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
+  while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 32 MHz
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;           // 32 MHz
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+  {
+    return 0; // FAIL
+  }
+
+  /* Output clock on MCO1 pin(PA8) for debugging purpose */
+  //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
+  
+  return 1; // OK
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.h
new file mode 100644
index 0000000000..62e216539a
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/system_stm32l1xx.h
@@ -0,0 +1,123 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32l1xx.h
+  * @author  MCD Application Team
+  * @version V2.0.0
+  * @date    5-September-2014
+  * @brief   CMSIS Cortex-M3 Device System Source File for STM32L1xx devices.  
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32l1xx_system
+  * @{
+  */  
+  
+/**
+  * @brief Define to prevent recursive inclusion
+  */
+#ifndef __SYSTEM_STM32L1XX_H
+#define __SYSTEM_STM32L1XX_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+/** @addtogroup STM32L1xx_System_Includes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+
+/** @addtogroup STM32L1xx_System_Exported_types
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Exported_Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Exported_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32L1xx_System_Exported_Functions
+  * @{
+  */
+  
+extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
+extern void SetSysClock(void);
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SYSTEM_STM32L1XX_H */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */  
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralNames.h
new file mode 100755
index 0000000000..cb931d9cfb
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralNames.h
@@ -0,0 +1,82 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ADC_1 = (int)ADC1_BASE
+} ADCName;
+
+typedef enum {
+    DAC_1 = (int)DAC_BASE
+} DACName;
+
+typedef enum {
+    UART_1 = (int)USART1_BASE,
+    UART_2 = (int)USART2_BASE,
+    UART_3 = (int)USART3_BASE
+} UARTName;
+
+#define STDIO_UART_TX  PA_2
+#define STDIO_UART_RX  PA_3
+#define STDIO_UART     UART_2
+
+typedef enum {
+    SPI_1 = (int)SPI1_BASE,
+    SPI_2 = (int)SPI2_BASE,
+    SPI_3 = (int)SPI3_BASE
+} SPIName;
+
+typedef enum {
+    I2C_1 = (int)I2C1_BASE,
+    I2C_2 = (int)I2C2_BASE
+} I2CName;
+
+typedef enum {
+    PWM_2  = (int)TIM2_BASE,
+    PWM_3  = (int)TIM3_BASE,
+    PWM_4  = (int)TIM4_BASE,
+    PWM_5  = (int)TIM5_BASE,
+    PWM_9  = (int)TIM9_BASE,
+    PWM_10 = (int)TIM10_BASE,
+    PWM_11 = (int)TIM11_BASE
+} PWMName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralPins.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralPins.c
new file mode 100755
index 0000000000..02389685df
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PeripheralPins.c
@@ -0,0 +1,188 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#include "PeripheralPins.h"
+
+// =====
+// Note: Commented lines are alternative possibilities which are not used per default.
+//       If you change them, you will have also to modify the corresponding xxx_api.c file
+//       for pwmout, analogin, analogout, ...
+// =====
+
+//*** ADC ***
+
+const PinMap PinMap_ADC[] = {
+    {PA_0,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN0
+    {PA_1,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN1
+    {PA_2,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN2
+    {PA_3,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN3
+    {PA_4,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN4
+    {PA_5,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN5
+    {PA_6,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN6
+    {PA_7,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN7
+    {PB_0,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN8
+    {PB_1,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN9
+    {PB_12, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN18
+    {PB_13, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN19
+    {PB_14, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN20
+    {PB_15, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN21
+    {PC_0,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN10
+    {PC_1,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN11
+    {PC_2,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN12
+    {PC_3,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN13
+    {PC_4,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN14
+    {PC_5,  ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC_IN15
+    {NC,    NC,    0}
+};
+
+//*** DAC ***
+
+const PinMap PinMap_DAC[] = {
+    {PA_4, DAC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // DAC_OUT1
+    {PA_5, DAC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // DAC_OUT2 (Warning: LED1 is also on this pin)
+    {NC,   NC,    0}
+};
+
+//*** I2C ***
+
+const PinMap PinMap_I2C_SDA[] = {
+    {PB_7,  I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+    {PB_9,  I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+    {PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    {NC,    NC,    0}
+};
+
+const PinMap PinMap_I2C_SCL[] = {
+    {PB_6,  I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+    {PB_8,  I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+    {PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+    {NC,    NC,    0}
+};
+
+//*** PWM ***
+
+// TIM5 cannot be used because already used by the us_ticker.
+const PinMap PinMap_PWM[] = {
+//  {PA_0,  PWM_5,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)},  // TIM5_CH1
+    {PA_1,  PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH2
+//  {PA_1,  PWM_5,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)},  // TIM5_CH1
+    {PA_2,  PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH3
+//  {PA_2,  PWM_5,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)},  // TIM5_CH3
+//  {PA_2,  PWM_9,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)},  // TIM9_CH1
+    {PA_3,  PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH4
+//  {PA_3,  PWM_5,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)},  // TIM5_CH4
+//  {PA_3,  PWM_9,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)},  // TIM9_CH2
+    {PA_6,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH1
+//  {PA_6,  PWM_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10)}, // TIM10_CH1
+    {PA_7,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH2
+//  {PA_7,  PWM_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11)}, // TIM11_CH1
+    {PB_0,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH3
+    {PB_1,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH4
+    {PB_3,  PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH2
+    {PB_4,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH1
+    {PB_5,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH2
+    {PB_6,  PWM_4,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)},  // TIM4_CH1
+    {PB_7,  PWM_4,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)},  // TIM4_CH2
+    {PB_8,  PWM_4,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)},  // TIM4_CH3
+//  {PB_8,  PWM_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10)}, // TIM10_CH1
+    {PB_9,  PWM_4,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)},  // TIM4_CH4
+//  {PB_9,  PWM_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11)}, // TIM11_CH1
+    {PB_10, PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH3
+    {PB_11, PWM_2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)},  // TIM2_CH4
+    {PB_12, PWM_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10)}, // TIM10_CH1
+    {PB_13, PWM_9,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)},  // TIM9_CH1
+    {PB_14, PWM_9,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)},  // TIM9_CH2
+    {PB_15, PWM_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11)}, // TIM11_CH1
+    {PC_6,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH1
+    {PC_7,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH2
+    {PC_8,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH3
+    {PC_9,  PWM_3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)},  // TIM3_CH4
+    {NC,    NC,     0}
+};
+
+//*** SERIAL ***
+
+const PinMap PinMap_UART_TX[] = {
+    {PA_2,  UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+    {PA_9,  UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+    {PB_6,  UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+    {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+//  {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+    {NC,    NC,     0}
+};
+
+const PinMap PinMap_UART_RX[] = {
+    {PA_3,  UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+    {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+    {PB_7,  UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+    {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+//  {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+    {NC,    NC,     0}
+};
+
+//*** SPI ***
+
+const PinMap PinMap_SPI_MOSI[] = {
+    {PA_7,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+    {PA_12, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+    {PB_5,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+//  {PB_5,  SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+    {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {NC,    NC,    0}
+};
+
+const PinMap PinMap_SPI_MISO[] = {
+    {PA_6,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+    {PA_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+    {PB_4,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+//  {PB_4,  SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+    {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {NC,    NC,    0}
+};
+
+const PinMap PinMap_SPI_SCLK[] = {
+    {PA_5,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+    {PB_3,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+//  {PB_3,  SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+    {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {NC,    NC,    0}
+};
+
+const PinMap PinMap_SPI_SSEL[] = {
+    {PA_4,  SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+//  {PA_4,  SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+//  {PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+    {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+    {NC,    NC,    0}
+};
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PinNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PinNames.h
new file mode 100755
index 0000000000..b8ec33bc5f
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PinNames.h
@@ -0,0 +1,183 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// See stm32l0xx_hal_gpio.h and stm32l0xx_hal_gpio_ex.h for values of MODE, PUPD and AFNUM
+#define STM_PIN_DATA(MODE, PUPD, AFNUM)  ((int)(((AFNUM) << 7) | ((PUPD) << 4) | ((MODE) << 0)))
+#define STM_PIN_MODE(X)   (((X) >> 0) & 0x0F)
+#define STM_PIN_PUPD(X)   (((X) >> 4) & 0x07)
+#define STM_PIN_AFNUM(X)  (((X) >> 7) & 0x0F)
+#define STM_MODE_INPUT              (0)
+#define STM_MODE_OUTPUT_PP          (1)
+#define STM_MODE_OUTPUT_OD          (2)
+#define STM_MODE_AF_PP              (3)
+#define STM_MODE_AF_OD              (4)
+#define STM_MODE_ANALOG             (5)
+#define STM_MODE_IT_RISING          (6)
+#define STM_MODE_IT_FALLING         (7)
+#define STM_MODE_IT_RISING_FALLING  (8)
+#define STM_MODE_EVT_RISING         (9)
+#define STM_MODE_EVT_FALLING        (10)
+#define STM_MODE_EVT_RISING_FALLING (11)
+#define STM_MODE_IT_EVT_RESET       (12)
+
+// High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
+// Low nibble  = pin number
+#define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
+#define STM_PIN(X)  ((uint32_t)(X) & 0xF)
+
+typedef enum {
+    PIN_INPUT,
+    PIN_OUTPUT
+} PinDirection;
+
+typedef enum {
+    PA_0  = 0x00,
+    PA_1  = 0x01,
+    PA_2  = 0x02,
+    PA_3  = 0x03,
+    PA_4  = 0x04,
+    PA_5  = 0x05,
+    PA_6  = 0x06,
+    PA_7  = 0x07,
+    PA_8  = 0x08,
+    PA_9  = 0x09,
+    PA_10 = 0x0A,
+    PA_11 = 0x0B,
+    PA_12 = 0x0C,
+    PA_13 = 0x0D,
+    PA_14 = 0x0E,
+    PA_15 = 0x0F,
+
+    PB_0  = 0x10,
+    PB_1  = 0x11,
+    PB_2  = 0x12,
+    PB_3  = 0x13,
+    PB_4  = 0x14,
+    PB_5  = 0x15,
+    PB_6  = 0x16,
+    PB_7  = 0x17,
+    PB_8  = 0x18,
+    PB_9  = 0x19,
+    PB_10 = 0x1A,
+    PB_11 = 0x1B,
+    PB_12 = 0x1C,
+    PB_13 = 0x1D,
+    PB_14 = 0x1E,
+    PB_15 = 0x1F,
+
+    PC_0  = 0x20,
+    PC_1  = 0x21,
+    PC_2  = 0x22,
+    PC_3  = 0x23,
+    PC_4  = 0x24,
+    PC_5  = 0x25,
+    PC_6  = 0x26,
+    PC_7  = 0x27,
+    PC_8  = 0x28,
+    PC_9  = 0x29,
+    PC_10 = 0x2A,
+    PC_11 = 0x2B,
+    PC_12 = 0x2C,
+    PC_13 = 0x2D,
+    PC_14 = 0x2E,
+    PC_15 = 0x2F,
+
+    PD_2  = 0x32,
+
+    //PH_0  = 0x70,
+    //PH_1  = 0x71,
+
+    // Arduino connector namings
+    A0          = PA_0,
+    A1          = PA_1,
+    A2          = PA_4,
+    A3          = PB_0,
+    A4          = PC_1,
+    A5          = PC_0,
+    D0          = PA_3,
+    D1          = PA_2,
+    D2          = PA_10,
+    D3          = PB_3,
+    D4          = PB_5,
+    D5          = PB_4,
+    D6          = PB_10,
+    D7          = PA_8,
+    D8          = PA_9,
+    D9          = PC_7,
+    D10         = PB_6,
+    D11         = PA_7,
+    D12         = PA_6,
+    D13         = PA_5,
+    D14         = PB_9,
+    D15         = PB_8,
+
+    // Generic signals namings
+    LED1        = PB_1,
+    LED2        = PB_7,
+    LED3        = PA_10,
+    //LED4        = PA_5,
+    //USER_BUTTON = PC_13,
+    SERIAL_TX   = PA_2,
+    SERIAL_RX   = PA_3,
+    USBTX       = PA_2,
+    USBRX       = PA_3,
+    I2C_SCL     = PB_8,
+    I2C_SDA     = PB_9,
+    SPI_MOSI    = PA_7,
+    SPI_MISO    = PA_6,
+    SPI_SCK     = PA_5,
+    SPI_CS      = PB_6,
+    PWM_OUT     = PB_3,
+
+    // Not connected
+    NC = (int)0xFFFFFFFF
+} PinName;
+
+typedef enum {
+    PullNone  = 0,
+    PullUp    = 1,
+    PullDown  = 2,
+    OpenDrain = 3,
+    PullDefault = PullNone
+} PinMode;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PortNames.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PortNames.h
new file mode 100755
index 0000000000..14295a0b4d
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/PortNames.h
@@ -0,0 +1,48 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_PORTNAMES_H
+#define MBED_PORTNAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PortA = 0,
+    PortB = 1,
+    PortC = 2,
+    PortD = 3,
+    PortH = 7
+} PortName;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
new file mode 100644
index 0000000000..fd151e3566
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
@@ -0,0 +1,70 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#define DEVICE_PORTIN           1
+#define DEVICE_PORTOUT          1
+#define DEVICE_PORTINOUT        1
+
+#define DEVICE_INTERRUPTIN      1
+
+#define DEVICE_ANALOGIN         1
+#define DEVICE_ANALOGOUT        1
+
+#define DEVICE_SERIAL           1
+
+#define DEVICE_I2C              1
+#define DEVICE_I2CSLAVE         1
+
+#define DEVICE_SPI              1
+#define DEVICE_SPISLAVE         1
+
+#define DEVICE_RTC              1
+
+#define DEVICE_PWMOUT           1
+
+#define DEVICE_SLEEP            1
+
+//=======================================
+
+#define DEVICE_SEMIHOST         0
+#define DEVICE_LOCALFILESYSTEM  0
+#define DEVICE_ID_LENGTH       24
+
+#define DEVICE_DEBUG_AWARENESS  0
+
+#define DEVICE_STDIO_MESSAGES   1
+
+#define DEVICE_ERROR_RED        0
+
+#include "objects.h"
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h
new file mode 100644
index 0000000000..c6048cfcbd
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/objects.h
@@ -0,0 +1,110 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
+
+#include "cmsis.h"
+#include "PortNames.h"
+#include "PeripheralNames.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct gpio_irq_s {
+    IRQn_Type irq_n;
+    uint32_t irq_index;
+    uint32_t event;
+    PinName pin;
+};
+
+struct port_s {
+    PortName port;
+    uint32_t mask;
+    PinDirection direction;
+    __IO uint32_t *reg_in;
+    __IO uint32_t *reg_out;
+};
+
+struct analogin_s {
+    ADCName adc;
+    PinName pin;
+};
+
+struct dac_s {
+    DACName dac;
+    PinName pin;
+};
+
+struct serial_s {
+    UARTName uart;
+    int index; // Used by irq
+    uint32_t baudrate;
+    uint32_t databits;
+    uint32_t stopbits;
+    uint32_t parity;
+    PinName  pin_tx;
+    PinName  pin_rx;
+};
+
+struct spi_s {
+    SPIName spi;
+    uint32_t bits;
+    uint32_t cpol;
+    uint32_t cpha;
+    uint32_t mode;
+    uint32_t nss;
+    uint32_t br_presc;
+    PinName  pin_miso;
+    PinName  pin_mosi;
+    PinName  pin_sclk;
+    PinName  pin_ssel;
+};
+
+struct i2c_s {
+    I2CName  i2c;
+    uint32_t slave;
+};
+
+struct pwmout_s {
+    PWMName pwm;
+    PinName pin;
+    uint32_t period;
+    uint32_t pulse;
+};
+
+#include "gpio_object.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/gpio_object.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/gpio_object.h
old mode 100644
new mode 100755
index 684d968757..3339350902
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/gpio_object.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/gpio_object.h
@@ -54,7 +54,11 @@ static inline void gpio_write(gpio_t *obj, int value)
     if (value) {
         *obj->reg_set = obj->mask;
     } else {
+#if defined(TARGET_STM32L152RC)
+        *obj->reg_set = obj->mask << 16;
+#else
         *obj->reg_clr = obj->mask;
+#endif
     }
 }
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
old mode 100644
new mode 100755
index 1bf0ba85f4..9c69525438
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
@@ -86,8 +86,14 @@ void rtc_init(void)
     __HAL_RCC_RTC_ENABLE();
 
     RtcHandle.Init.HourFormat     = RTC_HOURFORMAT_24;
+#ifdef TARGET_MOTE_L152RC
+    /* SubSecond resolution of 16384Hz */
+    RtcHandle.Init.AsynchPrediv   = 1;
+    RtcHandle.Init.SynchPrediv    = (rtc_freq / 2) - 1;
+#else
     RtcHandle.Init.AsynchPrediv   = 127;
     RtcHandle.Init.SynchPrediv    = (rtc_freq / 128) - 1;
+#endif
     RtcHandle.Init.OutPut         = RTC_OUTPUT_DISABLE;
     RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
     RtcHandle.Init.OutPutType     = RTC_OUTPUT_TYPE_OPENDRAIN;
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c
old mode 100644
new mode 100755
index 27731b903d..7698824df8
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c
@@ -95,15 +95,18 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
         obj->index = 2;
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         __UART4_CLK_ENABLE();
         obj->index = 3;
     }
-
+#endif
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         __UART5_CLK_ENABLE();
         obj->index = 4;
     }
+#endif
 
     // Configure the UART pins
     pinmap_pinout(tx, PinMap_UART_TX);
@@ -153,17 +156,20 @@ void serial_free(serial_t *obj)
         __USART3_CLK_DISABLE();
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         __UART4_FORCE_RESET();
         __UART4_RELEASE_RESET();
         __UART4_CLK_DISABLE();
     }
-
+#endif
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         __UART5_FORCE_RESET();
         __UART5_RELEASE_RESET();
         __UART5_CLK_DISABLE();
     }
+#endif
 
     // Configure GPIOs
     pin_function(obj->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
@@ -243,15 +249,19 @@ static void uart3_irq(void)
     uart_irq(UART_3, 2);
 }
 
+#if defined(USART4_BASE)
 static void uart4_irq(void)
 {
     uart_irq(UART_4, 3);
 }
+#endif
 
+#if defined(USART5_BASE)
 static void uart5_irq(void)
 {
     uart_irq(UART_5, 4);
 }
+#endif
 
 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
 {
@@ -281,15 +291,19 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
         vector = (uint32_t)&uart3_irq;
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         irq_n = UART4_IRQn;
         vector = (uint32_t)&uart4_irq;
     }
+#endif
 
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         irq_n = UART5_IRQn;
         vector = (uint32_t)&uart5_irq;
     }
+#endif
 
     if (enable) {
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c
old mode 100644
new mode 100755
index 07b90c4caf..7031a00e01
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/sleep.c
@@ -50,12 +50,43 @@ void sleep(void)
 
 void deepsleep(void)
 {
+#if defined(TARGET_MOTE_L152RC)
+    int8_t STOPEntry = PWR_STOPENTRY_WFI;
+#endif
+
     // Disable HAL tick interrupt
     TimMasterHandle.Instance = TIM5;
     __HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2);
 
+#if defined(TARGET_MOTE_L152RC)
+    /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
+    MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), PWR_LOWPOWERREGULATOR_ON);
+
+    /* Set SLEEPDEEP bit of Cortex System Control Register */
+    SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
+
+    /* Select Stop mode entry --------------------------------------------------*/
+    if(STOPEntry == PWR_STOPENTRY_WFI)
+    {
+        /* Request Wait For Interrupt */
+        __WFI();
+    }
+    else
+    {
+        /* Request Wait For Event */
+        __SEV();
+        __WFE();
+        __WFE();
+    }
+    __NOP();
+    __NOP();
+    __NOP();
+    /* Reset SLEEPDEEP bit of Cortex System Control Register */
+    CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
+#else
     // Request to enter STOP mode with regulator in low power mode
     HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
+#endif
 
     // After wake-up from STOP reconfigure the PLL
     SetSysClock();
diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
old mode 100644
new mode 100755
index ff2c31ace3..6dab08e9b8
--- a/workspace_tools/export/coide.py
+++ b/workspace_tools/export/coide.py
@@ -51,6 +51,7 @@ class CoIDE(Exporter):
         'DISCO_F429ZI',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
+        'MOTE_L152RC',
     ]
 
     # seems like CoIDE currently supports only one type
diff --git a/workspace_tools/export/coide_mote_l152rc.coproj.tmpl b/workspace_tools/export/coide_mote_l152rc.coproj.tmpl
new file mode 100755
index 0000000000..91ec35ee94
--- /dev/null
+++ b/workspace_tools/export/coide_mote_l152rc.coproj.tmpl
@@ -0,0 +1,90 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<Project version="2G - 2.0.1" name="{{name}}">
+  <Target name="{{name}}" isCurrent="1">
+    <Device manufacturerId="9" manufacturerName="ST" chipId="932" chipName="STM32L152RCT6" boardId="" boardName="" coreId="3" coreName="Cortex M3"/>
+    <BuildOption>
+      <Compile>
+        <Option name="OptimizationLevel" value="4"/>
+        <Option name="UseFPU" value="0"/>
+        <Option name="UserEditCompiler" value="-fno-common; -fmessage-length=0; -Wall; -fno-strict-aliasing; -fno-rtti; -fno-exceptions; -ffunction-sections; -fdata-sections; -std=gnu++98"/>
+        <Option name="FPU" value="1"/>
+        <Option name="SupportCPlusplus" value="1"/>
+        <Includepaths>
+          {% for path in include_paths %} <Includepath path="{{path}}"/> {% endfor %}
+        </Includepaths>
+        <DefinedSymbols>
+          {% for s in symbols %} <Define name="{{s}}"/> {% endfor %}
+        </DefinedSymbols>
+      </Compile>
+      <Link useDefault="0">
+        <Option name="DiscardUnusedSection" value="1"/>
+        <Option name="UserEditLinkder" value=""/>
+        <Option name="UseMemoryLayout" value="0"/>
+        <Option name="LTO" value="0"/>
+        <Option name="IsNewStartupCode" value="1"/>
+        <Option name="Library" value="Not use C Library"/>
+        <Option name="nostartfiles" value="0"/>
+        <Option name="UserEditLinker" value="-Wl,--wrap,main; --specs=nano.specs; -u _printf_float; -u _scanf_float; {% for file in object_files %}
+        ${project.path}/{{file}}; {% endfor %} {% for p in library_paths %}-L${project.path}/{{p}}; {% endfor %}"/>
+        <LinkedLibraries>
+          {% for lib in libraries %}
+          <Libset dir="" libs="{{lib}}"/>
+          {% endfor %}
+          <Libset dir="" libs="stdc++"/>
+          <Libset dir="" libs="supc++"/>
+          <Libset dir="" libs="m"/>
+          <Libset dir="" libs="gcc"/>
+          <Libset dir="" libs="c"/>
+          <Libset dir="" libs="nosys"/>
+        </LinkedLibraries>
+        <MemoryAreas debugInFlashNotRAM="1">
+          <Memory name="IROM1" type="ReadOnly" size="0x00040000" startValue="0x08000000"/>
+          <Memory name="IRAM1" type="ReadWrite" size="0x00007EC4" startValue="0x2000013C"/>
+          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
+          <Memory name="IRAM2" type="ReadWrite" size="" startValue=""/>
+        </MemoryAreas>
+        <LocateLinkFile path="{{scatter_file}}" type="0"/>
+      </Link>
+      <Output>
+        <Option name="OutputFileType" value="0"/>
+        <Option name="Path" value="./"/>
+        <Option name="Name" value="{{name}}"/>
+        <Option name="HEX" value="1"/>
+        <Option name="BIN" value="1"/>
+      </Output>
+      <User>
+        <UserRun name="Run#1" type="Before" checked="0" value=""/>
+        <UserRun name="Run#1" type="After" checked="0" value=""/>
+      </User>
+    </BuildOption>
+    <DebugOption>
+      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
+      <Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="stm32l1xx_256.elf"/>
+    </DebugOption>
+    <ExcludeFile/>
+  </Target>
+  <Components path="./"/>
+  <Files>
+    {% for file in source_files %}
+    <File name="sources/{{file.path}}" path="{{file.path}}" type="{{file.type}}"/>
+    {% endfor %}
+    {% for file in header_files %}
+    <File name="headers/{{file.path}}" path="{{file.path}}" type="{{file.type}}"/>
+    {% endfor %}
+  </Files>
+</Project>
diff --git a/workspace_tools/export/gcc_arm_mote_l152rc.tmpl b/workspace_tools/export/gcc_arm_mote_l152rc.tmpl
new file mode 100644
index 0000000000..8a9f703b28
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_mote_l152rc.tmpl
@@ -0,0 +1,71 @@
+# This file was automagically generated by mbed.org. For more information, 
+# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
+
+GCC_BIN = 
+PROJECT = {{name}}
+OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
+SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
+INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
+LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
+LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
+LINKER_SCRIPT = {{linker_script}}
+
+############################################################################### 
+AS      = $(GCC_BIN)arm-none-eabi-as
+CC      = $(GCC_BIN)arm-none-eabi-gcc
+CPP     = $(GCC_BIN)arm-none-eabi-g++
+LD      = $(GCC_BIN)arm-none-eabi-gcc
+OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
+OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
+SIZE 	= $(GCC_BIN)arm-none-eabi-size
+
+CPU = -mcpu=cortex-m3 -mthumb
+CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fno-rtti
+CC_FLAGS += -MMD -MP
+CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
+
+LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main
+LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
+LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+
+ifeq ($(DEBUG), 1)
+  CC_FLAGS += -DDEBUG -O0
+else
+  CC_FLAGS += -DNDEBUG -Os
+endif
+
+all: $(PROJECT).bin $(PROJECT).hex size
+
+clean:
+	rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
+
+.s.o:
+	$(AS) $(CPU) -o $@ $<
+
+.c.o:
+	$(CC)  $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99   $(INCLUDE_PATHS) -o $@ $<
+
+.cpp.o:
+	$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $<
+
+
+$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
+	$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
+
+$(PROJECT).bin: $(PROJECT).elf
+	@$(OBJCOPY) -O binary $< $@
+
+$(PROJECT).hex: $(PROJECT).elf
+	@$(OBJCOPY) -O ihex $< $@
+
+$(PROJECT).lst: $(PROJECT).elf
+	@$(OBJDUMP) -Sdh $< > $@
+
+lst: $(PROJECT).lst
+
+size:
+	$(SIZE) $(PROJECT).elf
+
+DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
+-include $(DEPS)
+
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
old mode 100644
new mode 100755
index a803e1451b..21a56ba718
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -82,8 +82,9 @@ class GccArm(Exporter):
         'NRF51_DONGLE',
         'SEEED_TINY_BLE',
         'DISCO_F401VC',
-        'DELTA_DFCM_NNN40',
+		'DELTA_DFCM_NNN40',
         'RZ_A1H',
+        'MOTE_L152RC',
     ]
 
     DOT_IN_RELATIVE_PATH = True
diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py
old mode 100644
new mode 100755
index a0ca0afcd6..352ec189c1
--- a/workspace_tools/export/iar.py
+++ b/workspace_tools/export/iar.py
@@ -72,6 +72,7 @@ class IAREmbeddedWorkbench(Exporter):
         'SEEED_TINY_BLE',
         'HRM1017',
         'ARCH_BLE',
+        'MOTE_L152RC',
     ]
 
     def generate(self):
diff --git a/workspace_tools/export/iar_mote_l152rc.ewp.tmpl b/workspace_tools/export/iar_mote_l152rc.ewp.tmpl
new file mode 100755
index 0000000000..cb4c55d0c9
--- /dev/null
+++ b/workspace_tools/export/iar_mote_l152rc.ewp.tmpl
@@ -0,0 +1,1903 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>22</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>Debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>Debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>Debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>5.10.0.159</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.30.1.7765</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32L152xC	ST STM32L152xC</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>21</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          {% for s in symbols %}
+            <state>{{s}}</state>
+          {% endfor %}
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state>Pa050,Pa084,Pa093,Pa082</state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>00000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+        {% for path in include_paths %}
+          <state>$PROJ_DIR$\{{path}}</state>
+        {% endfor %}
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>{{name}}.bin</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cpp.out</state>
+        </option>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\{{linker_script}}</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state>--skip_dynamic_initialization</state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+        {% for library in libraries %}
+          <state>$PROJ_DIR$\{{library}}</state>
+        {% endfor %}
+        {% for object in object_files %}
+          <state>$PROJ_DIR$\{{object}}</state>
+        {% endfor %}
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  <configuration>
+    <name>Release</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>22</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>ExePath</name>
+          <state>Release\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>Release\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>Release\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>21</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>5.10.0.159</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>6.30.1.53141</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>default    None</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>21</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>21</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>NDEBUG</state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>5.srec</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cpp.out</state>
+        </option>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$TOOLKIT_DIR$\CONFIG\generic.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  {% for files in source_files %}
+  <file>
+    <name>$PROJ_DIR$\{{files}}</name>
+  </file>
+  {% endfor %}
+</project>
+
+
diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
index 1f1c053829..a061a96689 100644
--- a/workspace_tools/export/uvision4.py
+++ b/workspace_tools/export/uvision4.py
@@ -75,6 +75,7 @@ class Uvision4(Exporter):
         'DELTA_DFCM_NNN40',
         'MAXWSNENV',
         'MAX32600MBED',
+        'MOTE_L152RC',
     ]
 
     USING_MICROLIB = [
@@ -100,6 +101,7 @@ class Uvision4(Exporter):
         'LPC11U35_501',
         'KL05Z',
         'LPC11U37H_401',
+        'MOTE_L152RC',
     ]
 
     FILE_TYPES = {
diff --git a/workspace_tools/export/uvision4_mote_l152rc.uvopt.tmpl b/workspace_tools/export/uvision4_mote_l152rc.uvopt.tmpl
new file mode 100755
index 0000000000..454e48b3d4
--- /dev/null
+++ b/workspace_tools/export/uvision4_mote_l152rc.uvopt.tmpl
@@ -0,0 +1,218 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>mbed MOTE_L152RC</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>32000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DllOpt>
+        <SimDllName>SARMCM3.DLL</SimDllName>
+        <SimDllArguments> -REMAP -MPU</SimDllArguments>
+        <SimDlgDllName>DCM.DLL</SimDlgDllName>
+        <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+        <TargetDllName>SARMCM3.DLL</TargetDllName>
+        <TargetDllArguments> -MPU</TargetDllArguments>
+        <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+        <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+      </DllOpt>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U-O206 -O206 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L1xx_384.FLM -FS08000000 -FL060000 -FP0($$Device:STM32L152RC$Flash\STM32L1xx_384.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7  -FN1 -FC1000 -FD20000000 -FF0STM32L1xx_384 -FL060000 -FS08000000 -FP0($$Device:STM32L152RC$Flash\STM32L1xx_384.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2CM3</Key>
+          <Name>-U -O207 -S8 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32L1xx_256 -FS08000000 -FL040000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_48MHZ -FS00 -FL020000</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>src</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>0</FileType>
+      <tvExp>0</tvExp>
+      <Focus>0</Focus>
+      <ColumnNumber>0</ColumnNumber>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <TopLine>0</TopLine>
+      <CurrentLine>0</CurrentLine>
+      <bDave2>0</bDave2>
+      <PathWithFileName>main.cpp</PathWithFileName>
+      <FilenameWithoutPath>main.cpp</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>
diff --git a/workspace_tools/export/uvision4_mote_l152rc.uvproj.tmpl b/workspace_tools/export/uvision4_mote_l152rc.uvproj.tmpl
new file mode 100755
index 0000000000..8e1685d8a3
--- /dev/null
+++ b/workspace_tools/export/uvision4_mote_l152rc.uvproj.tmpl
@@ -0,0 +1,438 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>mbed MOTE_L152RC</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32L152RC</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <Cpu>IRAM(0x20000000-0x20007FFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L1xx_256 -FS08000000 -FL040000)</FlashDriverDll>
+          <DeviceId>6520</DeviceId>
+          <RegisterFile>$$Device:STM32L152RC$Device\Include\STM32L1xx.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32L152RC$SVD\STM32L15x.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>{{name}}</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin -o build\{{name}}_MOTE_L152RC.bin build\{{name}}.axf</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>0</RestoreTracepoints>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>13</TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+            <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4103</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0xc000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x60000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x60000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0xc000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
+              <Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
+              <Undefine></Undefine>
+              <IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x10000000</DataAddressRange>
+            <ScatterFile>{{scatter_file}}</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc>
+            {% for file in object_files %}
+              {{file}}
+            {% endfor %}
+            </Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        {% for group,files in source_files %}
+        <Group>
+          <GroupName>{{group}}</GroupName>
+          <Files>
+            {% for file in files %}
+            <File>
+              <FileName>{{file.name}}</FileName>
+              <FileType>{{file.type}}</FileType>
+              <FilePath>{{file.path}}</FilePath>
+              <FileOption>
+                <CommonProperty>
+                  <UseCPPCompiler>2</UseCPPCompiler>
+                  <RVCTCodeConst>0</RVCTCodeConst>
+                  <RVCTZI>0</RVCTZI>
+                  <RVCTOtherData>0</RVCTOtherData>
+                  <ModuleSelection>0</ModuleSelection>
+                  <IncludeInBuild>1</IncludeInBuild>
+                  <AlwaysBuild>0</AlwaysBuild>
+                  <GenerateAssemblyFile>0</GenerateAssemblyFile>
+                  <AssembleAssemblyFile>0</AssembleAssemblyFile>
+                  <PublicsOnly>0</PublicsOnly>
+                  <StopOnExitCode>3</StopOnExitCode>
+                  <CustomArgument></CustomArgument>
+                  <IncludeLibraryModules></IncludeLibraryModules>
+                </CommonProperty>
+                <FileArmAds/>
+              </FileOption>
+            </File>
+            {% endfor %}
+          </Files>
+        </Group>
+        {% endfor %}
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
old mode 100644
new mode 100755
index 685cea4171..20c54be0d4
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -783,6 +783,15 @@ class MTS_DRAGONFLY_F411RE(Target):
         os.remove(binf)
         os.rename(target, binf)
 
+class MOTE_L152RC(Target):
+    def __init__(self):
+        Target.__init__(self)
+        self.core = "Cortex-M3"
+        self.extra_labels = ['STM', 'STM32L1', 'STM32L152RC']
+        self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
+        self.default_toolchain = "uARM"
+        self.detect_code = ["4100"]
+
 class DISCO_F401VC(Target):
     def __init__(self):
         Target.__init__(self)
@@ -1200,6 +1209,7 @@ TARGETS = [
     DISCO_L053C8(),
     MTS_MDOT_F405RG(),
     MTS_MDOT_F411RE(),
+    MOTE_L152RC(),
     MTS_DRAGONFLY_F411RE(),
     DISCO_F401VC(),
     UBLOX_C029(),   # STM32F439