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Sync with MCR20a RF driver v1.0.2

pull/8602/head
Arto Kinnunen 2018-10-31 16:11:34 +02:00
parent a215d9d856
commit 135a894b07
6 changed files with 490 additions and 547 deletions
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30
components/802.15.4_RF/mcr20a-rf-driver/source/MCR20Drv.c
View File

@ -165,8 +165,7 @@ uint8_t numOfBytes
{ {
uint8_t txData; uint8_t txData;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return; return;
} }
@ -231,8 +230,7 @@ uint8_t numOfBytes
{ {
uint8_t txData; uint8_t txData;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return; return;
} }
@ -303,8 +301,7 @@ uint8_t numOfBytes
uint8_t txData; uint8_t txData;
uint8_t phyIRQSTS1; uint8_t phyIRQSTS1;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return 0; return 0;
} }
@ -341,8 +338,7 @@ uint8_t numOfBytes
uint8_t txData; uint8_t txData;
uint8_t phyIRQSTS1; uint8_t phyIRQSTS1;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return 0; return 0;
} }
@ -410,8 +406,7 @@ uint8_t numOfBytes
{ {
uint16_t txData; uint16_t txData;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return; return;
} }
@ -478,8 +473,7 @@ uint8_t numOfBytes
{ {
uint16_t txData; uint16_t txData;
if( (numOfBytes == 0) || (byteArray == 0) ) if ((numOfBytes == 0) || (byteArray == 0)) {
{
return; return;
} }
@ -526,8 +520,7 @@ void
{ {
core_util_critical_section_enter(); core_util_critical_section_enter();
if( mPhyIrqDisableCnt == 0 ) if (mPhyIrqDisableCnt == 0) {
{
RF_IRQ_Disable(); RF_IRQ_Disable();
} }
@ -549,12 +542,10 @@ void
{ {
core_util_critical_section_enter(); core_util_critical_section_enter();
if( mPhyIrqDisableCnt ) if (mPhyIrqDisableCnt) {
{
mPhyIrqDisableCnt--; mPhyIrqDisableCnt--;
if( mPhyIrqDisableCnt == 0 ) if (mPhyIrqDisableCnt == 0) {
{
RF_IRQ_Enable(); RF_IRQ_Enable();
} }
} }
@ -672,8 +663,7 @@ uint8_t freqDiv
{ {
uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND; uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
if(freqDiv == gCLK_OUT_FREQ_DISABLE) if (freqDiv == gCLK_OUT_FREQ_DISABLE) {
{
clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
} }

233
components/802.15.4_RF/mcr20a-rf-driver/source/NanostackRfPhyMcr20a.cpp
View File

@ -85,15 +85,13 @@ typedef enum xcvrPwrMode_tag{
/*RF Part Type*/ /*RF Part Type*/
typedef enum typedef enum {
{
FREESCALE_UNKNOW_DEV = 0, FREESCALE_UNKNOW_DEV = 0,
FREESCALE_MCR20A FREESCALE_MCR20A
} rf_trx_part_e; } rf_trx_part_e;
/*Atmel RF states*/ /*Atmel RF states*/
typedef enum typedef enum {
{
NOP = 0x00, NOP = 0x00,
BUSY_RX = 0x01, BUSY_RX = 0x01,
RF_TX_START = 0x02, RF_TX_START = 0x02,
@ -237,8 +235,7 @@ static int8_t rf_device_register(void)
radio_type = rf_radio_type_read(); radio_type = rf_radio_type_read();
if(radio_type == FREESCALE_MCR20A) if (radio_type == FREESCALE_MCR20A) {
{
/*Set pointer to MAC address*/ /*Set pointer to MAC address*/
device_driver.PHY_MAC = MAC_address; device_driver.PHY_MAC = MAC_address;
device_driver.driver_description = (char *)"FREESCALE_MAC"; device_driver.driver_description = (char *)"FREESCALE_MAC";
@ -549,11 +546,13 @@ static void rf_init(void)
cRX_FRAME_FLT_DATA_FT | \ cRX_FRAME_FLT_DATA_FT | \
cRX_FRAME_FLT_CMD_FT)); cRX_FRAME_FLT_CMD_FT));
/* Direct register overwrites */ /* Direct register overwrites */
for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++) for (index = 0; index < sizeof(overwrites_direct) / sizeof(overwrites_t); index++) {
MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data); MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
}
/* Indirect register overwrites */ /* Indirect register overwrites */
for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++) for (index = 0; index < sizeof(overwrites_indirect) / sizeof(overwrites_t); index++) {
MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data); MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
}
/* Set the CCA energy threshold value */ /* Set the CCA energy threshold value */
MCR20Drv_IndirectAccessSPIWrite(CCA1_THRESH, RF_CCA_THRESHOLD); MCR20Drv_IndirectAccessSPIWrite(CCA1_THRESH, RF_CCA_THRESHOLD);
@ -613,17 +612,14 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
uint8_t ccaMode; uint8_t ccaMode;
/* Parameter validation */ /* Parameter validation */
if( !data_ptr || (data_length > 125) || (PHY_LAYER_PAYLOAD != data_protocol) ) if (!data_ptr || (data_length > 125) || (PHY_LAYER_PAYLOAD != data_protocol)) {
{
return -1; return -1;
} }
if( mPhySeqState == gRX_c ) if (mPhySeqState == gRX_c) {
{
uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F; uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
/* Check for an Rx in progress. */ /* Check for an Rx in progress. */
if((phyReg <= 0x06) || (phyReg == 0x15) || (phyReg == 0x16)) if ((phyReg <= 0x06) || (phyReg == 0x15) || (phyReg == 0x16)) {
{
if (device_driver.phy_tx_done_cb) { if (device_driver.phy_tx_done_cb) {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1); device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
} }
@ -633,8 +629,7 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
} }
/*Check if transmitter is busy*/ /*Check if transmitter is busy*/
if( mPhySeqState != gIdle_c ) if (mPhySeqState != gIdle_c) {
{
/*Return busy*/ /*Return busy*/
return -1; return -1;
} }
@ -653,8 +648,7 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
/* Set CCA mode 1 */ /* Set CCA mode 1 */
ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE; ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE;
if( ccaMode != gCcaCCA_MODE1_c ) if (ccaMode != gCcaCCA_MODE1_c) {
{
mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c); mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
mStatusAndControlRegs[PHY_CTRL4] |= gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c; mStatusAndControlRegs[PHY_CTRL4] |= gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]);
@ -704,13 +698,10 @@ static void rf_cca_abort(void)
static void rf_start_tx(void) static void rf_start_tx(void)
{ {
/* Perform TxRxAck sequence if required by phyTxMode */ /* Perform TxRxAck sequence if required by phyTxMode */
if( need_ack ) if (need_ack) {
{
mStatusAndControlRegs[PHY_CTRL1] |= cPHY_CTRL1_RXACKRQD; mStatusAndControlRegs[PHY_CTRL1] |= cPHY_CTRL1_RXACKRQD;
mPhySeqState = gTR_c; mPhySeqState = gTR_c;
} } else {
else
{
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_RXACKRQD); mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_RXACKRQD);
mPhySeqState = gTX_c; mPhySeqState = gTX_c;
} }
@ -724,8 +715,7 @@ static void rf_start_tx(void)
/* Start the sequence immediately */ /* Start the sequence immediately */
MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1, &mStatusAndControlRegs[PHY_CTRL1], 2); MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1, &mStatusAndControlRegs[PHY_CTRL1], 2);
if( need_ack ) if (need_ack) {
{
rf_ack_wait_timer_start(gPhyWarmUpTime_c + gPhySHRDuration_c + tx_len * gPhySymbolsPerOctet_c + gPhyAckWaitDuration_c); rf_ack_wait_timer_start(gPhyWarmUpTime_c + gPhySHRDuration_c + tx_len * gPhySymbolsPerOctet_c + gPhyAckWaitDuration_c);
} }
} }
@ -742,8 +732,7 @@ static void rf_receive(void)
uint8_t phyRegs[5]; uint8_t phyRegs[5];
/* RX can start only from Idle state */ /* RX can start only from Idle state */
if( mPhySeqState != gIdle_c ) if (mPhySeqState != gIdle_c) {
{
return; return;
} }
@ -804,8 +793,7 @@ static void rf_handle_rx_end(void)
rf_receive(); rf_receive();
/*Check the length is valid*/ /*Check the length is valid*/
if(len > 1 && len < RF_BUFFER_SIZE) if (len > 1 && len < RF_BUFFER_SIZE) {
{
rf_lqi = rf_convert_LQI(rf_lqi); rf_lqi = rf_convert_LQI(rf_lqi);
rf_rssi = rf_convert_LQI_to_RSSI(rf_lqi); rf_rssi = rf_convert_LQI_to_RSSI(rf_lqi);
/*gcararu: Scale LQI using received RSSI, to match the LQI reported by the ATMEL radio */ /*gcararu: Scale LQI using received RSSI, to match the LQI reported by the ATMEL radio */
@ -851,20 +839,14 @@ static void rf_handle_tx_end(void)
} }
/*Call PHY TX Done API*/ /*Call PHY TX Done API*/
if( need_ack ) if (need_ack) {
{ if (rx_frame_pending) {
if( rx_frame_pending )
{
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE_PENDING, 1, 1); device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE_PENDING, 1, 1);
} } else {
else
{
// arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1); // arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1);
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE, 1, 1); device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE, 1, 1);
} }
} } else {
else
{
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1); device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1);
} }
} }
@ -879,12 +861,9 @@ static void rf_handle_tx_end(void)
static void rf_handle_cca_ed_done(void) static void rf_handle_cca_ed_done(void)
{ {
/*Check the result of CCA process*/ /*Check the result of CCA process*/
if( !(mStatusAndControlRegs[IRQSTS2] & cIRQSTS2_CCA) ) if (!(mStatusAndControlRegs[IRQSTS2] & cIRQSTS2_CCA)) {
{
rf_start_tx(); rf_start_tx();
} } else if (device_driver.phy_tx_done_cb) {
else if (device_driver.phy_tx_done_cb)
{
/*Send CCA fail notification*/ /*Send CCA fail notification*/
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1); device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
} }
@ -903,8 +882,7 @@ static int8_t rf_tx_power_set(uint8_t power)
/* gcapraru: Map MCR20A Tx power levels over ATMEL values */ /* gcapraru: Map MCR20A Tx power levels over ATMEL values */
static uint8_t pwrLevelMapping[16] = {25, 25, 25, 24, 24, 24, 23, 23, 22, 22, 21, 20, 19, 18, 17, 14}; static uint8_t pwrLevelMapping[16] = {25, 25, 25, 24, 24, 24, 23, 23, 22, 22, 21, 20, 19, 18, 17, 14};
if( power > 15 ) if (power > 15) {
{
return -1; return -1;
} }
@ -958,8 +936,7 @@ static int8_t rf_enable_antenna_diversity(void)
static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel) static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
{ {
int8_t ret_val = 0; int8_t ret_val = 0;
switch (new_state) switch (new_state) {
{
/*Reset PHY driver and set to idle*/ /*Reset PHY driver and set to idle*/
case PHY_INTERFACE_RESET: case PHY_INTERFACE_RESET:
break; break;
@ -996,19 +973,14 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
*/ */
static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr) static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
{ {
switch (extension_type) switch (extension_type) {
{
/*Control MAC pending bit for Indirect data transmission*/ /*Control MAC pending bit for Indirect data transmission*/
case PHY_EXTENSION_CTRL_PENDING_BIT: case PHY_EXTENSION_CTRL_PENDING_BIT: {
{
uint8_t reg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL); uint8_t reg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
if(*data_ptr) if (*data_ptr) {
{
reg |= cSRC_CTRL_ACK_FRM_PND; reg |= cSRC_CTRL_ACK_FRM_PND;
} } else {
else
{
reg &= ~cSRC_CTRL_ACK_FRM_PND; reg &= ~cSRC_CTRL_ACK_FRM_PND;
} }
@ -1055,8 +1027,7 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr) static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
{ {
int8_t ret_val = 0; int8_t ret_val = 0;
switch (address_type) switch (address_type) {
{
/*Set 48-bit address*/ /*Set 48-bit address*/
case PHY_MAC_48BIT: case PHY_MAC_48BIT:
break; break;
@ -1121,10 +1092,8 @@ static void handle_interrupt(void)
/* Flter Fail IRQ */ /* Flter Fail IRQ */
if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_FILTERFAIL_IRQ) && if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_FILTERFAIL_IRQ) &&
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_FILTERFAIL_MSK) ) !(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_FILTERFAIL_MSK)) {
{ if (xcvseqCopy == gRX_c) {
if( xcvseqCopy == gRX_c )
{
/* Abort current SEQ */ /* Abort current SEQ */
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ); mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]);
@ -1140,13 +1109,11 @@ static void handle_interrupt(void)
/* TMR3 IRQ: ACK wait time-out */ /* TMR3 IRQ: ACK wait time-out */
if ((mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3IRQ) && if ((mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3IRQ) &&
!(mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3MSK) ) !(mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3MSK)) {
{
/* Disable TMR3 IRQ */ /* Disable TMR3 IRQ */
mStatusAndControlRegs[IRQSTS3] |= cIRQSTS3_TMR3MSK; mStatusAndControlRegs[IRQSTS3] |= cIRQSTS3_TMR3MSK;
if( xcvseqCopy == gTR_c ) if (xcvseqCopy == gTR_c) {
{
/* Set XCVR to Idle */ /* Set XCVR to Idle */
mPhySeqState = gIdle_c; mPhySeqState = gIdle_c;
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ); mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
@ -1162,8 +1129,7 @@ static void handle_interrupt(void)
/* Sequencer interrupt, the autosequence has completed */ /* Sequencer interrupt, the autosequence has completed */
if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_SEQIRQ) && if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_SEQIRQ) &&
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_SEQMSK) ) !(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_SEQMSK)) {
{
/* Set XCVR to Idle */ /* Set XCVR to Idle */
mPhySeqState = gIdle_c; mPhySeqState = gIdle_c;
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ); mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
@ -1173,17 +1139,14 @@ static void handle_interrupt(void)
MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5); MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
/* PLL unlock, the autosequence has been aborted due to PLL unlock */ /* PLL unlock, the autosequence has been aborted due to PLL unlock */
if( mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_PLL_UNLOCK_IRQ ) if (mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_PLL_UNLOCK_IRQ) {
{ if (xcvseqCopy == gRX_c) {
if(xcvseqCopy == gRX_c)
{
rf_receive(); rf_receive();
} }
return; return;
} }
switch(xcvseqCopy) switch (xcvseqCopy) {
{
case gTX_c: case gTX_c:
case gTR_c: case gTR_c:
rf_handle_tx_end(); rf_handle_tx_end();
@ -1227,8 +1190,7 @@ static void rf_abort(void)
mStatusAndControlRegs[PHY_CTRL2] |= cPHY_CTRL2_SEQMSK; mStatusAndControlRegs[PHY_CTRL2] |= cPHY_CTRL2_SEQMSK;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, mStatusAndControlRegs[PHY_CTRL2]); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, mStatusAndControlRegs[PHY_CTRL2]);
if( (mStatusAndControlRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c ) if ((mStatusAndControlRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c) {
{
/* Abort current SEQ */ /* Abort current SEQ */
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ); mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]);
@ -1258,8 +1220,7 @@ static void rf_abort(void)
*/ */
static void rf_get_timestamp(uint32_t *pRetClk) static void rf_get_timestamp(uint32_t *pRetClk)
{ {
if(NULL == pRetClk) if (NULL == pRetClk) {
{
return; return;
} }
@ -1282,8 +1243,7 @@ static void rf_set_timeout(uint32_t *pEndTime)
{ {
uint8_t phyReg; uint8_t phyReg;
if(NULL == pEndTime) if (NULL == pEndTime) {
{
return; return;
} }
@ -1318,8 +1278,7 @@ static uint8_t rf_if_read_rnd(void)
/* Check if XCVR is idle */ /* Check if XCVR is idle */
phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1); phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
if( (phyReg & cPHY_CTRL1_XCVSEQ) == gIdle_c ) if ((phyReg & cPHY_CTRL1_XCVSEQ) == gIdle_c) {
{
/* Program a new sequence */ /* Program a new sequence */
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyReg | gCCA_c); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyReg | gCCA_c);
/* Wait for sequence to finish */ /* Wait for sequence to finish */
@ -1358,16 +1317,11 @@ static uint8_t rf_convert_LQI(uint8_t hwLqi)
uint32_t tmpLQI; uint32_t tmpLQI;
/* LQI Saturation Level */ /* LQI Saturation Level */
if (hwLqi >= 230) if (hwLqi >= 230) {
{
return 0xFF; return 0xFF;
} } else if (hwLqi <= 9) {
else if (hwLqi <= 9)
{
return 0; return 0;
} } else {
else
{
/* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */ /* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
/* The LQI value mst be multiplied by ~1.1087 */ /* The LQI value mst be multiplied by ~1.1087 */
/* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/ /* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
@ -1393,16 +1347,13 @@ static void rf_promiscuous(uint8_t state)
rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER); rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4); phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
if( state ) if (state) {
{
/* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */ /* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
/* All frame types accepted*/ /* All frame types accepted*/
phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS; phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER); rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT); rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
} } else {
else
{
phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS; phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
/* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */ /* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
/* Beacon, Data and MAC command frame types accepted */ /* Beacon, Data and MAC command frame types accepted */
@ -1427,8 +1378,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
uint8_t pwrMode; uint8_t pwrMode;
uint8_t xtalState; uint8_t xtalState;
if( mPwrState == newState ) if (mPwrState == newState) {
{
return; return;
} }
@ -1436,8 +1386,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
pwrMode = MCR20Drv_DirectAccessSPIRead(PWR_MODES); pwrMode = MCR20Drv_DirectAccessSPIRead(PWR_MODES);
xtalState = pwrMode & cPWR_MODES_XTALEN; xtalState = pwrMode & cPWR_MODES_XTALEN;
switch( newState ) switch (newState) {
{
case gXcvrPwrIdle_c: case gXcvrPwrIdle_c:
pwrMode &= ~(cPWR_MODES_AUTODOZE); pwrMode &= ~(cPWR_MODES_AUTODOZE);
pwrMode |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE); pwrMode |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
@ -1459,8 +1408,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
mPwrState = newState; mPwrState = newState;
MCR20Drv_DirectAccessSPIWrite(PWR_MODES, pwrMode); MCR20Drv_DirectAccessSPIWrite(PWR_MODES, pwrMode);
if( !xtalState && (pwrMode & cPWR_MODES_XTALEN)) if (!xtalState && (pwrMode & cPWR_MODES_XTALEN)) {
{
/* wait for crystal oscillator to complet its warmup */ /* wait for crystal oscillator to complet its warmup */
while ((MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY) != cPWR_MODES_XTAL_READY); while ((MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY) != cPWR_MODES_XTAL_READY);
/* wait for radio wakeup from hibernate interrupt */ /* wait for radio wakeup from hibernate interrupt */
@ -1481,8 +1429,7 @@ static uint8_t rf_get_channel_energy(void)
MCR20Drv_IRQ_Disable(); MCR20Drv_IRQ_Disable();
/* RX can start only from Idle state */ /* RX can start only from Idle state */
if( mPhySeqState != gIdle_c ) if (mPhySeqState != gIdle_c) {
{
MCR20Drv_IRQ_Enable(); MCR20Drv_IRQ_Enable();
return 0; return 0;
} }
@ -1492,8 +1439,7 @@ static uint8_t rf_get_channel_energy(void)
/* Switch to ED mode */ /* Switch to ED mode */
ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE; ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE;
if( ccaMode != gCcaED_c ) if (ccaMode != gCcaED_c) {
{
mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c); mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
mStatusAndControlRegs[PHY_CTRL4] |= gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c; mStatusAndControlRegs[PHY_CTRL4] |= gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]); MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]);
@ -1524,18 +1470,13 @@ static uint8_t rf_get_channel_energy(void)
*/ */
static uint8_t rf_convert_energy_level(uint8_t energyLevel) static uint8_t rf_convert_energy_level(uint8_t energyLevel)
{ {
if(energyLevel >= 90) if (energyLevel >= 90) {
{
/* ED value is below minimum. Return 0x00. */ /* ED value is below minimum. Return 0x00. */
energyLevel = 0x00; energyLevel = 0x00;
} } else if (energyLevel <= 26) {
else if(energyLevel <= 26)
{
/* ED value is above maximum. Return 0xFF. */ /* ED value is above maximum. Return 0xFF. */
energyLevel = 0xFF; energyLevel = 0xFF;
} } else {
else
{
/* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */ /* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
energyLevel = (90 - energyLevel); energyLevel = (90 - energyLevel);
/* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */ /* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
@ -1555,43 +1496,53 @@ static uint8_t rf_scale_lqi(int8_t rssi)
const int8_t rf_sensitivity = -98; const int8_t rf_sensitivity = -98;
/*rssi < RF sensitivity*/ /*rssi < RF sensitivity*/
if(rssi < rf_sensitivity) if (rssi < rf_sensitivity) {
scaled_lqi = 0; scaled_lqi = 0;
}
/*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/ /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
/*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/ /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 10)) else if (rssi < (rf_sensitivity + 10)) {
scaled_lqi = 31; scaled_lqi = 31;
}
/*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/ /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
/*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/ /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 20)) else if (rssi < (rf_sensitivity + 20)) {
scaled_lqi = 207; scaled_lqi = 207;
}
/*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/ /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
/*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/ /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 30)) else if (rssi < (rf_sensitivity + 30)) {
scaled_lqi = 255; scaled_lqi = 255;
}
/*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/ /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
/*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/ /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 40)) else if (rssi < (rf_sensitivity + 40)) {
scaled_lqi = 255; scaled_lqi = 255;
}
/*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/ /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
/*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/ /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 50)) else if (rssi < (rf_sensitivity + 50)) {
scaled_lqi = 255; scaled_lqi = 255;
}
/*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/ /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
/*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/ /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 60)) else if (rssi < (rf_sensitivity + 60)) {
scaled_lqi = 255; scaled_lqi = 255;
}
/*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/ /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
/*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/ /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 70)) else if (rssi < (rf_sensitivity + 70)) {
scaled_lqi = 255; scaled_lqi = 255;
}
/*rssi > RF saturation*/ /*rssi > RF saturation*/
else if(rssi > (rf_sensitivity + 80)) else if (rssi > (rf_sensitivity + 80)) {
scaled_lqi = 111; scaled_lqi = 111;
}
/*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/ /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
/*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/ /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
else else {
scaled_lqi = 255; scaled_lqi = 255;
}
return scaled_lqi; return scaled_lqi;
} }
@ -1605,28 +1556,33 @@ extern "C" void xcvr_spi_init(uint32_t instance)
(void)instance; (void)instance;
} }
extern "C" void RF_IRQ_Init(void) { extern "C" void RF_IRQ_Init(void)
{
MBED_ASSERT(irq != NULL); MBED_ASSERT(irq != NULL);
irq->mode(PullUp); irq->mode(PullUp);
irq->fall(&PHY_InterruptHandler); irq->fall(&PHY_InterruptHandler);
} }
extern "C" void RF_IRQ_Enable(void) { extern "C" void RF_IRQ_Enable(void)
{
MBED_ASSERT(irq != NULL); MBED_ASSERT(irq != NULL);
irq->enable_irq(); irq->enable_irq();
} }
extern "C" void RF_IRQ_Disable(void) { extern "C" void RF_IRQ_Disable(void)
{
MBED_ASSERT(irq != NULL); MBED_ASSERT(irq != NULL);
irq->disable_irq(); irq->disable_irq();
} }
extern "C" uint8_t RF_isIRQ_Pending(void) { extern "C" uint8_t RF_isIRQ_Pending(void)
{
MBED_ASSERT(rf != NULL); MBED_ASSERT(rf != NULL);
return !irq_pin->read(); return !irq_pin->read();
} }
extern "C" void RF_RST_Set(int state) { extern "C" void RF_RST_Set(int state)
{
MBED_ASSERT(rst != NULL); MBED_ASSERT(rst != NULL);
*rst = state; *rst = state;
} }
@ -1659,28 +1615,25 @@ extern "C" void xcvr_spi_transfer(uint32_t instance,
(void)instance; (void)instance;
volatile uint8_t dummy; volatile uint8_t dummy;
if( !transferByteCount ) if (!transferByteCount) {
return; return;
}
if( !sendBuffer && !receiveBuffer ) if (!sendBuffer && !receiveBuffer) {
return; return;
}
while( transferByteCount-- ) while (transferByteCount--) {
{ if (sendBuffer) {
if( sendBuffer )
{
dummy = *sendBuffer; dummy = *sendBuffer;
sendBuffer++; sendBuffer++;
} } else {
else
{
dummy = 0xFF; dummy = 0xFF;
} }
dummy = spi->write(dummy); dummy = spi->write(dummy);
if( receiveBuffer ) if (receiveBuffer) {
{
*receiveBuffer = dummy; *receiveBuffer = dummy;
receiveBuffer++; receiveBuffer++;
} }