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Add Crash report section to all uARM files

pull/9766/head
Deepika 2019-02-28 11:06:14 -06:00
parent 6ab48b1863
commit 122549910e
10 changed files with 99 additions and 35 deletions
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13
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct
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@ -54,7 +54,13 @@
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
#define VECTOR_SIZE 0x198
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +70,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

16
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct
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@ -37,13 +37,13 @@
#define MBED_APP_SIZE 0x200000
#endif
;256 KB SRAM (0x40000)
;256 KB SRAM (0x30000 + 0x10000)
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x20000 ; (?)
#define MBED_RAM_SIZE 0x30000
#endif
@ -54,7 +54,11 @@
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
#define VECTOR_SIZE 0x1B0
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +68,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}
@ -74,4 +81,3 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
}
}

11
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct
View File

@ -58,7 +58,11 @@
; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS
#define VECTOR_SIZE 0x1B0
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -68,7 +72,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct
View File

@ -43,7 +43,7 @@
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x50000
#define MBED_RAM_SIZE 0x00050000
#endif
@ -53,8 +53,11 @@
; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM
#define VECTOR_SIZE 0x1C8
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +67,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/stm32f756xg.sct
View File

@ -32,7 +32,7 @@
#define MBED_APP_START 0x08000000
#endif
; STM32F746xG: 1024 KB FLASH (0x100000)
; STM32F756xG: 1024 KB FLASH (0x100000)
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000
#endif
@ -53,8 +53,11 @@
; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM
#define VECTOR_SIZE 0x1C8
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +67,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

10
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct
View File

@ -53,8 +53,11 @@
; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM
#define VECTOR_SIZE 0x1F8
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +67,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/stm32h743xI.sct
View File

@ -32,7 +32,7 @@
#define MBED_APP_START 0x08000000
#endif
; STM32F767ZI: 2048KB FLASH (0x200000)
; STM32F743xl: 2048KB FLASH (0x200000)
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif
@ -53,8 +53,11 @@
; 166 vectors = 664 bytes (0x298) to be reserved in RAM
#define VECTOR_SIZE 0x298
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -64,7 +67,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct
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@ -58,8 +58,11 @@
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
#define VECTOR_SIZE 0x188
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -69,11 +72,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE) {
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) {
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct
View File

@ -58,8 +58,11 @@
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
#define VECTOR_SIZE 0x188
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -69,11 +72,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE) {
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) {
.ANY (+RW +ZI)
}

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct
View File

@ -58,8 +58,11 @@
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
#define VECTOR_SIZE 0x188
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -69,11 +72,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE) {
RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) {
.ANY (+RW +ZI)
}