diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c index bfeeedaf11..6573bb4eae 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c @@ -426,12 +426,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c index 78b5f25f03..2c74374620 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c @@ -430,12 +430,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c index bbf882f64b..cc58f0d273 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/system_stm32f0xx.c @@ -430,13 +430,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c index cca9238c93..b7eaa174b4 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/system_stm32f0xx.c @@ -429,14 +429,20 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; - // Select PLLCLK = 48 MHz ((HSI 8 MHz) * 6) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c index 93bc0c5718..504ce86571 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/system_stm32f0xx.c @@ -434,12 +434,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c index fc7ee5c40e..394b63e2bb 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/system_stm32f0xx.c @@ -433,12 +433,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c index df1b7c453d..8c35898e04 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/system_stm32f0xx.c @@ -433,12 +433,19 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitTypeDef RCC_OscInitStruct; // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12) - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 - RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14State = RCC_HSI_OFF; + RCC_OscInitStruct.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI48State = RCC_HSI_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL }