mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #14909 from DDC-NDRS/ndrs-pst
SPIF: fixed _address_size to always initialize as 3_BYTES in ::init()pull/14941/head
commit
11439bf264
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@ -66,14 +66,14 @@ enum spif_default_instructions {
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SPIF_PP = 0x02, // Page Program data
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SPIF_READ = 0x03, // Read data
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SPIF_SE = 0x20, // 4KB Sector Erase
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SPIF_SFDP = 0x5a, // Read SFDP
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SPIF_SFDP = 0x5A, // Read SFDP
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SPIF_WRSR = 0x01, // Write Status/Configuration Register
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SPIF_WRDI = 0x04, // Write Disable
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SPIF_RDSR = 0x05, // Read Status Register
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SPIF_WREN = 0x06, // Write Enable
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SPIF_RSTEN = 0x66, // Reset Enable
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SPIF_RST = 0x99, // Reset
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SPIF_RDID = 0x9f, // Read Manufacturer and JDEC Device ID
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SPIF_RDID = 0x9F, // Read Manufacturer and JDEC Device ID
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SPIF_ULBPR = 0x98, // Clears all write-protection bits in the Block-Protection register,
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SPIF_4BEN = 0xB7, // Enable 4-byte address mode
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SPIF_4BDIS = 0xE9, // Disable 4-byte address mode
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@ -91,7 +91,6 @@ SPIFBlockDevice::SPIFBlockDevice(PinName mosi, PinName miso, PinName sclk, PinNa
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_spi(mosi, miso, sclk, csel, use_gpio_ssel), _prog_instruction(0), _erase_instruction(0),
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_page_size_bytes(0), _init_ref_count(0), _is_initialized(false)
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{
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_address_size = SPIF_ADDR_SIZE_3_BYTES;
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// Initial SFDP read tables are read with 8 dummy cycles
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// Default Bus Setup 1_1_1 with 0 dummy and mode cycles
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_read_dummy_and_mode_cycles = 8;
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@ -128,6 +127,8 @@ int SPIFBlockDevice::init()
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goto exit_point;
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}
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_address_size = SPIF_ADDR_SIZE_3_BYTES; // Set to 3-bytes since SFDP always use only A23 ~ A0
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// Soft Reset
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if (-1 == _reset_flash_mem()) {
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tr_error("init - Unable to initialize flash memory, tests failed");
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@ -143,7 +144,7 @@ int SPIFBlockDevice::init()
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goto exit_point;
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}
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//Synchronize Device
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// Synchronize Device
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if (false == _is_mem_ready()) {
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tr_error("init - _is_mem_ready Failed");
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status = SPIF_BD_ERROR_READY_FAILED;
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@ -650,7 +651,7 @@ int SPIFBlockDevice::_reset_flash_mem()
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int status = 0;
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char status_value[2] = {0};
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tr_info("_reset_flash_mem:");
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//Read the Status Register from device
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// Read the Status Register from device
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if (SPIF_BD_ERROR_OK == _spi_send_general_command(SPIF_RDSR, SPI_NO_ADDRESS_COMMAND, NULL, 0, status_value, 1)) {
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// store received values in status_value
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tr_debug("Reading Status Register Success: value = 0x%x", (int)status_value[0]);
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@ -660,7 +661,7 @@ int SPIFBlockDevice::_reset_flash_mem()
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}
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if (0 == status) {
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//Send Reset Enable
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// Send Reset Enable
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if (SPIF_BD_ERROR_OK == _spi_send_general_command(SPIF_RSTEN, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0)) {
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// store received values in status_value
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tr_debug("Sending RSTEN Success");
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@ -670,7 +671,7 @@ int SPIFBlockDevice::_reset_flash_mem()
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}
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if (0 == status) {
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//Send Reset
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// Send Reset
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if (SPIF_BD_ERROR_OK == _spi_send_general_command(SPIF_RST, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0)) {
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// store received values in status_value
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tr_debug("Sending RST Success");
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@ -698,7 +699,7 @@ bool SPIFBlockDevice::_is_mem_ready()
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do {
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rtos::ThisThread::sleep_for(1ms);
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retries++;
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//Read the Status Register from device
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// Read the Status Register from device
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if (SPIF_BD_ERROR_OK != _spi_send_general_command(SPIF_RDSR, SPI_NO_ADDRESS_COMMAND, NULL, 0, status_value,
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1)) { // store received values in status_value
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tr_error("Reading Status Register failed");
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@ -750,7 +751,7 @@ int SPIFBlockDevice::_handle_vendor_quirks()
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uint8_t vendor_device_ids[4];
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size_t data_length = 3;
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/* Read Manufacturer ID (1byte), and Device ID (2bytes)*/
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// Read Manufacturer ID (1byte), and Device ID (2bytes)
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spif_bd_error spi_status = _spi_send_general_command(SPIF_RDID, SPI_NO_ADDRESS_COMMAND, NULL, 0,
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(char *)vendor_device_ids,
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data_length);
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@ -763,7 +764,7 @@ int SPIFBlockDevice::_handle_vendor_quirks()
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tr_debug("Vendor device ID = 0x%x 0x%x 0x%x", vendor_device_ids[0], vendor_device_ids[1], vendor_device_ids[2]);
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switch (vendor_device_ids[0]) {
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case 0xbf:
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case 0xBF:
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// SST devices come preset with block protection
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// enabled for some regions, issue global protection unlock to clear
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_set_write_enable();
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