From 7979f4d2558f2d063c1cd72ed12caf997c10939b Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Thu, 25 Jan 2018 14:15:56 +0100 Subject: [PATCH] SMT32L4 : add missing ST HAL LPUART functions To enable/disable UART Clock in Stop Mode --- .../TARGET_STM32L432xC/device/stm32l432xx.h | 5 ++ .../TARGET_STM32L433xC/device/stm32l433xx.h | 5 ++ .../TARGET_STM32L475xG/device/stm32l475xx.h | 5 ++ .../TARGET_STM32L476xG/device/stm32l476xx.h | 5 ++ .../TARGET_STM32L486xG/device/stm32l486xx.h | 5 ++ .../TARGET_STM32L496xG/device/stm32l496xx.h | 5 ++ .../device/stm32l4xx_hal_uart_ex.c | 53 +++++++++++++++++++ .../device/stm32l4xx_hal_uart_ex.h | 8 ++- 8 files changed, 90 insertions(+), 1 deletion(-) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l432xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l432xx.h index 2ed3383594..147f6a015a 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l432xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/stm32l432xx.h @@ -13331,6 +13331,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ #define USART_CR3_TCBGTIE_Pos (24U) #define USART_CR3_TCBGTIE_Msk (0x1U << USART_CR3_TCBGTIE_Pos) /*!< 0x01000000 */ #define USART_CR3_TCBGTIE USART_CR3_TCBGTIE_Msk /*!< Transmission Complete Before Guard Time Interrupt Enable */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h index a26a4b0e50..0340da1510 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h @@ -14391,6 +14391,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ #define USART_CR3_TCBGTIE_Pos (24U) #define USART_CR3_TCBGTIE_Msk (0x1U << USART_CR3_TCBGTIE_Pos) /*!< 0x01000000 */ #define USART_CR3_TCBGTIE USART_CR3_TCBGTIE_Msk /*!< Transmission Complete Before Guard Time Interrupt Enable */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/stm32l475xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/stm32l475xx.h index 8b3f1dee44..bdb2d527de 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/stm32l475xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/stm32l475xx.h @@ -15905,6 +15905,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ /****************** Bit definition for USART_BRR register *******************/ #define USART_BRR_DIV_FRACTION_Pos (0U) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/stm32l476xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/stm32l476xx.h index b5b7968c89..e862cba86d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/stm32l476xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/stm32l476xx.h @@ -16056,6 +16056,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ /****************** Bit definition for USART_BRR register *******************/ #define USART_BRR_DIV_FRACTION_Pos (0U) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l486xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l486xx.h index c4011208aa..5706fdd28c 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l486xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l486xx.h @@ -16281,6 +16281,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ /****************** Bit definition for USART_BRR register *******************/ #define USART_BRR_DIV_FRACTION_Pos (0U) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h index 4b717f963e..53617100dd 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h @@ -17276,6 +17276,11 @@ typedef struct #define USART_CR3_WUFIE_Pos (22U) #define USART_CR3_WUFIE_Msk (0x1U << USART_CR3_WUFIE_Pos) /*!< 0x00400000 */ #define USART_CR3_WUFIE USART_CR3_WUFIE_Msk /*!< Wake Up Interrupt Enable */ +/* MBED */ +#define USART_CR3_UCESM_Pos (23U) +#define USART_CR3_UCESM_Msk (0x1U << USART_CR3_UCESM_Pos) /*!< 0x00800000 */ +#define USART_CR3_UCESM USART_CR3_UCESM_Msk /*!< Clock Enable in Stop mode */ +/* MBED */ #define USART_CR3_TCBGTIE_Pos (24U) #define USART_CR3_TCBGTIE_Msk (0x1U << USART_CR3_TCBGTIE_Pos) /*!< 0x01000000 */ #define USART_CR3_TCBGTIE USART_CR3_TCBGTIE_Msk /*!< Transmission Complete Before Guard Time Interrupt Enable */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.c index 363a37943e..84f5600933 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.c +++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.c @@ -472,6 +472,32 @@ HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) return HAL_OK; } +/* MBED */ +/** + * @brief Enable UART Clock in Stop Mode + * The UART keeps the Clock ON during Stop mode + * @param huart: uart handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart) +{ + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Set the USART UESM bit */ + huart->Instance->CR3 |= USART_CR3_UCESM; + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} +/* MBED */ + /** * @brief Disable UART Stop Mode. * @param huart UART handle. @@ -495,6 +521,33 @@ HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) return HAL_OK; } + +/* MBED */ +/** + * @brief Disable UART Clock in Stop Mode + * @param huart: uart handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart) +{ + /* Process Locked */ + __HAL_LOCK(huart); + + huart->gState = HAL_UART_STATE_BUSY; + + /* Clear USART UESM bit */ + huart->Instance->CR3 &= ~(USART_CR3_UCESM); + + huart->gState = HAL_UART_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + + return HAL_OK; +} +/* MBED */ + + #if defined(USART_CR2_SLVEN) /** * @brief Enable the SPI slave mode. diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.h b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.h index 926662f36b..3b4c4b01ad 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.h +++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_uart_ex.h @@ -174,7 +174,7 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); #endif - + /** * @} */ @@ -186,7 +186,13 @@ void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); /* Peripheral Control functions **********************************************/ HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); +/* MBED */ +HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); +/* MBED */ HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); +/* MBED */ +HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); +/* MBED */ HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); #if defined(USART_CR2_SLVEN)