ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #10532 from ARMmbed/release-candidate 

Release candidate for mbed-os-5.12.3
mbed-os-5.12 mbed-os-5.12.3
Anna Bridge 2019-05-07 14:29:07 +01:00 committed by GitHub
parent cfa7938a4d b520ed424d
commit 0f959dbe47
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
215 changed files with 119229 additions and 121056 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
.gitignore vendored
View File

@ -97,3 +97,6 @@ test_suite.json
# default delivery dir
DELIVERY/
# Directory hosting PSA autogenerated source files
PSA_AUTOGEN/

2
LICENSE.md
View File

@ -51,3 +51,5 @@ The Python modules used by Mbed tools are used under the following licenses:
- [pyusb](https://pypi.org/project/pyusb/) - Apache-2.0
- [cmsis-pack-manager](https://pypi.org/project/cmsis-pack-manager) - Apache-2.0
- [hidapi](https://pypi.org/project/hidapi/) - BSD-style
- [pywin32](https://pypi.org/project/pywin32/) - PSF
- [wmi](https://pypi.org/project/WMI/) - MIT

16
README.md
View File

@ -1,8 +1,8 @@
[![Mbed OS][mbed-os-logo]][mbed-os-link]
[![Build status release][mbed-travis-release-svg]][mbed-travis-release]
[![Build status master][mbed-travis-master-svg]][mbed-travis-master]
[![Tools coverage status][mbed-coveralls-tools-svg]][mbed-coveralls-tools]
[![Build status release][mbed-travis-release-svg]][mbed-travis-release]
[![Build status master][mbed-travis-master-svg]][mbed-travis-master]
[![Tools coverage status][mbed-coveralls-tools-svg]][mbed-coveralls-tools]
[mbed-os-logo]: logo.png
[mbed-os-link]: https://www.mbed.com/en/platform/mbed-os/
@ -19,25 +19,25 @@ Mbed OS provides a platform that includes:
- Security foundations.
- Cloud management services.
- Drivers for sensors, I/O devices and connectivity.
- Drivers for sensors, I/O devices and connectivity.
## Release notes
The [release notes](https://os.mbed.com/releases) detail the current release. You can also find information about previous versions.
## License and contributions
## License and contributions
The software is provided under the [Apache-2.0 license](LICENSE-apache-2.0.txt). Contributions to this project are accepted under the same license. Please see [contributing.md](CONTRIBUTING.md) for more information.
This project contains code from other projects. The original license text is included in those source files. They must comply with our [license guide](https://os.mbed.com/docs/mbed-os/latest/contributing/license.html).
Folders containing files under different permissive license than Apache 2.0 are listed in the [LICENSE](LICENSE) file.
Folders containing files under different permissive license than Apache 2.0 are listed in the [LICENSE](LICENSE.md) file.
## Getting started for developers
We have a [developer website](https://os.mbed.com) for asking questions, engaging with others, finding information on boards and components, using an online IDE and compiler, reading the documentation and learning about what's new and what's coming next in Mbed OS.
## Getting started for contributors
We also have a [contributing and publishing guide](https://os.mbed.com/contributing/) that covers licensing, contributor agreements and style guidelines.
## Documentation

191
TESTS/mbed_hal/qspi/flash_configs/S25FL512S_config.h Executable file
View File

@ -0,0 +1,191 @@
/* mbed Microcontroller Library
* Copyright (c) 2018-2018 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_QSPI_FLASH_S25FL512S_H
#define MBED_QSPI_FLASH_S25FL512S_H
#define QSPI_FLASH_CHIP_STRING "Cypress S25FL512S"
#define QSPI_FLASH_CYPRESS_S25FL512S
// Command for reading configuration register
#define QSPI_CMD_RDCR0 0x35 // To read Quad (QE) enable bit
// Command for writing status/configuration register
#define QSPI_CMD_WRSR 0x01 // To write Qual (QE) enable bit
// Command for reading status register
#define QSPI_CMD_RDSR 0x05 // To read WIP bit of status register 1
// Command for reading security register
#define QSPI_CMD_RDSCUR 0x2B
// Command for setting Reset Enable
#define QSPI_CMD_RSTEN 0x66
// Command for setting Reset
#define QSPI_CMD_RST 0xF0 //0x99
// Command for setting write enable
#define QSPI_CMD_WREN 0x06
// Command for setting write disable
#define QSPI_CMD_WRDI 0x04
// WRSR operations max time [us] (datasheet max time + 15%)
#define QSPI_WRSR_MAX_TIME 2300000 // 2.3 seconds
// general wait max time [us]
#define QSPI_WAIT_MAX_TIME 100000 // 100ms
// Commands for writing (page programming)
#define QSPI_CMD_WRITE_1IO 0x02 // 1-1-1 mode
#define QSPI_CMD_WRITE_1I4O 0x32 // 1-1-4 mode // 1-4-4 is not supported by S25FL512S
// write operations max time [us] (datasheet max time + 15%)
#define QSPI_PAGE_PROG_MAX_TIME 1500 // 1.5ms
#define QSPI_PAGE_SIZE 512 // 512B
#define QSPI_SECTOR_SIZE 262144 // 256kB
#define QSPI_SECTOR_COUNT 256 // 64 MB
// Commands for reading
#define QSPI_CMD_READ_1IO_FAST 0x0B // 1-1-1 mode
#define QSPI_CMD_READ_1IO 0x03 // 1-1-1 mode
#define QSPI_CMD_READ_2IO 0xBB // 1-2-2 mode - dual I/O
#define QSPI_CMD_READ_1I2O 0x3B // 1-1-2 mode - dual output
#define QSPI_CMD_READ_4IO 0xEB // 1-4-4 mode - quad I/O
#define QSPI_CMD_READ_1I4O 0x6B // 1-1-4 mode - quad output
// Alt (mode) value for quad I/O read
#define QSPI_ALT_READ_4IO 0x01 // 1-4-4 mode only
#define QSPI_READ_1IO_DUMMY_CYCLE 0
#define QSPI_READ_FAST_DUMMY_CYCLE 8
#define QSPI_READ_2IO_DUMMY_CYCLE 4 // dual I/O
#define QSPI_READ_1I2O_DUMMY_CYCLE 8 // dual output
#define QSPI_READ_4IO_DUMMY_CYCLE 6 // quad I/O - 2 cycles for Mode or Alt (4 bits per cycle x 2 cycles = 1 byte) + 4 dummy cycles
#define QSPI_READ_1I4O_DUMMY_CYCLE 8 // quad output
// Commands for erasing
#define QSPI_CMD_ERASE_SECTOR 0xD8 // 256kB
#define QSPI_CMD_ERASE_CHIP 0x60 // or 0xC7
// erase operations max time [us] (datasheet max time + 15%)
#define QSPI_ERASE_SECTOR_MAX_TIME 2990000 // 1.15*2600 ~ 2900 ms
// max frequency for basic rw operation (for fast mode)
#define QSPI_COMMON_MAX_FREQUENCY 50000000
#define QSPI_STATUS_REG_SIZE 1
#define QSPI_CONFIG_REG_0_SIZE 1
#define QSPI_SECURITY_REG_SIZE 1
#define QSPI_MAX_REG_SIZE 2
// status register
#define STATUS_BIT_WIP (1 << 0) // write in progress bit
#define STATUS_BIT_WEL (1 << 1) // write enable latch
#define STATUS_BIT_BP0 (1 << 2) //
#define STATUS_BIT_BP1 (1 << 3) //
#define STATUS_BIT_BP2 (1 << 4) //
#define STATUS_BIT_BP3 (1 << 5) //
#define STATUS_BIT_QE (1 << 1) // Quad Enable
#define STATUS_BIT_SRWD (1 << 7) // status register write protect
// configuration register 0
// bit 0, 1, 2, 4, 5, 7 reserved
#define CONFIG0_BIT_TB (1 << 3) // Top/Bottom area protect
#define CONFIG0_BIT_DC (1 << 6) // Dummy Cycle
// configuration register 1
// bit 0, 2, 3, 4, 5, 6, 7 reserved
#define CONFIG1_BIT_LH (1 << 1) // 0 = Ultra Low power mode, 1 = High performance mode
#define QUAD_IO_ENABLE() \
\
const int32_t reg_size = QSPI_STATUS_REG_SIZE + QSPI_CONFIG_REG_0_SIZE; \
uint8_t reg_data[reg_size] = { 0 }; \
\
if (read_register(STATUS_REG, reg_data, \
QSPI_STATUS_REG_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
if (read_register(CONFIG_REG0, reg_data + QSPI_STATUS_REG_SIZE, \
QSPI_CONFIG_REG_0_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
if (write_enable(qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
reg_data[1] |= STATUS_BIT_QE; \
if (write_register(QSPI_CMD_WRSR, reg_data, \
reg_size, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
WAIT_FOR(WRSR_MAX_TIME, qspi); \
\
memset(reg_data, 0, QSPI_STATUS_REG_SIZE); \
if (read_register(CONFIG_REG0, reg_data, \
QSPI_STATUS_REG_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
return ((reg_data[0] & STATUS_BIT_QE) != 0 ? \
QSPI_STATUS_OK : QSPI_STATUS_ERROR)
#define QUAD_IO_DISABLE() \
\
const int32_t reg_size = QSPI_STATUS_REG_SIZE + QSPI_CONFIG_REG_0_SIZE; \
uint8_t reg_data[reg_size] = { 0 }; \
\
if (read_register(STATUS_REG, reg_data, \
QSPI_STATUS_REG_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
if (read_register(CONFIG_REG0, reg_data + QSPI_STATUS_REG_SIZE, \
QSPI_CONFIG_REG_0_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
if (write_enable(qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
reg_data[1] &= ~(STATUS_BIT_QE); \
\
if (write_register(QSPI_CMD_WRSR, reg_data, \
reg_size, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
WAIT_FOR(WRSR_MAX_TIME, qspi); \
\
reg_data[0] = 0; \
if (read_register(CONFIG_REG0, reg_data, \
QSPI_STATUS_REG_SIZE, qspi) != QSPI_STATUS_OK) { \
return QSPI_STATUS_ERROR; \
} \
\
return ((reg_data[0] & STATUS_BIT_QE) == 0 ? \
QSPI_STATUS_OK : QSPI_STATUS_ERROR)
#endif // MBED_QSPI_FLASH_S25FL512S_H

3
TESTS/mbed_hal/qspi/flash_configs/flash_configs.h
View File

@ -58,5 +58,8 @@
#elif defined(TARGET_LPC546XX)
#include "NXP/LPC546XX/flash_config.h"
#elif (defined(TARGET_CY8CPROTO_062_4343W) || defined(TARGET_CY8CKIT_062_WIFI_BT) || defined(TARGET_CY8CKIT_062_BLE))
#include "S25FL512S_config.h"
#endif
#endif // MBED_FLASH_CONFIGS_H

35
TESTS/mbed_hal/qspi/main.cpp
View File

@ -483,6 +483,41 @@ Case cases[] = {
#endif
#endif
#ifdef WRITE_1_1_4
Case("qspi write(1-1-4)/x1 read(1-1-1)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(1-1-1)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-1)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-1)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(1-1-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_1_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-2)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-2)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-2-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(1-2-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-2-2)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-2-2)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
#ifdef READ_2_2_2
Case("qspi write(1-1-4)/x1 read(2-2-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_2_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(2-2-2)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_2_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(2-2-2)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_2_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(2-2-2)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_2_2_2, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
#endif
Case("qspi write(1-1-4)/x1 read(1-1-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(1-1-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-4)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-1-4)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-4-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(1-4-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-4-4)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(1-4-4)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
#ifdef READ_4_4_4
Case("qspi write(1-1-4)/x1 read(4-4-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_4_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x4 read(4-4-4)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_4_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(4-4-4)/x4 repeat/x1 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_4_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_MULTIPLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-1-4)/x1 read(4-4-4)/x1 repeat/x4 test", qspi_write_read_test<WRITE_1_1_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_4_4_4, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_MULTIPLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
#endif
#endif
#ifdef WRITE_1_4_4
Case("qspi write(1-4-4)/x1 read(1-1-1)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_SINGLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_256, TEST_FLASH_ADDRESS>),
Case("qspi write(1-4-4)/x4 read(1-1-1)/x1 repeat/x1 test", qspi_write_read_test<WRITE_1_4_4, ADDR_SIZE_24, ALT_SIZE_8, WRITE_MULTIPLE, READ_1_1_1, ADDR_SIZE_24, ALT_SIZE_8, QSPI_COMMON_MAX_FREQUENCY, READ_SINGLE, TEST_REPEAT_SINGLE, DATA_SIZE_1024, TEST_FLASH_ADDRESS>),

33
TESTS/mbed_hal/qspi/qspi_test_utils.cpp
View File

@ -26,6 +26,8 @@
#include "flash_configs/flash_configs.h"
#include "mbed.h"
static qspi_status_t quad_io_enable(Qspi &qspi);
static qspi_status_t quad_io_disable(Qspi &qspi);
static qspi_status_t extended_enable(Qspi &qspi);
static qspi_status_t extended_disable(Qspi &qspi);
static qspi_status_t dual_enable(Qspi &qspi);
@ -201,7 +203,9 @@ qspi_status_t erase(uint32_t erase_cmd, uint32_t flash_addr, Qspi &qspi)
qspi_status_t mode_enable(Qspi &qspi, qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width)
{
if (is_extended_mode(inst_width, addr_width, data_width)) {
if (is_quad_io_mode(inst_width, addr_width, data_width)) {
return quad_io_enable(qspi);
} else if (is_extended_mode(inst_width, addr_width, data_width)) {
return extended_enable(qspi);
} else if (is_dual_mode(inst_width, addr_width, data_width)) {
return dual_enable(qspi);
@ -214,7 +218,9 @@ qspi_status_t mode_enable(Qspi &qspi, qspi_bus_width_t inst_width, qspi_bus_widt
qspi_status_t mode_disable(Qspi &qspi, qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width)
{
if (is_extended_mode(inst_width, addr_width, data_width)) {
if (is_quad_io_mode(inst_width, addr_width, data_width)) {
return quad_io_disable(qspi);
} else if (is_extended_mode(inst_width, addr_width, data_width)) {
return extended_disable(qspi);
} else if (is_dual_mode(inst_width, addr_width, data_width)) {
return dual_disable(qspi);
@ -225,6 +231,24 @@ qspi_status_t mode_disable(Qspi &qspi, qspi_bus_width_t inst_width, qspi_bus_wid
}
}
static qspi_status_t quad_io_enable(Qspi &qspi)
{
#ifdef QUAD_IO_ENABLE
QUAD_IO_ENABLE();
#else
return QSPI_STATUS_OK;
#endif
}
static qspi_status_t quad_io_disable(Qspi &qspi)
{
#ifdef QUAD_IO_DISABLE
QUAD_IO_DISABLE();
#else
return QSPI_STATUS_OK;
#endif
}
static qspi_status_t extended_enable(Qspi &qspi)
{
#ifdef EXTENDED_SPI_ENABLE
@ -298,6 +322,11 @@ qspi_status_t fast_mode_disable(Qspi &qspi)
#endif
}
bool is_quad_io_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width)
{
return (inst_width == QSPI_CFG_BUS_SINGLE) && ((addr_width == QSPI_CFG_BUS_QUAD) || (data_width == QSPI_CFG_BUS_QUAD));
}
bool is_extended_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width)
{
return (inst_width == QSPI_CFG_BUS_SINGLE) && ((addr_width != QSPI_CFG_BUS_SINGLE) || (data_width != QSPI_CFG_BUS_SINGLE));

4
TESTS/mbed_hal/qspi/qspi_test_utils.h
View File

@ -62,6 +62,9 @@ struct Qspi {
#ifdef QSPI_CMD_WRITE_2IO
#define WRITE_1_2_2 MODE_1_2_2, QSPI_CMD_WRITE_2IO
#endif
#ifdef QSPI_CMD_WRITE_1I4O // Quad page program - command: 0x32
#define WRITE_1_1_4 MODE_1_1_4, QSPI_CMD_WRITE_1I4O
#endif
#ifdef QSPI_CMD_WRITE_4IO
#define WRITE_1_4_4 MODE_1_4_4, QSPI_CMD_WRITE_4IO
#endif
@ -147,6 +150,7 @@ qspi_status_t fast_mode_disable(Qspi &qspi);
qspi_status_t erase(uint32_t erase_cmd, uint32_t flash_addr, Qspi &qspi);
bool is_quad_io_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width);
bool is_extended_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width);
bool is_dual_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width);
bool is_quad_mode(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width);

14
TESTS/netsocket/README.md
View File

@ -785,9 +785,9 @@ Verify working of different packet sizes.
**Expected result:**
All sendto() calls should return the packet size. All recvfrom() calls
should return the same sized packet that was send with same content.
Calculate packet loss rate, maximum tolerated packet loss rate is 30%
At least one sendto() call of every size should return the packet size.
Errors returned from recvfrom() calls are tolerated.
Calculate packet loss rate, maximum tolerated packet loss rate is 30%.
@ -819,11 +819,9 @@ mode
**Expected result:**
All sendto() calls should return the packet size. All recvfrom() calls
should return the same sized packet that was send with same content or
NSAPI_ERROR_WOULD_BLOCK.
Calculate packet loss rate, maximum tolerated packet loss rate is 30%
At least one sendto() call of every size should return the packet size.
Errors returned from recvfrom() calls are tolerated.
Calculate packet loss rate, maximum tolerated packet loss rate is 30%.

21
TESTS/netsocket/udp/udpsocket_echotest.cpp
View File

@ -74,28 +74,33 @@ void UDPSOCKET_ECHOTEST()
int pkt_s = pkt_sizes[s_idx];
fill_tx_buffer_ascii(tx_buffer, BUFF_SIZE);
int packets_sent_prev = packets_sent;
for (int retry_cnt = 0; retry_cnt <= 2; retry_cnt++) {
memset(rx_buffer, 0, BUFF_SIZE);
sent = sock.sendto(udp_addr, tx_buffer, pkt_s);
if (check_oversized_packets(sent, pkt_s)) {
TEST_IGNORE_MESSAGE("This device does not handle oversized packets");
} else if (sent > 0) {
} else if (sent == pkt_s) {
packets_sent++;
}
if (sent != pkt_s) {
} else {
printf("[Round#%02d - Sender] error, returned %d\n", s_idx, sent);
continue;
}
recvd = sock.recvfrom(NULL, rx_buffer, pkt_s);
if (recvd == pkt_s) {
break;
} else {
printf("[Round#%02d - Receiver] error, returned %d\n", s_idx, recvd);
}
}
if (memcmp(tx_buffer, rx_buffer, pkt_s) == 0) {
packets_recv++;
}
// Make sure that at least one packet of every size was sent.
TEST_ASSERT_TRUE(packets_sent > packets_sent_prev);
}
// Packet loss up to 30% tolerated
if (packets_sent > 0) {
double loss_ratio = 1 - ((double)packets_recv / (double)packets_sent);
@ -154,6 +159,7 @@ void UDPSOCKET_ECHOTEST_NONBLOCK()
for (int s_idx = 0; s_idx < sizeof(pkt_sizes) / sizeof(*pkt_sizes); ++s_idx) {
int pkt_s = pkt_sizes[s_idx];
int packets_sent_prev = packets_sent;
thread = new Thread(osPriorityNormal,
OS_STACK_SIZE,
@ -165,16 +171,15 @@ void UDPSOCKET_ECHOTEST_NONBLOCK()
fill_tx_buffer_ascii(tx_buffer, pkt_s);
sent = sock.sendto(udp_addr, tx_buffer, pkt_s);
if (sent > 0) {
if (sent == pkt_s) {
packets_sent++;
}
if (sent == NSAPI_ERROR_WOULD_BLOCK) {
} else if (sent == NSAPI_ERROR_WOULD_BLOCK) {
if (tc_exec_time.read() >= time_allotted ||
osSignalWait(SIGNAL_SIGIO_TX, SIGIO_TIMEOUT).status == osEventTimeout) {
continue;
}
--retry_cnt;
} else if (sent != pkt_s) {
} else {
printf("[Round#%02d - Sender] error, returned %d\n", s_idx, sent);
continue;
}
@ -183,6 +188,8 @@ void UDPSOCKET_ECHOTEST_NONBLOCK()
}
break;
}
// Make sure that at least one packet of every size was sent.
TEST_ASSERT_TRUE(packets_sent > packets_sent_prev);
thread->join();
delete thread;
if (memcmp(tx_buffer, rx_buffer, pkt_s) == 0) {

75
TESTS/psa/crypto_access_control/COMPONENT_SPE/psa_crypto_acl_test_partition.h
View File

@ -1,75 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CRYPTO_ACL_TEST_PARTITION_H
#define PSA_CRYPTO_ACL_TEST_PARTITION_H
#define CRYPTO_ACL_TEST_ID 128
#define CRYPTO_ACL_TEST_ROT_SRV_COUNT (9UL)
#define CRYPTO_ACL_TEST_EXT_ROT_SRV_COUNT (1UL)
/* CRYPTO_ACL_TEST event flags */
#define CRYPTO_ACL_TEST_RESERVED1_POS (1UL)
#define CRYPTO_ACL_TEST_RESERVED1_MSK (1UL << CRYPTO_ACL_TEST_RESERVED1_POS)
#define CRYPTO_ACL_TEST_RESERVED2_POS (2UL)
#define CRYPTO_ACL_TEST_RESERVED2_MSK (1UL << CRYPTO_ACL_TEST_RESERVED2_POS)
#define CRYPTO_ACL_TEST_WAIT_ANY_IRQ_MSK (0)
#define CRYPTO_CREATE_PERSISTENT_KEY_MSK_POS (4UL)
#define CRYPTO_CREATE_PERSISTENT_KEY_MSK (1UL << CRYPTO_CREATE_PERSISTENT_KEY_MSK_POS)
#define CRYPTO_GENERATE_KEY_MSK_POS (5UL)
#define CRYPTO_GENERATE_KEY_MSK (1UL << CRYPTO_GENERATE_KEY_MSK_POS)
#define CRYPTO_OPEN_PERSISTENT_KEY_MSK_POS (6UL)
#define CRYPTO_OPEN_PERSISTENT_KEY_MSK (1UL << CRYPTO_OPEN_PERSISTENT_KEY_MSK_POS)
#define CRYPTO_CLOSE_KEY_MSK_POS (7UL)
#define CRYPTO_CLOSE_KEY_MSK (1UL << CRYPTO_CLOSE_KEY_MSK_POS)
#define CRYPTO_SET_KEY_POLICY_MSK_POS (8UL)
#define CRYPTO_SET_KEY_POLICY_MSK (1UL << CRYPTO_SET_KEY_POLICY_MSK_POS)
#define CRYPTO_DESTROY_KEY_MSK_POS (9UL)
#define CRYPTO_DESTROY_KEY_MSK (1UL << CRYPTO_DESTROY_KEY_MSK_POS)
#define CRYPTO_GET_KEY_INFO_MSK_POS (10UL)
#define CRYPTO_GET_KEY_INFO_MSK (1UL << CRYPTO_GET_KEY_INFO_MSK_POS)
#define CRYPTO_GET_KEY_POLICY_MSK_POS (11UL)
#define CRYPTO_GET_KEY_POLICY_MSK (1UL << CRYPTO_GET_KEY_POLICY_MSK_POS)
#define CRYPTO_IMPORT_KEY_MSK_POS (12UL)
#define CRYPTO_IMPORT_KEY_MSK (1UL << CRYPTO_IMPORT_KEY_MSK_POS)
#define CRYPTO_ACL_TEST_WAIT_ANY_SID_MSK (\
CRYPTO_CREATE_PERSISTENT_KEY_MSK | \
CRYPTO_GENERATE_KEY_MSK | \
CRYPTO_OPEN_PERSISTENT_KEY_MSK | \
CRYPTO_CLOSE_KEY_MSK | \
CRYPTO_SET_KEY_POLICY_MSK | \
CRYPTO_DESTROY_KEY_MSK | \
CRYPTO_GET_KEY_INFO_MSK | \
CRYPTO_GET_KEY_POLICY_MSK | \
CRYPTO_IMPORT_KEY_MSK)
#endif // PSA_CRYPTO_ACL_TEST_PARTITION_H

2
TESTS/psa/crypto_access_control/COMPONENT_SPE/test_partition.c
View File

@ -16,7 +16,7 @@
*/
#include <stdlib.h>
#include "psa_crypto_acl_test_partition.h"
#include "mbed_spm_partitions.h"
#include "psa/client.h"
#include "psa/service.h"
#include "psa/crypto.h"

202
TESTS/psa/crypto_access_control/TARGET_MBED_SPM/COMPONENT_SPE/psa_crypto_acl_test_partition.c
View File

@ -1,202 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_crypto_acl_test_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t crypto_acl_test_thread_stack[512] = {0};
/* Threads control blocks */
osRtxThread_t crypto_acl_test_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t crypto_acl_test_thread_attr = {
.name = "crypto_acl_test",
.attr_bits = 0,
.cb_mem = &crypto_acl_test_thread_cb,
.cb_size = sizeof(crypto_acl_test_thread_cb),
.stack_mem = crypto_acl_test_thread_stack,
.stack_size = 512,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t crypto_acl_test_rot_services[CRYPTO_ACL_TEST_ROT_SRV_COUNT] = {
{
.sid = CRYPTO_CREATE_PERSISTENT_KEY,
.mask = CRYPTO_CREATE_PERSISTENT_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_GENERATE_KEY,
.mask = CRYPTO_GENERATE_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_OPEN_PERSISTENT_KEY,
.mask = CRYPTO_OPEN_PERSISTENT_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_CLOSE_KEY,
.mask = CRYPTO_CLOSE_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_SET_KEY_POLICY,
.mask = CRYPTO_SET_KEY_POLICY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_DESTROY_KEY,
.mask = CRYPTO_DESTROY_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_GET_KEY_INFO,
.mask = CRYPTO_GET_KEY_INFO_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_GET_KEY_POLICY,
.mask = CRYPTO_GET_KEY_POLICY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CRYPTO_IMPORT_KEY,
.mask = CRYPTO_IMPORT_KEY_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
/* External SIDs used by CRYPTO_ACL_TEST */
const uint32_t crypto_acl_test_external_sids[1] = {
PSA_KEY_MNG_ID,
};
static osRtxMutex_t crypto_acl_test_mutex = {0};
static const osMutexAttr_t crypto_acl_test_mutex_attr = {
.name = "crypto_acl_test_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &crypto_acl_test_mutex,
.cb_size = sizeof(crypto_acl_test_mutex),
};
extern void test_partition_main(void *ptr);
void crypto_acl_test_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&crypto_acl_test_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition crypto_acl_test!\n");
}
for (uint32_t i = 0; i < CRYPTO_ACL_TEST_ROT_SRV_COUNT; ++i) {
crypto_acl_test_rot_services[i].partition = partition;
}
partition->rot_services = crypto_acl_test_rot_services;
partition->thread_id = osThreadNew(test_partition_main, NULL, &crypto_acl_test_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition crypto_acl_test!\n");
}
}

123
TESTS/psa/crypto_access_control/TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c
View File

@ -1,123 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "spm_panic.h"
#include "spm_internal.h"
#include "handles_manager.h"
#include "cmsis.h"
#include "psa_attest_srv_partition.h"
#include "psa_crypto_srv_partition.h"
#include "psa_platform_partition.h"
#include "psa_its_partition.h"
#include "psa_crypto_acl_test_partition.h"
extern const uint32_t attest_srv_external_sids[7];
extern const uint32_t crypto_srv_external_sids[4];
extern const uint32_t platform_external_sids[1];
extern const uint32_t crypto_acl_test_external_sids[1];
spm_partition_t g_partitions[5] = {
{
.partition_id = ATTEST_SRV_ID,
.thread_id = 0,
.flags = ATTEST_SRV_WAIT_ANY_SID_MSK | ATTEST_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ATTEST_SRV_ROT_SRV_COUNT,
.extern_sids = attest_srv_external_sids,
.extern_sids_count = ATTEST_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_SRV_ID,
.thread_id = 0,
.flags = CRYPTO_SRV_WAIT_ANY_SID_MSK | CRYPTO_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_SRV_ROT_SRV_COUNT,
.extern_sids = crypto_srv_external_sids,
.extern_sids_count = CRYPTO_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = PLATFORM_ID,
.thread_id = 0,
.flags = PLATFORM_WAIT_ANY_SID_MSK | PLATFORM_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = PLATFORM_ROT_SRV_COUNT,
.extern_sids = platform_external_sids,
.extern_sids_count = PLATFORM_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = ITS_ID,
.thread_id = 0,
.flags = ITS_WAIT_ANY_SID_MSK | ITS_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ITS_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = ITS_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_ACL_TEST_ID,
.thread_id = 0,
.flags = CRYPTO_ACL_TEST_WAIT_ANY_SID_MSK | CRYPTO_ACL_TEST_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_ACL_TEST_ROT_SRV_COUNT,
.extern_sids = crypto_acl_test_external_sids,
.extern_sids_count = CRYPTO_ACL_TEST_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
};
/* Check all the defined memory regions for overlapping. */
/* A list of all the memory regions. */
const mem_region_t *mem_regions = NULL;
const uint32_t mem_region_count = 0;
// forward declaration of partition initializers
void attest_srv_init(spm_partition_t *partition);
void crypto_srv_init(spm_partition_t *partition);
void platform_init(spm_partition_t *partition);
void its_init(spm_partition_t *partition);
void crypto_acl_test_init(spm_partition_t *partition);
uint32_t init_partitions(spm_partition_t **partitions)
{
if (NULL == partitions) {
SPM_PANIC("partitions is NULL!\n");
}
attest_srv_init(&(g_partitions[0]));
crypto_srv_init(&(g_partitions[1]));
platform_init(&(g_partitions[2]));
its_init(&(g_partitions[3]));
crypto_acl_test_init(&(g_partitions[4]));
*partitions = g_partitions;
return 5;
}

39
TESTS/psa/crypto_access_control/psa_crypto_acl_test_ifs.h
View File

@ -1,39 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CRYPTO_ACL_TEST_PARTITION_ROT_SERVICES_H
#define PSA_CRYPTO_ACL_TEST_PARTITION_ROT_SERVICES_H
#define CRYPTO_CREATE_PERSISTENT_KEY 0x00000200
#define CRYPTO_GENERATE_KEY 0x00000201
#define CRYPTO_OPEN_PERSISTENT_KEY 0x00000202
#define CRYPTO_CLOSE_KEY 0x00000203
#define CRYPTO_SET_KEY_POLICY 0x00000204
#define CRYPTO_DESTROY_KEY 0x00000205
#define CRYPTO_GET_KEY_INFO 0x00000206
#define CRYPTO_GET_KEY_POLICY 0x00000207
#define CRYPTO_IMPORT_KEY 0x00000208
#endif // PSA_CRYPTO_ACL_TEST_PARTITION_ROT_SERVICES_H

2
TESTS/psa/spm_client/COMPONENT_SPE/client_tests_partition.c
View File

@ -17,7 +17,7 @@
#include <string.h>
#include "psa/client.h"
#include "psa/service.h"
#include "psa_client_tests_part1_partition.h"
#include "mbed_spm_partitions.h"
#define MSG_BUF_SIZE 128
uint8_t data[MSG_BUF_SIZE] = {0};

57
TESTS/psa/spm_client/COMPONENT_SPE/psa_client_tests_part1_partition.h
View File

@ -1,57 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CLIENT_TESTS_PART1_PARTITION_H
#define PSA_CLIENT_TESTS_PART1_PARTITION_H
#define CLIENT_TESTS_PART1_ID 1
#define CLIENT_TESTS_PART1_ROT_SRV_COUNT (3UL)
#define CLIENT_TESTS_PART1_EXT_ROT_SRV_COUNT (0UL)
/* CLIENT_TESTS_PART1 event flags */
#define CLIENT_TESTS_PART1_RESERVED1_POS (1UL)
#define CLIENT_TESTS_PART1_RESERVED1_MSK (1UL << CLIENT_TESTS_PART1_RESERVED1_POS)
#define CLIENT_TESTS_PART1_RESERVED2_POS (2UL)
#define CLIENT_TESTS_PART1_RESERVED2_MSK (1UL << CLIENT_TESTS_PART1_RESERVED2_POS)
#define CLIENT_TESTS_PART1_WAIT_ANY_IRQ_MSK (0)
#define PART1_ROT_SRV1_MSK_POS (4UL)
#define PART1_ROT_SRV1_MSK (1UL << PART1_ROT_SRV1_MSK_POS)
#define DROP_CONN_MSK_POS (5UL)
#define DROP_CONN_MSK (1UL << DROP_CONN_MSK_POS)
#define SECURE_CLIENTS_ONLY_MSK_POS (6UL)
#define SECURE_CLIENTS_ONLY_MSK (1UL << SECURE_CLIENTS_ONLY_MSK_POS)
#define CLIENT_TESTS_PART1_WAIT_ANY_SID_MSK (\
PART1_ROT_SRV1_MSK | \
DROP_CONN_MSK | \
SECURE_CLIENTS_ONLY_MSK)
#endif // PSA_CLIENT_TESTS_PART1_PARTITION_H

126
TESTS/psa/spm_client/TARGET_MBED_SPM/COMPONENT_SPE/psa_client_tests_part1_partition.c
View File

@ -1,126 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_client_tests_part1_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t client_tests_part1_thread_stack[1024] = {0};
/* Threads control blocks */
osRtxThread_t client_tests_part1_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t client_tests_part1_thread_attr = {
.name = "client_tests_part1",
.attr_bits = 0,
.cb_mem = &client_tests_part1_thread_cb,
.cb_size = sizeof(client_tests_part1_thread_cb),
.stack_mem = client_tests_part1_thread_stack,
.stack_size = 1024,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t client_tests_part1_rot_services[CLIENT_TESTS_PART1_ROT_SRV_COUNT] = {
{
.sid = CLIENT_TESTS_PART1_ROT_SRV1,
.mask = PART1_ROT_SRV1_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CLIENT_TESTS_PART1_DROP_CONN,
.mask = DROP_CONN_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY,
.mask = SECURE_CLIENTS_ONLY_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = false,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
static osRtxMutex_t client_tests_part1_mutex = {0};
static const osMutexAttr_t client_tests_part1_mutex_attr = {
.name = "client_tests_part1_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &client_tests_part1_mutex,
.cb_size = sizeof(client_tests_part1_mutex),
};
extern void client_part_main(void *ptr);
void client_tests_part1_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&client_tests_part1_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition client_tests_part1!\n");
}
for (uint32_t i = 0; i < CLIENT_TESTS_PART1_ROT_SRV_COUNT; ++i) {
client_tests_part1_rot_services[i].partition = partition;
}
partition->rot_services = client_tests_part1_rot_services;
partition->thread_id = osThreadNew(client_part_main, NULL, &client_tests_part1_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition client_tests_part1!\n");
}
}

122
TESTS/psa/spm_client/TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c
View File

@ -1,122 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "spm_panic.h"
#include "spm_internal.h"
#include "handles_manager.h"
#include "cmsis.h"
#include "psa_attest_srv_partition.h"
#include "psa_crypto_srv_partition.h"
#include "psa_platform_partition.h"
#include "psa_its_partition.h"
#include "psa_client_tests_part1_partition.h"
extern const uint32_t attest_srv_external_sids[7];
extern const uint32_t crypto_srv_external_sids[4];
extern const uint32_t platform_external_sids[1];
spm_partition_t g_partitions[5] = {
{
.partition_id = ATTEST_SRV_ID,
.thread_id = 0,
.flags = ATTEST_SRV_WAIT_ANY_SID_MSK | ATTEST_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ATTEST_SRV_ROT_SRV_COUNT,
.extern_sids = attest_srv_external_sids,
.extern_sids_count = ATTEST_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_SRV_ID,
.thread_id = 0,
.flags = CRYPTO_SRV_WAIT_ANY_SID_MSK | CRYPTO_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_SRV_ROT_SRV_COUNT,
.extern_sids = crypto_srv_external_sids,
.extern_sids_count = CRYPTO_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = PLATFORM_ID,
.thread_id = 0,
.flags = PLATFORM_WAIT_ANY_SID_MSK | PLATFORM_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = PLATFORM_ROT_SRV_COUNT,
.extern_sids = platform_external_sids,
.extern_sids_count = PLATFORM_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = ITS_ID,
.thread_id = 0,
.flags = ITS_WAIT_ANY_SID_MSK | ITS_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ITS_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = ITS_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CLIENT_TESTS_PART1_ID,
.thread_id = 0,
.flags = CLIENT_TESTS_PART1_WAIT_ANY_SID_MSK | CLIENT_TESTS_PART1_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CLIENT_TESTS_PART1_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = CLIENT_TESTS_PART1_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
};
/* Check all the defined memory regions for overlapping. */
/* A list of all the memory regions. */
const mem_region_t *mem_regions = NULL;
const uint32_t mem_region_count = 0;
// forward declaration of partition initializers
void attest_srv_init(spm_partition_t *partition);
void crypto_srv_init(spm_partition_t *partition);
void platform_init(spm_partition_t *partition);
void its_init(spm_partition_t *partition);
void client_tests_part1_init(spm_partition_t *partition);
uint32_t init_partitions(spm_partition_t **partitions)
{
if (NULL == partitions) {
SPM_PANIC("partitions is NULL!\n");
}
attest_srv_init(&(g_partitions[0]));
crypto_srv_init(&(g_partitions[1]));
platform_init(&(g_partitions[2]));
its_init(&(g_partitions[3]));
client_tests_part1_init(&(g_partitions[4]));
*partitions = g_partitions;
return 5;
}

33
TESTS/psa/spm_client/psa_client_tests_part1_ifs.h
View File

@ -1,33 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CLIENT_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define PSA_CLIENT_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define CLIENT_TESTS_PART1_ROT_SRV1 0x00001A05
#define CLIENT_TESTS_PART1_DROP_CONN 0x00001A06
#define CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY 0x00001A07
#endif // PSA_CLIENT_TESTS_PART1_PARTITION_ROT_SERVICES_H

54
TESTS/psa/spm_server/COMPONENT_SPE/psa_server_tests_part1_partition.h
View File

@ -1,54 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SERVER_TESTS_PART1_PARTITION_H
#define PSA_SERVER_TESTS_PART1_PARTITION_H
#define SERVER_TESTS_PART1_ID 2
#define SERVER_TESTS_PART1_ROT_SRV_COUNT (2UL)
#define SERVER_TESTS_PART1_EXT_ROT_SRV_COUNT (2UL)
/* SERVER_TESTS_PART1 event flags */
#define SERVER_TESTS_PART1_RESERVED1_POS (1UL)
#define SERVER_TESTS_PART1_RESERVED1_MSK (1UL << SERVER_TESTS_PART1_RESERVED1_POS)
#define SERVER_TESTS_PART1_RESERVED2_POS (2UL)
#define SERVER_TESTS_PART1_RESERVED2_MSK (1UL << SERVER_TESTS_PART1_RESERVED2_POS)
#define SERVER_TESTS_PART1_WAIT_ANY_IRQ_MSK (0)
#define CONTROL_MSK_POS (4UL)
#define CONTROL_MSK (1UL << CONTROL_MSK_POS)
#define TEST_MSK_POS (5UL)
#define TEST_MSK (1UL << TEST_MSK_POS)
#define SERVER_TESTS_PART1_WAIT_ANY_SID_MSK (\
CONTROL_MSK | \
TEST_MSK)
#endif // PSA_SERVER_TESTS_PART1_PARTITION_H

54
TESTS/psa/spm_server/COMPONENT_SPE/psa_server_tests_part2_partition.h
View File

@ -1,54 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SERVER_TESTS_PART2_PARTITION_H
#define PSA_SERVER_TESTS_PART2_PARTITION_H
#define SERVER_TESTS_PART2_ID 3
#define SERVER_TESTS_PART2_ROT_SRV_COUNT (2UL)
#define SERVER_TESTS_PART2_EXT_ROT_SRV_COUNT (0UL)
/* SERVER_TESTS_PART2 event flags */
#define SERVER_TESTS_PART2_RESERVED1_POS (1UL)
#define SERVER_TESTS_PART2_RESERVED1_MSK (1UL << SERVER_TESTS_PART2_RESERVED1_POS)
#define SERVER_TESTS_PART2_RESERVED2_POS (2UL)
#define SERVER_TESTS_PART2_RESERVED2_MSK (1UL << SERVER_TESTS_PART2_RESERVED2_POS)
#define SERVER_TESTS_PART2_WAIT_ANY_IRQ_MSK (0)
#define ROT_SRV_REVERSE_MSK_POS (4UL)
#define ROT_SRV_REVERSE_MSK (1UL << ROT_SRV_REVERSE_MSK_POS)
#define ROT_SRV_DB_TST_MSK_POS (5UL)
#define ROT_SRV_DB_TST_MSK (1UL << ROT_SRV_DB_TST_MSK_POS)
#define SERVER_TESTS_PART2_WAIT_ANY_SID_MSK (\
ROT_SRV_REVERSE_MSK | \
ROT_SRV_DB_TST_MSK)
#endif // PSA_SERVER_TESTS_PART2_PARTITION_H

2
TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition1.c
View File

@ -18,7 +18,7 @@
#include "string.h"
#include "psa/client.h"
#include "psa/service.h"
#include "psa_server_tests_part1_partition.h"
#include "mbed_spm_partitions.h"
#include "server_tests.h"
extern psa_test_server_side_func test_list[];

2
TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition2.c
View File

@ -19,7 +19,7 @@
#include <string.h>
#include "psa/client.h"
#include "psa/service.h"
#include "psa_server_tests_part2_partition.h"
#include "mbed_spm_partitions.h"
#if defined(TARGET_MBED_SPM)
#include "cmsis_os2.h"

2
TESTS/psa/spm_server/COMPONENT_SPE/tests.c
View File

@ -18,7 +18,7 @@
#include "string.h"
#include "psa/client.h"
#include "psa/service.h"
#include "psa_server_tests_part1_partition.h"
#include "mbed_spm_partitions.h"
#include "server_tests.h"
#include "psa_manifest/sid.h"

119
TESTS/psa/spm_server/TARGET_MBED_SPM/COMPONENT_SPE/psa_server_tests_part1_partition.c
View File

@ -1,119 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_server_tests_part1_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t server_tests_part1_thread_stack[1024] = {0};
/* Threads control blocks */
osRtxThread_t server_tests_part1_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t server_tests_part1_thread_attr = {
.name = "server_tests_part1",
.attr_bits = 0,
.cb_mem = &server_tests_part1_thread_cb,
.cb_size = sizeof(server_tests_part1_thread_cb),
.stack_mem = server_tests_part1_thread_stack,
.stack_size = 1024,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t server_tests_part1_rot_services[SERVER_TESTS_PART1_ROT_SRV_COUNT] = {
{
.sid = SERVER_TESTS_PART1_CONTROL,
.mask = CONTROL_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = SERVER_TESTS_PART1_TEST,
.mask = TEST_MSK,
.partition = NULL,
.min_version = 12,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
/* External SIDs used by SERVER_TESTS_PART1 */
const uint32_t server_tests_part1_external_sids[2] = {
SERVER_TESTS_PART2_ROT_SRV_REVERSE,
SERVER_TESTS_PART2_ROT_SRV_DB_TST,
};
static osRtxMutex_t server_tests_part1_mutex = {0};
static const osMutexAttr_t server_tests_part1_mutex_attr = {
.name = "server_tests_part1_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &server_tests_part1_mutex,
.cb_size = sizeof(server_tests_part1_mutex),
};
extern void server_part1_main(void *ptr);
void server_tests_part1_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&server_tests_part1_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition server_tests_part1!\n");
}
for (uint32_t i = 0; i < SERVER_TESTS_PART1_ROT_SRV_COUNT; ++i) {
server_tests_part1_rot_services[i].partition = partition;
}
partition->rot_services = server_tests_part1_rot_services;
partition->thread_id = osThreadNew(server_part1_main, NULL, &server_tests_part1_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition server_tests_part1!\n");
}
}

114
TESTS/psa/spm_server/TARGET_MBED_SPM/COMPONENT_SPE/psa_server_tests_part2_partition.c
View File

@ -1,114 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_server_tests_part2_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t server_tests_part2_thread_stack[1024] = {0};
/* Threads control blocks */
osRtxThread_t server_tests_part2_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t server_tests_part2_thread_attr = {
.name = "server_tests_part2",
.attr_bits = 0,
.cb_mem = &server_tests_part2_thread_cb,
.cb_size = sizeof(server_tests_part2_thread_cb),
.stack_mem = server_tests_part2_thread_stack,
.stack_size = 1024,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t server_tests_part2_rot_services[SERVER_TESTS_PART2_ROT_SRV_COUNT] = {
{
.sid = SERVER_TESTS_PART2_ROT_SRV_REVERSE,
.mask = ROT_SRV_REVERSE_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = false,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = SERVER_TESTS_PART2_ROT_SRV_DB_TST,
.mask = ROT_SRV_DB_TST_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = false,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
static osRtxMutex_t server_tests_part2_mutex = {0};
static const osMutexAttr_t server_tests_part2_mutex_attr = {
.name = "server_tests_part2_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &server_tests_part2_mutex,
.cb_size = sizeof(server_tests_part2_mutex),
};
extern void server_part2_main(void *ptr);
void server_tests_part2_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&server_tests_part2_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition server_tests_part2!\n");
}
for (uint32_t i = 0; i < SERVER_TESTS_PART2_ROT_SRV_COUNT; ++i) {
server_tests_part2_rot_services[i].partition = partition;
}
partition->rot_services = server_tests_part2_rot_services;
partition->thread_id = osThreadNew(server_part2_main, NULL, &server_tests_part2_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition server_tests_part2!\n");
}
}

136
TESTS/psa/spm_server/TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c
View File

@ -1,136 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "spm_panic.h"
#include "spm_internal.h"
#include "handles_manager.h"
#include "cmsis.h"
#include "psa_attest_srv_partition.h"
#include "psa_crypto_srv_partition.h"
#include "psa_platform_partition.h"
#include "psa_its_partition.h"
#include "psa_server_tests_part1_partition.h"
#include "psa_server_tests_part2_partition.h"
extern const uint32_t attest_srv_external_sids[7];
extern const uint32_t crypto_srv_external_sids[4];
extern const uint32_t platform_external_sids[1];
extern const uint32_t server_tests_part1_external_sids[2];
spm_partition_t g_partitions[6] = {
{
.partition_id = ATTEST_SRV_ID,
.thread_id = 0,
.flags = ATTEST_SRV_WAIT_ANY_SID_MSK | ATTEST_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ATTEST_SRV_ROT_SRV_COUNT,
.extern_sids = attest_srv_external_sids,
.extern_sids_count = ATTEST_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_SRV_ID,
.thread_id = 0,
.flags = CRYPTO_SRV_WAIT_ANY_SID_MSK | CRYPTO_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_SRV_ROT_SRV_COUNT,
.extern_sids = crypto_srv_external_sids,
.extern_sids_count = CRYPTO_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = PLATFORM_ID,
.thread_id = 0,
.flags = PLATFORM_WAIT_ANY_SID_MSK | PLATFORM_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = PLATFORM_ROT_SRV_COUNT,
.extern_sids = platform_external_sids,
.extern_sids_count = PLATFORM_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = ITS_ID,
.thread_id = 0,
.flags = ITS_WAIT_ANY_SID_MSK | ITS_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ITS_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = ITS_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = SERVER_TESTS_PART1_ID,
.thread_id = 0,
.flags = SERVER_TESTS_PART1_WAIT_ANY_SID_MSK | SERVER_TESTS_PART1_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = SERVER_TESTS_PART1_ROT_SRV_COUNT,
.extern_sids = server_tests_part1_external_sids,
.extern_sids_count = SERVER_TESTS_PART1_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = SERVER_TESTS_PART2_ID,
.thread_id = 0,
.flags = SERVER_TESTS_PART2_WAIT_ANY_SID_MSK | SERVER_TESTS_PART2_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = SERVER_TESTS_PART2_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = SERVER_TESTS_PART2_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
};
/* Check all the defined memory regions for overlapping. */
/* A list of all the memory regions. */
const mem_region_t *mem_regions = NULL;
const uint32_t mem_region_count = 0;
// forward declaration of partition initializers
void attest_srv_init(spm_partition_t *partition);
void crypto_srv_init(spm_partition_t *partition);
void platform_init(spm_partition_t *partition);
void its_init(spm_partition_t *partition);
void server_tests_part1_init(spm_partition_t *partition);
void server_tests_part2_init(spm_partition_t *partition);
uint32_t init_partitions(spm_partition_t **partitions)
{
if (NULL == partitions) {
SPM_PANIC("partitions is NULL!\n");
}
attest_srv_init(&(g_partitions[0]));
crypto_srv_init(&(g_partitions[1]));
platform_init(&(g_partitions[2]));
its_init(&(g_partitions[3]));
server_tests_part1_init(&(g_partitions[4]));
server_tests_part2_init(&(g_partitions[5]));
*partitions = g_partitions;
return 6;
}

32
TESTS/psa/spm_server/psa_server_tests_part1_ifs.h
View File

@ -1,32 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SERVER_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define PSA_SERVER_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define SERVER_TESTS_PART1_CONTROL 0x00001A01
#define SERVER_TESTS_PART1_TEST 0x00001A02
#endif // PSA_SERVER_TESTS_PART1_PARTITION_ROT_SERVICES_H

32
TESTS/psa/spm_server/psa_server_tests_part2_ifs.h
View File

@ -1,32 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SERVER_TESTS_PART2_PARTITION_ROT_SERVICES_H
#define PSA_SERVER_TESTS_PART2_PARTITION_ROT_SERVICES_H
#define SERVER_TESTS_PART2_ROT_SRV_REVERSE 0x00001A03
#define SERVER_TESTS_PART2_ROT_SRV_DB_TST 0x00001A04
#endif // PSA_SERVER_TESTS_PART2_PARTITION_ROT_SERVICES_H

51
TESTS/psa/spm_smoke/COMPONENT_SPE/psa_smoke_tests_part1_partition.h
View File

@ -1,51 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SMOKE_TESTS_PART1_PARTITION_H
#define PSA_SMOKE_TESTS_PART1_PARTITION_H
#define SMOKE_TESTS_PART1_ID 4
#define SMOKE_TESTS_PART1_ROT_SRV_COUNT (1UL)
#define SMOKE_TESTS_PART1_EXT_ROT_SRV_COUNT (0UL)
/* SMOKE_TESTS_PART1 event flags */
#define SMOKE_TESTS_PART1_RESERVED1_POS (1UL)
#define SMOKE_TESTS_PART1_RESERVED1_MSK (1UL << SMOKE_TESTS_PART1_RESERVED1_POS)
#define SMOKE_TESTS_PART1_RESERVED2_POS (2UL)
#define SMOKE_TESTS_PART1_RESERVED2_MSK (1UL << SMOKE_TESTS_PART1_RESERVED2_POS)
#define SMOKE_TESTS_PART1_WAIT_ANY_IRQ_MSK (0)
#define ROT_SRV1_MSK_POS (4UL)
#define ROT_SRV1_MSK (1UL << ROT_SRV1_MSK_POS)
#define SMOKE_TESTS_PART1_WAIT_ANY_SID_MSK (\
ROT_SRV1_MSK)
#endif // PSA_SMOKE_TESTS_PART1_PARTITION_H

2
TESTS/psa/spm_smoke/COMPONENT_SPE/smoke_tests_partition.c
View File

@ -21,7 +21,7 @@
#include <stdlib.h>
#include "psa/client.h"
#include "psa/service.h"
#include "psa_smoke_tests_part1_partition.h"
#include "mbed_spm_partitions.h"
// ------------------------------------ Definitions ----------------------------------

122
TESTS/psa/spm_smoke/TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c
View File

@ -1,122 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "spm_panic.h"
#include "spm_internal.h"
#include "handles_manager.h"
#include "cmsis.h"
#include "psa_attest_srv_partition.h"
#include "psa_crypto_srv_partition.h"
#include "psa_platform_partition.h"
#include "psa_its_partition.h"
#include "psa_smoke_tests_part1_partition.h"
extern const uint32_t attest_srv_external_sids[7];
extern const uint32_t crypto_srv_external_sids[4];
extern const uint32_t platform_external_sids[1];
spm_partition_t g_partitions[5] = {
{
.partition_id = ATTEST_SRV_ID,
.thread_id = 0,
.flags = ATTEST_SRV_WAIT_ANY_SID_MSK | ATTEST_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ATTEST_SRV_ROT_SRV_COUNT,
.extern_sids = attest_srv_external_sids,
.extern_sids_count = ATTEST_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_SRV_ID,
.thread_id = 0,
.flags = CRYPTO_SRV_WAIT_ANY_SID_MSK | CRYPTO_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_SRV_ROT_SRV_COUNT,
.extern_sids = crypto_srv_external_sids,
.extern_sids_count = CRYPTO_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = PLATFORM_ID,
.thread_id = 0,
.flags = PLATFORM_WAIT_ANY_SID_MSK | PLATFORM_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = PLATFORM_ROT_SRV_COUNT,
.extern_sids = platform_external_sids,
.extern_sids_count = PLATFORM_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = ITS_ID,
.thread_id = 0,
.flags = ITS_WAIT_ANY_SID_MSK | ITS_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ITS_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = ITS_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = SMOKE_TESTS_PART1_ID,
.thread_id = 0,
.flags = SMOKE_TESTS_PART1_WAIT_ANY_SID_MSK | SMOKE_TESTS_PART1_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = SMOKE_TESTS_PART1_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = SMOKE_TESTS_PART1_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
};
/* Check all the defined memory regions for overlapping. */
/* A list of all the memory regions. */
const mem_region_t *mem_regions = NULL;
const uint32_t mem_region_count = 0;
// forward declaration of partition initializers
void attest_srv_init(spm_partition_t *partition);
void crypto_srv_init(spm_partition_t *partition);
void platform_init(spm_partition_t *partition);
void its_init(spm_partition_t *partition);
void smoke_tests_part1_init(spm_partition_t *partition);
uint32_t init_partitions(spm_partition_t **partitions)
{
if (NULL == partitions) {
SPM_PANIC("partitions is NULL!\n");
}
attest_srv_init(&(g_partitions[0]));
crypto_srv_init(&(g_partitions[1]));
platform_init(&(g_partitions[2]));
its_init(&(g_partitions[3]));
smoke_tests_part1_init(&(g_partitions[4]));
*partitions = g_partitions;
return 5;
}

102
TESTS/psa/spm_smoke/TARGET_MBED_SPM/COMPONENT_SPE/psa_smoke_tests_part1_partition.c
View File

@ -1,102 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_smoke_tests_part1_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t smoke_tests_part1_thread_stack[512] = {0};
/* Threads control blocks */
osRtxThread_t smoke_tests_part1_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t smoke_tests_part1_thread_attr = {
.name = "smoke_tests_part1",
.attr_bits = 0,
.cb_mem = &smoke_tests_part1_thread_cb,
.cb_size = sizeof(smoke_tests_part1_thread_cb),
.stack_mem = smoke_tests_part1_thread_stack,
.stack_size = 512,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t smoke_tests_part1_rot_services[SMOKE_TESTS_PART1_ROT_SRV_COUNT] = {
{
.sid = SMOKE_TESTS_PART1_ROT_SRV1,
.mask = ROT_SRV1_MSK,
.partition = NULL,
.min_version = 5,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
static osRtxMutex_t smoke_tests_part1_mutex = {0};
static const osMutexAttr_t smoke_tests_part1_mutex_attr = {
.name = "smoke_tests_part1_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &smoke_tests_part1_mutex,
.cb_size = sizeof(smoke_tests_part1_mutex),
};
extern void smoke_part_main(void *ptr);
void smoke_tests_part1_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&smoke_tests_part1_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition smoke_tests_part1!\n");
}
for (uint32_t i = 0; i < SMOKE_TESTS_PART1_ROT_SRV_COUNT; ++i) {
smoke_tests_part1_rot_services[i].partition = partition;
}
partition->rot_services = smoke_tests_part1_rot_services;
partition->thread_id = osThreadNew(smoke_part_main, NULL, &smoke_tests_part1_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition smoke_tests_part1!\n");
}
}

31
TESTS/psa/spm_smoke/psa_smoke_tests_part1_ifs.h
View File

@ -1,31 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_SMOKE_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define PSA_SMOKE_TESTS_PART1_PARTITION_ROT_SERVICES_H
#define SMOKE_TESTS_PART1_ROT_SRV1 0x00001A00
#endif // PSA_SMOKE_TESTS_PART1_PARTITION_ROT_SERVICES_H

41
UNITTESTS/features/cellular/framework/AT/athandler/athandlertest.cpp
View File

@ -716,6 +716,7 @@ TEST_F(TestATHandler, test_ATHandler_read_string)
at.resp_start("s");
// TO read from: ss\rsss -> read all 6 chars ss\rsss
EXPECT_TRUE(6 == at.read_string(buf4, 6 + 1/*for NULL*/));
at.resp_stop();
// *** Reading when buffer only has " ***
at.clear_error();
@ -729,6 +730,7 @@ TEST_F(TestATHandler, test_ATHandler_read_string)
// TO read from buffer having only " -> trying to find delimiter or stop_tag(OKCRLF)
EXPECT_TRUE(-1 == at.read_string(buf4, 5));
EXPECT_TRUE(NSAPI_ERROR_DEVICE_ERROR == at.get_last_error());
at.resp_stop();
// *** Reading through partially matching stop tag ***
at.clear_error();
@ -760,10 +762,10 @@ TEST_F(TestATHandler, test_ATHandler_read_string)
EXPECT_TRUE(6 == at.read_string(buf9, 6 + 1/*for NULL*/));
at.clear_error();
char table11[] = "\"1016\",\"39AB\",9\r\n\0";
char table10[] = "\"1016\",\"39AB\",9\r\n\0";
mbed_poll_stub::int_value = 0;
at.flush();
filehandle_stub_table = table11;
filehandle_stub_table = table10;
filehandle_stub_table_pos = 0;
mbed_poll_stub::revents_value = POLLIN;
mbed_poll_stub::int_value = 1;
@ -776,19 +778,46 @@ TEST_F(TestATHandler, test_ATHandler_read_string)
// *** CRLF part of the string ***
at.clear_error();
char table10[] = "\"s\"\r\nOK\r\n\0";
char table11[] = "\"s\"\r\nOK\r\n\0";
mbed_poll_stub::int_value = 0;
at.flush();
filehandle_stub_table = table10;
filehandle_stub_table = table11;
filehandle_stub_table_pos = 0;
mbed_poll_stub::revents_value = POLLIN;
mbed_poll_stub::int_value = 1;
char buf10[10];
char buf11[10];
// NO prefix, NO OK, NO ERROR and NO URC match, CRLF found -> return so buffer could be read
at.resp_start();
// TO read from
EXPECT_TRUE(3 == at.read_string(buf10, 9 + 1/*for NULL*/));
EXPECT_TRUE(3 == at.read_string(buf11, 9 + 1/*for NULL*/));
// *** Read size hits in the middle of stop tag ***
at.clear_error();
char table12[] = "abcdOK\r\nefg\r\n\0";
mbed_poll_stub::int_value = 0;
at.flush();
filehandle_stub_table = table12;
filehandle_stub_table_pos = 0;
mbed_poll_stub::revents_value = POLLIN;
mbed_poll_stub::int_value = 1;
char buf12[7];
at.resp_start();
// Read size hits in the middle of OKCRLF
EXPECT_TRUE(4 == at.read_string(buf12, 7));
EXPECT_TRUE(!strncmp(buf12, "abcd", 4));
// Not running into time out
EXPECT_TRUE(NSAPI_ERROR_OK == at.get_last_error());
// No error -> -1 returned because stop tag found already
EXPECT_TRUE(-1 == at.read_string(buf12, 1));
at.resp_stop();
at.resp_start();
EXPECT_TRUE(3 == at.read_string(buf12, 4));
EXPECT_TRUE(!strncmp(buf12, "efg", 3));
// No stop tag found
EXPECT_TRUE(NSAPI_ERROR_DEVICE_ERROR == at.get_last_error());
}
TEST_F(TestATHandler, test_ATHandler_read_hex_string)

113
components/TARGET_PSA/TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c
View File

@ -1,113 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "spm_panic.h"
#include "spm_internal.h"
#include "handles_manager.h"
#include "cmsis.h"
#include "psa_attest_srv_partition.h"
#include "psa_crypto_srv_partition.h"
#include "psa_platform_partition.h"
#include "psa_its_partition.h"
extern const uint32_t attest_srv_external_sids[7];
extern const uint32_t crypto_srv_external_sids[4];
extern const uint32_t platform_external_sids[1];
__attribute__((weak))
spm_partition_t g_partitions[4] = {
{
.partition_id = ATTEST_SRV_ID,
.thread_id = 0,
.flags = ATTEST_SRV_WAIT_ANY_SID_MSK | ATTEST_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ATTEST_SRV_ROT_SRV_COUNT,
.extern_sids = attest_srv_external_sids,
.extern_sids_count = ATTEST_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = CRYPTO_SRV_ID,
.thread_id = 0,
.flags = CRYPTO_SRV_WAIT_ANY_SID_MSK | CRYPTO_SRV_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = CRYPTO_SRV_ROT_SRV_COUNT,
.extern_sids = crypto_srv_external_sids,
.extern_sids_count = CRYPTO_SRV_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = PLATFORM_ID,
.thread_id = 0,
.flags = PLATFORM_WAIT_ANY_SID_MSK | PLATFORM_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = PLATFORM_ROT_SRV_COUNT,
.extern_sids = platform_external_sids,
.extern_sids_count = PLATFORM_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
{
.partition_id = ITS_ID,
.thread_id = 0,
.flags = ITS_WAIT_ANY_SID_MSK | ITS_WAIT_ANY_IRQ_MSK,
.rot_services = NULL,
.rot_services_count = ITS_ROT_SRV_COUNT,
.extern_sids = NULL,
.extern_sids_count = ITS_EXT_ROT_SRV_COUNT,
.irq_mapper = NULL,
},
};
/* Check all the defined memory regions for overlapping. */
/* A list of all the memory regions. */
__attribute__((weak))
const mem_region_t *mem_regions = NULL;
__attribute__((weak))
const uint32_t mem_region_count = 0;
// forward declaration of partition initializers
void attest_srv_init(spm_partition_t *partition);
void crypto_srv_init(spm_partition_t *partition);
void platform_init(spm_partition_t *partition);
void its_init(spm_partition_t *partition);
__attribute__((weak))
uint32_t init_partitions(spm_partition_t **partitions)
{
if (NULL == partitions) {
SPM_PANIC("partitions is NULL!\n");
}
attest_srv_init(&(g_partitions[0]));
crypto_srv_init(&(g_partitions[1]));
platform_init(&(g_partitions[2]));
its_init(&(g_partitions[3]));
*partitions = g_partitions;
return 4;
}

10
components/TARGET_PSA/TARGET_TFM/COMPONENT_NSPE/interface/src/tfm_ns_lock_rtx.c
View File

@ -54,11 +54,15 @@ uint32_t tfm_ns_lock_dispatch(veneer_fn fn,
}
/* TFM request protected by NS lock */
osMutexAcquire(ns_lock.id,osWaitForever);
if (osMutexAcquire(ns_lock.id,osWaitForever) != osOK) {
return TFM_ERROR_GENERIC;
}
result = fn(arg0, arg1, arg2, arg3);
osMutexRelease(ns_lock.id);
if (osMutexRelease(ns_lock.id) != osOK) {
return TFM_ERROR_GENERIC;
}
return result;
}
@ -66,7 +70,7 @@ uint32_t tfm_ns_lock_dispatch(veneer_fn fn,
/**
* \brief NS world, Init NS lock
*/
uint32_t tfm_ns_lock_init()
enum tfm_status_e tfm_ns_lock_init()
{
if (ns_lock.init == false) {
ns_lock.id = osMutexNew(&ns_lock_attrib);

62
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/autogen/tfm_partition_defs.inc
View File

@ -1,62 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
#ifndef __TFM_PARTITION_DEFS_INC__
#define __TFM_PARTITION_DEFS_INC__
/*************************** Service Partitions ******************************/
#define ATTEST_SRV_ID (TFM_SP_BASE + 0)
#define CRYPTO_SRV_ID (TFM_SP_BASE + 1)
#define PLATFORM_ID (TFM_SP_BASE + 2)
#define ITS_ID (TFM_SP_BASE + 3)
/*************************** Test Partitions *********************************/
#ifdef USE_PSA_TEST_PARTITIONS
#ifdef USE_CRYPTO_ACL_TEST
#define CRYPTO_ACL_TEST_ID (TFM_SP_BASE + 4 + 0)
#endif
#ifdef USE_CLIENT_TESTS_PART1
#define CLIENT_TESTS_PART1_ID (TFM_SP_BASE + 4 + 1)
#endif
#ifdef USE_SERVER_TESTS_PART1
#define SERVER_TESTS_PART1_ID (TFM_SP_BASE + 4 + 2)
#endif
#ifdef USE_SERVER_TESTS_PART2
#define SERVER_TESTS_PART2_ID (TFM_SP_BASE + 4 + 3)
#endif
#ifdef USE_SMOKE_TESTS_PART1
#define SMOKE_TESTS_PART1_ID (TFM_SP_BASE + 4 + 4)
#endif
#endif // USE_PSA_TEST_PARTITIONS
#ifdef USE_PSA_TEST_PARTITIONS
#define TFM_MAX_USER_PARTITIONS (4 + 5)
#else
#define TFM_MAX_USER_PARTITIONS (4)
#endif
#endif // __TFM_PARTITION_DEFS_INC__

81
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/autogen/tfm_partition_list.inc
View File

@ -1,81 +0,0 @@
/*
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
#ifndef __TFM_PARTITION_LIST_INC__
#define __TFM_PARTITION_LIST_INC__
/******** ATTEST_SRV ********/
PARTITION_DECLARE(ATTEST_SRV, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 37, NORMAL, 8192);
PARTITION_ADD_INIT_FUNC(ATTEST_SRV, attest_main);
/******** CRYPTO_SRV ********/
PARTITION_DECLARE(CRYPTO_SRV, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 35, NORMAL, 16384);
PARTITION_ADD_INIT_FUNC(CRYPTO_SRV, crypto_main);
/******** PLATFORM ********/
PARTITION_DECLARE(PLATFORM, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 8, NORMAL, 1024);
PARTITION_ADD_INIT_FUNC(PLATFORM, platform_partition_entry);
/******** ITS ********/
PARTITION_DECLARE(ITS, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 10, NORMAL, 2048);
PARTITION_ADD_INIT_FUNC(ITS, its_entry);
#ifdef USE_PSA_TEST_PARTITIONS
#ifdef USE_CRYPTO_ACL_TEST
/******** CRYPTO_ACL_TEST ********/
PARTITION_DECLARE(CRYPTO_ACL_TEST, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 128, NORMAL, 512);
PARTITION_ADD_INIT_FUNC(CRYPTO_ACL_TEST, test_partition_main);
#endif // USE_CRYPTO_ACL_TEST
#ifdef USE_CLIENT_TESTS_PART1
/******** CLIENT_TESTS_PART1 ********/
PARTITION_DECLARE(CLIENT_TESTS_PART1, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 1, NORMAL, 1024);
PARTITION_ADD_INIT_FUNC(CLIENT_TESTS_PART1, client_part_main);
#endif // USE_CLIENT_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART1
/******** SERVER_TESTS_PART1 ********/
PARTITION_DECLARE(SERVER_TESTS_PART1, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 2, NORMAL, 1024);
PARTITION_ADD_INIT_FUNC(SERVER_TESTS_PART1, server_part1_main);
#endif // USE_SERVER_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART2
/******** SERVER_TESTS_PART2 ********/
PARTITION_DECLARE(SERVER_TESTS_PART2, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 3, NORMAL, 1024);
PARTITION_ADD_INIT_FUNC(SERVER_TESTS_PART2, server_part2_main);
#endif // USE_SERVER_TESTS_PART2
#ifdef USE_SMOKE_TESTS_PART1
/******** SMOKE_TESTS_PART1 ********/
PARTITION_DECLARE(SMOKE_TESTS_PART1, 0
| SPM_PART_FLAG_IPC
, "APPLICATION-ROT", 4, NORMAL, 512);
PARTITION_ADD_INIT_FUNC(SMOKE_TESTS_PART1, smoke_part_main);
#endif // USE_SMOKE_TESTS_PART1
#endif // USE_PSA_TEST_PARTITIONS
#endif // __TFM_PARTITION_LIST_INC__

84
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/autogen/tfm_service_list.inc
View File

@ -1,84 +0,0 @@
/*
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
#ifndef __TFM_SERVICE_LIST_INC__
#define __TFM_SERVICE_LIST_INC__
/******** ATTEST_SRV ********/
{"PSA_ATTEST_GET_TOKEN_ID", ATTEST_SRV_ID, PSA_ATTEST_GET_TOKEN, 0x00000F10, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_ATTEST_GET_TOKEN_SIZE_ID", ATTEST_SRV_ID, PSA_ATTEST_GET_TOKEN_SIZE, 0x00000F11, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_ATTEST_INJECT_KEY_ID", ATTEST_SRV_ID, PSA_ATTEST_INJECT_KEY, 0x00000F12, true, 1, TFM_VERSION_POLICY_STRICT},
/******** CRYPTO_SRV ********/
{"PSA_CRYPTO_INIT_ID", CRYPTO_SRV_ID, PSA_CRYPTO_INIT, 0x00000F00, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_MAC_ID", CRYPTO_SRV_ID, PSA_MAC, 0x00000F01, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_HASH_ID", CRYPTO_SRV_ID, PSA_HASH, 0x00000F02, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_ASYMMETRIC_ID", CRYPTO_SRV_ID, PSA_ASYMMETRIC, 0x00000F03, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_SYMMETRIC_ID", CRYPTO_SRV_ID, PSA_SYMMETRIC, 0x00000F04, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_AEAD_ID", CRYPTO_SRV_ID, PSA_AEAD, 0x00000F05, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_KEY_MNG_ID", CRYPTO_SRV_ID, PSA_KEY_MNG, 0x00000F06, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_RNG_ID", CRYPTO_SRV_ID, PSA_RNG, 0x00000F07, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_CRYPTO_FREE_ID", CRYPTO_SRV_ID, PSA_CRYPTO_FREE, 0x00000F08, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_GENERATOR_ID", CRYPTO_SRV_ID, PSA_GENERATOR, 0x00000F09, true, 1, TFM_VERSION_POLICY_STRICT},
{"PSA_ENTROPY_ID", CRYPTO_SRV_ID, PSA_ENTROPY_INJECT, 0x00000F0A, true, 1, TFM_VERSION_POLICY_STRICT},
/******** PLATFORM ********/
{"PSA_PLATFORM_LC_GET", PLATFORM_ID, PSA_PLATFORM_LC_GET_MSK, 0x00011000, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_PLATFORM_LC_SET", PLATFORM_ID, PSA_PLATFORM_LC_SET_MSK, 0x00011001, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_PLATFORM_SYSTEM_RESET", PLATFORM_ID, PSA_PLATFORM_SYSTEM_RESET_MSK, 0x00011002, true, 1, TFM_VERSION_POLICY_RELAXED},
/******** ITS ********/
{"PSA_ITS_GET", ITS_ID, PSA_ITS_GET_MSK, 0x00011A00, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_ITS_SET", ITS_ID, PSA_ITS_SET_MSK, 0x00011A01, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_ITS_INFO", ITS_ID, PSA_ITS_INFO_MSK, 0x00011A02, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_ITS_REMOVE", ITS_ID, PSA_ITS_REMOVE_MSK, 0x00011A03, true, 1, TFM_VERSION_POLICY_RELAXED},
{"PSA_ITS_RESET", ITS_ID, PSA_ITS_RESET_MSK, 0x00011A04, false, 1, TFM_VERSION_POLICY_RELAXED},
#ifdef USE_PSA_TEST_PARTITIONS
#ifdef USE_CRYPTO_ACL_TEST
/******** CRYPTO_ACL_TEST ********/
{"CRYPTO_CREATE_PERSISTENT_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_CREATE_PERSISTENT_KEY_MSK, 0x00000200, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_GENERATE_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_GENERATE_KEY_MSK, 0x00000201, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_OPEN_PERSISTENT_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_OPEN_PERSISTENT_KEY_MSK, 0x00000202, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_CLOSE_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_CLOSE_KEY_MSK, 0x00000203, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_SET_KEY_POLICY", CRYPTO_ACL_TEST_ID, CRYPTO_SET_KEY_POLICY_MSK, 0x00000204, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_DESTROY_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_DESTROY_KEY_MSK, 0x00000205, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_GET_KEY_INFO", CRYPTO_ACL_TEST_ID, CRYPTO_GET_KEY_INFO_MSK, 0x00000206, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_GET_KEY_POLICY", CRYPTO_ACL_TEST_ID, CRYPTO_GET_KEY_POLICY_MSK, 0x00000207, true, 1, TFM_VERSION_POLICY_RELAXED},
{"CRYPTO_IMPORT_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_IMPORT_KEY_MSK, 0x00000208, true, 1, TFM_VERSION_POLICY_RELAXED},
#endif // USE_CRYPTO_ACL_TEST
#ifdef USE_CLIENT_TESTS_PART1
/******** CLIENT_TESTS_PART1 ********/
{"CLIENT_TESTS_PART1_ROT_SRV1", CLIENT_TESTS_PART1_ID, PART1_ROT_SRV1_MSK, 0x00001A05, true, 5, TFM_VERSION_POLICY_RELAXED},
{"CLIENT_TESTS_PART1_DROP_CONN", CLIENT_TESTS_PART1_ID, DROP_CONN_MSK, 0x00001A06, true, 5, TFM_VERSION_POLICY_RELAXED},
{"CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY", CLIENT_TESTS_PART1_ID, SECURE_CLIENTS_ONLY_MSK, 0x00001A07, false, 5, TFM_VERSION_POLICY_RELAXED},
#endif // USE_CLIENT_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART1
/******** SERVER_TESTS_PART1 ********/
{"SERVER_TESTS_PART1_CONTROL", SERVER_TESTS_PART1_ID, CONTROL_MSK, 0x00001A01, true, 5, TFM_VERSION_POLICY_RELAXED},
{"SERVER_TESTS_PART1_TEST", SERVER_TESTS_PART1_ID, TEST_MSK, 0x00001A02, true, 12, TFM_VERSION_POLICY_STRICT},
#endif // USE_SERVER_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART2
/******** SERVER_TESTS_PART2 ********/
{"SERVER_TESTS_PART2_ROT_SRV_REVERSE", SERVER_TESTS_PART2_ID, ROT_SRV_REVERSE_MSK, 0x00001A03, false, 5, TFM_VERSION_POLICY_STRICT},
{"SERVER_TESTS_PART2_ROT_SRV_DB_TST", SERVER_TESTS_PART2_ID, ROT_SRV_DB_TST_MSK, 0x00001A04, false, 5, TFM_VERSION_POLICY_STRICT},
#endif // USE_SERVER_TESTS_PART2
#ifdef USE_SMOKE_TESTS_PART1
/******** SMOKE_TESTS_PART1 ********/
{"SMOKE_TESTS_PART1_ROT_SRV1", SMOKE_TESTS_PART1_ID, ROT_SRV1_MSK, 0x00001A00, true, 5, TFM_VERSION_POLICY_RELAXED},
#endif // USE_SMOKE_TESTS_PART1
#endif // USE_PSA_TEST_PARTITIONS
#endif // __TFM_SERVICE_LIST_INC__

123
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/autogen/tfm_spm_signal_defs.h
View File

@ -1,123 +0,0 @@
/*
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
#ifndef __TFM_SPM_SIGNAL_DEFS_H__
#define __TFM_SPM_SIGNAL_DEFS_H__
/******** ATTEST_SRV ********/
#define PSA_ATTEST_GET_TOKEN_POS (4UL)
#define PSA_ATTEST_GET_TOKEN (1UL << PSA_ATTEST_GET_TOKEN_POS)
#define PSA_ATTEST_GET_TOKEN_SIZE_POS (5UL)
#define PSA_ATTEST_GET_TOKEN_SIZE (1UL << PSA_ATTEST_GET_TOKEN_SIZE_POS)
#define PSA_ATTEST_INJECT_KEY_POS (6UL)
#define PSA_ATTEST_INJECT_KEY (1UL << PSA_ATTEST_INJECT_KEY_POS)
/******** CRYPTO_SRV ********/
#define PSA_CRYPTO_INIT_POS (4UL)
#define PSA_CRYPTO_INIT (1UL << PSA_CRYPTO_INIT_POS)
#define PSA_MAC_POS (5UL)
#define PSA_MAC (1UL << PSA_MAC_POS)
#define PSA_HASH_POS (6UL)
#define PSA_HASH (1UL << PSA_HASH_POS)
#define PSA_ASYMMETRIC_POS (7UL)
#define PSA_ASYMMETRIC (1UL << PSA_ASYMMETRIC_POS)
#define PSA_SYMMETRIC_POS (8UL)
#define PSA_SYMMETRIC (1UL << PSA_SYMMETRIC_POS)
#define PSA_AEAD_POS (9UL)
#define PSA_AEAD (1UL << PSA_AEAD_POS)
#define PSA_KEY_MNG_POS (10UL)
#define PSA_KEY_MNG (1UL << PSA_KEY_MNG_POS)
#define PSA_RNG_POS (11UL)
#define PSA_RNG (1UL << PSA_RNG_POS)
#define PSA_CRYPTO_FREE_POS (12UL)
#define PSA_CRYPTO_FREE (1UL << PSA_CRYPTO_FREE_POS)
#define PSA_GENERATOR_POS (13UL)
#define PSA_GENERATOR (1UL << PSA_GENERATOR_POS)
#define PSA_ENTROPY_INJECT_POS (14UL)
#define PSA_ENTROPY_INJECT (1UL << PSA_ENTROPY_INJECT_POS)
/******** PLATFORM ********/
#define PSA_PLATFORM_LC_GET_MSK_POS (4UL)
#define PSA_PLATFORM_LC_GET_MSK (1UL << PSA_PLATFORM_LC_GET_MSK_POS)
#define PSA_PLATFORM_LC_SET_MSK_POS (5UL)
#define PSA_PLATFORM_LC_SET_MSK (1UL << PSA_PLATFORM_LC_SET_MSK_POS)
#define PSA_PLATFORM_SYSTEM_RESET_MSK_POS (6UL)
#define PSA_PLATFORM_SYSTEM_RESET_MSK (1UL << PSA_PLATFORM_SYSTEM_RESET_MSK_POS)
/******** ITS ********/
#define PSA_ITS_GET_MSK_POS (4UL)
#define PSA_ITS_GET_MSK (1UL << PSA_ITS_GET_MSK_POS)
#define PSA_ITS_SET_MSK_POS (5UL)
#define PSA_ITS_SET_MSK (1UL << PSA_ITS_SET_MSK_POS)
#define PSA_ITS_INFO_MSK_POS (6UL)
#define PSA_ITS_INFO_MSK (1UL << PSA_ITS_INFO_MSK_POS)
#define PSA_ITS_REMOVE_MSK_POS (7UL)
#define PSA_ITS_REMOVE_MSK (1UL << PSA_ITS_REMOVE_MSK_POS)
#define PSA_ITS_RESET_MSK_POS (8UL)
#define PSA_ITS_RESET_MSK (1UL << PSA_ITS_RESET_MSK_POS)
#ifdef USE_PSA_TEST_PARTITIONS
#ifdef USE_CRYPTO_ACL_TEST
/******** CRYPTO_ACL_TEST ********/
#define CRYPTO_CREATE_PERSISTENT_KEY_MSK_POS (4UL)
#define CRYPTO_CREATE_PERSISTENT_KEY_MSK (1UL << CRYPTO_CREATE_PERSISTENT_KEY_MSK_POS)
#define CRYPTO_GENERATE_KEY_MSK_POS (5UL)
#define CRYPTO_GENERATE_KEY_MSK (1UL << CRYPTO_GENERATE_KEY_MSK_POS)
#define CRYPTO_OPEN_PERSISTENT_KEY_MSK_POS (6UL)
#define CRYPTO_OPEN_PERSISTENT_KEY_MSK (1UL << CRYPTO_OPEN_PERSISTENT_KEY_MSK_POS)
#define CRYPTO_CLOSE_KEY_MSK_POS (7UL)
#define CRYPTO_CLOSE_KEY_MSK (1UL << CRYPTO_CLOSE_KEY_MSK_POS)
#define CRYPTO_SET_KEY_POLICY_MSK_POS (8UL)
#define CRYPTO_SET_KEY_POLICY_MSK (1UL << CRYPTO_SET_KEY_POLICY_MSK_POS)
#define CRYPTO_DESTROY_KEY_MSK_POS (9UL)
#define CRYPTO_DESTROY_KEY_MSK (1UL << CRYPTO_DESTROY_KEY_MSK_POS)
#define CRYPTO_GET_KEY_INFO_MSK_POS (10UL)
#define CRYPTO_GET_KEY_INFO_MSK (1UL << CRYPTO_GET_KEY_INFO_MSK_POS)
#define CRYPTO_GET_KEY_POLICY_MSK_POS (11UL)
#define CRYPTO_GET_KEY_POLICY_MSK (1UL << CRYPTO_GET_KEY_POLICY_MSK_POS)
#define CRYPTO_IMPORT_KEY_MSK_POS (12UL)
#define CRYPTO_IMPORT_KEY_MSK (1UL << CRYPTO_IMPORT_KEY_MSK_POS)
#endif // USE_CRYPTO_ACL_TEST
#ifdef USE_CLIENT_TESTS_PART1
/******** CLIENT_TESTS_PART1 ********/
#define PART1_ROT_SRV1_MSK_POS (4UL)
#define PART1_ROT_SRV1_MSK (1UL << PART1_ROT_SRV1_MSK_POS)
#define DROP_CONN_MSK_POS (5UL)
#define DROP_CONN_MSK (1UL << DROP_CONN_MSK_POS)
#define SECURE_CLIENTS_ONLY_MSK_POS (6UL)
#define SECURE_CLIENTS_ONLY_MSK (1UL << SECURE_CLIENTS_ONLY_MSK_POS)
#endif // USE_CLIENT_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART1
/******** SERVER_TESTS_PART1 ********/
#define CONTROL_MSK_POS (4UL)
#define CONTROL_MSK (1UL << CONTROL_MSK_POS)
#define TEST_MSK_POS (5UL)
#define TEST_MSK (1UL << TEST_MSK_POS)
#endif // USE_SERVER_TESTS_PART1
#ifdef USE_SERVER_TESTS_PART2
/******** SERVER_TESTS_PART2 ********/
#define ROT_SRV_REVERSE_MSK_POS (4UL)
#define ROT_SRV_REVERSE_MSK (1UL << ROT_SRV_REVERSE_MSK_POS)
#define ROT_SRV_DB_TST_MSK_POS (5UL)
#define ROT_SRV_DB_TST_MSK (1UL << ROT_SRV_DB_TST_MSK_POS)
#endif // USE_SERVER_TESTS_PART2
#ifdef USE_SMOKE_TESTS_PART1
/******** SMOKE_TESTS_PART1 ********/
#define ROT_SRV1_MSK_POS (4UL)
#define ROT_SRV1_MSK (1UL << ROT_SRV1_MSK_POS)
#endif // USE_SMOKE_TESTS_PART1
#endif // USE_PSA_TEST_PARTITIONS
#endif // __TFM_SPM_SIGNAL_DEFS_H__

10
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/bl2/include/tfm_boot_status.h
View File

@ -197,6 +197,16 @@ struct shared_data_tlv_entry {
uint16_t tlv_len; /* size of single TLV entry (including this header). */
};
/**
* \struct tfm_boot_data
*
* \brief Store the data for the runtime SW
*/
struct tfm_boot_data {
struct shared_data_tlv_header header;
uint8_t data[];
};
#define SHARED_DATA_ENTRY_HEADER_SIZE sizeof(struct shared_data_tlv_entry)
#define SHARED_DATA_ENTRY_SIZE(size) (size + SHARED_DATA_ENTRY_HEADER_SIZE)

6
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_spm.h
View File

@ -9,6 +9,7 @@
#include <stdbool.h>
#include "tfm_list.h"
#include "tfm_secure_api.h"
#ifndef TFM_SPM_MAX_ROT_SERV_NUM
#define TFM_SPM_MAX_ROT_SERV_NUM 28
@ -283,12 +284,15 @@ int32_t tfm_spm_check_client_version(struct tfm_spm_service_t *service,
* \param[in] buffer Pointer of memory reference
* \param[in] len Length of memory reference in bytes
* \param[in] ns_caller From non-secure caller
* \param[in] access Type of access specified by the
* \ref tfm_memory_access_e
*
* \retval IPC_SUCCESS Success
* \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input
* \retval IPC_ERROR_MEMORY_CHECK Check failed
*/
int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller);
int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller,
enum tfm_memory_access_e access);
/* This function should be called before schedule function */
void tfm_spm_init(void);

30
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_client.c
View File

@ -13,25 +13,25 @@
__attribute__((naked))
uint32_t psa_framework_version(void)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_FRAMEWORK_VERSION));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_FRAMEWORK_VERSION));
}
__attribute__((naked))
uint32_t psa_version(uint32_t sid)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_VERSION));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_VERSION));
}
__attribute__((naked))
psa_handle_t psa_connect(uint32_t sid, uint32_t minor_version)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CONNECT));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CONNECT));
}
__attribute__((naked))
@ -41,15 +41,15 @@ psa_status_t psa_call(psa_handle_t handle,
psa_outvec *out_vec,
size_t out_len)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CALL));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CALL));
}
__attribute__((naked))
void psa_close(psa_handle_t handle)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CLOSE));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CLOSE));
}

60
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_service.c
View File

@ -15,25 +15,25 @@ __attribute__((naked))
psa_signal_t psa_wait(psa_signal_t signal_mask, uint32_t timeout)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_WAIT));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_WAIT));
}
__attribute__((naked))
psa_status_t psa_get(psa_signal_t signal, psa_msg_t *msg)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_GET));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_GET));
}
__attribute__((naked))
void psa_set_rhandle(psa_handle_t msg_handle, void *rhandle)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_SET_RHANDLE));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_SET_RHANDLE));
}
__attribute__((naked))
@ -41,56 +41,56 @@ size_t psa_read(psa_handle_t msg_handle, uint32_t invec_idx,
void *buffer, size_t num_bytes)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_READ));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_READ));
}
__attribute__((naked))
size_t psa_skip(psa_handle_t msg_handle, uint32_t invec_idx, size_t num_bytes)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_SKIP));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_SKIP));
}
__attribute__((naked))
void psa_write(psa_handle_t msg_handle, uint32_t outvec_idx,
const void *buffer, size_t num_bytes)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_WRITE));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_WRITE));
}
__attribute__((naked))
void psa_reply(psa_handle_t msg_handle, psa_status_t retval)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_REPLY));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_REPLY));
}
__attribute__((naked))
void psa_notify(int32_t partition_id)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_NOTIFY));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_NOTIFY));
}
__attribute__((naked))
void psa_clear(void)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CLEAR));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_CLEAR));
}
__attribute__((naked))
void psa_eoi(psa_signal_t irq_signal)
{
__ASM("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_EOI));
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_PSA_EOI));
}

10
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_arch_v8m.c
View File

@ -94,7 +94,7 @@ void tfm_initialize_context(struct tfm_state_context *ctx,
#if defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM(
__ASM volatile(
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@ -111,7 +111,7 @@ __attribute__((naked)) void PendSV_Handler(void)
#elif defined(__ARM_ARCH_8M_BASE__)
__attribute__((naked)) void PendSV_Handler(void)
{
__ASM(
__ASM volatile(
"mrs r0, psp \n"
"mrs r1, psplim \n"
"push {r0, r1, r2, lr} \n"
@ -143,14 +143,14 @@ __attribute__((naked)) void PendSV_Handler(void)
/* Reserved for future usage */
__attribute__((naked)) void MemManage_Handler(void)
{
__ASM("b .");
__ASM volatile("b .");
}
__attribute__((naked)) void BusFault_Handler(void)
{
__ASM("b .");
__ASM volatile("b .");
}
__attribute__((naked)) void UsageFault_Handler(void)
{
__ASM("b .");
__ASM volatile("b .");
}

96
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_spm.c
View File

@ -12,6 +12,7 @@
#include "psa_client.h"
#include "psa_service.h"
#include "tfm_utils.h"
#include "platform/include/tfm_spm_hal.h"
#include "spm_api.h"
#include "spm_db.h"
#include "spm_db_setup.h"
@ -460,46 +461,11 @@ static uint32_t tfm_spm_partition_get_priority_ext(uint32_t partition_idx)
partition_priority;
}
/* Macros to pick linker symbols and allow references to sections in all level*/
#define REGION_DECLARE_EXT(a, b, c) extern uint32_t REGION_NAME(a, b, c)
REGION_DECLARE_EXT(Image$$, ARM_LIB_HEAP, $$ZI$$Base);
REGION_DECLARE_EXT(Image$$, ARM_LIB_HEAP, $$ZI$$Limit);
REGION_DECLARE_EXT(Image$$, ER_TFM_DATA, $$ZI$$Base);
REGION_DECLARE_EXT(Image$$, ER_TFM_DATA, $$ZI$$Limit);
REGION_DECLARE_EXT(Image$$, ER_TFM_DATA, $$RW$$Base);
REGION_DECLARE_EXT(Image$$, ER_TFM_DATA, $$RW$$Limit);
REGION_DECLARE_EXT(Image$$, TFM_SECURE_STACK, $$ZI$$Base);
REGION_DECLARE_EXT(Image$$, TFM_SECURE_STACK, $$ZI$$Limit);
REGION_DECLARE_EXT(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
REGION_DECLARE_EXT(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit);
/*
* \brief Check the memory whether in the given range.
*
* \param[in] buffer Pointer of memory reference
* \param[in] len Length of memory reference in bytes
* \param[in] base The base address
* \param[in] limit The limit address, the first byte of next
* area memory
*
* \retval IPC_SUCCESS Success
* \retval IPC_ERROR_MEMORY_CHECK Check failed
*/
static int32_t memory_check_range(const void *buffer, size_t len,
uintptr_t base, uintptr_t limit)
{
if (((uintptr_t)buffer >= base) &&
((uintptr_t)((uint8_t *)buffer + len - 1) < limit)) {
return IPC_SUCCESS;
}
return IPC_ERROR_MEMORY_CHECK;
}
/* FixMe: This is only valid for TFM LVL 1 now */
int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller)
int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller,
enum tfm_memory_access_e access)
{
uintptr_t base, limit;
int32_t err;
/* If len is zero, this indicates an empty buffer and base is ignored */
if (len == 0) {
@ -514,55 +480,13 @@ int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller)
return IPC_ERROR_MEMORY_CHECK;
}
if (ns_caller) {
base = (uintptr_t)NS_DATA_START;
limit = (uintptr_t)(NS_DATA_START + NS_DATA_SIZE);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)NS_CODE_START;
limit = (uintptr_t)(NS_CODE_START + NS_CODE_SIZE);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
if (access == TFM_MEMORY_ACCESS_RW) {
err = tfm_core_has_write_access_to_region(buffer, len, ns_caller);
} else {
base = (uintptr_t)&REGION_NAME(Image$$, ARM_LIB_HEAP, $$ZI$$Base);
limit = (uintptr_t)&REGION_NAME(Image$$, ARM_LIB_HEAP, $$ZI$$Limit);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)&REGION_NAME(Image$$, ER_TFM_DATA, $$RW$$Base);
limit = (uintptr_t)&REGION_NAME(Image$$, ER_TFM_DATA, $$RW$$Limit);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)&REGION_NAME(Image$$, ER_TFM_DATA, $$ZI$$Base);
limit = (uintptr_t)&REGION_NAME(Image$$, ER_TFM_DATA, $$ZI$$Limit);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)&REGION_NAME(Image$$, TFM_SECURE_STACK, $$ZI$$Base);
limit = (uintptr_t)&REGION_NAME(Image$$, TFM_SECURE_STACK, $$ZI$$Limit);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)&REGION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base);
limit = (uintptr_t)&REGION_NAME(Image$$, TFM_UNPRIV_SCRATCH,
$$ZI$$Limit);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
base = (uintptr_t)S_CODE_START;
limit = (uintptr_t)(S_CODE_START + S_CODE_SIZE);
if (memory_check_range(buffer, len, base, limit) == IPC_SUCCESS) {
return IPC_SUCCESS;
}
err = tfm_core_has_read_access_to_region(buffer, len, ns_caller);
}
if (err == 1) {
return IPC_SUCCESS;
}
return IPC_ERROR_MEMORY_CHECK;

57
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_svcalls.c
View File

@ -148,12 +148,16 @@ psa_status_t tfm_svcall_psa_call(uint32_t *args, int32_t ns_caller, uint32_t lr)
* FixMe: From non-secure caller, vec and len are composed into a new
* struct parameter. Need to extract them.
*/
/*
* Read parameters from the arguments. It is a fatal error if the
* memory reference for buffer is invalid or not readable.
*/
if (tfm_memory_check((void *)args[1], sizeof(uint32_t),
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RO) != IPC_SUCCESS) {
tfm_panic();
}
if (tfm_memory_check((void *)args[2], sizeof(uint32_t),
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RO) != IPC_SUCCESS) {
tfm_panic();
}
@ -175,13 +179,22 @@ psa_status_t tfm_svcall_psa_call(uint32_t *args, int32_t ns_caller, uint32_t lr)
tfm_panic();
}
/* It is a fatal error if an invalid memory reference was provide. */
/*
* Read client invecs from the wrap input vector. It is a fatal error
* if the memory reference for the wrap input vector is invalid or not
* readable.
*/
if (tfm_memory_check((void *)inptr, in_num * sizeof(psa_invec),
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RO) != IPC_SUCCESS) {
tfm_panic();
}
/*
* Read client outvecs from the wrap output vector and will update the
* actual length later. It is a fatal error if the memory reference for
* the wrap output vector is invalid or not read-write.
*/
if (tfm_memory_check((void *)outptr, out_num * sizeof(psa_outvec),
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RW) != IPC_SUCCESS) {
tfm_panic();
}
@ -193,18 +206,22 @@ psa_status_t tfm_svcall_psa_call(uint32_t *args, int32_t ns_caller, uint32_t lr)
tfm_memcpy(outvecs, outptr, out_num * sizeof(psa_outvec));
/*
* It is a fatal error if an invalid payload memory reference
* was provided.
* For client input vector, it is a fatal error if the provided payload
* memory reference was invalid or not readable.
*/
for (i = 0; i < in_num; i++) {
if (tfm_memory_check((void *)invecs[i].base, invecs[i].len,
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RO) != IPC_SUCCESS) {
tfm_panic();
}
}
/*
* For client output vector, it is a fatal error if the provided payload
* memory reference was invalid or not read-write.
*/
for (i = 0; i < out_num; i++) {
if (tfm_memory_check(outvecs[i].base, outvecs[i].len,
ns_caller) != IPC_SUCCESS) {
ns_caller, TFM_MEMORY_ACCESS_RW) != IPC_SUCCESS) {
tfm_panic();
}
}
@ -360,11 +377,11 @@ static psa_status_t tfm_svcall_psa_get(uint32_t *args)
}
/*
* It is a fatal error if the input msg pointer is not a valid memory
* reference.
* Write the message to the service buffer. It is a fatal error if the
* input msg pointer is not a valid memory reference or not read-write.
*/
if (tfm_memory_check((void *)msg, sizeof(psa_msg_t),
false) != IPC_SUCCESS) {
false, TFM_MEMORY_ACCESS_RW) != IPC_SUCCESS) {
tfm_panic();
}
@ -517,11 +534,11 @@ static size_t tfm_svcall_psa_read(uint32_t *args)
}
/*
* It is a fatal error if the memory reference for buffer is invalid or
* not writable
* Copy the client data to the service buffer. It is a fatal error
* if the memory reference for buffer is invalid or not read-write.
*/
/* FixMe: write permission check to be added */
if (tfm_memory_check(buffer, num_bytes, false) != IPC_SUCCESS) {
if (tfm_memory_check(buffer, num_bytes, false,
TFM_MEMORY_ACCESS_RW) != IPC_SUCCESS) {
tfm_panic();
}
@ -671,8 +688,12 @@ static void tfm_svcall_psa_write(uint32_t *args)
tfm_panic();
}
/* It is a fatal error if the memory reference for buffer is valid */
if (tfm_memory_check(buffer, num_bytes, false) != IPC_SUCCESS) {
/*
* Copy the service buffer to client outvecs. It is a fatal error
* if the memory reference for buffer is invalid or not readable.
*/
if (tfm_memory_check(buffer, num_bytes, false,
TFM_MEMORY_ACCESS_RO) != IPC_SUCCESS) {
tfm_panic();
}

10
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/secure_utilities.h
View File

@ -51,9 +51,9 @@ struct tfm_exc_stack_t {
#endif
#define LOG_MSG_THR(MSG) \
__ASM("MOV r0, %0\n" \
"SVC %1\n" \
: : "r" (MSG), "I" (TFM_SVC_PRINT))
__ASM volatile("MOV r0, %0\n" \
"SVC %1\n" \
: : "r" (MSG), "I" (TFM_SVC_PRINT))
#define LOG_MSG(MSG) \
do { \
@ -96,14 +96,14 @@ __STATIC_INLINE uint32_t __get_active_exc_num(void)
}
__attribute__ ((always_inline))
__STATIC_INLINE void __set_CONTROL_SPSEL(int32_t SPSEL)
__STATIC_INLINE void __set_CONTROL_SPSEL(uint32_t SPSEL)
{
CONTROL_Type ctrl;
ctrl.w = __get_CONTROL();
ctrl.b.SPSEL = SPSEL;
__set_CONTROL(ctrl.w);
__asm("ISB");
__ISB();
}
#endif /* __SECURE_UTILITIES_H__ */

24
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_boot_data.c
View File

@ -39,9 +39,9 @@ static uint32_t is_boot_data_valid = BOOT_DATA_INVALID;
void tfm_core_validate_boot_data(void)
{
struct shared_data_tlv_header *tlv_header;
struct tfm_boot_data *boot_data;
tlv_header = (struct shared_data_tlv_header *)BOOT_TFM_SHARED_DATA_BASE;
boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE;
/* FixMe: Enhance sanity check of shared memory area, it might be invalid:
* - temporal exposure of RAM to non-secure actors
@ -49,7 +49,7 @@ void tfm_core_validate_boot_data(void)
* - version mismatch between bootloader and runtime binary
* - etc.
*/
if (tlv_header->tlv_magic == SHARED_DATA_TLV_INFO_MAGIC) {
if (boot_data->header.tlv_magic == SHARED_DATA_TLV_INFO_MAGIC) {
is_boot_data_valid = BOOT_DATA_VALID;
}
}
@ -62,7 +62,7 @@ void tfm_core_get_boot_data_handler(uint32_t args[])
uint8_t *ptr;
uint32_t running_partition_idx =
tfm_spm_partition_get_running_partition_idx();
struct shared_data_tlv_header *tlv_header;
struct tfm_boot_data *boot_data;
struct shared_data_tlv_entry tlv_entry;
uintptr_t tlv_end, offset;
uint32_t res;
@ -88,8 +88,8 @@ void tfm_core_get_boot_data_handler(uint32_t args[])
}
/* Get the boundaries of TLV section */
tlv_header = (struct shared_data_tlv_header *)BOOT_TFM_SHARED_DATA_BASE;
tlv_end = BOOT_TFM_SHARED_DATA_BASE + tlv_header->tlv_tot_len;
boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE;
tlv_end = BOOT_TFM_SHARED_DATA_BASE + boot_data->header.tlv_tot_len;
offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE;
/* Add header to output buffer as well */
@ -97,10 +97,10 @@ void tfm_core_get_boot_data_handler(uint32_t args[])
args[0] = TFM_ERROR_INVALID_PARAMETER;
return;
} else {
tlv_header = (struct shared_data_tlv_header *)buf_start;
tlv_header->tlv_magic = SHARED_DATA_TLV_INFO_MAGIC;
tlv_header->tlv_tot_len = SHARED_DATA_HEADER_SIZE;
ptr = (uint8_t *)tlv_header + SHARED_DATA_HEADER_SIZE;
boot_data = (struct tfm_boot_data *)buf_start;
boot_data->header.tlv_magic = SHARED_DATA_TLV_INFO_MAGIC;
boot_data->header.tlv_tot_len = SHARED_DATA_HEADER_SIZE;
ptr = boot_data->data;
}
/* Iterates over the TLV section and copy TLVs with requested major
@ -113,7 +113,7 @@ void tfm_core_get_boot_data_handler(uint32_t args[])
SHARED_DATA_ENTRY_HEADER_SIZE);
if (GET_MAJOR(tlv_entry.tlv_type) == tlv_major) {
/* Check buffer overflow */
if ((ptr - buf_start + tlv_entry.tlv_len) > buf_size) {
if (((ptr - buf_start) + tlv_entry.tlv_len) > buf_size) {
args[0] = TFM_ERROR_INVALID_PARAMETER;
return;
}
@ -121,7 +121,7 @@ void tfm_core_get_boot_data_handler(uint32_t args[])
tfm_memcpy(ptr, (const void *)offset, tlv_entry.tlv_len);
ptr += tlv_entry.tlv_len;
tlv_header->tlv_tot_len += tlv_entry.tlv_len;
boot_data->header.tlv_tot_len += tlv_entry.tlv_len;
}
}
args[0] = TFM_SUCCESS;

42
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -43,8 +43,8 @@ __asm(" .global __ARM_use_no_argv\n");
#ifndef TFM_LVL
#error TFM_LVL is not defined!
#endif
#if (TFM_LVL != 1) && (TFM_LVL != 3)
#error Only TFM_LVL 1 and 3 are supported!
#if (TFM_LVL != 1) && (TFM_LVL != 2) && (TFM_LVL != 3)
#error Only TFM_LVL 1, 2 and 3 are supported!
#endif
/* Macros to pick linker symbols and allow to form the partition data base */
@ -129,6 +129,23 @@ static int32_t tfm_core_set_secure_exception_priorities(void)
/* FixMe: Explicitly set secure fault and Secure SVC priority to highest */
/*
* Set secure PendSV priority to the lowest in SECURE state.
*
* IMPORTANT NOTE:
*
* Although the priority of the secure PendSV must be the lowest possible
* among other interrupts in the Secure state, it must be ensured that
* PendSV is not preempted nor masked by Non-Secure interrupts to ensure
* the integrity of the Secure operation.
* When AIRCR.PRIS is set, the Non-Secure execution can act on
* FAULTMASK_NS, PRIMASK_NS or BASEPRI_NS register to boost its priority
* number up to the value 0x80.
* For this reason, set the priority of the PendSV interrupt to the next
* priority level configurable on the platform, just below 0x80.
*/
NVIC_SetPriority(PendSV_IRQn, (1 << (__NVIC_PRIO_BITS - 1)) - 1);
return TFM_SUCCESS;
}
@ -152,9 +169,13 @@ void tfm_core_spm_request_handler(const struct tfm_exc_stack_t *svc_ctx)
int main(void)
{
tfm_core_init();
if (tfm_core_init() != 0) {
/* Placeholder for error handling, currently ignored. */
}
tfm_spm_db_init();
if (tfm_spm_db_init() != SPM_ERR_OK) {
/* Placeholder for error handling, currently ignored. */
}
tfm_spm_hal_setup_isolation_hw();
@ -171,6 +192,12 @@ int main(void)
*/
}
/*
* Prioritise secure exceptions to avoid NS being able to pre-empt
* secure SVC or SecureFault. Do it before PSA API initialization.
*/
tfm_core_set_secure_exception_priorities();
#ifdef TFM_PSA_API
tfm_spm_init();
#endif
@ -187,10 +214,5 @@ int main(void)
tfm_spm_partition_set_state(TFM_SP_NON_SECURE_ID,
SPM_PARTITION_STATE_RUNNING);
/* Prioritise secure exceptions to avoid NS being able to pre-empt secure
* SVC or SecureFault
*/
tfm_core_set_secure_exception_priorities();
jump_to_ns_code();
}

6
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -8,11 +8,11 @@
#ifndef __TFM_CORE_H__
#define __TFM_CORE_H__
#include "arm_cmse.h"
#include <arm_cmse.h>
#include "tfm_svc.h"
#include "secure_utilities.h"
extern int32_t tfm_scratch_area_size;
extern uint32_t tfm_scratch_area_size;
extern uint8_t *tfm_scratch_area;
#endif /* __TFM_CORE_H__ */

9
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_handler.c
View File

@ -9,7 +9,6 @@
#include <string.h>
#include "secure_utilities.h"
#include "arm_acle.h"
#include "tfm_svc.h"
#include "tfm_secure_api.h"
#include "region_defs.h"
@ -66,9 +65,9 @@ void SecureFault_Handler(void)
/* Only save the context if sp is valid */
if ((sp >= S_DATA_START &&
sp <= S_DATA_LIMIT - sizeof(tfm_fault_context) + 1) ||
sp <= (S_DATA_LIMIT - sizeof(tfm_fault_context)) + 1) ||
(sp >= NS_DATA_START &&
sp <= NS_DATA_LIMIT - sizeof(tfm_fault_context) + 1)) {
sp <= (NS_DATA_LIMIT - sizeof(tfm_fault_context)) + 1)) {
tfm_memcpy(&tfm_fault_context,
(const void *)sp,
sizeof(tfm_fault_context));
@ -103,7 +102,7 @@ void HardFault_Handler(void)
#if defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) void SVC_Handler(void)
{
__ASM(
__ASM volatile(
"TST lr, #4\n" /* Check store SP in thread mode to r0 */
"IT EQ\n"
"BXEQ lr\n"
@ -116,7 +115,7 @@ __attribute__((naked)) void SVC_Handler(void)
#elif defined(__ARM_ARCH_8M_BASE__)
__attribute__((naked)) void SVC_Handler(void)
{
__ASM(
__ASM volatile(
".syntax unified\n"
"MOVS r0, #4\n" /* Check store SP in thread mode to r0 */
"MOV r1, lr\n"

4
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_internal.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, Arm Limited. All rights reserved.
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -35,7 +35,7 @@ void jump_to_ns_code(void);
* \brief Called if veneer is running in thread mode
*/
uint32_t tfm_core_partition_request_svc_handler(
uint32_t *svc_args, uint32_t lr);
const uint32_t *svc_args, uint32_t lr);
/**
* \brief Called when secure service returns

4
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, Arm Limited. All rights reserved.
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -121,7 +121,7 @@ TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module)
}
/* TZ_MemoryId_t must be a positive integer */
tz_id = free_index + 1;
tz_id = (TZ_MemoryId_t)free_index + 1;
NsClientIdList[free_index].ns_client_id = get_next_ns_client_id();
#ifdef PRINT_NSPM_DEBUG
printf("TZ_AllocModuleContext_S called, returning id %d\r\n",

22
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_psa_api_client.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, Arm Limited. All rights reserved.
* Copyright (c) 2018-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -43,14 +43,20 @@ int32_t tfm_psa_veneer_sanity_check(struct tfm_sfn_req_s *desc_ptr)
return tfm_core_ns_ipc_request(fn, (int32_t)a, (int32_t)b, \
(int32_t)c, (int32_t)d)
__attribute__ ((naked))
static int32_t tfm_core_ipc_request(const struct tfm_sfn_req_s *desc_ptr)
{
__ASM volatile("SVC %0 \n"
"BX LR \n"
: : "I" (TFM_SVC_IPC_REQUEST));
}
__attribute__ ((always_inline)) __STATIC_INLINE
int32_t tfm_core_ns_ipc_request(void *fn, int32_t arg1, int32_t arg2,
int32_t arg3, int32_t arg4)
{
int32_t args[4] = {arg1, arg2, arg3, arg4};
volatile struct tfm_sfn_req_s desc;
struct tfm_sfn_req_s *desc_ptr = &desc;
int32_t res;
struct tfm_sfn_req_s desc = {0};
desc.sfn = fn;
desc.args = args;
@ -61,13 +67,7 @@ int32_t tfm_core_ns_ipc_request(void *fn, int32_t arg1, int32_t arg2,
/* FIXME: Proper error handling to be implemented */
return TFM_ERROR_INVALID_EXC_MODE;
} else {
__ASM("MOV r0, %1\n"
"SVC %2\n"
"MOV %0, r0\n"
: "=r" (res)
: "r" (desc_ptr), "I" (TFM_SVC_IPC_REQUEST)
: "r0");
return res;
return tfm_core_ipc_request(&desc);
}
}

131
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.c
View File

@ -50,17 +50,17 @@ static int32_t is_iovec_api_call(void)
return curr_part_data->iovec_api;
}
static int32_t *prepare_partition_ctx(
struct tfm_exc_stack_t *svc_ctx,
struct tfm_sfn_req_s *desc_ptr,
int32_t *dst)
static uint32_t *prepare_partition_ctx(
const struct tfm_exc_stack_t *svc_ctx,
const struct tfm_sfn_req_s *desc_ptr,
uint32_t *dst)
{
/* XPSR = as was when called, but make sure it's thread mode */
*(--dst) = svc_ctx->XPSR & 0xFFFFFE00;
*(--dst) = svc_ctx->XPSR & 0xFFFFFE00U;
/* ReturnAddress = resume veneer in new context */
*(--dst) = svc_ctx->RetAddr;
/* LR = sfn address */
*(--dst) = (int32_t)desc_ptr->sfn;
*(--dst) = (uint32_t)desc_ptr->sfn;
/* R12 = don't care */
*(--dst) = 0;
@ -74,20 +74,20 @@ static int32_t *prepare_partition_ctx(
return dst;
}
static int32_t *prepare_partition_iovec_ctx(
struct tfm_exc_stack_t *svc_ctx,
struct tfm_sfn_req_s *desc_ptr,
struct iovec_args_t *iovec_args,
int32_t *dst)
static uint32_t *prepare_partition_iovec_ctx(
const struct tfm_exc_stack_t *svc_ctx,
const struct tfm_sfn_req_s *desc_ptr,
const struct iovec_args_t *iovec_args,
uint32_t *dst)
{
/* XPSR = as was when called, but make sure it's thread mode */
*(--dst) = svc_ctx->XPSR & 0xFFFFFE00;
*(--dst) = svc_ctx->XPSR & 0xFFFFFE00U;
/* ReturnAddress = resume veneer in new context */
*(--dst) = svc_ctx->RetAddr;
/* LR = sfn address */
*(--dst) = (int32_t)desc_ptr->sfn;
*(--dst) = (uint32_t)desc_ptr->sfn;
/* R12 = don't care */
*(--dst) = 0;
*(--dst) = 0U;
/* R0-R3 = sfn arguments */
*(--dst) = iovec_args->out_len;
@ -99,7 +99,7 @@ static int32_t *prepare_partition_iovec_ctx(
}
static void restore_caller_ctx(
struct tfm_exc_stack_t *svc_ctx,
const struct tfm_exc_stack_t *svc_ctx,
struct tfm_exc_stack_t *target_ctx)
{
/* ReturnAddress = resume veneer after second SVC */
@ -157,7 +157,7 @@ static int32_t check_address_range(const void *p, size_t s,
*
* \return 1 if the partition has access to the memory range, 0 otherwise.
*/
static int32_t has_access_to_region(const void *p, size_t s, uint32_t flags)
static int32_t has_access_to_region(const void *p, size_t s, int flags)
{
int32_t range_access_allowed_by_mpu;
@ -192,22 +192,10 @@ static int32_t has_access_to_region(const void *p, size_t s, uint32_t flags)
check_address_range(p, s, NS_DATA_START, NS_DATA_LIMIT+1-NS_DATA_START);
}
/**
* \brief Check whether the current partition has read access to a memory range
*
* This function assumes, that the current MPU configuration is set for the
* partition to be checked.
*
* \param[in] p The start address of the range to check
* \param[in] s The size of the range to check
* \param[in] ns_caller Whether the current partition is a non-secure one
*
* \return 1 if the partition has access to the memory range, 0 otherwise.
*/
static int32_t has_read_access_to_region(const void *p, size_t s,
int32_t ns_caller)
int32_t tfm_core_has_read_access_to_region(const void *p, size_t s,
uint32_t ns_caller)
{
uint32_t flags = CMSE_MPU_UNPRIV|CMSE_MPU_READ;
int flags = CMSE_MPU_UNPRIV|CMSE_MPU_READ;
if (ns_caller) {
flags |= CMSE_NONSECURE;
@ -216,21 +204,10 @@ static int32_t has_read_access_to_region(const void *p, size_t s,
return has_access_to_region(p, s, flags);
}
/**
* \brief Check whether the current partition has write access to a memory range
*
* This function assumes, that the current MPU configuration is set for the
* partition to be checked.
*
* \param[in] p The start address of the range to check
* \param[in] s The size of the range to check
* \param[in] ns_caller Whether the current partition is a non-secure one
*
* \return 1 if the partition has access to the memory range, 0 otherwise.
*/
static int32_t has_write_access_to_region(void *p, size_t s, int32_t ns_caller)
int32_t tfm_core_has_write_access_to_region(void *p, size_t s,
uint32_t ns_caller)
{
uint32_t flags = CMSE_MPU_UNPRIV|CMSE_MPU_READWRITE;
int flags = CMSE_MPU_UNPRIV|CMSE_MPU_READWRITE;
if (ns_caller) {
flags |= CMSE_NONSECURE;
@ -247,15 +224,23 @@ static int32_t has_write_access_to_region(void *p, size_t s, int32_t ns_caller)
* \return Return /ref TFM_SUCCESS if the iovec parameters are valid, error code
* otherwise as in /ref tfm_status_e
*/
static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
static int32_t tfm_core_check_sfn_parameters(
const struct tfm_sfn_req_s *desc_ptr)
{
struct psa_invec *in_vec = (psa_invec *)desc_ptr->args[0];
size_t in_len = desc_ptr->args[1];
size_t in_len;
struct psa_outvec *out_vec = (psa_outvec *)desc_ptr->args[2];
size_t out_len = desc_ptr->args[3];
size_t out_len;
uint32_t i;
if ((desc_ptr->args[1] < 0) || (desc_ptr->args[3] < 0)) {
return TFM_ERROR_INVALID_PARAMETER;
}
in_len = (size_t)(desc_ptr->args[1]);
out_len = (size_t)(desc_ptr->args[3]);
/* The number of vectors are within range. Extra checks to avoid overflow */
if ((in_len > PSA_MAX_IOVEC) || (out_len > PSA_MAX_IOVEC) ||
(in_len + out_len > PSA_MAX_IOVEC)) {
@ -267,8 +252,9 @@ static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
*/
if (in_len > 0) {
if ((in_vec == NULL) ||
(has_write_access_to_region(in_vec, sizeof(psa_invec)*in_len,
desc_ptr->ns_caller) != 1)) {
(tfm_core_has_write_access_to_region(in_vec,
sizeof(psa_invec)*in_len,
desc_ptr->ns_caller) != 1)) {
return TFM_ERROR_INVALID_PARAMETER;
}
} else {
@ -278,8 +264,9 @@ static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
}
if (out_len > 0) {
if ((out_vec == NULL) ||
(has_write_access_to_region(out_vec, sizeof(psa_outvec)*out_len,
desc_ptr->ns_caller) != 1)) {
(tfm_core_has_write_access_to_region(out_vec,
sizeof(psa_outvec)*out_len,
desc_ptr->ns_caller) != 1)) {
return TFM_ERROR_INVALID_PARAMETER;
}
} else {
@ -294,8 +281,9 @@ static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
for (i = 0; i < in_len; ++i) {
if (in_vec[i].len > 0) {
if ((in_vec[i].base == NULL) ||
(has_read_access_to_region(in_vec[i].base, in_vec[i].len,
desc_ptr->ns_caller) != 1)) {
(tfm_core_has_read_access_to_region(in_vec[i].base,
in_vec[i].len,
desc_ptr->ns_caller) != 1)) {
return TFM_ERROR_INVALID_PARAMETER;
}
}
@ -303,8 +291,9 @@ static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
for (i = 0; i < out_len; ++i) {
if (out_vec[i].len > 0) {
if ((out_vec[i].base == NULL) ||
(has_write_access_to_region(out_vec[i].base, out_vec[i].len,
desc_ptr->ns_caller) != 1)) {
(tfm_core_has_write_access_to_region(out_vec[i].base,
out_vec[i].len,
desc_ptr->ns_caller) != 1)) {
return TFM_ERROR_INVALID_PARAMETER;
}
}
@ -316,7 +305,7 @@ static int32_t tfm_core_check_sfn_parameters(struct tfm_sfn_req_s *desc_ptr)
static void tfm_copy_iovec_parameters(struct iovec_args_t *target,
const struct iovec_args_t *source)
{
int i;
size_t i;
target->in_len = source->in_len;
for (i = 0; i < source->in_len; ++i) {
@ -346,7 +335,7 @@ static void tfm_clear_iovec_parameters(struct iovec_args_t *args)
}
}
static int32_t tfm_start_partition(struct tfm_sfn_req_s *desc_ptr,
static int32_t tfm_start_partition(const struct tfm_sfn_req_s *desc_ptr,
uint32_t excReturn)
{
uint32_t caller_partition_idx = desc_ptr->caller_part_idx;
@ -479,18 +468,21 @@ static int32_t tfm_start_partition(struct tfm_sfn_req_s *desc_ptr,
iovec_args = (struct iovec_args_t *)
((uint32_t)&REGION_NAME(Image$$, TFM_SECURE_STACK, $$ZI$$Limit)-
sizeof(struct iovec_args_t));
tfm_spm_partition_set_iovec(partition_idx, desc_ptr->args);
if (tfm_spm_partition_set_iovec(partition_idx, desc_ptr->args) !=
SPM_ERR_OK) {
return TFM_ERROR_GENERIC;
}
tfm_copy_iovec_parameters(iovec_args,
&(curr_part_data->iovec_args));
/* Prepare the partition context, update stack ptr */
psp = (uint32_t)prepare_partition_iovec_ctx(svc_ctx, desc_ptr,
iovec_args,
(int32_t *)partition_psp);
(uint32_t *)partition_psp);
} else {
/* Prepare the partition context, update stack ptr */
psp = (uint32_t)prepare_partition_ctx(svc_ctx, desc_ptr,
(int32_t *)partition_psp);
(uint32_t *)partition_psp);
}
__set_PSP(psp);
__set_PSPLIM(partition_psplim);
@ -505,17 +497,20 @@ static int32_t tfm_start_partition(struct tfm_sfn_req_s *desc_ptr,
iovec_args =
(struct iovec_args_t *)(tfm_spm_partition_get_stack_top(partition_idx) -
sizeof(struct iovec_args_t));
tfm_spm_partition_set_iovec(partition_idx, desc_ptr->args);
if (tfm_spm_partition_set_iovec(partition_idx, desc_ptr->args) !=
SPM_ERR_OK) {
return TFM_ERROR_GENERIC;
}
tfm_copy_iovec_parameters(iovec_args, &(curr_part_data->iovec_args));
/* Prepare the partition context, update stack ptr */
psp = (uint32_t)prepare_partition_iovec_ctx(svc_ctx, desc_ptr,
iovec_args,
(int32_t *)partition_psp);
(uint32_t *)partition_psp);
} else {
/* Prepare the partition context, update stack ptr */
psp = (uint32_t)prepare_partition_ctx(svc_ctx, desc_ptr,
(int32_t *)partition_psp);
(uint32_t *)partition_psp);
}
__set_PSP(psp);
__set_PSPLIM(partition_psplim);
@ -538,7 +533,7 @@ static int32_t tfm_return_from_partition(uint32_t *excReturn)
uint32_t return_partition_idx;
uint32_t return_partition_flags;
uint32_t psp = __get_PSP();
int i;
size_t i;
struct tfm_exc_stack_t *svc_ctx = (struct tfm_exc_stack_t *)psp;
struct iovec_args_t *iovec_args;
@ -676,7 +671,7 @@ void tfm_secure_api_error_handler(void)
}
}
static int32_t tfm_check_sfn_req_integrity(struct tfm_sfn_req_s *desc_ptr)
static int32_t tfm_check_sfn_req_integrity(const struct tfm_sfn_req_s *desc_ptr)
{
if ((desc_ptr == NULL) ||
(desc_ptr->sp_id == 0) ||
@ -688,7 +683,7 @@ static int32_t tfm_check_sfn_req_integrity(struct tfm_sfn_req_s *desc_ptr)
}
static int32_t tfm_core_check_sfn_req_rules(
struct tfm_sfn_req_s *desc_ptr)
const struct tfm_sfn_req_s *desc_ptr)
{
/* Check partition idx validity */
if (desc_ptr->caller_part_idx == SPM_INVALID_PARTITION_IDX) {
@ -1046,7 +1041,7 @@ void tfm_core_memory_permission_check_handler(uint32_t *svc_args)
/* This SVC handler is called if veneer is running in thread mode */
uint32_t tfm_core_partition_request_svc_handler(
struct tfm_exc_stack_t *svc_ctx, uint32_t excReturn)
const struct tfm_exc_stack_t *svc_ctx, uint32_t excReturn)
{
struct tfm_sfn_req_s *desc_ptr;

68
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -8,11 +8,12 @@
#ifndef __TFM_SECURE_API_H__
#define __TFM_SECURE_API_H__
#include "arm_cmse.h"
#include <arm_cmse.h>
#include "tfm_svc.h"
#include "secure_utilities.h"
#include "tfm_core.h"
#include "tfm_api.h"
#include "bl2/include/tfm_boot_status.h"
/*!
* \def __tfm_secure_gateway_attributes__
@ -46,7 +47,7 @@ struct tfm_sfn_req_s {
int32_t *args;
uint32_t caller_part_idx;
int32_t iovec_api;
int32_t ns_caller : 1;
uint32_t ns_caller;
};
enum tfm_buffer_share_region_e {
@ -81,13 +82,44 @@ extern int32_t tfm_core_memory_permission_check(const void *ptr,
uint32_t size,
int32_t access);
extern int32_t tfm_core_get_boot_data(uint8_t major_type, void *ptr,
extern int32_t tfm_core_get_boot_data(uint8_t major_type,
struct tfm_boot_data *boot_data,
uint32_t len);
int32_t tfm_core_sfn_request(struct tfm_sfn_req_s *desc_ptr);
int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr);
int32_t tfm_core_sfn_request_thread_mode(struct tfm_sfn_req_s *desc_ptr);
/**
* \brief Check whether the current partition has read access to a memory range
*
* This function assumes, that the current MPU configuration is set for the
* partition to be checked.
*
* \param[in] p The start address of the range to check
* \param[in] s The size of the range to check
* \param[in] ns_caller Whether the current partition is a non-secure one
*
* \return 1 if the partition has access to the memory range, 0 otherwise.
*/
int32_t tfm_core_has_read_access_to_region(const void *p, size_t s,
uint32_t ns_caller);
/**
* \brief Check whether the current partition has write access to a memory range
*
* This function assumes, that the current MPU configuration is set for the
* partition to be checked.
*
* \param[in] p The start address of the range to check
* \param[in] s The size of the range to check
* \param[in] ns_caller Whether the current partition is a non-secure one
*
* \return 1 if the partition has access to the memory range, 0 otherwise.
*/
int32_t tfm_core_has_write_access_to_region(void *p, size_t s,
uint32_t ns_caller);
#define TFM_CORE_IOVEC_SFN_REQUEST(id, fn, a, b, c, d) \
return tfm_core_partition_request(id, fn, TFM_SFN_API_IOVEC, \
(int32_t)a, (int32_t)b, (int32_t)c, (int32_t)d)
@ -106,7 +138,31 @@ int32_t tfm_core_partition_request(uint32_t id, void *fn, int32_t iovec_api,
desc.sp_id = id;
desc.sfn = fn;
desc.args = args;
desc.ns_caller = cmse_nonsecure_caller();
/*
* This preprocessor condition checks if a version of GCC smaller than
* 7.3.1 is being used to compile the code.
* These versions are affected by a bug on the cmse_nonsecure_caller
* intrinsic which returns incorrect results.
* Please check Bug 85203 on GCC Bugzilla for more information.
*/
#if defined(__GNUC__) && !defined(__ARMCC_VERSION) && \
(__GNUC__ < 7 || \
(__GNUC__ == 7 && (__GNUC_MINOR__ < 3 || \
(__GNUC_MINOR__ == 3 && __GNUC_PATCHLEVEL__ < 1))))
/*
* Use the fact that, if called from Non-Secure, the LSB of the return
* address is set to 0.
*/
desc.ns_caller = (uint32_t)!(
(intptr_t)__builtin_extract_return_addr(__builtin_return_address(0U))
& 1);
#else
/*
* Convert the result of cmse_nonsecure_caller from an int to a uint32_t
* to prevent using an int in the tfm_sfn_req_s structure.
*/
desc.ns_caller = (cmse_nonsecure_caller() != 0) ? 1U : 0U;
#endif /* Check for GCC compiler version smaller than 7.3.1 */
desc.iovec_api = iovec_api;
if (__get_active_exc_num() != EXC_NUM_THREAD_MODE) {
/* FixMe: Error severity TBD */

30
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_spm_services.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -13,7 +13,7 @@
#include "secure_fw/include/tfm_spm_services_api.h"
uint8_t *tfm_scratch_area;
int32_t tfm_scratch_area_size;
uint32_t tfm_scratch_area_size;
nsfptr_t ns_entry;
void jump_to_ns_code(void)
@ -36,9 +36,9 @@ void jump_to_ns_code(void)
#if defined(__ARM_ARCH_8M_MAIN__)
__attribute__((naked)) int32_t tfm_core_sfn_request(
struct tfm_sfn_req_s *desc_ptr)
const struct tfm_sfn_req_s *desc_ptr)
{
__ASM(
__ASM volatile(
"PUSH {r4-r12, lr}\n"
"SVC %[SVC_REQ]\n"
"MOV r4, #0\n"
@ -58,9 +58,9 @@ __attribute__((naked)) int32_t tfm_core_sfn_request(
}
#elif defined(__ARM_ARCH_8M_BASE__)
__attribute__((naked)) int32_t tfm_core_sfn_request(
struct tfm_sfn_req_s *desc_ptr)
const struct tfm_sfn_req_s *desc_ptr)
{
__ASM(
__ASM volatile(
".syntax unified\n"
"PUSH {lr}\n"
"PUSH {r4-r7}\n"
@ -104,7 +104,7 @@ int32_t tfm_core_memory_permission_check(const void *ptr,
uint32_t len,
int32_t access)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_MEMORY_CHECK));
@ -113,7 +113,7 @@ int32_t tfm_core_memory_permission_check(const void *ptr,
__attribute__((naked))
int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX LR\n"
: : "I" (TFM_SVC_GET_CALLER_CLIENT_ID));
@ -122,7 +122,7 @@ int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id)
__attribute__((naked))
int32_t tfm_spm_request_reset_vote(void)
{
__ASM(
__ASM volatile(
"MOVS R0, %0\n"
"B tfm_spm_request\n"
: : "I" (TFM_SPM_REQUEST_RESET_VOTE));
@ -131,7 +131,7 @@ int32_t tfm_spm_request_reset_vote(void)
__attribute__((naked))
int32_t tfm_spm_request(void)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_SPM_REQUEST));
@ -140,7 +140,7 @@ int32_t tfm_spm_request(void)
__attribute__((naked))
int32_t tfm_core_validate_secure_caller(void)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_VALIDATE_SECURE_CALLER));
@ -149,16 +149,18 @@ int32_t tfm_core_validate_secure_caller(void)
__attribute__((naked))
int32_t tfm_core_set_buffer_area(enum tfm_buffer_share_region_e share)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_SET_SHARE_AREA));
}
__attribute__((naked))
int32_t tfm_core_get_boot_data(uint8_t major_type, void *ptr, uint32_t len)
int32_t tfm_core_get_boot_data(uint8_t major_type,
struct tfm_boot_data *boot_status,
uint32_t len)
{
__ASM(
__ASM volatile(
"SVC %0\n"
"BX lr\n"
: : "I" (TFM_SVC_GET_BOOT_DATA));

4
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_svc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -43,6 +43,6 @@ typedef enum {
#endif
} tfm_svc_number_t;
#define SVC(code) __ASM("svc %0" : : "I" (code))
#define SVC(code) __ASM volatile("svc %0" : : "I" (code))
#endif /* __TFM_SVC_H__ */

59
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.c
View File

@ -33,7 +33,7 @@ typedef enum {
* returned.
*/
static void tfm_spm_partition_err_handler(
struct spm_partition_desc_t *partition,
const struct spm_partition_desc_t *partition,
sp_error_type_t err_type,
int32_t err_code)
{
@ -42,17 +42,32 @@ static void tfm_spm_partition_err_handler(
printf("Partition init failed for partition id 0x%08X\r\n",
partition->static_data.partition_id);
} else {
printf("Unknown partition error %d for partition id 0x%08X\r\n",
err_type, partition->static_data.partition_id);
printf(
"Unknown partition error %d (code: %d) for partition id 0x%08X\r\n",
err_type, err_code, partition->static_data.partition_id);
}
#else
(void)err_type;
(void)err_code;
#endif
tfm_spm_partition_set_state(partition->static_data.partition_id,
SPM_PARTITION_STATE_CLOSED);
}
/*
* This function prevents name clashes between the variable names accessibles in
* the scope of where tfm_partition_list.inc is included and the varaible names
* defined inside tfm_partition_list.inc file.
*/
static inline enum spm_err_t add_user_defined_partitions(void) {
#include "tfm_partition_list.inc"
return SPM_ERR_OK;
}
uint32_t get_partition_idx(uint32_t partition_id)
{
int i;
uint32_t i;
if (partition_id == INVALID_PARTITION_ID) {
return SPM_INVALID_PARTITION_IDX;
@ -70,8 +85,9 @@ uint32_t get_partition_idx(uint32_t partition_id)
enum spm_err_t tfm_spm_db_init(void)
{
struct spm_partition_desc_t *part_ptr;
enum spm_err_t err;
tfm_memset (&g_spm_partition_db, 0, sizeof(g_spm_partition_db));
(void)tfm_memset (&g_spm_partition_db, 0, sizeof(g_spm_partition_db));
/* This function initialises partition db */
g_spm_partition_db.running_partition_idx = SPM_INVALID_PARTITION_IDX;
@ -82,12 +98,11 @@ enum spm_err_t tfm_spm_db_init(void)
*/
/* For the non secure Execution environment */
#if TFM_LVL != 1
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit[];
uint32_t psp_stack_bottom = (uint32_t)Image$$ARM_LIB_STACK$$ZI$$Base;
uint32_t psp_stack_top = (uint32_t)Image$$ARM_LIB_STACK$$ZI$$Limit;
#endif
if (g_spm_partition_db.partition_count >= SPM_MAX_PARTITIONS) {
return SPM_ERR_INVALID_CONFIG;
}
@ -103,6 +118,9 @@ enum spm_err_t tfm_spm_db_init(void)
* RW start address to psp_stack_bottom to get RW access to stack
*/
part_ptr->memory_data.rw_start = psp_stack_bottom;
#else
part_ptr->stack_limit = psp_stack_bottom;
part_ptr->stack_size = psp_stack_top - psp_stack_bottom;
#endif
part_ptr->runtime_data.partition_state = SPM_PARTITION_STATE_UNINIT;
@ -121,8 +139,10 @@ enum spm_err_t tfm_spm_db_init(void)
part_ptr->runtime_data.partition_state = SPM_PARTITION_STATE_UNINIT;
++g_spm_partition_db.partition_count;
/* Add user-defined secure partitions */
#include "tfm_partition_list.inc"
err = add_user_defined_partitions();
if (err != SPM_ERR_OK) {
return err;
}
g_spm_partition_db.is_init = 1;
@ -154,7 +174,7 @@ enum spm_err_t tfm_spm_partition_init(void)
int32_t res;
desc.args = args;
desc.ns_caller = 0;
desc.ns_caller = 0U;
desc.iovec_api = TFM_SFN_API_IOVEC;
desc.sfn = (sfn_t)part->static_data.partition_init;
desc.sp_id = part->static_data.partition_id;
@ -314,20 +334,25 @@ enum spm_err_t tfm_spm_partition_set_share(uint32_t partition_idx,
return ret;
}
void tfm_spm_partition_set_iovec(uint32_t partition_idx, int32_t *args)
enum spm_err_t tfm_spm_partition_set_iovec(uint32_t partition_idx,
const int32_t *args)
{
struct spm_partition_runtime_data_t *runtime_data =
&g_spm_partition_db.partitions[partition_idx].runtime_data;
int32_t i;
size_t i;
runtime_data->iovec_args.in_len = args[1];
for (i = 0; i < runtime_data->iovec_args.in_len; ++i) {
if ((args[1] < 0) || (args[3] < 0)) {
return SPM_ERR_INVALID_PARAMETER;
}
runtime_data->iovec_args.in_len = (size_t)args[1];
for (i = 0U; i < runtime_data->iovec_args.in_len; ++i) {
runtime_data->iovec_args.in_vec[i].base =
((psa_invec *)args[0])[i].base;
runtime_data->iovec_args.in_vec[i].len = ((psa_invec *)args[0])[i].len;
}
runtime_data->iovec_args.out_len = args[3];
for (i = 0; i < runtime_data->iovec_args.out_len; ++i) {
runtime_data->iovec_args.out_len = (size_t)args[3];
for (i = 0U; i < runtime_data->iovec_args.out_len; ++i) {
runtime_data->iovec_args.out_vec[i].base =
((psa_outvec *)args[2])[i].base;
runtime_data->iovec_args.out_vec[i].len =
@ -335,6 +360,8 @@ void tfm_spm_partition_set_iovec(uint32_t partition_idx, int32_t *args)
}
runtime_data->orig_outvec = (psa_outvec *)args[2];
runtime_data->iovec_api = 1;
return SPM_ERR_OK;
}
uint32_t tfm_spm_partition_get_running_partition_idx(void)

6
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.h
View File

@ -20,6 +20,7 @@ enum spm_err_t {
SPM_ERR_PARTITION_DB_NOT_INIT,
SPM_ERR_PARTITION_ALREADY_ACTIVE,
SPM_ERR_PARTITION_NOT_AVAILABLE,
SPM_ERR_INVALID_PARAMETER,
SPM_ERR_INVALID_CONFIG,
};
@ -297,11 +298,14 @@ enum spm_err_t tfm_spm_partition_set_share(uint32_t partition_idx,
* args[2] is out_vec
* args[3] is out_len
*
* \return Error code \ref spm_err_t
*
* \note This function doesn't check if partition_idx is valid.
* \note This function assumes that the iovecs that are passed in args are
* valid, and does no sanity check on them at all.
*/
void tfm_spm_partition_set_iovec(uint32_t partition_idx, int32_t *args);
enum spm_err_t tfm_spm_partition_set_iovec(uint32_t partition_idx,
const int32_t *args);
/**
* \brief Initialize partition database

2
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db.h
View File

@ -21,7 +21,7 @@ typedef psa_status_t(*sp_init_function)(void);
#define TFM_PARTITION_TYPE_APP "APPLICATION-ROT"
#define TFM_PARTITION_TYPE_PSA "PSA-ROT"
#define TFM_STACK_SIZE 1024
#define TFM_STACK_SIZE (1024 * 5)
#ifdef TFM_PSA_API
enum tfm_partition_priority {

26
components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db_setup.h
View File

@ -115,21 +115,21 @@ struct spm_partition_db_t {
++g_spm_partition_db.partition_count; \
} while (0)
#define PARTITION_ADD_INIT_FUNC(partition, init_func) \
do { \
extern int32_t init_func(void); \
uint32_t partition_idx = get_partition_idx(partition##_ID); \
struct spm_partition_desc_t *part_ptr = \
&(g_spm_partition_db.partitions[partition_idx]); \
part_ptr->static_data.partition_init = init_func; \
#define PARTITION_ADD_INIT_FUNC(partition, init_func) \
do { \
extern int32_t init_func(void); \
uint32_t partition_idx = get_partition_idx(partition##_ID); \
struct spm_partition_desc_t *part_ptr = \
&(g_spm_partition_db.partitions[partition_idx]); \
part_ptr->static_data.partition_init = init_func; \
} while (0)
#define PARTITION_ADD_PERIPHERAL(partition, peripheral) \
do { \
uint32_t partition_idx = get_partition_idx(partition##_ID); \
struct spm_partition_desc_t *part_ptr = \
&(g_spm_partition_db.partitions[partition_idx]); \
part_ptr->platform_data = peripheral; \
#define PARTITION_ADD_PERIPHERAL(partition, peripheral) \
do { \
uint32_t partition_idx = get_partition_idx(partition##_ID); \
struct spm_partition_desc_t *part_ptr = \
&(g_spm_partition_db.partitions[partition_idx]); \
part_ptr->platform_data = peripheral; \
} while (0)
#endif /* __SPM_DB_SETUP_H__ */

5
components/TARGET_PSA/TARGET_TFM/interface/include/tfm_ns_lock.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -12,6 +12,7 @@ extern "C" {
#endif
#include <stdint.h>
#include "tfm_api.h"
typedef int32_t (*veneer_fn) (uint32_t arg0, uint32_t arg1,
uint32_t arg2, uint32_t arg3);
@ -32,7 +33,7 @@ uint32_t tfm_ns_lock_dispatch(veneer_fn fn,
* \details Needs to be called during non-secure app init
* to initialize the TFM NS lock object
*/
uint32_t tfm_ns_lock_init();
enum tfm_status_e tfm_ns_lock_init();
#ifdef __cplusplus
}

6
components/TARGET_PSA/TARGET_TFM/interface/include/tfm_ns_svc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, Arm Limited. All rights reserved.
* Copyright (c) 2017-2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*
@ -24,7 +24,7 @@ extern "C" {
* \brief Macro to encode an svc instruction
*
*/
#define SVC(code) __ASM("svc %0" : : "I" (code))
#define SVC(code) __ASM volatile("svc %0" : : "I" (code))
/**
* \def LIST_SVC_NSPM
@ -59,7 +59,7 @@ enum tfm_svc_num {
};
/* number of user SVC functions */
#define USER_SVC_COUNT (SVC_TFM_MAX - 1)
#define USER_SVC_COUNT ((uint32_t)SVC_TFM_MAX - 1)
#ifdef __cplusplus
}

69
components/TARGET_PSA/inc/psa_manifest/sid.h
View File

@ -1,4 +1,4 @@
/* Copyright (c) 2019 ARM Limited
/* Copyright (c) 2017-2018 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
@ -15,68 +15,9 @@
* limitations under the License.
*/
/*********** WARNING: This is an auto-generated file. Do not edit! ***********/
#ifndef __SID_H__
#define __SID_H__
/******** ATTEST_SRV ********/
#define PSA_ATTEST_GET_TOKEN_ID 0x00000F10
#define PSA_ATTEST_GET_TOKEN_SIZE_ID 0x00000F11
#define PSA_ATTEST_INJECT_KEY_ID 0x00000F12
/******** CRYPTO_SRV ********/
#define PSA_CRYPTO_INIT_ID 0x00000F00
#define PSA_MAC_ID 0x00000F01
#define PSA_HASH_ID 0x00000F02
#define PSA_ASYMMETRIC_ID 0x00000F03
#define PSA_SYMMETRIC_ID 0x00000F04
#define PSA_AEAD_ID 0x00000F05
#define PSA_KEY_MNG_ID 0x00000F06
#define PSA_RNG_ID 0x00000F07
#define PSA_CRYPTO_FREE_ID 0x00000F08
#define PSA_GENERATOR_ID 0x00000F09
#define PSA_ENTROPY_ID 0x00000F0A
/******** PLATFORM ********/
#define PSA_PLATFORM_LC_GET 0x00011000
#define PSA_PLATFORM_LC_SET 0x00011001
#define PSA_PLATFORM_SYSTEM_RESET 0x00011002
/******** ITS ********/
#define PSA_ITS_GET 0x00011A00
#define PSA_ITS_SET 0x00011A01
#define PSA_ITS_INFO 0x00011A02
#define PSA_ITS_REMOVE 0x00011A03
#define PSA_ITS_RESET 0x00011A04
/******** CRYPTO_ACL_TEST ********/
#define CRYPTO_CREATE_PERSISTENT_KEY 0x00000200
#define CRYPTO_GENERATE_KEY 0x00000201
#define CRYPTO_OPEN_PERSISTENT_KEY 0x00000202
#define CRYPTO_CLOSE_KEY 0x00000203
#define CRYPTO_SET_KEY_POLICY 0x00000204
#define CRYPTO_DESTROY_KEY 0x00000205
#define CRYPTO_GET_KEY_INFO 0x00000206
#define CRYPTO_GET_KEY_POLICY 0x00000207
#define CRYPTO_IMPORT_KEY 0x00000208
/******** CLIENT_TESTS_PART1 ********/
#define CLIENT_TESTS_PART1_ROT_SRV1 0x00001A05
#define CLIENT_TESTS_PART1_DROP_CONN 0x00001A06
#define CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY 0x00001A07
/******** SERVER_TESTS_PART1 ********/
#define SERVER_TESTS_PART1_CONTROL 0x00001A01
#define SERVER_TESTS_PART1_TEST 0x00001A02
/******** SERVER_TESTS_PART2 ********/
#define SERVER_TESTS_PART2_ROT_SRV_REVERSE 0x00001A03
#define SERVER_TESTS_PART2_ROT_SRV_DB_TST 0x00001A04
/******** SMOKE_TESTS_PART1 ********/
#define SMOKE_TESTS_PART1_ROT_SRV1 0x00001A00
#include "autogen_sid.h"
#endif // __SID_H__

2
components/TARGET_PSA/services/attestation/COMPONENT_PSA_SRV_IPC/psa_attest_inject_key.c
View File

@ -19,7 +19,7 @@
#include "psa_attest_inject_key.h"
#include "psa/crypto.h"
#include "psa/client.h"
#include "psa_attest_srv_ifs.h"
#include "psa_manifest/sid.h"
#define MINOR_VER 1

2
components/TARGET_PSA/services/attestation/COMPONENT_PSA_SRV_IPC/psa_initial_attestation_api.c
View File

@ -21,7 +21,7 @@
#include "psa/client.h"
#include "attestation.h"
#include <string.h>
#include "psa_attest_srv_ifs.h"
#include "psa_manifest/sid.h"
#define MINOR_VER 1

57
components/TARGET_PSA/services/attestation/COMPONENT_SPE/psa_attest_srv_partition.h
View File

@ -1,57 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_ATTEST_SRV_PARTITION_H
#define PSA_ATTEST_SRV_PARTITION_H
#define ATTEST_SRV_ID 37
#define ATTEST_SRV_ROT_SRV_COUNT (3UL)
#define ATTEST_SRV_EXT_ROT_SRV_COUNT (7UL)
/* ATTEST_SRV event flags */
#define ATTEST_SRV_RESERVED1_POS (1UL)
#define ATTEST_SRV_RESERVED1_MSK (1UL << ATTEST_SRV_RESERVED1_POS)
#define ATTEST_SRV_RESERVED2_POS (2UL)
#define ATTEST_SRV_RESERVED2_MSK (1UL << ATTEST_SRV_RESERVED2_POS)
#define ATTEST_SRV_WAIT_ANY_IRQ_MSK (0)
#define PSA_ATTEST_GET_TOKEN_POS (4UL)
#define PSA_ATTEST_GET_TOKEN (1UL << PSA_ATTEST_GET_TOKEN_POS)
#define PSA_ATTEST_GET_TOKEN_SIZE_POS (5UL)
#define PSA_ATTEST_GET_TOKEN_SIZE (1UL << PSA_ATTEST_GET_TOKEN_SIZE_POS)
#define PSA_ATTEST_INJECT_KEY_POS (6UL)
#define PSA_ATTEST_INJECT_KEY (1UL << PSA_ATTEST_INJECT_KEY_POS)
#define ATTEST_SRV_WAIT_ANY_SID_MSK (\
PSA_ATTEST_GET_TOKEN | \
PSA_ATTEST_GET_TOKEN_SIZE | \
PSA_ATTEST_INJECT_KEY)
#endif // PSA_ATTEST_SRV_PARTITION_H

2
components/TARGET_PSA/services/attestation/COMPONENT_SPE/psa_attestation_partition.c
View File

@ -20,7 +20,7 @@
#include "psa/client.h"
#include "psa/service.h"
#include "psa_attest_srv_partition.h"
#include "mbed_spm_partitions.h"
#include "psa_initial_attestation_api.h"
#include "psa_attest_inject_key.h"
#include "psa_inject_attestation_key_impl.h"

136
components/TARGET_PSA/services/attestation/TARGET_MBED_SPM/COMPONENT_SPE/psa_attest_srv_partition.c
View File

@ -1,136 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_attest_srv_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t attest_srv_thread_stack[8192] = {0};
/* Threads control blocks */
osRtxThread_t attest_srv_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t attest_srv_thread_attr = {
.name = "attest_srv",
.attr_bits = 0,
.cb_mem = &attest_srv_thread_cb,
.cb_size = sizeof(attest_srv_thread_cb),
.stack_mem = attest_srv_thread_stack,
.stack_size = 8192,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t attest_srv_rot_services[ATTEST_SRV_ROT_SRV_COUNT] = {
{
.sid = PSA_ATTEST_GET_TOKEN_ID,
.mask = PSA_ATTEST_GET_TOKEN,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ATTEST_GET_TOKEN_SIZE_ID,
.mask = PSA_ATTEST_GET_TOKEN_SIZE,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ATTEST_INJECT_KEY_ID,
.mask = PSA_ATTEST_INJECT_KEY,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
/* External SIDs used by ATTEST_SRV */
const uint32_t attest_srv_external_sids[7] = {
PSA_CRYPTO_INIT_ID,
PSA_HASH_ID,
PSA_ASYMMETRIC_ID,
PSA_KEY_MNG_ID,
PSA_CRYPTO_FREE_ID,
PSA_GENERATOR_ID,
PSA_PLATFORM_LC_GET,
};
static osRtxMutex_t attest_srv_mutex = {0};
static const osMutexAttr_t attest_srv_mutex_attr = {
.name = "attest_srv_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &attest_srv_mutex,
.cb_size = sizeof(attest_srv_mutex),
};
extern void attest_main(void *ptr);
void attest_srv_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&attest_srv_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition attest_srv!\n");
}
for (uint32_t i = 0; i < ATTEST_SRV_ROT_SRV_COUNT; ++i) {
attest_srv_rot_services[i].partition = partition;
}
partition->rot_services = attest_srv_rot_services;
partition->thread_id = osThreadNew(attest_main, NULL, &attest_srv_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition attest_srv!\n");
}
}

33
components/TARGET_PSA/services/attestation/psa_attest_srv_ifs.h
View File

@ -1,33 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_ATTEST_SRV_PARTITION_ROT_SERVICES_H
#define PSA_ATTEST_SRV_PARTITION_ROT_SERVICES_H
#define PSA_ATTEST_GET_TOKEN_ID 0x00000F10
#define PSA_ATTEST_GET_TOKEN_SIZE_ID 0x00000F11
#define PSA_ATTEST_INJECT_KEY_ID 0x00000F12
#endif // PSA_ATTEST_SRV_PARTITION_ROT_SERVICES_H

2
components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c
View File

@ -8,7 +8,7 @@
#define PSA_CRYPTO_SECURE 1
#include "crypto_spe.h"
#include "crypto_platform_spe.h"
#include "psa_crypto_srv_partition.h"
#include "mbed_spm_partitions.h"
#include "mbedtls/entropy.h"
#include "psa_crypto_access_control.h"

81
components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_srv_partition.h
View File

@ -1,81 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CRYPTO_SRV_PARTITION_H
#define PSA_CRYPTO_SRV_PARTITION_H
#define CRYPTO_SRV_ID 35
#define CRYPTO_SRV_ROT_SRV_COUNT (11UL)
#define CRYPTO_SRV_EXT_ROT_SRV_COUNT (4UL)
/* CRYPTO_SRV event flags */
#define CRYPTO_SRV_RESERVED1_POS (1UL)
#define CRYPTO_SRV_RESERVED1_MSK (1UL << CRYPTO_SRV_RESERVED1_POS)
#define CRYPTO_SRV_RESERVED2_POS (2UL)
#define CRYPTO_SRV_RESERVED2_MSK (1UL << CRYPTO_SRV_RESERVED2_POS)
#define CRYPTO_SRV_WAIT_ANY_IRQ_MSK (0)
#define PSA_CRYPTO_INIT_POS (4UL)
#define PSA_CRYPTO_INIT (1UL << PSA_CRYPTO_INIT_POS)
#define PSA_MAC_POS (5UL)
#define PSA_MAC (1UL << PSA_MAC_POS)
#define PSA_HASH_POS (6UL)
#define PSA_HASH (1UL << PSA_HASH_POS)
#define PSA_ASYMMETRIC_POS (7UL)
#define PSA_ASYMMETRIC (1UL << PSA_ASYMMETRIC_POS)
#define PSA_SYMMETRIC_POS (8UL)
#define PSA_SYMMETRIC (1UL << PSA_SYMMETRIC_POS)
#define PSA_AEAD_POS (9UL)
#define PSA_AEAD (1UL << PSA_AEAD_POS)
#define PSA_KEY_MNG_POS (10UL)
#define PSA_KEY_MNG (1UL << PSA_KEY_MNG_POS)
#define PSA_RNG_POS (11UL)
#define PSA_RNG (1UL << PSA_RNG_POS)
#define PSA_CRYPTO_FREE_POS (12UL)
#define PSA_CRYPTO_FREE (1UL << PSA_CRYPTO_FREE_POS)
#define PSA_GENERATOR_POS (13UL)
#define PSA_GENERATOR (1UL << PSA_GENERATOR_POS)
#define PSA_ENTROPY_INJECT_POS (14UL)
#define PSA_ENTROPY_INJECT (1UL << PSA_ENTROPY_INJECT_POS)
#define CRYPTO_SRV_WAIT_ANY_SID_MSK (\
PSA_CRYPTO_INIT | \
PSA_MAC | \
PSA_HASH | \
PSA_ASYMMETRIC | \
PSA_SYMMETRIC | \
PSA_AEAD | \
PSA_KEY_MNG | \
PSA_RNG | \
PSA_CRYPTO_FREE | \
PSA_GENERATOR | \
PSA_ENTROPY_INJECT)
#endif // PSA_CRYPTO_SRV_PARTITION_H

229
components/TARGET_PSA/services/crypto/TARGET_MBED_SPM/COMPONENT_SPE/psa_crypto_srv_partition.c
View File

@ -1,229 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_crypto_srv_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t crypto_srv_thread_stack[16384] = {0};
/* Threads control blocks */
osRtxThread_t crypto_srv_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t crypto_srv_thread_attr = {
.name = "crypto_srv",
.attr_bits = 0,
.cb_mem = &crypto_srv_thread_cb,
.cb_size = sizeof(crypto_srv_thread_cb),
.stack_mem = crypto_srv_thread_stack,
.stack_size = 16384,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t crypto_srv_rot_services[CRYPTO_SRV_ROT_SRV_COUNT] = {
{
.sid = PSA_CRYPTO_INIT_ID,
.mask = PSA_CRYPTO_INIT,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_MAC_ID,
.mask = PSA_MAC,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_HASH_ID,
.mask = PSA_HASH,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ASYMMETRIC_ID,
.mask = PSA_ASYMMETRIC,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_SYMMETRIC_ID,
.mask = PSA_SYMMETRIC,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_AEAD_ID,
.mask = PSA_AEAD,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_KEY_MNG_ID,
.mask = PSA_KEY_MNG,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_RNG_ID,
.mask = PSA_RNG,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_CRYPTO_FREE_ID,
.mask = PSA_CRYPTO_FREE,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_GENERATOR_ID,
.mask = PSA_GENERATOR,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ENTROPY_ID,
.mask = PSA_ENTROPY_INJECT,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_STRICT,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
/* External SIDs used by CRYPTO_SRV */
const uint32_t crypto_srv_external_sids[4] = {
PSA_ITS_GET,
PSA_ITS_SET,
PSA_ITS_INFO,
PSA_ITS_REMOVE,
};
static osRtxMutex_t crypto_srv_mutex = {0};
static const osMutexAttr_t crypto_srv_mutex_attr = {
.name = "crypto_srv_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &crypto_srv_mutex,
.cb_size = sizeof(crypto_srv_mutex),
};
extern void crypto_main(void *ptr);
void crypto_srv_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&crypto_srv_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition crypto_srv!\n");
}
for (uint32_t i = 0; i < CRYPTO_SRV_ROT_SRV_COUNT; ++i) {
crypto_srv_rot_services[i].partition = partition;
}
partition->rot_services = crypto_srv_rot_services;
partition->thread_id = osThreadNew(crypto_main, NULL, &crypto_srv_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition crypto_srv!\n");
}
}

41
components/TARGET_PSA/services/crypto/psa_crypto_srv_ifs.h
View File

@ -1,41 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_CRYPTO_SRV_PARTITION_ROT_SERVICES_H
#define PSA_CRYPTO_SRV_PARTITION_ROT_SERVICES_H
#define PSA_CRYPTO_INIT_ID 0x00000F00
#define PSA_MAC_ID 0x00000F01
#define PSA_HASH_ID 0x00000F02
#define PSA_ASYMMETRIC_ID 0x00000F03
#define PSA_SYMMETRIC_ID 0x00000F04
#define PSA_AEAD_ID 0x00000F05
#define PSA_KEY_MNG_ID 0x00000F06
#define PSA_RNG_ID 0x00000F07
#define PSA_CRYPTO_FREE_ID 0x00000F08
#define PSA_GENERATOR_ID 0x00000F09
#define PSA_ENTROPY_ID 0x00000F0A
#endif // PSA_CRYPTO_SRV_PARTITION_ROT_SERVICES_H

2
components/TARGET_PSA/services/platform/COMPONENT_SPE/platform_partition.c
View File

@ -15,7 +15,7 @@
* limitations under the License.
*/
#include "psa_platform_partition.h"
#include "mbed_spm_partitions.h"
#include "platform_srv_impl.h"
#include "psa/internal_trusted_storage.h"
#include "psa/service.h"

57
components/TARGET_PSA/services/platform/COMPONENT_SPE/psa_platform_partition.h
View File

@ -1,57 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_PLATFORM_PARTITION_H
#define PSA_PLATFORM_PARTITION_H
#define PLATFORM_ID 8
#define PLATFORM_ROT_SRV_COUNT (3UL)
#define PLATFORM_EXT_ROT_SRV_COUNT (1UL)
/* PLATFORM event flags */
#define PLATFORM_RESERVED1_POS (1UL)
#define PLATFORM_RESERVED1_MSK (1UL << PLATFORM_RESERVED1_POS)
#define PLATFORM_RESERVED2_POS (2UL)
#define PLATFORM_RESERVED2_MSK (1UL << PLATFORM_RESERVED2_POS)
#define PLATFORM_WAIT_ANY_IRQ_MSK (0)
#define PSA_PLATFORM_LC_GET_MSK_POS (4UL)
#define PSA_PLATFORM_LC_GET_MSK (1UL << PSA_PLATFORM_LC_GET_MSK_POS)
#define PSA_PLATFORM_LC_SET_MSK_POS (5UL)
#define PSA_PLATFORM_LC_SET_MSK (1UL << PSA_PLATFORM_LC_SET_MSK_POS)
#define PSA_PLATFORM_SYSTEM_RESET_MSK_POS (6UL)
#define PSA_PLATFORM_SYSTEM_RESET_MSK (1UL << PSA_PLATFORM_SYSTEM_RESET_MSK_POS)
#define PLATFORM_WAIT_ANY_SID_MSK (\
PSA_PLATFORM_LC_GET_MSK | \
PSA_PLATFORM_LC_SET_MSK | \
PSA_PLATFORM_SYSTEM_RESET_MSK)
#endif // PSA_PLATFORM_PARTITION_H

130
components/TARGET_PSA/services/platform/TARGET_MBED_SPM/COMPONENT_SPE/psa_platform_partition.c
View File

@ -1,130 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_platform_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t platform_thread_stack[1024] = {0};
/* Threads control blocks */
osRtxThread_t platform_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t platform_thread_attr = {
.name = "platform",
.attr_bits = 0,
.cb_mem = &platform_thread_cb,
.cb_size = sizeof(platform_thread_cb),
.stack_mem = platform_thread_stack,
.stack_size = 1024,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t platform_rot_services[PLATFORM_ROT_SRV_COUNT] = {
{
.sid = PSA_PLATFORM_LC_GET,
.mask = PSA_PLATFORM_LC_GET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_PLATFORM_LC_SET,
.mask = PSA_PLATFORM_LC_SET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_PLATFORM_SYSTEM_RESET,
.mask = PSA_PLATFORM_SYSTEM_RESET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
/* External SIDs used by PLATFORM */
const uint32_t platform_external_sids[1] = {
PSA_ITS_RESET,
};
static osRtxMutex_t platform_mutex = {0};
static const osMutexAttr_t platform_mutex_attr = {
.name = "platform_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &platform_mutex,
.cb_size = sizeof(platform_mutex),
};
extern void platform_partition_entry(void *ptr);
void platform_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&platform_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition platform!\n");
}
for (uint32_t i = 0; i < PLATFORM_ROT_SRV_COUNT; ++i) {
platform_rot_services[i].partition = partition;
}
partition->rot_services = platform_rot_services;
partition->thread_id = osThreadNew(platform_partition_entry, NULL, &platform_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition platform!\n");
}
}

33
components/TARGET_PSA/services/platform/psa_platform_ifs.h
View File

@ -1,33 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_PLATFORM_PARTITION_ROT_SERVICES_H
#define PSA_PLATFORM_PARTITION_ROT_SERVICES_H
#define PSA_PLATFORM_LC_GET 0x00011000
#define PSA_PLATFORM_LC_SET 0x00011001
#define PSA_PLATFORM_SYSTEM_RESET 0x00011002
#endif // PSA_PLATFORM_PARTITION_ROT_SERVICES_H

2
components/TARGET_PSA/services/storage/its/COMPONENT_SPE/its_partition.c
View File

@ -19,7 +19,7 @@
#include <string.h>
#include "psa/client.h"
#include "psa/service.h"
#include "psa_its_partition.h"
#include "mbed_spm_partitions.h"
#include "psa/internal_trusted_storage.h"
#include "pits_impl.h"
#include "mbed_error.h"

63
components/TARGET_PSA/services/storage/its/COMPONENT_SPE/psa_its_partition.h
View File

@ -1,63 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_ITS_PARTITION_H
#define PSA_ITS_PARTITION_H
#define ITS_ID 10
#define ITS_ROT_SRV_COUNT (5UL)
#define ITS_EXT_ROT_SRV_COUNT (0UL)
/* ITS event flags */
#define ITS_RESERVED1_POS (1UL)
#define ITS_RESERVED1_MSK (1UL << ITS_RESERVED1_POS)
#define ITS_RESERVED2_POS (2UL)
#define ITS_RESERVED2_MSK (1UL << ITS_RESERVED2_POS)
#define ITS_WAIT_ANY_IRQ_MSK (0)
#define PSA_ITS_GET_MSK_POS (4UL)
#define PSA_ITS_GET_MSK (1UL << PSA_ITS_GET_MSK_POS)
#define PSA_ITS_SET_MSK_POS (5UL)
#define PSA_ITS_SET_MSK (1UL << PSA_ITS_SET_MSK_POS)
#define PSA_ITS_INFO_MSK_POS (6UL)
#define PSA_ITS_INFO_MSK (1UL << PSA_ITS_INFO_MSK_POS)
#define PSA_ITS_REMOVE_MSK_POS (7UL)
#define PSA_ITS_REMOVE_MSK (1UL << PSA_ITS_REMOVE_MSK_POS)
#define PSA_ITS_RESET_MSK_POS (8UL)
#define PSA_ITS_RESET_MSK (1UL << PSA_ITS_RESET_MSK_POS)
#define ITS_WAIT_ANY_SID_MSK (\
PSA_ITS_GET_MSK | \
PSA_ITS_SET_MSK | \
PSA_ITS_INFO_MSK | \
PSA_ITS_REMOVE_MSK | \
PSA_ITS_RESET_MSK)
#endif // PSA_ITS_PARTITION_H

150
components/TARGET_PSA/services/storage/its/TARGET_MBED_SPM/COMPONENT_SPE/psa_its_partition.c
View File

@ -1,150 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#include "cmsis.h"
#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */
#include "rtx_os.h"
#include "spm_panic.h"
#include "spm_internal.h"
#include "psa_its_partition.h"
#include "psa_manifest/sid.h"
/* Threads stacks */
MBED_ALIGN(8) uint8_t its_thread_stack[2048] = {0};
/* Threads control blocks */
osRtxThread_t its_thread_cb = {0};
/* Thread attributes - for thread initialization */
osThreadAttr_t its_thread_attr = {
.name = "its",
.attr_bits = 0,
.cb_mem = &its_thread_cb,
.cb_size = sizeof(its_thread_cb),
.stack_mem = its_thread_stack,
.stack_size = 2048,
.priority = osPriorityNormal,
.tz_module = 0,
.reserved = 0
};
spm_rot_service_t its_rot_services[ITS_ROT_SRV_COUNT] = {
{
.sid = PSA_ITS_GET,
.mask = PSA_ITS_GET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ITS_SET,
.mask = PSA_ITS_SET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ITS_INFO,
.mask = PSA_ITS_INFO_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ITS_REMOVE,
.mask = PSA_ITS_REMOVE_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = true,
.queue = {
.head = NULL,
.tail = NULL
}
},
{
.sid = PSA_ITS_RESET,
.mask = PSA_ITS_RESET_MSK,
.partition = NULL,
.min_version = 1,
.min_version_policy = PSA_MINOR_VERSION_POLICY_RELAXED,
.allow_nspe = false,
.queue = {
.head = NULL,
.tail = NULL
}
},
};
static osRtxMutex_t its_mutex = {0};
static const osMutexAttr_t its_mutex_attr = {
.name = "its_mutex",
.attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust,
.cb_mem = &its_mutex,
.cb_size = sizeof(its_mutex),
};
extern void its_entry(void *ptr);
void its_init(spm_partition_t *partition)
{
if (NULL == partition) {
SPM_PANIC("partition is NULL!\n");
}
partition->mutex = osMutexNew(&its_mutex_attr);
if (NULL == partition->mutex) {
SPM_PANIC("Failed to create mutex for secure partition its!\n");
}
for (uint32_t i = 0; i < ITS_ROT_SRV_COUNT; ++i) {
its_rot_services[i].partition = partition;
}
partition->rot_services = its_rot_services;
partition->thread_id = osThreadNew(its_entry, NULL, &its_thread_attr);
if (NULL == partition->thread_id) {
SPM_PANIC("Failed to create start main thread of partition its!\n");
}
}

35
components/TARGET_PSA/services/storage/its/psa_its_ifs.h
View File

@ -1,35 +0,0 @@
/* Copyright (c) 2017-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/***********************************************************************************************************************
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT.
* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
* Template Version 1.0
* Generated by tools/spm/generate_partition_code.py Version 1.0
**********************************************************************************************************************/
#ifndef PSA_ITS_PARTITION_ROT_SERVICES_H
#define PSA_ITS_PARTITION_ROT_SERVICES_H
#define PSA_ITS_GET 0x00011A00
#define PSA_ITS_SET 0x00011A01
#define PSA_ITS_INFO 0x00011A02
#define PSA_ITS_REMOVE 0x00011A03
#define PSA_ITS_RESET 0x00011A04
#endif // PSA_ITS_PARTITION_ROT_SERVICES_H

12
components/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json
View File

@ -38,6 +38,18 @@
"QSPI_FREQ": "32000000",
"QSPI_MIN_READ_SIZE": "4",
"QSPI_MIN_PROG_SIZE": "4"
},
"CY8CPROTO_062_4343W": {
"QSPI_FREQ": "50000000",
"QSPI_MIN_PROG_SIZE": "512"
},
"CY8CKIT_062_WIFI_BT": {
"QSPI_FREQ": "50000000",
"QSPI_MIN_PROG_SIZE": "512"
},
"CY8CKIT_062_BLE": {
"QSPI_FREQ": "50000000",
"QSPI_MIN_PROG_SIZE": "512"
}
}
}

6
features/cellular/framework/AT/AT_CellularBase.h
View File

@ -42,6 +42,11 @@ public:
*/
device_err_t get_device_error() const;
/* Supported features by the modem
*
* NOTE! These are used as index to feature table, so the only allowed modification to this is appending
* to the end (just before PROPERTY_MAX). Do not modify any of the existing fields.
*/
enum CellularProperty {
PROPERTY_C_EREG, // AT_CellularNetwork::RegistrationMode. What support modem has for this registration type.
PROPERTY_C_GREG, // AT_CellularNetwork::RegistrationMode. What support modem has for this registration type.
@ -58,6 +63,7 @@ public:
PROPERTY_IPV4V6_PDP_TYPE, // 0 = not supported, 1 = supported. Does modem support dual stack IPV4V6?
PROPERTY_NON_IP_PDP_TYPE, // 0 = not supported, 1 = supported. Does modem support Non-IP?
PROPERTY_AT_CGEREP, // 0 = not supported, 1 = supported. Does modem support AT command AT+CGEREP.
PROPERTY_MAX
};

4
features/cellular/framework/AT/AT_CellularContext.cpp
View File

@ -377,9 +377,9 @@ bool AT_CellularContext::get_context()
cid_max = cid;
}
char pdp_type_from_context[10];
int pdp_type_len = _at.read_string(pdp_type_from_context, sizeof(pdp_type_from_context) - 1);
int pdp_type_len = _at.read_string(pdp_type_from_context, sizeof(pdp_type_from_context));
if (pdp_type_len > 0) {
apn_len = _at.read_string(apn, sizeof(apn) - 1);
apn_len = _at.read_string(apn, sizeof(apn));
if (apn_len >= 0) {
if (_apn && (strcmp(apn, _apn) != 0)) {
continue;

7
features/cellular/framework/AT/AT_CellularInformation.cpp
View File

@ -78,7 +78,7 @@ nsapi_error_t AT_CellularInformation::get_info(const char *cmd, char *buf, size_
_at.cmd_stop();
_at.set_delimiter(0);
_at.resp_start();
_at.read_string(buf, buf_size - 1);
_at.read_string(buf, buf_size);
_at.resp_stop();
_at.set_default_delimiter();
return _at.unlock_return_error();
@ -93,10 +93,7 @@ nsapi_error_t AT_CellularInformation::get_imsi(char *imsi, size_t buf_size)
_at.cmd_start("AT+CIMI");
_at.cmd_stop();
_at.resp_start();
int len = _at.read_string(imsi, MAX_IMSI_LENGTH);
if (len > 0) {
imsi[len] = '\0';
}
_at.read_string(imsi, MAX_IMSI_LENGTH + 1);
_at.resp_stop();
return _at.unlock_return_error();
}

4
features/cellular/framework/AT/AT_CellularStack.cpp
View File

@ -70,7 +70,7 @@ const char *AT_CellularStack::get_ip_address()
_at.skip_param();
int len = _at.read_string(_ip, NSAPI_IPv4_SIZE - 1);
int len = _at.read_string(_ip, NSAPI_IPv4_SIZE);
if (len == -1) {
_ip[0] = '\0';
_at.resp_stop();
@ -81,7 +81,7 @@ const char *AT_CellularStack::get_ip_address()
// in case stack type is not IPV4 only, try to look also for IPV6 address
if (_stack_type != IPV4_STACK) {
(void)_at.read_string(_ip, PDP_IPV6_SIZE - 1);
(void)_at.read_string(_ip, PDP_IPV6_SIZE);
}
}

3
features/cellular/framework/AT/AT_CellularStack.h
View File

@ -105,7 +105,8 @@ protected:
pending_bytes(0)
{
}
// Socket id from cellular device
// Socket identifier, generally it will be the socket ID assigned by the
// modem. In a few special cases, modems may take that as an input argument.
int id;
// Being connected means remote ip address and port are set
bool connected;

30
features/cellular/framework/targets/QUECTEL/BC95/QUECTEL_BC95_CellularStack.cpp
View File

@ -27,10 +27,13 @@ using namespace mbed_cellular_util;
QUECTEL_BC95_CellularStack::QUECTEL_BC95_CellularStack(ATHandler &atHandler, int cid, nsapi_ip_stack_t stack_type) : AT_CellularStack(atHandler, cid, stack_type)
{
_at.set_urc_handler("+NSONMI:", mbed::Callback<void()>(this, &QUECTEL_BC95_CellularStack::urc_nsonmi));
_at.set_urc_handler("+NSOCLI:", mbed::Callback<void()>(this, &QUECTEL_BC95_CellularStack::urc_nsocli));
}
QUECTEL_BC95_CellularStack::~QUECTEL_BC95_CellularStack()
{
_at.set_urc_handler("+NSONMI:", NULL);
_at.set_urc_handler("+NSOCLI:", NULL);
}
nsapi_error_t QUECTEL_BC95_CellularStack::socket_listen(nsapi_socket_t handle, int backlog)
@ -88,6 +91,28 @@ void QUECTEL_BC95_CellularStack::urc_nsonmi()
}
}
void QUECTEL_BC95_CellularStack::urc_nsocli()
{
int sock_id = _at.read_int();
const nsapi_error_t err = _at.get_last_error();
if (err != NSAPI_ERROR_OK) {
return;
}
CellularSocket *sock = find_socket(sock_id);
if (sock) {
sock->closed = true;
if (sock->_cb) {
sock->_cb(sock->_data);
}
tr_info("Socket closed %d", sock_id);
}
}
int QUECTEL_BC95_CellularStack::get_max_socket_count()
{
return BC95_SOCKET_MAX;
@ -100,6 +125,11 @@ bool QUECTEL_BC95_CellularStack::is_protocol_supported(nsapi_protocol_t protocol
nsapi_error_t QUECTEL_BC95_CellularStack::socket_close_impl(int sock_id)
{
CellularSocket *sock = find_socket(sock_id);
if (sock && sock->closed) {
return NSAPI_ERROR_OK;
}
_at.cmd_start("AT+NSOCL=");
_at.write_int(sock_id);
_at.cmd_stop_read_resp();

1
features/cellular/framework/targets/QUECTEL/BC95/QUECTEL_BC95_CellularStack.h
View File

@ -57,6 +57,7 @@ protected: // AT_CellularStack
private:
// URC handlers
void urc_nsonmi();
void urc_nsocli();
};
} // namespace mbed
#endif /* QUECTEL_BC95_CELLULARSTACK_H_ */

4
features/cellular/framework/targets/UBLOX/AT/UBLOX_AT_CellularStack.cpp
View File

@ -444,7 +444,7 @@ const char *UBLOX_AT_CellularStack::get_ip_address()
if (_at.info_resp()) {
_at.skip_param();
_at.skip_param();
int len = _at.read_string(_ip, NSAPI_IPv4_SIZE - 1);
int len = _at.read_string(_ip, NSAPI_IPv4_SIZE);
if (len == -1) {
_ip[0] = '\0';
_at.unlock();
@ -454,7 +454,7 @@ const char *UBLOX_AT_CellularStack::get_ip_address()
// in case stack type is not IPV4 only, try to look also for IPV6 address
if (_stack_type != IPV4_STACK) {
len = _at.read_string(_ip, PDP_IPV6_SIZE - 1);
len = _at.read_string(_ip, PDP_IPV6_SIZE);
}
}
_at.resp_stop();

2
features/device_key/source/DeviceKey.cpp
View File

@ -169,7 +169,7 @@ int DeviceKey::read_key_from_kvstore(uint32_t *output, size_t &size)
return DEVICEKEY_NOT_FOUND;
}
int kvStatus = ((TDBStore *)inner_store)->reserved_data_get(output, size);
int kvStatus = ((TDBStore *)inner_store)->reserved_data_get(output, size, &size);
if (MBED_ERROR_ITEM_NOT_FOUND == kvStatus) {
return DEVICEKEY_NOT_FOUND;
}

10
features/nanostack/mbed-mesh-api/source/MeshInterfaceNanostack.cpp
View File

@ -120,8 +120,9 @@ nsapi_error_t MeshInterfaceNanostack::initialize(NanostackRfPhy *phy)
void Nanostack::Interface::network_handler(mesh_connection_status_t status)
{
if (_blocking) {
if (status == MESH_CONNECTED || status == MESH_CONNECTED_LOCAL ||
status == MESH_CONNECTED_GLOBAL) {
if (_connect_status == NSAPI_STATUS_CONNECTING
&& (status == MESH_CONNECTED || status == MESH_CONNECTED_LOCAL
|| status == MESH_CONNECTED_GLOBAL)) {
connect_semaphore.release();
} else if (status == MESH_DISCONNECTED) {
disconnect_semaphore.release();
@ -149,8 +150,9 @@ void Nanostack::Interface::network_handler(mesh_connection_status_t status)
_connect_status = NSAPI_STATUS_DISCONNECTED;
}
if (_connection_status_cb && _previous_connection_status != _connect_status) {
if (_connection_status_cb && _previous_connection_status != _connect_status
&& (_previous_connection_status != NSAPI_STATUS_GLOBAL_UP || status != MESH_BOOTSTRAP_STARTED)
&& (_previous_connection_status != NSAPI_STATUS_CONNECTING || status != MESH_BOOTSTRAP_START_FAILED)) {
_connection_status_cb(NSAPI_EVENT_CONNECTION_STATUS_CHANGE, _connect_status);
}
_previous_connection_status = _connect_status;

4
features/netsocket/emac-drivers/TARGET_RDA_EMAC/RdaWiFiInterface.cpp
View File

@ -159,8 +159,12 @@ nsapi_error_t RDAWiFiInterface::disconnect()
if(sta_state < 2) {
return NSAPI_ERROR_NO_CONNECTION;
}
void* wifi_disconnect_sem = rda_sem_create(0);
msg.type = WLAND_DISCONNECT;
msg.arg1 = (unsigned int)wifi_disconnect_sem;
rda_mail_put(wland_msgQ, (void*)&msg, osWaitForever);
rda_sem_wait(wifi_disconnect_sem, osWaitForever);
rda_sem_delete(wifi_disconnect_sem);
if (_interface) {
return _interface->bringdown();
}

1
features/netsocket/emac-drivers/TARGET_RDA_EMAC/lwip-wifi/arch/TARGET_RDA/TARGET_UNO_91H/inc/csl_mbed.h
View File

@ -88,6 +88,7 @@ typedef struct {
void (*mbed_critical_sec_end)(void);
/* Create interrupt in mbed, input param: vector/priority/isr(function), */
unsigned int (*mbed_critical_sec_counter_get)(void);
/* return: interrupt handle, non-zero is valid */
void * (*mbed_create_interrupt)(unsigned int vec, unsigned int pri, void *isr);

1
features/netsocket/emac-drivers/TARGET_RDA_EMAC/lwip-wifi/arch/TARGET_RDA/TARGET_UNO_91H/inc/rda5991h_wland.h
View File

@ -52,6 +52,7 @@ typedef enum {
WLAND_STAJOINED,
WLAND_STAEXITED,
WLAND_STADEAUTH,
WLAND_STADELETETIMER,
WLAND_MAC_CONNECTED,
WLAND_MAC_AP_CONNECTED,
WLAND_ADD_GTK,

Some files were not shown because too many files have changed in this diff Show More