diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index 4429e3c463..314c0736e5 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,6 +34,22 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* +#if !defined(MBED_APP_START) +#define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) +#define MBED_APP_SIZE 0x00400000 +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x400000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -42,19 +58,29 @@ # endif #endif -#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0x100 -LR_IROM1 0x00000000 0x00400000 { ; load region size_region - ER_IROM1 0x00000000 0x00400000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - *(+RO) - } - ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data - *(+RW +ZI) - } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE) + +#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE) +#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + *(+RO) + } + + ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM + RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data + *(+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } } - diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index 53d9941ec9..3c9effb988 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,6 +34,22 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* +#if !defined(MBED_APP_START) +#define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) +#define MBED_APP_SIZE 0x00400000 +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x400000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -42,19 +58,29 @@ # endif #endif -#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0x100 -LR_IROM1 0x00000000 0x00400000 { ; load region size_region - ER_IROM1 0x00000000 0x00400000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - *(+RO) - } - ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data - *(+RW +ZI) - } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE) + +#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE) +#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + *(+RO) + } + + ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM + RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data + *(+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } } - diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index 74317cdb67..0254e9acea 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,6 +34,23 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* + +#if !defined(MBED_APP_START) +#define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) +#define MBED_APP_SIZE 0x00400000 +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x400000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -42,19 +59,29 @@ # endif #endif -#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0x100 -LR_IROM1 0x00000000 0x00400000 { ; load region size_region - ER_IROM1 0x00000000 0x00400000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - *(+RO) - } - ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data - *(+RW +ZI) - } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE) + +#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE) +#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + *(+RO) + } + + ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM + RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data + *(+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } } - diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index 067d379657..c71cb033c0 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,6 +35,22 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* +#if !defined(MBED_APP_START) +#define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) +#define MBED_APP_SIZE 0x00400000 +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x400000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -43,19 +59,29 @@ # endif #endif -#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0x100 -LR_IROM1 0x00000000 0x00400000 { ; load region size_region - ER_IROM1 0x00000000 0x00400000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - *(+RO) - } - ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data - *(+RW +ZI) - } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE) + +#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE) +#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + *(+RO) + } + + ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM + RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data + *(+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } } - diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/CMakeLists.txt b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/CMakeLists.txt index a574cb8d4b..225ad1c4d9 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/CMakeLists.txt +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/CMakeLists.txt @@ -10,7 +10,7 @@ target_include_directories(mbed-arm-mps2-m7 if(${MBED_TOOLCHAIN} STREQUAL "ARM") set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MPS2.sct) - set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_MPS2.S) + set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_CMSDK_CM7.S) elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/MPS2.ld) set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_MPS2.S) diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index 7d983a6284..8f27eeb62f 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,6 +35,23 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* + +#if !defined(MBED_APP_START) +#define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) +#define MBED_APP_SIZE 0x00400000 +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x400000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -43,19 +60,29 @@ # endif #endif -#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0x100 -LR_IROM1 0x00000000 0x00400000 { ; load region size_region - ER_IROM1 0x00000000 0x00400000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - *(+RO) - } - ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data - *(+RW +ZI) - } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE) + +#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE) +#define MBED_RAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + *(+RO) + } + + ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM + RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data + *(+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } } - diff --git a/targets/targets.json b/targets/targets.json index 76f7fd73d0..da2b25251f 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4403,7 +4403,18 @@ "SPI", "SPISLAVE", "TSC" - ] + ], + "supported_application_profiles" : ["full", "bare-metal"], + "supported_c_libs": { + "arm": [ + "std", + "small" + ], + "gcc_arm": [ + "std", + "small" + ] + } }, "ARM_MPS2_M0": { "inherits": [