Merge pull request #14337 from jeromecoutant/PR_STM32L1_1102

STM32L1 update drivers version to CUBE V1.10.2

targets/TARGET_STM/README.md

@@ -71,7 +71,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
 | G4          |    1.1.0     | https://github.com/STMicroelectronics/STM32CubeG4 |
 | H7          |    1.8.0     | https://github.com/STMicroelectronics/STM32CubeH7 |
 | L0          |    1.11.3    | https://github.com/STMicroelectronics/STM32CubeL0 |
-| L1          |    1.8.1     | https://github.com/STMicroelectronics/STM32CubeL1 |
+| L1          |    1.10.2    | https://github.com/STMicroelectronics/STM32CubeL1 |
 | L4          |    1.16.0    | https://github.com/STMicroelectronics/STM32CubeL4 |
 | L5          |    1.3.0     | https://github.com/STMicroelectronics/STM32CubeL5 |
 | WB          |    1.8.0     | https://github.com/STMicroelectronics/STM32CubeWB |

targets/TARGET_STM/TARGET_STM32L1/CMakeLists.txt

@@ -1,12 +1,29 @@
 # Copyright (c) 2020 ARM Limited. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
-add_subdirectory(TARGET_MOTE_L152RC EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L100xB EXCLUDE_FROM_ALL)
-add_subdirectory(TARGET_NUCLEO_L152RE EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L100xC EXCLUDE_FROM_ALL)
-add_subdirectory(TARGET_XDOT_L151CC EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L151xB EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L151xC EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L151xD EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L151xE EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L152xB EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L152xC EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L152xD EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L152xE EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L162xC EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L162xD EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32L162xE EXCLUDE_FROM_ALL)
+
+add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
 
 add_library(mbed-stm32l1 INTERFACE)
 
+target_include_directories(mbed-stm32l1
+    INTERFACE
+        .
+)
+
 target_sources(mbed-stm32l1
     INTERFACE
         analogin_device.c
@@ -16,73 +33,6 @@ target_sources(mbed-stm32l1
         pwmout_device.c
         serial_device.c
         spi_api.c
-
-        device/stm32l1xx_hal.c
-        device/stm32l1xx_hal_adc.c
-        device/stm32l1xx_hal_adc_ex.c
-        device/stm32l1xx_hal_comp.c
-        device/stm32l1xx_hal_cortex.c
-        device/stm32l1xx_hal_crc.c
-        device/stm32l1xx_hal_cryp.c
-        device/stm32l1xx_hal_cryp_ex.c
-        device/stm32l1xx_hal_dac.c
-        device/stm32l1xx_hal_dac_ex.c
-        device/stm32l1xx_hal_dma.c
-        device/stm32l1xx_hal_flash.c
-        device/stm32l1xx_hal_flash_ex.c
-        device/stm32l1xx_hal_flash_ramfunc.c
-        device/stm32l1xx_hal_gpio.c
-        device/stm32l1xx_hal_i2c.c
-        device/stm32l1xx_hal_i2s.c
-        device/stm32l1xx_hal_irda.c
-        device/stm32l1xx_hal_iwdg.c
-        device/stm32l1xx_hal_lcd.c
-        device/stm32l1xx_hal_nor.c
-        device/stm32l1xx_hal_opamp.c
-        device/stm32l1xx_hal_opamp_ex.c
-        device/stm32l1xx_hal_pcd.c
-        device/stm32l1xx_hal_pcd_ex.c
-        device/stm32l1xx_hal_pwr.c
-        device/stm32l1xx_hal_pwr_ex.c
-        device/stm32l1xx_hal_rcc.c
-        device/stm32l1xx_hal_rcc_ex.c
-        device/stm32l1xx_hal_rtc.c
-        device/stm32l1xx_hal_rtc_ex.c
-        device/stm32l1xx_hal_sd.c
-        device/stm32l1xx_hal_smartcard.c
-        device/stm32l1xx_hal_spi.c
-        device/stm32l1xx_hal_spi_ex.c
-        device/stm32l1xx_hal_sram.c
-        device/stm32l1xx_hal_tim.c
-        device/stm32l1xx_hal_tim_ex.c
-        device/stm32l1xx_hal_uart.c
-        device/stm32l1xx_hal_usart.c
-        device/stm32l1xx_hal_wwdg.c
-        device/stm32l1xx_ll_adc.c
-        device/stm32l1xx_ll_comp.c
-        device/stm32l1xx_ll_crc.c
-        device/stm32l1xx_ll_dac.c
-        device/stm32l1xx_ll_dma.c
-        device/stm32l1xx_ll_exti.c
-        device/stm32l1xx_ll_fsmc.c
-        device/stm32l1xx_ll_gpio.c
-        device/stm32l1xx_ll_i2c.c
-        device/stm32l1xx_ll_opamp.c
-        device/stm32l1xx_ll_pwr.c
-        device/stm32l1xx_ll_rcc.c
-        device/stm32l1xx_ll_rtc.c
-        device/stm32l1xx_ll_sdmmc.c
-        device/stm32l1xx_ll_spi.c
-        device/stm32l1xx_ll_tim.c
-        device/stm32l1xx_ll_usart.c
-        device/stm32l1xx_ll_utils.c
-        device/system_stm32l1xx.c
 )
 
-target_include_directories(mbed-stm32l1
+target_link_libraries(mbed-stm32l1 INTERFACE mbed-stm mbed-stm32l1cube-fw)
-    INTERFACE
-        .
-        device
-)
-
-target_link_libraries(mbed-stm32l1 INTERFACE mbed-stm)

targets/TARGET_STM/TARGET_STM32L1/PeripheralNames.h

@@ -0,0 +1,75 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    ADC_1 = (int)ADC1_BASE
+} ADCName;
+
+typedef enum {
+    DAC_1 = (int)DAC_BASE
+} DACName;
+
+typedef enum {
+    UART_1 = (int)USART1_BASE,
+    UART_2 = (int)USART2_BASE,
+    UART_3 = (int)USART3_BASE,
+#if defined UART4_BASE
+    UART_4 = (int)UART4_BASE,
+#endif
+#if defined UART5_BASE
+    UART_5 = (int)UART5_BASE
+#endif
+} UARTName;
+
+#define DEVICE_SPI_COUNT 3
+typedef enum {
+    SPI_1 = (int)SPI1_BASE,
+    SPI_2 = (int)SPI2_BASE,
+    SPI_3 = (int)SPI3_BASE
+} SPIName;
+
+typedef enum {
+    I2C_1 = (int)I2C1_BASE,
+    I2C_2 = (int)I2C2_BASE
+} I2CName;
+
+typedef enum {
+    PWM_2  = (int)TIM2_BASE,
+    PWM_3  = (int)TIM3_BASE,
+    PWM_4  = (int)TIM4_BASE,
+    PWM_5  = (int)TIM5_BASE,
+    PWM_9  = (int)TIM9_BASE,
+    PWM_10 = (int)TIM10_BASE,
+    PWM_11 = (int)TIM11_BASE
+} PWMName;
+
+typedef enum {
+    USB_FS = (int)USB_BASE,
+} USBName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/CMSIS/stm32l1xx.h

@@ -16,29 +16,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -94,7 +78,7 @@
   /* #define STM32L152xCA */   /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */
   /* #define STM32L152xD  */   /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */
   /* #define STM32L152xDX  */  /*!< STM32L152VD-X Devices */
-#define STM32L152xE            /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */
+  /* #define STM32L152xE  */   /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */
   /* #define STM32L162xC  */   /*!< STM32L162RC and STM32L162VC */
   /* #define STM32L162xCA */   /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */
   /* #define STM32L162xD  */   /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */
@@ -112,15 +96,15 @@
    In this case, these drivers will not be included and the application code will 
    be based on direct access to peripherals registers 
    */
-#define USE_HAL_DRIVER
+  /*#define USE_HAL_DRIVER */
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number
+  * @brief CMSIS Device version number V2.3.1
   */
 #define __STM32L1xx_CMSIS_VERSION_MAIN   (0x02) /*!< [31:24] main version */
-#define __STM32L1xx_CMSIS_VERSION_SUB1   (0x02) /*!< [23:16] sub1 version */
+#define __STM32L1xx_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32L1xx_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
+#define __STM32L1xx_CMSIS_VERSION_SUB2   (0x01) /*!< [15:8]  sub2 version */
 #define __STM32L1xx_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32L1xx_CMSIS_VERSION        ((__STM32L1xx_CMSIS_VERSION_MAIN << 24)\
                                          |(__STM32L1xx_CMSIS_VERSION_SUB1 << 16)\
@@ -205,8 +189,8 @@ typedef enum
 
 typedef enum 
 {
-  ERROR = 0, 
+  SUCCESS = 0,
-  SUCCESS = !ERROR
+  ERROR = !SUCCESS
 } ErrorStatus;
 
 /**

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/CMSIS/system_stm32l1xx.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -104,8 +88,6 @@ extern const uint8_t PLLMulTable[9];      /*!< PLL multipiers table values */
   
 extern void SystemInit(void);
 extern void SystemCoreClockUpdate(void);
-extern void SetSysClock(void);
-
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/CMakeLists.txt

@@ -0,0 +1,77 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+add_library(mbed-stm32l1cube-fw INTERFACE)
+
+target_sources(mbed-stm32l1cube-fw
+    INTERFACE
+        STM32L1xx_HAL_Driver/stm32l1xx_hal.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_adc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_adc_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_comp.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_cortex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_crc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_dac.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_dac_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_dma.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_exti.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_flash.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ramfunc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_gpio.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_i2c.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_i2s.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_irda.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_iwdg.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_lcd.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_nor.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_pcd.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_pcd_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_rtc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_rtc_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_sd.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_smartcard.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_spi.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_sram.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_tim.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_tim_ex.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_uart.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_usart.c
+        STM32L1xx_HAL_Driver/stm32l1xx_hal_wwdg.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_adc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_comp.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_crc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_dac.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_dma.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_exti.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_fsmc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_gpio.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_i2c.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_opamp.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_pwr.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_rcc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_rtc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_sdmmc.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_spi.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_tim.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_usart.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_usb.c
+        STM32L1xx_HAL_Driver/stm32l1xx_ll_utils.c
+        system_stm32l1xx.c
+)
+
+target_include_directories(mbed-stm32l1cube-fw
+    INTERFACE
+        .
+        CMSIS
+        STM32L1xx_HAL_Driver
+        STM32L1xx_HAL_Driver/Legacy
+)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/Legacy/stm32_hal_legacy.h

@@ -7,36 +7,20 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32_HAL_LEGACY
+#ifndef STM32_HAL_LEGACY
-#define __STM32_HAL_LEGACY
+#define STM32_HAL_LEGACY
 
 #ifdef __cplusplus
  extern "C" {
@@ -110,6 +94,10 @@
 #define HAL_ADC_STATE_ERROR             HAL_ADC_STATE_ERROR_INTERNAL
 #define HAL_ADC_STATE_BUSY              HAL_ADC_STATE_BUSY_INTERNAL
 #define HAL_ADC_STATE_AWD               HAL_ADC_STATE_AWD1
+
+#if defined(STM32H7)
+#define ADC_CHANNEL_VBAT_DIV4           ADC_CHANNEL_VBAT
+#endif /* STM32H7 */
 /**
   * @}
   */
@@ -248,6 +236,16 @@
 #define DAC_WAVEGENERATION_NOISE                        DAC_WAVE_NOISE
 #define DAC_WAVEGENERATION_TRIANGLE                     DAC_WAVE_TRIANGLE
 
+#if defined(STM32G4) || defined(STM32H7)
+#define DAC_CHIPCONNECT_DISABLE       DAC_CHIPCONNECT_EXTERNAL
+#define DAC_CHIPCONNECT_ENABLE        DAC_CHIPCONNECT_INTERNAL
+#endif
+
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
+#define HAL_DAC_MSP_INIT_CB_ID       HAL_DAC_MSPINIT_CB_ID
+#define HAL_DAC_MSP_DEINIT_CB_ID     HAL_DAC_MSPDEINIT_CB_ID
+#endif
+
 /**
   * @}
   */
@@ -274,7 +272,117 @@
 #define __HAL_REMAPDMA_CHANNEL_ENABLE            __HAL_DMA_REMAP_CHANNEL_ENABLE
 #define __HAL_REMAPDMA_CHANNEL_DISABLE           __HAL_DMA_REMAP_CHANNEL_DISABLE
 
+#if defined(STM32L4)
 
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI0            HAL_DMAMUX1_REQ_GEN_EXTI0
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI1            HAL_DMAMUX1_REQ_GEN_EXTI1
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI2            HAL_DMAMUX1_REQ_GEN_EXTI2
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI3            HAL_DMAMUX1_REQ_GEN_EXTI3
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI4            HAL_DMAMUX1_REQ_GEN_EXTI4
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI5            HAL_DMAMUX1_REQ_GEN_EXTI5
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI6            HAL_DMAMUX1_REQ_GEN_EXTI6
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI7            HAL_DMAMUX1_REQ_GEN_EXTI7
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI8            HAL_DMAMUX1_REQ_GEN_EXTI8
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI9            HAL_DMAMUX1_REQ_GEN_EXTI9
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI10           HAL_DMAMUX1_REQ_GEN_EXTI10
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI11           HAL_DMAMUX1_REQ_GEN_EXTI11
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI12           HAL_DMAMUX1_REQ_GEN_EXTI12
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI13           HAL_DMAMUX1_REQ_GEN_EXTI13
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI14           HAL_DMAMUX1_REQ_GEN_EXTI14
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI15           HAL_DMAMUX1_REQ_GEN_EXTI15
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT  HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT       HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
+#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT       HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
+#define HAL_DMAMUX1_REQUEST_GEN_DSI_TE           HAL_DMAMUX1_REQ_GEN_DSI_TE
+#define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT          HAL_DMAMUX1_REQ_GEN_DSI_EOT
+#define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT        HAL_DMAMUX1_REQ_GEN_DMA2D_EOT
+#define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT          HAL_DMAMUX1_REQ_GEN_LTDC_IT
+
+#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT          HAL_DMAMUX_REQ_GEN_NO_EVENT
+#define HAL_DMAMUX_REQUEST_GEN_RISING            HAL_DMAMUX_REQ_GEN_RISING
+#define HAL_DMAMUX_REQUEST_GEN_FALLING           HAL_DMAMUX_REQ_GEN_FALLING
+#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING    HAL_DMAMUX_REQ_GEN_RISING_FALLING
+
+#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
+#define DMA_REQUEST_DCMI_PSSI                    DMA_REQUEST_DCMI
+#endif
+
+#endif /* STM32L4 */
+
+#if defined(STM32G0)
+#define DMA_REQUEST_DAC1_CHANNEL1                DMA_REQUEST_DAC1_CH1
+#define DMA_REQUEST_DAC1_CHANNEL2                DMA_REQUEST_DAC1_CH2
+#define DMA_REQUEST_TIM16_TRIG_COM               DMA_REQUEST_TIM16_COM
+#define DMA_REQUEST_TIM17_TRIG_COM               DMA_REQUEST_TIM17_COM
+
+#define LL_DMAMUX_REQ_TIM16_TRIG_COM             LL_DMAMUX_REQ_TIM16_COM
+#define LL_DMAMUX_REQ_TIM17_TRIG_COM             LL_DMAMUX_REQ_TIM17_COM
+#endif
+
+#if defined(STM32H7)
+
+#define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1
+#define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2
+
+#define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
+#define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
+
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
+#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
+#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
+#define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
+#define HAL_DMAMUX1_REQUEST_GEN_EXTI0              HAL_DMAMUX1_REQ_GEN_EXTI0
+#define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO         HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
+
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP          HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP          HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT          HAL_DMAMUX2_REQ_GEN_COMP1_OUT
+#define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT          HAL_DMAMUX2_REQ_GEN_COMP2_OUT
+#define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP           HAL_DMAMUX2_REQ_GEN_RTC_WKUP
+#define HAL_DMAMUX2_REQUEST_GEN_EXTI0              HAL_DMAMUX2_REQ_GEN_EXTI0
+#define HAL_DMAMUX2_REQUEST_GEN_EXTI2              HAL_DMAMUX2_REQ_GEN_EXTI2
+#define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT        HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
+#define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT            HAL_DMAMUX2_REQ_GEN_SPI6_IT
+#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
+#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
+#define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT            HAL_DMAMUX2_REQ_GEN_ADC3_IT
+#define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT      HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
+#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
+#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
+
+#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT            HAL_DMAMUX_REQ_GEN_NO_EVENT
+#define HAL_DMAMUX_REQUEST_GEN_RISING              HAL_DMAMUX_REQ_GEN_RISING
+#define HAL_DMAMUX_REQUEST_GEN_FALLING             HAL_DMAMUX_REQ_GEN_FALLING
+#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING      HAL_DMAMUX_REQ_GEN_RISING_FALLING
+
+#define DFSDM_FILTER_EXT_TRIG_LPTIM1               DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT
+#define DFSDM_FILTER_EXT_TRIG_LPTIM2               DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT
+#define DFSDM_FILTER_EXT_TRIG_LPTIM3               DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT
+
+#define DAC_TRIGGER_LP1_OUT                        DAC_TRIGGER_LPTIM1_OUT
+#define DAC_TRIGGER_LP2_OUT                        DAC_TRIGGER_LPTIM2_OUT
+
+#endif /* STM32H7 */
 
 /**
   * @}
@@ -355,6 +463,40 @@
 #define OB_RDP_LEVEL0                 OB_RDP_LEVEL_0
 #define OB_RDP_LEVEL1                 OB_RDP_LEVEL_1
 #define OB_RDP_LEVEL2                 OB_RDP_LEVEL_2
+#if defined(STM32G0)
+#define OB_BOOT_LOCK_DISABLE          OB_BOOT_ENTRY_FORCED_NONE
+#define OB_BOOT_LOCK_ENABLE           OB_BOOT_ENTRY_FORCED_FLASH
+#else
+#define OB_BOOT_ENTRY_FORCED_NONE     OB_BOOT_LOCK_DISABLE
+#define OB_BOOT_ENTRY_FORCED_FLASH    OB_BOOT_LOCK_ENABLE
+#endif
+#if defined(STM32H7)
+#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
+#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
+#define FLASH_FLAG_STRBER_BANK1R  FLASH_FLAG_STRBERR_BANK1
+#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
+#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
+#define FLASH_FLAG_STRBER_BANK2R  FLASH_FLAG_STRBERR_BANK2
+#define FLASH_FLAG_WDW            FLASH_FLAG_WBNE
+#define OB_WRP_SECTOR_All         OB_WRP_SECTOR_ALL
+#endif /* STM32H7 */
+
+/**
+  * @}
+  */
+
+/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
+  * @{
+  */
+
+#if defined(STM32H7)
+#define __HAL_RCC_JPEG_CLK_ENABLE               __HAL_RCC_JPGDECEN_CLK_ENABLE
+#define __HAL_RCC_JPEG_CLK_DISABLE              __HAL_RCC_JPGDECEN_CLK_DISABLE
+#define __HAL_RCC_JPEG_FORCE_RESET              __HAL_RCC_JPGDECRST_FORCE_RESET
+#define __HAL_RCC_JPEG_RELEASE_RESET            __HAL_RCC_JPGDECRST_RELEASE_RESET
+#define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE         __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
+#define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE        __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
+#endif /* STM32H7 */
 
 /**
   * @}
@@ -373,6 +515,13 @@
 #define HAL_SYSCFG_FASTMODEPLUS_I2C1       I2C_FASTMODEPLUS_I2C1
 #define HAL_SYSCFG_FASTMODEPLUS_I2C2       I2C_FASTMODEPLUS_I2C2
 #define HAL_SYSCFG_FASTMODEPLUS_I2C3       I2C_FASTMODEPLUS_I2C3
+#if defined(STM32G4)
+
+#define HAL_SYSCFG_EnableIOAnalogSwitchBooster    HAL_SYSCFG_EnableIOSwitchBooster
+#define HAL_SYSCFG_DisableIOAnalogSwitchBooster   HAL_SYSCFG_DisableIOSwitchBooster
+#define HAL_SYSCFG_EnableIOAnalogSwitchVDD        HAL_SYSCFG_EnableIOSwitchVDD
+#define HAL_SYSCFG_DisableIOAnalogSwitchVDD       HAL_SYSCFG_DisableIOSwitchVDD
+#endif /* STM32G4 */
 /**
   * @}
   */
@@ -381,12 +530,12 @@
 /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
   * @{
   */
-#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7)
+#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE       FMC_NAND_WAIT_FEATURE_DISABLE
 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE        FMC_NAND_WAIT_FEATURE_ENABLE
 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8            FMC_NAND_MEM_BUS_WIDTH_8
 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16           FMC_NAND_MEM_BUS_WIDTH_16
-#else
+#elif defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4)
 #define FMC_NAND_WAIT_FEATURE_DISABLE           FMC_NAND_PCC_WAIT_FEATURE_DISABLE
 #define FMC_NAND_WAIT_FEATURE_ENABLE            FMC_NAND_PCC_WAIT_FEATURE_ENABLE
 #define FMC_NAND_MEM_BUS_WIDTH_8                FMC_NAND_PCC_MEM_BUS_WIDTH_8
@@ -427,16 +576,32 @@
 #define GPIO_AF12_SDMMC                           GPIO_AF12_SDMMC1
 #endif
 
+#if defined(STM32H7)
+#define GPIO_AF7_SDIO1                            GPIO_AF7_SDMMC1
+#define GPIO_AF8_SDIO1                            GPIO_AF8_SDMMC1
+#define GPIO_AF12_SDIO1                           GPIO_AF12_SDMMC1
+#define GPIO_AF9_SDIO2                            GPIO_AF9_SDMMC2
+#define GPIO_AF10_SDIO2                           GPIO_AF10_SDMMC2
+#define GPIO_AF11_SDIO2                           GPIO_AF11_SDMMC2
+
+#if defined (STM32H743xx) || defined (STM32H753xx)  || defined (STM32H750xx) || defined (STM32H742xx) || \
+    defined (STM32H745xx) || defined (STM32H755xx)  || defined (STM32H747xx) || defined (STM32H757xx)
+#define GPIO_AF10_OTG2_HS  GPIO_AF10_OTG2_FS
+#define GPIO_AF10_OTG1_FS  GPIO_AF10_OTG1_HS
+#define GPIO_AF12_OTG2_FS  GPIO_AF12_OTG1_FS
+#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
+#endif /* STM32H7 */
+
 #define GPIO_AF0_LPTIM                            GPIO_AF0_LPTIM1
 #define GPIO_AF1_LPTIM                            GPIO_AF1_LPTIM1
 #define GPIO_AF2_LPTIM                            GPIO_AF2_LPTIM1
 
-#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
+#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7)
 #define  GPIO_SPEED_LOW                           GPIO_SPEED_FREQ_LOW
 #define  GPIO_SPEED_MEDIUM                        GPIO_SPEED_FREQ_MEDIUM
 #define  GPIO_SPEED_FAST                          GPIO_SPEED_FREQ_HIGH
 #define  GPIO_SPEED_HIGH                          GPIO_SPEED_FREQ_VERY_HIGH
-#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
+#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7*/
 
 #if defined(STM32L1)
  #define  GPIO_SPEED_VERY_LOW    GPIO_SPEED_FREQ_LOW
@@ -456,78 +621,6 @@
   * @}
   */
 
-/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
-  * @{
-  */
-  
-#if defined(STM32H7)
- #define __HAL_RCC_JPEG_CLK_ENABLE               __HAL_RCC_JPGDECEN_CLK_ENABLE
- #define __HAL_RCC_JPEG_CLK_DISABLE              __HAL_RCC_JPGDECEN_CLK_DISABLE
- #define __HAL_RCC_JPEG_FORCE_RESET              __HAL_RCC_JPGDECRST_FORCE_RESET
- #define __HAL_RCC_JPEG_RELEASE_RESET            __HAL_RCC_JPGDECRST_RELEASE_RESET
- #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE         __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
- #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE        __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
-
-  #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 
-  #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 
-
- #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
- #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
-
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT    HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
- #define HAL_DMAMUX1_REQUEST_GEN_EXTI0              HAL_DMAMUX1_REQ_GEN_EXTI0
- #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO         HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
-
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT    HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP    HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT         HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP        HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP          HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP          HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT          HAL_DMAMUX2_REQ_GEN_COMP1_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT          HAL_DMAMUX2_REQ_GEN_COMP2_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP           HAL_DMAMUX2_REQ_GEN_RTC_WKUP
- #define HAL_DMAMUX2_REQUEST_GEN_EXTI0              HAL_DMAMUX2_REQ_GEN_EXTI0
- #define HAL_DMAMUX2_REQUEST_GEN_EXTI2              HAL_DMAMUX2_REQ_GEN_EXTI2
- #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT        HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
- #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT            HAL_DMAMUX2_REQ_GEN_SPI6_IT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
- #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT      HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
- #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT            HAL_DMAMUX2_REQ_GEN_ADC3_IT
- #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT      HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
- #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
- #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT        HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
-
- #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT            HAL_DMAMUX_REQ_GEN_NO_EVENT
- #define HAL_DMAMUX_REQUEST_GEN_RISING              HAL_DMAMUX_REQ_GEN_RISING
- #define HAL_DMAMUX_REQUEST_GEN_FALLING             HAL_DMAMUX_REQ_GEN_FALLING
- #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING      HAL_DMAMUX_REQ_GEN_RISING_FALLING
-
-
-#endif /* STM32H7  */
-  
-  
-/**
-  * @}
-  */ 
-  
-  
 /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
   * @{
   */
@@ -549,6 +642,189 @@
 #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
 #define __HAL_HRTIM_SetCompare        __HAL_HRTIM_SETCOMPARE
 #define __HAL_HRTIM_GetCompare        __HAL_HRTIM_GETCOMPARE
+
+#if defined(STM32G4)
+#define HAL_HRTIM_ExternalEventCounterConfig    HAL_HRTIM_ExtEventCounterConfig
+#define HAL_HRTIM_ExternalEventCounterEnable    HAL_HRTIM_ExtEventCounterEnable
+#define HAL_HRTIM_ExternalEventCounterDisable   HAL_HRTIM_ExtEventCounterDisable
+#define HAL_HRTIM_ExternalEventCounterReset     HAL_HRTIM_ExtEventCounterReset
+#define HRTIM_TIMEEVENT_A                       HRTIM_EVENTCOUNTER_A
+#define HRTIM_TIMEEVENT_B                       HRTIM_EVENTCOUNTER_B
+#define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL  HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL
+#define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL    HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL
+#endif /* STM32G4 */
+
+#if defined(STM32H7)
+#define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
+
+#define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
+#define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
+#define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
+#define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
+#define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
+#define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
+#define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
+#define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
+#define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
+#define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
+#endif /* STM32H7 */
+
+#if defined(STM32F3)
+/** @brief Constants defining available sources associated to external events.
+  */
+#define HRTIM_EVENTSRC_1              (0x00000000U)
+#define HRTIM_EVENTSRC_2              (HRTIM_EECR1_EE1SRC_0)
+#define HRTIM_EVENTSRC_3              (HRTIM_EECR1_EE1SRC_1)
+#define HRTIM_EVENTSRC_4              (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0)
+
+/** @brief Constants defining the events that can be selected to configure the
+  *        set/reset crossbar of a timer output
+  */
+#define HRTIM_OUTPUTSET_TIMEV_1       (HRTIM_SET1R_TIMEVNT1)
+#define HRTIM_OUTPUTSET_TIMEV_2       (HRTIM_SET1R_TIMEVNT2)
+#define HRTIM_OUTPUTSET_TIMEV_3       (HRTIM_SET1R_TIMEVNT3)
+#define HRTIM_OUTPUTSET_TIMEV_4       (HRTIM_SET1R_TIMEVNT4)
+#define HRTIM_OUTPUTSET_TIMEV_5       (HRTIM_SET1R_TIMEVNT5)
+#define HRTIM_OUTPUTSET_TIMEV_6       (HRTIM_SET1R_TIMEVNT6)
+#define HRTIM_OUTPUTSET_TIMEV_7       (HRTIM_SET1R_TIMEVNT7)
+#define HRTIM_OUTPUTSET_TIMEV_8       (HRTIM_SET1R_TIMEVNT8)
+#define HRTIM_OUTPUTSET_TIMEV_9       (HRTIM_SET1R_TIMEVNT9)
+
+#define HRTIM_OUTPUTRESET_TIMEV_1     (HRTIM_RST1R_TIMEVNT1)
+#define HRTIM_OUTPUTRESET_TIMEV_2     (HRTIM_RST1R_TIMEVNT2)
+#define HRTIM_OUTPUTRESET_TIMEV_3     (HRTIM_RST1R_TIMEVNT3)
+#define HRTIM_OUTPUTRESET_TIMEV_4     (HRTIM_RST1R_TIMEVNT4)
+#define HRTIM_OUTPUTRESET_TIMEV_5     (HRTIM_RST1R_TIMEVNT5)
+#define HRTIM_OUTPUTRESET_TIMEV_6     (HRTIM_RST1R_TIMEVNT6)
+#define HRTIM_OUTPUTRESET_TIMEV_7     (HRTIM_RST1R_TIMEVNT7)
+#define HRTIM_OUTPUTRESET_TIMEV_8     (HRTIM_RST1R_TIMEVNT8)
+#define HRTIM_OUTPUTRESET_TIMEV_9     (HRTIM_RST1R_TIMEVNT9)
+
+/** @brief Constants defining the event filtering applied to external events
+  *        by a timer
+  */
+#define HRTIM_TIMEVENTFILTER_NONE             (0x00000000U)
+#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1     (HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2     (HRTIM_EEFR1_EE1FLTR_1)
+#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3     (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4     (HRTIM_EEFR1_EE1FLTR_2)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4    (HRTIM_EEFR1_EE1FLTR_3)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2)
+#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0)
+#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1)
+#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM     (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)
+
+/** @brief Constants defining the DLL calibration periods (in micro seconds)
+  */
+#define HRTIM_CALIBRATIONRATE_7300             0x00000000U
+#define HRTIM_CALIBRATIONRATE_910              (HRTIM_DLLCR_CALRTE_0)
+#define HRTIM_CALIBRATIONRATE_114              (HRTIM_DLLCR_CALRTE_1)
+#define HRTIM_CALIBRATIONRATE_14               (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
+
+#endif /* STM32F3 */
 /**
   * @}
   */
@@ -688,6 +964,12 @@
 #define OPAMP_PGACONNECT_VM0                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
 #define OPAMP_PGACONNECT_VM1                  OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
 
+#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
+#define HAL_OPAMP_MSP_INIT_CB_ID       HAL_OPAMP_MSPINIT_CB_ID
+#define HAL_OPAMP_MSP_DEINIT_CB_ID     HAL_OPAMP_MSPDEINIT_CB_ID
+#endif
+
+
 /**
   * @}
   */
@@ -696,6 +978,15 @@
   * @{
   */
 #define I2S_STANDARD_PHILLIPS      I2S_STANDARD_PHILIPS
+
+#if defined(STM32H7)
+  #define I2S_IT_TXE               I2S_IT_TXP
+  #define I2S_IT_RXNE              I2S_IT_RXP
+
+  #define I2S_FLAG_TXE             I2S_FLAG_TXP
+  #define I2S_FLAG_RXNE            I2S_FLAG_RXP
+#endif
+
 #if defined(STM32F7)
   #define I2S_CLOCK_SYSCLK           I2S_CLOCK_PLL
 #endif
@@ -764,6 +1055,16 @@
 #define RTC_TAMPERPIN_PA0  RTC_TAMPERPIN_POS1
 #define RTC_TAMPERPIN_PI8  RTC_TAMPERPIN_POS1
 
+#if defined(STM32H7)
+#define RTC_TAMPCR_TAMPXE          RTC_TAMPER_X
+#define RTC_TAMPCR_TAMPXIE         RTC_TAMPER_X_INTERRUPT
+
+#define RTC_TAMPER1_INTERRUPT      RTC_IT_TAMP1
+#define RTC_TAMPER2_INTERRUPT      RTC_IT_TAMP2
+#define RTC_TAMPER3_INTERRUPT      RTC_IT_TAMP3
+#define RTC_ALL_TAMPER_INTERRUPT   RTC_IT_TAMPALL
+#endif /* STM32H7 */
+
 /**
   * @}
   */
@@ -820,6 +1121,21 @@
 #define SPI_NSS_PULSE_DISABLED          SPI_NSS_PULSE_DISABLE
 #define SPI_NSS_PULSE_ENABLED           SPI_NSS_PULSE_ENABLE
 
+#if defined(STM32H7)
+
+ #define SPI_FLAG_TXE                    SPI_FLAG_TXP
+ #define SPI_FLAG_RXNE                   SPI_FLAG_RXP
+
+ #define SPI_IT_TXE                      SPI_IT_TXP
+ #define SPI_IT_RXNE                     SPI_IT_RXP
+
+ #define SPI_FRLVL_EMPTY                 SPI_RX_FIFO_0PACKET
+ #define SPI_FRLVL_QUARTER_FULL          SPI_RX_FIFO_1PACKET
+ #define SPI_FRLVL_HALF_FULL             SPI_RX_FIFO_2PACKET
+ #define SPI_FRLVL_FULL                  SPI_RX_FIFO_3PACKET
+
+#endif /* STM32H7 */
+
 /**
   * @}
   */
@@ -887,6 +1203,33 @@
 #define TIM_DMABurstLength_17Transfers   TIM_DMABURSTLENGTH_17TRANSFERS
 #define TIM_DMABurstLength_18Transfers   TIM_DMABURSTLENGTH_18TRANSFERS
 
+#if defined(STM32L0)
+#define TIM22_TI1_GPIO1   TIM22_TI1_GPIO
+#define TIM22_TI1_GPIO2   TIM22_TI1_GPIO
+#endif
+
+#if defined(STM32F3)
+#define IS_TIM_HALL_INTERFACE_INSTANCE   IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
+#endif
+
+#if defined(STM32H7)
+#define TIM_TIM1_ETR_COMP1_OUT        TIM_TIM1_ETR_COMP1
+#define TIM_TIM1_ETR_COMP2_OUT        TIM_TIM1_ETR_COMP2
+#define TIM_TIM8_ETR_COMP1_OUT        TIM_TIM8_ETR_COMP1
+#define TIM_TIM8_ETR_COMP2_OUT        TIM_TIM8_ETR_COMP2
+#define TIM_TIM2_ETR_COMP1_OUT        TIM_TIM2_ETR_COMP1
+#define TIM_TIM2_ETR_COMP2_OUT        TIM_TIM2_ETR_COMP2
+#define TIM_TIM3_ETR_COMP1_OUT        TIM_TIM3_ETR_COMP1
+#define TIM_TIM1_TI1_COMP1_OUT        TIM_TIM1_TI1_COMP1
+#define TIM_TIM8_TI1_COMP2_OUT        TIM_TIM8_TI1_COMP2
+#define TIM_TIM2_TI4_COMP1_OUT        TIM_TIM2_TI4_COMP1
+#define TIM_TIM2_TI4_COMP2_OUT        TIM_TIM2_TI4_COMP2
+#define TIM_TIM2_TI4_COMP1COMP2_OUT   TIM_TIM2_TI4_COMP1_COMP2
+#define TIM_TIM3_TI1_COMP1_OUT        TIM_TIM3_TI1_COMP1
+#define TIM_TIM3_TI1_COMP2_OUT        TIM_TIM3_TI1_COMP2
+#define TIM_TIM3_TI1_COMP1COMP2_OUT   TIM_TIM3_TI1_COMP1_COMP2
+#endif
+
 /**
   * @}
   */
@@ -1047,8 +1390,9 @@
   * @}
   */
 
-#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
+#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
-    defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
+  || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
+  || defined(STM32H7)
 /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
   * @{
   */
@@ -1072,7 +1416,7 @@
 /**
   * @}
   */
-#endif  /* STM32L4 ||  STM32F7*/
+#endif  /* STM32L4 ||  STM32F7 ||  STM32F4 ||  STM32H7 */
 
 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
   * @{
@@ -1114,6 +1458,30 @@
 
 #define HASH_HMACKeyType_ShortKey  HASH_HMAC_KEYTYPE_SHORTKEY
 #define HASH_HMACKeyType_LongKey   HASH_HMAC_KEYTYPE_LONGKEY
+
+#if defined(STM32L4) || defined(STM32L5) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
+
+#define HAL_HASH_MD5_Accumulate                HAL_HASH_MD5_Accmlt
+#define HAL_HASH_MD5_Accumulate_End            HAL_HASH_MD5_Accmlt_End
+#define HAL_HASH_MD5_Accumulate_IT             HAL_HASH_MD5_Accmlt_IT
+#define HAL_HASH_MD5_Accumulate_End_IT         HAL_HASH_MD5_Accmlt_End_IT
+
+#define HAL_HASH_SHA1_Accumulate               HAL_HASH_SHA1_Accmlt
+#define HAL_HASH_SHA1_Accumulate_End           HAL_HASH_SHA1_Accmlt_End
+#define HAL_HASH_SHA1_Accumulate_IT            HAL_HASH_SHA1_Accmlt_IT
+#define HAL_HASH_SHA1_Accumulate_End_IT        HAL_HASH_SHA1_Accmlt_End_IT
+
+#define HAL_HASHEx_SHA224_Accumulate           HAL_HASHEx_SHA224_Accmlt
+#define HAL_HASHEx_SHA224_Accumulate_End       HAL_HASHEx_SHA224_Accmlt_End
+#define HAL_HASHEx_SHA224_Accumulate_IT        HAL_HASHEx_SHA224_Accmlt_IT
+#define HAL_HASHEx_SHA224_Accumulate_End_IT    HAL_HASHEx_SHA224_Accmlt_End_IT
+
+#define HAL_HASHEx_SHA256_Accumulate           HAL_HASHEx_SHA256_Accmlt
+#define HAL_HASHEx_SHA256_Accumulate_End       HAL_HASHEx_SHA256_Accmlt_End
+#define HAL_HASHEx_SHA256_Accumulate_IT        HAL_HASHEx_SHA256_Accmlt_IT
+#define HAL_HASHEx_SHA256_Accumulate_End_IT    HAL_HASHEx_SHA256_Accmlt_End_IT
+
+#endif  /* STM32L4 || STM32L5 || STM32F4 || STM32F7 || STM32H7 */
 /**
   * @}
   */
@@ -1136,6 +1504,13 @@
 #endif
 #define HAL_ADC_EnableBuffer_Cmd(cmd)  (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ?  HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
+#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
+#define HAL_EnableSRDomainDBGStopMode      HAL_EnableDomain3DBGStopMode
+#define HAL_DisableSRDomainDBGStopMode     HAL_DisableDomain3DBGStopMode
+#define HAL_EnableSRDomainDBGStandbyMode   HAL_EnableDomain3DBGStandbyMode
+#define HAL_DisableSRDomainDBGStandbyMode  HAL_DisableDomain3DBGStandbyMode
+#endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ  || STM32H7B0xxQ */
+
 /**
   * @}
   */
@@ -1164,6 +1539,30 @@
 #define HAL_FMPI2CEx_DigitalFilter_Config     HAL_FMPI2CEx_ConfigDigitalFilter
 
 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
+
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
+#define HAL_I2C_Master_Sequential_Transmit_IT  HAL_I2C_Master_Seq_Transmit_IT
+#define HAL_I2C_Master_Sequential_Receive_IT   HAL_I2C_Master_Seq_Receive_IT
+#define HAL_I2C_Slave_Sequential_Transmit_IT   HAL_I2C_Slave_Seq_Transmit_IT
+#define HAL_I2C_Slave_Sequential_Receive_IT    HAL_I2C_Slave_Seq_Receive_IT
+#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
+#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
+#define HAL_I2C_Master_Sequential_Receive_DMA  HAL_I2C_Master_Seq_Receive_DMA
+#define HAL_I2C_Slave_Sequential_Transmit_DMA  HAL_I2C_Slave_Seq_Transmit_DMA
+#define HAL_I2C_Slave_Sequential_Receive_DMA   HAL_I2C_Slave_Seq_Receive_DMA
+#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
+
+#if defined(STM32F4)
+#define HAL_FMPI2C_Master_Sequential_Transmit_IT  HAL_FMPI2C_Master_Seq_Transmit_IT
+#define HAL_FMPI2C_Master_Sequential_Receive_IT   HAL_FMPI2C_Master_Seq_Receive_IT
+#define HAL_FMPI2C_Slave_Sequential_Transmit_IT   HAL_FMPI2C_Slave_Seq_Transmit_IT
+#define HAL_FMPI2C_Slave_Sequential_Receive_IT    HAL_FMPI2C_Slave_Seq_Receive_IT
+#define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA
+#define HAL_FMPI2C_Master_Sequential_Receive_DMA  HAL_FMPI2C_Master_Seq_Receive_DMA
+#define HAL_FMPI2C_Slave_Sequential_Transmit_DMA  HAL_FMPI2C_Slave_Seq_Transmit_DMA
+#define HAL_FMPI2C_Slave_Sequential_Receive_DMA   HAL_FMPI2C_Slave_Seq_Receive_DMA
+#endif /* STM32F4 */
  /**
   * @}
   */
@@ -1171,6 +1570,13 @@
 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
   * @{
   */
+
+#if defined(STM32G0)
+#define HAL_PWR_ConfigPVD                             HAL_PWREx_ConfigPVD
+#define HAL_PWR_EnablePVD                             HAL_PWREx_EnablePVD
+#define HAL_PWR_DisablePVD                            HAL_PWREx_DisablePVD
+#define HAL_PWR_PVD_IRQHandler                        HAL_PWREx_PVD_IRQHandler
+#endif
 #define HAL_PWR_PVDConfig                             HAL_PWR_ConfigPVD
 #define HAL_PWR_DisableBkUpReg                        HAL_PWREx_DisableBkUpReg
 #define HAL_PWR_DisableFlashPowerDown                 HAL_PWREx_DisableFlashPowerDown
@@ -1198,6 +1604,8 @@
 
 #define CR_OFFSET_BB                                  PWR_CR_OFFSET_BB
 #define CSR_OFFSET_BB                                 PWR_CSR_OFFSET_BB
+#define PMODE_BIT_NUMBER                              VOS_BIT_NUMBER
+#define CR_PMODE_BB                                   CR_VOS_BB
 
 #define DBP_BitNumber                                 DBP_BIT_NUMBER
 #define PVDE_BitNumber                                PVDE_BIT_NUMBER
@@ -1241,6 +1649,14 @@
 #define HAL_TIM_DMAError                                TIM_DMAError
 #define HAL_TIM_DMACaptureCplt                          TIM_DMACaptureCplt
 #define HAL_TIMEx_DMACommutationCplt                    TIMEx_DMACommutationCplt
+#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
+#define HAL_TIM_SlaveConfigSynchronization              HAL_TIM_SlaveConfigSynchro
+#define HAL_TIM_SlaveConfigSynchronization_IT           HAL_TIM_SlaveConfigSynchro_IT
+#define HAL_TIMEx_CommutationCallback                   HAL_TIMEx_CommutCallback
+#define HAL_TIMEx_ConfigCommutationEvent                HAL_TIMEx_ConfigCommutEvent
+#define HAL_TIMEx_ConfigCommutationEvent_IT             HAL_TIMEx_ConfigCommutEvent_IT
+#define HAL_TIMEx_ConfigCommutationEvent_DMA            HAL_TIMEx_ConfigCommutEvent_DMA
+#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */
 /**
   * @}
   */
@@ -1454,10 +1870,17 @@
 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
+#if defined(STM32H7)
+  #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1
+  #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1
+  #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1
+  #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1
+#else
   #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
   #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
   #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
   #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
+#endif /* STM32H7 */
 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
@@ -1723,6 +2146,10 @@
 #define IS_I2S_INSTANCE                 IS_I2S_ALL_INSTANCE
 #define IS_I2S_INSTANCE_EXT             IS_I2S_ALL_INSTANCE_EXT
 
+#if defined(STM32H7)
+  #define __HAL_I2S_CLEAR_FREFLAG       __HAL_I2S_CLEAR_TIFREFLAG
+#endif
+
 /**
   * @}
   */
@@ -2117,6 +2544,21 @@
 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
+
+#if defined(STM32WB)
+#define __HAL_RCC_QSPI_CLK_DISABLE            __HAL_RCC_QUADSPI_CLK_DISABLE
+#define __HAL_RCC_QSPI_CLK_ENABLE             __HAL_RCC_QUADSPI_CLK_ENABLE
+#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE      __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
+#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE       __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
+#define __HAL_RCC_QSPI_FORCE_RESET            __HAL_RCC_QUADSPI_FORCE_RESET
+#define __HAL_RCC_QSPI_RELEASE_RESET          __HAL_RCC_QUADSPI_RELEASE_RESET
+#define __HAL_RCC_QSPI_IS_CLK_ENABLED         __HAL_RCC_QUADSPI_IS_CLK_ENABLED
+#define __HAL_RCC_QSPI_IS_CLK_DISABLED        __HAL_RCC_QUADSPI_IS_CLK_DISABLED
+#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED   __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
+#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED  __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
+#define QSPI_IRQHandler QUADSPI_IRQHandler
+#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
+
 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
@@ -2333,12 +2775,28 @@
 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
+
+#if defined(STM32H7)
+#define __HAL_RCC_WWDG_CLK_DISABLE   __HAL_RCC_WWDG1_CLK_DISABLE
+#define __HAL_RCC_WWDG_CLK_ENABLE   __HAL_RCC_WWDG1_CLK_ENABLE
+#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE  __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE
+#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE  __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE
+
+#define __HAL_RCC_WWDG_FORCE_RESET    ((void)0U)  /* Not available on the STM32H7*/
+#define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/
+
+
+#define  __HAL_RCC_WWDG_IS_CLK_ENABLED    __HAL_RCC_WWDG1_IS_CLK_ENABLED
+#define  __HAL_RCC_WWDG_IS_CLK_DISABLED  __HAL_RCC_WWDG1_IS_CLK_DISABLED
+#endif
+
 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
+
 #define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE
 #define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE
 #define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET
@@ -2671,6 +3129,15 @@
 #define __WWDG_IS_CLK_ENABLED       __HAL_RCC_WWDG_IS_CLK_ENABLED
 #define __WWDG_IS_CLK_DISABLED      __HAL_RCC_WWDG_IS_CLK_DISABLED
 
+#if defined(STM32L1)
+#define __HAL_RCC_CRYP_CLK_DISABLE         __HAL_RCC_AES_CLK_DISABLE
+#define __HAL_RCC_CRYP_CLK_ENABLE          __HAL_RCC_AES_CLK_ENABLE
+#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE   __HAL_RCC_AES_CLK_SLEEP_DISABLE
+#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE    __HAL_RCC_AES_CLK_SLEEP_ENABLE
+#define __HAL_RCC_CRYP_FORCE_RESET         __HAL_RCC_AES_FORCE_RESET
+#define __HAL_RCC_CRYP_RELEASE_RESET       __HAL_RCC_AES_RELEASE_RESET
+#endif /* STM32L1 */
+
 #if defined(STM32F4)
 #define __HAL_RCC_SDMMC1_FORCE_RESET       __HAL_RCC_SDIO_FORCE_RESET
 #define __HAL_RCC_SDMMC1_RELEASE_RESET     __HAL_RCC_SDIO_RELEASE_RESET
@@ -2785,7 +3252,8 @@
 #define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK
 #define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
 
-#if defined(STM32WB) || defined(STM32G0)
+#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5)
+#define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE
 #else
 #define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
 #endif
@@ -2913,7 +3381,7 @@
 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
   * @{
   */
-#if defined (STM32G0)
+#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4)
 #else
 #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
 #endif
@@ -3029,13 +3497,24 @@
 #define  SDIO_IRQHandler            SDMMC1_IRQHandler
 #endif
 
-#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
+#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7)
 #define  HAL_SD_CardCIDTypedef       HAL_SD_CardCIDTypeDef
 #define  HAL_SD_CardCSDTypedef       HAL_SD_CardCSDTypeDef
 #define  HAL_SD_CardStatusTypedef    HAL_SD_CardStatusTypeDef
 #define  HAL_SD_CardStateTypedef     HAL_SD_CardStateTypeDef
 #endif
 
+#if defined(STM32H7) || defined(STM32L5)
+#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback   HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
+#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback   HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
+#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback  HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
+#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback  HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
+#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback    HAL_SDEx_Read_DMADoubleBuf0CpltCallback
+#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback    HAL_SDEx_Read_DMADoubleBuf1CpltCallback
+#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback   HAL_SDEx_Write_DMADoubleBuf0CpltCallback
+#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback   HAL_SDEx_Write_DMADoubleBuf1CpltCallback
+#define HAL_SD_DriveTransciver_1_8V_Callback          HAL_SD_DriveTransceiver_1_8V_Callback
+#endif
 /**
   * @}
   */
@@ -3250,6 +3729,42 @@
   * @}
   */
 
+/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
+  * @{
+  */
+#if defined(STM32H7)
+#define HAL_SPDIFRX_ReceiveControlFlow      HAL_SPDIFRX_ReceiveCtrlFlow
+#define HAL_SPDIFRX_ReceiveControlFlow_IT   HAL_SPDIFRX_ReceiveCtrlFlow_IT
+#define HAL_SPDIFRX_ReceiveControlFlow_DMA  HAL_SPDIFRX_ReceiveCtrlFlow_DMA
+#endif
+/**
+  * @}
+  */
+
+/** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose
+  * @{
+  */
+#if defined (STM32H7) || defined (STM32G4) || defined (STM32F3)
+#define HAL_HRTIM_WaveformCounterStart_IT      HAL_HRTIM_WaveformCountStart_IT
+#define HAL_HRTIM_WaveformCounterStart_DMA     HAL_HRTIM_WaveformCountStart_DMA
+#define HAL_HRTIM_WaveformCounterStart         HAL_HRTIM_WaveformCountStart
+#define HAL_HRTIM_WaveformCounterStop_IT       HAL_HRTIM_WaveformCountStop_IT
+#define HAL_HRTIM_WaveformCounterStop_DMA      HAL_HRTIM_WaveformCountStop_DMA
+#define HAL_HRTIM_WaveformCounterStop          HAL_HRTIM_WaveformCountStop
+#endif
+/**
+  * @}
+  */
+
+/** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
+  * @{
+  */
+#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7)
+#define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
+#endif /* STM32L4 || STM32F4 || STM32F7 */
+/**
+  * @}
+  */
 
 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
   * @{
@@ -3263,7 +3778,7 @@
 }
 #endif
 
-#endif /* ___STM32_HAL_LEGACY */
+#endif /* STM32_HAL_LEGACY */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal.c

@@ -13,7 +13,7 @@
     The common HAL driver contains a set of generic and common APIs that can be
     used by the PPP peripheral drivers and the user to start using the HAL.
     [..]
-    The HAL contains two APIs' categories: 
+    The HAL contains two APIs categories:
          (+) Common HAL APIs
          (+) Services HAL APIs
 
@@ -21,29 +21,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -70,11 +54,11 @@
   */
 
 /**
- * @brief STM32L1xx HAL Driver version number
+ * @brief STM32L1xx HAL Driver version number V1.4.3
    */
 #define __STM32L1xx_HAL_VERSION_MAIN   (0x01) /*!< [31:24] main version */
-#define __STM32L1xx_HAL_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
+#define __STM32L1xx_HAL_VERSION_SUB1   (0x04) /*!< [23:16] sub1 version */
-#define __STM32L1xx_HAL_VERSION_SUB2   (0x01) /*!< [15:8]  sub2 version */
+#define __STM32L1xx_HAL_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
 #define __STM32L1xx_HAL_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
 #define __STM32L1xx_HAL_VERSION         ((__STM32L1xx_HAL_VERSION_MAIN << 24)\
                                         |(__STM32L1xx_HAL_VERSION_SUB1 << 16)\
@@ -89,20 +73,21 @@
 
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
 
-/** @defgroup HAL_Private_Variables HAL Private Variables
+/* Exported variables --------------------------------------------------------*/
+/** @addtogroup HAL_Exported_Variables
   * @{
   */
-
 __IO uint32_t uwTick;
-
+uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid priority */
+uint32_t uwTickFreq = HAL_TICK_FREQ_DEFAULT;  /* 1KHz */
 /**
   * @}
   */
 
-/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
 /** @defgroup HAL_Exported_Functions HAL Exported Functions
   * @{
   */
@@ -115,13 +100,13 @@ __IO uint32_t uwTick;
               ##### Initialization and de-initialization functions #####
  ===============================================================================
    [..]  This section provides functions allowing to:
-      (+) Initializes the Flash interface, the NVIC allocation and initial clock 
+      (+) Initialize the Flash interface, the NVIC allocation and initial clock
           configuration. It initializes the source of time base also when timeout
           is needed and the backup domain when enabled.
-      (+) de-Initializes common part of the HAL.
+      (+) De-initialize common part of the HAL.
-      (+) Configure The time base source to have 1ms time base with a dedicated 
+      (+) Configure the time base source to have 1ms time base with a dedicated
           Tick interrupt priority.
-        (++) Systick timer is used by default as source of time base, but user 
+        (++) SysTick timer is used by default as source of time base, but user
              can eventually implement his proper time base source (a general purpose
              timer for example or other time source), keeping in mind that Time base
              duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
@@ -134,7 +119,7 @@ __IO uint32_t uwTick;
              peripheral ISR process, the Tick interrupt line must have higher priority
             (numerically lower) than the peripheral interrupt. Otherwise the caller
             ISR process will be blocked.
-       (++) functions affecting time base configurations are declared as __Weak  
+       (++) functions affecting time base configurations are declared as __weak
              to make  override possible  in case of other  implementations in user file.
 
 @endverbatim
@@ -143,7 +128,7 @@ __IO uint32_t uwTick;
 
 /**
   * @brief This function configures the Flash prefetch,
-  *        Configures time base source, NVIC and Low level hardware
+  *        configures time base source, NVIC and Low level hardware
   * @note This function is called at the beginning of program after reset and before
   *       the clock configuration
   * @note The time base configuration is based on MSI clock when exiting from Reset.
@@ -154,6 +139,8 @@ __IO uint32_t uwTick;
   */
 HAL_StatusTypeDef HAL_Init(void)
 {
+  HAL_StatusTypeDef  status = HAL_OK;
+
   /* Configure Flash prefetch */
 #if (PREFETCH_ENABLE != 0)
   __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
@@ -163,17 +150,22 @@ HAL_StatusTypeDef HAL_Init(void)
   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 
   /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
-  HAL_InitTick(TICK_INT_PRIORITY);
+  if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
-
+  {
+    status = HAL_ERROR;
+  }
+  else
+  {
     /* Init the low level hardware */
     HAL_MspInit();
+  }
 
   /* Return function status */
-  return HAL_OK;
+  return status;
 }
 
 /**
-  * @brief This function de-Initializes common part of the HAL and stops the source
+  * @brief This function de-initializes common part of the HAL and stops the source
   *        of time base.
   * @note This function is optional.
   * @retval HAL status
@@ -198,29 +190,29 @@ HAL_StatusTypeDef HAL_DeInit(void)
 }
 
 /**
-  * @brief  Initializes the MSP.
+  * @brief  Initialize the MSP.
   * @retval None
   */
 __weak void HAL_MspInit(void)
 {
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_MspInit could be implemented in the user file
    */
 }
 
 /**
-  * @brief  DeInitializes the MSP.
+  * @brief  DeInitialize the MSP.
   * @retval None
   */
 __weak void HAL_MspDeInit(void)
 {
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_MspDeInit could be implemented in the user file
    */
 }
 
 /**
-  * @brief This function configures the source of the time base. 
+  * @brief This function configures the source of the time base:
   *        The time source is configured to have 1ms time base with a dedicated
   *        Tick interrupt priority.
   * @note This function is called  automatically at the beginning of program after
@@ -228,23 +220,45 @@ __weak void HAL_MspDeInit(void)
   * @note In the default implementation, SysTick timer is the source of time base.
   *       It is used to generate interrupts at regular time intervals.
   *       Care must be taken if HAL_Delay() is called from a peripheral ISR process,
-  *       The the SysTick interrupt must have higher priority (numerically lower) 
+  *       The SysTick interrupt must have higher priority (numerically lower)
   *       than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
-  *       The function is declared as __Weak  to be overwritten  in case of other
+  *       The function is declared as __weak  to be overwritten  in case of other
   *       implementation  in user file.
-  * @param TickPriority: Tick interrupt priority.
+  * @param TickPriority Tick interrupt priority.
   * @retval HAL status
   */
 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 {
-  /*Configure the SysTick to have interrupt in 1ms time basis*/
+  HAL_StatusTypeDef  status = HAL_OK;
-  HAL_SYSTICK_Config(SystemCoreClock /1000);
 
+  if (uwTickFreq != 0U)
+  {
+    /*Configure the SysTick to have interrupt in 1ms time basis*/
+    if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
+    {
       /* Configure the SysTick IRQ priority */
-  HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        status = HAL_ERROR;
+      }
+    }
+    else
+    {
+      status = HAL_ERROR;
+    }
+  }
+  else
+  {
+    status = HAL_ERROR;
+  }
 
   /* Return function status */
-  return HAL_OK;
+  return status;
 }
 
 /**
@@ -266,9 +280,7 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
       (+) Get the HAL API driver version
       (+) Get the device identifier
       (+) Get the device revision identifier
-      (+) Enable/Disable Debug module during Sleep mode
+      (+) Get the unique device identifier
-      (+) Enable/Disable Debug module during STOP mode
-      (+) Enable/Disable Debug module during STANDBY mode
 
 @endverbatim
   * @{
@@ -278,18 +290,18 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
   * @brief This function is called to increment a global variable "uwTick"
   *        used as application time base.
   * @note In the default implementation, this variable is incremented each 1ms
-  *       in Systick ISR.
+  *       in SysTick ISR.
  * @note This function is declared as __weak to be overwritten in case of other
   *      implementations in user file.
   * @retval None
   */
 __weak void HAL_IncTick(void)
 {
-  uwTick++;
+  uwTick += uwTickFreq;
 }
 
 /**
-  * @brief Provides a tick value in millisecond.
+  * @brief Provide a tick value in millisecond.
   * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
   * @retval tick value
@@ -300,30 +312,88 @@ __weak uint32_t HAL_GetTick(void)
 }
 
 /**
-  * @brief This function provides accurate delay (in milliseconds) based 
+  * @brief This function returns a tick priority.
+  * @retval tick priority
+  */
+uint32_t HAL_GetTickPrio(void)
+{
+  return uwTickPrio;
+}
+
+/**
+  * @brief Set new tick Freq.
+  * @param Freq tick frequency
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq)
+{
+  HAL_StatusTypeDef status  = HAL_OK;
+  uint32_t prevTickFreq;
+
+  assert_param(IS_TICKFREQ(Freq));
+
+  if (uwTickFreq != Freq)
+  {
+    /* Back up uwTickFreq frequency */
+    prevTickFreq = uwTickFreq;
+
+    /* Update uwTickFreq global variable used by HAL_InitTick() */
+    uwTickFreq = Freq;
+
+   /* Apply the new tick Freq  */
+    status = HAL_InitTick(uwTickPrio);
+
+    if (status != HAL_OK)
+    {
+      /* Restore previous tick frequency */
+      uwTickFreq = prevTickFreq;
+    }
+  }
+
+  return status;
+}
+
+/**
+  * @brief Return tick frequency.
+  * @retval tick period in Hz
+  */
+uint32_t HAL_GetTickFreq(void)
+{
+  return uwTickFreq;
+}
+
+/**
+  * @brief This function provides minimum delay (in milliseconds) based
   *        on variable incremented.
   * @note In the default implementation , SysTick timer is the source of time base.
   *       It is used to generate interrupts at regular time intervals where uwTick
   *       is incremented.
-  * @note ThiS function is declared as __weak to be overwritten in case of other
+  * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
-  * @param Delay: specifies the delay time length, in milliseconds.
+  * @param Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
-__weak void HAL_Delay(__IO uint32_t Delay)
+__weak void HAL_Delay(uint32_t Delay)
 {
-  uint32_t tickstart = 0;
+  uint32_t tickstart = HAL_GetTick();
-  tickstart = HAL_GetTick();
+  uint32_t wait = Delay;
-  while((HAL_GetTick() - tickstart) < Delay)
+
+  /* Add a period to guaranty minimum wait */
+  if (wait < HAL_MAX_DELAY)
+  {
+    wait += (uint32_t)(uwTickFreq);
+  }
+
+  while((HAL_GetTick() - tickstart) < wait)
   {
   }
 }
 
 /**
-  * @brief Suspend Tick increment.
+  * @brief Suspend the Tick increment.
   * @note In the default implementation , SysTick timer is the source of time base. It is
   *       used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
-  *       is called, the the SysTick interrupt will be disabled and so Tick increment 
+  *       is called, the SysTick interrupt will be disabled and so Tick increment
   *       is suspended.
   * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
@@ -336,10 +406,10 @@ __weak void HAL_SuspendTick(void)
 }
 
 /**
-  * @brief Resume Tick increment.
+  * @brief Resume the Tick increment.
   * @note In the default implementation , SysTick timer is the source of time base. It is
   *       used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
-  *       is called, the the SysTick interrupt will be enabled and so Tick increment 
+  *       is called, the SysTick interrupt will be enabled and so Tick increment
   *       is resumed.
   * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
@@ -352,7 +422,7 @@ __weak void HAL_ResumeTick(void)
 }
 
 /**
-  * @brief Returns the HAL revision
+  * @brief Return the HAL revision
   * @retval version: 0xXYZR (8bits for each decimal, R for RC)
   */
 uint32_t HAL_GetHalVersion(void)
@@ -361,16 +431,16 @@ uint32_t HAL_GetHalVersion(void)
 }
 
 /**
-  * @brief Returns the device revision identifier.
+  * @brief Return the device revision identifier.
   * @retval Device revision identifier
   */
 uint32_t HAL_GetREVID(void)
 {
-  return((DBGMCU->IDCODE) >> 16);
+  return((DBGMCU->IDCODE) >> 16U);
 }
 
 /**
-  * @brief  Returns the device identifier.
+  * @brief  Return the device identifier.
   * @retval Device identifier
   */
 uint32_t HAL_GetDEVID(void)
@@ -378,6 +448,53 @@ uint32_t HAL_GetDEVID(void)
    return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
 }
 
+/**
+  * @brief  Return the first word of the unique device identifier (UID based on 96 bits)
+  * @retval Device identifier 31:0 bits
+  */
+uint32_t HAL_GetUIDw0(void)
+{
+  return(READ_REG(*((uint32_t *)UID_BASE)));
+}
+
+/**
+  * @brief  Return the second word of the unique device identifier (UID based on 96 bits)
+  * @retval Device identifier 63:32 bits
+  */
+uint32_t HAL_GetUIDw1(void)
+{
+  return(READ_REG(*((uint32_t *)(UID_BASE + 0x4U))));
+}
+
+/**
+  * @brief  Return the third word of the unique device identifier (UID based on 96 bits)
+  * @retval Device identifier 95:64 bits
+  */
+uint32_t HAL_GetUIDw2(void)
+{
+  return(READ_REG(*((uint32_t *)(UID_BASE + 0x14U))));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup HAL_Exported_Functions_Group3 DBGMCU Peripheral Control functions
+ *  @brief    DBGMCU Peripheral Control functions
+ *
+@verbatim
+ ===============================================================================
+                      ##### DBGMCU Peripheral Control functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) Enable/Disable Debug module during SLEEP mode
+      (+) Enable/Disable Debug module during STOP mode
+      (+) Enable/Disable Debug module during STANDBY mode
+
+@endverbatim
+  * @{
+  */
+
 /**
   * @brief  Enable the Debug Module during SLEEP mode
   * @retval None

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal.h

@@ -7,29 +7,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -55,10 +39,35 @@
 
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
+
 /** @defgroup HAL_Exported_Constants HAL Exported Constants
   * @{
   */
 
+/** @defgroup HAL_TICK_FREQ Tick Frequency
+  * @{
+  */
+#define  HAL_TICK_FREQ_10HZ         100U
+#define  HAL_TICK_FREQ_100HZ        10U
+#define  HAL_TICK_FREQ_1KHZ         1U
+#define  HAL_TICK_FREQ_DEFAULT      HAL_TICK_FREQ_1KHZ
+
+#define IS_TICKFREQ(__FREQ__) (((__FREQ__) == HAL_TICK_FREQ_10HZ)  || \
+                               ((__FREQ__) == HAL_TICK_FREQ_100HZ) || \
+                               ((__FREQ__) == HAL_TICK_FREQ_1KHZ))
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
+  * @{
+  */
+
 /** @defgroup SYSCFG_Constants SYSCFG: SYStem ConFiG
   * @{
   */
@@ -348,7 +357,7 @@
   * @}
   */
 
-/* Exported macro ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
 
 /** @defgroup HAL_Exported_Macros HAL Exported Macros
   * @{
@@ -494,21 +503,21 @@
 
 /**
   * @brief  Enables or disables the output of internal reference voltage
-  *         (VREFINT) on I/O pin.
+  *         (VrefInt) on I/O pin.
-  *         The VREFINT output can be routed to any I/O in group 3:
+  * @note   The VrefInt output can be routed to any I/O in group 3:
   *          - For Cat.1 and Cat.2 devices: CH8 (PB0) or CH9 (PB1).
   *          - For Cat.3 devices: CH8 (PB0), CH9 (PB1) or CH0b (PB2).
   *          - For Cat.4 and Cat.5 devices: CH8 (PB0), CH9 (PB1), CH0b (PB2),
   *            CH1b (PF11) or CH2b (PF12).
-  *         Note: Comparator peripheral clock must be preliminarility enabled,
+  *         Note: Comparator peripheral clock must be preliminarily enabled,
   *               either in COMP user function "HAL_COMP_MspInit()" (should be
   *               done if comparators are used) or by direct clock enable:
   *               Refer to macro "__HAL_RCC_COMP_CLK_ENABLE()".
-  *         Note: In addition with this macro, Vrefint output buffer must be 
+  *         Note: In addition with this macro, VrefInt output buffer must be
   *               connected to the selected I/O pin. Refer to macro
   *               "__HAL_RI_IOSWITCH_CLOSE()".
-  * @note  ENABLE: Internal reference voltage connected to I/O group 3
+  * @note  VrefInt output enable: Internal reference voltage connected to I/O group 3
-  * @note  DISABLE: Internal reference voltage disconnected from I/O group 3
+  *        VrefInt output disable: Internal reference voltage disconnected from I/O group 3
   * @retval None
   */
 #define __HAL_SYSCFG_VREFINT_OUT_ENABLE()       SET_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
@@ -586,13 +595,13 @@
 
 /**
   * @brief  Configures the routing interface to map Input Capture 1 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   *     e.g.
   *       __HAL_RI_REMAP_INPUTCAPTURE1(TIM_SELECT_TIM2, RI_INPUTCAPTUREROUTING_1)
@@ -616,13 +625,13 @@
 
 /**
   * @brief  Configures the routing interface to map Input Capture 2 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
@@ -636,13 +645,13 @@
 
 /**
   * @brief  Configures the routing interface to map Input Capture 3 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
@@ -656,13 +665,13 @@
 
 /**
   * @brief  Configures the routing interface to map Input Capture 4 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
@@ -700,7 +709,7 @@
 
 /*
   * @brief  Close or Open the routing interface Input Output switches.
-  * @param  __IOSWITCH__: selects the I/O analog switch number.
+  * @param  __IOSWITCH__ selects the I/O analog switch number.
   *   This parameter must be a value of @ref RI_IOSwitch
   * @retval None
   */
@@ -895,8 +904,18 @@
   * @}
   */
 
-/* Exported functions --------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+/** @defgroup HAL_Exported_Variables HAL Exported Variables
+  * @{
+  */
+extern __IO uint32_t uwTick;
+extern uint32_t uwTickPrio;
+extern uint32_t uwTickFreq;
+/**
+  * @}
+  */
 
+/* Exported functions --------------------------------------------------------*/
 /** @addtogroup HAL_Exported_Functions
   * @{
   */
@@ -922,13 +941,29 @@ HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
 
 /* Peripheral Control functions  ************************************************/
 void               HAL_IncTick(void);
-void              HAL_Delay(__IO uint32_t Delay);
+void               HAL_Delay(uint32_t Delay);
 uint32_t           HAL_GetTick(void);
+uint32_t           HAL_GetTickPrio(void);
+HAL_StatusTypeDef  HAL_SetTickFreq(uint32_t Freq);
+uint32_t           HAL_GetTickFreq(void);
 void               HAL_SuspendTick(void);
 void               HAL_ResumeTick(void);
 uint32_t           HAL_GetHalVersion(void);
 uint32_t           HAL_GetREVID(void);
 uint32_t           HAL_GetDEVID(void);
+uint32_t           HAL_GetUIDw0(void);
+uint32_t           HAL_GetUIDw1(void);
+uint32_t           HAL_GetUIDw2(void);
+
+/**
+  * @}
+  */
+
+/** @addtogroup HAL_Exported_Functions_Group3
+  * @{
+  */
+
+/* DBGMCU Peripheral Control functions  *****************************************/
 void              HAL_DBGMCU_EnableDBGSleepMode(void);
 void              HAL_DBGMCU_DisableDBGSleepMode(void);
 void              HAL_DBGMCU_EnableDBGStopMode(void);
@@ -944,7 +979,6 @@ void              HAL_DBGMCU_DisableDBGStandbyMode(void);
   * @}
   */
 
-
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_adc.c

@@ -250,33 +250,82 @@
 
     [..]
     
+    *** Callback registration ***
+    =============================================
+    [..]
+
+     The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
+     allows the user to configure dynamically the driver callbacks.
+     Use Functions @ref HAL_ADC_RegisterCallback()
+     to register an interrupt callback.
+    [..]
+
+     Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
+       (+) ConvCpltCallback               : ADC conversion complete callback
+       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
+       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
+       (+) ErrorCallback                  : ADC error callback
+       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
+       (+) MspInitCallback                : ADC Msp Init callback
+       (+) MspDeInitCallback              : ADC Msp DeInit callback
+     This function takes as parameters the HAL peripheral handle, the Callback ID
+     and a pointer to the user callback function.
+    [..]
+
+     Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
+     weak function.
+    [..]
+
+     @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
+     and the Callback ID.
+     This function allows to reset following callbacks:
+       (+) ConvCpltCallback               : ADC conversion complete callback
+       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
+       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
+       (+) ErrorCallback                  : ADC error callback
+       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
+       (+) MspInitCallback                : ADC Msp Init callback
+       (+) MspDeInitCallback              : ADC Msp DeInit callback
+     [..]
+
+     By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
+     all callbacks are set to the corresponding weak functions:
+     examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
+     Exception done for MspInit and MspDeInit functions that are
+     reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
+     these callbacks are null (not registered beforehand).
+    [..]
+
+     If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
+     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
+     [..]
+
+     Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
+     Exception done MspInit/MspDeInit functions that can be registered/unregistered
+     in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
+     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
+    [..]
+
+     Then, the user first registers the MspInit/MspDeInit user callbacks
+     using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
+     or @ref HAL_ADC_Init() function.
+     [..]
+
+     When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
+     not defined, the callback registration feature is not available and all callbacks
+     are set to the corresponding weak functions.
+  
   @endverbatim
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
@@ -377,7 +426,7 @@ static void ADC_DMAError(DMA_HandleTypeDef *hdma);
   * @note   This function configures the ADC within 2 scopes: scope of entire 
   *         ADC and scope of regular group. For parameters details, see comments 
   *         of structure "ADC_InitTypeDef".
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
@@ -440,8 +489,25 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
     /* Enable SYSCFG clock to control the routing Interface (RI) */
     __HAL_RCC_SYSCFG_CLK_ENABLE();
 
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+    /* Init the ADC Callback settings */
+    hadc->ConvCpltCallback              = HAL_ADC_ConvCpltCallback;                 /* Legacy weak callback */
+    hadc->ConvHalfCpltCallback          = HAL_ADC_ConvHalfCpltCallback;             /* Legacy weak callback */
+    hadc->LevelOutOfWindowCallback      = HAL_ADC_LevelOutOfWindowCallback;         /* Legacy weak callback */
+    hadc->ErrorCallback                 = HAL_ADC_ErrorCallback;                    /* Legacy weak callback */
+    hadc->InjectedConvCpltCallback      = HAL_ADCEx_InjectedConvCpltCallback;       /* Legacy weak callback */
+    
+    if (hadc->MspInitCallback == NULL)
+    {
+      hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit  */
+    }
+    
+    /* Init the low level hardware */
+    hadc->MspInitCallback(hadc);
+#else
     /* Init the low level hardware */
     HAL_ADC_MspInit(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
   }
   
   /* Configuration of ADC parameters if previous preliminary actions are      */ 
@@ -469,9 +535,9 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
     /*  - continuous conversion mode                                          */
     tmp_cr2 |= (hadc->Init.DataAlign                                           |
                 hadc->Init.EOCSelection                                        |
-                ADC_CR2_DMACONTREQ(hadc->Init.DMAContinuousRequests) |
+                ADC_CR2_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
                 hadc->Init.ChannelsBank                                        |
-                ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode)     );
+                ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)     );
 
     /* Enable external trigger if trigger selection is different of software  */
     /* start.                                                                 */
@@ -609,7 +675,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
   *         left commented below.
   *         If needed, the example code can be copied and uncommented into
   *         function HAL_ADC_MspDeInit().
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
@@ -728,8 +794,18 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
     /*  __HAL_RCC_ADC1_FORCE_RESET()                                          */
     /*  __HAL_RCC_ADC1_RELEASE_RESET()                                        */
     
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+    if (hadc->MspDeInitCallback == NULL)
+    {
+      hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit  */
+    }
+    
+    /* DeInit the low level hardware */
+    hadc->MspDeInitCallback(hadc);
+#else
     /* DeInit the low level hardware */
     HAL_ADC_MspDeInit(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
     
     /* Set ADC error code to none */
     ADC_CLEAR_ERRORCODE(hadc);
@@ -748,7 +824,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Initializes the ADC MSP.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
@@ -763,7 +839,7 @@ __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  DeInitializes the ADC MSP.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
@@ -776,6 +852,210 @@ __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
    */ 
 }
 
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  Register a User ADC Callback
+  *         To be used instead of the weak predefined callback
+  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
+  *                the configuration information for the specified ADC.
+  * @param  CallbackID ID of the callback to be registered
+  *         This parameter can be one of the following values:
+  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
+  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
+  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
+  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
+  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
+  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
+  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
+  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
+  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
+  * @param  pCallback pointer to the Callback function
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+  
+  if (pCallback == NULL)
+  {
+    /* Update the error code */
+    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+
+    return HAL_ERROR;
+  }
+  
+  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
+  {
+    switch (CallbackID)
+    {
+      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
+        hadc->ConvCpltCallback = pCallback;
+        break;
+      
+      case HAL_ADC_CONVERSION_HALF_CB_ID :
+        hadc->ConvHalfCpltCallback = pCallback;
+        break;
+      
+      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
+        hadc->LevelOutOfWindowCallback = pCallback;
+        break;
+      
+      case HAL_ADC_ERROR_CB_ID :
+        hadc->ErrorCallback = pCallback;
+        break;
+      
+      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
+        hadc->InjectedConvCpltCallback = pCallback;
+        break;
+      
+      case HAL_ADC_MSPINIT_CB_ID :
+        hadc->MspInitCallback = pCallback;
+        break;
+      
+      case HAL_ADC_MSPDEINIT_CB_ID :
+        hadc->MspDeInitCallback = pCallback;
+        break;
+      
+      default :
+        /* Update the error code */
+        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+
+        /* Return error status */
+        status = HAL_ERROR;
+        break;
+    }
+  }
+  else if (HAL_ADC_STATE_RESET == hadc->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_ADC_MSPINIT_CB_ID :
+        hadc->MspInitCallback = pCallback;
+        break;
+      
+      case HAL_ADC_MSPDEINIT_CB_ID :
+        hadc->MspDeInitCallback = pCallback;
+        break;
+      
+      default :
+        /* Update the error code */
+        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+      
+        /* Return error status */
+        status = HAL_ERROR;
+        break;
+    }
+  }
+  else
+  {
+    /* Update the error code */
+    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+    
+    /* Return error status */
+    status =  HAL_ERROR;
+  }
+  
+  return status;
+}
+
+/**
+  * @brief  Unregister a ADC Callback
+  *         ADC callback is redirected to the weak predefined callback
+  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
+  *                the configuration information for the specified ADC.
+  * @param  CallbackID ID of the callback to be unregistered
+  *         This parameter can be one of the following values:
+  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
+  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
+  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
+  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
+  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
+  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
+  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
+  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
+  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+  
+  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
+  {
+    switch (CallbackID)
+    {
+      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
+        hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
+        break;
+      
+      case HAL_ADC_CONVERSION_HALF_CB_ID :
+        hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
+        break;
+      
+      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
+        hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
+        break;
+      
+      case HAL_ADC_ERROR_CB_ID :
+        hadc->ErrorCallback = HAL_ADC_ErrorCallback;
+        break;
+      
+      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
+        hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback;
+        break;
+      
+      case HAL_ADC_MSPINIT_CB_ID :
+        hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit              */
+        break;
+      
+      case HAL_ADC_MSPDEINIT_CB_ID :
+        hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit            */
+        break;
+      
+      default :
+        /* Update the error code */
+        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+        
+        /* Return error status */
+        status =  HAL_ERROR;
+        break;
+    }
+  }
+  else if (HAL_ADC_STATE_RESET == hadc->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_ADC_MSPINIT_CB_ID :
+        hadc->MspInitCallback = HAL_ADC_MspInit;                   /* Legacy weak MspInit              */
+        break;
+        
+      case HAL_ADC_MSPDEINIT_CB_ID :
+        hadc->MspDeInitCallback = HAL_ADC_MspDeInit;               /* Legacy weak MspDeInit            */
+        break;
+        
+      default :
+        /* Update the error code */
+        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+        
+        /* Return error status */
+        status =  HAL_ERROR;
+        break;
+    }
+  }
+  else
+  {
+    /* Update the error code */
+    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+    
+    /* Return error status */
+    status =  HAL_ERROR;
+  }
+  
+  return status;
+}
+
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -805,7 +1085,7 @@ __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
 /**
   * @brief  Enables ADC, starts conversion of regular group.
   *         Interruptions enabled in this function: None.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
@@ -880,7 +1160,7 @@ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
   * @note:  ADC peripheral disable is forcing stop of potential 
   *         conversion on injected group. If injected group is under use, it
   *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
@@ -927,8 +1207,8 @@ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
   *         performed on each conversion. Nevertheless, polling can still 
   *         be performed on the complete sequence (ADC init
   *         parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  Timeout: Timeout value in millisecond.
+  * @param  Timeout Timeout value in millisecond.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
@@ -1016,12 +1296,12 @@ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Ti
 
 /**
   * @brief  Poll for conversion event.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  EventType: the ADC event type.
+  * @param  EventType the ADC event type.
   *          This parameter can be one of the following values:
   *            @arg ADC_AWD_EVENT: ADC Analog watchdog event.
   *            @arg ADC_OVR_EVENT: ADC Overrun event.
-  * @param  Timeout: Timeout value in millisecond.
+  * @param  Timeout Timeout value in millisecond.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
@@ -1091,7 +1371,7 @@ HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventTy
   *          - EOC (end of conversion of regular group)
   *          - overrun
   *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
@@ -1167,7 +1447,7 @@ HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
   * @brief  Stop ADC conversion of regular group (and injected group in 
   *         case of auto_injection mode), disable interrution of 
   *         end-of-conversion, disable ADC peripheral.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
@@ -1211,9 +1491,9 @@ HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
   *          - DMA half transfer
   *          - overrun
   *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  pData: The destination Buffer address.
+  * @param  pData The destination Buffer address.
-  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
+  * @param  Length The length of data to be transferred from ADC peripheral to memory.
   * @retval None
   */
 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
@@ -1313,7 +1593,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, ui
   * @note:  ADC peripheral disable is forcing stop of potential 
   *         conversion on injected group. If injected group is under use, it
   *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
@@ -1338,21 +1618,12 @@ HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
     
     /* Disable the DMA channel (in case of DMA in circular mode or stop while */
     /* DMA transfer is on going)                                              */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
+    HAL_DMA_Abort(hadc->DMA_Handle);
     
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
     /* Set ADC state */
     ADC_STATE_CLR_SET(hadc->State,
                       HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
                       HAL_ADC_STATE_READY);
-    }
-    else
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-    }
     
     /* Disable ADC overrun interrupt */
     __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
@@ -1381,7 +1652,7 @@ HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
   *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
   *         model polling: @ref HAL_ADC_PollForConversion() 
   *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval ADC group regular conversion data
   */
 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
@@ -1398,7 +1669,7 @@ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Handles ADC interrupt request  
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
@@ -1447,8 +1718,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
         }
       }
 
-      /* Conversion complete callback */
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+      hadc->ConvCpltCallback(hadc);
+#else
       HAL_ADC_ConvCpltCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
       
       /* Clear regular group conversion flag */
       __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
@@ -1490,8 +1764,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
         }
       }
 
-      /* Conversion complete callback */ 
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+      hadc->InjectedConvCpltCallback(hadc);
+#else
       HAL_ADCEx_InjectedConvCpltCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
       
       /* Clear injected group conversion flag */
       __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
@@ -1506,8 +1783,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
       /* Set ADC state */
       SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
       
-      /* Level out of window callback */ 
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+      hadc->LevelOutOfWindowCallback(hadc);
+#else
       HAL_ADC_LevelOutOfWindowCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
       
       /* Clear the ADC analog watchdog flag */
       __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
@@ -1529,8 +1809,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
       /* Clear ADC overrun flag */
       __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
       
-      /* Error callback */ 
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+      hadc->ErrorCallback(hadc);
+#else
       HAL_ADC_ErrorCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
       
       /* Clear the Overrun flag */
       __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
@@ -1541,7 +1824,7 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Conversion complete callback in non blocking mode 
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
@@ -1556,7 +1839,7 @@ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Conversion DMA half-transfer callback in non blocking mode 
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
@@ -1571,7 +1854,7 @@ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Analog watchdog callback in non blocking mode. 
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
@@ -1593,7 +1876,7 @@ __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
   *         - If needed, restart a new ADC conversion using function
   *           "HAL_ADC_Start_DMA()"
   *           (this function is also clearing overrun flag)
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
@@ -1641,8 +1924,8 @@ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
   *         The setting of these parameters is conditioned to ADC state.
   *         For parameters constraints, see comments of structure 
   *         "ADC_ChannelConfTypeDef".
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  sConfig: Structure of ADC channel for regular group.
+  * @param  sConfig Structure of ADC channel for regular group.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
@@ -1766,8 +2049,8 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
   *         Considering that registers write delay may happen due to
   *         bus activity, this might cause an uncertainty on the
   *         effective timing of the new programmed threshold values.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  AnalogWDGConfig: Structure of ADC analog watchdog configuration
+  * @param  AnalogWDGConfig Structure of ADC analog watchdog configuration
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
@@ -1854,7 +2137,7 @@ HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDG
 
 /**
   * @brief  return the ADC state
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL state
   */
 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
@@ -1865,7 +2148,7 @@ uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Return the ADC error code
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval ADC Error Code
   */
 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
@@ -1895,7 +2178,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
   *         flag ADC_FLAG_RDY is not usable.
   *         Therefore, this function must be called under condition of
   *         "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
@@ -1950,7 +2233,7 @@ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
   * @brief  Stop ADC conversion and disable the selected ADC
   * @note   Prerequisite condition to use this function: ADC conversions must be
   *         stopped to disable the ADC.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
@@ -1988,7 +2271,7 @@ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  DMA transfer complete callback. 
-  * @param  hdma: pointer to DMA handle.
+  * @param  hdma pointer to DMA handle.
   * @retval None
   */
 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
@@ -2029,7 +2312,11 @@ static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
     }
     
     /* Conversion complete callback */
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+    hadc->ConvCpltCallback(hadc);
+#else
     HAL_ADC_ConvCpltCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
   }
   else
   {
@@ -2040,7 +2327,7 @@ static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  DMA half transfer complete callback. 
-  * @param  hdma: pointer to DMA handle.
+  * @param  hdma pointer to DMA handle.
   * @retval None
   */
 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)   
@@ -2049,12 +2336,16 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
   ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
   
   /* Half conversion callback */
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+    hadc->ConvHalfCpltCallback(hadc);
+#else
   HAL_ADC_ConvHalfCpltCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
 }
 
 /**
   * @brief  DMA error callback 
-  * @param  hdma: pointer to DMA handle.
+  * @param  hdma pointer to DMA handle.
   * @retval None
   */
 static void ADC_DMAError(DMA_HandleTypeDef *hdma)   
@@ -2069,7 +2360,11 @@ static void ADC_DMAError(DMA_HandleTypeDef *hdma)
   SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
   
   /* Error callback */
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+  hadc->ErrorCallback(hadc);
+#else
   HAL_ADC_ErrorCallback(hadc);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
 }
 
 /**

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_adc.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -44,9 +28,6 @@
 /* Includes ------------------------------------------------------------------*/
 #include "stm32l1xx_hal_def.h"
 
-/* Include low level driver */
-#include "stm32l1xx_ll_adc.h"
-
 /** @addtogroup STM32L1xx_HAL_Driver
   * @{
   */
@@ -114,7 +95,7 @@ typedef struct
                                        This parameter can be a value of @ref ADC_ChannelsBank.
                                        Note: Banks availability depends on devices categories.
                                        Note: To change bank selection on the fly, without going through execution of 'HAL_ADC_Init()', macro '__HAL_ADC_CHANNELS_BANK()' can be used directly. */
-  uint32_t ContinuousConvMode;    /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
+  FunctionalState ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
                                        after the selected trigger occurred (software start or external trigger).
                                        This parameter can be set to ENABLE or DISABLE. */
 #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
@@ -126,7 +107,7 @@ typedef struct
                                        To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
                                        This parameter must be a number between Min_Data = 1 and Max_Data = 27. */
 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-  uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
+  FunctionalState DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
                                        Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
                                        Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
                                        This parameter can be set to ENABLE or DISABLE. */
@@ -140,7 +121,7 @@ typedef struct
   uint32_t ExternalTrigConvEdge;  /*!< Selects the external trigger edge of regular group.
                                        If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
                                        This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
-  uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
+  FunctionalState DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
                                        or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
                                        Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
                                        Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion).
@@ -189,7 +170,7 @@ typedef struct
   uint32_t Channel;           /*!< Selects which ADC channel to monitor by analog watchdog.
                                    This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
                                    This parameter can be a value of @ref ADC_channels. */
-  uint32_t ITMode;            /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
+  FunctionalState ITMode;     /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
                                    This parameter can be set to ENABLE or DISABLE */
   uint32_t HighThreshold;     /*!< Configures the ADC analog watchdog High threshold value.
                                    This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
@@ -237,7 +218,7 @@ typedef struct
 /**
   * @brief  ADC handle Structure definition
   */ 
-typedef struct
+typedef struct __ADC_HandleTypeDef
 {
   ADC_TypeDef                   *Instance;              /*!< Register base address */
 
@@ -252,7 +233,40 @@ typedef struct
   __IO uint32_t                 State;                  /*!< ADC communication state (bitmap of ADC states) */
 
   __IO uint32_t                 ErrorCode;              /*!< ADC Error code */
+
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+  void (* ConvCpltCallback)(struct __ADC_HandleTypeDef *hadc);              /*!< ADC conversion complete callback */
+  void (* ConvHalfCpltCallback)(struct __ADC_HandleTypeDef *hadc);          /*!< ADC conversion DMA half-transfer callback */
+  void (* LevelOutOfWindowCallback)(struct __ADC_HandleTypeDef *hadc);      /*!< ADC analog watchdog 1 callback */
+  void (* ErrorCallback)(struct __ADC_HandleTypeDef *hadc);                 /*!< ADC error callback */
+  void (* InjectedConvCpltCallback)(struct __ADC_HandleTypeDef *hadc);      /*!< ADC group injected conversion complete callback */       /*!< ADC end of sampling callback */
+  void (* MspInitCallback)(struct __ADC_HandleTypeDef *hadc);               /*!< ADC Msp Init callback */
+  void (* MspDeInitCallback)(struct __ADC_HandleTypeDef *hadc);             /*!< ADC Msp DeInit callback */
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
 }ADC_HandleTypeDef;
+
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL ADC Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_ADC_CONVERSION_COMPLETE_CB_ID     = 0x00U,  /*!< ADC conversion complete callback ID */
+  HAL_ADC_CONVERSION_HALF_CB_ID         = 0x01U,  /*!< ADC conversion DMA half-transfer callback ID */
+  HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID   = 0x02U,  /*!< ADC analog watchdog 1 callback ID */
+  HAL_ADC_ERROR_CB_ID                   = 0x03U,  /*!< ADC error callback ID */
+  HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID = 0x04U,  /*!< ADC group injected conversion complete callback ID */
+  HAL_ADC_MSPINIT_CB_ID                 = 0x09U,  /*!< ADC Msp Init callback ID          */
+  HAL_ADC_MSPDEINIT_CB_ID               = 0x0AU   /*!< ADC Msp DeInit callback ID        */
+} HAL_ADC_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL ADC Callback pointer definition
+  */
+typedef  void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to a ADC callback function */
+
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -273,6 +287,10 @@ typedef struct
                                                           enable/disable, erroneous state                       */
 #define HAL_ADC_ERROR_OVR         (0x02U)   /*!< Overrun error                                         */
 #define HAL_ADC_ERROR_DMA         (0x04U)   /*!< DMA transfer error                                    */
+
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+#define HAL_ADC_ERROR_INVALID_CALLBACK  (0x10U)   /*!< Invalid Callback error */
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
 /**
   * @}
   */
@@ -789,11 +807,20 @@ typedef struct
   (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
 
 /** @brief  Reset ADC handle state
-  * @param  __HANDLE__: ADC handle
+  * @param  __HANDLE__ ADC handle
   * @retval None
   */
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__)                               \
+  do{                                                                          \
+     (__HANDLE__)->State = HAL_ADC_STATE_RESET;                               \
+     (__HANDLE__)->MspInitCallback = NULL;                                     \
+     (__HANDLE__)->MspDeInitCallback = NULL;                                   \
+    } while(0)
+#else
 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__)                               \
   ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
+#endif
    
 /**
   * @}
@@ -1238,6 +1265,13 @@ HAL_StatusTypeDef       HAL_ADC_Init(ADC_HandleTypeDef* hadc);
 HAL_StatusTypeDef       HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
 void                    HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
 void                    HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
+
+#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+/* Callbacks Register/UnRegister functions  ***********************************/
+HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_adc_ex.c

@@ -8,7 +8,6 @@
   *           + Operation functions
   *             ++ Start, stop, get result of conversions of injected
   *                group, using 2 possible modes: polling, interruption.
-  *             ++ Calibration (ADC automatic self-calibration)
   *           + Control functions
   *             ++ Channels configuration on injected group
   *          Other functions (generic functions) are available in file 
@@ -23,29 +22,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -122,7 +105,7 @@
 /**
   * @brief  Enables ADC, starts conversion of injected group.
   *         Interruptions enabled in this function: None.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
@@ -194,7 +177,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
   * @note   If injected group mode auto-injection is enabled,
   *         function HAL_ADC_Stop must be used.
   * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
@@ -246,8 +229,8 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
 
 /**
   * @brief  Wait for injected group conversion to be completed.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  Timeout: Timeout value in millisecond.
+  * @param  Timeout Timeout value in millisecond.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
@@ -382,7 +365,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, u
   * @brief  Enables ADC, starts conversion of injected group with interruption.
   *          - JEOC (end of conversion of injected group)
   *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
@@ -457,7 +440,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
   *         injected and regular groups, and disable the ADC.
   * @note   If injected group mode auto-injection is enabled,
   *         function HAL_ADC_Stop must be used.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
@@ -529,8 +512,8 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
   *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
   *         model polling: @ref HAL_ADCEx_InjectedPollForConversion() 
   *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  InjectedRank: the converted ADC injected rank.
+  * @param  InjectedRank the converted ADC injected rank.
   *          This parameter can be one of the following values:
   *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
   *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
@@ -570,7 +553,7 @@ uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRa
 
 /**
   * @brief  Injected conversion complete callback in non blocking mode 
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
   * @retval None
   */
 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
@@ -610,8 +593,8 @@ __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
   *         "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
   *         The setting of these parameters is conditioned to ADC state: 
   *         this function must be called when ADC is not under conversion.
-  * @param  hadc: ADC handle
+  * @param  hadc ADC handle
-  * @param  sConfigInjected: Structure of ADC injected group and ADC channel for
+  * @param  sConfigInjected Structure of ADC injected group and ADC channel for
   *         injected group.
   * @retval None
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_adc_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -95,14 +79,14 @@ typedef struct
                                                This parameter must be a number between Min_Data = 1 and Max_Data = 4.
                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 
                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
-  uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
+  FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
                                                Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
                                                Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
                                                This parameter can be set to ENABLE or DISABLE.
                                                Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
                                                Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 
                                                         configure a channel on injected group can impact the configuration of other channels previously set. */
-  uint32_t AutoInjectedConv;              /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
+  FunctionalState AutoInjectedConv;       /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
                                                This parameter can be set to ENABLE or DISABLE.      
                                                Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
                                                Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_comp.c

@@ -85,34 +85,74 @@
 
       (#) De-initialize the comparator using HAL_COMP_DeInit() function
 
+    *** Callback registration ***
+    =============================================
+    [..]
+
+     The compilation flag USE_HAL_COMP_REGISTER_CALLBACKS, when set to 1,
+     allows the user to configure dynamically the driver callbacks.
+     Use Functions @ref HAL_COMP_RegisterCallback()
+     to register an interrupt callback.
+    [..]
+
+     Function @ref HAL_COMP_RegisterCallback() allows to register following callbacks:
+       (+) TriggerCallback       : callback for COMP trigger.
+       (+) MspInitCallback       : callback for Msp Init.
+       (+) MspDeInitCallback     : callback for Msp DeInit.
+     This function takes as parameters the HAL peripheral handle, the Callback ID
+     and a pointer to the user callback function.
+    [..]
+
+     Use function @ref HAL_COMP_UnRegisterCallback to reset a callback to the default
+     weak function.
+    [..]
+
+     @ref HAL_COMP_UnRegisterCallback takes as parameters the HAL peripheral handle,
+     and the Callback ID.
+     This function allows to reset following callbacks:
+       (+) TriggerCallback       : callback for COMP trigger.
+       (+) MspInitCallback       : callback for Msp Init.
+       (+) MspDeInitCallback     : callback for Msp DeInit.
+     [..]
+
+     By default, after the @ref HAL_COMP_Init() and when the state is @ref HAL_COMP_STATE_RESET
+     all callbacks are set to the corresponding weak functions:
+     example @ref HAL_COMP_TriggerCallback().
+     Exception done for MspInit and MspDeInit functions that are
+     reset to the legacy weak functions in the @ref HAL_COMP_Init()/ @ref HAL_COMP_DeInit() only when
+     these callbacks are null (not registered beforehand).
+    [..]
+
+     If MspInit or MspDeInit are not null, the @ref HAL_COMP_Init()/ @ref HAL_COMP_DeInit()
+     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
+     [..]
+
+     Callbacks can be registered/unregistered in @ref HAL_COMP_STATE_READY state only.
+     Exception done MspInit/MspDeInit functions that can be registered/unregistered
+     in @ref HAL_COMP_STATE_READY or @ref HAL_COMP_STATE_RESET state,
+     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
+    [..]
+
+     Then, the user first registers the MspInit/MspDeInit user callbacks
+     using @ref HAL_COMP_RegisterCallback() before calling @ref HAL_COMP_DeInit()
+     or @ref HAL_COMP_Init() function.
+     [..]
+
+     When the compilation flag USE_HAL_COMP_REGISTER_CALLBACKS is set to 0 or
+     not defined, the callback registration feature is not available and all callbacks
+     are set to the corresponding weak functions.
 
   @endverbatim
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
@@ -230,7 +270,7 @@
   *         parameters in the COMP_InitTypeDef and create the associated handle.
   * @note   If the selected comparator is locked, initialization can't be performed.
   *         To unlock the configuration, perform a system reset.
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
@@ -278,8 +318,21 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
       /* Enable SYSCFG clock to control the routing Interface (RI) */
       __HAL_RCC_SYSCFG_CLK_ENABLE();
       
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+      /* Init the COMP Callback settings */
+      hcomp->TriggerCallback = HAL_COMP_TriggerCallback; /* Legacy weak callback */
+
+      if (hcomp->MspInitCallback == NULL)
+      {
+        hcomp->MspInitCallback = HAL_COMP_MspInit; /* Legacy weak MspInit  */
+      }
+      
+      /* Init the low level hardware */
+      hcomp->MspInitCallback(hcomp);
+#else
       /* Init the low level hardware */
       HAL_COMP_MspInit(hcomp);
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
     }
   
     /* Configuration of comparator:                                           */
@@ -335,6 +388,19 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
     /*   "__HAL_RI_SWITCH_COMP1_SW1_CLOSE()"), connection between pin PC3     */
     /*    (or OPAMP3, if available) and COMP1 is done directly, without going */
     /*    through ADC switch matrix.                                          */
+#if defined(COMP_CSR_SW1)
+    if(READ_BIT(COMP->CSR, COMP_CSR_SW1) != RESET)
+    {
+      if(hcomp->Init.NonInvertingInput != COMP_NONINVERTINGINPUT_PC3)
+      {
+        /* Case of switch COMP1_SW1 closed and non-inverting input different of PC3:
+           setting of another input is not possible (issue of pin shorted with PC3) */
+        status = HAL_ERROR;
+      }
+    }
+    else
+#endif
+    {
       if (__COMP_ROUTING_INTERFACE_TOBECONFIGURED(hcomp))
       {
         if (hcomp->Instance == COMP1)
@@ -351,6 +417,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
         /* non-inverting input selected.                                        */
         __HAL_RI_IOSWITCH_CLOSE(hcomp->Init.NonInvertingInput);
       }
+    }
 
     
     /* Initialize the COMP state*/
@@ -368,7 +435,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
   * @brief  DeInitializes the COMP peripheral 
   * @note   Deinitialization can't be performed if the COMP configuration is locked.
   *         To unlock the configuration, perform a system reset.
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
@@ -418,8 +485,18 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
     }
 
 
-    /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+    if (hcomp->MspDeInitCallback == NULL)
+    {
+      hcomp->MspDeInitCallback = HAL_COMP_MspDeInit; /* Legacy weak MspDeInit  */
+    }
+    
+    /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
+    hcomp->MspDeInitCallback(hcomp);
+#else
+    /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK, NVIC */
     HAL_COMP_MspDeInit(hcomp);
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
 
     hcomp->State = HAL_COMP_STATE_RESET;
 
@@ -432,7 +509,7 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Initializes the COMP MSP.
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval None
   */
 __weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
@@ -447,7 +524,7 @@ __weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  DeInitializes COMP MSP.
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval None
   */
 __weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
@@ -460,6 +537,166 @@ __weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
    */
 }
 
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  Register a User COMP Callback
+  *         To be used instead of the weak predefined callback
+  * @param  hcomp Pointer to a COMP_HandleTypeDef structure that contains
+  *                the configuration information for the specified COMP.
+  * @param  CallbackID ID of the callback to be registered
+  *         This parameter can be one of the following values:
+  *          @arg @ref HAL_COMP_TRIGGER_CB_ID Trigger callback ID
+  *          @arg @ref HAL_COMP_MSPINIT_CB_ID MspInit callback ID
+  *          @arg @ref HAL_COMP_MSPDEINIT_CB_ID MspDeInit callback ID
+  * @param  pCallback pointer to the Callback function
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+  
+  if (pCallback == NULL)
+  {
+    /* Update the error code */
+    hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+
+    return HAL_ERROR;
+  }
+  
+  if (HAL_COMP_STATE_READY == hcomp->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_COMP_TRIGGER_CB_ID :
+        hcomp->TriggerCallback = pCallback;
+        break;
+      
+      case HAL_COMP_MSPINIT_CB_ID :
+        hcomp->MspInitCallback = pCallback;
+        break;
+      
+      case HAL_COMP_MSPDEINIT_CB_ID :
+        hcomp->MspDeInitCallback = pCallback;
+        break;
+      
+      default :
+        /* Update the error code */
+        hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+        
+        /* Return error status */
+        status = HAL_ERROR;
+        break;
+    }
+  }
+  else if (HAL_COMP_STATE_RESET == hcomp->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_COMP_MSPINIT_CB_ID :
+        hcomp->MspInitCallback = pCallback;
+        break;
+      
+      case HAL_COMP_MSPDEINIT_CB_ID :
+        hcomp->MspDeInitCallback = pCallback;
+        break;
+      
+      default :
+        /* Update the error code */
+        hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+        
+        /* Return error status */
+        status = HAL_ERROR;
+        break;
+    }
+  }
+  else
+  {
+    /* Update the error code */
+    hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+    
+    /* Return error status */
+    status =  HAL_ERROR;
+  }
+  
+  return status;
+}
+
+/**
+  * @brief  Unregister a COMP Callback
+  *         COMP callback is redirected to the weak predefined callback
+  * @param  hcomp Pointer to a COMP_HandleTypeDef structure that contains
+  *                the configuration information for the specified COMP.
+  * @param  CallbackID ID of the callback to be unregistered
+  *         This parameter can be one of the following values:
+  *          @arg @ref HAL_COMP_TRIGGER_CB_ID Trigger callback ID
+  *          @arg @ref HAL_COMP_MSPINIT_CB_ID MspInit callback ID
+  *          @arg @ref HAL_COMP_MSPDEINIT_CB_ID MspDeInit callback ID
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  if (HAL_COMP_STATE_READY == hcomp->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_COMP_TRIGGER_CB_ID :
+        hcomp->TriggerCallback = HAL_COMP_TriggerCallback;         /* Legacy weak callback */
+        break;
+      
+      case HAL_COMP_MSPINIT_CB_ID :
+        hcomp->MspInitCallback = HAL_COMP_MspInit;                 /* Legacy weak MspInit */
+        break;
+
+      case HAL_COMP_MSPDEINIT_CB_ID :
+        hcomp->MspDeInitCallback = HAL_COMP_MspDeInit;             /* Legacy weak MspDeInit */
+        break;
+
+      default :
+        /* Update the error code */
+        hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+
+        /* Return error status */
+        status =  HAL_ERROR;
+        break;
+    }
+  }
+  else if (HAL_COMP_STATE_RESET == hcomp->State)
+  {
+    switch (CallbackID)
+    {
+      case HAL_COMP_MSPINIT_CB_ID :
+        hcomp->MspInitCallback = HAL_COMP_MspInit;                 /* Legacy weak MspInit */
+        break;
+
+      case HAL_COMP_MSPDEINIT_CB_ID :
+        hcomp->MspDeInitCallback = HAL_COMP_MspDeInit;             /* Legacy weak MspDeInit */
+        break;
+
+      default :
+        /* Update the error code */
+        hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+
+        /* Return error status */
+        status =  HAL_ERROR;
+        break;
+    }
+  }
+  else
+  {
+    /* Update the error code */
+    hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
+
+    /* Return error status */
+    status =  HAL_ERROR;
+  }
+
+  return status;
+}
+
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -481,7 +718,7 @@ __weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Start the comparator 
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
@@ -541,7 +778,7 @@ HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Stop the comparator 
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
@@ -577,7 +814,7 @@ HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Enables the interrupt and starts the comparator
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status.
   */
 HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp)
@@ -627,7 +864,7 @@ HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Disable the interrupt and Stop the comparator 
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp)
@@ -644,7 +881,7 @@ HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Comparator IRQ Handler 
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
@@ -657,8 +894,12 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
     /* Clear COMP EXTI pending bit */
     WRITE_REG(EXTI->PR, extiline);
 
-    /* COMP trigger user callback */
+    /* COMP trigger callback */
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+    hcomp->TriggerCallback(hcomp);
+#else
     HAL_COMP_TriggerCallback(hcomp);    
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
   }
 }
 
@@ -686,7 +927,7 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
   * @brief  Lock the selected comparator configuration.
   *         Caution: On STM32L1, HAL COMP lock is software lock only (not  
   *         hardware lock as on some other STM32 devices)
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
@@ -729,7 +970,7 @@ HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
   *             voltage than the inverting input
   *           - Comparator output is high when the non-inverting input is at a higher
   *             voltage than the inverting input
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval Returns the selected comparator output level: COMP_OUTPUTLEVEL_LOW or COMP_OUTPUTLEVEL_HIGH.
   *       
   */
@@ -754,8 +995,8 @@ uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
 }
 
 /**
-  * @brief  Comparator callback.
+  * @brief  Comparator trigger callback.
-  * @param  hcomp: COMP handle
+  * @param  hcomp COMP handle
   * @retval None
   */
 __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
@@ -789,7 +1030,7 @@ __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
 
 /**
   * @brief  Return the COMP state
-  * @param  hcomp : COMP handle
+  * @param  hcomp  COMP handle
   * @retval HAL state
   */
 HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
@@ -805,6 +1046,20 @@ HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
 
   return hcomp->State;
 }
+
+/**
+  * @brief  Return the COMP error code.
+  * @param hcomp COMP handle
+  * @retval COMP error code
+  */
+uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp)
+{
+  /* Check the parameters */
+  assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
+  
+  return hcomp->ErrorCode;
+}
+
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_comp.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
@@ -111,14 +95,38 @@ typedef enum
 /** 
   * @brief  COMP Handle Structure definition  
   */ 
-typedef struct
+typedef struct __COMP_HandleTypeDef
 {
   COMP_TypeDef       *Instance;       /*!< Register base address    */
   COMP_InitTypeDef   Init;            /*!< COMP required parameters */
   HAL_LockTypeDef    Lock;            /*!< Locking object           */
   __IO HAL_COMP_StateTypeDef  State;  /*!< COMP communication state */
+  __IO uint32_t      ErrorCode;       /*!< COMP Error code */
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+  void (* TriggerCallback)(struct __COMP_HandleTypeDef *hcomp);   /*!< COMP trigger callback */
+  void (* MspInitCallback)(struct __COMP_HandleTypeDef *hcomp);   /*!< COMP Msp Init callback */
+  void (* MspDeInitCallback)(struct __COMP_HandleTypeDef *hcomp); /*!< COMP Msp DeInit callback */
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
 } COMP_HandleTypeDef;
 
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL COMP Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_COMP_TRIGGER_CB_ID                = 0x00U,  /*!< COMP trigger callback ID */
+  HAL_COMP_MSPINIT_CB_ID                = 0x01U,  /*!< COMP Msp Init callback ID */
+  HAL_COMP_MSPDEINIT_CB_ID              = 0x02U   /*!< COMP Msp DeInit callback ID */
+} HAL_COMP_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL COMP Callback pointer definition
+  */
+typedef  void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer to a COMP callback function */
+
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -128,6 +136,17 @@ typedef struct
   * @{
   */
 
+/** @defgroup COMP_Error_Code COMP Error Code
+  * @{
+  */
+#define HAL_COMP_ERROR_NONE             (0x00U)   /*!< No error */
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+#define HAL_COMP_ERROR_INVALID_CALLBACK (0x01U)   /*!< Invalid Callback error */
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
 /** @defgroup COMP_Output COMP Output
   * @{
   */
@@ -270,15 +289,34 @@ typedef struct
   * @{
   */
 
+/** @defgroup COMP_Handle_Management  COMP Handle Management
+  * @{
+  */
+
 /** @brief Reset COMP handle state
-  * @param  __HANDLE__: COMP handle.
+  * @param  __HANDLE__ COMP handle.
   * @retval None
   */
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{                                                   \
+                                                     (__HANDLE__)->State = HAL_COMP_STATE_RESET;      \
+                                                     (__HANDLE__)->MspInitCallback = NULL;            \
+                                                     (__HANDLE__)->MspDeInitCallback = NULL;          \
+                                                    } while(0)
+#else
 #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
+#endif
+
+/**
+  * @brief Clear COMP error code (set it to no error code "HAL_COMP_ERROR_NONE").
+  * @param __HANDLE__ COMP handle
+  * @retval None
+  */
+#define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE) 
 
 /**
   * @brief Enables the specified comparator
-  * @param  __HANDLE__: COMP handle.
+  * @param  __HANDLE__ COMP handle.
   * @retval None.
   */
 #define __HAL_COMP_ENABLE(__HANDLE__)                                          \
@@ -291,7 +329,7 @@ typedef struct
 
 /**
   * @brief Disables the specified comparator
-  * @param  __HANDLE__: COMP handle.
+  * @param  __HANDLE__ COMP handle.
   * @retval None.
   */
 #define __HAL_COMP_DISABLE(__HANDLE__)                                         \
@@ -303,8 +341,8 @@ typedef struct
   )
 
 /** @brief  Checks whether the specified COMP flag is set or not.
-  * @param  __HANDLE__: specifies the COMP Handle.
+  * @param  __HANDLE__ specifies the COMP Handle.
-  * @param  __FLAG__: specifies the flag to check.
+  * @param  __FLAG__ specifies the flag to check.
   *        This parameter can be one of the following values:
   *            @arg COMP_FLAG_LOCK:  lock flag
   * @retval The new state of __FLAG__ (TRUE or FALSE).
@@ -491,7 +529,7 @@ typedef struct
 
 /**
   * @brief  Get the specified EXTI line for a comparator instance
-  * @param  __INSTANCE__: specifies the COMP instance.
+  * @param  __INSTANCE__ specifies the COMP instance.
   * @retval value of @ref COMP_ExtiLineEvent
   */
 #define COMP_GET_EXTI_LINE(__INSTANCE__)                                       \
@@ -552,6 +590,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
 HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
 void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
 void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
+
+#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
+/* Callbacks Register/UnRegister functions  ***********************************/
+HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -587,6 +632,7 @@ void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
   * @{
   */
 HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
+uint32_t              HAL_COMP_GetError(COMP_HandleTypeDef *hcomp);
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_comp_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
@@ -76,7 +60,7 @@
 #define COMP_NONINVERTINGINPUT_PA3      RI_IOSWITCH_CH3         /*!< I/O pin PA3 connection to COMP1 non-inverting input */
 #define COMP_NONINVERTINGINPUT_PA4      RI_IOSWITCH_CH4         /*!< I/O pin PA4 connection to COMP1 non-inverting input */
 #define COMP_NONINVERTINGINPUT_PA5      RI_IOSWITCH_CH5         /*!< I/O pin PA5 connection to COMP1 non-inverting input */
-#define COMP_NONINVERTINGINPUT_PA6      RI_IOSWITCH_CH5         /*!< I/O pin PA5 connection to COMP1 non-inverting input */
+#define COMP_NONINVERTINGINPUT_PA6      RI_IOSWITCH_CH6         /*!< I/O pin PA6 connection to COMP1 non-inverting input */
 #define COMP_NONINVERTINGINPUT_PA7      RI_IOSWITCH_CH7         /*!< I/O pin PA7 connection to COMP1 non-inverting input */
 #define COMP_NONINVERTINGINPUT_PB0      RI_IOSWITCH_CH8         /*!< I/O pin PB0 connection to COMP1 non-inverting input */
 #define COMP_NONINVERTINGINPUT_PB1      RI_IOSWITCH_CH9         /*!< I/O pin PB1 connection to COMP1 non-inverting input */
@@ -296,7 +280,7 @@
 /**
   * @brief Specifies whether Routing Interface (RI) needs to be configured for 
   * switches of comparator non-inverting input.
-  * @param  __HANDLE__: COMP handle.
+  * @param  __HANDLE__ COMP handle.
   * @retval None.
   */
 #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cortex.c

@@ -70,29 +70,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -166,7 +150,7 @@
 /**
   * @brief  Sets the priority grouping field (pre-emption priority and subpriority)
   *         using the required unlock sequence.
-  * @param  PriorityGroup: The priority grouping bits length. 
+  * @param  PriorityGroup The priority grouping bits length. 
   *         This parameter can be one of the following values:
   *         @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
   *                                    4 bits for subpriority
@@ -193,13 +177,13 @@ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 
 /**
   * @brief  Sets the priority of an interrupt.
-  * @param  IRQn: External interrupt number
+  * @param  IRQn External interrupt number
   *         This parameter can be an enumerator of IRQn_Type enumeration
   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xx.h))
-  * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
+  * @param  PreemptPriority The pre-emption priority for the IRQn channel.
   *         This parameter can be a value between 0 and 15
   *         A lower priority value indicates a higher priority 
-  * @param  SubPriority: the subpriority level for the IRQ channel.
+  * @param  SubPriority the subpriority level for the IRQ channel.
   *         This parameter can be a value between 0 and 15
   *         A lower priority value indicates a higher priority.          
   * @retval None
@@ -264,7 +248,7 @@ void HAL_NVIC_SystemReset(void)
 /**
   * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
   *         Counter is in free running mode to generate periodic interrupts.
-  * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
+  * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
   * @retval status:  - 0  Function succeeded.
   *                  - 1  Function failed.
   */
@@ -295,7 +279,7 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 #if (__MPU_PRESENT == 1)
 /**
   * @brief  Enable the MPU.
-  * @param  MPU_Control: Specifies the control mode of the MPU during hard fault, 
+  * @param  MPU_Control Specifies the control mode of the MPU during hard fault, 
   *          NMI, FAULTMASK and privileged accessto the default memory 
   *          This parameter can be one of the following values:
   *            @arg MPU_HFNMI_PRIVDEF_NONE
@@ -329,7 +313,7 @@ void HAL_MPU_Disable(void)
 
 /**
   * @brief  Initializes and configures the Region and the memory to be protected.
-  * @param  MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
+  * @param  MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
   *                the initialization and configuration information.
   * @retval None
   */
@@ -385,10 +369,10 @@ uint32_t HAL_NVIC_GetPriorityGrouping(void)
 
 /**
   * @brief  Gets the priority of an interrupt.
-  * @param  IRQn: External interrupt number
+  * @param  IRQn External interrupt number
   *         This parameter can be an enumerator of IRQn_Type enumeration
   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l1xxxx.h))
-  * @param   PriorityGroup: the priority grouping bits length.
+  * @param  PriorityGroup the priority grouping bits length.
   *         This parameter can be one of the following values:
   *           @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
   *                                      4 bits for subpriority
@@ -400,8 +384,8 @@ uint32_t HAL_NVIC_GetPriorityGrouping(void)
   *                                      1 bits for subpriority
   *           @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
   *                                      0 bits for subpriority
-  * @param  pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
+  * @param  pPreemptPriority Pointer on the Preemptive priority value (starting from 0).
-  * @param  pSubPriority: Pointer on the Subpriority value (starting from 0).
+  * @param  pSubPriority Pointer on the Subpriority value (starting from 0).
   * @retval None
   */
 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
@@ -469,7 +453,7 @@ uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
 
 /**
   * @brief  Configures the SysTick clock source.
-  * @param  CLKSource: specifies the SysTick clock source.
+  * @param  CLKSource specifies the SysTick clock source.
   *         This parameter can be one of the following values:
   *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
   *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cortex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_crc.c

@@ -0,0 +1,330 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_crc.c
+  * @author  MCD Application Team
+  * @brief   CRC HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
+  *           + Initialization and de-initialization functions
+  *           + Peripheral Control functions
+  *           + Peripheral State functions
+  *
+  @verbatim
+ ===============================================================================
+                     ##### How to use this driver #####
+ ===============================================================================
+    [..]
+         (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
+         (+) Initialize CRC calculator
+             (++) specify generating polynomial (peripheral default or non-default one)
+             (++) specify initialization value (peripheral default or non-default one)
+             (++) specify input data format
+             (++) specify input or output data inversion mode if any
+         (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the
+             input data buffer starting with the previously computed CRC as
+             initialization value
+         (+) Use HAL_CRC_Calculate() function to compute the CRC value of the
+             input data buffer starting with the defined initialization value
+             (default or non-default) to initiate CRC calculation
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup CRC CRC
+  * @brief CRC HAL module driver.
+  * @{
+  */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup CRC_Exported_Functions CRC Exported Functions
+  * @{
+  */
+
+/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
+ *  @brief    Initialization and Configuration functions.
+ *
+@verbatim
+ ===============================================================================
+            ##### Initialization and de-initialization functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) Initialize the CRC according to the specified parameters
+          in the CRC_InitTypeDef and create the associated handle
+      (+) DeInitialize the CRC peripheral
+      (+) Initialize the CRC MSP (MCU Specific Package)
+      (+) DeInitialize the CRC MSP
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Initialize the CRC according to the specified
+  *         parameters in the CRC_InitTypeDef and create the associated handle.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
+{
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  if (hcrc->State == HAL_CRC_STATE_RESET)
+  {
+    /* Allocate lock resource and initialize it */
+    hcrc->Lock = HAL_UNLOCKED;
+    /* Init the low level hardware */
+    HAL_CRC_MspInit(hcrc);
+  }
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @brief  DeInitialize the CRC peripheral.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  /* Check the CRC peripheral state */
+  if (hcrc->State == HAL_CRC_STATE_BUSY)
+  {
+    return HAL_BUSY;
+  }
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Reset CRC calculation unit */
+  __HAL_CRC_DR_RESET(hcrc);
+
+  /* Reset IDR register content */
+  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
+
+  /* DeInit the low level hardware */
+  HAL_CRC_MspDeInit(hcrc);
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_RESET;
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hcrc);
+
+  /* Return function status */
+  return HAL_OK;
+}
+
+/**
+  * @brief  Initializes the CRC MSP.
+  * @param  hcrc CRC handle
+  * @retval None
+  */
+__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hcrc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_CRC_MspInit can be implemented in the user file
+   */
+}
+
+/**
+  * @brief  DeInitialize the CRC MSP.
+  * @param  hcrc CRC handle
+  * @retval None
+  */
+__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hcrc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_CRC_MspDeInit can be implemented in the user file
+   */
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
+ *  @brief    management functions.
+ *
+@verbatim
+ ===============================================================================
+                      ##### Peripheral Control functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) compute the 32-bit CRC value of a 32-bit data buffer
+          using combination of the previous CRC value and the new one.
+
+       [..]  or
+
+      (+) compute the 32-bit CRC value of a 32-bit data buffer
+          independently of the previous CRC value.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
+  *         starting with the previously computed CRC as initialization value.
+  * @param  hcrc CRC handle
+  * @param  pBuffer pointer to the input data buffer.
+  * @param  BufferLength input data buffer length (number of uint32_t words).
+  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
+  */
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+{
+  uint32_t index;      /* CRC input data buffer index */
+  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Enter Data to the CRC calculator */
+  for (index = 0U; index < BufferLength; index++)
+  {
+    hcrc->Instance->DR = pBuffer[index];
+  }
+  temp = hcrc->Instance->DR;
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return the CRC computed value */
+  return temp;
+}
+
+/**
+  * @brief  Compute the 32-bit CRC value of a 32-bit data buffer
+  *         starting with hcrc->Instance->INIT as initialization value.
+  * @param  hcrc CRC handle
+  * @param  pBuffer pointer to the input data buffer.
+  * @param  BufferLength input data buffer length (number of uint32_t words).
+  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
+  */
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
+{
+  uint32_t index;      /* CRC input data buffer index */
+  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_BUSY;
+
+  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
+  *  written in hcrc->Instance->DR) */
+  __HAL_CRC_DR_RESET(hcrc);
+
+  /* Enter 32-bit input data to the CRC calculator */
+  for (index = 0U; index < BufferLength; index++)
+  {
+    hcrc->Instance->DR = pBuffer[index];
+  }
+  temp = hcrc->Instance->DR;
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+
+  /* Return the CRC computed value */
+  return temp;
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
+ *  @brief    Peripheral State functions.
+ *
+@verbatim
+ ===============================================================================
+                      ##### Peripheral State functions #####
+ ===============================================================================
+    [..]
+    This subsection permits to get in run-time the status of the peripheral.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Return the CRC handle state.
+  * @param  hcrc CRC handle
+  * @retval HAL state
+  */
+HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
+{
+  /* Return CRC handle state */
+  return hcrc->State;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+#endif /* HAL_CRC_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_crc.h

@@ -0,0 +1,184 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_crc.h
+  * @author  MCD Application Team
+  * @brief   Header file of CRC HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_CRC_H
+#define STM32L1xx_HAL_CRC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup CRC
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup CRC_Exported_Types CRC Exported Types
+  * @{
+  */
+
+/**
+  * @brief  CRC HAL State Structure definition
+  */
+typedef enum
+{
+  HAL_CRC_STATE_RESET     = 0x00U,  /*!< CRC not yet initialized or disabled */
+  HAL_CRC_STATE_READY     = 0x01U,  /*!< CRC initialized and ready for use   */
+  HAL_CRC_STATE_BUSY      = 0x02U,  /*!< CRC internal process is ongoing     */
+  HAL_CRC_STATE_TIMEOUT   = 0x03U,  /*!< CRC timeout state                   */
+  HAL_CRC_STATE_ERROR     = 0x04U   /*!< CRC error state                     */
+} HAL_CRC_StateTypeDef;
+
+
+/**
+  * @brief  CRC Handle Structure definition
+  */
+typedef struct
+{
+  CRC_TypeDef                 *Instance;   /*!< Register base address        */
+
+  HAL_LockTypeDef             Lock;        /*!< CRC Locking object           */
+
+  __IO HAL_CRC_StateTypeDef   State;       /*!< CRC communication state      */
+
+} CRC_HandleTypeDef;
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Constants CRC Exported Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup CRC_Exported_Macros CRC Exported Macros
+  * @{
+  */
+
+/** @brief Reset CRC handle state.
+  * @param  __HANDLE__ CRC handle.
+  * @retval None
+  */
+#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
+
+/**
+  * @brief  Reset CRC Data Register.
+  * @param  __HANDLE__ CRC handle
+  * @retval None
+  */
+#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
+
+/**
+  * @brief Store data in the Independent Data (ID) register.
+  * @param __HANDLE__ CRC handle
+  * @param __VALUE__  Value to be stored in the ID register
+  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
+  * @retval None
+  */
+#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
+
+/**
+  * @brief Return the data stored in the Independent Data (ID) register.
+  * @param __HANDLE__ CRC handle
+  * @note  Refer to the Reference Manual to get the authorized __VALUE__ length in bits
+  * @retval Value of the ID register
+  */
+#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
+/**
+  * @}
+  */
+
+
+/* Private macros --------------------------------------------------------*/
+/** @defgroup  CRC_Private_Macros CRC Private Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CRC_Exported_Functions CRC Exported Functions
+  * @{
+  */
+
+/* Initialization and de-initialization functions  ****************************/
+/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
+HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
+/**
+  * @}
+  */
+
+/* Peripheral Control functions ***********************************************/
+/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
+  * @{
+  */
+uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
+/**
+  * @}
+  */
+
+/* Peripheral State and Error functions ***************************************/
+/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
+  * @{
+  */
+HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L1xx_HAL_CRC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp.c

@@ -68,29 +68,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */ 
@@ -172,7 +156,7 @@ static void               CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t
 /**
   * @brief  Initializes the CRYP according to the specified
   *         parameters in the CRYP_InitTypeDef and creates the associated handle.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval HAL status
   */
@@ -232,7 +216,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  DeInitializes the CRYP peripheral. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval HAL status
   */
@@ -272,7 +256,7 @@ HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  Initializes the CRYP MSP.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -287,7 +271,7 @@ __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  DeInitializes CRYP MSP.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -326,12 +310,12 @@ __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB encryption mode
   *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value 
+  * @param  Timeout Specify Timeout value 
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
@@ -402,12 +386,12 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pP
 /**
   * @brief  Initializes the CRYP peripheral in AES CBC encryption mode
   *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
+  * @param  Timeout Specify Timeout value  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
@@ -481,12 +465,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pP
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR encryption mode
   *         then encrypt pPlainData. The cypher data are available in pCypherData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
+  * @param  Timeout Specify Timeout value  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
@@ -560,12 +544,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pP
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB decryption mode
   *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
+  * @param  Timeout Specify Timeout value  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
@@ -636,12 +620,12 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pC
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB decryption mode
   *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value  
+  * @param  Timeout Specify Timeout value  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
@@ -715,12 +699,12 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pC
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR decryption mode
   *         then decrypted pCypherData. The cypher data are available in pPlainData
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Timeout: Specify Timeout value   
+  * @param  Timeout Specify Timeout value   
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
@@ -781,11 +765,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pC
 
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -867,11 +851,11 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -956,11 +940,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -1045,11 +1029,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1131,11 +1115,11 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CBC decryption mode using IT.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1220,11 +1204,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1309,11 +1293,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -1374,11 +1358,11 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -1442,11 +1426,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16.
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16.
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@@ -1511,11 +1495,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1580,11 +1564,11 @@ HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16 bytes
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1652,11 +1636,11 @@ HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+  * @param  pCypherData Pointer to the cyphertext buffer (aligned on u32)
-  * @param  Size: Length of the plaintext buffer, must be a multiple of 16
+  * @param  Size Length of the plaintext buffer, must be a multiple of 16
-  * @param  pPlainData: Pointer to the plaintext buffer (aligned on u32)
+  * @param  pPlainData Pointer to the plaintext buffer (aligned on u32)
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@@ -1741,7 +1725,7 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  CRYP error callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -1757,7 +1741,7 @@ HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t
 
 /**
   * @brief  Input transfer completed callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -1773,7 +1757,7 @@ __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  Output transfer completed callback.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -1806,7 +1790,7 @@ __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  This function handles CRYP interrupt request.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */
@@ -1873,7 +1857,7 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  Returns the CRYP state.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval HAL state
   */
@@ -1896,7 +1880,7 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
 
 /**
   * @brief  IT function called under interruption context to continue encryption or decryption
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval HAL status
   */
@@ -1955,7 +1939,7 @@ static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
 }
 /**
   * @brief  DMA CRYP Input Data process complete callback.
-  * @param  hdma: DMA handle
+  * @param  hdma DMA handle
   * @retval None
   */
 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)  
@@ -1971,7 +1955,7 @@ static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  DMA CRYP Output Data process complete callback.
-  * @param  hdma: DMA handle
+  * @param  hdma DMA handle
   * @retval None
   */
 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
@@ -1997,7 +1981,7 @@ static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  DMA CRYP communication error callback. 
-  * @param  hdma: DMA handle
+  * @param  hdma DMA handle
   * @retval None
   */
 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
@@ -2009,9 +1993,9 @@ static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  Writes the Key in Key registers. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  Key: Pointer to Key buffer
+  * @param  Key Pointer to Key buffer
   * @note Key must be written as little endian.
   *         If Key pointer points at address n, 
   *         n[15:0] contains key[96:127], 
@@ -2035,9 +2019,9 @@ static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key)
 
 /**
   * @brief  Writes the InitVector/InitCounter in IV registers. 
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  InitVector: Pointer to InitVector/InitCounter buffer
+  * @param  InitVector Pointer to InitVector/InitCounter buffer
   * @note Init Vector must be written as little endian.
   *         If Init Vector pointer points at address n, 
   *         n[15:0] contains Vector[96:127], 
@@ -2061,12 +2045,12 @@ static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
 
 /**
   * @brief  Process Data: Writes Input data in polling mode and reads the output data
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  Input: Pointer to the Input buffer
+  * @param  Input Pointer to the Input buffer
-  * @param  Ilength: Length of the Input buffer, must be a multiple of 16.
+  * @param  Ilength Length of the Input buffer, must be a multiple of 16.
-  * @param  Output: Pointer to the returned buffer
+  * @param  Output Pointer to the returned buffer
-  * @param  Timeout: Specify Timeout value  
+  * @param  Timeout Specify Timeout value  
   * @retval None
   */
 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
@@ -2128,11 +2112,11 @@ static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* In
 
 /**
   * @brief  Set the DMA configuration and start the DMA transfer
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
-  * @param  inputaddr: address of the Input buffer
+  * @param  inputaddr address of the Input buffer
-  * @param  Size: Size of the Input buffer, must be a multiple of 16.
+  * @param  Size Size of the Input buffer, must be a multiple of 16.
-  * @param  outputaddr: address of the Output buffer
+  * @param  outputaddr address of the Output buffer
   * @retval None
   */
 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 
@@ -213,14 +197,14 @@ typedef struct
   */
 
 /** @brief Reset CRYP handle state
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
   * @retval None
   */
 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
 
 /**
   * @brief  Enable/Disable the CRYP peripheral.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
   * @retval None
   */
 #define __HAL_CRYP_ENABLE(__HANDLE__)                   SET_BIT((__HANDLE__)->Instance->CR, AES_CR_EN)
@@ -228,16 +212,16 @@ typedef struct
 
 /**
   * @brief  Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC,...
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __MODE__: The algorithm mode.
+  * @param  __MODE__ The algorithm mode.
   * @retval None
   */
 #define __HAL_CRYP_SET_MODE(__HANDLE__,__MODE__)        SET_BIT((__HANDLE__)->Instance->CR, (__MODE__))
 
 
 /** @brief  Check whether the specified CRYP flag is set or not.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __FLAG__: specifies the flag to check.
+  * @param  __FLAG__ specifies the flag to check.
   *         This parameter can be one of the following values:
   *            @arg CRYP_FLAG_CCF   : Computation Complete Flag
   *            @arg CRYP_FLAG_RDERR : Read Error Flag
@@ -247,8 +231,8 @@ typedef struct
 #define __HAL_CRYP_GET_FLAG(__HANDLE__,__FLAG__)         (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
 
 /** @brief  Clear the CRYP pending flag.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __FLAG__: specifies the flag to clear.
+  * @param  __FLAG__ specifies the flag to clear.
   *         This parameter can be one of the following values:
   *            @arg CRYP_CLEARFLAG_CCF   : Computation Complete Clear Flag
   *            @arg CRYP_CLEARFLAG_RDERR : Read Error Clear
@@ -259,22 +243,22 @@ typedef struct
 
 /**
   * @brief  Enable the CRYP interrupt.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __INTERRUPT__: CRYP Interrupt.
+  * @param  __INTERRUPT__ CRYP Interrupt.
   * @retval None
   */
 #define __HAL_CRYP_ENABLE_IT(__HANDLE__,__INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
 
 /**
   * @brief  Disable the CRYP interrupt.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __INTERRUPT__: CRYP interrupt.
+  * @param  __INTERRUPT__ CRYP interrupt.
   * @retval None
   */
 #define __HAL_CRYP_DISABLE_IT(__HANDLE__,__INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
 
 /** @brief  Checks if the specified CRYP interrupt source is enabled or disabled.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
   * @param __INTERRUPT__: CRYP interrupt source to check
   *         This parameter can be one of the following values:
   *            @arg CRYP_IT_CC   : Computation Complete interrupt
@@ -287,8 +271,8 @@ typedef struct
     )
          
 /** @brief  Clear the CRYP pending IT.
-  * @param  __HANDLE__: specifies the CRYP handle.
+  * @param  __HANDLE__ specifies the CRYP handle.
-  * @param  __IT__: specifies the IT to clear.
+  * @param  __IT__ specifies the IT to clear.
   *         This parameter can be one of the following values:
   *            @arg CRYP_CLEARFLAG_CCF   : Computation Complete Clear Flag
   *            @arg CRYP_CLEARFLAG_RDERR : Read Error Clear

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp_ex.c

@@ -11,29 +11,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */ 
@@ -82,7 +66,7 @@
 
 /**
   * @brief  Computation completed callbacks.
-  * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+  * @param  hcryp pointer to a CRYP_HandleTypeDef structure that contains
   *         the configuration information for CRYP module
   * @retval None
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_cryp_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_dac.h

@@ -0,0 +1,467 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_dac.h
+  * @author  MCD Application Team
+  * @brief   Header file of DAC HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_DAC_H
+#define STM32L1xx_HAL_DAC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+#if defined(DAC1)
+
+/** @addtogroup DAC
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup DAC_Exported_Types DAC Exported Types
+  * @{
+  */
+
+/**
+  * @brief  HAL State structures definition
+  */
+typedef enum
+{
+  HAL_DAC_STATE_RESET             = 0x00U,  /*!< DAC not yet initialized or disabled  */
+  HAL_DAC_STATE_READY             = 0x01U,  /*!< DAC initialized and ready for use    */
+  HAL_DAC_STATE_BUSY              = 0x02U,  /*!< DAC internal processing is ongoing   */
+  HAL_DAC_STATE_TIMEOUT           = 0x03U,  /*!< DAC timeout state                    */
+  HAL_DAC_STATE_ERROR             = 0x04U   /*!< DAC error state                      */
+
+} HAL_DAC_StateTypeDef;
+
+/**
+  * @brief  DAC handle Structure definition
+  */
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+typedef struct __DAC_HandleTypeDef
+#else
+typedef struct
+#endif
+{
+  DAC_TypeDef                 *Instance;     /*!< Register base address             */
+
+  __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
+
+  HAL_LockTypeDef             Lock;          /*!< DAC locking object                */
+
+  DMA_HandleTypeDef           *DMA_Handle1;  /*!< Pointer DMA handler for channel 1 */
+
+  DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */
+
+  __IO uint32_t               ErrorCode;     /*!< DAC Error code                    */
+
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+  void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+  void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+  void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+  void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
+  void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+  void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+  void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+  void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
+
+  void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
+  void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+
+} DAC_HandleTypeDef;
+
+
+/**
+  * @brief   DAC Configuration regular Channel structure definition
+  */
+typedef struct
+{
+  uint32_t DAC_Trigger;                  /*!< Specifies the external trigger for the selected DAC channel.
+                                              This parameter can be a value of @ref DAC_trigger_selection */
+
+  uint32_t DAC_OutputBuffer;             /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
+                                               This parameter can be a value of @ref DAC_output_buffer */
+
+} DAC_ChannelConfTypeDef;
+
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL DAC Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_DAC_CH1_COMPLETE_CB_ID                 = 0x00U,  /*!< DAC CH1 Complete Callback ID      */
+  HAL_DAC_CH1_HALF_COMPLETE_CB_ID            = 0x01U,  /*!< DAC CH1 half Complete Callback ID */
+  HAL_DAC_CH1_ERROR_ID                       = 0x02U,  /*!< DAC CH1 error Callback ID         */
+  HAL_DAC_CH1_UNDERRUN_CB_ID                 = 0x03U,  /*!< DAC CH1 underrun Callback ID      */
+  HAL_DAC_CH2_COMPLETE_CB_ID                 = 0x04U,  /*!< DAC CH2 Complete Callback ID      */
+  HAL_DAC_CH2_HALF_COMPLETE_CB_ID            = 0x05U,  /*!< DAC CH2 half Complete Callback ID */
+  HAL_DAC_CH2_ERROR_ID                       = 0x06U,  /*!< DAC CH2 error Callback ID         */
+  HAL_DAC_CH2_UNDERRUN_CB_ID                 = 0x07U,  /*!< DAC CH2 underrun Callback ID      */
+  HAL_DAC_MSPINIT_CB_ID                      = 0x08U,  /*!< DAC MspInit Callback ID           */
+  HAL_DAC_MSPDEINIT_CB_ID                    = 0x09U,  /*!< DAC MspDeInit Callback ID         */
+  HAL_DAC_ALL_CB_ID                          = 0x0AU   /*!< DAC All ID                        */
+} HAL_DAC_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL DAC Callback pointer definition
+  */
+typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup DAC_Exported_Constants DAC Exported Constants
+  * @{
+  */
+
+/** @defgroup DAC_Error_Code DAC Error Code
+  * @{
+  */
+#define  HAL_DAC_ERROR_NONE              0x00U    /*!< No error                          */
+#define  HAL_DAC_ERROR_DMAUNDERRUNCH1    0x01U    /*!< DAC channel1 DMA underrun error   */
+#define  HAL_DAC_ERROR_DMAUNDERRUNCH2    0x02U    /*!< DAC channel2 DMA underrun error   */
+#define  HAL_DAC_ERROR_DMA               0x04U    /*!< DMA error                         */
+#define  HAL_DAC_ERROR_TIMEOUT           0x08U    /*!< Timeout error                     */
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+#define HAL_DAC_ERROR_INVALID_CALLBACK   0x10U    /*!< Invalid callback error            */
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_trigger_selection DAC trigger selection
+  * @{
+  */
+#define DAC_TRIGGER_NONE                0x00000000U                                                      /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
+#define DAC_TRIGGER_T6_TRGO             (DAC_CR_TEN1)                                                    /*!< Conversion started by software trigger for DAC channel */
+#define DAC_TRIGGER_T7_TRGO             (                 DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
+#define DAC_TRIGGER_T9_TRGO             (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */
+#define DAC_TRIGGER_T2_TRGO             (DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
+#define DAC_TRIGGER_T4_TRGO             (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
+#define DAC_TRIGGER_EXT_IT9             (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
+#define DAC_TRIGGER_SOFTWARE            (DAC_CR_TSEL1                                     | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_output_buffer DAC output buffer
+  * @{
+  */
+#define DAC_OUTPUTBUFFER_ENABLE            0x00000000U
+#define DAC_OUTPUTBUFFER_DISABLE           (DAC_CR_BOFF1)
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_Channel_selection DAC Channel selection
+  * @{
+  */
+#define DAC_CHANNEL_1                      0x00000000U
+#define DAC_CHANNEL_2                      0x00000010U
+/**
+  * @}
+  */
+
+/** @defgroup DAC_data_alignment DAC data alignment
+  * @{
+  */
+#define DAC_ALIGN_12B_R                    0x00000000U
+#define DAC_ALIGN_12B_L                    0x00000004U
+#define DAC_ALIGN_8B_R                     0x00000008U
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_flags_definition DAC flags definition
+  * @{
+  */
+#define DAC_FLAG_DMAUDR1                   (DAC_SR_DMAUDR1)
+#define DAC_FLAG_DMAUDR2                   (DAC_SR_DMAUDR2)
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_IT_definition  DAC IT definition
+  * @{
+  */
+#define DAC_IT_DMAUDR1                   (DAC_SR_DMAUDR1)
+#define DAC_IT_DMAUDR2                   (DAC_SR_DMAUDR2)
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/** @defgroup DAC_Exported_Macros DAC Exported Macros
+  * @{
+  */
+
+/** @brief Reset DAC handle state.
+  * @param  __HANDLE__ specifies the DAC handle.
+  * @retval None
+  */
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
+                                                      (__HANDLE__)->State             = HAL_DAC_STATE_RESET; \
+                                                      (__HANDLE__)->MspInitCallback   = NULL;                  \
+                                                      (__HANDLE__)->MspDeInitCallback = NULL;                  \
+                                                     } while(0)
+#else
+#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+
+/** @brief Enable the DAC channel.
+  * @param  __HANDLE__ specifies the DAC handle.
+  * @param  __DAC_Channel__ specifies the DAC channel
+  * @retval None
+  */
+#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
+  ((__HANDLE__)->Instance->CR |=  (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
+
+/** @brief Disable the DAC channel.
+  * @param  __HANDLE__ specifies the DAC handle
+  * @param  __DAC_Channel__ specifies the DAC channel.
+  * @retval None
+  */
+#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
+  ((__HANDLE__)->Instance->CR &=  ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
+
+/** @brief Set DHR12R1 alignment.
+  * @param  __ALIGNMENT__ specifies the DAC alignment
+  * @retval None
+  */
+#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
+
+/** @brief  Set DHR12R2 alignment.
+  * @param  __ALIGNMENT__ specifies the DAC alignment
+  * @retval None
+  */
+#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__))
+
+/** @brief  Set DHR12RD alignment.
+  * @param  __ALIGNMENT__ specifies the DAC alignment
+  * @retval None
+  */
+#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
+
+/** @brief Enable the DAC interrupt.
+  * @param  __HANDLE__ specifies the DAC handle
+  * @param  __INTERRUPT__ specifies the DAC interrupt.
+  *          This parameter can be any combination of the following values:
+  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
+  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
+  * @retval None
+  */
+#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
+
+/** @brief Disable the DAC interrupt.
+  * @param  __HANDLE__ specifies the DAC handle
+  * @param  __INTERRUPT__ specifies the DAC interrupt.
+  *          This parameter can be any combination of the following values:
+  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
+  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
+  * @retval None
+  */
+#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
+
+/** @brief  Check whether the specified DAC interrupt source is enabled or not.
+  * @param __HANDLE__ DAC handle
+  * @param __INTERRUPT__ DAC interrupt source to check
+  *          This parameter can be any combination of the following values:
+  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
+  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
+  * @retval State of interruption (SET or RESET)
+  */
+#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
+
+/** @brief  Get the selected DAC's flag status.
+  * @param  __HANDLE__ specifies the DAC handle.
+  * @param  __FLAG__ specifies the DAC flag to get.
+  *          This parameter can be any combination of the following values:
+  *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
+  *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
+  * @retval None
+  */
+#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
+
+/** @brief  Clear the DAC's flag.
+  * @param  __HANDLE__ specifies the DAC handle.
+  * @param  __FLAG__ specifies the DAC flag to clear.
+  *          This parameter can be any combination of the following values:
+  *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
+  *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
+  * @retval None
+  */
+#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
+
+/**
+  * @}
+  */
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup DAC_Private_Macros DAC Private Macros
+  * @{
+  */
+#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
+                                           ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
+
+#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
+                                 ((CHANNEL) == DAC_CHANNEL_2))
+
+#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
+                             ((ALIGN) == DAC_ALIGN_12B_L) || \
+                             ((ALIGN) == DAC_ALIGN_8B_R))
+
+#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
+
+/**
+  * @}
+  */
+
+/* Include DAC HAL Extended module */
+#include "stm32l1xx_hal_dac_ex.h"
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup DAC_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup DAC_Exported_Functions_Group1
+  * @{
+  */
+/* Initialization and de-initialization functions *****************************/
+HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
+HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
+void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
+void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
+
+/**
+  * @}
+  */
+
+/** @addtogroup DAC_Exported_Functions_Group2
+  * @{
+  */
+/* IO operation functions *****************************************************/
+HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
+HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
+HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
+                                    uint32_t Alignment);
+HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
+
+void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
+
+HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
+
+void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
+void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
+void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
+void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
+
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+/* DAC callback registering/unregistering */
+HAL_StatusTypeDef     HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
+                                               pDAC_CallbackTypeDef pCallback);
+HAL_StatusTypeDef     HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/** @addtogroup DAC_Exported_Functions_Group3
+  * @{
+  */
+/* Peripheral Control functions ***********************************************/
+uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
+
+HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
+/**
+  * @}
+  */
+
+/** @addtogroup DAC_Exported_Functions_Group4
+  * @{
+  */
+/* Peripheral State and Error functions ***************************************/
+HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
+uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup DAC_Private_Functions DAC Private Functions
+  * @{
+  */
+void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
+void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
+void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* DAC1 */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /*STM32L1xx_HAL_DAC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_dac_ex.c

@@ -3,9 +3,8 @@
   * @file    stm32l1xx_hal_dac_ex.c
   * @author  MCD Application Team
   * @brief   DAC HAL module driver.
-  *         This file provides firmware functions to manage the following 
+  *          This file provides firmware functions to manage the extended
-  *         functionalities of DAC extension peripheral:
+  *          functionalities of the DAC peripheral.
-  *           + Extended features functions
   *
   *
   @verbatim
@@ -13,9 +12,15 @@
                       ##### How to use this driver #####
   ==============================================================================
     [..]
-      (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) :
+     *** Dual mode IO operation ***
+     ==============================
+      (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
           Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
-          HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.  
+          HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
+          Channel 1 and Channel 2.
+
+     *** Signal generation operation ***
+     ===================================
       (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
       (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
 
@@ -23,29 +28,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -58,26 +47,28 @@
   * @{
   */
 
+#ifdef HAL_DAC_MODULE_ENABLED
+
+#if defined(DAC1)
+
 /** @defgroup DACEx DACEx
-  * @brief DAC driver modules
+  * @brief DAC Extended HAL module driver
   * @{
   */
 
-#ifdef HAL_DAC_MODULE_ENABLED
-
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
 
 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
   * @{
   */
 
-/** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
+/** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
- *  @brief    Extended features functions 
+  *  @brief    Extended IO operation functions
   *
 @verbatim
   ==============================================================================
@@ -96,31 +87,14 @@
   */
 
 /**
-  * @brief  Returns the last data output value of the selected DAC channel.
+  * @brief  Enable or disable the selected DAC channel wave generation.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
-  * @retval The selected DAC channel data output value.
+  * @param  Channel The selected DAC channel.
-  */
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
-{
-  uint32_t tmp = 0;
-  
-  tmp |= hdac->Instance->DOR1;
-  
-  tmp |= hdac->Instance->DOR2 << 16;
-  
-  /* Returns the DAC channel data output register value */
-  return tmp;
-}
-
-/**
-  * @brief  Enables or disables the selected DAC channel wave generation.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
   *          This parameter can be one of the following values:
-  *            DAC_CHANNEL_1 / DAC_CHANNEL_2
+  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @param  Amplitude: Select max triangle amplitude. 
+  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
+  * @param  Amplitude Select max triangle amplitude.
   *          This parameter can be one of the following values:
   *            @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
   *            @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
@@ -148,8 +122,8 @@ HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_BUSY;
 
-  /* Enable the selected wave generation for the selected DAC channel */
+  /* Enable the triangle wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
+  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
 
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_READY;
@@ -162,13 +136,14 @@ HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32
 }
 
 /**
-  * @brief  Enables or disables the selected DAC channel wave generation.
+  * @brief  Enable or disable the selected DAC channel wave generation.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
-  * @param  Channel: The selected DAC channel. 
+  * @param  Channel The selected DAC channel.
   *          This parameter can be one of the following values:
-  *            DAC_CHANNEL_1 / DAC_CHANNEL_2
+  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @param  Amplitude: Unmask DAC channel LFSR for noise wave generation. 
+  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
+  * @param  Amplitude Unmask DAC channel LFSR for noise wave generation.
   *          This parameter can be one of the following values:
   *            @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
   *            @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
@@ -196,8 +171,8 @@ HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_BUSY;
 
-  /* Enable the selected wave generation for the selected DAC channel */
+  /* Enable the noise wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
+  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
 
   /* Change DAC state */
   hdac->State = HAL_DAC_STATE_READY;
@@ -211,22 +186,23 @@ HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t
 
 /**
   * @brief  Set the specified data holding register value for dual DAC channel.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *               the configuration information for the specified DAC.
-  * @param  Alignment: Specifies the data alignment for dual channel DAC.
+  * @param  Alignment Specifies the data alignment for dual channel DAC.
   *          This parameter can be one of the following values:
   *            DAC_ALIGN_8B_R: 8bit right data alignment selected
   *            DAC_ALIGN_12B_L: 12bit left data alignment selected
   *            DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
+  * @param  Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
-  * @param  Data2: Data for DAC Channel1 to be loaded in the selected data  holding register.
+  * @param  Data2 Data for DAC Channel2 to be loaded in the selected data  holding register.
   * @note   In dual mode, a unique register access is required to write in both
   *          DAC channels at the same time.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
 {
-  uint32_t data = 0, tmp = 0;
+  uint32_t data;
+  uint32_t tmp;
 
   /* Check the parameters */
   assert_param(IS_DAC_ALIGN(Alignment));
@@ -236,11 +212,11 @@ HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Align
   /* Calculate and set dual DAC data holding register value */
   if (Alignment == DAC_ALIGN_8B_R)
   {
-    data = ((uint32_t)Data2 << 8) | Data1; 
+    data = ((uint32_t)Data2 << 8U) | Data1;
   }
   else
   {
-    data = ((uint32_t)Data2 << 16) | Data1;
+    data = ((uint32_t)Data2 << 16U) | Data1;
   }
 
   tmp = (uint32_t)hdac->Instance;
@@ -253,10 +229,9 @@ HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Align
   return HAL_OK;
 }
 
-
 /**
-  * @brief  Conversion complete callback in non blocking mode for Channel2 
+  * @brief  Conversion complete callback in non-blocking mode for Channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
   * @retval None
   */
@@ -265,14 +240,14 @@ __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hdac);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
    */
 }
 
 /**
-  * @brief  Conversion half DMA transfer callback in non blocking mode for Channel2 
+  * @brief  Conversion half DMA transfer callback in non-blocking mode for Channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
   * @retval None
   */
@@ -281,14 +256,14 @@ __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hdac);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
    */
 }
 
 /**
   * @brief  Error DAC callback for Channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
   * @retval None
   */
@@ -297,14 +272,14 @@ __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hdac);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
    */
 }
 
 /**
-  * @brief  DMA underrun DAC callback for channel2.
+  * @brief  DMA underrun DAC callback for Channel2.
-  * @param  hdac: pointer to a DAC_HandleTypeDef structure that contains
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
   *         the configuration information for the specified DAC.
   * @retval None
   */
@@ -313,11 +288,47 @@ __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hdac);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
+            the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
    */
 }
 
+/**
+  * @}
+  */
+
+/** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
+  *  @brief    Extended Peripheral Control functions
+  *
+@verbatim
+  ==============================================================================
+             ##### Peripheral Control functions #####
+  ==============================================================================
+    [..]  This section provides functions allowing to:
+      (+) Set the specified data holding register value for DAC channel.
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Return the last data output value of the selected DAC channel.
+  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
+  *         the configuration information for the specified DAC.
+  * @retval The selected DAC channel data output value.
+  */
+uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
+{
+  uint32_t tmp = 0U;
+
+  tmp |= hdac->Instance->DOR1;
+
+  tmp |= hdac->Instance->DOR2 << 16U;
+
+  /* Returns the DAC channel data output register value */
+  return tmp;
+}
+
 /**
   * @}
   */
@@ -326,12 +337,15 @@ __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
   * @}
   */
 
-/** @defgroup DACEx_Private_Functions DACEx Private Functions
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup DACEx_Private_Functions DACEx private functions
+  *  @brief    Extended private functions
    * @{
   */
+
 /**
   * @brief  DMA conversion complete callback.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *                the configuration information for the specified DMA module.
   * @retval None
   */
@@ -339,14 +353,18 @@ void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
 {
   DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+  hdac->ConvCpltCallbackCh2(hdac);
+#else
   HAL_DACEx_ConvCpltCallbackCh2(hdac);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 
   hdac->State = HAL_DAC_STATE_READY;
 }
 
 /**
   * @brief  DMA half transfer complete callback.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *                the configuration information for the specified DMA module.
   * @retval None
   */
@@ -354,12 +372,16 @@ void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
 {
   DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
   /* Conversion complete callback */
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+  hdac->ConvHalfCpltCallbackCh2(hdac);
+#else
   HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 }
 
 /**
-  * @brief  DMA error callback 
+  * @brief  DMA error callback.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *                the configuration information for the specified DMA module.
   * @retval None
   */
@@ -370,7 +392,11 @@ void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
   /* Set DAC error code to DMA error */
   hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
 
+#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
+  hdac->ErrorCallbackCh2(hdac);
+#else
   HAL_DACEx_ErrorCallbackCh2(hdac);
+#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 
   hdac->State = HAL_DAC_STATE_READY;
 }
@@ -379,12 +405,14 @@ void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
   * @}
   */
 
+/**
+  * @}
+  */
+
+#endif /* DAC1 */
+
 #endif /* HAL_DAC_MODULE_ENABLED */
 
-/**
-  * @}
-  */
-
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_dac_ex.h

@@ -0,0 +1,201 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_dac_ex.h
+  * @author  MCD Application Team
+  * @brief   Header file of DAC HAL Extended module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_DAC_EX_H
+#define STM32L1xx_HAL_DAC_EX_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+#if defined(DAC1)
+
+/** @addtogroup DACEx
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+
+/**
+  * @brief  HAL State structures definition
+  */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
+  * @{
+  */
+
+/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangle amplitude
+  * @{
+  */
+#define DAC_LFSRUNMASK_BIT0                0x00000000U                                                         /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
+#define DAC_LFSRUNMASK_BITS1_0             (                                                   DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS2_0             (                                  DAC_CR_MAMP1_1                 ) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS3_0             (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS4_0             (                 DAC_CR_MAMP1_2                                  ) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS5_0             (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS6_0             (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS7_0             (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS8_0             (DAC_CR_MAMP1_3                                                   ) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS9_0             (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS10_0            (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
+#define DAC_LFSRUNMASK_BITS11_0            (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
+#define DAC_TRIANGLEAMPLITUDE_1            0x00000000U                                                         /*!< Select max triangle amplitude of 1 */
+#define DAC_TRIANGLEAMPLITUDE_3            (                                                   DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */
+#define DAC_TRIANGLEAMPLITUDE_7            (                                  DAC_CR_MAMP1_1                 ) /*!< Select max triangle amplitude of 7 */
+#define DAC_TRIANGLEAMPLITUDE_15           (                                  DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */
+#define DAC_TRIANGLEAMPLITUDE_31           (                 DAC_CR_MAMP1_2                                  ) /*!< Select max triangle amplitude of 31 */
+#define DAC_TRIANGLEAMPLITUDE_63           (                 DAC_CR_MAMP1_2                  | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */
+#define DAC_TRIANGLEAMPLITUDE_127          (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1                 ) /*!< Select max triangle amplitude of 127 */
+#define DAC_TRIANGLEAMPLITUDE_255          (                 DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */
+#define DAC_TRIANGLEAMPLITUDE_511          (DAC_CR_MAMP1_3                                                   ) /*!< Select max triangle amplitude of 511 */
+#define DAC_TRIANGLEAMPLITUDE_1023         (DAC_CR_MAMP1_3                                   | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */
+#define DAC_TRIANGLEAMPLITUDE_2047         (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1                 ) /*!< Select max triangle amplitude of 2047 */
+#define DAC_TRIANGLEAMPLITUDE_4095         (DAC_CR_MAMP1_3                  | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup DACEx_Private_Macros DACEx Private Macros
+  * @{
+  */
+#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE)    || \
+                                 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
+                                 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
+                                 ((TRIGGER) == DAC_TRIGGER_T9_TRGO) || \
+                                 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
+                                 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
+                                 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
+                                 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
+
+
+#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
+                                                      ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
+                                                      ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095))
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/* Extended features functions ***********************************************/
+
+/** @addtogroup DACEx_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup DACEx_Exported_Functions_Group2
+  * @{
+  */
+/* IO operation functions *****************************************************/
+
+HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
+HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
+
+HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
+uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac);
+
+void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac);
+void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac);
+void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac);
+void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac);
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup DACEx_Private_Functions
+  * @{
+  */
+
+/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
+/* are called by HAL_DAC_Start_DMA */
+void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
+void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
+void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* DAC1 */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*STM32L1xx_HAL_DAC_EX_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_def.h

@@ -7,29 +7,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -44,8 +28,8 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32l1xx.h"
-#include "stm32_hal_legacy.h"
+#include "Legacy/stm32_hal_legacy.h"
-#include <stdio.h>
+#include <stddef.h>
 
 /* Exported types ------------------------------------------------------------*/
 
@@ -54,10 +38,10 @@
   */
 typedef enum
 {
-  HAL_OK       = 0x00,
+  HAL_OK       = 0x00U,
-  HAL_ERROR    = 0x01,
+  HAL_ERROR    = 0x01U,
-  HAL_BUSY     = 0x02,
+  HAL_BUSY     = 0x02U,
-  HAL_TIMEOUT  = 0x03
+  HAL_TIMEOUT  = 0x03U
 } HAL_StatusTypeDef;
 
 /**
@@ -65,16 +49,18 @@ typedef enum
   */
 typedef enum
 {
-  HAL_UNLOCKED = 0x00,
+  HAL_UNLOCKED = 0x00U,
-  HAL_LOCKED   = 0x01  
+  HAL_LOCKED   = 0x01U
 } HAL_LockTypeDef;
 
 /* Exported macro ------------------------------------------------------------*/
 
+#define UNUSED(X) (void)X      /* To avoid gcc/g++ warnings */
+
 #define HAL_MAX_DELAY      0xFFFFFFFFU
 
-#define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) != RESET)
+#define HAL_IS_BIT_SET(REG, BIT)         (((REG) & (BIT)) == (BIT))
-#define HAL_IS_BIT_CLR(REG, BIT)         (((REG) & (BIT)) == RESET)
+#define HAL_IS_BIT_CLR(REG, BIT)         (((REG) & (BIT)) == 0U)
 
 #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_)           \
                         do{                                                  \
@@ -82,8 +68,6 @@ typedef enum
                               (__DMA_HANDLE_).Parent = (__HANDLE__);             \
                           } while(0)
 
-#define UNUSED(x) ((void)(x))
-
 /** @brief Reset the Handle's State field.
   * @param __HANDLE__: specifies the Peripheral Handle.
   * @note  This macro can be used for the following purpose:
@@ -99,10 +83,13 @@ typedef enum
   *            HAL_PPP_MspInit() which will reconfigure the low level hardware.
   * @retval None
   */
-#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
+#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
 
 #if (USE_RTOS == 1)
+
+  /* Reserved for future use */
   #error "USE_RTOS should be 0 in the current HAL release"
+
 #else
   #define __HAL_LOCK(__HANDLE__)                                               \
                                 do{                                            \
@@ -122,7 +109,7 @@ typedef enum
                                     }while (0)
 #endif /* USE_RTOS */
 
-#if  defined ( __GNUC__ ) && !defined ( __CC_ARM )
+#if  defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
   #ifndef __weak
     #define __weak   __attribute__((weak))
   #endif /* __weak */
@@ -133,7 +120,7 @@ typedef enum
 
 
 /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
-#if defined   (__GNUC__)        /* GNU Compiler */
+#if defined   (__GNUC__) && !defined (__CC_ARM) /* GNU Compiler */
   #ifndef __ALIGN_END
     #define __ALIGN_END    __attribute__ ((aligned (4)))
   #endif /* __ALIGN_END */
@@ -166,14 +153,14 @@ typedef enum
    Available memory areas are declared in the 'Target' tab of the 'Options for Target'
    dialog.
 */
-#define __RAM_FUNC HAL_StatusTypeDef 
+#define __RAM_FUNC
 
 #elif defined ( __ICCARM__ )
 /* ICCARM Compiler
    ---------------
    RAM functions are defined using a specific toolchain keyword "__ramfunc".
 */
-#define __RAM_FUNC __ramfunc HAL_StatusTypeDef
+#define __RAM_FUNC __ramfunc
 
 #elif defined   (  __GNUC__  )
 /* GNU Compiler
@@ -181,7 +168,7 @@ typedef enum
   RAM functions are defined using a specific toolchain attribute
    "__attribute__((section(".RamFunc")))".
 */
-#define __RAM_FUNC HAL_StatusTypeDef  __attribute__((section(".RamFunc")))
+#define __RAM_FUNC  __attribute__((section(".RamFunc")))
 
 #endif
 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_dma.c

@@ -47,13 +47,12 @@
            In this case the DMA interrupt is configured
        (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
        (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
-          add his own function by customization of function pointer XferCpltCallback and 
+              add his own function to register callbacks with HAL_DMA_RegisterCallback().
-              XferErrorCallback (i.e. a member of DMA handle structure).
 
      *** DMA HAL driver macros list ***
      =============================================
      [..]
-       Below the list of most used macros in DMA HAL driver.
+       Below the list of macros in DMA HAL driver.
 
        (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
        (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
@@ -61,7 +60,7 @@
        (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
        (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
        (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
-       (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not. 
+       (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt is enabled or not.
 
      [..]
       (@) You can refer to the DMA HAL driver header file for more useful macros
@@ -70,29 +69,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -119,8 +102,8 @@
 /** @defgroup DMA_Private_Functions DMA Private Functions
   * @{
   */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
 
+static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
 /**
   * @}
   */
@@ -153,13 +136,13 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
 /**
   * @brief  Initialize the DMA according to the specified
   *         parameters in the DMA_InitTypeDef and initialize the associated handle.
-  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
 {
-  uint32_t tmp = 0;
+  uint32_t tmp;
 
   /* Check the DMA handle allocation */
   if(hdma == NULL)
@@ -178,23 +161,23 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
   assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
 
 #if defined (DMA2)
-  /* calculation of the channel index */
+  /* Compute the channel index */
   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
   {
     /* DMA1 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
+    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
     hdma->DmaBaseAddress = DMA1;
   }
   else
   {
     /* DMA2 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
+    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
     hdma->DmaBaseAddress = DMA2;
   }
 #else
   /* calculation of the channel index */
   /* DMA1 */
-  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
+  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
   hdma->DmaBaseAddress = DMA1;
 #endif
 
@@ -204,10 +187,10 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
   /* Get the CR register value */
   tmp = hdma->Instance->CCR;
 
-  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
+  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
-  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
+  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE   | DMA_CCR_PSIZE  |
-                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
+                      DMA_CCR_MINC  | DMA_CCR_PINC    | DMA_CCR_CIRC   |
-                      DMA_CCR_DIR));
+                      DMA_CCR_DIR   | DMA_CCR_MEM2MEM));
 
   /* Prepare the DMA Channel configuration */
   tmp |=  hdma->Init.Direction        |
@@ -218,12 +201,6 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
   /* Write to DMA Channel CR register */
   hdma->Instance->CCR = tmp;
 
-  /* Clean callbacks */
-  hdma->XferCpltCallback = NULL;
-  hdma->XferHalfCpltCallback = NULL;
-  hdma->XferErrorCallback = NULL;
-  hdma->XferAbortCallback = NULL;
-
   /* Initialise the error code */
   hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 
@@ -238,12 +215,13 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  DeInitialize the DMA peripheral.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
 {
+
   /* Check the DMA handle allocation */
   if (NULL == hdma )
   {
@@ -257,40 +235,37 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
   __HAL_DMA_DISABLE(hdma);
 
 #if defined (DMA2)
-  /* calculation of the channel index */
+  /* Compute the channel index */
   if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
   {
     /* DMA1 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
+    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
     hdma->DmaBaseAddress = DMA1;
   }
   else
   {
     /* DMA2 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
+    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
     hdma->DmaBaseAddress = DMA2;
   }
 #else
   /* calculation of the channel index */
   /* DMA1 */
-  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
+  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
   hdma->DmaBaseAddress = DMA1;
 #endif
 
-  /* Reset DMA Channel control register */
+  /* Reset DMA Channel CR register */
-  hdma->Instance->CCR  = 0;
+  hdma->Instance->CCR = 0U;
-
-  /* Reset DMA Channel Number of Data to Transfer register */
-  hdma->Instance->CNDTR = 0;
-
-  /* Reset DMA Channel peripheral address register */
-  hdma->Instance->CPAR  = 0;
-
-  /* Reset DMA Channel memory address register */
-  hdma->Instance->CMAR = 0;
 
   /* Clear all flags */
-  hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
+  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
+
+  /* Clean callbacks */
+  hdma->XferCpltCallback = NULL;
+  hdma->XferHalfCpltCallback = NULL;
+  hdma->XferErrorCallback = NULL;
+  hdma->XferAbortCallback = NULL;
 
   /* Initialise the error code */
   hdma->ErrorCode = HAL_DMA_ERROR_NONE;
@@ -329,11 +304,11 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  Start the DMA Transfer.
-  * @param  hdma      : pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
-  * @param  SrcAddress: The source memory Buffer address
+  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
+  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
+  * @param  DataLength The length of data to be transferred from source to destination
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
@@ -372,11 +347,11 @@ HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, ui
 
 /**
   * @brief  Start the DMA Transfer with interrupt enabled.
-  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
-  * @param  SrcAddress: The source memory Buffer address
+  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
+  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
+  * @param  DataLength The length of data to be transferred from source to destination
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
@@ -413,6 +388,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
       __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
     }
+
     /* Enable the Peripheral */
     __HAL_DMA_ENABLE(hdma);
   }
@@ -429,7 +405,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
 
 /**
   * @brief  Abort the DMA Transfer.
-  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval HAL status
   */
@@ -437,6 +413,18 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
 {
   HAL_StatusTypeDef status = HAL_OK;
 
+  /* Check the DMA peripheral state */
+  if(hdma->State != HAL_DMA_STATE_BUSY)
+  {
+    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hdma);
+
+    return HAL_ERROR;
+  }
+  else
+  {
     /* Disable DMA IT */
     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 
@@ -444,7 +432,7 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
     __HAL_DMA_DISABLE(hdma);
 
     /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
+    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
 
     /* Change the DMA state */
     hdma->State = HAL_DMA_STATE_READY;
@@ -454,11 +442,12 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
 
     return status;
   }
+}
 
 /**
   * @brief  Aborts the DMA Transfer in Interrupt mode.
-  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                 the configuration information for the specified DMA Stream.
+  *                 the configuration information for the specified DMA Channel.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
@@ -481,7 +470,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
     __HAL_DMA_DISABLE(hdma);
 
     /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
+    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
 
     /* Change the DMA state */
     hdma->State = HAL_DMA_STATE_READY;
@@ -500,16 +489,16 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  Polling for transfer complete.
-  * @param  hdma:    pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *                  the configuration information for the specified DMA Channel.
-  * @param  CompleteLevel: Specifies the DMA level complete.  
+  * @param  CompleteLevel Specifies the DMA level complete.
-  * @param  Timeout:       Timeout duration.
+  * @param  Timeout       Timeout duration.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
+HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
 {
   uint32_t temp;
-  uint32_t tickstart = 0;
+  uint32_t tickstart;
 
   if(HAL_DMA_STATE_BUSY != hdma->State)
   {
@@ -520,7 +509,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
   }
 
   /* Polling mode not supported in circular mode */
-  if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
+  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U)
   {
     hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
     return HAL_ERROR;
@@ -530,25 +519,25 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
   if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
   {
     /* Transfer Complete flag */
-    temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
+    temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU);
   }
   else
   {
     /* Half Transfer Complete flag */
-    temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
+    temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU);
   }
 
   /* Get tick */
   tickstart = HAL_GetTick();
 
-  while(RESET == (hdma->DmaBaseAddress->ISR & temp))
+  while((hdma->DmaBaseAddress->ISR & temp) == 0U)
   {
-    if((RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))))    
+    if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U)
     {
       /* When a DMA transfer error occurs */
       /* A hardware clear of its EN bits is performed */
       /* Clear all flags */
-      hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
+      hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
 
       /* Update error code */
       hdma->ErrorCode = HAL_DMA_ERROR_TE;
@@ -564,7 +553,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
     /* Check for the Timeout */
     if(Timeout != HAL_MAX_DELAY)
     {
-      if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
+      if(((HAL_GetTick() - tickstart) > Timeout) ||  (Timeout == 0U))
       {
         /* Update error code */
         hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
@@ -583,7 +572,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
   if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
   {
     /* Clear the transfer complete flag */
-    hdma->DmaBaseAddress->IFCR  = (DMA_FLAG_TC1 << hdma->ChannelIndex);
+    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU));
 
     /* The selected Channelx EN bit is cleared (DMA is disabled and
     all transfers are complete) */
@@ -592,7 +581,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
   else
   {
     /* Clear the half transfer complete flag */
-    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << hdma->ChannelIndex);
+    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU));
   }
 
   /* Process unlocked */
@@ -603,7 +592,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t Comp
 
 /**
   * @brief  Handle DMA interrupt request.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval None
   */
@@ -613,16 +602,16 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
   uint32_t source_it = hdma->Instance->CCR;
 
   /* Half Transfer Complete Interrupt management ******************************/
-  if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
+  if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT) != 0U))
   {
     /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
-      if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
+    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
     {
       /* Disable the half transfer interrupt */
       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
     }
     /* Clear the half transfer complete flag */
-      hdma->DmaBaseAddress->IFCR  = (DMA_ISR_HTIF1 << hdma->ChannelIndex);
+    hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU);
 
     /* DMA peripheral state is not updated in Half Transfer */
     /* but in Transfer Complete case */
@@ -635,19 +624,21 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
   }
 
   /* Transfer Complete Interrupt management ***********************************/
-  else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
+  else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TC) != 0U))
   {
-    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
+    
+    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
     {
-    /* Disable TE & TC */
+      /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
+      /* Disable the transfer complete and error interrupt */
+      /* if the DMA mode is not CIRCULAR  */
       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 
       /* Change the DMA state */
       hdma->State = HAL_DMA_STATE_READY;
     }
-    
     /* Clear the transfer complete flag */
-    hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << hdma->ChannelIndex);
+    hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU));
 
     /* Process Unlocked */
     __HAL_UNLOCK(hdma);
@@ -660,7 +651,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
   }
 
   /* Transfer Error Interrupt management **************************************/
-  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
+  else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TE) !=  0U))
   {
     /* When a DMA transfer error occurs */
     /* A hardware clear of its EN bits is performed */
@@ -668,7 +659,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 
     /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR  = (DMA_ISR_GIF1 << hdma->ChannelIndex);
+    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
 
     /* Update error code */
     hdma->ErrorCode = HAL_DMA_ERROR_TE;
@@ -685,16 +676,20 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
       hdma->XferErrorCallback(hdma);
     }
   }
+  else
+  {
+    /* Nothing To Do */
+  }
   return;
 }
 
 /**
   * @brief  Register callbacks
-  * @param  hdma:                 pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
-  *                               the configuration information for the specified DMA Stream.
+  *                               the configuration information for the specified DMA Channel.
-  * @param  CallbackID:           User Callback identifer
+  * @param  CallbackID           User Callback identifer
   *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
-  * @param  pCallback:            pointer to private callbacsk function which has pointer to 
+  * @param  pCallback            pointer to private callbacsk function which has pointer to
   *                               a DMA_HandleTypeDef structure as parameter.
   * @retval HAL status
   */
@@ -743,9 +738,9 @@ HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Call
 
 /**
   * @brief  UnRegister callbacks
-  * @param  hdma:                 pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
-  *                               the configuration information for the specified DMA Stream.
+  *                               the configuration information for the specified DMA Channel.
-  * @param  CallbackID:           User Callback identifer
+  * @param  CallbackID           User Callback identifer
   *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
   * @retval HAL status
   */
@@ -822,8 +817,8 @@ HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Ca
   */
 
 /**
-  * @brief  Return the DMA hande state.
+  * @brief  Return the DMA handle state.
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval HAL state
   */
@@ -835,7 +830,7 @@ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  Return the DMA error code.
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *              the configuration information for the specified DMA Channel.
   * @retval DMA Error Code
   */
@@ -858,22 +853,22 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
 
 /**
   * @brief  Sets the DMA Transfer parameter.
-  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
+  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
   *                     the configuration information for the specified DMA Channel.
-  * @param  SrcAddress: The source memory Buffer address
+  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress: The destination memory Buffer address
+  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength: The length of data to be transferred from source to destination
+  * @param  DataLength The length of data to be transferred from source to destination
   * @retval HAL status
   */
 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
 {
   /* Clear all flags */
-  hdma->DmaBaseAddress->IFCR  = (DMA_ISR_GIF1 << hdma->ChannelIndex);
+  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
 
   /* Configure DMA Channel data length */
   hdma->Instance->CNDTR = DataLength;
 
-  /* Peripheral to Memory */
+  /* Memory to Peripheral */
   if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
   {
     /* Configure DMA Channel destination address */
@@ -882,7 +877,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
     /* Configure DMA Channel source address */
     hdma->Instance->CMAR = SrcAddress;
   }
-  /* Memory to Peripheral */
+  /* Peripheral to Memory */
   else
   {
     /* Configure DMA Channel source address */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_dma.h

@@ -6,36 +6,20 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_DMA_H
+#ifndef STM32L1xx_HAL_DMA_H
-#define __STM32L1xx_HAL_DMA_H
+#define STM32L1xx_HAL_DMA_H
 
 #ifdef __cplusplus
  extern "C" {
@@ -53,7 +37,6 @@
   */
 
 /* Exported types ------------------------------------------------------------*/
-
 /** @defgroup DMA_Exported_Types DMA Exported Types
   * @{
   */
@@ -93,10 +76,10 @@ typedef struct
   */
 typedef enum
 {
-  HAL_DMA_STATE_RESET             = 0x00,  /*!< DMA not yet initialized or disabled */
+  HAL_DMA_STATE_RESET             = 0x00U,  /*!< DMA not yet initialized or disabled    */
-  HAL_DMA_STATE_READY             = 0x01,  /*!< DMA initialized and ready for use   */
+  HAL_DMA_STATE_READY             = 0x01U,  /*!< DMA initialized and ready for use      */
-  HAL_DMA_STATE_BUSY              = 0x02,  /*!< DMA process is ongoing              */
+  HAL_DMA_STATE_BUSY              = 0x02U,  /*!< DMA process is ongoing                 */
-  HAL_DMA_STATE_TIMEOUT           = 0x03,  /*!< DMA timeout state                   */
+  HAL_DMA_STATE_TIMEOUT           = 0x03U,  /*!< DMA timeout state                      */
 }HAL_DMA_StateTypeDef;
 
 /**
@@ -104,8 +87,8 @@ typedef enum
   */
 typedef enum
 {
-  HAL_DMA_FULL_TRANSFER      = 0x00,    /*!< Full transfer     */
+  HAL_DMA_FULL_TRANSFER      = 0x00U,    /*!< Full transfer     */
-  HAL_DMA_HALF_TRANSFER      = 0x01     /*!< Half Transfer     */
+  HAL_DMA_HALF_TRANSFER      = 0x01U     /*!< Half Transfer     */
 }HAL_DMA_LevelCompleteTypeDef;
 
 
@@ -114,12 +97,11 @@ typedef enum
   */
 typedef enum
 {
-  HAL_DMA_XFER_CPLT_CB_ID          = 0x00,    /*!< Full transfer     */
+  HAL_DMA_XFER_CPLT_CB_ID          = 0x00U,    /*!< Full transfer     */
-  HAL_DMA_XFER_HALFCPLT_CB_ID      = 0x01,    /*!< Half transfer     */
+  HAL_DMA_XFER_HALFCPLT_CB_ID      = 0x01U,    /*!< Half transfer     */
-  HAL_DMA_XFER_ERROR_CB_ID         = 0x02,    /*!< Error             */ 
+  HAL_DMA_XFER_ERROR_CB_ID         = 0x02U,    /*!< Error             */
-  HAL_DMA_XFER_ABORT_CB_ID         = 0x03,    /*!< Abort             */ 
+  HAL_DMA_XFER_ABORT_CB_ID         = 0x03U,    /*!< Abort             */
-  HAL_DMA_XFER_ALL_CB_ID           = 0x04     /*!< All               */ 
+  HAL_DMA_XFER_ALL_CB_ID           = 0x04U     /*!< All               */
-    
 }HAL_DMA_CallbackIDTypeDef;
 
 /**
@@ -152,6 +134,7 @@ typedef struct __DMA_HandleTypeDef
   uint32_t              ChannelIndex;                                                   /*!< DMA Channel Index                    */
 
 }DMA_HandleTypeDef;
+
 /**
   * @}
   */
@@ -165,26 +148,11 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Error_Code DMA Error Code
   * @{
   */
-#define HAL_DMA_ERROR_NONE          (0x00000000U)    /*!< No error */
+#define HAL_DMA_ERROR_NONE                 0x00000000U    /*!< No error                                */
-#define HAL_DMA_ERROR_TE            (0x00000001U)    /*!< Transfer error */
+#define HAL_DMA_ERROR_TE                   0x00000001U    /*!< Transfer error                          */
-#define HAL_DMA_ERROR_NO_XFER       (0x00000004U)    /*!< no ongoing transfer */
+#define HAL_DMA_ERROR_NO_XFER              0x00000004U    /*!< Abort requested with no Xfer ongoing    */
-#define HAL_DMA_ERROR_TIMEOUT       (0x00000020U)    /*!< Timeout error */
+#define HAL_DMA_ERROR_TIMEOUT              0x00000020U    /*!< Timeout error                           */
-#define HAL_DMA_ERROR_NOT_SUPPORTED (0x00000100U)    /*!< Not supported mode */     
+#define HAL_DMA_ERROR_NOT_SUPPORTED        0x00000100U    /*!< Not supported mode                      */
-/**
-  * @}
-  */
-
-/** @defgroup DMA_request DMA request
-  * @{
-  */
-#define DMA_REQUEST_0                     (0x00000000U)
-#define DMA_REQUEST_1                     (0x00000001U)
-#define DMA_REQUEST_2                     (0x00000002U)
-#define DMA_REQUEST_3                     (0x00000003U)
-#define DMA_REQUEST_4                     (0x00000004U)
-#define DMA_REQUEST_5                     (0x00000005U)
-#define DMA_REQUEST_6                     (0x00000006U)
-#define DMA_REQUEST_7                     (0x00000007U)
 
 /**
   * @}
@@ -193,10 +161,9 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
   * @{
   */
-#define DMA_PERIPH_TO_MEMORY         (0x00000000U)               /*!< Peripheral to memory direction */
+#define DMA_PERIPH_TO_MEMORY         0x00000000U        /*!< Peripheral to memory direction */
-#define DMA_MEMORY_TO_PERIPH         ((uint32_t)DMA_CCR_DIR)     /*!< Memory to peripheral direction */
+#define DMA_MEMORY_TO_PERIPH         DMA_CCR_DIR        /*!< Memory to peripheral direction */
-#define DMA_MEMORY_TO_MEMORY         ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction     */
+#define DMA_MEMORY_TO_MEMORY         DMA_CCR_MEM2MEM    /*!< Memory to memory direction     */
-
 /**
   * @}
   */
@@ -204,8 +171,8 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
   * @{
   */
-#define DMA_PINC_ENABLE        ((uint32_t)DMA_CCR_PINC)   /*!< Peripheral increment mode Enable */
+#define DMA_PINC_ENABLE              DMA_CCR_PINC  /*!< Peripheral increment mode Enable */
-#define DMA_PINC_DISABLE       (0x00000000U)              /*!< Peripheral increment mode Disable */
+#define DMA_PINC_DISABLE             0x00000000U   /*!< Peripheral increment mode Disable */
 /**
   * @}
   */
@@ -213,8 +180,8 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
   * @{
   */
-#define DMA_MINC_ENABLE         ((uint32_t)DMA_CCR_MINC)   /*!< Memory increment mode Enable  */
+#define DMA_MINC_ENABLE              DMA_CCR_MINC   /*!< Memory increment mode Enable  */
-#define DMA_MINC_DISABLE        (0x00000000U)              /*!< Memory increment mode Disable */
+#define DMA_MINC_DISABLE             0x00000000U    /*!< Memory increment mode Disable */
 /**
   * @}
   */
@@ -222,9 +189,9 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
   * @{
   */
-#define DMA_PDATAALIGN_BYTE          (0x00000000U)                 /*!< Peripheral data alignment: Byte     */
+#define DMA_PDATAALIGN_BYTE          0x00000000U       /*!< Peripheral data alignment : Byte     */
-#define DMA_PDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_PSIZE_0)   /*!< Peripheral data alignment: HalfWord */
+#define DMA_PDATAALIGN_HALFWORD      DMA_CCR_PSIZE_0   /*!< Peripheral data alignment : HalfWord */
-#define DMA_PDATAALIGN_WORD          ((uint32_t)DMA_CCR_PSIZE_1)   /*!< Peripheral data alignment: Word     */
+#define DMA_PDATAALIGN_WORD          DMA_CCR_PSIZE_1   /*!< Peripheral data alignment : Word     */
 /**
   * @}
   */
@@ -232,9 +199,9 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Memory_data_size DMA Memory data size
   * @{
   */
-#define DMA_MDATAALIGN_BYTE          (0x00000000U)                 /*!< Memory data alignment: Byte     */
+#define DMA_MDATAALIGN_BYTE          0x00000000U       /*!< Memory data alignment : Byte     */
-#define DMA_MDATAALIGN_HALFWORD      ((uint32_t)DMA_CCR_MSIZE_0)   /*!< Memory data alignment: HalfWord */
+#define DMA_MDATAALIGN_HALFWORD      DMA_CCR_MSIZE_0   /*!< Memory data alignment : HalfWord */
-#define DMA_MDATAALIGN_WORD          ((uint32_t)DMA_CCR_MSIZE_1)   /*!< Memory data alignment: Word     */
+#define DMA_MDATAALIGN_WORD          DMA_CCR_MSIZE_1   /*!< Memory data alignment : Word     */
 /**
   * @}
   */
@@ -242,8 +209,8 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_mode DMA mode
   * @{
   */
-#define DMA_NORMAL         (0x00000000U)                /*!< Normal mode                  */
+#define DMA_NORMAL                0x00000000U                /*!< Normal mode                                    */
-#define DMA_CIRCULAR       ((uint32_t)DMA_CCR_CIRC)     /*!< Circular mode                */
+#define DMA_CIRCULAR              DMA_CCR_CIRC               /*!< Circular mode                                  */
 /**
   * @}
   */
@@ -251,10 +218,10 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_Priority_level DMA Priority level
   * @{
   */
-#define DMA_PRIORITY_LOW             (0x00000000U)              /*!< Priority level : Low       */
+#define DMA_PRIORITY_LOW             0x00000000U     /*!< Priority level : Low       */
-#define DMA_PRIORITY_MEDIUM          ((uint32_t)DMA_CCR_PL_0)   /*!< Priority level : Medium    */
+#define DMA_PRIORITY_MEDIUM          DMA_CCR_PL_0    /*!< Priority level : Medium    */
-#define DMA_PRIORITY_HIGH            ((uint32_t)DMA_CCR_PL_1)   /*!< Priority level : High      */
+#define DMA_PRIORITY_HIGH            DMA_CCR_PL_1    /*!< Priority level : High      */
-#define DMA_PRIORITY_VERY_HIGH       ((uint32_t)DMA_CCR_PL)     /*!< Priority level : Very_High */
+#define DMA_PRIORITY_VERY_HIGH       DMA_CCR_PL      /*!< Priority level : Very_High */
 /**
   * @}
   */
@@ -263,9 +230,9 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
   * @{
   */
-#define DMA_IT_TC                         ((uint32_t)DMA_CCR_TCIE)
+#define DMA_IT_TC                         DMA_CCR_TCIE
-#define DMA_IT_HT                         ((uint32_t)DMA_CCR_HTIE)
+#define DMA_IT_HT                         DMA_CCR_HTIE
-#define DMA_IT_TE                         ((uint32_t)DMA_CCR_TEIE)
+#define DMA_IT_TE                         DMA_CCR_TEIE
 /**
   * @}
   */
@@ -273,34 +240,34 @@ typedef struct __DMA_HandleTypeDef
 /** @defgroup DMA_flag_definitions DMA flag definitions
   * @{
   */
-#define DMA_FLAG_GL1                      (0x00000001U)
+#define DMA_FLAG_GL1                      DMA_ISR_GIF1
-#define DMA_FLAG_TC1                      (0x00000002U)
+#define DMA_FLAG_TC1                      DMA_ISR_TCIF1
-#define DMA_FLAG_HT1                      (0x00000004U)
+#define DMA_FLAG_HT1                      DMA_ISR_HTIF1
-#define DMA_FLAG_TE1                      (0x00000008U)
+#define DMA_FLAG_TE1                      DMA_ISR_TEIF1
-#define DMA_FLAG_GL2                      (0x00000010U)
+#define DMA_FLAG_GL2                      DMA_ISR_GIF2
-#define DMA_FLAG_TC2                      (0x00000020U)
+#define DMA_FLAG_TC2                      DMA_ISR_TCIF2
-#define DMA_FLAG_HT2                      (0x00000040U)
+#define DMA_FLAG_HT2                      DMA_ISR_HTIF2
-#define DMA_FLAG_TE2                      (0x00000080U)
+#define DMA_FLAG_TE2                      DMA_ISR_TEIF2
-#define DMA_FLAG_GL3                      (0x00000100U)
+#define DMA_FLAG_GL3                      DMA_ISR_GIF3
-#define DMA_FLAG_TC3                      (0x00000200U)
+#define DMA_FLAG_TC3                      DMA_ISR_TCIF3
-#define DMA_FLAG_HT3                      (0x00000400U)
+#define DMA_FLAG_HT3                      DMA_ISR_HTIF3
-#define DMA_FLAG_TE3                      (0x00000800U)
+#define DMA_FLAG_TE3                      DMA_ISR_TEIF3
-#define DMA_FLAG_GL4                      (0x00001000U)
+#define DMA_FLAG_GL4                      DMA_ISR_GIF4
-#define DMA_FLAG_TC4                      (0x00002000U)
+#define DMA_FLAG_TC4                      DMA_ISR_TCIF4
-#define DMA_FLAG_HT4                      (0x00004000U)
+#define DMA_FLAG_HT4                      DMA_ISR_HTIF4
-#define DMA_FLAG_TE4                      (0x00008000U)
+#define DMA_FLAG_TE4                      DMA_ISR_TEIF4
-#define DMA_FLAG_GL5                      (0x00010000U)
+#define DMA_FLAG_GL5                      DMA_ISR_GIF5
-#define DMA_FLAG_TC5                      (0x00020000U)
+#define DMA_FLAG_TC5                      DMA_ISR_TCIF5
-#define DMA_FLAG_HT5                      (0x00040000U)
+#define DMA_FLAG_HT5                      DMA_ISR_HTIF5
-#define DMA_FLAG_TE5                      (0x00080000U)
+#define DMA_FLAG_TE5                      DMA_ISR_TEIF5
-#define DMA_FLAG_GL6                      (0x00100000U)
+#define DMA_FLAG_GL6                      DMA_ISR_GIF6
-#define DMA_FLAG_TC6                      (0x00200000U)
+#define DMA_FLAG_TC6                      DMA_ISR_TCIF6
-#define DMA_FLAG_HT6                      (0x00400000U)
+#define DMA_FLAG_HT6                      DMA_ISR_HTIF6
-#define DMA_FLAG_TE6                      (0x00800000U)
+#define DMA_FLAG_TE6                      DMA_ISR_TEIF6
-#define DMA_FLAG_GL7                      (0x01000000U)
+#define DMA_FLAG_GL7                      DMA_ISR_GIF7
-#define DMA_FLAG_TC7                      (0x02000000U)
+#define DMA_FLAG_TC7                      DMA_ISR_TCIF7
-#define DMA_FLAG_HT7                      (0x04000000U)
+#define DMA_FLAG_HT7                      DMA_ISR_HTIF7
-#define DMA_FLAG_TE7                      (0x08000000U)
+#define DMA_FLAG_TE7                      DMA_ISR_TEIF7
 /**
   * @}
   */
@@ -314,22 +281,22 @@ typedef struct __DMA_HandleTypeDef
   * @{
   */
 
-/** @brief  Reset DMA handle state
+/** @brief  Reset DMA handle state.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval None
   */
 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
 
 /**
   * @brief  Enable the specified DMA Channel.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval None
   */
 #define __HAL_DMA_ENABLE(__HANDLE__)        ((__HANDLE__)->Instance->CCR |=  DMA_CCR_EN)
 
 /**
   * @brief  Disable the specified DMA Channel.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval None
   */
 #define __HAL_DMA_DISABLE(__HANDLE__)       ((__HANDLE__)->Instance->CCR &=  ~DMA_CCR_EN)
@@ -342,7 +309,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel transfer complete flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer complete flag index.
   */
 
@@ -362,7 +329,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel half transfer complete flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified half transfer complete flag index.
   */
 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
@@ -381,7 +348,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel transfer error flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer error flag index.
   */
 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
@@ -400,7 +367,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel Global interrupt flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer error flag index.
   */
 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
@@ -419,8 +386,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Get the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __FLAG__: Get the specified flag.
+  * @param  __FLAG__ Get the specified flag.
   *          This parameter can be any combination of the following values:
   *            @arg DMA_FLAG_TCx: Transfer complete flag
   *            @arg DMA_FLAG_HTx: Half transfer complete flag
@@ -434,8 +401,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Clear the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __FLAG__: specifies the flag to clear.
+  * @param  __FLAG__ specifies the flag to clear.
   *          This parameter can be any combination of the following values:
   *            @arg DMA_FLAG_TCx:  Transfer complete flag
   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
@@ -450,7 +417,7 @@ typedef struct __DMA_HandleTypeDef
 #else
 /**
   * @brief  Return the current DMA Channel transfer complete flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer complete flag index.
   */
 
@@ -465,7 +432,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel half transfer complete flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified half transfer complete flag index.
   */
 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
@@ -479,7 +446,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel transfer error flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer error flag index.
   */
 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
@@ -493,7 +460,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the current DMA Channel Global interrupt flag.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The specified transfer error flag index.
   */
 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
@@ -507,13 +474,13 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Get the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __FLAG__: Get the specified flag.
+  * @param  __FLAG__ Get the specified flag.
   *          This parameter can be any combination of the following values:
-  *            @arg DMA_FLAG_TCx:  Transfer complete flag
+  *            @arg DMA_FLAG_TCIFx:  Transfer complete flag
-  *            @arg DMA_FLAG_HTx:  Half transfer complete flag
+  *            @arg DMA_FLAG_HTIFx:  Half transfer complete flag
-  *            @arg DMA_FLAG_TEx:  Transfer error flag
+  *            @arg DMA_FLAG_TEIFx:  Transfer error flag
-  *            @arg DMA_FLAG_GLx: Global interrupt flag
+  *            @arg DMA_ISR_GIFx:    Global interrupt flag
   *         Where x can be from 1 to 7 to select the DMA Channel x flag.
   * @retval The state of FLAG (SET or RESET).
   */
@@ -521,8 +488,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Clear the DMA Channel pending flags.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __FLAG__: specifies the flag to clear.
+  * @param  __FLAG__ specifies the flag to clear.
   *          This parameter can be any combination of the following values:
   *            @arg DMA_FLAG_TCx:  Transfer complete flag
   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
@@ -537,8 +504,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Enable the specified DMA Channel interrupts.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. 
+  * @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
   *          This parameter can be any combination of the following values:
   *            @arg DMA_IT_TC:  Transfer complete interrupt mask
   *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
@@ -549,8 +516,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Disable the specified DMA Channel interrupts.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
   *          This parameter can be any combination of the following values:
   *            @arg DMA_IT_TC:  Transfer complete interrupt mask
   *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
@@ -561,8 +528,8 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Check whether the specified DMA Channel interrupt is enabled or not.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
-  * @param  __INTERRUPT__: specifies the DMA interrupt source to check.
+  * @param  __INTERRUPT__ specifies the DMA interrupt source to check.
   *          This parameter can be one of the following values:
   *            @arg DMA_IT_TC:  Transfer complete interrupt mask
   *            @arg DMA_IT_HT:  Half transfer complete interrupt mask
@@ -573,7 +540,7 @@ typedef struct __DMA_HandleTypeDef
 
 /**
   * @brief  Return the number of remaining data units in the current DMA Channel transfer.
-  * @param  __HANDLE__: DMA handle
+  * @param  __HANDLE__ DMA handle
   * @retval The number of remaining data units in the current DMA Channel transfer.
   */
 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
@@ -606,7 +573,7 @@ HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, u
 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
 HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
+HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout);
 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
 HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
 HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
@@ -638,7 +605,7 @@ uint32_t             HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
                                      ((DIRECTION) == DMA_MEMORY_TO_PERIPH)  || \
                                      ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
 
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
+#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
 
 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
                                             ((STATE) == DMA_PINC_DISABLE))
@@ -646,14 +613,6 @@ uint32_t             HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE)  || \
                                         ((STATE) == DMA_MINC_DISABLE))
 
-#define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
-                                     ((REQUEST) == DMA_REQUEST_1) || \
-                                     ((REQUEST) == DMA_REQUEST_2) || \
-                                     ((REQUEST) == DMA_REQUEST_3) || \
-                                     ((REQUEST) == DMA_REQUEST_4) || \
-                                     ((REQUEST) == DMA_REQUEST_5) || \
-                                     ((REQUEST) == DMA_REQUEST_6) || \
-                                     ((REQUEST) == DMA_REQUEST_7))
 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE)     || \
                                            ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
                                            ((SIZE) == DMA_PDATAALIGN_WORD))
@@ -688,6 +647,6 @@ uint32_t             HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
 }
 #endif
 
-#endif /* __STM32L1xx_HAL_DMA_H */
+#endif /* STM32L1xx_HAL_DMA_H */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_exti.c

@@ -0,0 +1,559 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_exti.c
+  * @author  MCD Application Team
+  * @brief   EXTI HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the Extended Interrupts and events controller (EXTI) peripheral:
+  *           + Initialization and de-initialization functions
+  *           + IO operation functions
+  *
+  @verbatim
+  ==============================================================================
+                    ##### EXTI Peripheral features #####
+  ==============================================================================
+  [..]
+    (+) Each Exti line can be configured within this driver.
+
+    (+) Exti line can be configured in 3 different modes
+        (++) Interrupt
+        (++) Event
+        (++) Both of them
+
+    (+) Configurable Exti lines can be configured with 3 different triggers
+        (++) Rising
+        (++) Falling
+        (++) Both of them
+
+    (+) When set in interrupt mode, configurable Exti lines have two different
+        interrupts pending registers which allow to distinguish which transition
+        occurs:
+        (++) Rising edge pending interrupt
+        (++) Falling
+
+    (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
+        be selected through multiplexer.
+
+                     ##### How to use this driver #####
+  ==============================================================================
+  [..]
+
+    (#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
+        (++) Choose the interrupt line number by setting "Line" member from
+             EXTI_ConfigTypeDef structure.
+        (++) Configure the interrupt and/or event mode using "Mode" member from
+             EXTI_ConfigTypeDef structure.
+        (++) For configurable lines, configure rising and/or falling trigger
+             "Trigger" member from EXTI_ConfigTypeDef structure.
+        (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
+             member from GPIO_InitTypeDef structure.
+
+    (#) Get current Exti configuration of a dedicated line using
+        HAL_EXTI_GetConfigLine().
+        (++) Provide exiting handle as parameter.
+        (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
+
+    (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
+        (++) Provide exiting handle as parameter.
+
+    (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
+        (++) Provide exiting handle as first parameter.
+        (++) Provide which callback will be registered using one value from
+             EXTI_CallbackIDTypeDef.
+        (++) Provide callback function pointer.
+
+    (#) Get interrupt pending bit using HAL_EXTI_GetPending().
+
+    (#) Clear interrupt pending bit using HAL_EXTI_GetPending().
+
+    (#) Generate software interrupt using HAL_EXTI_GenerateSWI().
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup EXTI
+  * @{
+  */
+/** MISRA C:2012 deviation rule has been granted for following rule:
+  * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
+  * of bounds [0,3] in following API :
+  * HAL_EXTI_SetConfigLine
+  * HAL_EXTI_GetConfigLine
+  * HAL_EXTI_ClearConfigLine
+  */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+/** @defgroup EXTI_Private_Constants EXTI Private Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup EXTI_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup EXTI_Exported_Functions_Group1
+  *  @brief    Configuration functions
+  *
+@verbatim
+ ===============================================================================
+              ##### Configuration functions #####
+ ===============================================================================
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Set configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  pExtiConfig Pointer on EXTI configuration to be set.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if ((hexti == NULL) || (pExtiConfig == NULL))
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(pExtiConfig->Line));
+  assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
+
+  /* Assign line number to handle */
+  hexti->Line = pExtiConfig->Line;
+
+  /* Compute line mask */
+  linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* Configure triggers for configurable lines */
+  if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
+  {
+    assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
+
+    /* Configure rising trigger */
+    /* Mask or set line */
+    if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
+    {
+      EXTI->RTSR |= maskline;
+    }
+    else
+    {
+      EXTI->RTSR &= ~maskline;
+    }
+
+    /* Configure falling trigger */
+    /* Mask or set line */
+    if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
+    {
+      EXTI->FTSR |= maskline;
+    }
+    else
+    {
+      EXTI->FTSR &= ~maskline;
+    }
+
+
+    /* Configure gpio port selection in case of gpio exti line */
+    if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+
+      regval = SYSCFG->EXTICR[linepos >> 2u];
+      regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      SYSCFG->EXTICR[linepos >> 2u] = regval;
+    }
+  }
+
+  /* Configure interrupt mode : read current mode */
+  /* Mask or set line */
+  if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
+  {
+    EXTI->IMR |= maskline;
+  }
+  else
+  {
+    EXTI->IMR &= ~maskline;
+  }
+
+  /* Configure event mode : read current mode */
+  /* Mask or set line */
+  if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
+  {
+    EXTI->EMR |= maskline;
+  }
+  else
+  {
+    EXTI->EMR &= ~maskline;
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Get configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  pExtiConfig Pointer on structure to store Exti configuration.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if ((hexti == NULL) || (pExtiConfig == NULL))
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameter */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+
+  /* Store handle line number to configuration structure */
+  pExtiConfig->Line = hexti->Line;
+
+  /* Compute line mask */
+  linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* 1] Get core mode : interrupt */
+
+  /* Check if selected line is enable */
+  if ((EXTI->IMR & maskline) != 0x00u)
+  {
+    pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
+  }
+  else
+  {
+    pExtiConfig->Mode = EXTI_MODE_NONE;
+  }
+
+  /* Get event mode */
+  /* Check if selected line is enable */
+  if ((EXTI->EMR & maskline) != 0x00u)
+  {
+    pExtiConfig->Mode |= EXTI_MODE_EVENT;
+  }
+
+  /* 2] Get trigger for configurable lines : rising */
+  if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
+  {
+    /* Check if configuration of selected line is enable */
+    if ((EXTI->RTSR & maskline) != 0x00u)
+    {
+      pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
+    }
+    else
+    {
+      pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
+    }
+
+    /* Get falling configuration */
+    /* Check if configuration of selected line is enable */
+    if ((EXTI->FTSR & maskline) != 0x00u)
+    {
+      pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
+    }
+
+    /* Get Gpio port selection for gpio lines */
+    if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+
+      regval = SYSCFG->EXTICR[linepos >> 2u];
+      pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
+    }
+    else
+    {
+      pExtiConfig->GPIOSel = 0x00u;
+    }
+  }
+  else
+  {
+    /* No Trigger selected */
+    pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
+    pExtiConfig->GPIOSel = 0x00u;
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Clear whole configuration of a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check null pointer */
+  if (hexti == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Check the parameter */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+
+  /* compute line mask */
+  linepos = (hexti->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* 1] Clear interrupt mode */
+  EXTI->IMR = (EXTI->IMR & ~maskline);
+
+  /* 2] Clear event mode */
+  EXTI->EMR = (EXTI->EMR & ~maskline);
+
+  /* 3] Clear triggers in case of configurable lines */
+  if ((hexti->Line & EXTI_CONFIG) != 0x00u)
+  {
+    EXTI->RTSR = (EXTI->RTSR & ~maskline);
+    EXTI->FTSR = (EXTI->FTSR & ~maskline);
+
+    /* Get Gpio port selection for gpio lines */
+    if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
+    {
+      assert_param(IS_EXTI_GPIO_PIN(linepos));
+
+      regval = SYSCFG->EXTICR[linepos >> 2u];
+      regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
+      SYSCFG->EXTICR[linepos >> 2u] = regval;
+    }
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Register callback for a dedicated Exti line.
+  * @param  hexti Exti handle.
+  * @param  CallbackID User callback identifier.
+  *         This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
+  * @param  pPendingCbfn function pointer to be stored as callback.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  switch (CallbackID)
+  {
+    case  HAL_EXTI_COMMON_CB_ID:
+      hexti->PendingCallback = pPendingCbfn;
+      break;
+
+    default:
+      status = HAL_ERROR;
+      break;
+  }
+
+  return status;
+}
+
+/**
+  * @brief  Store line number as handle private field.
+  * @param  hexti Exti handle.
+  * @param  ExtiLine Exti line number.
+  *         This parameter can be from 0 to @ref EXTI_LINE_NB.
+  * @retval HAL Status.
+  */
+HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
+{
+  /* Check the parameters */
+  assert_param(IS_EXTI_LINE(ExtiLine));
+
+  /* Check null pointer */
+  if (hexti == NULL)
+  {
+    return HAL_ERROR;
+  }
+  else
+  {
+    /* Store line number as handle private field */
+    hexti->Line = ExtiLine;
+
+    return HAL_OK;
+  }
+}
+
+/**
+  * @}
+  */
+
+/** @addtogroup EXTI_Exported_Functions_Group2
+  *  @brief EXTI IO functions.
+  *
+@verbatim
+ ===============================================================================
+                       ##### IO operation functions #####
+ ===============================================================================
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Handle EXTI interrupt request.
+  * @param  hexti Exti handle.
+  * @retval none.
+  */
+void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t regval;
+  uint32_t maskline;
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Get pending bit  */
+  regval = (EXTI->PR & maskline);
+  if (regval != 0x00u)
+  {
+    /* Clear pending bit */
+    EXTI->PR = maskline;
+
+    /* Call callback */
+    if (hexti->PendingCallback != NULL)
+    {
+      hexti->PendingCallback();
+    }
+  }
+}
+
+/**
+  * @brief  Get interrupt pending bit of a dedicated line.
+  * @param  hexti Exti handle.
+  * @param  Edge Specify which pending edge as to be checked.
+  *         This parameter can be one of the following values:
+  *           @arg @ref EXTI_TRIGGER_RISING_FALLING
+  *         This parameter is kept for compatibility with other series.
+  * @retval 1 if interrupt is pending else 0.
+  */
+uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+{
+  uint32_t regval;
+  uint32_t linepos;
+  uint32_t maskline;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+  assert_param(IS_EXTI_PENDING_EDGE(Edge));
+
+  /* Compute line mask */
+  linepos = (hexti->Line & EXTI_PIN_MASK);
+  maskline = (1uL << linepos);
+
+  /* return 1 if bit is set else 0 */
+  regval = ((EXTI->PR & maskline) >> linepos);
+  return regval;
+}
+
+/**
+  * @brief  Clear interrupt pending bit of a dedicated line.
+  * @param  hexti Exti handle.
+  * @param  Edge Specify which pending edge as to be clear.
+  *         This parameter can be one of the following values:
+  *           @arg @ref EXTI_TRIGGER_RISING_FALLING
+  *         This parameter is kept for compatibility with other series.
+  * @retval None.
+  */
+void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+{
+  uint32_t maskline;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+  assert_param(IS_EXTI_PENDING_EDGE(Edge));
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Clear Pending bit */
+  EXTI->PR =  maskline;
+}
+
+/**
+  * @brief  Generate a software interrupt for a dedicated line.
+  * @param  hexti Exti handle.
+  * @retval None.
+  */
+void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
+{
+  uint32_t maskline;
+
+  /* Check parameters */
+  assert_param(IS_EXTI_LINE(hexti->Line));
+  assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
+
+  /* Compute line mask */
+  maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
+
+  /* Generate Software interrupt */
+  EXTI->SWIER = maskline;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* HAL_EXTI_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_exti.h

@@ -0,0 +1,316 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_exti.h
+  * @author  MCD Application Team
+  * @brief   Header file of EXTI HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_EXTI_H
+#define STM32L1xx_HAL_EXTI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup EXTI EXTI
+  * @brief EXTI HAL module driver
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup EXTI_Exported_Types EXTI Exported Types
+  * @{
+  */
+typedef enum
+{
+  HAL_EXTI_COMMON_CB_ID          = 0x00U
+} EXTI_CallbackIDTypeDef;
+
+/**
+  * @brief  EXTI Handle structure definition
+  */
+typedef struct
+{
+  uint32_t Line;                    /*!<  Exti line number */
+  void (* PendingCallback)(void);   /*!<  Exti pending callback */
+} EXTI_HandleTypeDef;
+
+/**
+  * @brief  EXTI Configuration structure definition
+  */
+typedef struct
+{
+  uint32_t Line;      /*!< The Exti line to be configured. This parameter
+                           can be a value of @ref EXTI_Line */
+  uint32_t Mode;      /*!< The Exit Mode to be configured for a core.
+                           This parameter can be a combination of @ref EXTI_Mode */
+  uint32_t Trigger;   /*!< The Exti Trigger to be configured. This parameter
+                           can be a value of @ref EXTI_Trigger */
+  uint32_t GPIOSel;   /*!< The Exti GPIO multiplexer selection to be configured.
+                           This parameter is only possible for line 0 to 15. It
+                           can be a value of @ref EXTI_GPIOSel */
+} EXTI_ConfigTypeDef;
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
+  * @{
+  */
+
+/** @defgroup EXTI_Line  EXTI Line
+  * @{
+  */
+#define EXTI_LINE_0                        (EXTI_GPIO       | 0x00u)    /*!< External interrupt line 0 */
+#define EXTI_LINE_1                        (EXTI_GPIO       | 0x01u)    /*!< External interrupt line 1 */
+#define EXTI_LINE_2                        (EXTI_GPIO       | 0x02u)    /*!< External interrupt line 2 */
+#define EXTI_LINE_3                        (EXTI_GPIO       | 0x03u)    /*!< External interrupt line 3 */
+#define EXTI_LINE_4                        (EXTI_GPIO       | 0x04u)    /*!< External interrupt line 4 */
+#define EXTI_LINE_5                        (EXTI_GPIO       | 0x05u)    /*!< External interrupt line 5 */
+#define EXTI_LINE_6                        (EXTI_GPIO       | 0x06u)    /*!< External interrupt line 6 */
+#define EXTI_LINE_7                        (EXTI_GPIO       | 0x07u)    /*!< External interrupt line 7 */
+#define EXTI_LINE_8                        (EXTI_GPIO       | 0x08u)    /*!< External interrupt line 8 */
+#define EXTI_LINE_9                        (EXTI_GPIO       | 0x09u)    /*!< External interrupt line 9 */
+#define EXTI_LINE_10                       (EXTI_GPIO       | 0x0Au)    /*!< External interrupt line 10 */
+#define EXTI_LINE_11                       (EXTI_GPIO       | 0x0Bu)    /*!< External interrupt line 11 */
+#define EXTI_LINE_12                       (EXTI_GPIO       | 0x0Cu)    /*!< External interrupt line 12 */
+#define EXTI_LINE_13                       (EXTI_GPIO       | 0x0Du)    /*!< External interrupt line 13 */
+#define EXTI_LINE_14                       (EXTI_GPIO       | 0x0Eu)    /*!< External interrupt line 14 */
+#define EXTI_LINE_15                       (EXTI_GPIO       | 0x0Fu)    /*!< External interrupt line 15 */
+#define EXTI_LINE_16                       (EXTI_CONFIG     | 0x10u)    /*!< External interrupt line 16 Connected to the PVD Output */
+#define EXTI_LINE_17                       (EXTI_CONFIG     | 0x11u)    /*!< External interrupt line 17 Connected to the RTC Alarm event */
+#define EXTI_LINE_18                       (EXTI_CONFIG     | 0x12u)    /*!< External interrupt line 18 Connected to the USB Device FS Wakeup from suspend event */
+#define EXTI_LINE_19                       (EXTI_CONFIG     | 0x13u)    /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */
+#define EXTI_LINE_20                       (EXTI_CONFIG     | 0x14u)    /*!< External interrupt line 20 Connected to the RTC Wakeup event */
+#define EXTI_LINE_21                       (EXTI_CONFIG     | 0x15u)    /*!< External interrupt line 21 Connected to the Comparator 1 output */
+#define EXTI_LINE_22                       (EXTI_CONFIG     | 0x16u)    /*!< External interrupt line 22 Connected to the Comparator 2 output */
+#if defined(EXTI_IMR_IM23)
+#define EXTI_LINE_23                       (EXTI_CONFIG     | 0x17u)    /*!< External interrupt line 23 Connected to the channel acquisition interrupt */
+#endif /* EXTI_IMR_IM23 */
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Mode  EXTI Mode
+  * @{
+  */
+#define EXTI_MODE_NONE                      0x00000000u
+#define EXTI_MODE_INTERRUPT                 0x00000001u
+#define EXTI_MODE_EVENT                     0x00000002u
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Trigger  EXTI Trigger
+  * @{
+  */
+
+#define EXTI_TRIGGER_NONE                   0x00000000u
+#define EXTI_TRIGGER_RISING                 0x00000001u
+#define EXTI_TRIGGER_FALLING                0x00000002u
+#define EXTI_TRIGGER_RISING_FALLING         (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_GPIOSel  EXTI GPIOSel
+  * @brief
+  * @{
+  */
+#define EXTI_GPIOA                          0x00000000u
+#define EXTI_GPIOB                          0x00000001u
+#define EXTI_GPIOC                          0x00000002u
+#define EXTI_GPIOD                          0x00000003u
+#if defined (GPIOE)
+#define EXTI_GPIOE                          0x00000004u
+#endif /* GPIOE */
+#if defined (GPIOF)
+#define EXTI_GPIOF                          0x00000005u
+#endif /* GPIOF */
+#if defined (GPIOG)
+#define EXTI_GPIOG                          0x00000006u
+#endif /* GPIOG */
+#define EXTI_GPIOH                          0x00000007u
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private constants --------------------------------------------------------*/
+/** @defgroup EXTI_Private_Constants EXTI Private Constants
+  * @{
+  */
+/**
+  * @brief  EXTI Line property definition
+  */
+#define EXTI_PROPERTY_SHIFT                  24u
+#define EXTI_CONFIG                         (0x02uL << EXTI_PROPERTY_SHIFT)
+#define EXTI_GPIO                           ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
+#define EXTI_RESERVED                       (0x08uL << EXTI_PROPERTY_SHIFT)
+#define EXTI_PROPERTY_MASK                  (EXTI_CONFIG | EXTI_GPIO)
+
+/**
+  * @brief  EXTI bit usage
+  */
+#define EXTI_PIN_MASK                       0x0000001Fu
+
+/**
+  * @brief  EXTI Mask for interrupt & event mode
+  */
+#define EXTI_MODE_MASK                      (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
+
+/**
+  * @brief  EXTI Mask for trigger possibilities
+  */
+#define EXTI_TRIGGER_MASK                   (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
+
+/**
+  * @brief  EXTI Line number
+  */
+#if defined(EXTI_IMR_IM23)
+#define EXTI_LINE_NB                        24UL
+#else
+#define EXTI_LINE_NB                        23UL
+#endif /* EXTI_IMR_IM23 */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup EXTI_Private_Macros EXTI Private Macros
+  * @{
+  */
+#define IS_EXTI_LINE(__LINE__)          ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
+                                        ((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG)              || \
+                                         (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO))               && \
+                                         (((__LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
+
+#define IS_EXTI_MODE(__LINE__)          ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
+                                         (((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
+
+#define IS_EXTI_TRIGGER(__LINE__)       (((__LINE__)  & ~EXTI_TRIGGER_MASK) == 0x00u)
+
+#define IS_EXTI_PENDING_EDGE(__LINE__)  ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
+
+#define IS_EXTI_CONFIG_LINE(__LINE__)   (((__LINE__) & EXTI_CONFIG) != 0x00u)
+
+#if !defined (GPIOE)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOH))
+#elif !defined (GPIOF)
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOH))
+#else
+#define IS_EXTI_GPIO_PORT(__PORT__)     (((__PORT__) == EXTI_GPIOA) || \
+                                         ((__PORT__) == EXTI_GPIOB) || \
+                                         ((__PORT__) == EXTI_GPIOC) || \
+                                         ((__PORT__) == EXTI_GPIOD) || \
+                                         ((__PORT__) == EXTI_GPIOE) || \
+                                         ((__PORT__) == EXTI_GPIOF) || \
+                                         ((__PORT__) == EXTI_GPIOG) || \
+                                         ((__PORT__) == EXTI_GPIOH))
+#endif /* GPIOE */
+
+#define IS_EXTI_GPIO_PIN(__PIN__)       ((__PIN__) < 16U)
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
+  * @brief    EXTI Exported Functions
+  * @{
+  */
+
+/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
+  * @brief    Configuration functions
+  * @{
+  */
+/* Configuration functions ****************************************************/
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
+HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
+HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
+  * @brief    IO operation functions
+  * @{
+  */
+/* IO operation functions *****************************************************/
+void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
+uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32l1xx_HAL_EXTI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash.c

@@ -138,29 +138,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -426,7 +410,7 @@ void HAL_FLASH_IRQHandler(void)
 
 /**
   * @brief  FLASH end of operation interrupt callback
-  * @param  ReturnValue: The value saved in this parameter depends on the ongoing procedure
+  * @param  ReturnValue The value saved in this parameter depends on the ongoing procedure
   *                 - Pages Erase: Address of the page which has been erased 
   *                    (if 0xFFFFFFFF, it means that all the selected pages have been erased)
   *                 - Program: Address which was selected for data program
@@ -444,7 +428,7 @@ __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
 
 /**
   * @brief  FLASH operation error interrupt callback
-  * @param  ReturnValue: The value saved in this parameter depends on the ongoing procedure
+  * @param  ReturnValue The value saved in this parameter depends on the ongoing procedure
   *                 - Pages Erase: Address of the page which returned an error
   *                 - Program: Address which was selected for data program
   * @retval none
@@ -491,16 +475,24 @@ HAL_StatusTypeDef HAL_FLASH_Unlock(void)
     {  
       WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1);
       WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2);
+      
+      /* Verify that PELOCK is unlocked */
+      if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
+      {
+        return HAL_ERROR;
+      }
     }
     
     /* Unlocking the program memory access */
     WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY1);
     WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2);  
-  }
+    
-  else
+    /* Verify that PRGLOCK is unlocked */
+    if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK))
     {
       return HAL_ERROR;
     }
+  }
   
   return HAL_OK; 
 }
@@ -531,16 +523,24 @@ HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
       /* Unlocking FLASH_PECR register access*/
       WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1);
       WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2);
+
+      /* Verify that PELOCK is unlocked */
+      if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK))
+      {
+        return HAL_ERROR;
+      }
     }
 
     /* Unlocking the option bytes block access */
     WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1);
     WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2);
-  }
+
-  else
+    /* Verify that OPTLOCK is unlocked */
+    if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_OPTLOCK))
     {
       return HAL_ERROR;
     }
+  }
   
   return HAL_OK;  
 }

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -137,9 +121,7 @@ typedef struct
   * @{
   */ 
 
-#ifndef FLASH_SIZE // MBED
 #define FLASH_SIZE                (uint32_t)((*((uint32_t *)FLASHSIZE_BASE)&0xFFFFU) * 1024U)
-#endif // MBED
 #define FLASH_PAGE_SIZE           (256U)  /*!< FLASH Page Size in bytes */
 
 /**

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ex.c

@@ -36,29 +36,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -808,7 +792,7 @@ HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Addr
   HAL_StatusTypeDef status = HAL_OK;
 
   /* Check the parameters */
-  assert_param(IS_TYPEPROGRAMDATA(TypeErase));
+  assert_param(IS_TYPEERASEDATA(TypeErase));
   assert_param(IS_FLASH_DATA_ADDRESS(Address));
 
   /* Wait for last operation to be completed */
@@ -1065,7 +1049,7 @@ static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR)
     status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
   }
 
-  /* Return the Option Byte BOR programmation Status */
+  /* Return the Option Byte BOR Programming Status */
   return status;
 }
 
@@ -1076,7 +1060,7 @@ static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR)
 static uint8_t FLASH_OB_GetUser(void)
 {
   /* Return the User Option Byte */
-  return (uint8_t)((FLASH->OBR & FLASH_OBR_USER) >> 16U);
+  return (uint8_t)((FLASH->OBR & (FLASH_OBR_IWDG_SW | FLASH_OBR_nRST_STOP | FLASH_OBR_nRST_STDBY)) >> 16U);
 }
 
 /**
@@ -1089,7 +1073,16 @@ static uint8_t FLASH_OB_GetUser(void)
   */
 static uint8_t FLASH_OB_GetRDP(void)
 {
-  return (uint8_t)(FLASH->OBR & FLASH_OBR_RDPRT);
+  uint8_t rdp_level = (uint8_t)(FLASH->OBR & FLASH_OBR_RDPRT);
+
+  if ((rdp_level != OB_RDP_LEVEL_0) && (rdp_level != OB_RDP_LEVEL_2))
+  {
+    return (OB_RDP_LEVEL_1);
+  }
+  else
+  {
+    return (rdp_level);
+  }
 }
 
 /**
@@ -1439,7 +1432,7 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, u
   assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
 
   /* Get the User Option byte register */
-  tmp1 = OB->USER & ((~FLASH_OBR_USER) >> 16U);
+  tmp1 = OB->USER & ((~(FLASH_OBR_IWDG_SW | FLASH_OBR_nRST_STOP | FLASH_OBR_nRST_STDBY)) >> 16U);
 
   /* Calculate the user option byte to write */
   tmp = (uint32_t)(((uint32_t)~((uint32_t)((uint32_t)(OB_IWDG) | (uint32_t)(OB_STOP) | (uint32_t)(OB_STDBY) | tmp1))) << 16U);

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ramfunc.c

@@ -30,29 +30,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -96,8 +80,8 @@ extern FLASH_ProcessTypeDef pFlash;
  * @{
  */
 
-static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout);
+static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout);
-static __RAM_FUNC FLASHRAM_SetErrorCode(void);
+static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void);
 
 /**
   * @}
@@ -128,7 +112,7 @@ static __RAM_FUNC FLASHRAM_SetErrorCode(void);
   * @note  This function can be used only when the user code is running from Internal SRAM.
   * @retval HAL status
   */
-__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void)
 {
   /* Enable the Power Down in Run mode*/
   __HAL_FLASH_POWER_DOWN_ENABLE();
@@ -141,7 +125,7 @@ __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
   * @note  This function can be used only when the user code is running from Internal SRAM.
   * @retval HAL status
   */
-__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
 {
   /* Disable the Power Down in Run mode*/
   __HAL_FLASH_POWER_DOWN_DISABLE();
@@ -178,7 +162,7 @@ __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
   *         is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes).
   * @retval HAL status
   */
-__RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
 {
   HAL_StatusTypeDef status = HAL_OK;
 
@@ -239,33 +223,26 @@ __RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_A
   *         beginning.
   * @retval HAL status
   */
-__RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
 {
+  uint32_t primask_bit;
   uint32_t count = 0U; 
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008U) 
-     This bit prevents the interruption of multicycle instructions and therefore 
-     will increase the interrupt latency. of Cortex-M3. */
-  SET_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
-
   /* Wait for last operation to be completed */
   status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
   
   if(status == HAL_OK)
   {
+    /* Disable all IRQs */
+    primask_bit = __get_PRIMASK();
+    __disable_irq();
+    
     /* Proceed to program the new half page */
     SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
     SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
     SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
 
-    /* Wait for last operation to be completed */
-    status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    if(status == HAL_OK)
-    {
-      /* Disable all IRQs */
-      __disable_irq();
-
     /* Write the first half page directly with 32 different words */
     while(count < 32U)
     {
@@ -283,20 +260,17 @@ __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuf
       count ++;  
     }
     
-      /* Enable IRQs */
-      __enable_irq();
-
     /* Wait for last operation to be completed */
     status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    }
     
     /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
-  }
 
-  CLEAR_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
+    /* Enable IRQs */
+    __set_PRIMASK(primask_bit);    
+  }
 
   /* Return the Write Status */
   return status;
@@ -305,8 +279,8 @@ __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuf
 
 /**
   * @brief  Program a half page in program memory.
-  * @param  Address: specifies the address to be written.
+  * @param  Address specifies the address to be written.
-  * @param  pBuffer: pointer to the buffer  containing the data to be  written to 
+  * @param  pBuffer pointer to the buffer  containing the data to be  written to 
   *         the half page.
   * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
   *         must be called before.
@@ -327,28 +301,25 @@ __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuf
   *         beginning.
   * @retval HAL status
   */
-__RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
 {
+  uint32_t primask_bit;
   uint32_t count = 0U; 
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008U) 
-     This bit prevents the interruption of multicycle instructions and therefore 
-     will increase the interrupt latency. of Cortex-M3. */
-  SET_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
-  
   /* Wait for last operation to be completed */
   status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
   
   if(status == HAL_OK)
   {
+    /* Disable all IRQs */
+    primask_bit = __get_PRIMASK();
+    __disable_irq();
+
     /* Proceed to program the new half page */
     SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
     SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
     
-    /* Disable all IRQs */
-    __disable_irq();
-
     /* Write one half page directly with 32 different words */
     while(count < 32U)
     {
@@ -360,15 +331,13 @@ __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
     /* Wait for last operation to be completed */
     status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
  
-    /* Enable IRQs */
-    __enable_irq();
- 
     /* If the write operation is completed, disable the PROG and FPRG bits */
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
-  }
 
-  CLEAR_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
+    /* Enable IRQs */
+    __set_PRIMASK(primask_bit);
+  }
    
   /* Return the Write Status */
   return status;
@@ -424,7 +393,7 @@ __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
   *            @arg @ref HAL_FLASH_ERROR_OPTV    FLASH Option valid error flag 
   * @retval HAL Status
   */
-__RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t * Error)
 { 
   *Error = pFlash.ErrorCode;
   return HAL_OK;  
@@ -441,7 +410,7 @@ __RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error)
 
 /**
   * @brief  Erase a double word in data memory.
-  * @param  Address: specifies the address to be erased.
+  * @param  Address specifies the address to be erased.
   * @note   To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
   *         must be called before.
   *         Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
@@ -456,20 +425,20 @@ __RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error)
   * @retval HAL status
   */
 
-__RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
 {
+  uint32_t primask_bit;
   HAL_StatusTypeDef status = HAL_OK;
   
-  /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008U) 
-     This bit prevents the interruption of multicycle instructions and therefore 
-     will increase the interrupt latency. of Cortex-M3. */
-  SET_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
-    
   /* Wait for last operation to be completed */
   status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
   
   if(status == HAL_OK)
   {
+    /* Disable all IRQs */
+    primask_bit = __get_PRIMASK();
+    __disable_irq();
+
     /* If the previous operation is completed, proceed to erase the next double word */
     /* Set the ERASE bit */
     SET_BIT(FLASH->PECR, FLASH_PECR_ERASE);
@@ -488,9 +457,11 @@ __RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
     /* If the erase operation is completed, disable the ERASE and DATA bits */
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA);
-  }  
 
-  CLEAR_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
+    /* Enable IRQs */
+    __set_PRIMASK(primask_bit);
+ 
+  }  
       
   /* Return the erase status */
   return status;
@@ -498,8 +469,8 @@ __RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
 
 /**
   * @brief  Write a double word in data memory without erase.
-  * @param  Address: specifies the address to be written.
+  * @param  Address specifies the address to be written.
-  * @param  Data: specifies the data to be written.
+  * @param  Data specifies the data to be written.
   * @note   To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function
   *         must be called before.
   *         Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access
@@ -514,20 +485,20 @@ __RAM_FUNC HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address)
   *         operations such as breakpoints, periodic updates, etc.).
   * @retval HAL status
   */ 
-__RAM_FUNC HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data)
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data)
 {
+  uint32_t primask_bit;
   HAL_StatusTypeDef status = HAL_OK;
 
-  /* Set the DISMCYCINT[0] bit in the Auxillary Control Register (0xE000E008U) 
-     This bit prevents the interruption of multicycle instructions and therefore 
-     will increase the interrupt latency. of Cortex-M3. */
-  SET_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
-    
   /* Wait for last operation to be completed */
   status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
   
   if(status == HAL_OK)
   {
+    /* Disable all IRQs */
+    primask_bit = __get_PRIMASK();
+    __disable_irq();
+
     /* If the previous operation is completed, proceed to program the new data*/
     SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
     SET_BIT(FLASH->PECR, FLASH_PECR_DATA);
@@ -543,9 +514,10 @@ __RAM_FUNC HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t D
     /* If the write operation is completed, disable the FPRG and DATA bits */
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
     CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA);     
-  }
 
-  CLEAR_BIT(SCnSCB->ACTLR, SCnSCB_ACTLR_DISMCYCINT_Msk);
+    /* Enable IRQs */
+    __set_PRIMASK(primask_bit);
+  }
       
   /* Return the Write Status */
   return status;
@@ -567,7 +539,7 @@ __RAM_FUNC HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t D
   * @brief  Set the specific FLASH error flag.
   * @retval HAL Status
   */
-static __RAM_FUNC FLASHRAM_SetErrorCode(void)
+static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void)
 {
   uint32_t flags = 0U;
   
@@ -610,10 +582,10 @@ static __RAM_FUNC FLASHRAM_SetErrorCode(void)
 
 /**
   * @brief  Wait for a FLASH operation to complete.
-  * @param  Timeout: maximum flash operationtimeout
+  * @param  Timeout maximum flash operationtimeout
   * @retval HAL status
   */
-static __RAM_FUNC  FLASHRAM_WaitForLastOperation(uint32_t Timeout)
+static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout)
 { 
     /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
        Even if the FLASH operation fails, the BUSY flag will be reset and an error

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_flash_ramfunc.h

@@ -0,0 +1,119 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_flash_ramfunc.h
+  * @author  MCD Application Team
+  * @brief   Header file of FLASH RAMFUNC driver.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_FLASH_RAMFUNC_H
+#define __STM32L1xx_FLASH_RAMFUNC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup FLASH_RAMFUNC
+  * @{
+  */ 
+
+/* Exported types ------------------------------------------------------------*/ 
+
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup FLASH_RAMFUNC_Exported_Functions
+  * @{
+  */
+
+/*
+  * @brief  FLASH memory functions that should be executed from internal SRAM.
+  *         These functions are defined inside the "stm32l1xx_hal_flash_ramfunc.c"
+  *         file.
+  */
+  
+/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
+  * @{
+  */
+
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void);
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void);
+
+/**
+  * @}
+  */ 
+
+/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group2
+  * @{
+  */
+
+#if defined(FLASH_PECR_PARALLBANK)
+
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2);
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2);
+
+#endif /* FLASH_PECR_PARALLBANK */
+
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer);
+
+/**
+  * @}
+  */ 
+
+/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group3
+  * @{
+  */
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t *Error);
+/**
+  * @}
+  */ 
+
+/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group4
+  * @{
+  */
+
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address);
+__RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */ 
+
+/**
+  * @}
+  */ 
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_FLASH_RAMFUNC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_gpio.c

@@ -103,29 +103,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -186,8 +170,8 @@
 
 /**
   * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
-  * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
+  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
+  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
   *         the configuration information for the specified GPIO peripheral.
   * @retval None
   */
@@ -212,27 +196,6 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
     if (iocurrent)
     {
       /*--------------------- GPIO Mode Configuration ------------------------*/
-      /* In case of Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 
-      {
-        /* Check the Alternate function parameters */
-        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
-        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-        
-        /* Configure Alternate function mapped with the current IO */ 
-        /* Identify AFRL or AFRH register based on IO position*/
-        temp = GPIOx->AFR[position >> 3];
-        CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;      
-        SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));       
-        GPIOx->AFR[position >> 3] = temp;
-      }
-
-      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
-      temp = GPIOx->MODER;
-      CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));   
-      SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
-      GPIOx->MODER = temp;
-
       /* In case of Output or Alternate function mode selection */
       if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
           (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
@@ -258,6 +221,27 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
       SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
       GPIOx->PUPDR = temp;
 
+      /* In case of Alternate function mode selection */
+      if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
+      {
+        /* Check the Alternate function parameters */
+        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
+        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+
+        /* Configure Alternate function mapped with the current IO */
+        /* Identify AFRL or AFRH register based on IO position*/
+        temp = GPIOx->AFR[position >> 3];
+        CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
+        SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
+        GPIOx->AFR[position >> 3] = temp;
+      }
+
+      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+      temp = GPIOx->MODER;
+      CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
+      SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
+      GPIOx->MODER = temp;
+
       /*--------------------- EXTI Mode Configuration ------------------------*/
       /* Configure the External Interrupt or event for the current IO */
       if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
@@ -312,8 +296,8 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
 
 /**
   * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
-  * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
+  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-  * @param  GPIO_Pin: specifies the port bit to be written.
+  * @param  GPIO_Pin specifies the port bit to be written.
   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
   * @retval None
   */
@@ -335,22 +319,6 @@ void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
 
     if (iocurrent)
     {
-      /*------------------------- GPIO Mode Configuration --------------------*/
-      /* Configure IO Direction in Input Floting Mode */
-      CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2)); 
-  
-      /* Configure the default Alternate Function in current IO */ 
-      CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
-  
-      /* Configure the default value for IO Speed */
-      CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
-                  
-      /* Configure the default value IO Output Type */
-      CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
-  
-      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
-      CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
-
       /*------------------------- EXTI Mode Configuration --------------------*/
       /* Clear the External Interrupt or Event for the current IO */
 
@@ -358,9 +326,6 @@ void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
       tmp &= ((0x0FU) << (4 * (position & 0x03)));
       if (tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))))
       {
-        tmp = (0x0FU) << (4 * (position & 0x03));
-        CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
-        
         /* Clear EXTI line configuration */
         CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
         CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
@@ -368,7 +333,25 @@ void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
         /* Clear Rising Falling edge configuration */
         CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
         CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
+
+        tmp = (0x0FU) << (4 * (position & 0x03));
+        CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
       }
+
+      /*------------------------- GPIO Mode Configuration --------------------*/
+      /* Configure IO Direction in Input Floting Mode */
+      CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2));
+
+      /* Configure the default Alternate Function in current IO */
+      CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
+      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
+      CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
+
+      /* Configure the default value IO Output Type */
+      CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
+
+      /* Configure the default value for IO Speed */
+      CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
     }
 
     position++;
@@ -393,8 +376,8 @@ void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
 
 /**
   * @brief  Reads the specified input port pin.
-  * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices 
+  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-  * @param  GPIO_Pin: specifies the port bit to read.
+  * @param  GPIO_Pin specifies the port bit to read.
   *         This parameter can be GPIO_PIN_x where x can be (0..15).
   * @retval The input port pin value.
   */
@@ -421,10 +404,10 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
   * @note   This function uses GPIOx_BSRR register to allow atomic read/modify
   *         accesses. In this way, there is no risk of an IRQ occurring between
   *         the read and the modify access.
-  * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
+  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-  * @param  GPIO_Pin: specifies the port bit to be written.
+  * @param  GPIO_Pin specifies the port bit to be written.
   *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  * @param  PinState: specifies the value to be written to the selected bit.
+  * @param  PinState specifies the value to be written to the selected bit.
   *          This parameter can be one of the GPIO_PinState enum values:
   *            @arg GPIO_PIN_RESET: to clear the port pin
   *            @arg GPIO_PIN_SET: to set the port pin
@@ -448,16 +431,22 @@ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState Pin
 
 /**
   * @brief  Toggles the specified GPIO pin
-  * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices 
+  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-  * @param  GPIO_Pin: specifies the pins to be toggled.
+  * @param  GPIO_Pin specifies the pins to be toggled.
   * @retval None
   */
 void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 {
+  uint32_t odr;
+
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
 
-  GPIOx->ODR ^= GPIO_Pin;
+  /* get current Ouput Data Register value */
+  odr = GPIOx->ODR;
+
+  /* Set selected pins that were at low level, and reset ones that were high */
+  GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
 }
 
 /**
@@ -475,8 +464,8 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
 *         you must call also HAL_GPIO_LockPin with GPIO_Pin - 8.
 *         (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding
 *         GPIO_PIN_0 to GPIO_PIN_7).
-* @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices 
+* @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
-* @param  GPIO_Pin: Specifies the port bit to be locked.
+* @param  GPIO_Pin Specifies the port bit to be locked.
 *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
 * @retval None
 */
@@ -496,9 +485,10 @@ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
   GPIOx->LCKR = GPIO_Pin;
   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
   GPIOx->LCKR = tmp;
-  /* Read LCKK bit*/
+  /* Read LCKK register. This read is mandatory to complete key lock sequence */
   tmp = GPIOx->LCKR;
 
+  /* Read again in order to confirm lock is active */
   if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
   {
     return HAL_OK;
@@ -511,7 +501,7 @@ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
 
 /**
   * @brief  This function handles EXTI interrupt request.
-  * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
+  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
   * @retval None
   */
 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
@@ -526,7 +516,7 @@ void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
 
 /**
   * @brief  EXTI line detection callbacks.
-  * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
+  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
   * @retval None
   */
 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_gpio.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -199,8 +183,8 @@ typedef enum
 
 #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
 
-#define IS_GPIO_PIN(__PIN__)        ((((__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
+#define IS_GPIO_PIN(__PIN__)        ((((uint32_t)(__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
-                                     (((__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
+                                     (((uint32_t)(__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
 
 #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
                             ((PULL) == GPIO_PULLDOWN))
@@ -233,7 +217,7 @@ typedef enum
 
 /**
   * @brief  Checks whether the specified EXTI line flag is set or not.
-  * @param  __EXTI_LINE__: specifies the EXTI line flag to check.
+  * @param  __EXTI_LINE__ specifies the EXTI line flag to check.
   *         This parameter can be GPIO_PIN_x where x can be(0..15)
   * @retval The new state of __EXTI_LINE__ (SET or RESET).
   */
@@ -241,7 +225,7 @@ typedef enum
 
 /**
   * @brief  Clears the EXTI's line pending flags.
-  * @param  __EXTI_LINE__: specifies the EXTI lines flags to clear.
+  * @param  __EXTI_LINE__ specifies the EXTI lines flags to clear.
   *         This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
   * @retval None
   */
@@ -249,7 +233,7 @@ typedef enum
 
 /**
   * @brief  Checks whether the specified EXTI line is asserted or not.
-  * @param  __EXTI_LINE__: specifies the EXTI line to check.
+  * @param  __EXTI_LINE__ specifies the EXTI line to check.
   *          This parameter can be GPIO_PIN_x where x can be(0..15)
   * @retval The new state of __EXTI_LINE__ (SET or RESET).
   */
@@ -257,7 +241,7 @@ typedef enum
 
 /**
   * @brief  Clears the EXTI's line pending bits.
-  * @param  __EXTI_LINE__: specifies the EXTI lines to clear.
+  * @param  __EXTI_LINE__ specifies the EXTI lines to clear.
   *          This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
   * @retval None
   */
@@ -265,7 +249,7 @@ typedef enum
 
 /**
   * @brief  Generates a Software interrupt on selected EXTI line.
-  * @param  __EXTI_LINE__: specifies the EXTI line to check.
+  * @param  __EXTI_LINE__ specifies the EXTI line to check.
   *          This parameter can be GPIO_PIN_x where x can be(0..15)
   * @retval None
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_gpio_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_i2c.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -101,17 +85,17 @@ typedef struct
   *             01 : Abort (Abort user request on going)
   *             10 : Timeout
   *             11 : Error
-  *          b5     IP initilisation status
+  *          b5     Peripheral initilisation status
-  *             0  : Reset (IP not initialized)
+  *             0  : Reset (Peripheral not initialized)
-  *             1  : Init done (IP initialized and ready to use. HAL I2C Init function called)
+  *             1  : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
   *          b4     (not used)
   *             x  : Should be set to 0
   *          b3
   *             0  : Ready or Busy (No Listen mode ongoing)
-  *             1  : Listen (IP in Address Listen Mode)
+  *             1  : Listen (Peripheral in Address Listen Mode)
   *          b2     Intrinsic process state
   *             0  : Ready
-  *             1  : Busy (IP busy with some configuration or internal operations)
+  *             1  : Busy (Peripheral busy with some configuration or internal operations)
   *          b1     Rx state
   *             0  : Ready (no Rx operation ongoing)
   *             1  : Busy (Rx operation ongoing)
@@ -144,19 +128,19 @@ typedef enum
 
 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
   * @brief  HAL Mode structure definition
-  * @note  HAL I2C Mode value coding follow below described bitmap :
+  * @note  HAL I2C Mode value coding follow below described bitmap :\n
-  *          b7     (not used)
+  *          b7     (not used)\n
-  *             x  : Should be set to 0
+  *             x  : Should be set to 0\n
-  *          b6
+  *          b6\n
-  *             0  : None
+  *             0  : None\n
-  *             1  : Memory (HAL I2C communication is in Memory Mode)
+  *             1  : Memory (HAL I2C communication is in Memory Mode)\n
-  *          b5
+  *          b5\n
-  *             0  : None
+  *             0  : None\n
-  *             1  : Slave (HAL I2C communication is in Slave Mode)
+  *             1  : Slave (HAL I2C communication is in Slave Mode)\n
-  *          b4
+  *          b4\n
-  *             0  : None
+  *             0  : None\n
-  *             1  : Master (HAL I2C communication is in Master Mode)
+  *             1  : Master (HAL I2C communication is in Master Mode)\n
-  *          b3-b2-b1-b0  (not used)
+  *          b3-b2-b1-b0  (not used)\n
   *             xxxx : Should be set to 0000
   * @{
   */
@@ -177,13 +161,19 @@ typedef enum
   * @brief  I2C Error Code definition
   * @{
   */
-#define HAL_I2C_ERROR_NONE       (0x00000000U)    /*!< No error           */
+#define HAL_I2C_ERROR_NONE              0x00000000U    /*!< No error              */
-#define HAL_I2C_ERROR_BERR       (0x00000001U)    /*!< BERR error         */
+#define HAL_I2C_ERROR_BERR              0x00000001U    /*!< BERR error            */
-#define HAL_I2C_ERROR_ARLO       (0x00000002U)    /*!< ARLO error         */
+#define HAL_I2C_ERROR_ARLO              0x00000002U    /*!< ARLO error            */
-#define HAL_I2C_ERROR_AF         (0x00000004U)    /*!< AF error           */
+#define HAL_I2C_ERROR_AF                0x00000004U    /*!< AF error              */
-#define HAL_I2C_ERROR_OVR        (0x00000008U)    /*!< OVR error          */
+#define HAL_I2C_ERROR_OVR               0x00000008U    /*!< OVR error             */
-#define HAL_I2C_ERROR_DMA        (0x00000010U)    /*!< DMA transfer error */
+#define HAL_I2C_ERROR_DMA               0x00000010U    /*!< DMA transfer error    */
-#define HAL_I2C_ERROR_TIMEOUT    (0x00000020U)    /*!< Timeout Error      */
+#define HAL_I2C_ERROR_TIMEOUT           0x00000020U    /*!< Timeout Error         */
+#define HAL_I2C_ERROR_SIZE              0x00000040U    /*!< Size Management error */
+#define HAL_I2C_ERROR_DMA_PARAM         0x00000080U    /*!< DMA Parameter Error   */
+#define HAL_I2C_WRONG_START             0x00000200U    /*!< Wrong start Error     */
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+#define HAL_I2C_ERROR_INVALID_CALLBACK  0x00000100U    /*!< Invalid Callback error */
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
 /**
   * @}
   */
@@ -192,7 +182,11 @@ typedef enum
   * @brief  I2C handle Structure definition
   * @{
   */
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+typedef struct __I2C_HandleTypeDef
+#else
 typedef struct
+#endif  /* USE_HAL_I2C_REGISTER_CALLBACKS */
 {
   I2C_TypeDef                *Instance;      /*!< I2C registers base address               */
 
@@ -229,8 +223,54 @@ typedef struct
 
   __IO uint32_t              EventCount;     /*!< I2C Event counter                        */
 
+
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+  void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Tx Transfer completed callback */
+  void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Rx Transfer completed callback */
+  void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Tx Transfer completed callback  */
+  void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Rx Transfer completed callback  */
+  void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);             /*!< I2C Listen Complete callback              */
+  void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Tx Transfer completed callback */
+  void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Rx Transfer completed callback */
+  void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);                  /*!< I2C Error callback                        */
+  void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Abort callback                        */
+
+  void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);  /*!< I2C Slave Address Match callback */
+
+  void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);                /*!< I2C Msp Init callback                     */
+  void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Msp DeInit callback                   */
+
+#endif  /* USE_HAL_I2C_REGISTER_CALLBACKS */
 } I2C_HandleTypeDef;
 
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL I2C Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_I2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< I2C Master Tx Transfer completed callback ID  */
+  HAL_I2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< I2C Master Rx Transfer completed callback ID  */
+  HAL_I2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< I2C Slave Tx Transfer completed callback ID   */
+  HAL_I2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< I2C Slave Rx Transfer completed callback ID   */
+  HAL_I2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< I2C Listen Complete callback ID               */
+  HAL_I2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< I2C Memory Tx Transfer callback ID            */
+  HAL_I2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< I2C Memory Rx Transfer completed callback ID  */
+  HAL_I2C_ERROR_CB_ID                   = 0x07U,    /*!< I2C Error callback ID                         */
+  HAL_I2C_ABORT_CB_ID                   = 0x08U,    /*!< I2C Abort callback ID                         */
+
+  HAL_I2C_MSPINIT_CB_ID                 = 0x09U,    /*!< I2C Msp Init callback ID                      */
+  HAL_I2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< I2C Msp DeInit callback ID                    */
+
+} HAL_I2C_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL I2C Callback pointer definition
+  */
+typedef  void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
+typedef  void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
+
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
 /**
   * @}
   */
@@ -239,6 +279,7 @@ typedef struct
   * @}
   */
 /* Exported constants --------------------------------------------------------*/
+
 /** @defgroup I2C_Exported_Constants I2C Exported Constants
   * @{
   */
@@ -246,7 +287,7 @@ typedef struct
 /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
   * @{
   */
-#define I2C_DUTYCYCLE_2                 (0x00000000U)
+#define I2C_DUTYCYCLE_2                 0x00000000U
 #define I2C_DUTYCYCLE_16_9              I2C_CCR_DUTY
 /**
   * @}
@@ -255,8 +296,8 @@ typedef struct
 /** @defgroup I2C_addressing_mode I2C addressing mode
   * @{
   */
-#define I2C_ADDRESSINGMODE_7BIT         (0x00004000U)
+#define I2C_ADDRESSINGMODE_7BIT         0x00004000U
-#define I2C_ADDRESSINGMODE_10BIT        (I2C_OAR1_ADDMODE | (0x00004000U))
+#define I2C_ADDRESSINGMODE_10BIT        (I2C_OAR1_ADDMODE | 0x00004000U)
 /**
   * @}
   */
@@ -264,7 +305,7 @@ typedef struct
 /** @defgroup I2C_dual_addressing_mode  I2C dual addressing mode
   * @{
   */
-#define I2C_DUALADDRESS_DISABLE         (0x00000000U)
+#define I2C_DUALADDRESS_DISABLE        0x00000000U
 #define I2C_DUALADDRESS_ENABLE         I2C_OAR2_ENDUAL
 /**
   * @}
@@ -273,7 +314,7 @@ typedef struct
 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
   * @{
   */
-#define I2C_GENERALCALL_DISABLE         (0x00000000U)
+#define I2C_GENERALCALL_DISABLE        0x00000000U
 #define I2C_GENERALCALL_ENABLE         I2C_CR1_ENGC
 /**
   * @}
@@ -282,7 +323,7 @@ typedef struct
 /** @defgroup I2C_nostretch_mode I2C nostretch mode
   * @{
   */
-#define I2C_NOSTRETCH_DISABLE           (0x00000000U)
+#define I2C_NOSTRETCH_DISABLE          0x00000000U
 #define I2C_NOSTRETCH_ENABLE           I2C_CR1_NOSTRETCH
 /**
   * @}
@@ -291,17 +332,17 @@ typedef struct
 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
   * @{
   */
-#define I2C_MEMADD_SIZE_8BIT            (0x00000001U)
+#define I2C_MEMADD_SIZE_8BIT            0x00000001U
-#define I2C_MEMADD_SIZE_16BIT           (0x00000010U)
+#define I2C_MEMADD_SIZE_16BIT           0x00000010U
 /**
   * @}
   */
 
-/** @defgroup I2C_XferDirection_definition I2C XferDirection definition Master Point of View
+/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
   * @{
   */
-#define I2C_DIRECTION_RECEIVE           (0x00000000U) 
+#define I2C_DIRECTION_RECEIVE           0x00000000U
-#define I2C_DIRECTION_TRANSMIT          (0x00000001U)
+#define I2C_DIRECTION_TRANSMIT          0x00000001U
 /**
   * @}
   */
@@ -309,10 +350,18 @@ typedef struct
 /** @defgroup I2C_XferOptions_definition I2C XferOptions definition
   * @{
   */
-#define  I2C_FIRST_FRAME                (0x00000001U)
+#define  I2C_FIRST_FRAME                0x00000001U
-#define  I2C_NEXT_FRAME                 (0x00000002U)
+#define  I2C_FIRST_AND_NEXT_FRAME       0x00000002U
-#define  I2C_FIRST_AND_LAST_FRAME       (0x00000004U)
+#define  I2C_NEXT_FRAME                 0x00000004U
-#define  I2C_LAST_FRAME                 (0x00000008U)
+#define  I2C_FIRST_AND_LAST_FRAME       0x00000008U
+#define  I2C_LAST_FRAME_NO_STOP         0x00000010U
+#define  I2C_LAST_FRAME                 0x00000020U
+
+/* List of XferOptions in usage of :
+ * 1- Restart condition in all use cases (direction change or not)
+ */
+#define  I2C_OTHER_FRAME                (0x00AA0000U)
+#define  I2C_OTHER_AND_LAST_FRAME       (0xAA000000U)
 /**
   * @}
   */
@@ -333,22 +382,23 @@ typedef struct
 /** @defgroup I2C_Flag_definition I2C Flag definition
   * @{
   */
-#define I2C_FLAG_OVR                    ((uint32_t)(1U << 16U | I2C_SR1_OVR))
+
-#define I2C_FLAG_AF                     ((uint32_t)(1U << 16U | I2C_SR1_AF))
+#define I2C_FLAG_OVR                    0x00010800U
-#define I2C_FLAG_ARLO                   ((uint32_t)(1U << 16U | I2C_SR1_ARLO))
+#define I2C_FLAG_AF                     0x00010400U
-#define I2C_FLAG_BERR                   ((uint32_t)(1U << 16U | I2C_SR1_BERR))
+#define I2C_FLAG_ARLO                   0x00010200U
-#define I2C_FLAG_TXE                    ((uint32_t)(1U << 16U | I2C_SR1_TXE))
+#define I2C_FLAG_BERR                   0x00010100U
-#define I2C_FLAG_RXNE                   ((uint32_t)(1U << 16U | I2C_SR1_RXNE))
+#define I2C_FLAG_TXE                    0x00010080U
-#define I2C_FLAG_STOPF                  ((uint32_t)(1U << 16U | I2C_SR1_STOPF))
+#define I2C_FLAG_RXNE                   0x00010040U
-#define I2C_FLAG_ADD10                  ((uint32_t)(1U << 16U | I2C_SR1_ADD10))
+#define I2C_FLAG_STOPF                  0x00010010U
-#define I2C_FLAG_BTF                    ((uint32_t)(1U << 16U | I2C_SR1_BTF))
+#define I2C_FLAG_ADD10                  0x00010008U
-#define I2C_FLAG_ADDR                   ((uint32_t)(1U << 16U | I2C_SR1_ADDR))
+#define I2C_FLAG_BTF                    0x00010004U
-#define I2C_FLAG_SB                     ((uint32_t)(1U << 16U | I2C_SR1_SB))
+#define I2C_FLAG_ADDR                   0x00010002U
-#define I2C_FLAG_DUALF                  ((uint32_t)(2U << 16U | I2C_SR2_DUALF))
+#define I2C_FLAG_SB                     0x00010001U
-#define I2C_FLAG_GENCALL                ((uint32_t)(2U << 16U | I2C_SR2_GENCALL))
+#define I2C_FLAG_DUALF                  0x00100080U
-#define I2C_FLAG_TRA                    ((uint32_t)(2U << 16U | I2C_SR2_TRA))
+#define I2C_FLAG_GENCALL                0x00100010U
-#define I2C_FLAG_BUSY                   ((uint32_t)(2U << 16U | I2C_SR2_BUSY))
+#define I2C_FLAG_TRA                    0x00100004U
-#define I2C_FLAG_MSL                    ((uint32_t)(2U << 16U | I2C_SR2_MSL))
+#define I2C_FLAG_BUSY                   0x00100002U
+#define I2C_FLAG_MSL                    0x00100001U
 /**
   * @}
   */
@@ -358,6 +408,7 @@ typedef struct
   */
 
 /* Exported macros -----------------------------------------------------------*/
+
 /** @defgroup I2C_Exported_Macros I2C Exported Macros
   * @{
   */
@@ -366,11 +417,19 @@ typedef struct
   * @param  __HANDLE__ specifies the I2C Handle.
   * @retval None
   */
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                                   \
+                                                                    (__HANDLE__)->State = HAL_I2C_STATE_RESET;       \
+                                                                    (__HANDLE__)->MspInitCallback = NULL;            \
+                                                                    (__HANDLE__)->MspDeInitCallback = NULL;          \
+                                                                  } while(0)
+#else
 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
+#endif
 
-/** @brief  Enable the specified I2C interrupt.
+/** @brief  Enable or disable the specified I2C interrupts.
   * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__: specifies the interrupt source to enable.
+  * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
   *         This parameter can be one of the following values:
   *            @arg I2C_IT_BUF: Buffer interrupt enable
   *            @arg I2C_IT_EVT: Event interrupt enable
@@ -378,22 +437,11 @@ typedef struct
   * @retval None
   */
 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
-
-/** @brief  Disable the specified I2C interrupt.
-  * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__: specifies the interrupt source to disable.
-  *        This parameter can be one of the following values:
-  *            @arg I2C_IT_BUF: Buffer interrupt enable
-  *            @arg I2C_IT_EVT: Event interrupt enable
-  *            @arg I2C_IT_ERR: Error interrupt enable
-  *   
-  * @retval None
-  */
 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
 
-/** @brief  Check whether the specified I2C interrupt source is enabled or not.
+/** @brief  Checks if the specified I2C interrupt source is enabled or disabled.
   * @param  __HANDLE__ specifies the I2C Handle.
-  * @param  __INTERRUPT__: specifies the I2C interrupt source to check.
+  * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
   *          This parameter can be one of the following values:
   *            @arg I2C_IT_BUF: Buffer interrupt enable
   *            @arg I2C_IT_EVT: Event interrupt enable
@@ -402,7 +450,7 @@ typedef struct
   */
 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 
-/** @brief  Check whether the specified I2C flag is set or not.
+/** @brief  Checks whether the specified I2C flag is set or not.
   * @param  __HANDLE__ specifies the I2C Handle.
   * @param  __FLAG__ specifies the flag to check.
   *         This parameter can be one of the following values:
@@ -425,10 +473,11 @@ typedef struct
   *            @arg I2C_FLAG_MSL: Master/Slave flag
   * @retval The new state of __FLAG__ (TRUE or FALSE).
   */
-#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?(((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET): \
+#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
+                                                  (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
                                                   (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
 
-/** @brief  Clear the I2C pending flags which are cleared by writing 0 in a specific bit.
+/** @brief  Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
   * @param  __HANDLE__ specifies the I2C Handle.
   * @param  __FLAG__ specifies the flag to clear.
   *         This parameter can be any combination of the following values:
@@ -441,7 +490,8 @@ typedef struct
 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
 
 /** @brief  Clears the I2C ADDR pending flag.
-  * @param  __HANDLE__: specifies the I2C Handle.
+  * @param  __HANDLE__ specifies the I2C Handle.
+  *         This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
   * @retval None
   */
 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__)    \
@@ -453,7 +503,7 @@ typedef struct
   } while(0)
 
 /** @brief  Clears the I2C STOPF pending flag.
-  * @param  __HANDLE__: specifies the I2C Handle.
+  * @param  __HANDLE__ specifies the I2C Handle.
   * @retval None
   */
 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__)           \
@@ -464,16 +514,14 @@ typedef struct
     UNUSED(tmpreg);                                    \
   } while(0)
 
-/** @brief  Enable the I2C peripheral.
+/** @brief  Enable the specified I2C peripheral.
-  * @param  __HANDLE__: specifies the I2C Handle.
+  * @param  __HANDLE__ specifies the I2C Handle.
-  *         This parameter can be I2Cx where x: 1 or 2  to select the I2C peripheral.
   * @retval None
   */
 #define __HAL_I2C_ENABLE(__HANDLE__)                  SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
 
-/** @brief  Disable the I2C peripheral.
+/** @brief  Disable the specified I2C peripheral.
-  * @param  __HANDLE__: specifies the I2C Handle.
+  * @param  __HANDLE__ specifies the I2C Handle.
-  *         This parameter can be I2Cx where x: 1 or 2  to select the I2C peripheral.
   * @retval None
   */
 #define __HAL_I2C_DISABLE(__HANDLE__)                 CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
@@ -487,7 +535,7 @@ typedef struct
   * @{
   */
 
-/** @addtogroup I2C_Exported_Functions_Group1
+/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
   * @{
   */
 /* Initialization and de-initialization functions******************************/
@@ -496,11 +544,19 @@ HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
 
+/* Callbacks Register/UnRegister functions  ***********************************/
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
+HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
+
+HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
 /**
   * @}
   */
 
-/** @addtogroup I2C_Exported_Functions_Group2
+/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
   * @{
   */
 /* IO operation functions  ****************************************************/
@@ -521,13 +577,13 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
+HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
 
 /******* Non-Blocking mode: DMA */
 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
@@ -536,6 +592,11 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p
 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
+
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
+HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 /**
   * @}
   */
@@ -560,7 +621,7 @@ void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
   * @}
   */
 
-/** @addtogroup I2C_Exported_Functions_Group3
+/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
   * @{
   */
 /* Peripheral State, Mode and Error functions  *********************************/
@@ -571,79 +632,92 @@ uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
 /**
   * @}
   */
+
 /**
   * @}
   */
-
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
 /* Private constants ---------------------------------------------------------*/
 /** @defgroup I2C_Private_Constants I2C Private Constants
   * @{
   */
-#define I2C_FLAG_MASK  (0x0000FFFFU)
+#define I2C_FLAG_MASK                    0x0000FFFFU
+#define I2C_MIN_PCLK_FREQ_STANDARD       2000000U     /*!< 2 MHz                     */
+#define I2C_MIN_PCLK_FREQ_FAST           4000000U     /*!< 4 MHz                     */
 /**
   * @}
   */
 
 /* Private macros ------------------------------------------------------------*/
-/** @defgroup I2C_Private_Macro I2C Private Macros
+/** @defgroup I2C_Private_Macros I2C Private Macros
   * @{
   */
 
-#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
+#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__)             (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
-                                         ((MODE) == I2C_ADDRESSINGMODE_10BIT))
+#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__)     (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
-
+#define I2C_FREQRANGE(__PCLK__)                            ((__PCLK__)/1000000U)
-
-#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
-                                      ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
-
-#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
-                                  ((CYCLE) == I2C_DUTYCYCLE_16_9))
-#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & (0xFFFFFF01U)) == 0U)
-#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & (0xFFFFFC00U)) == 0U)
-#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
-                                   ((CALL) == I2C_GENERALCALL_ENABLE))
-
-#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
-                                    ((STRETCH) == I2C_NOSTRETCH_ENABLE))
-
-#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
-                                  ((SIZE) == I2C_MEMADD_SIZE_16BIT))
-
-#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
-
-
-#define I2C_MEM_ADD_MSB(__ADDRESS__)                       ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
-#define I2C_MEM_ADD_LSB(__ADDRESS__)                       ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
-
-
-#define I2C_FREQ_RANGE(__PCLK__)                           ((__PCLK__)/1000000U)
 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__)            (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
-#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__)            (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
+#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__)            ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
-#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9))
+#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__)      (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
                                                                   ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
                                                                   ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
 
-#define I2C_7BIT_ADD_WRITE(__ADDRESS__)                    ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
+#define I2C_7BIT_ADD_WRITE(__ADDRESS__)                    ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
 #define I2C_7BIT_ADD_READ(__ADDRESS__)                     ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
 
-#define I2C_10BIT_ADDRESS(__ADDRESS__)                     ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
+#define I2C_10BIT_ADDRESS(__ADDRESS__)                     ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
-#define I2C_10BIT_HEADER_WRITE(__ADDRESS__)                ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF0U))))
+#define I2C_10BIT_HEADER_WRITE(__ADDRESS__)                ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
-#define I2C_10BIT_HEADER_READ(__ADDRESS__)                 ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300U))) >> 7U) | (uint16_t)(0xF1U))))
+#define I2C_10BIT_HEADER_READ(__ADDRESS__)                 ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
 
+#define I2C_MEM_ADD_MSB(__ADDRESS__)                       ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
+#define I2C_MEM_ADD_LSB(__ADDRESS__)                       ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
+
+/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
+  * @{
+  */
+#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
+                                  ((CYCLE) == I2C_DUTYCYCLE_16_9))
+#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
+                                         ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
+#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
+                                      ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
+#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
+                                   ((CALL) == I2C_GENERALCALL_ENABLE))
+#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
+                                    ((STRETCH) == I2C_NOSTRETCH_ENABLE))
+#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
+                                  ((SIZE) == I2C_MEMADD_SIZE_16BIT))
+#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
+#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
+#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)      (((REQUEST) == I2C_FIRST_FRAME)              || \
+                                                       ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME)     || \
                                                        ((REQUEST) == I2C_NEXT_FRAME)               || \
                                                        ((REQUEST) == I2C_FIRST_AND_LAST_FRAME)     || \
-                                                       ((REQUEST) == I2C_LAST_FRAME))
+                                                       ((REQUEST) == I2C_LAST_FRAME)               || \
+                                                       ((REQUEST) == I2C_LAST_FRAME_NO_STOP)       || \
+                                                       IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
+
+#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME)     || \
+                                                        ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
+
+#define I2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
+#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
 /**
   * @}
   */
 
-/* Private Functions ---------------------------------------------------------*/
+/**
+  * @}
+  */
+
+/* Private functions ---------------------------------------------------------*/
 /** @defgroup I2C_Private_Functions I2C Private Functions
   * @{
   */
-/* Private functions are defined in stm32f0xx_hal_i2c.c file */
+
 /**
   * @}
   */
@@ -664,4 +738,3 @@ uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
 #endif /* __STM32L1xx_HAL_I2C_H */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_i2s.h

@@ -0,0 +1,561 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_i2s.h
+  * @author  MCD Application Team
+  * @brief   Header file of I2S HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_I2S_H
+#define STM32L1xx_HAL_I2S_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+#if defined(SPI_I2S_SUPPORT)
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup I2S
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup I2S_Exported_Types I2S Exported Types
+  * @{
+  */
+
+/**
+  * @brief I2S Init structure definition
+  */
+typedef struct
+{
+  uint32_t Mode;                /*!< Specifies the I2S operating mode.
+                                     This parameter can be a value of @ref I2S_Mode */
+
+  uint32_t Standard;            /*!< Specifies the standard used for the I2S communication.
+                                     This parameter can be a value of @ref I2S_Standard */
+
+  uint32_t DataFormat;          /*!< Specifies the data format for the I2S communication.
+                                     This parameter can be a value of @ref I2S_Data_Format */
+
+  uint32_t MCLKOutput;          /*!< Specifies whether the I2S MCLK output is enabled or not.
+                                     This parameter can be a value of @ref I2S_MCLK_Output */
+
+  uint32_t AudioFreq;           /*!< Specifies the frequency selected for the I2S communication.
+                                     This parameter can be a value of @ref I2S_Audio_Frequency */
+
+  uint32_t CPOL;                /*!< Specifies the idle state of the I2S clock.
+                                     This parameter can be a value of @ref I2S_Clock_Polarity */
+} I2S_InitTypeDef;
+
+/**
+  * @brief  HAL State structures definition
+  */
+typedef enum
+{
+  HAL_I2S_STATE_RESET      = 0x00U,  /*!< I2S not yet initialized or disabled                */
+  HAL_I2S_STATE_READY      = 0x01U,  /*!< I2S initialized and ready for use                  */
+  HAL_I2S_STATE_BUSY       = 0x02U,  /*!< I2S internal process is ongoing                    */
+  HAL_I2S_STATE_BUSY_TX    = 0x03U,  /*!< Data Transmission process is ongoing               */
+  HAL_I2S_STATE_BUSY_RX    = 0x04U,  /*!< Data Reception process is ongoing                  */
+  HAL_I2S_STATE_TIMEOUT    = 0x06U,  /*!< I2S timeout state                                  */
+  HAL_I2S_STATE_ERROR      = 0x07U   /*!< I2S error state                                    */
+} HAL_I2S_StateTypeDef;
+
+/**
+  * @brief I2S handle Structure definition
+  */
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
+typedef struct __I2S_HandleTypeDef
+#else
+typedef struct
+#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
+{
+  SPI_TypeDef                *Instance;    /*!< I2S registers base address */
+
+  I2S_InitTypeDef            Init;         /*!< I2S communication parameters */
+
+  uint16_t                   *pTxBuffPtr;  /*!< Pointer to I2S Tx transfer buffer */
+
+  __IO uint16_t              TxXferSize;   /*!< I2S Tx transfer size */
+
+  __IO uint16_t              TxXferCount;  /*!< I2S Tx transfer Counter */
+
+  uint16_t                   *pRxBuffPtr;  /*!< Pointer to I2S Rx transfer buffer */
+
+  __IO uint16_t              RxXferSize;   /*!< I2S Rx transfer size */
+
+  __IO uint16_t              RxXferCount;  /*!< I2S Rx transfer counter
+                                              (This field is initialized at the
+                                               same value as transfer size at the
+                                               beginning of the transfer and
+                                               decremented when a sample is received
+                                               NbSamplesReceived = RxBufferSize-RxBufferCount) */
+  DMA_HandleTypeDef          *hdmatx;      /*!< I2S Tx DMA handle parameters */
+
+  DMA_HandleTypeDef          *hdmarx;      /*!< I2S Rx DMA handle parameters */
+
+  __IO HAL_LockTypeDef       Lock;         /*!< I2S locking object */
+
+  __IO HAL_I2S_StateTypeDef  State;        /*!< I2S communication state */
+
+  __IO uint32_t              ErrorCode;    /*!< I2S Error code
+                                                This parameter can be a value of @ref I2S_Error */
+
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
+  void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Tx Completed callback          */
+  void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s);             /*!< I2S Rx Completed callback          */
+  void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Tx Half Completed callback     */
+  void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s);         /*!< I2S Rx Half Completed callback     */
+  void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s);              /*!< I2S Error callback                 */
+  void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s);            /*!< I2S Msp Init callback              */
+  void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s);          /*!< I2S Msp DeInit callback            */
+
+#endif  /* USE_HAL_I2S_REGISTER_CALLBACKS */
+} I2S_HandleTypeDef;
+
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
+/**
+  * @brief  HAL I2S Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_I2S_TX_COMPLETE_CB_ID             = 0x00U,    /*!< I2S Tx Completed callback ID         */
+  HAL_I2S_RX_COMPLETE_CB_ID             = 0x01U,    /*!< I2S Rx Completed callback ID         */
+  HAL_I2S_TX_HALF_COMPLETE_CB_ID        = 0x03U,    /*!< I2S Tx Half Completed callback ID    */
+  HAL_I2S_RX_HALF_COMPLETE_CB_ID        = 0x04U,    /*!< I2S Rx Half Completed callback ID    */
+  HAL_I2S_ERROR_CB_ID                   = 0x06U,    /*!< I2S Error callback ID                */
+  HAL_I2S_MSPINIT_CB_ID                 = 0x07U,    /*!< I2S Msp Init callback ID             */
+  HAL_I2S_MSPDEINIT_CB_ID               = 0x08U     /*!< I2S Msp DeInit callback ID           */
+
+} HAL_I2S_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL I2S Callback pointer definition
+  */
+typedef  void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
+
+#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup I2S_Exported_Constants I2S Exported Constants
+  * @{
+  */
+/** @defgroup I2S_Error I2S Error
+  * @{
+  */
+#define HAL_I2S_ERROR_NONE               (0x00000000U)  /*!< No error                    */
+#define HAL_I2S_ERROR_TIMEOUT            (0x00000001U)  /*!< Timeout error               */
+#define HAL_I2S_ERROR_OVR                (0x00000002U)  /*!< OVR error                   */
+#define HAL_I2S_ERROR_UDR                (0x00000004U)  /*!< UDR error                   */
+#define HAL_I2S_ERROR_DMA                (0x00000008U)  /*!< DMA transfer error          */
+#define HAL_I2S_ERROR_PRESCALER          (0x00000010U)  /*!< Prescaler Calculation error */
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
+#define HAL_I2S_ERROR_INVALID_CALLBACK   (0x00000020U)  /*!< Invalid Callback error      */
+#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
+#define HAL_I2S_ERROR_BUSY_LINE_RX       (0x00000040U)  /*!< Busy Rx Line error          */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Mode I2S Mode
+  * @{
+  */
+#define I2S_MODE_SLAVE_TX                (0x00000000U)
+#define I2S_MODE_SLAVE_RX                (SPI_I2SCFGR_I2SCFG_0)
+#define I2S_MODE_MASTER_TX               (SPI_I2SCFGR_I2SCFG_1)
+#define I2S_MODE_MASTER_RX               ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Standard I2S Standard
+  * @{
+  */
+#define I2S_STANDARD_PHILIPS             (0x00000000U)
+#define I2S_STANDARD_MSB                 (SPI_I2SCFGR_I2SSTD_0)
+#define I2S_STANDARD_LSB                 (SPI_I2SCFGR_I2SSTD_1)
+#define I2S_STANDARD_PCM_SHORT           ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
+#define I2S_STANDARD_PCM_LONG            ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Data_Format I2S Data Format
+  * @{
+  */
+#define I2S_DATAFORMAT_16B               (0x00000000U)
+#define I2S_DATAFORMAT_16B_EXTENDED      (SPI_I2SCFGR_CHLEN)
+#define I2S_DATAFORMAT_24B               ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
+#define I2S_DATAFORMAT_32B               ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
+/**
+  * @}
+  */
+
+/** @defgroup I2S_MCLK_Output I2S MCLK Output
+  * @{
+  */
+#define I2S_MCLKOUTPUT_ENABLE            (SPI_I2SPR_MCKOE)
+#define I2S_MCLKOUTPUT_DISABLE           (0x00000000U)
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
+  * @{
+  */
+#define I2S_AUDIOFREQ_192K               (192000U)
+#define I2S_AUDIOFREQ_96K                (96000U)
+#define I2S_AUDIOFREQ_48K                (48000U)
+#define I2S_AUDIOFREQ_44K                (44100U)
+#define I2S_AUDIOFREQ_32K                (32000U)
+#define I2S_AUDIOFREQ_22K                (22050U)
+#define I2S_AUDIOFREQ_16K                (16000U)
+#define I2S_AUDIOFREQ_11K                (11025U)
+#define I2S_AUDIOFREQ_8K                 (8000U)
+#define I2S_AUDIOFREQ_DEFAULT            (2U)
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
+  * @{
+  */
+#define I2S_CPOL_LOW                     (0x00000000U)
+#define I2S_CPOL_HIGH                    (SPI_I2SCFGR_CKPOL)
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
+  * @{
+  */
+#define I2S_IT_TXE                       SPI_CR2_TXEIE
+#define I2S_IT_RXNE                      SPI_CR2_RXNEIE
+#define I2S_IT_ERR                       SPI_CR2_ERRIE
+/**
+  * @}
+  */
+
+/** @defgroup I2S_Flags_Definition I2S Flags Definition
+  * @{
+  */
+#define I2S_FLAG_TXE                     SPI_SR_TXE
+#define I2S_FLAG_RXNE                    SPI_SR_RXNE
+
+#define I2S_FLAG_UDR                     SPI_SR_UDR
+#define I2S_FLAG_OVR                     SPI_SR_OVR
+#define I2S_FLAG_FRE                     SPI_SR_FRE
+
+#define I2S_FLAG_CHSIDE                  SPI_SR_CHSIDE
+#define I2S_FLAG_BSY                     SPI_SR_BSY
+
+#if defined(SPI_CR2_FRF)
+#define I2S_FLAG_MASK                   (SPI_SR_RXNE\
+                                         | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
+#else
+#define I2S_FLAG_MASK                   (SPI_SR_RXNE\
+                                         | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_CHSIDE | SPI_SR_BSY)
+#endif
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup I2S_Exported_macros I2S Exported Macros
+  * @{
+  */
+
+/** @brief  Reset I2S handle state
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
+#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__)                do{                                                  \
+                                                                    (__HANDLE__)->State = HAL_I2S_STATE_RESET;       \
+                                                                    (__HANDLE__)->MspInitCallback = NULL;            \
+                                                                    (__HANDLE__)->MspDeInitCallback = NULL;          \
+                                                                  } while(0)
+#else
+#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
+#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
+
+/** @brief  Enable the specified SPI peripheral (in I2S mode).
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#define __HAL_I2S_ENABLE(__HANDLE__)    (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+
+/** @brief  Disable the specified SPI peripheral (in I2S mode).
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
+
+/** @brief  Enable the specified I2S interrupts.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
+  *         This parameter can be one of the following values:
+  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
+  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
+  *            @arg I2S_IT_ERR: Error interrupt enable
+  * @retval None
+  */
+#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__)    (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
+
+/** @brief  Disable the specified I2S interrupts.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
+  *         This parameter can be one of the following values:
+  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
+  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
+  *            @arg I2S_IT_ERR: Error interrupt enable
+  * @retval None
+  */
+#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
+
+/** @brief  Checks if the specified I2S interrupt source is enabled or disabled.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  *         This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
+  * @param  __INTERRUPT__ specifies the I2S interrupt source to check.
+  *          This parameter can be one of the following values:
+  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
+  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
+  *            @arg I2S_IT_ERR: Error interrupt enable
+  * @retval The new state of __IT__ (TRUE or FALSE).
+  */
+#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
+                                                              & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
+
+/** @brief  Checks whether the specified I2S flag is set or not.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @param  __FLAG__ specifies the flag to check.
+  *         This parameter can be one of the following values:
+  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
+  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
+  *            @arg I2S_FLAG_UDR: Underrun flag
+  *            @arg I2S_FLAG_OVR: Overrun flag
+  *            @arg I2S_FLAG_FRE: Frame error flag
+  *            @arg I2S_FLAG_CHSIDE: Channel Side flag
+  *            @arg I2S_FLAG_BSY: Busy flag
+  * @retval The new state of __FLAG__ (TRUE or FALSE).
+  */
+#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
+
+/** @brief Clears the I2S OVR pending flag.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
+                                                __IO uint32_t tmpreg_ovr = 0x00U; \
+                                                tmpreg_ovr = (__HANDLE__)->Instance->DR; \
+                                                tmpreg_ovr = (__HANDLE__)->Instance->SR; \
+                                                UNUSED(tmpreg_ovr); \
+                                              }while(0U)
+/** @brief Clears the I2S UDR pending flag.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
+                                                __IO uint32_t tmpreg_udr = 0x00U;\
+                                                tmpreg_udr = ((__HANDLE__)->Instance->SR);\
+                                                UNUSED(tmpreg_udr); \
+                                              }while(0U)
+/** @brief Flush the I2S DR Register.
+  * @param  __HANDLE__ specifies the I2S Handle.
+  * @retval None
+  */
+#define __HAL_I2S_FLUSH_RX_DR(__HANDLE__)  do{\
+                                                __IO uint32_t tmpreg_dr = 0x00U;\
+                                                tmpreg_dr = ((__HANDLE__)->Instance->DR);\
+                                                UNUSED(tmpreg_dr); \
+                                              }while(0U)
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup I2S_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup I2S_Exported_Functions_Group1
+  * @{
+  */
+/* Initialization/de-initialization functions  ********************************/
+HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
+HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
+
+/* Callbacks Register/UnRegister functions  ***********************************/
+#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
+HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
+                                           pI2S_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/** @addtogroup I2S_Exported_Functions_Group2
+  * @{
+  */
+/* I/O operation functions  ***************************************************/
+/* Blocking mode: Polling */
+HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
+
+/* Non-Blocking mode: Interrupt */
+HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
+void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
+
+/* Non-Blocking mode: DMA */
+HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
+
+HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
+HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
+HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
+
+/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
+void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
+void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
+/**
+  * @}
+  */
+
+/** @addtogroup I2S_Exported_Functions_Group3
+  * @{
+  */
+/* Peripheral Control and State functions  ************************************/
+HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
+uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup I2S_Private_Macros I2S Private Macros
+  * @{
+  */
+
+/** @brief  Check whether the specified SPI flag is set or not.
+  * @param  __SR__  copy of I2S SR register.
+  * @param  __FLAG__ specifies the flag to check.
+  *         This parameter can be one of the following values:
+  *            @arg I2S_FLAG_RXNE: Receive buffer not empty flag
+  *            @arg I2S_FLAG_TXE: Transmit buffer empty flag
+  *            @arg I2S_FLAG_UDR: Underrun error flag
+  *            @arg I2S_FLAG_OVR: Overrun flag
+  *            @arg I2S_FLAG_CHSIDE: Channel side flag
+  *            @arg I2S_FLAG_BSY: Busy flag
+  * @retval SET or RESET.
+  */
+#define I2S_CHECK_FLAG(__SR__, __FLAG__)         ((((__SR__)\
+                                                    & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
+
+/** @brief  Check whether the specified SPI Interrupt is set or not.
+  * @param  __CR2__  copy of I2S CR2 register.
+  * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
+  *         This parameter can be one of the following values:
+  *            @arg I2S_IT_TXE: Tx buffer empty interrupt enable
+  *            @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
+  *            @arg I2S_IT_ERR: Error interrupt enable
+  * @retval SET or RESET.
+  */
+#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__)      ((((__CR2__)\
+                                                            & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
+
+/** @brief  Checks if I2S Mode parameter is in allowed range.
+  * @param  __MODE__ specifies the I2S Mode.
+  *         This parameter can be a value of @ref I2S_Mode
+  * @retval None
+  */
+#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX)  || \
+                               ((__MODE__) == I2S_MODE_SLAVE_RX)  || \
+                               ((__MODE__) == I2S_MODE_MASTER_TX) || \
+                               ((__MODE__) == I2S_MODE_MASTER_RX))
+
+#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS)   || \
+                                       ((__STANDARD__) == I2S_STANDARD_MSB)       || \
+                                       ((__STANDARD__) == I2S_STANDARD_LSB)       || \
+                                       ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
+                                       ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
+
+#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B)          || \
+                                        ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
+                                        ((__FORMAT__) == I2S_DATAFORMAT_24B)          || \
+                                        ((__FORMAT__) == I2S_DATAFORMAT_32B))
+
+#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
+                                        ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
+
+#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K)    && \
+                                      ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
+                                     ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
+
+/** @brief  Checks if I2S Serial clock steady state parameter is in allowed range.
+  * @param  __CPOL__ specifies the I2S serial clock steady state.
+  *         This parameter can be a value of @ref I2S_Clock_Polarity
+  * @retval None
+  */
+#define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
+                               ((__CPOL__) == I2S_CPOL_HIGH))
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* SPI_I2S_SUPPORT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L1xx_HAL_I2S_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_irda.h

@@ -0,0 +1,684 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_irda.h
+  * @author  MCD Application Team
+  * @brief   Header file of IRDA HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_HAL_IRDA_H
+#define __STM32L1xx_HAL_IRDA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup IRDA
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup IRDA_Exported_Types IRDA Exported Types
+  * @{
+  */
+/**
+  * @brief IRDA Init Structure definition
+  */
+typedef struct
+{
+  uint32_t BaudRate;                  /*!< This member configures the IRDA communication baud rate.
+                                           The baud rate is computed using the following formula:
+                                           - IntegerDivider = ((PCLKx) / (16 * (hirda->Init.BaudRate)))
+                                           - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
+
+  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
+                                           This parameter can be a value of @ref IRDA_Word_Length */
+
+  uint32_t Parity;                    /*!< Specifies the parity mode.
+                                           This parameter can be a value of @ref IRDA_Parity
+                                           @note When parity is enabled, the computed parity is inserted
+                                                 at the MSB position of the transmitted data (9th bit when
+                                                 the word length is set to 9 data bits; 8th bit when the
+                                                 word length is set to 8 data bits). */
+
+  uint32_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
+                                           This parameter can be a value of @ref IRDA_Mode */
+
+  uint8_t  Prescaler;                 /*!< Specifies the Prescaler value to be programmed
+                                           in the IrDA low-power Baud Register, for defining pulse width on which
+                                           burst acceptance/rejection will be decided. This value is used as divisor
+                                           of system clock to achieve required pulse width. */
+
+  uint32_t IrDAMode;                  /*!< Specifies the IrDA mode
+                                           This parameter can be a value of @ref IRDA_Low_Power */
+} IRDA_InitTypeDef;
+
+/**
+  * @brief HAL IRDA State structures definition
+  * @note  HAL IRDA State value is a combination of 2 different substates: gState and RxState.
+  *        - gState contains IRDA state information related to global Handle management
+  *          and also information related to Tx operations.
+  *          gState value coding follow below described bitmap :
+  *          b7-b6  Error information
+  *             00 : No Error
+  *             01 : (Not Used)
+  *             10 : Timeout
+  *             11 : Error
+  *          b5     IP initilisation status
+  *             0  : Reset (IP not initialized)
+  *             1  : Init done (IP not initialized. HAL IRDA Init function already called)
+  *          b4-b3  (not used)
+  *             xx : Should be set to 00
+  *          b2     Intrinsic process state
+  *             0  : Ready
+  *             1  : Busy (IP busy with some configuration or internal operations)
+  *          b1     (not used)
+  *             x  : Should be set to 0
+  *          b0     Tx state
+  *             0  : Ready (no Tx operation ongoing)
+  *             1  : Busy (Tx operation ongoing)
+  *        - RxState contains information related to Rx operations.
+  *          RxState value coding follow below described bitmap :
+  *          b7-b6  (not used)
+  *             xx : Should be set to 00
+  *          b5     IP initilisation status
+  *             0  : Reset (IP not initialized)
+  *             1  : Init done (IP not initialized)
+  *          b4-b2  (not used)
+  *            xxx : Should be set to 000
+  *          b1     Rx state
+  *             0  : Ready (no Rx operation ongoing)
+  *             1  : Busy (Rx operation ongoing)
+  *          b0     (not used)
+  *             x  : Should be set to 0.
+  */
+typedef enum
+{
+  HAL_IRDA_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized
+                                                   Value is allowed for gState and RxState */
+  HAL_IRDA_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
+                                                   Value is allowed for gState and RxState */
+  HAL_IRDA_STATE_BUSY              = 0x24U,    /*!< An internal process is ongoing
+                                                   Value is allowed for gState only */
+  HAL_IRDA_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing
+                                                   Value is allowed for gState only */
+  HAL_IRDA_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
+                                                   Value is allowed for RxState only */
+  HAL_IRDA_STATE_BUSY_TX_RX        = 0x23U,    /*!< Data Transmission and Reception process is ongoing
+                                                   Not to be used for neither gState nor RxState.
+                                                   Value is result of combination (Or) between gState and RxState values */
+  HAL_IRDA_STATE_TIMEOUT           = 0xA0U,    /*!< Timeout state
+                                                   Value is allowed for gState only */
+  HAL_IRDA_STATE_ERROR             = 0xE0U     /*!< Error
+                                                   Value is allowed for gState only */
+} HAL_IRDA_StateTypeDef;
+
+/**
+  * @brief IRDA handle Structure definition
+  */
+#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
+typedef struct __IRDA_HandleTypeDef
+#else
+typedef struct
+#endif  /* USE_HAL_IRDA_REGISTER_CALLBACKS */
+{
+  USART_TypeDef               *Instance;        /*!<  USART registers base address       */
+
+  IRDA_InitTypeDef            Init;             /*!<  IRDA communication parameters      */
+
+  uint8_t                     *pTxBuffPtr;      /*!<  Pointer to IRDA Tx transfer Buffer */
+
+  uint16_t                    TxXferSize;       /*!<  IRDA Tx Transfer size              */
+
+  __IO uint16_t               TxXferCount;      /*!<  IRDA Tx Transfer Counter           */
+
+  uint8_t                     *pRxBuffPtr;      /*!<  Pointer to IRDA Rx transfer Buffer */
+
+  uint16_t                    RxXferSize;       /*!<  IRDA Rx Transfer size              */
+
+  __IO uint16_t               RxXferCount;      /*!<  IRDA Rx Transfer Counter           */
+
+  DMA_HandleTypeDef           *hdmatx;          /*!<  IRDA Tx DMA Handle parameters      */
+
+  DMA_HandleTypeDef           *hdmarx;          /*!<  IRDA Rx DMA Handle parameters      */
+
+  HAL_LockTypeDef             Lock;             /*!<  Locking object                     */
+
+  __IO HAL_IRDA_StateTypeDef  gState;           /*!<  IRDA state information related to global Handle management
+                                                   and also related to Tx operations.
+                                                   This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
+
+  __IO HAL_IRDA_StateTypeDef  RxState;          /*!<  IRDA state information related to Rx operations.
+                                                   This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
+
+  __IO uint32_t               ErrorCode;        /*!< IRDA Error code                    */
+
+#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
+  void (* TxHalfCpltCallback)(struct __IRDA_HandleTypeDef *hirda);        /*!< IRDA Tx Half Complete Callback        */
+
+  void (* TxCpltCallback)(struct __IRDA_HandleTypeDef *hirda);            /*!< IRDA Tx Complete Callback             */
+
+  void (* RxHalfCpltCallback)(struct __IRDA_HandleTypeDef *hirda);        /*!< IRDA Rx Half Complete Callback        */
+
+  void (* RxCpltCallback)(struct __IRDA_HandleTypeDef *hirda);            /*!< IRDA Rx Complete Callback             */
+
+  void (* ErrorCallback)(struct __IRDA_HandleTypeDef *hirda);             /*!< IRDA Error Callback                   */
+
+  void (* AbortCpltCallback)(struct __IRDA_HandleTypeDef *hirda);         /*!< IRDA Abort Complete Callback          */
+
+  void (* AbortTransmitCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Abort Transmit Complete Callback */
+
+  void (* AbortReceiveCpltCallback)(struct __IRDA_HandleTypeDef *hirda);  /*!< IRDA Abort Receive Complete Callback  */
+
+
+  void (* MspInitCallback)(struct __IRDA_HandleTypeDef *hirda);           /*!< IRDA Msp Init callback                */
+
+  void (* MspDeInitCallback)(struct __IRDA_HandleTypeDef *hirda);         /*!< IRDA Msp DeInit callback              */
+#endif  /* USE_HAL_IRDA_REGISTER_CALLBACKS */
+
+} IRDA_HandleTypeDef;
+
+#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL IRDA Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_IRDA_TX_HALFCOMPLETE_CB_ID         = 0x00U,    /*!< IRDA Tx Half Complete Callback ID        */
+  HAL_IRDA_TX_COMPLETE_CB_ID             = 0x01U,    /*!< IRDA Tx Complete Callback ID             */
+  HAL_IRDA_RX_HALFCOMPLETE_CB_ID         = 0x02U,    /*!< IRDA Rx Half Complete Callback ID        */
+  HAL_IRDA_RX_COMPLETE_CB_ID             = 0x03U,    /*!< IRDA Rx Complete Callback ID             */
+  HAL_IRDA_ERROR_CB_ID                   = 0x04U,    /*!< IRDA Error Callback ID                   */
+  HAL_IRDA_ABORT_COMPLETE_CB_ID          = 0x05U,    /*!< IRDA Abort Complete Callback ID          */
+  HAL_IRDA_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U,    /*!< IRDA Abort Transmit Complete Callback ID */
+  HAL_IRDA_ABORT_RECEIVE_COMPLETE_CB_ID  = 0x07U,    /*!< IRDA Abort Receive Complete Callback ID  */
+
+  HAL_IRDA_MSPINIT_CB_ID                 = 0x08U,    /*!< IRDA MspInit callback ID                 */
+  HAL_IRDA_MSPDEINIT_CB_ID               = 0x09U     /*!< IRDA MspDeInit callback ID               */
+
+} HAL_IRDA_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL IRDA Callback pointer definition
+  */
+typedef  void (*pIRDA_CallbackTypeDef)(IRDA_HandleTypeDef *hirda);  /*!< pointer to an IRDA callback function */
+
+#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup IRDA_Exported_Constants IRDA Exported constants
+  * @{
+  */
+/** @defgroup IRDA_Error_Code IRDA Error Code
+  * @{
+  */
+#define HAL_IRDA_ERROR_NONE        0x00000000U   /*!< No error            */
+#define HAL_IRDA_ERROR_PE          0x00000001U   /*!< Parity error        */
+#define HAL_IRDA_ERROR_NE          0x00000002U   /*!< Noise error         */
+#define HAL_IRDA_ERROR_FE          0x00000004U   /*!< Frame error         */
+#define HAL_IRDA_ERROR_ORE         0x00000008U   /*!< Overrun error       */
+#define HAL_IRDA_ERROR_DMA         0x00000010U   /*!< DMA transfer error  */
+#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
+#define HAL_IRDA_ERROR_INVALID_CALLBACK   ((uint32_t)0x00000020U)   /*!< Invalid Callback error  */
+#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Word_Length IRDA Word Length
+  * @{
+  */
+#define IRDA_WORDLENGTH_8B         0x00000000U
+#define IRDA_WORDLENGTH_9B         ((uint32_t)USART_CR1_M)
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Parity  IRDA Parity
+  * @{
+  */
+#define IRDA_PARITY_NONE           0x00000000U
+#define IRDA_PARITY_EVEN           ((uint32_t)USART_CR1_PCE)
+#define IRDA_PARITY_ODD            ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Mode IRDA Transfer Mode
+  * @{
+  */
+#define IRDA_MODE_RX               ((uint32_t)USART_CR1_RE)
+#define IRDA_MODE_TX               ((uint32_t)USART_CR1_TE)
+#define IRDA_MODE_TX_RX            ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Low_Power IRDA Low Power
+  * @{
+  */
+#define IRDA_POWERMODE_LOWPOWER    ((uint32_t)USART_CR3_IRLP)
+#define IRDA_POWERMODE_NORMAL      0x00000000U
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Flags IRDA Flags
+  *        Elements values convention: 0xXXXX
+  *           - 0xXXXX  : Flag mask in the SR register
+  * @{
+  */
+#define IRDA_FLAG_TXE              ((uint32_t)USART_SR_TXE)
+#define IRDA_FLAG_TC               ((uint32_t)USART_SR_TC)
+#define IRDA_FLAG_RXNE             ((uint32_t)USART_SR_RXNE)
+#define IRDA_FLAG_IDLE             ((uint32_t)USART_SR_IDLE)
+#define IRDA_FLAG_ORE              ((uint32_t)USART_SR_ORE)
+#define IRDA_FLAG_NE               ((uint32_t)USART_SR_NE)
+#define IRDA_FLAG_FE               ((uint32_t)USART_SR_FE)
+#define IRDA_FLAG_PE               ((uint32_t)USART_SR_PE)
+/**
+  * @}
+  */
+
+/** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions
+  *        Elements values convention: 0xY000XXXX
+  *           - XXXX  : Interrupt mask in the XX register
+  *           - Y  : Interrupt source register (2bits)
+  *                 - 01: CR1 register
+  *                 - 10: CR2 register
+  *                 - 11: CR3 register
+  * @{
+  */
+#define IRDA_IT_PE                 ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
+#define IRDA_IT_TXE                ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
+#define IRDA_IT_TC                 ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
+#define IRDA_IT_RXNE               ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
+#define IRDA_IT_IDLE               ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
+
+#define IRDA_IT_LBD                ((uint32_t)(IRDA_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
+
+#define IRDA_IT_CTS                ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
+#define IRDA_IT_ERR                ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_EIE))
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup IRDA_Exported_Macros IRDA Exported Macros
+  * @{
+  */
+
+/** @brief Reset IRDA handle gstate & RxState
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#if USE_HAL_IRDA_REGISTER_CALLBACKS == 1
+#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
+                                                       (__HANDLE__)->gState = HAL_IRDA_STATE_RESET;      \
+                                                       (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET;     \
+                                                       (__HANDLE__)->MspInitCallback = NULL;             \
+                                                       (__HANDLE__)->MspDeInitCallback = NULL;           \
+                                                     } while(0U)
+#else
+#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
+                                                       (__HANDLE__)->gState = HAL_IRDA_STATE_RESET;      \
+                                                       (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET;     \
+                                                     } while(0U)
+#endif /*USE_HAL_IRDA_REGISTER_CALLBACKS  */
+
+/** @brief  Flush the IRDA DR register
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
+
+/** @brief  Check whether the specified IRDA flag is set or not.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @param  __FLAG__ specifies the flag to check.
+  *        This parameter can be one of the following values:
+  *            @arg IRDA_FLAG_TXE:  Transmit data register empty flag
+  *            @arg IRDA_FLAG_TC:   Transmission Complete flag
+  *            @arg IRDA_FLAG_RXNE: Receive data register not empty flag
+  *            @arg IRDA_FLAG_IDLE: Idle Line detection flag
+  *            @arg IRDA_FLAG_ORE:  OverRun Error flag
+  *            @arg IRDA_FLAG_NE:   Noise Error flag
+  *            @arg IRDA_FLAG_FE:   Framing Error flag
+  *            @arg IRDA_FLAG_PE:   Parity Error flag
+  * @retval The new state of __FLAG__ (TRUE or FALSE).
+  */
+#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
+
+/** @brief  Clear the specified IRDA pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @param  __FLAG__ specifies the flag to check.
+  *          This parameter can be any combination of the following values:
+  *            @arg IRDA_FLAG_TC:   Transmission Complete flag.
+  *            @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
+  *
+  * @note   PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
+  *          error) and IDLE (Idle line detected) flags are cleared by software
+  *          sequence: a read operation to USART_SR register followed by a read
+  *          operation to USART_DR register.
+  * @note   RXNE flag can be also cleared by a read to the USART_DR register.
+  * @note   TC flag can be also cleared by software sequence: a read operation to
+  *          USART_SR register followed by a write operation to USART_DR register.
+  * @note   TXE flag is cleared only by a write to the USART_DR register.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
+
+/** @brief  Clear the IRDA PE pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)     \
+  do{                                           \
+    __IO uint32_t tmpreg = 0x00U;               \
+    tmpreg = (__HANDLE__)->Instance->SR;        \
+    tmpreg = (__HANDLE__)->Instance->DR;        \
+    UNUSED(tmpreg);                             \
+  } while(0U)
+
+/** @brief  Clear the IRDA FE pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the IRDA NE pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the IRDA ORE pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the IRDA IDLE pending flag.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Enable the specified IRDA interrupt.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @param  __INTERRUPT__ specifies the IRDA interrupt source to enable.
+  *          This parameter can be one of the following values:
+  *            @arg IRDA_IT_TXE:  Transmit Data Register empty interrupt
+  *            @arg IRDA_IT_TC:   Transmission complete interrupt
+  *            @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg IRDA_IT_IDLE: Idle line detection interrupt
+  *            @arg IRDA_IT_PE:   Parity Error interrupt
+  *            @arg IRDA_IT_ERR:  Error interrupt(Frame error, noise error, overrun error)
+  * @retval None
+  */
+#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((((__INTERRUPT__) >> 28U) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
+                                                           (((__INTERRUPT__) >> 28U) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |=  ((__INTERRUPT__) & IRDA_IT_MASK)): \
+                                                            ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
+/** @brief  Disable the specified IRDA interrupt.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @param  __INTERRUPT__ specifies the IRDA interrupt source to disable.
+  *          This parameter can be one of the following values:
+  *            @arg IRDA_IT_TXE:  Transmit Data Register empty interrupt
+  *            @arg IRDA_IT_TC:   Transmission complete interrupt
+  *            @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg IRDA_IT_IDLE: Idle line detection interrupt
+  *            @arg IRDA_IT_PE:   Parity Error interrupt
+  *            @arg IRDA_IT_ERR:  Error interrupt(Frame error, noise error, overrun error)
+  * @retval None
+  */
+#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((((__INTERRUPT__) >> 28U) == IRDA_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
+                                                           (((__INTERRUPT__) >> 28U) == IRDA_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
+                                                           ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
+
+/** @brief  Check whether the specified IRDA interrupt has occurred or not.
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @param  __IT__ specifies the IRDA interrupt source to check.
+  *          This parameter can be one of the following values:
+  *            @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
+  *            @arg IRDA_IT_TC:  Transmission complete interrupt
+  *            @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg IRDA_IT_IDLE: Idle line detection interrupt
+  *            @arg IRDA_IT_ERR: Error interrupt
+  *            @arg IRDA_IT_PE: Parity Error interrupt
+  * @retval The new state of __IT__ (TRUE or FALSE).
+  */
+#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == IRDA_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == IRDA_CR2_REG_INDEX)? \
+                                                      (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
+
+/** @brief  Macro to enable the IRDA's one bit sample method
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 |= USART_CR3_ONEBIT)
+
+/** @brief  Macro to disable the IRDA's one bit sample method
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
+
+/** @brief  Enable UART/USART associated to IRDA Handle
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_ENABLE(__HANDLE__)                   (SET_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
+
+/** @brief  Disable UART/USART associated to IRDA Handle
+  * @param  __HANDLE__ specifies the IRDA Handle.
+  *         IRDA Handle selects the USARTx or UARTy peripheral
+  *         (USART,UART availability and x,y values depending on device).
+  * @retval None
+  */
+#define __HAL_IRDA_DISABLE(__HANDLE__)                  (CLEAR_BIT((__HANDLE__)->Instance->CR1, USART_CR1_UE))
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup IRDA_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup IRDA_Exported_Functions_Group1
+  * @{
+  */
+/* Initialization/de-initialization functions  **********************************/
+HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
+
+#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
+/* Callbacks Register/UnRegister functions  ***********************************/
+HAL_StatusTypeDef HAL_IRDA_RegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRDA_CallbackIDTypeDef CallbackID, pIRDA_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRDA_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/** @addtogroup IRDA_Exported_Functions_Group2
+  * @{
+  */
+/* IO operation functions *******************************************************/
+HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
+/* Transfer Abort functions */
+HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda);
+
+void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortTransmitCpltCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortReceiveCpltCallback(IRDA_HandleTypeDef *hirda);
+/**
+  * @}
+  */
+
+/** @addtogroup IRDA_Exported_Functions_Group3
+  * @{
+  */
+/* Peripheral State functions  **************************************************/
+HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
+uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup IRDA_Private_Constants IRDA Private Constants
+  * @{
+  */
+
+/** @brief IRDA interruptions flag mask
+  *
+  */
+#define IRDA_IT_MASK  ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
+                                  USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
+
+#define IRDA_CR1_REG_INDEX         1U
+#define IRDA_CR2_REG_INDEX         2U
+#define IRDA_CR3_REG_INDEX         3U
+/**
+  * @}
+  */
+
+/* Private macros --------------------------------------------------------*/
+/** @defgroup IRDA_Private_Macros   IRDA Private Macros
+  * @{
+  */
+#define IS_IRDA_WORD_LENGTH(LENGTH)   (((LENGTH) == IRDA_WORDLENGTH_8B) || \
+                                       ((LENGTH) == IRDA_WORDLENGTH_9B))
+
+#define IS_IRDA_PARITY(PARITY)        (((PARITY) == IRDA_PARITY_NONE) || \
+                                       ((PARITY) == IRDA_PARITY_EVEN) || \
+                                       ((PARITY) == IRDA_PARITY_ODD))
+
+#define IS_IRDA_MODE(MODE)            ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00000000U))
+
+#define IS_IRDA_POWERMODE(MODE)       (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
+                                       ((MODE) == IRDA_POWERMODE_NORMAL))
+
+#define IS_IRDA_BAUDRATE(BAUDRATE)    ((BAUDRATE) < 115201U)
+
+#define IRDA_DIV(_PCLK_, _BAUD_)      (((_PCLK_)*25U)/(4U*(_BAUD_)))
+
+#define IRDA_DIVMANT(_PCLK_, _BAUD_)  (IRDA_DIV((_PCLK_), (_BAUD_))/100U)
+
+#define IRDA_DIVFRAQ(_PCLK_, _BAUD_)  ((((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U)
+
+/* UART BRR = mantissa + overflow + fraction
+            = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
+#define IRDA_BRR(_PCLK_, _BAUD_)      (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4U) + \
+                                        (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0U)) + \
+                                        (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
+
+/**
+  * @}
+  */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup IRDA_Private_Functions IRDA Private Functions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_HAL_IRDA_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_iwdg.c

@@ -16,8 +16,8 @@
     (+) The IWDG can be started by either software or hardware (configurable
         through option byte).
 
-    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
+    (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
-        if the main clock fails.
+        active even if the main clock fails.
 
     (+) Once the IWDG is started, the LSI is forced ON and both cannot be
         disabled. The counter starts counting down from the reset value (0xFFF).
@@ -25,37 +25,47 @@
         generated (IWDG reset).
 
     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
-        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
+        the IWDG_RLR value is reloaded into the counter and the watchdog reset
-        prevented.
+        is prevented.
 
     (+) The IWDG is implemented in the VDD voltage domain that is still functional
-        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+        in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
         reset occurs.
 
     (+) Debug mode: When the microcontroller enters debug mode (core halted),
         the IWDG counter either continues to work normally or stops, depending
         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
-        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
+        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
 
-    (+) Min-max timeout value @37KHz (LSI): ~108us / ~28.3s
+    [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
-         The IWDG timeout may vary due to LSI frequency dispersion. STM32L1xx
+         The IWDG timeout may vary due to LSI clock frequency dispersion.
-         devices provide the capability to measure the LSI frequency (LSI clock
+         STM32L1xx devices provide the capability to measure the LSI clock
-         connected internally to TIM10 CH1 input capture). The measured value
+         frequency (LSI clock is internally connected to TIM16 CH1 input capture).
-         can be used to have an IWDG timeout with an acceptable accuracy. 
+         The measured value can be used to have an IWDG timeout with an
-         For more information, please refer to the STM32L1xx Reference manual.
+         acceptable accuracy.
+
+    [..] Default timeout value (necessary for IWDG_SR status register update):
+         Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
+         This frequency being subject to variations as mentioned above, the 
+         default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
+         below) may become too short or too long.
+         In such cases, this default timeout value can be tuned by redefining
+         the constant LSI_VALUE at user-application level (based, for instance,
+         on the measured LSI clock frequency as explained above).
 
                      ##### How to use this driver #####
   ==============================================================================
   [..]
     (#) Use IWDG using HAL_IWDG_Init() function to :
       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
-           clock is forced ON and IWDG counter starts downcounting.
+           clock is forced ON and IWDG counter starts counting down.
-      (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR.
+      (++) Enable write access to configuration registers:
+          IWDG_PR, IWDG_RLR and IWDG_WINR.
       (++) Configure the IWDG prescaler and counter reload value. This reload
            value will be loaded in the IWDG counter each time the watchdog is
            reloaded, then the IWDG will start counting down from this value.
-      (++) wait for status flags to be reset"
+      (++) Wait for status flags to be reset.
 
     (#) Then the application program must refresh the IWDG counter at regular
         intervals during normal operation to prevent an MCU reset, using
@@ -73,29 +83,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -118,8 +112,14 @@
 /** @defgroup IWDG_Private_Defines IWDG Private Defines
   * @{
   */
-/* MBED */
+/* Status register needs up to 5 LSI clock periods divided by the clock
-#define HAL_IWDG_DEFAULT_TIMEOUT            96u
+   prescaler to be updated. The number of LSI clock periods is upper-rounded to
+   6 for the timeout value calculation.
+   The timeout value is also calculated using the highest prescaler (256) and
+   the LSI_VALUE constant. The value of this constant can be changed by the user
+   to take into account possible LSI clock period variations.
+   The timeout value is multiplied by 1000 to be converted in milliseconds. */
+#define HAL_IWDG_DEFAULT_TIMEOUT ((6UL * 256UL * 1000UL) / LSI_VALUE)
 /**
   * @}
   */
@@ -173,10 +173,10 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
 
-  /* Enable IWDG. LSI is turned on automaticaly */
+  /* Enable IWDG. LSI is turned on automatically */
   __HAL_IWDG_START(hiwdg);
 
-  /* Enable write access to IWDG_PR, IWDG_RLR registers by writing
+  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
   0x5555 in KR */
   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
 
@@ -188,7 +188,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
   tickstart = HAL_GetTick();
 
   /* Wait for register to be updated */
-  while(hiwdg->Instance->SR != RESET)
+  while (hiwdg->Instance->SR != 0x00u)
   {
     if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
     {
@@ -256,4 +256,3 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
   */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_iwdg.h

@@ -6,36 +6,20 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_IWDG_H
+#ifndef STM32L1xx_HAL_IWDG_H
-#define __STM32L1xx_HAL_IWDG_H
+#define STM32L1xx_HAL_IWDG_H
 
 #ifdef __cplusplus
 extern "C" {
@@ -78,9 +62,9 @@ typedef struct
   IWDG_TypeDef                 *Instance;  /*!< Register base address    */
 
   IWDG_InitTypeDef             Init;       /*!< IWDG required parameters */
-
 } IWDG_HandleTypeDef;
 
+
 /**
   * @}
   */
@@ -100,10 +84,13 @@ typedef struct
 #define IWDG_PRESCALER_64               IWDG_PR_PR_2                                    /*!< IWDG prescaler set to 64  */
 #define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 128 */
 #define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)                   /*!< IWDG prescaler set to 256 */
+
 /**
   * @}
   */
 
+
+
 /**
   * @}
   */
@@ -122,7 +109,7 @@ typedef struct
 
 /**
   * @brief  Reload IWDG counter with value defined in the reload register
-  *         (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
+  *         (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
   * @param  __HANDLE__  IWDG handle
   * @retval None
   */
@@ -215,6 +202,8 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
   */
 #define IS_IWDG_RELOAD(__RELOAD__)            ((__RELOAD__) <= IWDG_RLR_RL)
 
+
+
 /**
   * @}
   */
@@ -232,6 +221,6 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
 }
 #endif
 
-#endif /* __STM32L1xx_HAL_IWDG_H */
+#endif /* STM32L1xx_HAL_IWDG_H */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_lcd.c

@@ -61,29 +61,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -142,7 +126,7 @@
  
 /**
   * @brief  DeInitializes the LCD peripheral. 
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd)
@@ -187,7 +171,7 @@ HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd)
   *         in the LCD_InitStruct.
   * @note   This function can be used only when the LCD is disabled.  
   *         The LCD HighDrive can be enabled/disabled using related macros up to user.
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
   * @retval None
   */
 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
@@ -306,7 +290,7 @@ HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
 
 /**
   * @brief  LCD MSP DeInit.
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
   * @retval None
   */
  __weak void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd)
@@ -321,7 +305,7 @@ HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
 
 /**
   * @brief  LCD MSP Init.
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
   * @retval None
   */
  __weak void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd)
@@ -369,8 +353,8 @@ HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
 
 /**
   * @brief  Writes a word in the specific LCD RAM.
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
-  * @param  RAMRegisterIndex: specifies the LCD RAM Register.
+  * @param  RAMRegisterIndex specifies the LCD RAM Register.
   *   This parameter can be one of the following values:
   *     @arg LCD_RAM_REGISTER0: LCD RAM Register 0
   *     @arg LCD_RAM_REGISTER1: LCD RAM Register 1
@@ -388,8 +372,8 @@ HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd)
   *     @arg LCD_RAM_REGISTER13: LCD RAM Register 13 
   *     @arg LCD_RAM_REGISTER14: LCD RAM Register 14 
   *     @arg LCD_RAM_REGISTER15: LCD RAM Register 15
-  * @param  RAMRegisterMask: specifies the LCD RAM Register Data Mask.
+  * @param  RAMRegisterMask specifies the LCD RAM Register Data Mask.
-  * @param  Data: specifies LCD Data Value to be written.
+  * @param  Data specifies LCD Data Value to be written.
   * @retval None
   */
 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data)
@@ -488,7 +472,7 @@ HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd)
 
 /**
   * @brief  Enables the Update Display Request.
-  * @param  hlcd: LCD handle
+  * @param  hlcd LCD handle
   * @note   Each time software modifies the LCD_RAM it must set the UDR bit to 
   *         transfer the updated data to the second level buffer. 
   *         The UDR bit stays set until the end of the update and during this 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_lcd.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -505,13 +489,13 @@ typedef struct
   */
 
 /** @brief Reset LCD handle state
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
   * @retval None
   */
 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__)  ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
 
 /** @brief  macros to enables or disables the LCD
-  * @param  __HANDLE__: specifies the LCD Handle.  
+  * @param  __HANDLE__ specifies the LCD Handle.  
   * @retval None
   */     
 #define __HAL_LCD_ENABLE(__HANDLE__)              (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
@@ -521,7 +505,7 @@ typedef struct
   *         internal resistance may need a longer drive time to achieve 
   *         satisfactory contrast. This function is useful in this case if some 
   *         additional power consumption can be tolerated.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
   * @note   When this mode is enabled, the PulseOn Duration (PON) have to be 
   *         programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
   * @retval None
@@ -540,8 +524,8 @@ typedef struct
 
 /**
   * @brief  Macro to configure the LCD pulses on duration.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __DURATION__: specifies the LCD pulse on duration in terms of 
+  * @param  __DURATION__ specifies the LCD pulse on duration in terms of 
   *         CK_PS (prescaled LCD clock period) pulses.
   *   This parameter can be one of the following values:
   *     @arg LCD_PULSEONDURATION_0: 0 pulse
@@ -562,8 +546,8 @@ typedef struct
 
 /**
   * @brief  Macro to configure the LCD dead time.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __DEADTIME__: specifies the LCD dead time.
+  * @param  __DEADTIME__ specifies the LCD dead time.
   *   This parameter can be one of the following values:
   *     @arg LCD_DEADTIME_0: No dead Time
   *     @arg LCD_DEADTIME_1: One Phase between different couple of Frame
@@ -583,8 +567,8 @@ typedef struct
 
 /**
   * @brief  Macro to configure the LCD Contrast.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __CONTRAST__: specifies the LCD Contrast.
+  * @param  __CONTRAST__ specifies the LCD Contrast.
   *   This parameter can be one of the following values:
   *     @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
   *     @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
@@ -604,8 +588,8 @@ typedef struct
 
 /**
   * @brief  Macro to configure the LCD Blink mode and Blink frequency.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __BLINKMODE__: specifies the LCD blink mode.
+  * @param  __BLINKMODE__ specifies the LCD blink mode.
   *   This parameter can be one of the following values:
   *     @arg LCD_BLINKMODE_OFF:           Blink disabled
   *     @arg LCD_BLINKMODE_SEG0_COM0:     Blink enabled on SEG[0], COM[0] (1 pixel)
@@ -613,7 +597,7 @@ typedef struct
   *                                       pixels according to the programmed duty)
   *     @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM 
   *                                       (all pixels)
-  * @param  __BLINKFREQUENCY__: specifies the LCD blink frequency.
+  * @param  __BLINKFREQUENCY__ specifies the LCD blink frequency.
   *     @arg LCD_BLINKFREQUENCY_DIV8:    The Blink frequency = fLcd/8
   *     @arg LCD_BLINKFREQUENCY_DIV16:   The Blink frequency = fLcd/16
   *     @arg LCD_BLINKFREQUENCY_DIV32:   The Blink frequency = fLcd/32
@@ -631,8 +615,8 @@ typedef struct
           }while(0)
 
 /** @brief  Enables or disables the specified LCD interrupt.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
+  * @param  __INTERRUPT__ specifies the LCD interrupt source to be enabled or disabled.
   *          This parameter can be one of the following values:
   *     @arg LCD_IT_SOF: Start of Frame Interrupt
   *     @arg LCD_IT_UDD: Update Display Done Interrupt
@@ -650,8 +634,8 @@ typedef struct
                             }while(0)
 
 /** @brief  Checks whether the specified LCD interrupt is enabled or not.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __IT__: specifies the LCD interrupt source to check.
+  * @param  __IT__ specifies the LCD interrupt source to check.
   *        This parameter can be one of the following values:
   *        @arg LCD_IT_SOF: Start of Frame Interrupt
   *        @arg LCD_IT_UDD: Update Display Done Interrupt.
@@ -663,8 +647,8 @@ typedef struct
 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
 
 /** @brief  Checks whether the specified LCD flag is set or not.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __FLAG__: specifies the flag to check.
+  * @param  __FLAG__ specifies the flag to check.
   *        This parameter can be one of the following values:
   *        @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
   * @note  The ENS bit is set immediately when the LCDEN bit in the LCD_CR 
@@ -685,8 +669,8 @@ typedef struct
 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__)    (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))   
 
 /** @brief  Clears the specified LCD pending flag.
-  * @param  __HANDLE__: specifies the LCD Handle.
+  * @param  __HANDLE__ specifies the LCD Handle.
-  * @param  __FLAG__: specifies the flag to clear.
+  * @param  __FLAG__ specifies the flag to clear.
   *        This parameter can be any combination of the following values:
   *        @arg LCD_FLAG_SOF: Start of Frame Interrupt
   *        @arg LCD_FLAG_UDD: Update Display Done Interrupt

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_nor.c

@@ -53,29 +53,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 
@@ -178,10 +162,10 @@ static uint32_t uwNORMemoryDataWidth  = NOR_MEMORY_8B;
     
 /**
   * @brief  Perform the NOR memory Initialization sequence
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  Timing: pointer to NOR control timing structure 
+  * @param  Timing pointer to NOR control timing structure 
-  * @param  ExtTiming: pointer to NOR extended mode timing structure    
+  * @param  ExtTiming pointer to NOR extended mode timing structure    
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming)
@@ -231,7 +215,7 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeD
 
 /**
   * @brief  Perform NOR memory De-Initialization sequence
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval HAL status
   */
@@ -254,7 +238,7 @@ HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  NOR MSP Init
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval None
   */
@@ -270,7 +254,7 @@ __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  NOR MSP DeInit
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval None
   */
@@ -286,9 +270,9 @@ __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  NOR MSP Wait fro Ready/Busy signal
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  Timeout: Maximum timeout value
+  * @param  Timeout Maximum timeout value
   * @retval None
   */
 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
@@ -322,9 +306,9 @@ __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
   
 /**
   * @brief  Read NOR flash IDs
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  pNOR_ID : pointer to NOR ID structure
+  * @param  pNOR_ID  pointer to NOR ID structure
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
@@ -383,7 +367,7 @@ HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_I
 
 /**
   * @brief  Returns the NOR memory to Read mode.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval HAL status
   */
@@ -431,10 +415,10 @@ HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  Read data from NOR memory 
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  pAddress: pointer to Device address
+  * @param  pAddress pointer to Device address
-  * @param  pData : pointer to read data  
+  * @param  pData  pointer to read data  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
@@ -490,10 +474,10 @@ HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint
 
 /**
   * @brief  Program data to NOR memory 
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  pAddress: Device address
+  * @param  pAddress Device address
-  * @param  pData : pointer to the data to write   
+  * @param  pData  pointer to the data to write   
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
@@ -549,12 +533,12 @@ HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, u
 
 /**
   * @brief  Reads a block of data from the FSMC NOR memory.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  uwAddress: NOR memory internal address to read from.
+  * @param  uwAddress NOR memory internal address to read from.
-  * @param  pData: pointer to the buffer that receives the data read from the 
+  * @param  pData pointer to the buffer that receives the data read from the 
   *         NOR memory.
-  * @param  uwBufferSize : number of Half word to read.
+  * @param  uwBufferSize  number of Half word to read.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
@@ -616,13 +600,13 @@ HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress
 /**
   * @brief  Writes a half-word buffer to the FSMC NOR memory. This function 
   *         must be used only with S29GL128P NOR memory. 
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  uwAddress: NOR memory internal address from which the data 
+  * @param  uwAddress NOR memory internal address from which the data 
   * @note   Some NOR memory need Address aligned to xx bytes (can be aligned to 
   *          64 bytes boundary for example).
-  * @param  pData: pointer to source data buffer. 
+  * @param  pData pointer to source data buffer. 
-  * @param  uwBufferSize: number of Half words to write. 
+  * @param  uwBufferSize number of Half words to write. 
   * @note   The maximum buffer size allowed is NOR memory dependent
   *         (can be 64 Bytes max for example).
   * @retval HAL status
@@ -701,10 +685,10 @@ HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddr
 
 /**
   * @brief  Erase the specified block of the NOR memory 
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  BlockAddress : Block to erase address 
+  * @param  BlockAddress  Block to erase address 
-  * @param  Address: Device address
+  * @param  Address Device address
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
@@ -761,9 +745,9 @@ HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAdd
 
 /**
   * @brief  Erase the entire NOR chip.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  Address : Device address  
+  * @param  Address  Device address  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
@@ -819,9 +803,9 @@ HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
 
 /**
   * @brief  Read NOR flash CFI IDs
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
-  * @param  pNOR_CFI : pointer to NOR CFI IDs structure  
+  * @param  pNOR_CFI  pointer to NOR CFI IDs structure  
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
@@ -897,7 +881,7 @@ HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR
     
 /**
   * @brief  Enables dynamically NOR write operation.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval HAL status
   */
@@ -920,7 +904,7 @@ HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  Disables dynamically NOR write operation.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval HAL status
   */
@@ -965,7 +949,7 @@ HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
   
 /**
   * @brief  return the NOR controller state
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @retval NOR controller state
   */
@@ -976,10 +960,10 @@ HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
 
 /**
   * @brief  Returns the NOR operation status.
-  * @param  hnor: pointer to a NOR_HandleTypeDef structure that contains
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.   
-  * @param  Address: Device address
+  * @param  Address Device address
-  * @param  Timeout: NOR progamming Timeout
+  * @param  Timeout NOR progamming Timeout
   * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
   *         or HAL_NOR_STATUS_TIMEOUT
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_nor.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */ 
@@ -92,9 +76,9 @@
 
 /**
   * @brief  NOR memory address shifting.
-  * @param  __NOR_ADDRESS: NOR base address 
+  * @param  __NOR_ADDRESS NOR base address 
-  * @param  __NOR_MEMORY_WIDTH_: NOR memory width
+  * @param  __NOR_MEMORY_WIDTH_ NOR memory width
-  * @param  __ADDRESS__: NOR memory address 
+  * @param  __ADDRESS__ NOR memory address 
   * @retval NOR shifted address value
   */
 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__)       \
@@ -104,8 +88,8 @@
 
 /**
   * @brief  NOR memory write data to specified address.
-  * @param  __ADDRESS__: NOR memory address 
+  * @param  __ADDRESS__ NOR memory address 
-  * @param  __DATA__: Data to write
+  * @param  __DATA__ Data to write
   * @retval None
   */
 #define NOR_WRITE(__ADDRESS__, __DATA__)  (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
@@ -206,7 +190,7 @@ typedef struct
   */
 
 /** @brief Reset NOR handle state
-  * @param  __HANDLE__: NOR handle
+  * @param  __HANDLE__ NOR handle
   * @retval None
   */
 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp.c

@@ -4,8 +4,7 @@
   * @author  MCD Application Team
   * @brief   OPAMP HAL module driver.
   *          This file provides firmware functions to manage the following 
-  *          functionalities of the operational amplifier(s)(OPAMP1, OPAMP2 etc) 
+  *          functionalities of the operational amplifier(s) peripheral:
-  *          peripheral: 
   *           + OPAMP configuration
   *           + OPAMP calibration
   *          Thanks to
@@ -21,7 +20,7 @@
   [..] The device integrates up to 3 operational amplifiers OPAMP1, OPAMP2,
        OPAMP3 (OPAMP3 availability depends on device category)
        
-       (#) The OPAMP(s) provides several exclusive running modes.
+       (#) The OPAMP(s) provide(s) several exclusive running modes.
        (++) Standalone mode
        (++) Follower mode
 
@@ -62,70 +61,82 @@
 ================================================================================
   [..] 
 
-    *** power supply range ***
+    *** Power supply range ***
     ============================================
-   [..] 
+    [..] To run in low power mode:
-      To run in low power mode:
 
-      (#) Configure the opamp using HAL_OPAMP_Init() function:
+      (#) Configure the OPAMP using HAL_OPAMP_Init() function:
       (++) Select OPAMP_POWERSUPPLY_LOW (VDDA lower than 2.4V)
       (++) Otherwise select OPAMP_POWERSUPPLY_HIGH (VDDA higher than 2.4V)
 
-    *** low / normal power mode ***
+    *** Low / normal power mode ***
     ============================================
-   [..] 
+    [..] To run in low power mode:
-      To run in low power mode:
 
-      (#) Configure the opamp using HAL_OPAMP_Init() function:
+      (#) Configure the OPAMP using HAL_OPAMP_Init() function:
       (++) Select OPAMP_POWERMODE_LOWPOWER
       (++) Otherwise select OPAMP_POWERMODE_NORMAL
 
     *** Calibration ***
     ============================================
-   [..] 
+    [..] To run the OPAMP calibration self calibration:
-      To run the opamp calibration self calibration:
 
       (#) Start calibration using HAL_OPAMP_SelfCalibrate. 
            Store the calibration results.
 
     *** Running mode ***
     ============================================
-   [..] 
       
-      To use the opamp, perform the following steps:
+    [..] To use the OPAMP, perform the following steps:
             
       (#) Fill in the HAL_OPAMP_MspInit() to
-      (++) Enable the OPAMP Peripheral clock using macro "__HAL_RCC_OPAMP_CLK_ENABLE()"
+      (++) Enable the OPAMP Peripheral clock using macro __HAL_RCC_OPAMP_CLK_ENABLE()
-      (++) Configure the opamp input AND output in analog mode using 
+      (++) Configure the OPAMP input AND output in analog mode using
-           HAL_GPIO_Init() to map the opamp output to the GPIO pin.
+           HAL_GPIO_Init() to map the OPAMP output to the GPIO pin.
 
-      (#) Configure the opamp using HAL_OPAMP_Init() function:
+      (#) Registrate Callbacks
+      (++) The compilation define  USE_HAL_OPAMP_REGISTER_CALLBACKS when set to 1
+           allows the user to configure dynamically the driver callbacks.
+
+      (++) Use Functions @ref HAL_OPAMP_RegisterCallback() to register a user callback,
+           it allows to register following callbacks:
+      (+++) MspInitCallback         : OPAMP MspInit.
+      (+++) MspDeInitCallback       : OPAMP MspFeInit.
+           This function takes as parameters the HAL peripheral handle, the Callback ID
+           and a pointer to the user callback function.
+
+      (++) Use function @ref HAL_OPAMP_UnRegisterCallback() to reset a callback to the default
+           weak (surcharged) function. It allows to reset following callbacks:
+      (+++) MspInitCallback         : OPAMP MspInit.
+      (+++) MspDeInitCallback       : OPAMP MspdeInit.
+      (+++) All Callbacks
+  
+      (#) Configure the OPAMP using HAL_OPAMP_Init() function:
       (++) Select the mode
       (++) Select the inverting input
       (++) Select the non-inverting input 
       (++) Select either factory or user defined trimming mode.
-      (++) If the user defined trimming mode is enabled, select PMOS & NMOS trimming values
+      (++) If the user-defined trimming mode is enabled, select PMOS & NMOS trimming values
-          (typ. settings returned by HAL_OPAMP_SelfCalibrate function).
+          (typically values set by HAL_OPAMP_SelfCalibrate function).
       
-      (#) Enable the opamp using HAL_OPAMP_Start() function.
+      (#) Enable the OPAMP using HAL_OPAMP_Start() function.
            
-      (#) Disable the opamp using HAL_OPAMP_Stop() function.
+      (#) Disable the OPAMP using HAL_OPAMP_Stop() function.
       
-      (#) Lock the opamp in running mode using HAL_OPAMP_Lock() function.
+      (#) Lock the OPAMP in running mode using HAL_OPAMP_Lock() function.
           Caution: On STM32L1, HAL OPAMP lock is software lock only (not 
           hardware lock as on some other STM32 devices)
 
-      (#) If needed, unlock the opamp using HAL_OPAMPEx_Unlock() function.
+      (#) If needed, unlock the OPAMP using HAL_OPAMPEx_Unlock() function.
 
     *** Running mode: change of configuration while OPAMP ON  ***
     ============================================
-   [..] 
+    [..] To Re-configure OPAMP when OPAMP is ON (change on the fly)
-    To Re-configure OPAMP when OPAMP is ON (change on the fly)
+      (#) If needed, fill in the HAL_OPAMP_MspInit()
-      (#) If needed, Fill in the HAL_OPAMP_MspInit()
       (++) This is the case for instance if you wish to use new OPAMP I/O
 
-      (#) Configure the opamp using HAL_OPAMP_Init() function:
+      (#) Configure the OPAMP using HAL_OPAMP_Init() function:
-      (++) As in configure case, selects first the parameters you wish to modify.
+      (++) As in configure case, select first the parameters you wish to modify.
       
       (#) Change from low power mode to normal power mode (& vice versa) requires  
           first HAL_OPAMP_DeInit() (force OPAMP OFF) and then HAL_OPAMP_Init(). 
@@ -136,29 +147,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
@@ -244,20 +239,27 @@
   *         parameters in the OPAMP_InitTypeDef and create the associated handle.
   * @note   If the selected opamp is locked, initialization can't be performed.
   *         To unlock the configuration, perform a system reset.
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef* hopamp)
 { 
   HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tmp_csr = 0;       /* Temporary variable to update register CSR, except bits ANAWSSELx, S7SEL2, OPA_RANGE, OPAxCALOUT */
+  uint32_t tmp_csr;       /* Temporary variable to update register CSR, except bits ANAWSSELx, S7SEL2, OPA_RANGE, OPAxCALOUT */
   
   /* Check the OPAMP handle allocation and lock status */
   /* Init not allowed if calibration is ongoing */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
+  if(hopamp == NULL)
-                      || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY) )
   {
-    status = HAL_ERROR;
+    return HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
+  {
+    return HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)
+  {
+    return HAL_ERROR;
   }
   else
   {
@@ -271,6 +273,17 @@ HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef* hopamp)
     assert_param(IS_OPAMP_NONINVERTING_INPUT_CHECK_INSTANCE(hopamp, hopamp->Init.NonInvertingInput));
     assert_param(IS_OPAMP_TRIMMING(hopamp->Init.UserTrimming));
 
+    if(hopamp->State == HAL_OPAMP_STATE_RESET)
+    {  
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+    if(hopamp->MspInitCallback == NULL)
+    {
+      hopamp->MspInitCallback               = HAL_OPAMP_MspInit;
+    } 
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
+    }
+
+
     if (hopamp->Init.Mode != OPAMP_FOLLOWER_MODE)
     {
       assert_param(IS_OPAMP_INVERTING_INPUT(hopamp->Init.InvertingInput));
@@ -296,8 +309,12 @@ HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef* hopamp)
       hopamp->Lock = HAL_UNLOCKED;
     }
 
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+    hopamp->MspInitCallback(hopamp);    
+#else
     /* Call MSP init function */
     HAL_OPAMP_MspInit(hopamp);
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 
     /* Set OPAMP parameters                                                   */
     /* - Set internal switches in function of:                                */
@@ -489,7 +506,7 @@ HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef* hopamp)
   * @brief  DeInitializes the OPAMP peripheral 
   * @note   Deinitialization can be performed if the OPAMP configuration is locked.
   *         (the OPAMP lock is SW in STM32L1)
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef* hopamp)
@@ -498,7 +515,11 @@ HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef* hopamp)
   
   /* Check the OPAMP handle allocation */
   /* DeInit not allowed if calibration is ongoing */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))
+  if(hopamp == NULL)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)
   {
     status = HAL_ERROR;
   }
@@ -525,8 +546,17 @@ HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef* hopamp)
     /*       Unchanged: bit OPAMP_OTR_OT_USER (parameter "UserTrimming")      */
     /*                  bit OPAMP_CSR_AOP_RANGE (parameter "PowerSupplyRange")*/
 
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+  if(hopamp->MspDeInitCallback == NULL)
+  {
+    hopamp->MspDeInitCallback = HAL_OPAMP_MspDeInit;
+  }
+  /* DeInit the low level hardware */
+  hopamp->MspDeInitCallback(hopamp);
+#else
     /* DeInit the low level hardware: GPIO, CLOCK and NVIC */
     HAL_OPAMP_MspDeInit(hopamp);
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 
     /* Update the OPAMP state*/
     hopamp->State = HAL_OPAMP_STATE_RESET;
@@ -538,10 +568,9 @@ HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef* hopamp)
   return status;
 }
 
-
 /**
-  * @brief  Initializes the OPAMP MSP.
+  * @brief  Initialize the OPAMP MSP.
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval None
   */
 __weak void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
@@ -549,14 +578,14 @@ __weak void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hopamp);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the function "HAL_OPAMP_MspInit()" must be implemented in the user file.
   */
 }
 
 /**
-  * @brief  DeInitializes OPAMP MSP.
+  * @brief  DeInitialize OPAMP MSP.
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval None
   */
 __weak void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
@@ -564,7 +593,7 @@ __weak void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
   /* Prevent unused argument(s) compilation warning */
   UNUSED(hopamp);
 
-  /* NOTE : This function Should not be modified, when the callback is needed,
+  /* NOTE : This function should not be modified, when the callback is needed,
             the function "HAL_OPAMP_MspDeInit()" must be implemented in the user file.
   */
 }
@@ -590,8 +619,8 @@ __weak void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
   */
 
 /**
-  * @brief  Start the opamp
+  * @brief  Start the OPAMP.
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL status
   */
 
@@ -601,7 +630,11 @@ HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef* hopamp)
   
   /* Check the OPAMP handle allocation */
   /* Check if OPAMP locked */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
+  if(hopamp == NULL)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
   {
     status = HAL_ERROR;
   }
@@ -629,8 +662,8 @@ HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef* hopamp)
 }
 
 /**
-  * @brief  Stop the opamp 
+  * @brief  Stop the OPAMP.
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef* hopamp)
@@ -640,8 +673,15 @@ HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef* hopamp)
   /* Check the OPAMP handle allocation */
   /* Check if OPAMP locked */
   /* Check if OPAMP calibration ongoing */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \
+  if(hopamp == NULL)
-                      || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY))  
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)
   {
     status = HAL_ERROR;
   }
@@ -668,7 +708,7 @@ HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef* hopamp)
 }
 
 /**
-  * @brief  Run the self calibration of one OPAMP
+  * @brief  Run the self calibration of one OPAMP.
   * @note   Trimming values (PMOS & NMOS) are updated and user trimming is 
   *         enabled if calibration is succesful.
   * @note   Calibration is performed in the mode specified in OPAMP init
@@ -684,26 +724,30 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
 { 
   HAL_StatusTypeDef status = HAL_OK;
   
-  uint32_t* opamp_trimmingvalue = 0;
+  uint32_t* opamp_trimmingvalue;
   uint32_t opamp_trimmingvaluen = 0;
   uint32_t opamp_trimmingvaluep = 0;
   
-  uint32_t trimming_diff_pair = 0;           /* Selection of differential transistors pair high or low */
+  uint32_t trimming_diff_pair;               /* Selection of differential transistors pair high or low */
 
   __IO uint32_t* tmp_opamp_reg_trimming;     /* Selection of register of trimming depending on power mode: OTR or LPOTR */
-  uint32_t tmp_opamp_otr_otuser = 0;         /* Selection of bit OPAMP_OTR_OT_USER depending on trimming register pointed: OTR or LPOTR */
+  uint32_t tmp_opamp_otr_otuser;             /* Selection of bit OPAMP_OTR_OT_USER depending on trimming register pointed: OTR or LPOTR */
 
-  uint32_t tmp_Opaxcalout_DefaultSate = 0;   /* Bit OPAMP_CSR_OPAXCALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+  uint32_t tmp_Opaxcalout_DefaultSate;       /* Bit OPAMP_CSR_OPAXCALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
 
-  uint32_t tmp_OpaxSwitchesContextBackup = 0;
+  uint32_t tmp_OpaxSwitchesContextBackup;
   
-  uint8_t trimming_diff_pair_iteration_count = 0;       /* For calibration loop algorithm: to repeat the calibration loop for both differential transistors pair high and low */
+  uint8_t trimming_diff_pair_iteration_count;          /* For calibration loop algorithm: to repeat the calibration loop for both differential transistors pair high and low */
-  uint8_t delta = 0;                                    /* For calibration loop algorithm: Variable for dichotomy steps value */
+  uint8_t delta;                                       /* For calibration loop algorithm: Variable for dichotomy steps value */
-  uint8_t final_step_check = 0;                         /* For calibration loop algorithm: Flag for additional check of last trimming step */
+  uint8_t final_step_check = 0x0U;                        /* For calibration loop algorithm: Flag for additional check of last trimming step */
   
   /* Check the OPAMP handle allocation */
   /* Check if OPAMP locked */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
+  if(hopamp == NULL)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
   {
     status = HAL_ERROR;
   }
@@ -740,7 +784,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
       }
       else
       {
-        tmp_opamp_otr_otuser = 0x00000000;
+        tmp_opamp_otr_otuser = 0x00000000U;
         tmp_opamp_reg_trimming = &OPAMP->LPOTR;
       }
 
@@ -749,9 +793,9 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
       CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD(hopamp));
 
       /* Perform trimming for both differential transistors pair high and low */
-      for (trimming_diff_pair_iteration_count = 0; trimming_diff_pair_iteration_count <=1; trimming_diff_pair_iteration_count++)
+      for (trimming_diff_pair_iteration_count = 0U; trimming_diff_pair_iteration_count <=1U; trimming_diff_pair_iteration_count++)
       {
-        if (trimming_diff_pair_iteration_count == 0)
+        if (trimming_diff_pair_iteration_count == 0U)
         {
           /* Calibration of transistors differential pair high (NMOS) */
           trimming_diff_pair = OPAMP_FACTORYTRIMMING_N;
@@ -759,7 +803,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
           
           /* Set bit OPAMP_CSR_OPAXCALOUT default state when trimming value   */
           /* is 00000b. Used to detect the bit toggling during trimming.      */
-          tmp_Opaxcalout_DefaultSate = RESET;
+          tmp_Opaxcalout_DefaultSate = 0U;
 
           /* Enable calibration for N differential pair */
           MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_L(hopamp),
@@ -792,10 +836,10 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
         /*       trimming steps tested but is not effectively tested.         */
         /*       An additional test step (using variable "final_step_check")  */
         /*       allow to Test the final trimming step.                       */
-        *opamp_trimmingvalue = 15;
+        *opamp_trimmingvalue = 15U;
-        delta = 16;
+        delta = 16U;
 
-        while ((delta != 0) || (final_step_check == 1))
+        while ((delta != 0U) || (final_step_check == 1U))
         {
           /* Set candidate trimming */
           MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
@@ -838,7 +882,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
         /*    be optimized by incrementing it of one step.                    */
         if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp)) == tmp_Opaxcalout_DefaultSate)
         {
-          *opamp_trimmingvalue += 1;
+          *opamp_trimmingvalue += 1U;
           
           /* Set final fine trimming */
           MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
@@ -924,7 +968,7 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef* hopamp)
   * @brief  Lock the selected opamp configuration.
   *         Caution: On STM32L1, HAL OPAMP lock is software lock only
   *         (not hardware lock as available on some other STM32 devices)
-  * @param  hopamp: OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef* hopamp)
@@ -935,16 +979,11 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef* hopamp)
   /* Check if OPAMP locked */
   /* OPAMP can be locked when enabled and running in normal mode */ 
   /*   It is meaningless otherwise */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \
+  if(hopamp == NULL)
-                      || (hopamp->State == HAL_OPAMP_STATE_READY) \
-                      || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\
-                      || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
-  
   {
     status = HAL_ERROR;
   }
-  
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSY)
-  else
   {
     /* Check the parameter */
     assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance));
@@ -952,6 +991,10 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef* hopamp)
    /* OPAMP state changed to locked */
     hopamp->State = HAL_OPAMP_STATE_BUSYLOCKED;
   }
+  else
+  {
+    status = HAL_ERROR;
+  }
   return status; 
 }
 
@@ -965,14 +1008,14 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef* hopamp)
   *                  "HAL_OPAMP_SelfCalibrate()").
   *                  Otherwise, factory triming value cannot be retrieved and 
   *                  error status is returned.
-  * @param  hopamp : OPAMP handle
+  * @param  hopamp  OPAMP handle
-  * @param  trimmingoffset : Trimming offset (P or N)
+  * @param  trimmingoffset  Trimming offset (P or N)
   *         This parameter must be a value of @ref OPAMP_FactoryTrimming
   * @note   Calibration parameter retrieved is corresponding to the mode 
   *         specified in OPAMP init structure (mode normal or low-power). 
   *         To retrieve calibration parameters for both modes, repeat this 
   *         function after OPAMP init structure accordingly updated.
-  * @retval Trimming value (P or N): range: 0->31
+  * @retval Trimming value (P or N) range: 0->31
   *         or OPAMP_FACTORYTRIMMING_DUMMY if trimming value is not available
   *
   */
@@ -983,14 +1026,14 @@ HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hop
   
   /* Check the OPAMP handle allocation */
   /* Value can be retrieved in HAL_OPAMP_STATE_READY state */
-  if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET)
+  if(hopamp == NULL)
-                      || (hopamp->State == HAL_OPAMP_STATE_BUSY)
-                      || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)
-                      || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED))
   {
-    trimmingvalue = OPAMP_FACTORYTRIMMING_DUMMY;
+    return OPAMP_FACTORYTRIMMING_DUMMY;
   }
-  else
+
+  /* Check the OPAMP handle allocation */
+  /* Value can be retrieved in HAL_OPAMP_STATE_READY state */
+  if(hopamp->State == HAL_OPAMP_STATE_READY)
   {
     /* Check the parameter */
     assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance));
@@ -1023,7 +1066,10 @@ HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hop
       trimmingvalue = ((*tmp_opamp_reg_trimming >> OPAMP_OFFSET_TRIM_BITSPOSITION(hopamp, trimmingoffset)) & OPAMP_TRIM_VALUE_MASK);
     }
   }
-  
+  else
+  {
+    return OPAMP_FACTORYTRIMMING_DUMMY;
+  }  
   return trimmingvalue;
 }
 
@@ -1040,15 +1086,15 @@ HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hop
                       ##### Peripheral State functions #####
  ===============================================================================
     [..]
-    This subsection permit to get in run-time the status of the peripheral.
+    This subsection permits to get in run-time the status of the peripheral.
 
 @endverbatim
   * @{
   */
 
 /**
-  * @brief  Return the OPAMP state
+  * @brief  Return the OPAMP handle state.
-  * @param  hopamp : OPAMP handle
+  * @param  hopamp OPAMP handle
   * @retval HAL state
   */
 HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef* hopamp)
@@ -1065,6 +1111,144 @@ HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef* hopamp)
   return hopamp->State;
 }
 
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  Register a User OPAMP Callback
+  *         To be used instead of the weak (surcharged) predefined callback 
+  * @param hopamp OPAMP handle
+  * @param CallbackID ID of the callback to be registered
+  *        This parameter can be one of the following values:
+  *          @arg @ref HAL_OPAMP_MSPINIT_CB_ID       OPAMP MspInit callback ID 
+  *          @arg @ref HAL_OPAMP_MSPDEINIT_CB_ID     OPAMP MspDeInit callback ID  
+  * @param pCallback pointer to the Callback function
+  * @retval status
+  */
+HAL_StatusTypeDef HAL_OPAMP_RegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID, pOPAMP_CallbackTypeDef pCallback)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  if(pCallback == NULL)
+  {
+    return HAL_ERROR;
+  }
+
+  /* Process locked */
+  __HAL_LOCK(hopamp);
+  
+  if(hopamp->State == HAL_OPAMP_STATE_READY)
+  {
+    switch (CallbackID)
+    {
+    case HAL_OPAMP_MSPINIT_CB_ID :
+      hopamp->MspInitCallback = pCallback;
+      break;
+    case HAL_OPAMP_MSPDEINIT_CB_ID :
+      hopamp->MspDeInitCallback = pCallback;
+      break;
+    default :
+      /* Update the error code */
+      // hopamp->ErrorCode |= HAL_OPAMP_ERROR_INVALID_CALLBACK; 
+      /* update return status */
+      status =  HAL_ERROR;
+      break;
+    }
+  }
+  else if (hopamp->State == HAL_OPAMP_STATE_RESET)
+  {
+    switch (CallbackID)
+    {
+    case HAL_OPAMP_MSPINIT_CB_ID :
+      hopamp->MspInitCallback = pCallback;
+      break;
+    case HAL_OPAMP_MSPDEINIT_CB_ID :
+      hopamp->MspDeInitCallback = pCallback;
+      break;
+    default :
+      /* Update the error code */
+      // hopamp->ErrorCode |= HAL_OPAMP_ERROR_INVALID_CALLBACK; 
+      /* update return status */
+      status =  HAL_ERROR;
+      break;
+    }
+  }
+  else
+  {
+    /* update return status */
+    status =  HAL_ERROR;
+  }
+
+  /* Release Lock */
+  __HAL_UNLOCK(hopamp);
+  return status;
+}
+
+/**
+  * @brief  Unregister a User OPAMP Callback
+  *         OPAMP Callback is redirected to the weak (surcharged) predefined callback 
+  * @param hopamp OPAMP handle
+  * @param CallbackID ID of the callback to be unregistered
+  *        This parameter can be one of the following values:
+  *          @arg @ref HAL_OPAMP_MSPINIT_CB_ID              OPAMP MSP Init Callback ID
+  *          @arg @ref HAL_OPAMP_MSPDEINIT_CB_ID            OPAMP MSP DeInit Callback ID
+  *          @arg @ref HAL_OPAMP_ALL_CB_ID                   OPAMP All Callbacks
+  * @retval status
+  */
+
+HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  /* Process locked */
+  __HAL_LOCK(hopamp);
+  
+  if(hopamp->State == HAL_OPAMP_STATE_READY)
+  {
+    switch (CallbackID)
+    {     
+      case HAL_OPAMP_MSPINIT_CB_ID :
+      hopamp->MspInitCallback = HAL_OPAMP_MspInit;
+      break;
+    case HAL_OPAMP_MSPDEINIT_CB_ID :
+      hopamp->MspDeInitCallback = HAL_OPAMP_MspDeInit;
+      break;
+    case HAL_OPAMP_ALL_CB_ID :
+      hopamp->MspInitCallback = HAL_OPAMP_MspInit;
+      hopamp->MspDeInitCallback = HAL_OPAMP_MspDeInit;
+      break;
+    default :
+      /* update return status */
+      status =  HAL_ERROR;
+      break;
+    }
+  }
+  else if (hopamp->State == HAL_OPAMP_STATE_RESET)
+  {
+    switch (CallbackID)
+    {
+    case HAL_OPAMP_MSPINIT_CB_ID :
+      hopamp->MspInitCallback = HAL_OPAMP_MspInit;
+      break;
+    case HAL_OPAMP_MSPDEINIT_CB_ID :
+      hopamp->MspDeInitCallback = HAL_OPAMP_MspDeInit;
+      break;
+    default :
+      /* update return status */
+      status =  HAL_ERROR;
+      break;
+    }
+  }
+  else
+  {
+    /* update return status */
+    status =  HAL_ERROR;
+  }
+
+  /* Release Lock */
+  __HAL_UNLOCK(hopamp);
+  return status;
+}
+
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 /**
   * @}
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp.h

@@ -6,36 +6,20 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_OPAMP_H
+#ifndef STM32L1xx_HAL_OPAMP_H
-#define __STM32L1xx_HAL_OPAMP_H
+#define STM32L1xx_HAL_OPAMP_H
 
 #ifdef __cplusplus
  extern "C" {
@@ -124,13 +108,13 @@ typedef struct
 
 typedef enum
 {
-  HAL_OPAMP_STATE_RESET               = 0x00000000, /*!< OPMAP is not yet Initialized          */
+  HAL_OPAMP_STATE_RESET               = 0x00000000, /*!< OPAMP is not yet Initialized          */
   
   HAL_OPAMP_STATE_READY               = 0x00000001, /*!< OPAMP is initialized and ready for use */
   HAL_OPAMP_STATE_CALIBBUSY           = 0x00000002, /*!< OPAMP is enabled in auto calibration mode */
  
   HAL_OPAMP_STATE_BUSY                = 0x00000004, /*!< OPAMP is enabled and running in normal mode */                                                                           
-  HAL_OPAMP_STATE_BUSYLOCKED          = 0x00000005, /*!< OPAMP is locked
+  HAL_OPAMP_STATE_BUSYLOCKED          = 0x00000005  /*!< OPAMP is locked
                                                          only system reset allows reconfiguring the opamp. */
     
 }HAL_OPAMP_StateTypeDef;
@@ -138,7 +122,11 @@ typedef enum
 /** 
   * @brief OPAMP Handle Structure definition
   */ 
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+typedef struct __OPAMP_HandleTypeDef
+#else
 typedef struct
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 {
   OPAMP_TypeDef       *Instance;                    /*!< OPAMP instance's registers base address   */
   OPAMP_InitTypeDef   Init;                         /*!< OPAMP required parameters */
@@ -146,6 +134,11 @@ typedef struct
   HAL_LockTypeDef   Lock;                           /*!< Locking object          */
   __IO HAL_OPAMP_StateTypeDef  State;               /*!< OPAMP communication state */
   
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+void (* MspInitCallback)                (struct __OPAMP_HandleTypeDef *hopamp);
+void (* MspDeInitCallback)              (struct __OPAMP_HandleTypeDef *hopamp);
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
+
 } OPAMP_HandleTypeDef;
 
 /** 
@@ -158,6 +151,24 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
   * @}
   */
 
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL OPAMP Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_OPAMP_MSPINIT_CB_ID                     = 0x01U,  /*!< OPAMP MspInit Callback ID           */
+  HAL_OPAMP_MSPDEINIT_CB_ID                   = 0x02U,  /*!< OPAMP MspDeInit Callback ID         */
+  HAL_OPAMP_ALL_CB_ID                         = 0x03U   /*!< OPAMP All ID                        */
+}HAL_OPAMP_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL OPAMP Callback pointer definition
+  */
+typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp);
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
+
+
 /* Exported constants --------------------------------------------------------*/
 
 /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants
@@ -179,8 +190,8 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_Mode OPAMP Mode
   * @{
   */
-#define OPAMP_STANDALONE_MODE            (0x00000000U) /*!< OPAMP standalone mode */
+#define OPAMP_STANDALONE_MODE            0x00000000U  /*!< OPAMP standalone mode */
-#define OPAMP_FOLLOWER_MODE              (0x00000001U) /*!< OPAMP follower mode */
+#define OPAMP_FOLLOWER_MODE              0x00000001U  /*!< OPAMP follower mode */
 
 /**
   * @}
@@ -189,9 +200,9 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_NonInvertingInput OPAMP NonInvertingInput
   * @{
   */
-#define OPAMP_NONINVERTINGINPUT_IO0      (0x00000000U)  /*!< Comparator non-inverting input connected to dedicated IO pin low-leakage */
+#define OPAMP_NONINVERTINGINPUT_IO0       0x00000000U   /*!< Comparator non-inverting input connected to dedicated IO pin low-leakage */
-#define OPAMP_NONINVERTINGINPUT_DAC_CH1  (0x00000001U)  /*!< Comparator non-inverting input connected internally to DAC channel 1. Available only on OPAMP1 and OPAMP2. */
+#define OPAMP_NONINVERTINGINPUT_DAC_CH1   0x00000001U   /*!< Comparator non-inverting input connected internally to DAC channel 1. Available only on OPAMP1 and OPAMP2. */
-#define OPAMP_NONINVERTINGINPUT_DAC_CH2  (0x00000002U)  /*!< Comparator non-inverting input connected internally to DAC channel 2. Available only on OPAMP2 and OPAMP3 (OPAMP3 availability depends on STM32L1 devices). */
+#define OPAMP_NONINVERTINGINPUT_DAC_CH2   0x00000002U   /*!< Comparator non-inverting input connected internally to DAC channel 2. Available only on OPAMP2 and OPAMP3 (OPAMP3 availability depends on STM32L1 devices). */
 
 /**
   * @}
@@ -201,8 +212,8 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
   * @{
   */
 /* Note: Literal "OPAMP_SEC_INVERTINGINPUT_IO1" is a legacy naming of "OPAMP_INVERTINGINPUT_IO1". It is equivalent and must be replaced by "OPAMP_INVERTINGINPUT_IO1". */
-#define OPAMP_INVERTINGINPUT_IO0         (0x00000000U)  /*!< Comparator inverting input connected to dedicated IO pin low-leakage */
+#define OPAMP_INVERTINGINPUT_IO0         0x00000000U   /*!< Comparator inverting input connected to dedicated IO pin low-leakage */
-#define OPAMP_INVERTINGINPUT_IO1         (0x00000001U)  /*!< Comparator inverting input connected to alternative IO pin available on some device packages */
+#define OPAMP_INVERTINGINPUT_IO1         0x00000001U   /*!< Comparator inverting input connected to alternative IO pin available on some device packages */
 
 /**
   * @}
@@ -211,8 +222,8 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_PowerMode OPAMP PowerMode
   * @{
   */
-#define OPAMP_POWERMODE_NORMAL        (0x00000000U)
+#define OPAMP_POWERMODE_NORMAL        0x00000000U
-#define OPAMP_POWERMODE_LOWPOWER      (0x00000001U)
+#define OPAMP_POWERMODE_LOWPOWER      0x00000001U
 
 /**
   * @}
@@ -221,7 +232,7 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_PowerSupplyRange OPAMP PowerSupplyRange
   * @{
   */
-#define OPAMP_POWERSUPPLY_LOW          (0x00000000U)           /*!< Power supply range low (VDDA lower than 2.4V) */
+#define OPAMP_POWERSUPPLY_LOW          0x00000000U             /*!< Power supply range low (VDDA lower than 2.4V) */
 #define OPAMP_POWERSUPPLY_HIGH         OPAMP_CSR_AOP_RANGE     /*!< Power supply range high (VDDA higher than 2.4V) */
 
 /**
@@ -231,7 +242,7 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_UserTrimming OPAMP User Trimming
   * @{
   */
-#define OPAMP_TRIMMING_FACTORY        (0x00000000U)                          /*!< Factory trimming */
+#define OPAMP_TRIMMING_FACTORY         0x00000000U                           /*!< Factory trimming */
 #define OPAMP_TRIMMING_USER           OPAMP_OTR_OT_USER                      /*!< User trimming */
 
 /**
@@ -241,9 +252,9 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
 /** @defgroup OPAMP_FactoryTrimming OPAMP FactoryTrimming
   * @{
   */
-#define OPAMP_FACTORYTRIMMING_DUMMY    (0xFFFFFFFFU)                                    /*!< Dummy value if trimming value could not be retrieved */
+#define OPAMP_FACTORYTRIMMING_DUMMY    0xFFFFFFFFU                                      /*!< Dummy value if trimming value could not be retrieved */
 
-#define OPAMP_FACTORYTRIMMING_P        (0x00000000U)                                    /*!< Offset trimming P */
+#define OPAMP_FACTORYTRIMMING_P        0U                                               /*!< Offset trimming P */
 #define OPAMP_FACTORYTRIMMING_N        POSITION_VAL(OPAMP_OTR_AO1_OPT_OFFSET_TRIM_HIGH) /*!< Offset trimming N */
 
 /**
@@ -276,7 +287,7 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
   */
 
 /** @brief Reset OPAMP handle state
-  * @param  __HANDLE__: OPAMP handle.
+  * @param  __HANDLE__ OPAMP handle.
   * @retval None
   */
 #define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
@@ -307,7 +318,7 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
   * @retval None
   */
 #define OPAMP_CSR_S3SELX(__HANDLE__)                                           \
-  (OPAMP_CSR_S3SEL1 << (OPAMP_INSTANCE_DECIMAL(__HANDLE__) * OPAMP_CSR_INSTANCE_OFFSET))
+  (OPAMP_CSR_S3SEL1 << ((OPAMP_INSTANCE_DECIMAL(__HANDLE__) * OPAMP_CSR_INSTANCE_OFFSET) & 0x1fU))
 
 /**
   * @brief Select the OPAMP bit S4SELx (switch 4) corresponding to the
@@ -436,7 +447,7 @@ typedef  uint32_t HAL_OPAMP_TrimmingValueTypeDef;
   * @param TRIMMINGVALUE: OPAMP trimming value
   * @retval None
   */
-#define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1E)
+#define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 30U)
 
 #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \
                                                ((INPUT) == OPAMP_FOLLOWER_MODE))
@@ -489,6 +500,7 @@ void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp);
 HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp);
 HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp);
 HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
+
 /**
   * @}
   */
@@ -498,8 +510,15 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
   */
 
 /* Peripheral Control functions  ************************************************/
+#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
+/* OPAMP callback registering/unregistering */
+HAL_StatusTypeDef HAL_OPAMP_RegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID, pOPAMP_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
+
 HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
 HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
+
 /**
   * @}
   */
@@ -532,6 +551,6 @@ HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
 }
 #endif
 
-#endif /* __STM32L1xx_HAL_OPAMP_H */
+#endif /* STM32L1xx_HAL_OPAMP_H */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp_ex.c

@@ -0,0 +1,800 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_opamp_ex.c
+  * @author  MCD Application Team
+  * @brief   Extended OPAMP HAL module driver.
+  *
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the operational amplifier(s)(OPAMP1, OPAMP2 etc)
+  *          peripheral:
+  *           + Extended Initialization and de-initialization functions
+  *           + Extended Peripheral Control functions
+  *         
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+
+#if defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) || defined (STM32L162xC) || defined (STM32L152xC) || defined (STM32L151xC)
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup OPAMPEx OPAMPEx
+  * @brief OPAMP Extended HAL module driver.
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup OPAMPEx_Exported_Functions OPAMPEx Exported Functions
+  * @{
+  */
+
+/** @addtogroup OPAMPEx_Exported_Functions_Group1
+  * @brief    Extended operation functions
+  *
+@verbatim
+ ===============================================================================
+              ##### Extended IO operation functions #####
+ ===============================================================================
+  [..]
+      (+) OPAMP Self calibration. 
+
+@endverbatim
+  * @{
+  */
+
+#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
+
+/*  3 OPAMPS available */
+/*  3 OPAMPS can be calibrated in parallel */
+
+/**
+  * @brief  Run the self calibration of the 3 OPAMPs in parallel.
+  * @note   Trimming values (PMOS & NMOS) are updated and user trimming is 
+  *         enabled is calibration is succesful.
+  * @note   Calibration is performed in the mode specified in OPAMP init
+  *         structure (mode normal or low-power). To perform calibration for
+  *         both modes, repeat this function twice after OPAMP init structure
+  *         accordingly updated.
+  * @note   Calibration runs about 10 ms (5 dichotmy steps, repeated for P  
+  *         and N transistors: 10 steps with 1 ms for each step).
+  * @param  hopamp1 handle
+  * @param  hopamp2 handle
+  * @param  hopamp3 handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2, OPAMP_HandleTypeDef *hopamp3)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+  
+  uint32_t* opamp1_trimmingvalue;
+  uint32_t opamp1_trimmingvaluen = 0;
+  uint32_t opamp1_trimmingvaluep = 0;
+  
+  uint32_t* opamp2_trimmingvalue;
+  uint32_t opamp2_trimmingvaluen = 0;
+  uint32_t opamp2_trimmingvaluep = 0;
+  
+  uint32_t* opamp3_trimmingvalue;
+  uint32_t opamp3_trimmingvaluen = 0;
+  uint32_t opamp3_trimmingvaluep = 0;
+  
+  uint32_t trimming_diff_pair;              /* Selection of differential transistors pair high or low */
+
+  __IO uint32_t* tmp_opamp1_reg_trimming;   /* Selection of register of trimming depending on power mode: OTR or LPOTR */
+  __IO uint32_t* tmp_opamp2_reg_trimming;
+  __IO uint32_t* tmp_opamp3_reg_trimming;
+  uint32_t tmp_opamp1_otr_otuser;           /* Selection of bit OPAMP_OTR_OT_USER depending on trimming register pointed: OTR or LPOTR */
+  uint32_t tmp_opamp2_otr_otuser;
+  uint32_t tmp_opamp3_otr_otuser;
+  
+  uint32_t tmp_Opa1calout_DefaultSate;      /* Bit OPAMP_CSR_OPA1CALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+  uint32_t tmp_Opa2calout_DefaultSate;      /* Bit OPAMP_CSR_OPA2CALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+  uint32_t tmp_Opa3calout_DefaultSate;      /* Bit OPAMP_CSR_OPA3CALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+
+  uint32_t tmp_OpaxSwitchesContextBackup = 0x0U;
+  
+  uint8_t trimming_diff_pair_iteration_count = 0x0U;    /* For calibration loop algorithm: to repeat the calibration loop for both differential transistors pair high and low */
+  uint8_t delta;                                        /* For calibration loop algorithm: Variable for dichotomy steps value */
+  uint8_t final_step_check = 0x0U;                      /* For calibration loop algorithm: Flag for additional check of last trimming step */
+
+
+  if((hopamp1 == NULL) || (hopamp2 == NULL) || (hopamp3 == NULL))
+  {
+    status = HAL_ERROR;
+  } 
+  /* Check if OPAMP in calibration mode and calibration not yet enable */
+  else if(hopamp1->State !=  HAL_OPAMP_STATE_READY)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp2->State != HAL_OPAMP_STATE_READY)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp3->State != HAL_OPAMP_STATE_READY)
+  {
+    status = HAL_ERROR;
+  }
+
+  else
+  {
+      /* Check the parameter */
+      assert_param(IS_OPAMP_ALL_INSTANCE(hopamp1->Instance));
+      assert_param(IS_OPAMP_ALL_INSTANCE(hopamp2->Instance));
+      assert_param(IS_OPAMP_ALL_INSTANCE(hopamp3->Instance));
+      assert_param(IS_OPAMP_POWERMODE(hopamp1->Init.PowerMode));
+      assert_param(IS_OPAMP_POWERMODE(hopamp2->Init.PowerMode));
+      assert_param(IS_OPAMP_POWERMODE(hopamp3->Init.PowerMode));
+      
+      /* Update OPAMP state */
+      hopamp1->State = HAL_OPAMP_STATE_CALIBBUSY;
+      hopamp2->State = HAL_OPAMP_STATE_CALIBBUSY;
+      hopamp3->State = HAL_OPAMP_STATE_CALIBBUSY;
+      
+      /* Backup of switches configuration to restore it at the end of the     */
+      /* calibration.                                                         */
+      tmp_OpaxSwitchesContextBackup = READ_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS);
+      
+      /* Open all switches on non-inverting input, inverting input and output */
+      /* feedback.                                                            */
+      CLEAR_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS);
+      
+      /* Set calibration mode to user programmed trimming values */
+      SET_BIT(OPAMP->OTR, OPAMP_OTR_OT_USER);
+      
+      /* Select trimming settings depending on power mode */
+      if (hopamp1->Init.PowerMode == OPAMP_POWERMODE_NORMAL)
+      {
+        tmp_opamp1_otr_otuser = OPAMP_OTR_OT_USER;
+        tmp_opamp1_reg_trimming = &OPAMP->OTR;
+      }
+      else
+      {
+        tmp_opamp1_otr_otuser = 0x00000000;
+        tmp_opamp1_reg_trimming = &OPAMP->LPOTR;
+      }
+      
+      if (hopamp2->Init.PowerMode == OPAMP_POWERMODE_NORMAL)
+      {
+        tmp_opamp2_otr_otuser = OPAMP_OTR_OT_USER;
+        tmp_opamp2_reg_trimming = &OPAMP->OTR;
+      }
+      else
+      {
+        tmp_opamp2_otr_otuser = 0x00000000;
+        tmp_opamp2_reg_trimming = &OPAMP->LPOTR;
+      }
+      
+      if (hopamp3->Init.PowerMode == OPAMP_POWERMODE_NORMAL)
+      {
+        tmp_opamp3_otr_otuser = OPAMP_OTR_OT_USER;
+        tmp_opamp3_reg_trimming = &OPAMP->OTR;
+      }
+      else
+      {
+        tmp_opamp3_otr_otuser = 0x00000000;
+        tmp_opamp3_reg_trimming = &OPAMP->LPOTR;
+      }
+      
+      /* Enable the selected opamp */
+      CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD_ALL);
+      
+      /* Perform trimming for both differential transistors pair high and low */
+      for (trimming_diff_pair_iteration_count = 0U; trimming_diff_pair_iteration_count <= 1U; trimming_diff_pair_iteration_count++)
+      {
+        if (trimming_diff_pair_iteration_count == 0U)
+        {
+          /* Calibration of transistors differential pair high (NMOS) */
+          trimming_diff_pair = OPAMP_FACTORYTRIMMING_N;
+          opamp1_trimmingvalue = &opamp1_trimmingvaluen;
+          opamp2_trimmingvalue = &opamp2_trimmingvaluen;
+          opamp3_trimmingvalue = &opamp3_trimmingvaluen;
+          
+          /* Set bit OPAMP_CSR_OPAXCALOUT default state when trimming value   */
+          /* is 00000b. Used to detect the bit toggling during trimming.      */
+          tmp_Opa1calout_DefaultSate = RESET;
+          tmp_Opa2calout_DefaultSate = RESET;
+          tmp_Opa3calout_DefaultSate = RESET;
+          
+          /* Enable calibration for N differential pair */
+          MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_L_ALL,
+                                 OPAMP_CSR_OPAXCAL_H_ALL);
+        }
+        else /* (trimming_diff_pair_iteration_count == 1) */
+        {
+          /* Calibration of transistors differential pair low (PMOS) */
+          trimming_diff_pair = OPAMP_FACTORYTRIMMING_P;
+          opamp1_trimmingvalue = &opamp1_trimmingvaluep;
+          opamp2_trimmingvalue = &opamp2_trimmingvaluep;
+          opamp3_trimmingvalue = &opamp3_trimmingvaluep;
+          
+          /* Set bit OPAMP_CSR_OPAXCALOUT default state when trimming value   */
+          /* is 00000b. Used to detect the bit toggling during trimming.      */
+          tmp_Opa1calout_DefaultSate = OPAMP_CSR_OPAXCALOUT(hopamp1);
+          tmp_Opa2calout_DefaultSate = OPAMP_CSR_OPAXCALOUT(hopamp2);
+          tmp_Opa3calout_DefaultSate = OPAMP_CSR_OPAXCALOUT(hopamp3);
+          
+          /* Enable calibration for P differential pair */
+          MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_H_ALL,
+                                 OPAMP_CSR_OPAXCAL_L_ALL);
+        }
+        
+      
+        /* Perform calibration parameter search by dichotomy sweep */
+        /*  - Delta initial value 16: for 5 dichotomy steps: 16 for the       */
+        /*    initial range, then successive delta sweeps (8, 4, 2, 1).       */
+        /*    can extend the search range to +/- 15 units.                    */
+        /*  - Trimming initial value 15: search range will go from 0 to 30    */
+        /*    (Trimming value 31 is forbidden).                               */
+        /* Note: After dichotomy sweep, the trimming result is determined.    */
+        /*       However, the final trimming step is deduced from previous    */
+        /*       trimming steps tested but is not effectively tested.         */
+        /*       An additional test step (using variable "final_step_check")  */
+        /*       allow to Test the final trimming step.                       */
+        *opamp1_trimmingvalue = 15U;
+        *opamp2_trimmingvalue = 15U;
+        *opamp3_trimmingvalue = 15U;
+        delta = 16U;
+        
+        while ((delta != 0U) || (final_step_check == 1U))
+        {
+          /* Set candidate trimming */
+          MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                               OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, *opamp1_trimmingvalue) | tmp_opamp1_otr_otuser);
+
+          MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                               OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, *opamp2_trimmingvalue) | tmp_opamp2_otr_otuser);
+
+          MODIFY_REG(*tmp_opamp3_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp3, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                               OPAMP_OFFSET_TRIM_SET(hopamp3, trimming_diff_pair, *opamp3_trimmingvalue) | tmp_opamp3_otr_otuser);
+          
+          /* Offset trimming time: during calibration, minimum time needed    */
+          /* between two steps to have 1 mV accuracy.                         */
+          HAL_Delay(OPAMP_TRIMMING_DELAY);
+          
+          /* Set flag for additional check of last trimming step equal to     */
+          /* dichotomy step before its division by 2 (equivalent to previous  */
+          /* value of dichotomy step).                                        */
+          final_step_check = delta;
+          
+          /* Divide range by 2 to continue dichotomy sweep */
+          delta >>= 1U;
+          
+          /* Set trimming values for next iteration in function of trimming   */
+          /* result toggle (versus initial state).                            */
+          /* Trimming values update with dichotomy delta of previous          */
+          /* iteration.                                                       */
+          /* Note: on the last trimming loop, delta is equal to 0 and         */
+          /*       therefore has no effect.                                   */
+          if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) != tmp_Opa1calout_DefaultSate)
+          {
+            /* If calibration output is has toggled, try lower trimming */
+            *opamp1_trimmingvalue -= delta;
+          }
+          else
+          {
+            /* If calibration output is has not toggled, try higher trimming */
+            *opamp1_trimmingvalue += delta;
+          }
+          
+          if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) != tmp_Opa2calout_DefaultSate)
+          {
+            /* If calibration output is has toggled, try lower trimming */
+            *opamp2_trimmingvalue -= delta;
+          }
+          else
+          {
+            /* If calibration output is has not toggled, try higher trimming */
+            *opamp2_trimmingvalue += delta;
+          }
+
+        if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp3)) != tmp_Opa3calout_DefaultSate)
+        {
+          /* If calibration output is has toggled, try lower trimming */
+          *opamp3_trimmingvalue -= delta;
+        }
+        else
+        {
+          /* If calibration output is has not toggled, try higher trimming */
+          *opamp3_trimmingvalue += delta;
+        }
+      }
+      
+      /* Check trimming result of the selected step and perform final fine  */
+      /* trimming.                                                          */
+      /*  - If calibration output is has toggled: the current step is       */
+      /*    already optimized.                                              */
+      /*  - If calibration output is has not toggled: the current step can  */
+      /*    be optimized by incrementing it of one step.                    */
+      if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) == tmp_Opa1calout_DefaultSate)
+      {
+        *opamp1_trimmingvalue += 1U;
+        
+        /* Set final fine trimming */
+        MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, *opamp1_trimmingvalue) | tmp_opamp1_otr_otuser);
+      }
+      if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) == tmp_Opa2calout_DefaultSate)
+      {
+        *opamp2_trimmingvalue += 1U;
+        
+        /* Set final fine trimming */
+        MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, *opamp2_trimmingvalue) | tmp_opamp2_otr_otuser);
+      }
+      if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp3)) == tmp_Opa3calout_DefaultSate)
+      {
+        *opamp3_trimmingvalue += 1U;
+        
+        /* Set final fine trimming */
+        MODIFY_REG(*tmp_opamp3_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp3, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp3, trimming_diff_pair, *opamp3_trimmingvalue) | tmp_opamp3_otr_otuser);
+      }
+      
+    }
+     
+
+    /* Disable calibration for P and N differential pairs */
+    /* Disable the selected opamp */
+    CLEAR_BIT (OPAMP->CSR, (OPAMP_CSR_OPAXCAL_H_ALL | 
+                            OPAMP_CSR_OPAXCAL_L_ALL |
+                            OPAMP_CSR_OPAXPD_ALL     ));
+    
+    /* Backup of switches configuration to restore it at the end of the     */
+    /* calibration.                                                         */
+    SET_BIT(OPAMP->CSR, tmp_OpaxSwitchesContextBackup);
+    
+    /* Self calibration is successful */
+    /* Store calibration (user trimming) results in init structure. */
+    
+    /* Set user trimming mode */  
+    hopamp1->Init.UserTrimming = OPAMP_TRIMMING_USER;
+    hopamp2->Init.UserTrimming = OPAMP_TRIMMING_USER;
+    hopamp3->Init.UserTrimming = OPAMP_TRIMMING_USER;
+    
+    /* Affect calibration parameters depending on mode normal/low power */
+    if (hopamp1->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER)
+    {
+      /* Write calibration result N */
+      hopamp1->Init.TrimmingValueN = opamp1_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp1->Init.TrimmingValueP = opamp1_trimmingvaluep;
+    }
+    else
+    {
+      /* Write calibration result N */
+      hopamp1->Init.TrimmingValueNLowPower = opamp1_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp1->Init.TrimmingValuePLowPower = opamp1_trimmingvaluep;
+    }
+    
+    if (hopamp2->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER)
+    {
+      /* Write calibration result N */
+      hopamp2->Init.TrimmingValueN = opamp2_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp2->Init.TrimmingValueP = opamp2_trimmingvaluep;
+    }
+    else
+    {
+      /* Write calibration result N */
+      hopamp2->Init.TrimmingValueNLowPower = opamp2_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp2->Init.TrimmingValuePLowPower = opamp2_trimmingvaluep;
+    }
+    
+    if (hopamp3->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER)
+    {
+      /* Write calibration result N */
+      hopamp3->Init.TrimmingValueN = opamp3_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp3->Init.TrimmingValueP = opamp3_trimmingvaluep;
+    }
+    else
+    {
+      /* Write calibration result N */
+      hopamp3->Init.TrimmingValueNLowPower = opamp3_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp3->Init.TrimmingValuePLowPower = opamp3_trimmingvaluep;
+    }
+
+    /* Update OPAMP state */
+    hopamp1->State = HAL_OPAMP_STATE_READY;
+    hopamp2->State = HAL_OPAMP_STATE_READY;
+    hopamp3->State = HAL_OPAMP_STATE_READY;
+  }
+  return status;
+}
+
+#else
+
+/*  2 OPAMPS available */
+/*  2 OPAMPS can be calibrated in parallel */
+
+/**
+  * @brief  Run the self calibration of the 2 OPAMPs in parallel.
+  * @note   Trimming values (PMOS & NMOS) are updated and user trimming is 
+  *         enabled is calibration is succesful.
+  * @note   Calibration is performed in the mode specified in OPAMP init
+  *         structure (mode normal or low-power). To perform calibration for
+  *         both modes, repeat this function twice after OPAMP init structure
+  *         accordingly updated.
+  * @note   Calibration runs about 10 ms (5 dichotmy steps, repeated for P  
+  *         and N transistors: 10 steps with 1 ms for each step).
+  * @param  hopamp1 handle
+  * @param  hopamp2 handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+  
+  uint32_t* opamp1_trimmingvalue;
+  uint32_t opamp1_trimmingvaluen = 0;
+  uint32_t opamp1_trimmingvaluep = 0;
+  
+  uint32_t* opamp2_trimmingvalue;
+  uint32_t opamp2_trimmingvaluen = 0;
+  uint32_t opamp2_trimmingvaluep = 0;
+  
+  uint32_t trimming_diff_pair;          /* Selection of differential transistors pair high or low */
+
+  __IO uint32_t* tmp_opamp1_reg_trimming;   /* Selection of register of trimming depending on power mode: OTR or LPOTR */
+  __IO uint32_t* tmp_opamp2_reg_trimming;
+  uint32_t tmp_opamp1_otr_otuser;       /* Selection of bit OPAMP_OTR_OT_USER depending on trimming register pointed: OTR or LPOTR */
+  uint32_t tmp_opamp2_otr_otuser;
+  
+  uint32_t tmp_Opa1calout_DefaultSate;  /* Bit OPAMP_CSR_OPA1CALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+  uint32_t tmp_Opa2calout_DefaultSate;  /* Bit OPAMP_CSR_OPA2CALOUT default state when trimming value is 00000b. Used to detect the bit toggling */
+
+  uint32_t tmp_OpaxSwitchesContextBackup;
+  
+  uint8_t trimming_diff_pair_iteration_count;          /* For calibration loop algorithm: to repeat the calibration loop for both differential transistors pair high and low */
+  uint8_t delta;                                       /* For calibration loop algorithm: Variable for dichotomy steps value */
+  uint8_t final_step_check = 0x0U;                     /* For calibration loop algorithm: Flag for additional check of last trimming step */
+
+
+  if((hopamp1 == NULL) || (hopamp2 == NULL))
+  {
+    status = HAL_ERROR;
+  }
+  /* Check if OPAMP in calibration mode and calibration not yet enable */
+  else if(hopamp1->State !=  HAL_OPAMP_STATE_READY)
+  {
+    status = HAL_ERROR;
+  }
+  else if(hopamp2->State != HAL_OPAMP_STATE_READY)
+  {
+    status = HAL_ERROR;
+  }
+  else
+  {
+    /* Check the parameter */
+    assert_param(IS_OPAMP_ALL_INSTANCE(hopamp1->Instance));
+    assert_param(IS_OPAMP_ALL_INSTANCE(hopamp2->Instance));
+    assert_param(IS_OPAMP_POWERMODE(hopamp1->Init.PowerMode));
+    assert_param(IS_OPAMP_POWERMODE(hopamp2->Init.PowerMode));
+    
+    /* Update OPAMP state */
+    hopamp1->State = HAL_OPAMP_STATE_CALIBBUSY;
+    hopamp2->State = HAL_OPAMP_STATE_CALIBBUSY;
+    
+    /* Backup of switches configuration to restore it at the end of the     */
+    /* calibration.                                                         */
+    tmp_OpaxSwitchesContextBackup = READ_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS);
+    
+    /* Open all switches on non-inverting input, inverting input and output */
+    /* feedback.                                                            */
+    CLEAR_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS);
+    
+    /* Set calibration mode to user programmed trimming values */
+    SET_BIT(OPAMP->OTR, OPAMP_OTR_OT_USER);
+    
+    /* Select trimming settings depending on power mode */
+    if (hopamp1->Init.PowerMode == OPAMP_POWERMODE_NORMAL)
+    {
+      tmp_opamp1_otr_otuser = OPAMP_OTR_OT_USER;
+      tmp_opamp1_reg_trimming = &OPAMP->OTR;
+    }
+    else
+    {
+      tmp_opamp1_otr_otuser = 0x00000000U;
+      tmp_opamp1_reg_trimming = &OPAMP->LPOTR;
+    }
+    
+    if (hopamp2->Init.PowerMode == OPAMP_POWERMODE_NORMAL)
+    {
+      tmp_opamp2_otr_otuser = OPAMP_OTR_OT_USER;
+      tmp_opamp2_reg_trimming = &OPAMP->OTR;
+    }
+    else
+    {
+      tmp_opamp2_otr_otuser = 0x00000000U;
+      tmp_opamp2_reg_trimming = &OPAMP->LPOTR;
+    }
+    
+    /* Enable the selected opamp */
+    CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD_ALL);
+    
+    /* Perform trimming for both differential transistors pair high and low */
+    for (trimming_diff_pair_iteration_count = 0U; trimming_diff_pair_iteration_count <= 1U; trimming_diff_pair_iteration_count++)
+    {
+      if (trimming_diff_pair_iteration_count == 0U)
+      {
+        /* Calibration of transistors differential pair high (NMOS) */
+        trimming_diff_pair = OPAMP_FACTORYTRIMMING_N;
+        opamp1_trimmingvalue = &opamp1_trimmingvaluen;
+        opamp2_trimmingvalue = &opamp2_trimmingvaluen;
+        
+        /* Set bit OPAMP_CSR_OPAXCALOUT default state when trimming value   */
+        /* is 00000b. Used to detect the bit toggling during trimming.      */
+        tmp_Opa1calout_DefaultSate = 0U;
+        tmp_Opa2calout_DefaultSate = 0U;
+        
+        /* Enable calibration for N differential pair */
+        MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_L_ALL,
+                               OPAMP_CSR_OPAXCAL_H_ALL);
+      }
+      else /* (trimming_diff_pair_iteration_count == 1) */
+      {
+        /* Calibration of transistors differential pair low (PMOS) */
+        trimming_diff_pair = OPAMP_FACTORYTRIMMING_P;
+        opamp1_trimmingvalue = &opamp1_trimmingvaluep;
+        opamp2_trimmingvalue = &opamp2_trimmingvaluep;
+        
+        /* Set bit OPAMP_CSR_OPAXCALOUT default state when trimming value   */
+        /* is 00000b. Used to detect the bit toggling during trimming.      */
+        tmp_Opa1calout_DefaultSate = (uint32_t) OPAMP_CSR_OPAXCALOUT(hopamp1);
+        tmp_Opa2calout_DefaultSate = OPAMP_CSR_OPAXCALOUT(hopamp2);
+        
+        /* Enable calibration for P differential pair */
+        MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_H_ALL,
+                               OPAMP_CSR_OPAXCAL_L_ALL);
+      }
+      
+    
+      /* Perform calibration parameter search by dichotomy sweep */
+      /*  - Delta initial value 16: for 5 dichotomy steps: 16 for the       */
+      /*    initial range, then successive delta sweeps (8, 4, 2, 1).       */
+      /*    can extend the search range to +/- 15 units.                    */
+      /*  - Trimming initial value 15: search range will go from 0 to 30    */
+      /*    (Trimming value 31 is forbidden).                               */
+      /* Note: After dichotomy sweep, the trimming result is determined.    */
+      /*       However, the final trimming step is deduced from previous    */
+      /*       trimming steps tested but is not effectively tested.         */
+      /*       An additional test step (using variable "final_step_check")  */
+      /*       allow to Test the final trimming step.                       */
+      *opamp1_trimmingvalue = 15U;
+      *opamp2_trimmingvalue = 15U;
+      delta = 16U;
+      
+      while ((delta != 0U) || (final_step_check == 1U))
+      {
+        /* Set candidate trimming */
+        MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, *opamp1_trimmingvalue) | tmp_opamp1_otr_otuser);
+
+        MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, *opamp2_trimmingvalue) | tmp_opamp2_otr_otuser);
+
+        
+        /* Offset trimming time: during calibration, minimum time needed    */
+        /* between two steps to have 1 mV accuracy.                         */
+        HAL_Delay(OPAMP_TRIMMING_DELAY);
+        
+        /* Set flag for additional check of last trimming step equal to     */
+        /* dichotomy step before its division by 2 (equivalent to previous  */
+        /* value of dichotomy step).                                        */
+        final_step_check = delta;
+        
+        /* Divide range by 2 to continue dichotomy sweep */
+        delta >>= 1U;
+        
+        /* Set trimming values for next iteration in function of trimming   */
+        /* result toggle (versus initial state).                            */
+        /* Trimming values update with dichotomy delta of previous          */
+        /* iteration.                                                       */
+        /* Note: on the last trimming loop, delta is equal to 0 and         */
+        /*       therefore has no effect.                                   */
+        if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) != tmp_Opa1calout_DefaultSate)
+        {
+          /* If calibration output is has toggled, try lower trimming */
+          *opamp1_trimmingvalue -= delta;
+        }
+        else
+        {
+          /* If calibration output is has not toggled, try higher trimming */
+          *opamp1_trimmingvalue += delta;
+        }
+        
+        if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) != tmp_Opa2calout_DefaultSate)
+        {
+          /* If calibration output is has toggled, try lower trimming */
+          *opamp2_trimmingvalue -= delta;
+        }
+        else
+        {
+          /* If calibration output is has not toggled, try higher trimming */
+          *opamp2_trimmingvalue += delta;
+        }
+      }
+      
+      /* Check trimming result of the selected step and perform final fine  */
+      /* trimming.                                                          */
+      /*  - If calibration output is has toggled: the current step is       */
+      /*    already optimized.                                              */
+      /*  - If calibration output is has not toggled: the current step can  */
+      /*    be optimized by incrementing it of one step.                    */
+      if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) == tmp_Opa1calout_DefaultSate)
+      {
+        *opamp1_trimmingvalue += 1U;
+        
+        /* Set final fine trimming */
+        MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp1, trimming_diff_pair, *opamp1_trimmingvalue) | tmp_opamp1_otr_otuser);
+      }
+      if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) == tmp_Opa2calout_DefaultSate)
+      {
+        *opamp2_trimmingvalue += 1U;
+        
+        /* Set final fine trimming */
+        MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, OPAMP_TRIM_VALUE_MASK) ,
+                                             OPAMP_OFFSET_TRIM_SET(hopamp2, trimming_diff_pair, *opamp2_trimmingvalue) | tmp_opamp2_otr_otuser);
+
+      }
+      
+    }
+     
+
+    /* Disable calibration for P and N differential pairs */
+    /* Disable the selected opamp */
+    CLEAR_BIT (OPAMP->CSR, (OPAMP_CSR_OPAXCAL_H_ALL | 
+                            OPAMP_CSR_OPAXCAL_L_ALL |
+                            OPAMP_CSR_OPAXPD_ALL     ));
+    
+    /* Backup of switches configuration to restore it at the end of the     */
+    /* calibration.                                                         */
+    SET_BIT(OPAMP->CSR, tmp_OpaxSwitchesContextBackup);
+    
+    /* Self calibration is successful */
+    /* Store calibration (user trimming) results in init structure. */
+    
+    /* Set user trimming mode */  
+    hopamp1->Init.UserTrimming = OPAMP_TRIMMING_USER;
+    hopamp2->Init.UserTrimming = OPAMP_TRIMMING_USER;
+    
+    /* Affect calibration parameters depending on mode normal/low power */
+    if (hopamp1->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER)
+    {
+      /* Write calibration result N */
+      hopamp1->Init.TrimmingValueN = opamp1_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp1->Init.TrimmingValueP = opamp1_trimmingvaluep;
+    }
+    else
+    {
+      /* Write calibration result N */
+      hopamp1->Init.TrimmingValueNLowPower = opamp1_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp1->Init.TrimmingValuePLowPower = opamp1_trimmingvaluep;
+    }
+    
+    if (hopamp2->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER)
+    {
+      /* Write calibration result N */
+      hopamp2->Init.TrimmingValueN = opamp2_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp2->Init.TrimmingValueP = opamp2_trimmingvaluep;
+    }
+    else
+    {
+      /* Write calibration result N */
+      hopamp2->Init.TrimmingValueNLowPower = opamp2_trimmingvaluen;
+      /* Write calibration result P */
+      hopamp2->Init.TrimmingValuePLowPower = opamp2_trimmingvaluep;
+    }
+
+    /* Update OPAMP state */
+    hopamp1->State = HAL_OPAMP_STATE_READY;
+    hopamp2->State = HAL_OPAMP_STATE_READY;
+  }
+  return status;
+}
+
+#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
+
+/**
+  * @}
+  */
+
+/** @defgroup OPAMPEx_Exported_Functions_Group2 Extended Peripheral Control functions 
+ *  @brief   Extended peripheral control functions 
+ *
+@verbatim   
+ ===============================================================================
+             ##### Peripheral Control functions #####
+ ===============================================================================
+    [..]
+      (+) OPAMP unlock. 
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Unlock the selected OPAMP configuration.
+  *         This function must be called only when OPAMP is in state "locked".
+  * @param  hopamp OPAMP handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef* hopamp)
+{
+  HAL_StatusTypeDef status = HAL_OK;
+
+  /* Check the OPAMP handle allocation */
+  /* Check if OPAMP locked */
+  if(hopamp == NULL)
+  {
+    status = HAL_ERROR;
+  }
+  /* Check the OPAMP handle allocation */
+  /* Check if OPAMP locked */
+  else if(hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)
+  {
+    /* Check the parameter */
+    assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance));
+  
+   /* OPAMP state changed to locked */
+    hopamp->State = HAL_OPAMP_STATE_BUSY;
+  }
+  else
+  {
+    status = HAL_ERROR;
+  }
+
+  return status; 
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX || STM32L162xC || STM32L152xC || STM32L151xC */
+
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_opamp_ex.h

@@ -6,36 +6,20 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_HAL_OPAMP_EX_H
+#ifndef STM32L1xx_HAL_OPAMP_EX_H
-#define __STM32L1xx_HAL_OPAMP_EX_H
+#define STM32L1xx_HAL_OPAMP_EX_H
 
 #ifdef __cplusplus
  extern "C" {
@@ -140,13 +124,13 @@
 #define OPAMP_INSTANCE_DECIMAL(__HANDLE__)                                     \
   ( ( ((__HANDLE__)->Instance == OPAMP1)                                       \
     )?                                                                         \
-     ((uint32_t)0)                                                             \
+     ((uint32_t)0UL)                                                             \
      :                                                                         \
      ( ( ((__HANDLE__)->Instance == OPAMP2)                                    \
        )?                                                                      \
-        ((uint32_t)1)                                                          \
+        ((uint32_t)1UL)                                                          \
         :                                                                      \
-        ((uint32_t)2)                                                          \
+        ((uint32_t)2UL)                                                          \
      )                                                                         \
   )
 #else
@@ -159,9 +143,9 @@
 #define OPAMP_INSTANCE_DECIMAL(__HANDLE__)                                     \
   ( ( ((__HANDLE__)->Instance == OPAMP1)                                       \
     )?                                                                         \
-     ((uint32_t)0)                                                             \
+     ((uint32_t)0UL)                                                             \
      :                                                                         \
-     ((uint32_t)1)                                                             \
+     ((uint32_t)1UL)                                                             \
   )
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 
@@ -267,6 +251,6 @@ HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp);
 #endif
 
 
-#endif /* __STM32L1xx_HAL_OPAMP_EX_H */
+#endif /* STM32L1xx_HAL_OPAMP_EX_H */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pcd.h

@@ -0,0 +1,938 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_pcd.h
+  * @author  MCD Application Team
+  * @brief   Header file of PCD HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_PCD_H
+#define STM32L1xx_HAL_PCD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_ll_usb.h"
+
+#if defined (USB)
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup PCD
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup PCD_Exported_Types PCD Exported Types
+  * @{
+  */
+
+/**
+  * @brief  PCD State structure definition
+  */
+typedef enum
+{
+  HAL_PCD_STATE_RESET   = 0x00,
+  HAL_PCD_STATE_READY   = 0x01,
+  HAL_PCD_STATE_ERROR   = 0x02,
+  HAL_PCD_STATE_BUSY    = 0x03,
+  HAL_PCD_STATE_TIMEOUT = 0x04
+} PCD_StateTypeDef;
+
+/* Device LPM suspend state */
+typedef enum
+{
+  LPM_L0 = 0x00, /* on */
+  LPM_L1 = 0x01, /* LPM L1 sleep */
+  LPM_L2 = 0x02, /* suspend */
+  LPM_L3 = 0x03, /* off */
+} PCD_LPM_StateTypeDef;
+
+typedef enum
+{
+  PCD_LPM_L0_ACTIVE = 0x00, /* on */
+  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
+} PCD_LPM_MsgTypeDef;
+
+typedef enum
+{
+  PCD_BCD_ERROR                     = 0xFF,
+  PCD_BCD_CONTACT_DETECTION         = 0xFE,
+  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
+  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
+  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
+  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
+
+} PCD_BCD_MsgTypeDef;
+
+
+
+
+
+typedef USB_TypeDef        PCD_TypeDef;
+typedef USB_CfgTypeDef     PCD_InitTypeDef;
+typedef USB_EPTypeDef      PCD_EPTypeDef;
+
+
+/**
+  * @brief  PCD Handle Structure definition
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+typedef struct __PCD_HandleTypeDef
+#else
+typedef struct
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+{
+  PCD_TypeDef             *Instance;   /*!< Register base address             */
+  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
+  __IO uint8_t            USB_Address; /*!< USB Address                       */
+  PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
+  PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
+  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
+  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
+  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
+  uint32_t                Setup[12];   /*!< Setup packet buffer               */
+  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
+  uint32_t                BESL;
+
+  void                    *pData;      /*!< Pointer to upper stack Handler */
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
+  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
+  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
+  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
+  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
+  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
+  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
+
+  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
+  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
+  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
+  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
+
+  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
+  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+} PCD_HandleTypeDef;
+
+/**
+  * @}
+  */
+
+/* Include PCD HAL Extended module */
+#include "stm32l1xx_hal_pcd_ex.h"
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup PCD_Exported_Constants PCD Exported Constants
+  * @{
+  */
+
+/** @defgroup PCD_Speed PCD Speed
+  * @{
+  */
+#define PCD_SPEED_FULL               USBD_FS_SPEED
+/**
+  * @}
+  */
+
+/** @defgroup PCD_PHY_Module PCD PHY Module
+  * @{
+  */
+#define PCD_PHY_ULPI                 1U
+#define PCD_PHY_EMBEDDED             2U
+#define PCD_PHY_UTMI                 3U
+/**
+  * @}
+  */
+
+/** @defgroup PCD_Error_Code_definition PCD Error Code definition
+  * @brief  PCD Error Code definition
+  * @{
+  */
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macros -----------------------------------------------------------*/
+/** @defgroup PCD_Exported_Macros PCD Exported Macros
+  *  @brief macros to handle interrupts and specific clock configurations
+  * @{
+  */
+
+
+#define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
+#define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
+#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
+#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__)))
+
+#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
+#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
+#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
+#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
+
+#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
+  do { \
+    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
+    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
+  } while(0U)
+
+
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup PCD_Exported_Functions PCD Exported Functions
+  * @{
+  */
+
+/* Initialization/de-initialization functions  ********************************/
+/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
+HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
+
+#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
+/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
+  * @brief  HAL USB OTG PCD Callback ID enumeration definition
+  * @{
+  */
+typedef enum
+{
+  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
+  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
+  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
+  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
+  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
+  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
+  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
+
+  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
+  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
+
+} HAL_PCD_CallbackIDTypeDef;
+/**
+  * @}
+  */
+
+/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
+  * @brief  HAL USB OTG PCD Callback pointer definition
+  * @{
+  */
+
+typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
+typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
+typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
+typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
+typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
+
+/**
+  * @}
+  */
+
+HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
+
+HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
+
+HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
+
+HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
+
+HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
+
+#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/* I/O operation functions  ***************************************************/
+/* Non-Blocking mode: Interrupt */
+/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
+HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
+
+void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
+void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
+
+void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
+void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
+void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
+void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
+/**
+  * @}
+  */
+
+/* Peripheral Control functions  **********************************************/
+/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
+HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
+HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
+HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
+HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
+HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
+uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
+HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
+HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
+/**
+  * @}
+  */
+
+/* Peripheral State functions  ************************************************/
+/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
+  * @{
+  */
+PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup PCD_Private_Constants PCD Private Constants
+  * @{
+  */
+/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
+  * @{
+  */
+
+
+#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
+
+
+/**
+  * @}
+  */
+
+/** @defgroup PCD_EP0_MPS PCD EP0 MPS
+  * @{
+  */
+#define PCD_EP0MPS_64                                                 EP_MPS_64
+#define PCD_EP0MPS_32                                                 EP_MPS_32
+#define PCD_EP0MPS_16                                                 EP_MPS_16
+#define PCD_EP0MPS_08                                                 EP_MPS_8
+/**
+  * @}
+  */
+
+/** @defgroup PCD_ENDP PCD ENDP
+  * @{
+  */
+#define PCD_ENDP0                                                     0U
+#define PCD_ENDP1                                                     1U
+#define PCD_ENDP2                                                     2U
+#define PCD_ENDP3                                                     3U
+#define PCD_ENDP4                                                     4U
+#define PCD_ENDP5                                                     5U
+#define PCD_ENDP6                                                     6U
+#define PCD_ENDP7                                                     7U
+/**
+  * @}
+  */
+
+/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
+  * @{
+  */
+#define PCD_SNG_BUF                                                   0U
+#define PCD_DBL_BUF                                                   1U
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup PCD_Private_Macros PCD Private Macros
+  * @{
+  */
+
+/********************  Bit definition for USB_COUNTn_RX register  *************/
+#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
+#define USB_CNTRX_BLSIZE                      (0x1U << 15)
+
+/* SetENDPOINT */
+#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
+
+/* GetENDPOINT */
+#define PCD_GET_ENDPOINT(USBx, bEpNum)            (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
+
+/* ENDPOINT transfer */
+#define USB_EP0StartXfer                          USB_EPStartXfer
+
+/**
+  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wType Endpoint Type.
+  * @retval None
+  */
+#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
+                                             ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
+
+/**
+  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval Endpoint Type
+  */
+#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
+
+/**
+  * @brief free buffer used from the application realizing it to the line
+  *         toggles bit SW_BUF in the double buffered endpoint register
+  * @param USBx USB device.
+  * @param   bEpNum, bDir
+  * @retval None
+  */
+#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
+  if ((bDir) == 0U) \
+  { \
+    /* OUT double buffered endpoint */ \
+    PCD_TX_DTOG((USBx), (bEpNum)); \
+  } \
+  else if ((bDir) == 1U) \
+  { \
+    /* IN double buffered endpoint */ \
+    PCD_RX_DTOG((USBx), (bEpNum)); \
+  } \
+} while(0)
+
+/**
+  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wState new state
+  * @retval None
+  */
+#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
+   uint16_t _wRegVal; \
+   \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
+   /* toggle first bit ? */ \
+   if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
+   { \
+      _wRegVal ^= USB_EPTX_DTOG1; \
+   } \
+   /* toggle second bit ?  */ \
+   if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
+   { \
+      _wRegVal ^= USB_EPTX_DTOG2; \
+   } \
+   PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_SET_EP_TX_STATUS */
+
+/**
+  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wState new state
+  * @retval None
+  */
+#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
+    /* toggle first bit ? */ \
+    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
+    { \
+       _wRegVal ^= USB_EPRX_DTOG1; \
+    } \
+    /* toggle second bit ? */ \
+    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
+    { \
+       _wRegVal ^= USB_EPRX_DTOG2; \
+    } \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_SET_EP_RX_STATUS */
+
+/**
+  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wStaterx new state.
+  * @param  wStatetx new state.
+  * @retval None
+  */
+#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
+    /* toggle first bit ? */ \
+    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
+    { \
+      _wRegVal ^= USB_EPRX_DTOG1; \
+    } \
+    /* toggle second bit ? */ \
+    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
+    { \
+      _wRegVal ^= USB_EPRX_DTOG2; \
+    } \
+    /* toggle first bit ? */ \
+    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
+    { \
+      _wRegVal ^= USB_EPTX_DTOG1; \
+    } \
+    /* toggle second bit ?  */ \
+    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
+    { \
+      _wRegVal ^= USB_EPTX_DTOG2; \
+    } \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_SET_EP_TXRX_STATUS */
+
+/**
+  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
+  *         /STAT_RX[1:0])
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval status
+  */
+#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
+#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
+
+/**
+  * @brief  sets directly the VALID tx/rx-status into the endpoint register
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
+#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
+
+/**
+  * @brief  checks stall condition in an endpoint.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval TRUE = endpoint in stall condition.
+  */
+#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
+#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
+
+/**
+  * @brief  set & clear EP_KIND bit.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_SET_EP_KIND(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
+  } while(0) /* PCD_SET_EP_KIND */
+
+#define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_CLEAR_EP_KIND */
+
+/**
+  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
+#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
+
+/**
+  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
+#define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
+
+/**
+  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_CLEAR_RX_EP_CTR */
+
+#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
+  } while(0) /* PCD_CLEAR_TX_EP_CTR */
+
+/**
+  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_RX_DTOG(USBx, bEpNum) do { \
+    uint16_t _wEPVal; \
+    \
+    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
+  } while(0) /* PCD_RX_DTOG */
+
+#define PCD_TX_DTOG(USBx, bEpNum) do { \
+    uint16_t _wEPVal; \
+    \
+    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
+  } while(0) /* PCD_TX_DTOG */
+/**
+  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
+    \
+    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
+    { \
+      PCD_RX_DTOG((USBx), (bEpNum)); \
+    } \
+  } while(0) /* PCD_CLEAR_RX_DTOG */
+
+#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
+    \
+    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
+    { \
+      PCD_TX_DTOG((USBx), (bEpNum)); \
+    } \
+  } while(0) /* PCD_CLEAR_TX_DTOG */
+
+/**
+  * @brief  Sets address in an endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  bAddr Address.
+  * @retval None
+  */
+#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
+    uint16_t _wRegVal; \
+    \
+    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
+    \
+    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
+  } while(0) /* PCD_SET_EP_ADDRESS */
+
+/**
+  * @brief  Gets address in an endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
+
+#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
+#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
+
+/**
+  * @brief  sets address of the tx/rx buffer.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wAddr address to be set (must be word aligned).
+  * @retval None
+  */
+#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
+  __IO uint16_t *_wRegVal; \
+  uint32_t _wRegBase = (uint32_t)USBx; \
+  \
+  _wRegBase += (uint32_t)(USBx)->BTABLE; \
+  _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
+  *_wRegVal = ((wAddr) >> 1) << 1; \
+} while(0) /* PCD_SET_EP_TX_ADDRESS */
+
+#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
+  __IO uint16_t *_wRegVal; \
+  uint32_t _wRegBase = (uint32_t)USBx; \
+  \
+  _wRegBase += (uint32_t)(USBx)->BTABLE; \
+  _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
+  *_wRegVal = ((wAddr) >> 1) << 1; \
+} while(0) /* PCD_SET_EP_RX_ADDRESS */
+
+/**
+  * @brief  Gets address of the tx/rx buffer.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval address of the buffer.
+  */
+#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
+#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
+
+/**
+  * @brief  Sets counter of rx buffer with no. of blocks.
+  * @param  pdwReg Register pointer
+  * @param  wCount Counter.
+  * @param  wNBlocks no. of Blocks.
+  * @retval None
+  */
+#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
+    (wNBlocks) = (wCount) >> 5; \
+    if (((wCount) & 0x1fU) == 0U) \
+    { \
+      (wNBlocks)--; \
+    } \
+    *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
+  } while(0) /* PCD_CALC_BLK32 */
+
+#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
+    (wNBlocks) = (wCount) >> 1; \
+    if (((wCount) & 0x1U) != 0U) \
+    { \
+      (wNBlocks)++; \
+    } \
+    *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
+  } while(0) /* PCD_CALC_BLK2 */
+
+#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount)  do { \
+    uint32_t wNBlocks; \
+    if ((wCount) == 0U) \
+    { \
+      *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
+      *(pdwReg) |= USB_CNTRX_BLSIZE; \
+    } \
+    else if((wCount) <= 62U) \
+    { \
+      PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
+    } \
+    else \
+    { \
+      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
+    } \
+  } while(0) /* PCD_SET_EP_CNT_RX_REG */
+
+#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
+     uint32_t _wRegBase = (uint32_t)(USBx); \
+     __IO uint16_t *pdwReg; \
+     \
+    _wRegBase += (uint32_t)(USBx)->BTABLE; \
+    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
+    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
+  } while(0)
+
+/**
+  * @brief  sets counter for the tx/rx buffer.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wCount Counter value.
+  * @retval None
+  */
+#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
+    uint32_t _wRegBase = (uint32_t)(USBx); \
+    __IO uint16_t *_wRegVal; \
+    \
+    _wRegBase += (uint32_t)(USBx)->BTABLE; \
+    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
+    *_wRegVal = (uint16_t)(wCount); \
+} while(0)
+
+#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
+    uint32_t _wRegBase = (uint32_t)(USBx); \
+    __IO uint16_t *_wRegVal; \
+    \
+    _wRegBase += (uint32_t)(USBx)->BTABLE; \
+    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
+    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
+} while(0)
+
+/**
+  * @brief  gets counter of the tx buffer.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval Counter value
+  */
+#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
+#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
+
+/**
+  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wBuf0Addr buffer 0 address.
+  * @retval Counter value
+  */
+#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
+    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
+  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
+#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
+    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
+  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
+
+/**
+  * @brief  Sets addresses in a double buffer endpoint.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  wBuf0Addr: buffer 0 address.
+  * @param  wBuf1Addr = buffer 1 address.
+  * @retval None
+  */
+#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
+    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
+    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
+  } while(0) /* PCD_SET_EP_DBUF_ADDR */
+
+/**
+  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
+#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
+
+/**
+  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
+  *         EP_DBUF_IN  = IN
+  * @param  wCount: Counter value
+  * @retval None
+  */
+#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
+    if ((bDir) == 0U) \
+      /* OUT endpoint */ \
+    { \
+      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
+    } \
+    else \
+    { \
+      if ((bDir) == 1U) \
+      { \
+        /* IN endpoint */ \
+        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
+      } \
+    } \
+  } while(0) /* SetEPDblBuf0Count*/
+
+#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
+    uint32_t _wBase = (uint32_t)(USBx); \
+    __IO uint16_t *_wEPRegVal; \
+    \
+    if ((bDir) == 0U) \
+    { \
+      /* OUT endpoint */ \
+      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
+    } \
+    else \
+    { \
+      if ((bDir) == 1U) \
+      { \
+        /* IN endpoint */ \
+        _wBase += (uint32_t)(USBx)->BTABLE; \
+        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
+        *_wEPRegVal = (uint16_t)(wCount); \
+      } \
+    } \
+  } while(0) /* SetEPDblBuf1Count */
+
+#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
+    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
+    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
+  } while(0) /* PCD_SET_EP_DBUF_CNT */
+
+/**
+  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpNum Endpoint Number.
+  * @retval None
+  */
+#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
+#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
+
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* defined (USB) */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L1xx_HAL_PCD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pcd_ex.c

@@ -0,0 +1,189 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_pcd_ex.c
+  * @author  MCD Application Team
+  * @brief   PCD Extended HAL module driver.
+  *          This file provides firmware functions to manage the following
+  *          functionalities of the USB Peripheral Controller:
+  *           + Extended features functions
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup PCDEx PCDEx
+  * @brief PCD Extended HAL module driver
+  * @{
+  */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+
+#if defined (USB)
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
+  * @{
+  */
+
+/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
+  * @brief    PCDEx control functions
+  *
+@verbatim
+ ===============================================================================
+                 ##### Extended features functions #####
+ ===============================================================================
+    [..]  This section provides functions allowing to:
+      (+) Update FIFO configuration
+
+@endverbatim
+  * @{
+  */
+
+/**
+  * @brief  Configure PMA for EP
+  * @param  hpcd  Device instance
+  * @param  ep_addr endpoint address
+  * @param  ep_kind endpoint Kind
+  *                  USB_SNG_BUF: Single Buffer used
+  *                  USB_DBL_BUF: Double Buffer used
+  * @param  pmaadress: EP address in The PMA: In case of single buffer endpoint
+  *                   this parameter is 16-bit value providing the address
+  *                   in PMA allocated to endpoint.
+  *                   In case of double buffer endpoint this parameter
+  *                   is a 32-bit value providing the endpoint buffer 0 address
+  *                   in the LSB part of 32-bit value and endpoint buffer 1 address
+  *                   in the MSB part of 32-bit value.
+  * @retval HAL status
+  */
+
+HAL_StatusTypeDef  HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
+                                       uint16_t ep_addr,
+                                       uint16_t ep_kind,
+                                       uint32_t pmaadress)
+{
+  PCD_EPTypeDef *ep;
+
+  /* initialize ep structure*/
+  if ((0x80U & ep_addr) == 0x80U)
+  {
+    ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
+  }
+  else
+  {
+    ep = &hpcd->OUT_ep[ep_addr];
+  }
+
+  /* Here we check if the endpoint is single or double Buffer*/
+  if (ep_kind == PCD_SNG_BUF)
+  {
+    /* Single Buffer */
+    ep->doublebuffer = 0U;
+    /* Configure the PMA */
+    ep->pmaadress = (uint16_t)pmaadress;
+  }
+  else /* USB_DBL_BUF */
+  {
+    /* Double Buffer Endpoint */
+    ep->doublebuffer = 1U;
+    /* Configure the PMA */
+    ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
+    ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Software Device Connection,
+  *         this function is not required by USB OTG FS peripheral, it is used
+  *         only by USB Device FS peripheral.
+  * @param  hpcd: PCD handle
+  * @param  state: connection state (0 : disconnected / 1: connected)
+  * @retval None
+  */
+__weak void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hpcd);
+  UNUSED(state);
+  /* NOTE : This function Should not be modified, when the callback is needed,
+            the HAL_PCDEx_SetConnectionState could be implemented in the user file
+   */
+}
+
+
+/**
+  * @brief  Send LPM message to user layer callback.
+  * @param  hpcd PCD handle
+  * @param  msg LPM message
+  * @retval HAL status
+  */
+__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hpcd);
+  UNUSED(msg);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_PCDEx_LPM_Callback could be implemented in the user file
+   */
+}
+
+/**
+  * @brief  Send BatteryCharging message to user layer callback.
+  * @param  hpcd PCD handle
+  * @param  msg LPM message
+  * @retval HAL status
+  */
+__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hpcd);
+  UNUSED(msg);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_PCDEx_BCD_Callback could be implemented in the user file
+   */
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* defined (USB) */
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pcd_ex.h

@@ -0,0 +1,86 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_pcd_ex.h
+  * @author  MCD Application Team
+  * @brief   Header file of PCD HAL Extension module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_PCD_EX_H
+#define STM32L1xx_HAL_PCD_EX_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+#if defined (USB)
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup PCDEx
+  * @{
+  */
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
+  * @{
+  */
+/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
+  * @{
+  */
+
+
+
+HAL_StatusTypeDef  HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
+                                       uint16_t ep_addr,
+                                       uint16_t ep_kind,
+                                       uint32_t pmaadress);
+
+void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
+
+void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);
+void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* defined (USB) */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* STM32L1xx_HAL_PCD_EX_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr.c

@@ -12,29 +12,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -345,7 +329,7 @@ void HAL_PWR_DisableBkUpAccess(void)
 
 /**
   * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
-  * @param  sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
+  * @param  sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
   *         information for the PVD.
   * @note   Refer to the electrical characteristics of your device datasheet for
   *         more details about the voltage threshold corresponding to each

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -247,7 +231,7 @@ typedef struct
   */
 
 /** @brief  macros configure the main internal regulator output voltage.
-  * @param  __REGULATOR__: specifies the regulator output voltage to achieve
+  * @param  __REGULATOR__ specifies the regulator output voltage to achieve
   *         a tradeoff between performance and power consumption when the device does
   *         not operate at the maximum frequency (refer to the datasheets for more details).
   *          This parameter can be one of the following values:
@@ -262,7 +246,7 @@ typedef struct
 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
 
 /** @brief  Check PWR flag is set or not.
-  * @param  __FLAG__: specifies the flag to check.
+  * @param  __FLAG__ specifies the flag to check.
   *           This parameter can be one of the following values:
   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
   *                  was received from the WKUP pin or from the RTC alarm (Alarm B),
@@ -290,7 +274,7 @@ typedef struct
 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 
 /** @brief  Clear the PWR's pending flags.
-  * @param  __FLAG__: specifies the flag to clear.
+  * @param  __FLAG__ specifies the flag to clear.
   *          This parameter can be one of the following values:
   *            @arg PWR_FLAG_WU: Wake Up flag
   *            @arg PWR_FLAG_SB: StandBy flag

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr_ex.c

@@ -11,29 +11,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_pwr_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc.c

@@ -49,29 +49,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright(c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -92,21 +76,6 @@
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/** @defgroup RCC_Private_Constants RCC Private Constants
- * @{
- */
-/* Bits position in  in the CFGR register */
-#define RCC_CFGR_PLLMUL_BITNUMBER         POSITION_VAL(RCC_CFGR_PLLMUL)
-#define RCC_CFGR_PLLDIV_BITNUMBER         POSITION_VAL(RCC_CFGR_PLLDIV)
-#define RCC_CFGR_HPRE_BITNUMBER           POSITION_VAL(RCC_CFGR_HPRE)
-#define RCC_CFGR_PPRE1_BITNUMBER          POSITION_VAL(RCC_CFGR_PPRE1)
-#define RCC_CFGR_PPRE2_BITNUMBER          POSITION_VAL(RCC_CFGR_PPRE2)
-/* Bits position in  in the ICSCR register */
-#define RCC_ICSCR_MSIRANGE_BITNUMBER      POSITION_VAL(RCC_ICSCR_MSIRANGE)
-#define RCC_ICSCR_MSITRIM_BITNUMBER       POSITION_VAL(RCC_ICSCR_MSITRIM)
-/**
-  * @}
-  */
 /* Private macro -------------------------------------------------------------*/
 /** @defgroup RCC_Private_Macros RCC Private Macros
   * @{
@@ -254,32 +223,88 @@ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange);
   * @note   This function does not modify the configuration of the
   *            - Peripheral clocks
   *            - LSI, LSE and RTC clocks
-  * @retval None
+  * @retval HAL status
   */
-void HAL_RCC_DeInit(void)
+HAL_StatusTypeDef HAL_RCC_DeInit(void)
 {
+  uint32_t tickstart;
+  HAL_StatusTypeDef status;
+
+  /* Set MSIClockRange, HSITRIM and MSITRIM bits to the reset values */
+  MODIFY_REG(RCC->ICSCR, (RCC_ICSCR_MSITRIM | RCC_ICSCR_HSITRIM | RCC_ICSCR_MSIRANGE), \
+            ((RCC_MSICALIBRATION_DEFAULT << RCC_ICSCR_MSITRIM_Pos) | (RCC_HSICALIBRATION_DEFAULT << RCC_ICSCR_HSITRIM_Pos) | RCC_ICSCR_MSIRANGE_5));
+
   /* Set MSION bit */
   SET_BIT(RCC->CR, RCC_CR_MSION);
 
+  /* Get Start Tick*/
+  tickstart = HAL_GetTick();
+
+  /* Wait till MSI is ready */
+  while (READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U)
+  {
+    if ((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
+    {
+      return HAL_TIMEOUT;
+    }
+  }
+
   /* Switch SYSCLK to MSI*/
   CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW);
 
-  /* Reset HSION, HSEON, CSSON, HSEBYP & PLLON bits */
+  /* Wait till MSI as SYSCLK status is ready */
-  CLEAR_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON | RCC_CR_HSEBYP);
+  while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != 0U)
+  {
+    if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
+    {
+      return HAL_TIMEOUT;
+    }
+  }
+
+  /* Update the SystemCoreClock global variable */
+  SystemCoreClock = MSI_VALUE;
+
+  /* Configure the source of time base considering new system clock settings  */
+  status = HAL_InitTick(uwTickPrio);
+  if(status != HAL_OK)
+  {
+    return status;
+  }
+
+  /* Reset HSION, HSEON, CSSON & PLLON bits */
+  CLEAR_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON);
+  /* Reset HSEBYP bit */
+  CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
+
+  /* Get Start Tick*/
+  tickstart = HAL_GetTick();
+
+  /* Wait till PLL is not ready */
+  while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
+  {
+    if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+    {
+      return HAL_TIMEOUT;
+    }
+  }
+
   /* Reset CFGR register */
   CLEAR_REG(RCC->CFGR);
 
-  /* Set MSIClockRange & MSITRIM[4:0] bits to the reset value */
-  MODIFY_REG(RCC->ICSCR, (RCC_ICSCR_MSIRANGE | RCC_ICSCR_MSITRIM), ((0U << RCC_ICSCR_MSITRIM_BITNUMBER) | RCC_ICSCR_MSIRANGE_5));
-  
-  /* Set HSITRIM bits to the reset value */
-  MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (0x10U << POSITION_VAL(RCC_ICSCR_HSITRIM)));
-  
   /* Disable all interrupts */
   CLEAR_REG(RCC->CIR);
 
-  /* Update the SystemCoreClock global variable */
+  /* Clear all flags */
-  SystemCoreClock = MSI_VALUE;
+#if defined(RCC_LSECSS_SUPPORT)
+  WRITE_REG(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR_PLLRDYC | RCC_CIR_MSIRDYC |  RCC_CIR_LSECSSC | RCC_CIR_CSSC);
+#else
+  WRITE_REG(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR_PLLRDYC | RCC_CIR_MSIRDYC |  RCC_CIR_CSSC);
+#endif
+
+  /* Clear all reset flags */
+  SET_BIT(RCC->CSR, RCC_CSR_RMVF);
+
+  return HAL_OK;
 }
 
 /**
@@ -298,12 +323,21 @@ void HAL_RCC_DeInit(void)
   */
 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
-   uint32_t tickstart = 0U;
+  uint32_t tickstart;
+  HAL_StatusTypeDef status;
+  uint32_t sysclk_source, pll_config;
 
   /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
+  if(RCC_OscInitStruct == NULL)
+  {
+    return HAL_ERROR;
+  }
+
   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 
+  sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
+  pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
+
   /*------------------------------- HSE Configuration ------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
   {
@@ -311,10 +345,10 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 
     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
+    if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
+       || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
     {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
       {
         return HAL_ERROR;
       }
@@ -324,7 +358,6 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       /* Set the new HSE configuration ---------------------------------------*/
       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 
-
       /* Check the HSE State */
       if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
       {
@@ -332,7 +365,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till HSE is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
         {
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
           {
@@ -346,7 +379,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till HSE is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
         {
            if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
           {
@@ -364,11 +397,11 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 
     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
+    if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
+       || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
     {
       /* When HSI is used as system clock it will not disabled */
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
       {
         return HAL_ERROR;
       }
@@ -391,7 +424,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till HSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
           {
@@ -411,7 +444,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till HSI is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
           {
@@ -425,9 +458,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
   {
     /* When the MSI is used as system clock it will not be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) )
+    if(sysclk_source == RCC_CFGR_SWS_MSI)
     {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
+      if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
       {
         return HAL_ERROR;
       }
@@ -470,11 +503,15 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         }
 
         /* Update the SystemCoreClock global variable */
-        SystemCoreClock =  (32768U * (1U << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_BITNUMBER) + 1U))) 
+        SystemCoreClock =  (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
-                           >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_BITNUMBER)];
+                           >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
 
         /* Configure the source of time base considering new system clocks settings*/
-        HAL_InitTick (TICK_INT_PRIORITY);
+        status = HAL_InitTick(uwTickPrio);
+        if(status != HAL_OK)
+        {
+          return status;
+        }
       }
     }
     else
@@ -492,7 +529,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till MSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
           {
@@ -518,7 +555,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till MSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
           {
@@ -544,7 +581,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       tickstart = HAL_GetTick();
 
       /* Wait till LSI is ready */
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
         {
@@ -561,7 +598,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       tickstart = HAL_GetTick();
 
       /* Wait till LSI is disabled */
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
         {
@@ -612,7 +649,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       tickstart = HAL_GetTick();
 
       /* Wait till LSE is ready */
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
         {
@@ -626,7 +663,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       tickstart = HAL_GetTick();
 
       /* Wait till LSE is disabled */
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
         {
@@ -648,7 +685,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
   {
     /* Check if the PLL is used as system clock or not */
-    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
+    if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
     {
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
       {
@@ -664,7 +701,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till PLL is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
           {
@@ -683,7 +720,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till PLL is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
           {
@@ -700,7 +737,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         tickstart = HAL_GetTick();
 
         /* Wait till PLL is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
           {
@@ -711,21 +748,25 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     }
     else
     {
-      /* MBED patch - ST internal ticket 42806 */
+      /* Check if there is a request to disable the PLL used as System clock source */
-      if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) {
+      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
+      {
         return HAL_ERROR;
       }
+      else
+      {
+        /* Do not return HAL_ERROR if request repeats the current configuration */
+        pll_config = RCC->CFGR;
+        if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+           (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
+           (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV))
+        {
+          return HAL_ERROR;
+        }
+      }
+    }
+  }
 
-      if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV) {
-        return HAL_ERROR;
-      }
-
-      if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) {
-        return HAL_ERROR;
-      }
-      /* MBED patch - ST internal ticket 42806 */
-    }
-  }
   return HAL_OK;
 }
 
@@ -757,11 +798,15 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
   */
 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
-  uint32_t tickstart = 0U;
+  uint32_t tickstart;
+  HAL_StatusTypeDef status;
 
   /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
+  if(RCC_ClkInitStruct == NULL)
-  assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
+  {
+    return HAL_ERROR;
+  }
+
   assert_param(IS_FLASH_LATENCY(FLatency));
 
   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
@@ -769,14 +814,14 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
   (HCLK) and the supply voltage of the device. */
 
   /* Increasing the number of wait states because of higher CPU frequency */
-  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
+  if(FLatency > __HAL_FLASH_GET_LATENCY())
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
+    if(__HAL_FLASH_GET_LATENCY() != FLatency)
     {
       return HAL_ERROR;
     }
@@ -798,7 +843,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
     {
       /* Check the HSE ready flag */
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
       {
         return HAL_ERROR;
       }
@@ -807,7 +852,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
     {
       /* Check the PLL ready flag */
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
       {
         return HAL_ERROR;
       }
@@ -816,7 +861,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
     {
       /* Check the HSI ready flag */
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
       {
         return HAL_ERROR;
       }
@@ -825,7 +870,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
     else
     {
       /* Check the MSI ready flag */
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
+      if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
       {
         return HAL_ERROR;
       }
@@ -877,14 +922,14 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
     }
   }
   /* Decreasing the number of wait states because of lower CPU frequency */
-  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
+  if(FLatency < __HAL_FLASH_GET_LATENCY())
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
+    if(__HAL_FLASH_GET_LATENCY() != FLatency)
     {
       return HAL_ERROR;
     }
@@ -905,12 +950,12 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, ui
   }
 
   /* Update the SystemCoreClock global variable */
-  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
+  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 
   /* Configure the source of time base considering new system clocks settings*/
-  HAL_InitTick (TICK_INT_PRIORITY);
+  status = HAL_InitTick(uwTickPrio);
 
-  return HAL_OK;
+  return status;
 }
 
 /**
@@ -1037,8 +1082,7 @@ void HAL_RCC_DisableCSS(void)
   */
 uint32_t HAL_RCC_GetSysClockFreq(void)
 {
-  uint32_t tmpreg = 0U, pllm = 0U, plld = 0U, pllvco = 0U, msiclkrange = 0U;
+  uint32_t tmpreg, pllm, plld, pllvco, msiclkrange, sysclockfreq;
-  uint32_t sysclockfreq = 0U;
 
   tmpreg = RCC->CFGR;
 
@@ -1057,17 +1101,17 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
     }
     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
     {
-      pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
+      pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos];
-      plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_BITNUMBER) + 1U;
+      plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U;
       if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
       {
         /* HSE used as PLL clock source */
-        pllvco = (HSE_VALUE * pllm) / plld;
+        pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld);
       }
       else
       {
         /* HSI used as PLL clock source */
-        pllvco = (HSI_VALUE * pllm) / plld;
+        pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld);
       }
       sysclockfreq = pllvco;
       break;
@@ -1075,8 +1119,8 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
     case RCC_SYSCLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
     default: /* MSI used as system clock */
     {
-      msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_BITNUMBER;
+      msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos;
-      sysclockfreq = (32768U * (1U << (msiclkrange + 1U)));
+      sysclockfreq = (32768U * (1UL << (msiclkrange + 1U)));
       break;
     }
   }
@@ -1106,7 +1150,7 @@ uint32_t HAL_RCC_GetHCLKFreq(void)
 uint32_t HAL_RCC_GetPCLK1Freq(void)
 {
   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITNUMBER]);
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
 }
 
 /**
@@ -1118,7 +1162,7 @@ uint32_t HAL_RCC_GetPCLK1Freq(void)
 uint32_t HAL_RCC_GetPCLK2Freq(void)
 {
   /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_BITNUMBER]);
+  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
 }
 
 /**
@@ -1131,7 +1175,7 @@ uint32_t HAL_RCC_GetPCLK2Freq(void)
 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
   /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
+  assert_param(RCC_OscInitStruct != (void *)NULL);
 
   /* Set all possible values for the Oscillator type parameter ---------------*/
   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI  \
@@ -1162,7 +1206,7 @@ void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
   }
 
-  RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> POSITION_VAL(RCC_ICSCR_HSITRIM));
+  RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_Pos);
 
   /* Get the MSI configuration -----------------------------------------------*/
   if((RCC->CR &RCC_CR_MSION) == RCC_CR_MSION)
@@ -1174,7 +1218,7 @@ void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
   }
 
-  RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSITRIM) >> RCC_ICSCR_MSITRIM_BITNUMBER);
+  RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSITRIM) >> RCC_ICSCR_MSITRIM_Pos);
   RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSIRANGE));
 
   /* Get the LSE configuration -----------------------------------------------*/
@@ -1227,8 +1271,8 @@ void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
 {
   /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
+  assert_param(RCC_ClkInitStruct != (void *)NULL);
-  assert_param(pFLatency != NULL);
+  assert_param(pFLatency != (void *)NULL);
 
   /* Set all possible values for the Clock type parameter --------------------*/
   RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
@@ -1246,7 +1290,7 @@ void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pF
   RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
 
   /* Get the Flash Wait State (Latency) configuration ------------------------*/
-  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 
+  *pFLatency = __HAL_FLASH_GET_LATENCY();
 }
 
 /**
@@ -1298,7 +1342,7 @@ __weak void HAL_RCC_CSSCallback(void)
   */
 static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange)
 {
-  uint32_t vos = 0U;
+  uint32_t vos;
   uint32_t latency = FLASH_LATENCY_0;  /* default value 0WS */
 
   /* HCLK can reach 4 MHz only if AHB prescaler = 1 */
@@ -1326,7 +1370,7 @@ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange)
 
   /* Check that the new number of wait states is taken into account to access the Flash
      memory by reading the FLASH_ACR register */
-  if((FLASH->ACR & FLASH_ACR_LATENCY) != latency)
+  if(__HAL_FLASH_GET_LATENCY() != latency)
   {
     return HAL_ERROR;
   }

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright(c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -97,44 +81,44 @@
 
 /* --- CR Register ---*/
 /* Alias word address of HSION bit */
-#define RCC_HSION_BIT_NUMBER      POSITION_VAL(RCC_CR_HSION)
+#define RCC_HSION_BIT_NUMBER      RCC_CR_HSION_Pos
 #define RCC_CR_HSION_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_HSION_BIT_NUMBER * 4U)))
 /* Alias word address of MSION bit */
-#define RCC_MSION_BIT_NUMBER      POSITION_VAL(RCC_CR_MSION)
+#define RCC_MSION_BIT_NUMBER      RCC_CR_MSION_Pos
 #define RCC_CR_MSION_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_MSION_BIT_NUMBER * 4U)))
 /* Alias word address of HSEON bit */
-#define RCC_HSEON_BIT_NUMBER      POSITION_VAL(RCC_CR_HSEON)
+#define RCC_HSEON_BIT_NUMBER      RCC_CR_HSEON_Pos
 #define RCC_CR_HSEON_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_HSEON_BIT_NUMBER * 4U)))
 /* Alias word address of CSSON bit */
-#define RCC_CSSON_BIT_NUMBER      POSITION_VAL(RCC_CR_CSSON)
+#define RCC_CSSON_BIT_NUMBER      RCC_CR_CSSON_Pos
 #define RCC_CR_CSSON_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_CSSON_BIT_NUMBER * 4U)))
 /* Alias word address of PLLON bit */
-#define RCC_PLLON_BIT_NUMBER      POSITION_VAL(RCC_CR_PLLON)
+#define RCC_PLLON_BIT_NUMBER      RCC_CR_PLLON_Pos
 #define RCC_CR_PLLON_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_PLLON_BIT_NUMBER * 4U)))
 
 /* --- CSR Register ---*/
 /* Alias word address of LSION bit */
-#define RCC_LSION_BIT_NUMBER      POSITION_VAL(RCC_CSR_LSION)
+#define RCC_LSION_BIT_NUMBER      RCC_CSR_LSION_Pos
 #define RCC_CSR_LSION_BB          ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_LSION_BIT_NUMBER * 4U)))
 
 /* Alias word address of RMVF bit */
-#define RCC_RMVF_BIT_NUMBER       POSITION_VAL(RCC_CSR_RMVF)
+#define RCC_RMVF_BIT_NUMBER       RCC_CSR_RMVF_Pos
 #define RCC_CSR_RMVF_BB           ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_RMVF_BIT_NUMBER * 4U)))
 
 /* Alias word address of LSEON bit */
-#define RCC_LSEON_BIT_NUMBER      POSITION_VAL(RCC_CSR_LSEON)
+#define RCC_LSEON_BIT_NUMBER      RCC_CSR_LSEON_Pos
 #define RCC_CSR_LSEON_BB          ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_LSEON_BIT_NUMBER * 4U)))
 
 /* Alias word address of LSEON bit */
-#define RCC_LSEBYP_BIT_NUMBER     POSITION_VAL(RCC_CSR_LSEBYP)
+#define RCC_LSEBYP_BIT_NUMBER     RCC_CSR_LSEBYP_Pos
 #define RCC_CSR_LSEBYP_BB         ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_LSEBYP_BIT_NUMBER * 4U)))
 
 /* Alias word address of RTCEN bit */
-#define RCC_RTCEN_BIT_NUMBER      POSITION_VAL(RCC_CSR_RTCEN)
+#define RCC_RTCEN_BIT_NUMBER      RCC_CSR_RTCEN_Pos
 #define RCC_CSR_RTCEN_BB          ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U)))
 
 /* Alias word address of RTCRST bit */
-#define RCC_RTCRST_BIT_NUMBER     POSITION_VAL(RCC_CSR_RTCRST)
+#define RCC_RTCRST_BIT_NUMBER     RCC_CSR_RTCRST_Pos
 #define RCC_CSR_RTCRST_BB         ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_RTCRST_BIT_NUMBER * 4U)))
 
 /**
@@ -618,22 +602,22 @@ typedef struct
   * @{
   */
 /* Flags in the CR register */
-#define RCC_FLAG_HSIRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | POSITION_VAL(RCC_CR_HSIRDY))) /*!< Internal High Speed clock ready flag */
+#define RCC_FLAG_HSIRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | RCC_CR_HSIRDY_Pos)) /*!< Internal High Speed clock ready flag */
-#define RCC_FLAG_MSIRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | POSITION_VAL(RCC_CR_MSIRDY))) /*!< MSI clock ready flag */
+#define RCC_FLAG_MSIRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | RCC_CR_MSIRDY_Pos)) /*!< MSI clock ready flag */
-#define RCC_FLAG_HSERDY                  ((uint8_t)((CR_REG_INDEX << 5U) | POSITION_VAL(RCC_CR_HSERDY))) /*!< External High Speed clock ready flag */
+#define RCC_FLAG_HSERDY                  ((uint8_t)((CR_REG_INDEX << 5U) | RCC_CR_HSERDY_Pos)) /*!< External High Speed clock ready flag */
-#define RCC_FLAG_PLLRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | POSITION_VAL(RCC_CR_PLLRDY))) /*!< PLL clock ready flag */
+#define RCC_FLAG_PLLRDY                  ((uint8_t)((CR_REG_INDEX << 5U) | RCC_CR_PLLRDY_Pos)) /*!< PLL clock ready flag */
 
 /* Flags in the CSR register */
-#define RCC_FLAG_LSIRDY                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_LSIRDY)))   /*!< Internal Low Speed oscillator Ready */
+#define RCC_FLAG_LSIRDY                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_LSIRDY_Pos))   /*!< Internal Low Speed oscillator Ready */
-#define RCC_FLAG_LSECSS                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_LSECSSD)))  /*!< CSS on LSE failure Detection */
+#define RCC_FLAG_LSECSS                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_LSECSSD_Pos))  /*!< CSS on LSE failure Detection */
-#define RCC_FLAG_OBLRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_OBLRSTF)))  /*!< Options bytes loading reset flag */
+#define RCC_FLAG_OBLRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos))  /*!< Options bytes loading reset flag */
-#define RCC_FLAG_PINRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_PINRSTF)))  /*!< PIN reset flag */
+#define RCC_FLAG_PINRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_PINRSTF_Pos))  /*!< PIN reset flag */
-#define RCC_FLAG_PORRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_PORRSTF)))  /*!< POR/PDR reset flag */
+#define RCC_FLAG_PORRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_PORRSTF_Pos))  /*!< POR/PDR reset flag */
-#define RCC_FLAG_SFTRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_SFTRSTF)))  /*!< Software Reset flag */
+#define RCC_FLAG_SFTRST                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_SFTRSTF_Pos))  /*!< Software Reset flag */
-#define RCC_FLAG_IWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_IWDGRSTF))) /*!< Independent Watchdog reset flag */
+#define RCC_FLAG_IWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_IWDGRSTF_Pos)) /*!< Independent Watchdog reset flag */
-#define RCC_FLAG_WWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_WWDGRSTF))) /*!< Window watchdog reset flag */
+#define RCC_FLAG_WWDGRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_WWDGRSTF_Pos)) /*!< Window watchdog reset flag */
-#define RCC_FLAG_LPWRRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_LPWRRSTF))) /*!< Low-Power reset flag */
+#define RCC_FLAG_LPWRRST                 ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_LPWRRSTF_Pos)) /*!< Low-Power reset flag */
-#define RCC_FLAG_LSERDY                  ((uint8_t)((CSR_REG_INDEX << 5U) | POSITION_VAL(RCC_CSR_LSERDY))) /*!< External Low Speed oscillator Ready */
+#define RCC_FLAG_LSERDY                  ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_LSERDY_Pos)) /*!< External Low Speed oscillator Ready */
 
 /**
   * @}
@@ -1127,22 +1111,22 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOAEN)) != RESET)
+#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOAEN)) != 0U)
-#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOBEN)) != RESET)
+#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOBEN)) != 0U)
-#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) != RESET)
+#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) != 0U)
-#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIODEN)) != RESET)
+#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIODEN)) != 0U)
-#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOHEN)) != RESET)
+#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOHEN)) != 0U)
-#define __HAL_RCC_CRC_IS_CLK_ENABLED()         ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) != RESET)
+#define __HAL_RCC_CRC_IS_CLK_ENABLED()         ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) != 0U)
-#define __HAL_RCC_FLITF_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)
+#define __HAL_RCC_FLITF_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != 0U)
-#define __HAL_RCC_DMA1_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) != RESET)
+#define __HAL_RCC_DMA1_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) != 0U)
-#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOAEN)) == RESET)
+#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOAEN)) == 0U)
-#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOBEN)) == RESET)
+#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOBEN)) == 0U)
-#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) == RESET)
+#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOCEN)) == 0U)
-#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIODEN)) == RESET)
+#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIODEN)) == 0U)
-#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOHEN)) == RESET)
+#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOHEN)) == 0U)
-#define __HAL_RCC_CRC_IS_CLK_DISABLED()        ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) == RESET)
+#define __HAL_RCC_CRC_IS_CLK_DISABLED()        ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) == 0U)
-#define __HAL_RCC_FLITF_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)
+#define __HAL_RCC_FLITF_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == 0U)
-#define __HAL_RCC_DMA1_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) == RESET)
+#define __HAL_RCC_DMA1_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) == 0U)
 
 /**
   * @}
@@ -1156,36 +1140,36 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_TIM2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
+#define __HAL_RCC_TIM2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != 0U)
-#define __HAL_RCC_TIM3_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
+#define __HAL_RCC_TIM3_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != 0U)
-#define __HAL_RCC_TIM4_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
+#define __HAL_RCC_TIM4_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != 0U)
-#define __HAL_RCC_TIM6_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
+#define __HAL_RCC_TIM6_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != 0U)
-#define __HAL_RCC_TIM7_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
+#define __HAL_RCC_TIM7_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != 0U)
-#define __HAL_RCC_WWDG_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)
+#define __HAL_RCC_WWDG_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != 0U)
-#define __HAL_RCC_SPI2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)
+#define __HAL_RCC_SPI2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != 0U)
-#define __HAL_RCC_USART2_IS_CLK_ENABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)
+#define __HAL_RCC_USART2_IS_CLK_ENABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != 0U)
-#define __HAL_RCC_USART3_IS_CLK_ENABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
+#define __HAL_RCC_USART3_IS_CLK_ENABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != 0U)
-#define __HAL_RCC_I2C1_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)
+#define __HAL_RCC_I2C1_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != 0U)
-#define __HAL_RCC_I2C2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)
+#define __HAL_RCC_I2C2_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != 0U)
-#define __HAL_RCC_USB_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_USBEN)) != RESET)
+#define __HAL_RCC_USB_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_USBEN)) != 0U)
-#define __HAL_RCC_PWR_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)
+#define __HAL_RCC_PWR_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != 0U)
-#define __HAL_RCC_DAC_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
+#define __HAL_RCC_DAC_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != 0U)
-#define __HAL_RCC_COMP_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_COMPEN)) != RESET)
+#define __HAL_RCC_COMP_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_COMPEN)) != 0U)
-#define __HAL_RCC_TIM2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
+#define __HAL_RCC_TIM2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == 0U)
-#define __HAL_RCC_TIM3_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
+#define __HAL_RCC_TIM3_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == 0U)
-#define __HAL_RCC_TIM4_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
+#define __HAL_RCC_TIM4_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == 0U)
-#define __HAL_RCC_TIM6_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
+#define __HAL_RCC_TIM6_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == 0U)
-#define __HAL_RCC_TIM7_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
+#define __HAL_RCC_TIM7_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == 0U)
-#define __HAL_RCC_WWDG_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)
+#define __HAL_RCC_WWDG_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == 0U)
-#define __HAL_RCC_SPI2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)
+#define __HAL_RCC_SPI2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == 0U)
-#define __HAL_RCC_USART2_IS_CLK_DISABLED()     ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)
+#define __HAL_RCC_USART2_IS_CLK_DISABLED()     ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == 0U)
-#define __HAL_RCC_USART3_IS_CLK_DISABLED()     ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
+#define __HAL_RCC_USART3_IS_CLK_DISABLED()     ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == 0U)
-#define __HAL_RCC_I2C1_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)
+#define __HAL_RCC_I2C1_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == 0U)
-#define __HAL_RCC_I2C2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)
+#define __HAL_RCC_I2C2_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == 0U)
-#define __HAL_RCC_USB_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_USBEN)) == RESET)
+#define __HAL_RCC_USB_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_USBEN)) == 0U)
-#define __HAL_RCC_PWR_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)
+#define __HAL_RCC_PWR_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == 0U)
-#define __HAL_RCC_DAC_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
+#define __HAL_RCC_DAC_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == 0U)
-#define __HAL_RCC_COMP_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_COMPEN)) == RESET)
+#define __HAL_RCC_COMP_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_COMPEN)) == 0U)
 
 /**
   * @}
@@ -1199,20 +1183,20 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)
+#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != 0U)
-#define __HAL_RCC_TIM9_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)
+#define __HAL_RCC_TIM9_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != 0U)
-#define __HAL_RCC_TIM10_IS_CLK_ENABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
+#define __HAL_RCC_TIM10_IS_CLK_ENABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != 0U)
-#define __HAL_RCC_TIM11_IS_CLK_ENABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)
+#define __HAL_RCC_TIM11_IS_CLK_ENABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != 0U)
-#define __HAL_RCC_ADC1_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
+#define __HAL_RCC_ADC1_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != 0U)
-#define __HAL_RCC_SPI1_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
+#define __HAL_RCC_SPI1_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != 0U)
-#define __HAL_RCC_USART1_IS_CLK_ENABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
+#define __HAL_RCC_USART1_IS_CLK_ENABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != 0U)
-#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()     ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)
+#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()     ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == 0U)
-#define __HAL_RCC_TIM9_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)
+#define __HAL_RCC_TIM9_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == 0U)
-#define __HAL_RCC_TIM10_IS_CLK_DISABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
+#define __HAL_RCC_TIM10_IS_CLK_DISABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == 0U)
-#define __HAL_RCC_TIM11_IS_CLK_DISABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)
+#define __HAL_RCC_TIM11_IS_CLK_DISABLED()      ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == 0U)
-#define __HAL_RCC_ADC1_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
+#define __HAL_RCC_ADC1_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == 0U)
-#define __HAL_RCC_SPI1_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
+#define __HAL_RCC_SPI1_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == 0U)
-#define __HAL_RCC_USART1_IS_CLK_DISABLED()     ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
+#define __HAL_RCC_USART1_IS_CLK_DISABLED()     ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == 0U)
 
 /**
   * @}
@@ -1227,22 +1211,22 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOALPEN)) != RESET)
+#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOALPEN)) != 0U)
-#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOBLPEN)) != RESET)
+#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOBLPEN)) != 0U)
-#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOCLPEN)) != RESET)
+#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOCLPEN)) != 0U)
-#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIODLPEN)) != RESET)
+#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIODLPEN)) != 0U)
-#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOHLPEN)) != RESET)
+#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOHLPEN)) != 0U)
-#define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED()         ((RCC->AHBLPENR & (RCC_AHBLPENR_CRCLPEN)) != RESET)
+#define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED()         ((RCC->AHBLPENR & (RCC_AHBLPENR_CRCLPEN)) != 0U)
-#define __HAL_RCC_FLITF_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_FLITFLPEN)) != RESET)
+#define __HAL_RCC_FLITF_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_FLITFLPEN)) != 0U)
-#define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA1LPEN)) != RESET)
+#define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA1LPEN)) != 0U)
-#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOALPEN)) == RESET)
+#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOALPEN)) == 0U)
-#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOBLPEN)) == RESET)
+#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOBLPEN)) == 0U)
-#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOCLPEN)) == RESET)
+#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOCLPEN)) == 0U)
-#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIODLPEN)) == RESET)
+#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIODLPEN)) == 0U)
-#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOHLPEN)) == RESET)
+#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOHLPEN)) == 0U)
-#define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_CRCLPEN)) == RESET)
+#define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_CRCLPEN)) == 0U)
-#define __HAL_RCC_FLITF_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_FLITFLPEN)) == RESET)
+#define __HAL_RCC_FLITF_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_FLITFLPEN)) == 0U)
-#define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA1LPEN)) == RESET)
+#define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA1LPEN)) == 0U)
 
 /**
   * @}
@@ -1257,36 +1241,36 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) != RESET)
+#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) != 0U)
-#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) != RESET)
+#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) != 0U)
-#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) != RESET)
+#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) != 0U)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) != RESET)
+#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) != 0U)
-#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) != RESET)
+#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) != 0U)
-#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) != RESET)
+#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) != 0U)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) != RESET)
+#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) != 0U)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) != RESET)
+#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) != 0U)
-#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) != RESET)
+#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) != 0U)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) != RESET)
+#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) != 0U)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) != RESET)
+#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) != 0U)
-#define __HAL_RCC_USB_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_USBLPEN)) != RESET)
+#define __HAL_RCC_USB_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_USBLPEN)) != 0U)
-#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) != RESET)
+#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) != 0U)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) != RESET)
+#define __HAL_RCC_DAC_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) != 0U)
-#define __HAL_RCC_COMP_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_COMPLPEN)) != RESET)
+#define __HAL_RCC_COMP_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_COMPLPEN)) != 0U)
-#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) == RESET)
+#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM2LPEN)) == 0U)
-#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) == RESET)
+#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM3LPEN)) == 0U)
-#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) == RESET)
+#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM4LPEN)) == 0U)
-#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) == RESET)
+#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM6LPEN)) == 0U)
-#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) == RESET)
+#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM7LPEN)) == 0U)
-#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) == RESET)
+#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) == 0U)
-#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) == RESET)
+#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI2LPEN)) == 0U)
-#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()     ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) == RESET)
+#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED()     ((RCC->APB1LPENR & (RCC_APB1LPENR_USART2LPEN)) == 0U)
-#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED()     ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) == RESET)
+#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED()     ((RCC->APB1LPENR & (RCC_APB1LPENR_USART3LPEN)) == 0U)
-#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) == RESET)
+#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C1LPEN)) == 0U)
-#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) == RESET)
+#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_I2C2LPEN)) == 0U)
-#define __HAL_RCC_USB_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_USBLPEN)) == RESET)
+#define __HAL_RCC_USB_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_USBLPEN)) == 0U)
-#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) == RESET)
+#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) == 0U)
-#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) == RESET)
+#define __HAL_RCC_DAC_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_DACLPEN)) == 0U)
-#define __HAL_RCC_COMP_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_COMPLPEN)) == RESET)
+#define __HAL_RCC_COMP_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_COMPLPEN)) == 0U)
 
 /**
   * @}
@@ -1301,20 +1285,20 @@ typedef struct
   * @{
   */
 
-#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_SYSCFGLPEN)) != RESET)
+#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_SYSCFGLPEN)) != 0U)
-#define __HAL_RCC_TIM9_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) != RESET)
+#define __HAL_RCC_TIM9_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) != 0U)
-#define __HAL_RCC_TIM10_IS_CLK_SLEEP_ENABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) != RESET)
+#define __HAL_RCC_TIM10_IS_CLK_SLEEP_ENABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) != 0U)
-#define __HAL_RCC_TIM11_IS_CLK_SLEEP_ENABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) != RESET)
+#define __HAL_RCC_TIM11_IS_CLK_SLEEP_ENABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) != 0U)
-#define __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) != RESET)
+#define __HAL_RCC_ADC1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) != 0U)
-#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) != RESET)
+#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) != 0U)
-#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) != RESET)
+#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) != 0U)
-#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED()     ((RCC->APB2LPENR & (RCC_APB2LPENR_SYSCFGLPEN)) == RESET)
+#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED()     ((RCC->APB2LPENR & (RCC_APB2LPENR_SYSCFGLPEN)) == 0U)
-#define __HAL_RCC_TIM9_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) == RESET)
+#define __HAL_RCC_TIM9_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM9LPEN)) == 0U)
-#define __HAL_RCC_TIM10_IS_CLK_SLEEP_DISABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) == RESET)
+#define __HAL_RCC_TIM10_IS_CLK_SLEEP_DISABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM10LPEN)) == 0U)
-#define __HAL_RCC_TIM11_IS_CLK_SLEEP_DISABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) == RESET)
+#define __HAL_RCC_TIM11_IS_CLK_SLEEP_DISABLED()      ((RCC->APB2LPENR & (RCC_APB2LPENR_TIM11LPEN)) == 0U)
-#define __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) == RESET)
+#define __HAL_RCC_ADC1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_ADC1LPEN)) == 0U)
-#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) == RESET)
+#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_SPI1LPEN)) == 0U)
-#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED()     ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) == RESET)
+#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED()     ((RCC->APB2LPENR & (RCC_APB2LPENR_USART1LPEN)) == 0U)
 
 /**
   * @}
@@ -1345,7 +1329,7 @@ typedef struct
   *         This parameter must be a number between 0 and 0x1F.
   */
 #define __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(_HSICALIBRATIONVALUE_) \
-          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (uint32_t)(_HSICALIBRATIONVALUE_) << POSITION_VAL(RCC_ICSCR_HSITRIM)))
+          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (uint32_t)(_HSICALIBRATIONVALUE_) << RCC_ICSCR_HSITRIM_Pos))
 
 /**
   * @}
@@ -1506,7 +1490,7 @@ typedef struct
   *         This parameter must be a number between 0 and 0xFF.
   */
 #define __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(_MSICALIBRATIONVALUE_) \
-          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, (uint32_t)(_MSICALIBRATIONVALUE_) << POSITION_VAL(RCC_ICSCR_MSITRIM)))
+          (MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, (uint32_t)(_MSICALIBRATIONVALUE_) << RCC_ICSCR_MSITRIM_Pos))
 
 /* @brief  Macro to configures the Internal Multi Speed oscillator (MSI) clock range.
   * @note     After restart from Reset or wakeup from STANDBY, the MSI clock is
@@ -1861,7 +1845,7 @@ typedef struct
   */
 
 /* Initialization and de-initialization functions  ******************************/
-void              HAL_RCC_DeInit(void);
+HAL_StatusTypeDef HAL_RCC_DeInit(void);
 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct);
 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency);
 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc_ex.c

@@ -10,29 +10,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright(c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -107,8 +91,8 @@
   */
 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
 {
-  uint32_t tickstart = 0U;
+  uint32_t tickstart;
-  uint32_t temp_reg = 0U;
+  uint32_t temp_reg;
 
   /* Check the parameters */
   assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
@@ -169,12 +153,15 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
 #endif /* LCD */
        )
     { /* Check HSE State */
-      if (((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) && HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
+      if ((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE)
+      {
+        if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
         {
           /* To update HSE divider, first switch-OFF HSE clock oscillator*/
           return HAL_ERROR;
         }
       }
+    }
 
     /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
     temp_reg = (RCC->CSR & RCC_CSR_RTCSEL);
@@ -204,7 +191,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
         tickstart = HAL_GetTick();
 
         /* Wait till LSE is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
         {
           if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
           {
@@ -233,7 +220,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
   */
 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
 {
-  uint32_t srcclk = 0U;
+  uint32_t srcclk;
 
   /* Set all possible values for the extended clock type parameter------------*/
   PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_RTC;
@@ -270,8 +257,8 @@ void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
   */
 uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
 {
-  uint32_t temp_reg = 0U, clkprediv = 0U, frequency = 0U;
+  uint32_t frequency = 0;
-  uint32_t srcclk = 0U;
+  uint32_t srcclk;
 
   /* Check the parameters */
   assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
@@ -283,29 +270,32 @@ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
   case RCC_PERIPHCLK_LCD:
 #endif /* LCD */
     {
-      /* Get RCC CSR configuration ------------------------------------------------------*/
-      temp_reg = RCC->CSR;
-
       /* Get the current RTC source */
       srcclk = __HAL_RCC_GET_RTC_SOURCE();
 
       /* Check if LSE is ready if RTC clock selection is LSE */
-      if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSERDY)))
+      if (srcclk == RCC_RTCCLKSOURCE_LSE)
+      {
+        if (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY))
         {
           frequency = LSE_VALUE;
         }
+      }
       /* Check if LSI is ready if RTC clock selection is LSI */
-      else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSIRDY)))
+      else if (srcclk == RCC_RTCCLKSOURCE_LSI)
+      {
+        if (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))
         {
           frequency = LSI_VALUE;
         }
+      }
       /* Check if HSE is ready and if RTC clock selection is HSE */
-      else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIVX) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
+      else if (srcclk == RCC_RTCCLKSOURCE_HSE_DIVX)
+      {
+        if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
         {
           /* Get the current HSE clock divider */
-        clkprediv = __HAL_RCC_GET_RTC_HSE_PRESCALER();
+          switch (__HAL_RCC_GET_RTC_HSE_PRESCALER())
-
-        switch (clkprediv)
           {
             case RCC_RTC_HSE_DIV_16:  /* HSE DIV16 has been selected */
             {
@@ -329,18 +319,18 @@ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
             }
           }
         }
-      /* Clock not enabled for RTC */
+      }
       else
       {
-        frequency = 0U;
+        /* No clock source, frequency default init at 0 */
       }
       break;
     }
+
   default:
-    {
     break;
   }
-  }
+
   return(frequency);
 }
 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rcc_ex.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright(c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -56,8 +40,6 @@
  * @{
  */
 
-#define LSI_VALUE                  (37000U)  /* ~37kHz */
-
 #if defined(STM32L100xBA) || defined(STM32L151xBA) || defined(STM32L152xBA)\
  || defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC)\
  || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L151xD)\
@@ -66,7 +48,7 @@
  || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
 /* Alias word address of LSECSSON bit */
-#define LSECSSON_BITNUMBER      POSITION_VAL(RCC_CSR_LSECSSON)
+#define LSECSSON_BITNUMBER      RCC_CSR_LSECSSON_Pos
 #define CSR_LSECSSON_BB         ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (LSECSSON_BITNUMBER * 4U)))
 
 #endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX*/
@@ -231,14 +213,14 @@ typedef struct
 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_CRYP_CLK_ENABLE()   do { \
+#define __HAL_RCC_AES_CLK_ENABLE()    do { \
                                         __IO uint32_t tmpreg; \
                                         SET_BIT(RCC->AHBENR, RCC_AHBENR_AESEN);\
                                         /* Delay after an RCC peripheral clock enabling */ \
                                         tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_AESEN);\
                                         UNUSED(tmpreg); \
                                       } while(0U)
-#define __HAL_RCC_CRYP_CLK_DISABLE()    (RCC->AHBENR &= ~(RCC_AHBENR_AESEN))
+#define __HAL_RCC_AES_CLK_DISABLE()    (RCC->AHBENR &= ~(RCC_AHBENR_AESEN))
 
 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */
 
@@ -409,8 +391,8 @@ typedef struct
 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_CRYP_FORCE_RESET()     (RCC->AHBRSTR |= (RCC_AHBRSTR_AESRST))
+#define __HAL_RCC_AES_FORCE_RESET()     (RCC->AHBRSTR |= (RCC_AHBRSTR_AESRST))
-#define __HAL_RCC_CRYP_RELEASE_RESET()   (RCC->AHBRSTR &= ~(RCC_AHBRSTR_AESRST))
+#define __HAL_RCC_AES_RELEASE_RESET()   (RCC->AHBRSTR &= ~(RCC_AHBRSTR_AESRST))
 
 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */
 
@@ -534,8 +516,8 @@ typedef struct
 
 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE()    (RCC->AHBLPENR |= (RCC_AHBLPENR_AESLPEN))
+#define __HAL_RCC_AES_CLK_SLEEP_ENABLE()    (RCC->AHBLPENR |= (RCC_AHBLPENR_AESLPEN))
-#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE()   (RCC->AHBLPENR &= ~(RCC_AHBLPENR_AESLPEN))
+#define __HAL_RCC_AES_CLK_SLEEP_DISABLE()   (RCC->AHBLPENR &= ~(RCC_AHBLPENR_AESLPEN))
 
 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */
 
@@ -637,8 +619,8 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOEEN)) != RESET)
+#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOEEN)) != 0U)
-#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOEEN)) == RESET)
+#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOEEN)) == 0U)
 
 #endif /* STM32L151xB || STM32L152xB || ... || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -646,10 +628,10 @@ typedef struct
  || defined(STM32L152xD) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_GPIOF_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) != RESET)
+#define __HAL_RCC_GPIOF_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) != 0U)
-#define __HAL_RCC_GPIOG_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOGEN)) != RESET)
+#define __HAL_RCC_GPIOG_IS_CLK_ENABLED()       ((RCC->AHBENR & (RCC_AHBENR_GPIOGEN)) != 0U)
-#define __HAL_RCC_GPIOF_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) == RESET)
+#define __HAL_RCC_GPIOF_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOFEN)) == 0U)
-#define __HAL_RCC_GPIOG_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOGEN)) == RESET)
+#define __HAL_RCC_GPIOG_IS_CLK_DISABLED()      ((RCC->AHBENR & (RCC_AHBENR_GPIOGEN)) == 0U)
 
 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -659,23 +641,23 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_DMA2_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_DMA2EN)) != RESET)
+#define __HAL_RCC_DMA2_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_DMA2EN)) != 0U)
-#define __HAL_RCC_DMA2_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_DMA2EN)) == RESET)
+#define __HAL_RCC_DMA2_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_DMA2EN)) == 0U)
 
 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_CRYP_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_AESEN)) != RESET)
+#define __HAL_RCC_AES_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_AESEN)) != 0U)
-#define __HAL_RCC_CRYP_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_AESEN)) == RESET)
+#define __HAL_RCC_AES_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_AESEN)) == 0U)
 
 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
 
-#define __HAL_RCC_FSMC_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_FSMCEN)) != RESET)
+#define __HAL_RCC_FSMC_IS_CLK_ENABLED()        ((RCC->AHBENR & (RCC_AHBENR_FSMCEN)) != 0U)
-#define __HAL_RCC_FSMC_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_FSMCEN)) == RESET)
+#define __HAL_RCC_FSMC_IS_CLK_DISABLED()       ((RCC->AHBENR & (RCC_AHBENR_FSMCEN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 
@@ -685,8 +667,8 @@ typedef struct
  || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_LCD_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_LCDEN)) != RESET)
+#define __HAL_RCC_LCD_IS_CLK_ENABLED()         ((RCC->APB1ENR & (RCC_APB1ENR_LCDEN)) != 0U)
-#define __HAL_RCC_LCD_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_LCDEN)) == RESET)
+#define __HAL_RCC_LCD_IS_CLK_DISABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_LCDEN)) == 0U)
 
 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -695,8 +677,8 @@ typedef struct
  || defined(STM32L152xD) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_TIM5_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)
+#define __HAL_RCC_TIM5_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != 0U)
-#define __HAL_RCC_TIM5_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)
+#define __HAL_RCC_TIM5_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == 0U)
 
 #endif /* STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -706,18 +688,18 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_SPI3_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
+#define __HAL_RCC_SPI3_IS_CLK_ENABLED()        ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != 0U)
-#define __HAL_RCC_SPI3_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
+#define __HAL_RCC_SPI3_IS_CLK_DISABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == 0U)
 
 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_UART4_IS_CLK_ENABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
+#define __HAL_RCC_UART4_IS_CLK_ENABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != 0U)
-#define __HAL_RCC_UART5_IS_CLK_ENABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
+#define __HAL_RCC_UART5_IS_CLK_ENABLED()       ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != 0U)
-#define __HAL_RCC_UART4_IS_CLK_DISABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
+#define __HAL_RCC_UART4_IS_CLK_DISABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == 0U)
-#define __HAL_RCC_UART5_IS_CLK_DISABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
+#define __HAL_RCC_UART5_IS_CLK_DISABLED()      ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -733,8 +715,8 @@ typedef struct
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
 
-#define __HAL_RCC_SDIO_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != RESET)
+#define __HAL_RCC_SDIO_IS_CLK_ENABLED()        ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) != 0U)
-#define __HAL_RCC_SDIO_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == RESET)
+#define __HAL_RCC_SDIO_IS_CLK_DISABLED()       ((RCC->APB2ENR & (RCC_APB2ENR_SDIOEN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 
@@ -758,8 +740,8 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOELPEN)) != RESET)
+#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOELPEN)) != 0U)
-#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOELPEN)) == RESET)
+#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOELPEN)) == 0U)
 
 #endif /* STM32L151xB || STM32L152xB || ... || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -767,10 +749,10 @@ typedef struct
  || defined(STM32L152xD) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOFLPEN)) != RESET)
+#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOFLPEN)) != 0U)
-#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOGLPEN)) != RESET)
+#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOGLPEN)) != 0U)
-#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOFLPEN)) == RESET)
+#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOFLPEN)) == 0U)
-#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOGLPEN)) == RESET)
+#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED()      ((RCC->AHBLPENR & (RCC_AHBLPENR_GPIOGLPEN)) == 0U)
 
 #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -780,23 +762,23 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA2LPEN)) != RESET)
+#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA2LPEN)) != 0U)
-#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA2LPEN)) == RESET)
+#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_DMA2LPEN)) == 0U)
 
 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_CRYP_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_AESLPEN)) != RESET)
+#define __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_AESLPEN)) != 0U)
-#define __HAL_RCC_CRYP_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_AESLPEN)) == RESET)
+#define __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_AESLPEN)) == 0U)
 
 #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
 
-#define __HAL_RCC_FSMC_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_FSMCLPEN)) != RESET)
+#define __HAL_RCC_FSMC_IS_CLK_SLEEP_ENABLED()        ((RCC->AHBLPENR & (RCC_AHBLPENR_FSMCLPEN)) != 0U)
-#define __HAL_RCC_FSMC_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_FSMCLPEN)) == RESET)
+#define __HAL_RCC_FSMC_IS_CLK_SLEEP_DISABLED()       ((RCC->AHBLPENR & (RCC_AHBLPENR_FSMCLPEN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 
@@ -806,8 +788,8 @@ typedef struct
  || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_LCDLPEN)) != RESET)
+#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED()         ((RCC->APB1LPENR & (RCC_APB1LPENR_LCDLPEN)) != 0U)
-#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_LCDLPEN)) == RESET)
+#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_LCDLPEN)) == 0U)
 
 #endif /* STM32L100xB || STM32L152xBA || ... || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -816,8 +798,8 @@ typedef struct
  || defined(STM32L152xD) || defined(STM32L162xCA) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) != RESET)
+#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) != 0U)
-#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) == RESET)
+#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_TIM5LPEN)) == 0U)
 
 #endif /* STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -827,18 +809,18 @@ typedef struct
  || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX)\
  || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) != RESET)
+#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED()        ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) != 0U)
-#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) == RESET)
+#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_SPI3LPEN)) == 0U)
 
 #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)\
  || defined(STM32L151xE) || defined(STM32L151xDX) || defined(STM32L152xE) || defined(STM32L152xDX) || defined(STM32L162xE) || defined(STM32L162xDX)
 
-#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) != RESET)
+#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) != 0U)
-#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) != RESET)
+#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED()       ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) != 0U)
-#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) == RESET)
+#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_UART4LPEN)) == 0U)
-#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) == RESET)
+#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED()      ((RCC->APB1LPENR & (RCC_APB1LPENR_UART5LPEN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 
@@ -854,8 +836,8 @@ typedef struct
 
 #if defined(STM32L151xD) || defined(STM32L152xD) || defined(STM32L162xD)
 
-#define __HAL_RCC_SDIO_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_SDIOLPEN)) != RESET)
+#define __HAL_RCC_SDIO_IS_CLK_SLEEP_ENABLED()        ((RCC->APB2LPENR & (RCC_APB2LPENR_SDIOLPEN)) != 0U)
-#define __HAL_RCC_SDIO_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_SDIOLPEN)) == RESET)
+#define __HAL_RCC_SDIO_IS_CLK_SLEEP_DISABLED()       ((RCC->APB2LPENR & (RCC_APB2LPENR_SDIOLPEN)) == 0U)
 
 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
 

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rtc.h

@@ -6,29 +6,13 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -43,13 +27,12 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32l1xx_hal_def.h"
-#include "stm32l1xx_ll_rtc.h"
 
 /** @addtogroup STM32L1xx_HAL_Driver
   * @{
   */
 
-/** @addtogroup RTC
+/** @defgroup RTC RTC
   * @{
   */
 
@@ -63,11 +46,11 @@
   */
 typedef enum
 {
-  HAL_RTC_STATE_RESET             = 0x00,  /*!< RTC not yet initialized or disabled */
+  HAL_RTC_STATE_RESET             = 0x00U,  /*!< RTC not yet initialized or disabled */
-  HAL_RTC_STATE_READY             = 0x01,  /*!< RTC initialized and ready for use   */
+  HAL_RTC_STATE_READY             = 0x01U,  /*!< RTC initialized and ready for use   */
-  HAL_RTC_STATE_BUSY              = 0x02,  /*!< RTC process is ongoing              */     
+  HAL_RTC_STATE_BUSY              = 0x02U,  /*!< RTC process is ongoing              */
-  HAL_RTC_STATE_TIMEOUT           = 0x03,  /*!< RTC timeout state                   */  
+  HAL_RTC_STATE_TIMEOUT           = 0x03U,  /*!< RTC timeout state                   */
-  HAL_RTC_STATE_ERROR             = 0x04   /*!< RTC error state                     */      
+  HAL_RTC_STATE_ERROR             = 0x04U   /*!< RTC error state                     */
 
 } HAL_RTCStateTypeDef;
 
@@ -95,6 +78,44 @@ typedef struct
                                  This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */
 } RTC_InitTypeDef;
 
+/**
+  * @brief  RTC Time structure definition
+  */
+typedef struct
+{
+  uint8_t Hours;            /*!< Specifies the RTC Time Hour.
+                                 This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected.
+                                 This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected  */
+
+  uint8_t Minutes;          /*!< Specifies the RTC Time Minutes.
+                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
+
+  uint8_t Seconds;          /*!< Specifies the RTC Time Seconds.
+                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
+
+  uint8_t TimeFormat;       /*!< Specifies the RTC AM/PM Time.
+                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */
+
+#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+  uint32_t SubSeconds;     /*!< Specifies the RTC_SSR RTC Sub Second register content.
+                                 This parameter corresponds to a time unit range between [0-1] Second
+                                 with [1 Sec / SecondFraction +1] granularity */
+
+  uint32_t SecondFraction;  /*!< Specifies the range or granularity of Sub Second register content
+                                 corresponding to Synchronous pre-scaler factor value (PREDIV_S)
+                                 This parameter corresponds to a time unit range between [0-1] Second
+                                 with [1 Sec / SecondFraction +1] granularity.
+                                 This field will be used only by HAL_RTC_GetTime function */
+#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+
+  uint32_t DayLightSaving;  /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment.
+                                 This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
+
+  uint32_t StoreOperation;  /*!< Specifies RTC_StoreOperation value to be written in the BCK bit
+                                 in CR register to store the operation.
+                                 This parameter can be a value of @ref RTC_StoreOperation_Definitions */
+} RTC_TimeTypeDef;
+
 /**
   * @brief  RTC Date structure definition
   */
@@ -115,9 +136,39 @@ typedef struct
 } RTC_DateTypeDef;
 
 /**
-  * @brief  Time Handle Structure definition  
+  * @brief  RTC Alarm structure definition
   */
 typedef struct
+{
+  RTC_TimeTypeDef AlarmTime;     /*!< Specifies the RTC Alarm Time members */
+
+  uint32_t AlarmMask;            /*!< Specifies the RTC Alarm Masks.
+                                      This parameter can be a value of @ref RTC_AlarmMask_Definitions */
+
+#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+  uint32_t AlarmSubSecondMask;   /*!< Specifies the RTC Alarm SubSeconds Masks.
+                                      This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */
+#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+
+  uint32_t AlarmDateWeekDaySel;  /*!< Specifies the RTC Alarm is on Date or WeekDay.
+                                      This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
+
+  uint8_t AlarmDateWeekDay;      /*!< Specifies the RTC Alarm Date/WeekDay.
+                                      If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
+                                      If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
+
+  uint32_t Alarm;                /*!< Specifies the alarm .
+                                      This parameter can be a value of @ref RTC_Alarms_Definitions */
+} RTC_AlarmTypeDef;
+
+/**
+  * @brief  RTC Handle Structure definition
+  */
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+typedef struct __RTC_HandleTypeDef
+#else
+typedef struct
+#endif
 {
   RTC_TypeDef                 *Instance;  /*!< Register base address    */
 
@@ -127,8 +178,56 @@ typedef struct
 
   __IO HAL_RTCStateTypeDef    State;      /*!< Time communication state */
 
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+  void (* AlarmAEventCallback)(struct __RTC_HandleTypeDef *hrtc);           /*!< RTC Alarm A Event callback         */
+
+  void (* AlarmBEventCallback)(struct __RTC_HandleTypeDef *hrtc);           /*!< RTC Alarm B Event callback         */
+
+  void (* TimeStampEventCallback)(struct __RTC_HandleTypeDef *hrtc);        /*!< RTC TimeStamp Event callback       */
+
+  void (* WakeUpTimerEventCallback)(struct __RTC_HandleTypeDef *hrtc);      /*!< RTC WakeUpTimer Event callback     */
+
+  void (* Tamper1EventCallback)(struct __RTC_HandleTypeDef *hrtc);          /*!< RTC Tamper 1 Event callback        */
+
+#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+  void (* Tamper2EventCallback)(struct __RTC_HandleTypeDef *hrtc);          /*!< RTC Tamper 2 Event callback        */
+
+  void (* Tamper3EventCallback)(struct __RTC_HandleTypeDef *hrtc);          /*!< RTC Tamper 3 Event callback        */
+#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+
+  void (* MspInitCallback)(struct __RTC_HandleTypeDef *hrtc);               /*!< RTC Msp Init callback              */
+
+  void (* MspDeInitCallback)(struct __RTC_HandleTypeDef *hrtc);             /*!< RTC Msp DeInit callback            */
+
+#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
+
 } RTC_HandleTypeDef;
 
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL LPTIM Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_RTC_ALARM_A_EVENT_CB_ID           = 0x00U,    /*!< RTC Alarm A Event Callback ID      */
+  HAL_RTC_ALARM_B_EVENT_CB_ID           = 0x01U,    /*!< RTC Alarm B Event Callback ID      */
+  HAL_RTC_TIMESTAMP_EVENT_CB_ID         = 0x02U,    /*!< RTC TimeStamp Event Callback ID    */
+  HAL_RTC_WAKEUPTIMER_EVENT_CB_ID       = 0x03U,    /*!< RTC WakeUp Timer Event Callback ID */
+  HAL_RTC_TAMPER1_EVENT_CB_ID           = 0x04U,    /*!< RTC Tamper 1 Callback ID           */
+#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
+  HAL_RTC_TAMPER2_EVENT_CB_ID           = 0x05U,    /*!< RTC Tamper 2 Callback ID           */
+  HAL_RTC_TAMPER3_EVENT_CB_ID           = 0x06U,    /*!< RTC Tamper 3 Callback ID           */
+#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
+  HAL_RTC_MSPINIT_CB_ID                 = 0x0EU,    /*!< RTC Msp Init callback ID           */
+  HAL_RTC_MSPDEINIT_CB_ID               = 0x0FU     /*!< RTC Msp DeInit callback ID         */
+} HAL_RTC_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL RTC Callback pointer definition
+  */
+typedef  void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc);  /*!< pointer to an RTC callback function */
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
@@ -138,15 +237,7 @@ typedef struct
   * @{
   */
 
-/** @defgroup RTC_Timeout_Value Default Timeout Value
+/** @defgroup RTC_Hour_Formats RTC Hour Formats
-  * @{
-  */ 
-#define RTC_TIMEOUT_VALUE  1000
-/**
-  * @}
-  */  
-  
-/** @defgroup RTC_Hour_Formats Hour Formats
   * @{
   */
 #define RTC_HOURFORMAT_24              (0x00000000U)
@@ -158,7 +249,8 @@ typedef struct
   * @}
   */
 
-/** @defgroup RTC_Output_Polarity_Definitions Outpout Polarity
+
+/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions
   * @{
   */
 #define RTC_OUTPUT_POLARITY_HIGH       (0x00000000U)
@@ -170,7 +262,7 @@ typedef struct
   * @}
   */
 
-/** @defgroup RTC_Output_Type_ALARM_OUT Alarm Output Type
+/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT
   * @{
   */
 #define RTC_OUTPUT_TYPE_OPENDRAIN      (0x00000000U)
@@ -363,71 +455,78 @@ typedef struct
   * @}
   */
 
-/* Exported macro ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
 /** @defgroup RTC_Exported_macros RTC Exported Macros
   * @{
   */
 
 /** @brief  Reset RTC handle state
-  * @param  __HANDLE__: RTC handle.
+  * @param  __HANDLE__ RTC handle.
   * @retval None
   */
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do{\
+                                                      (__HANDLE__)->State = HAL_RTC_STATE_RESET;\
+                                                      (__HANDLE__)->MspInitCallback = NULL;\
+                                                      (__HANDLE__)->MspDeInitCallback = NULL;\
+                                                     }while(0)
+#else
 #define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
+#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
 
 /**
   * @brief  Disable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__)             \
                         do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xCA;   \
+                            (__HANDLE__)->Instance->WPR = 0xCAU;   \
-                            (__HANDLE__)->Instance->WPR = 0x53;   \
+                            (__HANDLE__)->Instance->WPR = 0x53U;   \
-                          } while(0)
+                          } while(0U)
 
 /**
   * @brief  Enable the write protection for RTC registers.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__)              \
                         do{                                       \
-                            (__HANDLE__)->Instance->WPR = 0xFF;   \
+                            (__HANDLE__)->Instance->WPR = 0xFFU;   \
-                          } while(0)                            
+                          } while(0U)
- 
 
 /**
   * @brief  Enable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_ALARMA_ENABLE(__HANDLE__)                           ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE))
 
 /**
   * @brief  Disable the RTC ALARMA peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_ALARMA_DISABLE(__HANDLE__)                          ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE))
 
 /**
   * @brief  Enable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_ALARMB_ENABLE(__HANDLE__)                           ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE))
 
 /**
   * @brief  Disable the RTC ALARMB peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_ALARMB_DISABLE(__HANDLE__)                          ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE))
 
 /**
   * @brief  Enable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC Alarm interrupt sources to be enabled or disabled.
   *          This parameter can be any combination of the following values:
   *             @arg RTC_IT_ALRA: Alarm A interrupt
   *             @arg RTC_IT_ALRB: Alarm B interrupt
@@ -437,8 +536,8 @@ typedef struct
 
 /**
   * @brief  Disable the RTC Alarm interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC Alarm interrupt sources to be enabled or disabled.
   *         This parameter can be any combination of the following values:
   *            @arg RTC_IT_ALRA: Alarm A interrupt
   *            @arg RTC_IT_ALRB: Alarm B interrupt
@@ -448,30 +547,30 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC Alarm interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
+  * @param  __INTERRUPT__ specifies the RTC Alarm interrupt sources to check.
   *         This parameter can be:
   *            @arg RTC_IT_ALRA: Alarm A interrupt
   *            @arg RTC_IT_ALRB: Alarm B interrupt
   * @retval None
   */
-#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)  (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) != RESET)? SET : RESET)
+#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__)  (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4U)) != 0U)? 1U : 0U)
 
 /**
   * @brief  Check whether the specified RTC Alarm interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Alarm interrupt sources to check.
+  * @param  __INTERRUPT__ specifies the RTC Alarm interrupt sources to check.
   *         This parameter can be:
   *            @arg RTC_IT_ALRA: Alarm A interrupt
   *            @arg RTC_IT_ALRB: Alarm B interrupt
   * @retval None
   */
-#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)     (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
+#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)     (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1U : 0U)
 
 /**
   * @brief  Get the selected RTC Alarm's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to check.
+  * @param  __FLAG__ specifies the RTC Alarm Flag sources to check.
   *         This parameter can be:
   *            @arg RTC_FLAG_ALRAF
   *            @arg RTC_FLAG_ALRBF
@@ -479,12 +578,12 @@ typedef struct
   *            @arg RTC_FLAG_ALRBWF
   * @retval None
   */
-#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__)   (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
+#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__)   (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != 0U)? 1U : 0U)
 
 /**
   * @brief  Clear the RTC Alarm's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to clear.
+  * @param  __FLAG__ specifies the RTC Alarm Flag sources to clear.
   *          This parameter can be:
   *             @arg RTC_FLAG_ALRAF
   *             @arg RTC_FLAG_ALRBF
@@ -544,13 +643,19 @@ typedef struct
   * @brief  Enable rising & falling edge trigger on the RTC Alarm associated Exti line.
   * @retval None.
   */
-#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();__HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE()  do { \
+                                                             __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();  \
+                                                             __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \
+                                                           } while(0U)
 
 /**
   * @brief  Disable rising & falling edge trigger on the RTC Alarm associated Exti line.
   * @retval None.
   */
-#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();__HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); } while(0);
+#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
+                                                             __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE();  \
+                                                             __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \
+                                                           } while(0U)
 
 /**
   * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not.
@@ -574,31 +679,38 @@ typedef struct
   * @}
   */
 
-/* Include RTC HAL Extension module */
+/* Include RTC HAL Extended module */
 #include "stm32l1xx_hal_rtc_ex.h"
 
 /* Exported functions --------------------------------------------------------*/
-/** @addtogroup RTC_Exported_Functions
+/** @defgroup RTC_Exported_Functions RTC Exported Functions
   * @{
   */
 
-
+/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
+  * @{
+  */
 /* Initialization and de-initialization functions  ****************************/
-/** @addtogroup RTC_Exported_Functions_Group1
-  * @{
-  */
 HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
 HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
+
 void              HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
 void              HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
+
+/* Callbacks Register/UnRegister functions  ***********************************/
+#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
+HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID, pRTC_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
+
 /**
   * @}
   */
 
-/* RTC Time and Date functions ************************************************/
+/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
-/** @addtogroup RTC_Exported_Functions_Group1
   * @{
   */
+/* RTC Time and Date functions ************************************************/
 HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format);
@@ -607,10 +719,10 @@ HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDat
   * @}
   */
 
-/* RTC Alarm functions ********************************************************/
+/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
-/** @addtogroup RTC_Exported_Functions_Group2
   * @{
   */
+/* RTC Alarm functions ********************************************************/
 HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format);
 HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm);
@@ -622,19 +734,19 @@ void              HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
   * @}
   */
 
-/* Peripheral Control functions ***********************************************/
+/** @defgroup  RTC_Exported_Functions_Group4 Peripheral Control functions
-/** @addtogroup RTC_Exported_Functions_Group3
   * @{
   */
+/* Peripheral Control functions ***********************************************/
 HAL_StatusTypeDef   HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc);
 /**
   * @}
   */
 
-/* Peripheral State functions *************************************************/
+/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
-/** @addtogroup RTC_Exported_Functions_Group5
   * @{
   */
+/* Peripheral State functions *************************************************/
 HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
 /**
   * @}
@@ -643,16 +755,14 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
 /**
   * @}
   */
-/* Private functions **********************************************************/
+
-/** @addtogroup RTC_Internal_Functions
-  * @{
-  */
 /* Private types -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private constants ---------------------------------------------------------*/
 /** @defgroup RTC_Private_Constants RTC Private Constants
   * @{
   */
+#define RTC_TIMEOUT_VALUE  1000U
 
 #define RTC_EXTI_LINE_ALARM_EVENT             ((uint32_t)EXTI_IMR_MR17)  /*!< External interrupt line 17 Connected to the RTC Alarm event */
 
@@ -669,21 +779,17 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
   * @}
   */
 
-/* Private functions ---------------------------------------------------------*/
+/* Private functions -------------------------------------------------------------*/
 /** @defgroup RTC_Private_Functions RTC Private Functions
   * @{
   */
 HAL_StatusTypeDef  RTC_EnterInitMode(RTC_HandleTypeDef *hrtc);
 uint8_t            RTC_ByteToBcd2(uint8_t Value);
 uint8_t            RTC_Bcd2ToByte(uint8_t Value);
-
 /**
   * @}
   */
 
-/**
-  * @}
-  */ 
 
 /**
   * @}

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_rtc_ex.h

@@ -2,33 +2,17 @@
   ******************************************************************************
   * @file    stm32l1xx_hal_rtc_ex.h
   * @author  MCD Application Team
-  * @brief   Header file of RTC HAL Extension module.
+  * @brief   Header file of RTC HAL Extended module.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
   *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
+  * License. You may obtain a copy of the License at:
-  *      this list of conditions and the following disclaimer.
+  *                        opensource.org/licenses/BSD-3-Clause
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -48,7 +32,7 @@
   * @{
   */
 
-/** @addtogroup RTCEx
+/** @defgroup RTCEx RTCEx
   * @{
   */
 
@@ -85,70 +69,6 @@ typedef struct
                                              This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */
 #endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
 } RTC_TamperTypeDef;
-
-/** 
-  * @brief  RTC Time structure definition  
-  */
-typedef struct
-{
-  uint8_t Hours;            /*!< Specifies the RTC Time Hour.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected  */
-
-  uint8_t Minutes;          /*!< Specifies the RTC Time Minutes.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-  
-  uint8_t Seconds;          /*!< Specifies the RTC Time Seconds.
-                                 This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
-  
-  uint8_t TimeFormat;       /*!< Specifies the RTC AM/PM Time.
-                                 This parameter can be a value of @ref RTC_AM_PM_Definitions */ 
-  
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) 
-  uint32_t SubSeconds;     /*!< Specifies the RTC_SSR RTC Sub Second register content.
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity */
- 
-  uint32_t SecondFraction;  /*!< Specifies the range or granularity of Sub Second register content
-                                 corresponding to Synchronous pre-scaler factor value (PREDIV_S)
-                                 This parameter corresponds to a time unit range between [0-1] Second
-                                 with [1 Sec / SecondFraction +1] granularity.
-                                 This field will be used only by HAL_RTC_GetTime function */
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-  
-  uint32_t DayLightSaving;  /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment. 
-                                 This parameter can be a value of @ref RTC_DayLightSaving_Definitions */
-  
-  uint32_t StoreOperation;  /*!< Specifies RTC_StoreOperation value to be written in the BKP bit 
-                                 in CR register to store the operation.
-                                 This parameter can be a value of @ref RTC_StoreOperation_Definitions */
-}RTC_TimeTypeDef; 
-
-/** 
-  * @brief  RTC Alarm structure definition  
-  */
-typedef struct
-{
-  RTC_TimeTypeDef AlarmTime;     /*!< Specifies the RTC Alarm Time members */
-    
-  uint32_t AlarmMask;            /*!< Specifies the RTC Alarm Masks.
-                                      This parameter can be a value of @ref RTC_AlarmMask_Definitions */
-  
-#if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)   
-  uint32_t AlarmSubSecondMask;   /*!< Specifies the RTC Alarm SubSeconds Masks.
-                                      This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */                                   
-#endif /* STM32L100xBA || STM32L151xBA || STM32L152xBA || STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
-
-  uint32_t AlarmDateWeekDaySel;  /*!< Specifies the RTC Alarm is on Date or WeekDay.
-                                      This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
-  
-  uint8_t AlarmDateWeekDay;      /*!< Specifies the RTC Alarm Date/WeekDay.
-                                      If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range.
-                                      If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */
-                                                                     
-  uint32_t Alarm;                /*!< Specifies the alarm .
-                                      This parameter can be a value of @ref RTC_Alarms_Definitions */                            
-}RTC_AlarmTypeDef;
 /**
   * @}
   */
@@ -158,7 +78,7 @@ typedef struct
   * @{
   */
 
-/** @defgroup RTC_Masks_Definitions Masks Definitions
+/** @defgroup RTCEx_Output_selection_Definition RTCEx Output Selection Definition
   * @{
   */
 #define RTC_TR_RESERVED_MASK    (0x007F7F7FU)
@@ -186,7 +106,7 @@ typedef struct
   * @}
   */
 
-/** @defgroup RTC_Synchronous_Predivider Synchronous Predivider 
+/** @defgroup RTCEx_Backup_Registers_Definition RTCEx Backup Registers Definition
   * @{
   */
 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
@@ -360,7 +280,7 @@ typedef struct
   */
 
 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
-/** @defgroup RTCEx_Tamper_Filter_Definitions Tamper Filter Definitions 
+/** @defgroup RTCEx_Tamper_Filter_Definitions RTCex Tamper Filter Definitions
   * @{
   */
 #define RTC_TAMPERFILTER_DISABLE   (0x00000000U)  /*!< Tamper filter is disabled */
@@ -380,7 +300,7 @@ typedef struct
   * @}
   */
 
-/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions Tamper Sampling Frequencies 
+/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions RTCEx Tamper Sampling Frequencies Definitions
   * @{
   */
 #define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768  (0x00000000U)  /*!< Each of the tamper inputs are sampled
@@ -412,7 +332,7 @@ typedef struct
   * @}
   */
 
-/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions Tamper Pin Precharge Duration
+/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions RTCEx Tamper Pin Precharge Duration Definitions
   * @{
   */
 #define RTC_TAMPERPRECHARGEDURATION_1RTCCLK (0x00000000U)  /*!< Tamper pins are pre-charged before
@@ -636,85 +556,89 @@ typedef struct
   * @}
   */
 
-/* Exported macro ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
 /** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros
   * @{
   */
 
+/* ---------------------------------WAKEUPTIMER---------------------------------*/
+/** @defgroup RTCEx_WakeUp_Timer RTC WakeUp Timer
+  * @{
+  */
 /**
   * @brief Enable the RTC WakeUp Timer peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__)                      ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE))
 
 /**
   * @brief Enable the RTC TimeStamp peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__)                        ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE))
 
 /**
   * @brief Disable the RTC WakeUp Timer peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__)                     ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE))
 
 /**
   * @brief Disable the RTC TimeStamp peripheral.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__)                       ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE))
 
 /**
   * @brief  Enable the Coarse calibration process.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_COARSE_CALIB_ENABLE(__HANDLE__)                       ((__HANDLE__)->Instance->CR |= (RTC_CR_DCE))
 
 /**
   * @brief  Disable the Coarse calibration process.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_COARSE_CALIB_DISABLE(__HANDLE__)                      ((__HANDLE__)->Instance->CR &= ~(RTC_CR_DCE))
 
 /**
   * @brief  Enable the RTC calibration output.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__)                 ((__HANDLE__)->Instance->CR |= (RTC_CR_COE))
 
 /**
   * @brief  Disable the calibration output.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__)                ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE))
 
 /**
   * @brief  Enable the clock reference detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__)                 ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON))
 
 /**
   * @brief  Disable the clock reference detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__)                ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON))
 
 /**
   * @brief  Enable the RTC TimeStamp interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
   *         This parameter can be:
   *             @arg RTC_IT_TS: TimeStamp interrupt
   * @retval None
@@ -723,8 +647,8 @@ typedef struct
 
 /**
   * @brief  Enable the RTC WakeUpTimer interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_IT_WUT:  WakeUpTimer A interrupt
   * @retval None
@@ -733,8 +657,8 @@ typedef struct
 
 /**
   * @brief  Disable the RTC TimeStamp interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
   *          This parameter can be:
   *             @arg RTC_IT_TS: TimeStamp interrupt
   * @retval None
@@ -743,8 +667,8 @@ typedef struct
 
 /**
   * @brief  Disable the RTC WakeUpTimer interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled. 
+  * @param  __INTERRUPT__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_IT_WUT:  WakeUpTimer A interrupt
   * @retval None
@@ -753,14 +677,14 @@ typedef struct
 
 /**
   * @brief  Enable the RTC Tamper1 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__)                         SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
 
 /**
   * @brief  Disable the RTC Tamper1 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__)                        CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP1E)
@@ -771,28 +695,28 @@ typedef struct
   || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
 /**
   * @brief  Enable the RTC Tamper2 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__)                         SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
 
 /**
   * @brief  Disable the RTC Tamper2 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__)                        CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP2E)
 
 /**
   * @brief  Enable the RTC Tamper3 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__)                         SET_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
 
 /**
   * @brief  Disable the RTC Tamper3 input detection.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
   * @retval None
   */
 #define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__)                        CLEAR_BIT((__HANDLE__)->Instance->TAFCR, RTC_TAFCR_TAMP3E)
@@ -800,8 +724,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC Tamper interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt to check.
+  * @param  __INTERRUPT__ specifies the RTC Tamper interrupt to check.
   *         This parameter can be:
   *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
   *            @arg  RTC_IT_TAMP2: Tamper2 interrupt
@@ -814,8 +738,8 @@ typedef struct
 #else
 /**
   * @brief  Check whether the specified RTC Tamper interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt to check.
+  * @param  __INTERRUPT__ specifies the RTC Tamper interrupt to check.
   *         This parameter can be:
   *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
   * @retval None
@@ -826,8 +750,8 @@ typedef struct
 
 /**
   * @brief  Enable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled
+  * @param  __INTERRUPT__ specifies the RTC Tamper interrupt sources to be enabled
   *          This parameter can be any combination of the following values:
   *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
   *            @arg  RTC_IT_TAMP2: Tamper2 interrupt (*)
@@ -842,8 +766,8 @@ typedef struct
 
 /**
   * @brief  Disable the RTC Tamper interrupt.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. 
+  * @param  __INTERRUPT__ specifies the RTC Tamper interrupt sources to be disabled.
   *         This parameter can be any combination of the following values:
   *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
   *            @arg  RTC_IT_TAMP2: Tamper2 interrupt (*)
@@ -858,8 +782,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC Tamper interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Tamper interrupt source to check.
+  * @param  __INTERRUPT__ specifies the RTC Tamper interrupt source to check.
   *         This parameter can be:
   *            @arg  RTC_IT_TAMP1: Tamper1 interrupt
   *            @arg  RTC_IT_TAMP2: Tamper2 interrupt (*)
@@ -874,8 +798,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC WakeUpTimer interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC WakeUpTimer interrupt sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_IT_WUT:  WakeUpTimer A interrupt
   * @retval None
@@ -884,8 +808,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC Wake Up timer interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Wake Up timer interrupt sources to check.
+  * @param  __INTERRUPT__ specifies the RTC Wake Up timer interrupt sources to check.
   *         This parameter can be:
   *            @arg RTC_IT_WUT:  WakeUpTimer interrupt
   * @retval None
@@ -894,8 +818,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC TimeStamp interrupt has occurred or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
+  * @param  __INTERRUPT__ specifies the RTC TimeStamp interrupt sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_IT_TS: TimeStamp interrupt
   * @retval None
@@ -904,8 +828,8 @@ typedef struct
 
 /**
   * @brief  Check whether the specified RTC Time Stamp interrupt has been enabled or not.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __INTERRUPT__: specifies the RTC Time Stamp interrupt source to check.
+  * @param  __INTERRUPT__ specifies the RTC Time Stamp interrupt source to check.
   *         This parameter can be:
   *            @arg RTC_IT_TS: TimeStamp interrupt
   * @retval None
@@ -914,8 +838,8 @@ typedef struct
 
 /**
   * @brief  Get the selected RTC TimeStamp's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC TimeStamp Flag sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC TimeStamp Flag sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_FLAG_TSF
   *            @arg RTC_FLAG_TSOVF
@@ -925,8 +849,8 @@ typedef struct
 
 /**
   * @brief  Get the selected RTC WakeUpTimer's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC WakeUpTimer Flag sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC WakeUpTimer Flag sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_FLAG_WUTF
   *            @arg RTC_FLAG_WUTWF
@@ -936,8 +860,8 @@ typedef struct
 
 /**
   * @brief  Get the selected RTC Tamper's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_FLAG_TAMP1F
   *            @arg RTC_FLAG_TAMP2F  (*)
@@ -956,8 +880,8 @@ typedef struct
   || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
 /**
   * @brief  Get the selected RTC shift operation's flag status.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC shift operation Flag is pending or not.
+  * @param  __FLAG__ specifies the RTC shift operation Flag is pending or not.
   *         This parameter can be:
   *            @arg RTC_FLAG_SHPF
   * @retval None
@@ -967,8 +891,8 @@ typedef struct
 
 /**
   * @brief  Clear the RTC Time Stamp's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Alarm Flag sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC Alarm Flag sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_FLAG_TSF
   * @retval None
@@ -977,8 +901,8 @@ typedef struct
 
 /**
   * @brief  Clear the RTC Tamper's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC Tamper Flag sources to be enabled or disabled.
+  * @param  __FLAG__ specifies the RTC Tamper Flag sources to be enabled or disabled.
   *         This parameter can be:
   *            @arg RTC_FLAG_TAMP1F
   *            @arg RTC_FLAG_TAMP2F  (*)
@@ -993,8 +917,8 @@ typedef struct
 
 /**
   * @brief  Clear the RTC Wake Up timer's pending flags.
-  * @param  __HANDLE__: specifies the RTC handle.
+  * @param  __HANDLE__ specifies the RTC handle.
-  * @param  __FLAG__: specifies the RTC WakeUpTimer Flag to clear.
+  * @param  __FLAG__ specifies the RTC WakeUpTimer Flag to clear.
   *         This parameter can be:
   *            @arg RTC_FLAG_WUTF
   * @retval None
@@ -1164,19 +1088,18 @@ typedef struct
   */
 
 /* Exported functions --------------------------------------------------------*/
-/** @addtogroup RTCEx_Exported_Functions
+/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
   * @{
   */
 
 /* RTC TimeStamp and Tamper functions *****************************************/
-/** @addtogroup RTCEx_Exported_Functions_Group4
+/** @defgroup RTCEx_Exported_Functions_Group1 Extended RTC TimeStamp and Tamper functions
   * @{
   */
 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge);
 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
-
 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
@@ -1199,12 +1122,12 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_
   */
 
 /* RTC Wake-up functions ******************************************************/
-/** @addtogroup RTCEx_Exported_Functions_Group5
+/** @defgroup RTCEx_Exported_Functions_Group2 Extended RTC Wake-up functions
   * @{
   */
 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock);
-uint32_t          HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
+HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc);
 uint32_t          HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc);
 void              HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc);
 void              HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc);
@@ -1213,8 +1136,8 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin
   * @}
   */
 
-/* Extension Control functions ************************************************/
+/* Extended Control functions ************************************************/
-/** @addtogroup RTCEx_Exported_Functions_Group7
+/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions
   * @{
   */
 void              HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data);
@@ -1238,8 +1161,8 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc);
   * @}
   */
 
-/* Extension RTC features functions *******************************************/
+/* Extended RTC features functions *******************************************/
-/** @addtogroup RTCEx_Exported_Functions_Group8
+/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions
   * @{
   */
 void              HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc);
@@ -1282,6 +1205,10 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
   * @}
   */
 
+/**
+  * @}
+  */
+  
 #ifdef __cplusplus
 }
 #endif

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_sd.h

@@ -0,0 +1,762 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_sd.h
+  * @author  MCD Application Team
+  * @brief   Header file of SD HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                       opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L1xx_HAL_SD_H
+#define STM32L1xx_HAL_SD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if defined(SDIO)
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_ll_sdmmc.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @defgroup SD SD
+  * @brief SD HAL module driver
+  * @{
+  */ 
+
+/* Exported types ------------------------------------------------------------*/ 
+/** @defgroup SD_Exported_Types SD Exported Types
+  * @{
+  */
+
+/** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
+  * @{
+  */   
+typedef enum
+{
+  HAL_SD_STATE_RESET                  = ((uint32_t)0x00000000U),  /*!< SD not yet initialized or disabled  */
+  HAL_SD_STATE_READY                  = ((uint32_t)0x00000001U),  /*!< SD initialized and ready for use    */
+  HAL_SD_STATE_TIMEOUT                = ((uint32_t)0x00000002U),  /*!< SD Timeout state                    */
+  HAL_SD_STATE_BUSY                   = ((uint32_t)0x00000003U),  /*!< SD process ongoing                  */
+  HAL_SD_STATE_PROGRAMMING            = ((uint32_t)0x00000004U),  /*!< SD Programming State                */
+  HAL_SD_STATE_RECEIVING              = ((uint32_t)0x00000005U),  /*!< SD Receiving State                  */
+  HAL_SD_STATE_TRANSFER               = ((uint32_t)0x00000006U),  /*!< SD Transfert State                  */
+  HAL_SD_STATE_ERROR                  = ((uint32_t)0x0000000FU)   /*!< SD is in error state                */
+}HAL_SD_StateTypeDef;
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
+  * @{
+  */   
+typedef uint32_t HAL_SD_CardStateTypeDef;
+
+#define HAL_SD_CARD_READY          0x00000001U  /*!< Card state is ready                     */
+#define HAL_SD_CARD_IDENTIFICATION 0x00000002U  /*!< Card is in identification state         */
+#define HAL_SD_CARD_STANDBY        0x00000003U  /*!< Card is in standby state                */
+#define HAL_SD_CARD_TRANSFER       0x00000004U  /*!< Card is in transfer state               */
+#define HAL_SD_CARD_SENDING        0x00000005U  /*!< Card is sending an operation            */
+#define HAL_SD_CARD_RECEIVING      0x00000006U  /*!< Card is receiving operation information */
+#define HAL_SD_CARD_PROGRAMMING    0x00000007U  /*!< Card is in programming state            */
+#define HAL_SD_CARD_DISCONNECTED   0x00000008U  /*!< Card is disconnected                    */
+#define HAL_SD_CARD_ERROR          0x000000FFU  /*!< Card response Error                     */
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition   
+  * @{
+  */
+#define SD_InitTypeDef      SDIO_InitTypeDef 
+#define SD_TypeDef          SDIO_TypeDef
+
+/** 
+  * @brief  SD Card Information Structure definition
+  */ 
+typedef struct
+{
+  uint32_t CardType;                     /*!< Specifies the card Type                         */
+  
+  uint32_t CardVersion;                  /*!< Specifies the card version                      */
+
+  uint32_t Class;                        /*!< Specifies the class of the card class           */
+
+  uint32_t RelCardAdd;                   /*!< Specifies the Relative Card Address             */
+  
+  uint32_t BlockNbr;                     /*!< Specifies the Card Capacity in blocks           */
+
+  uint32_t BlockSize;                    /*!< Specifies one block size in bytes               */
+  
+  uint32_t LogBlockNbr;                  /*!< Specifies the Card logical Capacity in blocks   */
+
+  uint32_t LogBlockSize;                 /*!< Specifies logical block size in bytes           */
+
+}HAL_SD_CardInfoTypeDef;
+
+/** 
+  * @brief  SD handle Structure definition
+  */ 
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+typedef struct __SD_HandleTypeDef
+#else
+typedef struct
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+{
+  SD_TypeDef                   *Instance;        /*!< SD registers base address           */
+  
+  SD_InitTypeDef               Init;             /*!< SD required parameters              */
+  
+  HAL_LockTypeDef              Lock;             /*!< SD locking object                   */
+  
+  uint8_t                      *pTxBuffPtr;      /*!< Pointer to SD Tx transfer Buffer    */
+
+  uint32_t                     TxXferSize;       /*!< SD Tx Transfer size                 */
+
+  uint8_t                      *pRxBuffPtr;      /*!< Pointer to SD Rx transfer Buffer    */
+
+  uint32_t                     RxXferSize;       /*!< SD Rx Transfer size                 */
+  
+  __IO uint32_t                Context;          /*!< SD transfer context                 */
+ 
+  __IO HAL_SD_StateTypeDef     State;            /*!< SD card State                       */
+  
+  __IO uint32_t                ErrorCode;        /*!< SD Card Error codes                 */  
+ 
+  DMA_HandleTypeDef            *hdmatx;          /*!< SD Tx DMA handle parameters         */
+
+  DMA_HandleTypeDef            *hdmarx;          /*!< SD Rx DMA handle parameters         */
+  
+  HAL_SD_CardInfoTypeDef       SdCard;           /*!< SD Card information                 */
+  
+  uint32_t                     CSD[4];           /*!< SD card specific data table         */
+  
+  uint32_t                     CID[4];           /*!< SD card identification number table */
+  
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+  void (* TxCpltCallback)                 (struct __SD_HandleTypeDef *hsd);
+  void (* RxCpltCallback)                 (struct __SD_HandleTypeDef *hsd);
+  void (* ErrorCallback)                  (struct __SD_HandleTypeDef *hsd);
+  void (* AbortCpltCallback)              (struct __SD_HandleTypeDef *hsd);
+
+  void (* MspInitCallback)                (struct __SD_HandleTypeDef *hsd);
+  void (* MspDeInitCallback)              (struct __SD_HandleTypeDef *hsd);
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+}SD_HandleTypeDef;
+
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register 
+  * @{
+  */
+typedef struct
+{
+  __IO uint8_t  CSDStruct;            /*!< CSD structure                         */
+  __IO uint8_t  SysSpecVersion;       /*!< System specification version          */
+  __IO uint8_t  Reserved1;            /*!< Reserved                              */
+  __IO uint8_t  TAAC;                 /*!< Data read access time 1               */
+  __IO uint8_t  NSAC;                 /*!< Data read access time 2 in CLK cycles */
+  __IO uint8_t  MaxBusClkFrec;        /*!< Max. bus clock frequency              */
+  __IO uint16_t CardComdClasses;      /*!< Card command classes                  */
+  __IO uint8_t  RdBlockLen;           /*!< Max. read data block length           */
+  __IO uint8_t  PartBlockRead;        /*!< Partial blocks for read allowed       */
+  __IO uint8_t  WrBlockMisalign;      /*!< Write block misalignment              */
+  __IO uint8_t  RdBlockMisalign;      /*!< Read block misalignment               */
+  __IO uint8_t  DSRImpl;              /*!< DSR implemented                       */
+  __IO uint8_t  Reserved2;            /*!< Reserved                              */
+  __IO uint32_t DeviceSize;           /*!< Device Size                           */
+  __IO uint8_t  MaxRdCurrentVDDMin;   /*!< Max. read current @ VDD min           */
+  __IO uint8_t  MaxRdCurrentVDDMax;   /*!< Max. read current @ VDD max           */
+  __IO uint8_t  MaxWrCurrentVDDMin;   /*!< Max. write current @ VDD min          */
+  __IO uint8_t  MaxWrCurrentVDDMax;   /*!< Max. write current @ VDD max          */
+  __IO uint8_t  DeviceSizeMul;        /*!< Device size multiplier                */
+  __IO uint8_t  EraseGrSize;          /*!< Erase group size                      */
+  __IO uint8_t  EraseGrMul;           /*!< Erase group size multiplier           */
+  __IO uint8_t  WrProtectGrSize;      /*!< Write protect group size              */
+  __IO uint8_t  WrProtectGrEnable;    /*!< Write protect group enable            */
+  __IO uint8_t  ManDeflECC;           /*!< Manufacturer default ECC              */
+  __IO uint8_t  WrSpeedFact;          /*!< Write speed factor                    */
+  __IO uint8_t  MaxWrBlockLen;        /*!< Max. write data block length          */
+  __IO uint8_t  WriteBlockPaPartial;  /*!< Partial blocks for write allowed      */
+  __IO uint8_t  Reserved3;            /*!< Reserved                              */
+  __IO uint8_t  ContentProtectAppli;  /*!< Content protection application        */
+  __IO uint8_t  FileFormatGroup;      /*!< File format group                     */
+  __IO uint8_t  CopyFlag;             /*!< Copy flag (OTP)                       */
+  __IO uint8_t  PermWrProtect;        /*!< Permanent write protection            */
+  __IO uint8_t  TempWrProtect;        /*!< Temporary write protection            */
+  __IO uint8_t  FileFormat;           /*!< File format                           */
+  __IO uint8_t  ECC;                  /*!< ECC code                              */
+  __IO uint8_t  CSD_CRC;              /*!< CSD CRC                               */
+  __IO uint8_t  Reserved4;            /*!< Always 1                              */
+}HAL_SD_CardCSDTypeDef;
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
+  * @{
+  */
+typedef struct
+{
+  __IO uint8_t  ManufacturerID;  /*!< Manufacturer ID       */
+  __IO uint16_t OEM_AppliID;     /*!< OEM/Application ID    */
+  __IO uint32_t ProdName1;       /*!< Product Name part1    */
+  __IO uint8_t  ProdName2;       /*!< Product Name part2    */
+  __IO uint8_t  ProdRev;         /*!< Product Revision      */
+  __IO uint32_t ProdSN;          /*!< Product Serial Number */
+  __IO uint8_t  Reserved1;       /*!< Reserved1             */
+  __IO uint16_t ManufactDate;    /*!< Manufacturing Date    */
+  __IO uint8_t  CID_CRC;         /*!< CID CRC               */
+  __IO uint8_t  Reserved2;       /*!< Always 1              */
+
+}HAL_SD_CardCIDTypeDef;
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 
+  * @{
+  */
+typedef struct
+{
+  __IO uint8_t  DataBusWidth;           /*!< Shows the currently defined data bus width                 */
+  __IO uint8_t  SecuredMode;            /*!< Card is in secured mode of operation                       */
+  __IO uint16_t CardType;               /*!< Carries information about card type                        */
+  __IO uint32_t ProtectedAreaSize;      /*!< Carries information about the capacity of protected area   */
+  __IO uint8_t  SpeedClass;             /*!< Carries information about the speed class of the card      */
+  __IO uint8_t  PerformanceMove;        /*!< Carries information about the card's performance move      */
+  __IO uint8_t  AllocationUnitSize;     /*!< Carries information about the card's allocation unit size  */
+  __IO uint16_t EraseSize;              /*!< Determines the number of AUs to be erased in one operation */
+  __IO uint8_t  EraseTimeout;           /*!< Determines the timeout for any number of AU erase          */
+  __IO uint8_t  EraseOffset;            /*!< Carries information about the erase offset                 */
+
+}HAL_SD_CardStatusTypeDef;
+/** 
+  * @}
+  */
+
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+/** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition 
+  * @{
+  */
+typedef enum
+{
+  HAL_SD_TX_CPLT_CB_ID                 = 0x00U,  /*!< SD Tx Complete Callback ID                     */
+  HAL_SD_RX_CPLT_CB_ID                 = 0x01U,  /*!< SD Rx Complete Callback ID                     */
+  HAL_SD_ERROR_CB_ID                   = 0x02U,  /*!< SD Error Callback ID                           */
+  HAL_SD_ABORT_CB_ID                   = 0x03U,  /*!< SD Abort Callback ID                           */
+
+  HAL_SD_MSP_INIT_CB_ID                = 0x10U,  /*!< SD MspInit Callback ID                         */
+  HAL_SD_MSP_DEINIT_CB_ID              = 0x11U   /*!< SD MspDeInit Callback ID                       */
+}HAL_SD_CallbackIDTypeDef;
+/** 
+  * @}
+  */
+
+/** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition 
+  * @{
+  */
+typedef void (*pSD_CallbackTypeDef)           (SD_HandleTypeDef *hsd);
+/** 
+  * @}
+  */
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+/** 
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup SD_Exported_Constants Exported Constants
+  * @{
+  */
+
+#define BLOCKSIZE   ((uint32_t)512U) /*!< Block size is 512 bytes */
+
+/** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition 
+  * @{
+  */  
+#define HAL_SD_ERROR_NONE                     SDMMC_ERROR_NONE                    /*!< No error                                                      */
+#define HAL_SD_ERROR_CMD_CRC_FAIL             SDMMC_ERROR_CMD_CRC_FAIL            /*!< Command response received (but CRC check failed)              */
+#define HAL_SD_ERROR_DATA_CRC_FAIL            SDMMC_ERROR_DATA_CRC_FAIL           /*!< Data block sent/received (CRC check failed)                   */
+#define HAL_SD_ERROR_CMD_RSP_TIMEOUT          SDMMC_ERROR_CMD_RSP_TIMEOUT         /*!< Command response timeout                                      */
+#define HAL_SD_ERROR_DATA_TIMEOUT             SDMMC_ERROR_DATA_TIMEOUT            /*!< Data timeout                                                  */
+#define HAL_SD_ERROR_TX_UNDERRUN              SDMMC_ERROR_TX_UNDERRUN             /*!< Transmit FIFO underrun                                        */
+#define HAL_SD_ERROR_RX_OVERRUN               SDMMC_ERROR_RX_OVERRUN              /*!< Receive FIFO overrun                                          */
+#define HAL_SD_ERROR_ADDR_MISALIGNED          SDMMC_ERROR_ADDR_MISALIGNED         /*!< Misaligned address                                            */
+#define HAL_SD_ERROR_BLOCK_LEN_ERR            SDMMC_ERROR_BLOCK_LEN_ERR           /*!< Transferred block length is not allowed for the card or the 
+                                                                                       number of transferred bytes does not match the block length   */
+#define HAL_SD_ERROR_ERASE_SEQ_ERR            SDMMC_ERROR_ERASE_SEQ_ERR           /*!< An error in the sequence of erase command occurs              */
+#define HAL_SD_ERROR_BAD_ERASE_PARAM          SDMMC_ERROR_BAD_ERASE_PARAM         /*!< An invalid selection for erase groups                         */
+#define HAL_SD_ERROR_WRITE_PROT_VIOLATION     SDMMC_ERROR_WRITE_PROT_VIOLATION    /*!< Attempt to program a write protect block                      */
+#define HAL_SD_ERROR_LOCK_UNLOCK_FAILED       SDMMC_ERROR_LOCK_UNLOCK_FAILED      /*!< Sequence or password error has been detected in unlock 
+                                                                                       command or if there was an attempt to access a locked card    */
+#define HAL_SD_ERROR_COM_CRC_FAILED           SDMMC_ERROR_COM_CRC_FAILED          /*!< CRC check of the previous command failed                      */
+#define HAL_SD_ERROR_ILLEGAL_CMD              SDMMC_ERROR_ILLEGAL_CMD             /*!< Command is not legal for the card state                       */
+#define HAL_SD_ERROR_CARD_ECC_FAILED          SDMMC_ERROR_CARD_ECC_FAILED         /*!< Card internal ECC was applied but failed to correct the data  */
+#define HAL_SD_ERROR_CC_ERR                   SDMMC_ERROR_CC_ERR                  /*!< Internal card controller error                                */
+#define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR      SDMMC_ERROR_GENERAL_UNKNOWN_ERR     /*!< General or unknown error                                      */
+#define HAL_SD_ERROR_STREAM_READ_UNDERRUN     SDMMC_ERROR_STREAM_READ_UNDERRUN    /*!< The card could not sustain data reading in stream rmode       */
+#define HAL_SD_ERROR_STREAM_WRITE_OVERRUN     SDMMC_ERROR_STREAM_WRITE_OVERRUN    /*!< The card could not sustain data programming in stream mode    */
+#define HAL_SD_ERROR_CID_CSD_OVERWRITE        SDMMC_ERROR_CID_CSD_OVERWRITE       /*!< CID/CSD overwrite error                                       */
+#define HAL_SD_ERROR_WP_ERASE_SKIP            SDMMC_ERROR_WP_ERASE_SKIP           /*!< Only partial address space was erased                         */
+#define HAL_SD_ERROR_CARD_ECC_DISABLED        SDMMC_ERROR_CARD_ECC_DISABLED       /*!< Command has been executed without using internal ECC          */
+#define HAL_SD_ERROR_ERASE_RESET              SDMMC_ERROR_ERASE_RESET             /*!< Erase sequence was cleared before executing because an out 
+                                                                                       of erase sequence command was received                        */
+#define HAL_SD_ERROR_AKE_SEQ_ERR              SDMMC_ERROR_AKE_SEQ_ERR             /*!< Error in sequence of authentication                           */
+#define HAL_SD_ERROR_INVALID_VOLTRANGE        SDMMC_ERROR_INVALID_VOLTRANGE       /*!< Error in case of invalid voltage range                        */        
+#define HAL_SD_ERROR_ADDR_OUT_OF_RANGE        SDMMC_ERROR_ADDR_OUT_OF_RANGE       /*!< Error when addressed block is out of range                    */        
+#define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE   SDMMC_ERROR_REQUEST_NOT_APPLICABLE  /*!< Error when command request is not applicable                  */  
+#define HAL_SD_ERROR_PARAM                    SDMMC_ERROR_INVALID_PARAMETER       /*!< the used parameter is not valid                               */  
+#define HAL_SD_ERROR_UNSUPPORTED_FEATURE      SDMMC_ERROR_UNSUPPORTED_FEATURE     /*!< Error when feature is not insupported                         */
+#define HAL_SD_ERROR_BUSY                     SDMMC_ERROR_BUSY                    /*!< Error when transfer process is busy                           */ 
+#define HAL_SD_ERROR_DMA                      SDMMC_ERROR_DMA                     /*!< Error while DMA transfer                                      */
+#define HAL_SD_ERROR_TIMEOUT                  SDMMC_ERROR_TIMEOUT                 /*!< Timeout error                                                 */
+                                                
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+#define HAL_SD_ERROR_INVALID_CALLBACK         SDMMC_ERROR_INVALID_PARAMETER       /*!< Invalid callback error                                        */
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+/** 
+  * @}
+  */
+ 
+/** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
+  * @{
+  */ 
+#define SD_CONTEXT_NONE                 ((uint32_t)0x00000000U)  /*!< None                             */
+#define SD_CONTEXT_READ_SINGLE_BLOCK    ((uint32_t)0x00000001U)  /*!< Read single block operation      */
+#define SD_CONTEXT_READ_MULTIPLE_BLOCK  ((uint32_t)0x00000002U)  /*!< Read multiple blocks operation   */
+#define SD_CONTEXT_WRITE_SINGLE_BLOCK   ((uint32_t)0x00000010U)  /*!< Write single block operation     */
+#define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U)  /*!< Write multiple blocks operation  */
+#define SD_CONTEXT_IT                   ((uint32_t)0x00000008U)  /*!< Process in Interrupt mode        */
+#define SD_CONTEXT_DMA                  ((uint32_t)0x00000080U)  /*!< Process in DMA mode              */
+
+/**
+  * @}
+  */
+
+/** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
+  * @{
+  */
+#define CARD_SDSC                  ((uint32_t)0x00000000U)  /*!< SD Standard Capacity <2Go                          */
+#define CARD_SDHC_SDXC             ((uint32_t)0x00000001U)  /*!< SD High Capacity <32Go, SD Extended Capacity <2To  */
+#define CARD_SECURED               ((uint32_t)0x00000003U)
+    
+/**
+  * @}
+  */
+
+/** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
+  * @{
+  */
+#define CARD_V1_X                  ((uint32_t)0x00000000U)
+#define CARD_V2_X                  ((uint32_t)0x00000001U)
+/**
+  * @}
+  */
+      
+/**
+  * @}
+  */
+  
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup SD_Exported_macros SD Exported Macros
+ *  @brief macros to handle interrupts and specific clock configurations
+ * @{
+ */
+/** @brief Reset SD handle state.
+  * @param  __HANDLE__ : SD handle.
+  * @retval None
+  */
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__)           do {                                              \
+                                                               (__HANDLE__)->State = HAL_SD_STATE_RESET; \
+                                                               (__HANDLE__)->MspInitCallback = NULL;       \
+                                                               (__HANDLE__)->MspDeInitCallback = NULL;     \
+                                                             } while(0)
+#else
+#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__)           ((__HANDLE__)->State = HAL_SD_STATE_RESET)
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+ 
+/**
+  * @brief  Enable the SD device.
+  * @retval None
+  */ 
+#define __HAL_SD_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
+
+/**
+  * @brief  Disable the SD device.
+  * @retval None
+  */
+#define __HAL_SD_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
+
+/**
+  * @brief  Enable the SDMMC DMA transfer.
+  * @retval None
+  */ 
+#define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
+
+/**
+  * @brief  Disable the SDMMC DMA transfer.
+  * @retval None
+  */
+#define __HAL_SD_DMA_DISABLE(__HANDLE__)  __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
+ 
+/**
+  * @brief  Enable the SD device interrupt.
+  * @param  __HANDLE__: SD Handle  
+  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
+  *         This parameter can be one or a combination of the following values:
+  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
+  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
+  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
+  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
+  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
+  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
+  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
+  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
+  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
+  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
+  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
+  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
+  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
+  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
+  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
+  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
+  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
+  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
+  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
+  *            @arg SDIO_IT_SDIOIT:   SDIO interrupt received interrupt
+  * @retval None
+  */
+#define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
+
+/**
+  * @brief  Disable the SD device interrupt.
+  * @param  __HANDLE__: SD Handle   
+  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
+  *          This parameter can be one or a combination of the following values:
+  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
+  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
+  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
+  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
+  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
+  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
+  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
+  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
+  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
+  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
+  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
+  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
+  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
+  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
+  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
+  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
+  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
+  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
+  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
+  *            @arg SDIO_IT_SDIOIT:   SDIO interrupt received interrupt   
+  * @retval None
+  */
+#define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
+
+/**
+  * @brief  Check whether the specified SD flag is set or not. 
+  * @param  __HANDLE__: SD Handle   
+  * @param  __FLAG__: specifies the flag to check. 
+  *          This parameter can be one of the following values:
+  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
+  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
+  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
+  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
+  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
+  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
+  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
+  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
+  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
+  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
+  *            @arg SDIO_FLAG_CMDACT:   Command transfer in progress
+  *            @arg SDIO_FLAG_TXACT:    Data transmit in progress
+  *            @arg SDIO_FLAG_RXACT:    Data receive in progress
+  *            @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
+  *            @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
+  *            @arg SDIO_FLAG_TXFIFOF:  Transmit FIFO full
+  *            @arg SDIO_FLAG_RXFIFOF:  Receive FIFO full
+  *            @arg SDIO_FLAG_TXFIFOE:  Transmit FIFO empty
+  *            @arg SDIO_FLAG_RXFIFOE:  Receive FIFO empty
+  *            @arg SDIO_FLAG_TXDAVL:   Data available in transmit FIFO
+  *            @arg SDIO_FLAG_RXDAVL:   Data available in receive FIFO
+  *            @arg SDIO_FLAG_SDIOIT:   SDIO interrupt received
+  * @retval The new state of SD FLAG (SET or RESET).
+  */
+#define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
+
+/**
+  * @brief  Clear the SD's pending flags.
+  * @param  __HANDLE__: SD Handle  
+  * @param  __FLAG__: specifies the flag to clear.  
+  *          This parameter can be one or a combination of the following values:
+  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
+  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
+  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
+  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
+  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
+  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
+  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
+  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
+  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
+  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
+  *            @arg SDIO_FLAG_SDIOIT:   SDIO interrupt received
+  * @retval None
+  */
+#define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
+
+/**
+  * @brief  Check whether the specified SD interrupt has occurred or not.
+  * @param  __HANDLE__: SD Handle   
+  * @param  __INTERRUPT__: specifies the SDMMC interrupt source to check. 
+  *          This parameter can be one of the following values:
+  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
+  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
+  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
+  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
+  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
+  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
+  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
+  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
+  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
+  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
+  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
+  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
+  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
+  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
+  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
+  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
+  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
+  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
+  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
+  *            @arg SDIO_IT_SDIOIT:   SDIO interrupt received interrupt
+  * @retval The new state of SD IT (SET or RESET).
+  */
+#define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
+
+/**
+  * @brief  Clear the SD's interrupt pending bits.
+  * @param  __HANDLE__: SD Handle
+  * @param  __INTERRUPT__: specifies the interrupt pending bit to clear. 
+  *          This parameter can be one or a combination of the following values:
+  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
+  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
+  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
+  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
+  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
+  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
+  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
+  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
+  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
+  *            @arg SDIO_IT_SDIOIT:   SDIO interrupt received interrupt
+  * @retval None
+  */
+#define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
+
+/**
+  * @}
+  */
+  
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup SD_Exported_Functions SD Exported Functions
+  * @{
+  */
+  
+/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd);
+HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd);
+HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
+void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
+void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
+/**
+  * @}
+  */
+  
+/** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
+  * @{
+  */
+/* Blocking mode: Polling */
+HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
+/* Non-Blocking mode: IT */
+HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
+HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
+/* Non-Blocking mode: DMA */
+HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
+HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
+
+void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
+
+/* Callback in non blocking modes (DMA) */
+void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd);
+void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd);
+void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd);
+void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd);
+
+#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
+/* SD callback registering/unregistering */
+HAL_StatusTypeDef HAL_SD_RegisterCallback  (SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId, pSD_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId);
+#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+  
+/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
+  * @{
+  */
+HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
+HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode);
+/**
+  * @}
+  */
+
+/** @defgroup SD_Exported_Functions_Group4 SD card related functions
+  * @{
+  */
+HAL_StatusTypeDef       HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
+HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd);
+HAL_StatusTypeDef       HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID);
+HAL_StatusTypeDef       HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD);
+HAL_StatusTypeDef       HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus);
+HAL_StatusTypeDef       HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
+/**
+  * @}
+  */
+
+/** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
+  * @{
+  */
+HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd);
+uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd);
+/**
+  * @}
+  */
+
+/** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
+  * @{
+  */
+HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd);
+HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
+/**
+  * @}
+  */
+    
+/* Private types -------------------------------------------------------------*/
+/** @defgroup SD_Private_Types SD Private Types
+  * @{
+  */
+
+/**
+  * @}
+  */ 
+
+/* Private defines -----------------------------------------------------------*/
+/** @defgroup SD_Private_Defines SD Private Defines
+  * @{
+  */
+
+/**
+  * @}
+  */ 
+          
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup SD_Private_Variables SD Private Variables
+  * @{
+  */
+
+/**
+  * @}
+  */ 
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup SD_Private_Constants SD Private Constants
+  * @{
+  */
+
+/**
+  * @}
+  */ 
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup SD_Private_Macros SD Private Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private functions prototypes ----------------------------------------------*/
+/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup SD_Private_Functions SD Private Functions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */ 
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* SDIO */
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* STM32L1xx_HAL_SD_H */ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

targets/TARGET_STM/TARGET_STM32L1/STM32Cube_FW/STM32L1xx_HAL_Driver/stm32l1xx_hal_smartcard.h

@@ -0,0 +1,757 @@
+/**
+  ******************************************************************************
+  * @file    stm32l1xx_hal_smartcard.h
+  * @author  MCD Application Team
+  * @brief   Header file of SMARTCARD HAL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L1xx_HAL_SMARTCARD_H
+#define __STM32L1xx_HAL_SMARTCARD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l1xx_hal_def.h"
+
+/** @addtogroup STM32L1xx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup SMARTCARD
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup SMARTCARD_Exported_Types SMARTCARD Exported Types
+  * @{
+  */
+
+/**
+  * @brief SMARTCARD Init Structure definition
+  */
+typedef struct
+{
+  uint32_t BaudRate;                  /*!< This member configures the SmartCard communication baud rate.
+                                           The baud rate is computed using the following formula:
+                                           - IntegerDivider = ((PCLKx) / (16 * (hsc->Init.BaudRate)))
+                                           - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
+
+  uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
+                                           This parameter can be a value of @ref SMARTCARD_Word_Length */
+
+  uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
+                                           This parameter can be a value of @ref SMARTCARD_Stop_Bits */
+
+  uint32_t Parity;                    /*!< Specifies the parity mode.
+                                           This parameter can be a value of @ref SMARTCARD_Parity
+                                           @note When parity is enabled, the computed parity is inserted
+                                                 at the MSB position of the transmitted data (9th bit when
+                                                 the word length is set to 9 data bits; 8th bit when the
+                                                 word length is set to 8 data bits).*/
+
+  uint32_t Mode;                      /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
+                                           This parameter can be a value of @ref SMARTCARD_Mode */
+
+  uint32_t CLKPolarity;               /*!< Specifies the steady state of the serial clock.
+                                           This parameter can be a value of @ref SMARTCARD_Clock_Polarity */
+
+  uint32_t CLKPhase;                  /*!< Specifies the clock transition on which the bit capture is made.
+                                           This parameter can be a value of @ref SMARTCARD_Clock_Phase */
+
+  uint32_t CLKLastBit;                /*!< Specifies whether the clock pulse corresponding to the last transmitted
+                                           data bit (MSB) has to be output on the SCLK pin in synchronous mode.
+                                           This parameter can be a value of @ref SMARTCARD_Last_Bit */
+
+  uint32_t Prescaler;                 /*!< Specifies the SmartCard Prescaler value used for dividing the system clock
+                                           to provide the smartcard clock. The value given in the register (5 significant bits)
+                                           is multiplied by 2 to give the division factor of the source clock frequency.
+                                           This parameter can be a value of @ref SMARTCARD_Prescaler */
+
+  uint32_t GuardTime;                 /*!< Specifies the SmartCard Guard Time value in terms of number of baud clocks */
+
+  uint32_t NACKState;                 /*!< Specifies the SmartCard NACK Transmission state.
+                                           This parameter can be a value of @ref SMARTCARD_NACK_State */
+}SMARTCARD_InitTypeDef;
+
+/**
+  * @brief HAL SMARTCARD State structures definition
+  * @note  HAL SMARTCARD State value is a combination of 2 different substates: gState and RxState.
+  *        - gState contains SMARTCARD state information related to global Handle management
+  *          and also information related to Tx operations.
+  *          gState value coding follow below described bitmap :
+  *          b7-b6  Error information
+  *             00 : No Error
+  *             01 : (Not Used)
+  *             10 : Timeout
+  *             11 : Error
+  *          b5     IP initilisation status
+  *             0  : Reset (IP not initialized)
+  *             1  : Init done (IP not initialized. HAL SMARTCARD Init function already called)
+  *          b4-b3  (not used)
+  *             xx : Should be set to 00
+  *          b2     Intrinsic process state
+  *             0  : Ready
+  *             1  : Busy (IP busy with some configuration or internal operations)
+  *          b1     (not used)
+  *             x  : Should be set to 0
+  *          b0     Tx state
+  *             0  : Ready (no Tx operation ongoing)
+  *             1  : Busy (Tx operation ongoing)
+  *        - RxState contains information related to Rx operations.
+  *          RxState value coding follow below described bitmap :
+  *          b7-b6  (not used)
+  *             xx : Should be set to 00
+  *          b5     IP initilisation status
+  *             0  : Reset (IP not initialized)
+  *             1  : Init done (IP not initialized)
+  *          b4-b2  (not used)
+  *            xxx : Should be set to 000
+  *          b1     Rx state
+  *             0  : Ready (no Rx operation ongoing)
+  *             1  : Busy (Rx operation ongoing)
+  *          b0     (not used)
+  *             x  : Should be set to 0.
+  */
+typedef enum
+{
+  HAL_SMARTCARD_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized
+                                                        Value is allowed for gState and RxState */
+  HAL_SMARTCARD_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
+                                                        Value is allowed for gState and RxState */
+  HAL_SMARTCARD_STATE_BUSY              = 0x24U,    /*!< an internal process is ongoing
+                                                        Value is allowed for gState only */
+  HAL_SMARTCARD_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing
+                                                        Value is allowed for gState only */
+  HAL_SMARTCARD_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
+                                                        Value is allowed for RxState only */
+  HAL_SMARTCARD_STATE_BUSY_TX_RX        = 0x23U,    /*!< Data Transmission and Reception process is ongoing
+                                                        Not to be used for neither gState nor RxState.
+                                                        Value is result of combination (Or) between gState and RxState values */
+  HAL_SMARTCARD_STATE_TIMEOUT           = 0xA0U,    /*!< Timeout state
+                                                        Value is allowed for gState only */
+  HAL_SMARTCARD_STATE_ERROR             = 0xE0U     /*!< Error
+                                                        Value is allowed for gState only */
+}HAL_SMARTCARD_StateTypeDef;
+
+/**
+  * @brief  SMARTCARD handle Structure definition
+  */
+typedef struct __SMARTCARD_HandleTypeDef
+{
+  USART_TypeDef                    *Instance;        /*!< USART registers base address */
+
+  SMARTCARD_InitTypeDef            Init;             /*!< SmartCard communication parameters */
+
+  uint8_t                          *pTxBuffPtr;      /*!< Pointer to SmartCard Tx transfer Buffer */
+
+  uint16_t                         TxXferSize;       /*!< SmartCard Tx Transfer size */
+
+  __IO uint16_t                    TxXferCount;      /*!< SmartCard Tx Transfer Counter */
+
+  uint8_t                          *pRxBuffPtr;      /*!< Pointer to SmartCard Rx transfer Buffer */
+
+  uint16_t                         RxXferSize;       /*!< SmartCard Rx Transfer size */
+
+  __IO uint16_t                    RxXferCount;      /*!< SmartCard Rx Transfer Counter */
+
+  DMA_HandleTypeDef                *hdmatx;          /*!< SmartCard Tx DMA Handle parameters */
+
+  DMA_HandleTypeDef                *hdmarx;          /*!< SmartCard Rx DMA Handle parameters */
+
+  HAL_LockTypeDef                  Lock;             /*!< Locking object */
+
+  __IO HAL_SMARTCARD_StateTypeDef  gState;           /*!< SmartCard state information related to global Handle management
+                                                        and also related to Tx operations.
+                                                        This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
+
+  __IO HAL_SMARTCARD_StateTypeDef  RxState;          /*!< SmartCard state information related to Rx operations.
+                                                        This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
+
+  __IO uint32_t                    ErrorCode;        /*!< SmartCard Error code */
+
+#if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1)
+  void (* TxCpltCallback)(struct __SMARTCARD_HandleTypeDef *hsc);            /*!< SMARTCARD Tx Complete Callback             */
+
+  void (* RxCpltCallback)(struct __SMARTCARD_HandleTypeDef *hsc);            /*!< SMARTCARD Rx Complete Callback             */
+
+  void (* ErrorCallback)(struct __SMARTCARD_HandleTypeDef *hsc);             /*!< SMARTCARD Error Callback                   */
+
+  void (* AbortCpltCallback)(struct __SMARTCARD_HandleTypeDef *hsc);         /*!< SMARTCARD Abort Complete Callback          */
+
+  void (* AbortTransmitCpltCallback)(struct __SMARTCARD_HandleTypeDef *hsc); /*!< SMARTCARD Abort Transmit Complete Callback */
+
+  void (* AbortReceiveCpltCallback)(struct __SMARTCARD_HandleTypeDef *hsc);  /*!< SMARTCARD Abort Receive Complete Callback  */
+
+  void (* MspInitCallback)(struct __SMARTCARD_HandleTypeDef *hsc);           /*!< SMARTCARD Msp Init callback                */
+
+  void (* MspDeInitCallback)(struct __SMARTCARD_HandleTypeDef *hsc);         /*!< SMARTCARD Msp DeInit callback              */
+#endif  /* USE_HAL_SMARTCARD_REGISTER_CALLBACKS */
+
+} SMARTCARD_HandleTypeDef;
+
+#if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1)
+/**
+  * @brief  HAL SMARTCARD Callback ID enumeration definition
+  */
+typedef enum
+{
+  HAL_SMARTCARD_TX_COMPLETE_CB_ID             = 0x00U,    /*!< SMARTCARD Tx Complete Callback ID             */
+  HAL_SMARTCARD_RX_COMPLETE_CB_ID             = 0x01U,    /*!< SMARTCARD Rx Complete Callback ID             */
+  HAL_SMARTCARD_ERROR_CB_ID                   = 0x02U,    /*!< SMARTCARD Error Callback ID                   */
+  HAL_SMARTCARD_ABORT_COMPLETE_CB_ID          = 0x03U,    /*!< SMARTCARD Abort Complete Callback ID          */
+  HAL_SMARTCARD_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x04U,    /*!< SMARTCARD Abort Transmit Complete Callback ID */
+  HAL_SMARTCARD_ABORT_RECEIVE_COMPLETE_CB_ID  = 0x05U,    /*!< SMARTCARD Abort Receive Complete Callback ID  */
+
+  HAL_SMARTCARD_MSPINIT_CB_ID                 = 0x08U,    /*!< SMARTCARD MspInit callback ID                 */
+  HAL_SMARTCARD_MSPDEINIT_CB_ID               = 0x09U     /*!< SMARTCARD MspDeInit callback ID               */
+
+} HAL_SMARTCARD_CallbackIDTypeDef;
+
+/**
+  * @brief  HAL SMARTCARD Callback pointer definition
+  */
+typedef  void (*pSMARTCARD_CallbackTypeDef)(SMARTCARD_HandleTypeDef *hsc);  /*!< pointer to an SMARTCARD callback function */
+
+#endif /* USE_HAL_SMARTCARD_REGISTER_CALLBACKS */
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup SMARTCARD_Exported_Constants  SMARTCARD Exported constants
+  * @{
+  */
+
+/** @defgroup SMARTCARD_Error_Code SMARTCARD Error Code
+  * @{
+  */
+#define HAL_SMARTCARD_ERROR_NONE             0x00000000U   /*!< No error            */
+#define HAL_SMARTCARD_ERROR_PE               0x00000001U   /*!< Parity error        */
+#define HAL_SMARTCARD_ERROR_NE               0x00000002U   /*!< Noise error         */
+#define HAL_SMARTCARD_ERROR_FE               0x00000004U   /*!< Frame error         */
+#define HAL_SMARTCARD_ERROR_ORE              0x00000008U   /*!< Overrun error       */
+#define HAL_SMARTCARD_ERROR_DMA              0x00000010U   /*!< DMA transfer error  */
+#if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1)
+#define HAL_SMARTCARD_ERROR_INVALID_CALLBACK 0x00000020U   /*!< Invalid Callback error  */
+#endif /* USE_HAL_SMARTCARD_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Word_Length SMARTCARD Word Length
+  * @{
+  */
+#define SMARTCARD_WORDLENGTH_9B             ((uint32_t)USART_CR1_M)
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Stop_Bits SMARTCARD Number of Stop Bits
+  * @{
+  */
+#define SMARTCARD_STOPBITS_0_5              ((uint32_t)USART_CR2_STOP_0)
+#define SMARTCARD_STOPBITS_1_5              ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Parity SMARTCARD Parity
+  * @{
+  */
+#define SMARTCARD_PARITY_EVEN               ((uint32_t)USART_CR1_PCE)
+#define SMARTCARD_PARITY_ODD                ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Mode SMARTCARD Mode
+  * @{
+  */
+#define SMARTCARD_MODE_RX                   ((uint32_t)USART_CR1_RE)
+#define SMARTCARD_MODE_TX                   ((uint32_t)USART_CR1_TE)
+#define SMARTCARD_MODE_TX_RX                ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Clock_Polarity SMARTCARD Clock Polarity
+  * @{
+  */
+#define SMARTCARD_POLARITY_LOW              0x00000000U
+#define SMARTCARD_POLARITY_HIGH             ((uint32_t)USART_CR2_CPOL)
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Clock_Phase  SMARTCARD Clock Phase
+  * @{
+  */
+#define SMARTCARD_PHASE_1EDGE               0x00000000U
+#define SMARTCARD_PHASE_2EDGE               ((uint32_t)USART_CR2_CPHA)
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Last_Bit  SMARTCARD Last Bit
+  * @{
+  */
+#define SMARTCARD_LASTBIT_DISABLE           0x00000000U
+#define SMARTCARD_LASTBIT_ENABLE            ((uint32_t)USART_CR2_LBCL)
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_NACK_State  SMARTCARD NACK State
+  * @{
+  */
+#define SMARTCARD_NACK_ENABLE               ((uint32_t)USART_CR3_NACK)
+#define SMARTCARD_NACK_DISABLE              0x00000000U
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_DMA_Requests   SMARTCARD DMA requests
+  * @{
+  */
+#define SMARTCARD_DMAREQ_TX                 ((uint32_t)USART_CR3_DMAT)
+#define SMARTCARD_DMAREQ_RX                 ((uint32_t)USART_CR3_DMAR)
+/**
+  * @}
+  */
+
+/** @defgroup SMARTCARD_Prescaler SMARTCARD Prescaler
+  * @{
+  */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV2     0x00000001U          /*!< SYSCLK divided by 2 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV4     0x00000002U          /*!< SYSCLK divided by 4 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV6     0x00000003U          /*!< SYSCLK divided by 6 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV8     0x00000004U          /*!< SYSCLK divided by 8 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV10    0x00000005U          /*!< SYSCLK divided by 10 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV12    0x00000006U          /*!< SYSCLK divided by 12 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV14    0x00000007U          /*!< SYSCLK divided by 14 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV16    0x00000008U          /*!< SYSCLK divided by 16 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV18    0x00000009U          /*!< SYSCLK divided by 18 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV20    0x0000000AU          /*!< SYSCLK divided by 20 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV22    0x0000000BU          /*!< SYSCLK divided by 22 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV24    0x0000000CU          /*!< SYSCLK divided by 24 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV26    0x0000000DU          /*!< SYSCLK divided by 26 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV28    0x0000000EU          /*!< SYSCLK divided by 28 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV30    0x0000000FU          /*!< SYSCLK divided by 30 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV32    0x00000010U          /*!< SYSCLK divided by 32 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV34    0x00000011U          /*!< SYSCLK divided by 34 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV36    0x00000012U          /*!< SYSCLK divided by 36 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV38    0x00000013U          /*!< SYSCLK divided by 38 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV40    0x00000014U          /*!< SYSCLK divided by 40 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV42    0x00000015U          /*!< SYSCLK divided by 42 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV44    0x00000016U          /*!< SYSCLK divided by 44 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV46    0x00000017U          /*!< SYSCLK divided by 46 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV48    0x00000018U          /*!< SYSCLK divided by 48 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV50    0x00000019U          /*!< SYSCLK divided by 50 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV52    0x0000001AU          /*!< SYSCLK divided by 52 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV54    0x0000001BU          /*!< SYSCLK divided by 54 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV56    0x0000001CU          /*!< SYSCLK divided by 56 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV58    0x0000001DU          /*!< SYSCLK divided by 58 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV60    0x0000001EU          /*!< SYSCLK divided by 60 */
+#define SMARTCARD_PRESCALER_SYSCLK_DIV62    0x0000001FU          /*!< SYSCLK divided by 62 */
+/**
+  * @}
+  */
+
+/** @defgroup SmartCard_Flags SMARTCARD Flags
+  *        Elements values convention: 0xXXXX
+  *           - 0xXXXX  : Flag mask in the SR register
+  * @{
+  */
+#define SMARTCARD_FLAG_TXE                  ((uint32_t)USART_SR_TXE)
+#define SMARTCARD_FLAG_TC                   ((uint32_t)USART_SR_TC)
+#define SMARTCARD_FLAG_RXNE                 ((uint32_t)USART_SR_RXNE)
+#define SMARTCARD_FLAG_IDLE                 ((uint32_t)USART_SR_IDLE)
+#define SMARTCARD_FLAG_ORE                  ((uint32_t)USART_SR_ORE)
+#define SMARTCARD_FLAG_NE                   ((uint32_t)USART_SR_NE)
+#define SMARTCARD_FLAG_FE                   ((uint32_t)USART_SR_FE)
+#define SMARTCARD_FLAG_PE                   ((uint32_t)USART_SR_PE)
+/**
+  * @}
+  */
+
+/** @defgroup SmartCard_Interrupt_definition SMARTCARD Interrupts Definition
+  *        Elements values convention: 0xY000XXXX
+  *           - XXXX  : Interrupt mask in the Y register
+  *           - Y  : Interrupt source register (2bits)
+  *                 - 01: CR1 register
+  *                 - 11: CR3 register
+  * @{
+  */
+#define SMARTCARD_IT_PE                     ((uint32_t)(SMARTCARD_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
+#define SMARTCARD_IT_TXE                    ((uint32_t)(SMARTCARD_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
+#define SMARTCARD_IT_TC                     ((uint32_t)(SMARTCARD_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
+#define SMARTCARD_IT_RXNE                   ((uint32_t)(SMARTCARD_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
+#define SMARTCARD_IT_IDLE                   ((uint32_t)(SMARTCARD_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
+#define SMARTCARD_IT_ERR                    ((uint32_t)(SMARTCARD_CR3_REG_INDEX << 28U | USART_CR3_EIE))
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup SMARTCARD_Exported_Macros SMARTCARD Exported Macros
+  * @{
+  */
+
+/** @brief Reset SMARTCARD handle gstate & RxState
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#if USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1
+#define __HAL_SMARTCARD_RESET_HANDLE_STATE(__HANDLE__)  do{                                                       \
+                                                           (__HANDLE__)->gState = HAL_SMARTCARD_STATE_RESET;      \
+                                                           (__HANDLE__)->RxState = HAL_SMARTCARD_STATE_RESET;     \
+                                                           (__HANDLE__)->MspInitCallback = NULL;                  \
+                                                           (__HANDLE__)->MspDeInitCallback = NULL;                \
+                                                          } while(0U)
+#else
+#define __HAL_SMARTCARD_RESET_HANDLE_STATE(__HANDLE__)  do{                                                       \
+                                                           (__HANDLE__)->gState = HAL_SMARTCARD_STATE_RESET;      \
+                                                           (__HANDLE__)->RxState = HAL_SMARTCARD_STATE_RESET;     \
+                                                          } while(0U)
+#endif /*USE_HAL_SMARTCARD_REGISTER_CALLBACKS  */
+
+/** @brief  Flush the Smartcard DR register
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
+
+/** @brief  Check whether the specified Smartcard flag is set or not.
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @param  __FLAG__ specifies the flag to check.
+  *        This parameter can be one of the following values:
+  *            @arg SMARTCARD_FLAG_TXE:  Transmit data register empty flag
+  *            @arg SMARTCARD_FLAG_TC:   Transmission Complete flag
+  *            @arg SMARTCARD_FLAG_RXNE: Receive data register not empty flag
+  *            @arg SMARTCARD_FLAG_IDLE: Idle Line detection flag
+  *            @arg SMARTCARD_FLAG_ORE:  Overrun Error flag
+  *            @arg SMARTCARD_FLAG_NE:   Noise Error flag
+  *            @arg SMARTCARD_FLAG_FE:   Framing Error flag
+  *            @arg SMARTCARD_FLAG_PE:   Parity Error flag
+  * @retval The new state of __FLAG__ (TRUE or FALSE).
+  */
+#define __HAL_SMARTCARD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
+
+/** @brief  Clear the specified Smartcard pending flags.
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @param  __FLAG__ specifies the flag to check.
+  *          This parameter can be any combination of the following values:
+  *            @arg SMARTCARD_FLAG_TC:   Transmission Complete flag.
+  *            @arg SMARTCARD_FLAG_RXNE: Receive data register not empty flag.
+  *
+  * @note   PE (Parity error), FE (Framing error), NE (Noise error) and ORE (Overrun
+  *          error) flags are cleared by software sequence: a read operation to
+  *          USART_SR register followed by a read operation to USART_DR register.
+  * @note   RXNE flag can be also cleared by a read to the USART_DR register.
+  * @note   TC flag can be also cleared by software sequence: a read operation to
+  *          USART_SR register followed by a write operation to USART_DR register.
+  * @note   TXE flag is cleared only by a write to the USART_DR register.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
+
+/** @brief  Clear the SMARTCARD PE pending flag.
+  * @param  __HANDLE__ specifies the USART Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)  \
+    do{                                           \
+      __IO uint32_t tmpreg = 0x00U;               \
+      tmpreg = (__HANDLE__)->Instance->SR;        \
+      tmpreg = (__HANDLE__)->Instance->DR;        \
+      UNUSED(tmpreg);                             \
+    } while(0U)
+
+/** @brief  Clear the SMARTCARD FE pending flag.
+  * @param  __HANDLE__ specifies the USART Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_FEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the SMARTCARD NE pending flag.
+  * @param  __HANDLE__ specifies the USART Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_NEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the SMARTCARD ORE pending flag.
+  * @param  __HANDLE__ specifies the USART Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_OREFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Clear the SMARTCARD IDLE pending flag.
+  * @param  __HANDLE__ specifies the USART Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_IDLEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)
+
+/** @brief  Enable the specified SmartCard interrupt.
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @param  __INTERRUPT__ specifies the SMARTCARD interrupt to enable.
+  *          This parameter can be one of the following values:
+  *            @arg SMARTCARD_IT_TXE:  Transmit Data Register empty interrupt
+  *            @arg SMARTCARD_IT_TC:   Transmission complete interrupt
+  *            @arg SMARTCARD_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg SMARTCARD_IT_IDLE: Idle line detection interrupt
+  *            @arg SMARTCARD_IT_PE:   Parity Error interrupt
+  *            @arg SMARTCARD_IT_ERR:  Error interrupt(Frame error, noise error, overrun error)
+  * @retval None
+  */
+#define __HAL_SMARTCARD_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((((__INTERRUPT__) >> 28U) == SMARTCARD_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & SMARTCARD_IT_MASK)): \
+                                                                 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & SMARTCARD_IT_MASK)))
+
+/** @brief  Disable the specified SmartCard interrupt.
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @param  __INTERRUPT__ specifies the SMARTCARD interrupt to disable.
+  *          This parameter can be one of the following values:
+  *            @arg SMARTCARD_IT_TXE:  Transmit Data Register empty interrupt
+  *            @arg SMARTCARD_IT_TC:   Transmission complete interrupt
+  *            @arg SMARTCARD_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg SMARTCARD_IT_IDLE: Idle line detection interrupt
+  *            @arg SMARTCARD_IT_PE:   Parity Error interrupt
+  *            @arg SMARTCARD_IT_ERR:  Error interrupt(Frame error, noise error, overrun error)
+  * @retval None
+  */
+#define __HAL_SMARTCARD_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((((__INTERRUPT__) >> 28U) == SMARTCARD_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & SMARTCARD_IT_MASK)): \
+                                                                 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & SMARTCARD_IT_MASK)))
+
+/** @brief  Checks whether the specified SmartCard interrupt has occurred or not.
+  * @param  __HANDLE__ specifies the SmartCard Handle.
+  * @param  __IT__ specifies the SMARTCARD interrupt source to check.
+  *          This parameter can be one of the following values:
+  *            @arg SMARTCARD_IT_TXE: Transmit Data Register empty interrupt
+  *            @arg SMARTCARD_IT_TC:  Transmission complete interrupt
+  *            @arg SMARTCARD_IT_RXNE: Receive Data register not empty interrupt
+  *            @arg SMARTCARD_IT_IDLE: Idle line detection interrupt
+  *            @arg SMARTCARD_IT_ERR: Error interrupt
+  *            @arg SMARTCARD_IT_PE: Parity Error interrupt
+  * @retval The new state of __IT__ (TRUE or FALSE).
+  */
+#define __HAL_SMARTCARD_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == SMARTCARD_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1: (__HANDLE__)->Instance->CR3) & (((uint32_t)(__IT__)) & SMARTCARD_IT_MASK))
+
+/** @brief  Macro to enable the SMARTCARD's one bit sample method
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
+
+/** @brief  Macro to disable the SMARTCARD's one bit sample method
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
+
+/** @brief  Enable the USART associated to the SMARTCARD Handle
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_ENABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR1 |=  USART_CR1_UE)
+
+/** @brief  Disable the USART associated to the SMARTCARD Handle
+  * @param  __HANDLE__ specifies the SMARTCARD Handle.
+  *         SMARTCARD Handle selects the USARTx peripheral (USART availability and x value depending on device).
+  * @retval None
+  */
+#define __HAL_SMARTCARD_DISABLE(__HANDLE__)  ((__HANDLE__)->Instance->CR1 &=  ~USART_CR1_UE)
+
+/** @brief  Macros to enable the SmartCard DMA request.
+  * @param  __HANDLE__ specifies the SmartCard Handle.
+  * @param  __REQUEST__ specifies the SmartCard DMA request.
+  *          This parameter can be one of the following values:
+  *            @arg SMARTCARD_DMAREQ_TX: SmartCard DMA transmit request
+  *            @arg SMARTCARD_DMAREQ_RX: SmartCard DMA receive request
+  * @retval None
+  */
+#define __HAL_SMARTCARD_DMA_REQUEST_ENABLE(__HANDLE__, __REQUEST__)    ((__HANDLE__)->Instance->CR3 |=  (__REQUEST__))
+
+/** @brief  Macros to disable the SmartCard DMA request.
+  * @param  __HANDLE__ specifies the SmartCard Handle.
+  * @param  __REQUEST__ specifies the SmartCard DMA request.
+  *          This parameter can be one of the following values:
+  *            @arg SMARTCARD_DMAREQ_TX: SmartCard DMA transmit request
+  *            @arg SMARTCARD_DMAREQ_RX: SmartCard DMA receive request
+  * @retval None
+  */
+#define __HAL_SMARTCARD_DMA_REQUEST_DISABLE(__HANDLE__, __REQUEST__)   ((__HANDLE__)->Instance->CR3 &=  ~(__REQUEST__))
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @addtogroup SMARTCARD_Exported_Functions
+  * @{
+  */
+
+/** @addtogroup SMARTCARD_Exported_Functions_Group1
+  * @{
+  */
+/* Initialization/de-initialization functions  **********************************/
+HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_ReInit(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsc);
+#if (USE_HAL_SMARTCARD_REGISTER_CALLBACKS == 1)
+/* Callbacks Register/UnRegister functions  ***********************************/
+HAL_StatusTypeDef HAL_SMARTCARD_RegisterCallback(SMARTCARD_HandleTypeDef *hsc, HAL_SMARTCARD_CallbackIDTypeDef CallbackID, pSMARTCARD_CallbackTypeDef pCallback);
+HAL_StatusTypeDef HAL_SMARTCARD_UnRegisterCallback(SMARTCARD_HandleTypeDef *hsc, HAL_SMARTCARD_CallbackIDTypeDef CallbackID);
+#endif /* USE_HAL_SMARTCARD_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/** @addtogroup SMARTCARD_Exported_Functions_Group2
+  * @{
+  */
+/* IO operation functions *******************************************************/
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
+/* Transfer Abort functions */
+HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsc);
+
+void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_AbortCpltCallback(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_AbortTransmitCpltCallback(SMARTCARD_HandleTypeDef *hsc);
+void HAL_SMARTCARD_AbortReceiveCpltCallback(SMARTCARD_HandleTypeDef *hsc);
+/**
+  * @}
+  */
+
+/** @addtogroup SMARTCARD_Exported_Functions_Group3
+  * @{
+  */
+/* Peripheral State functions  **************************************************/
+HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsc);
+uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsc);
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup SMARTCARD_Private_Constants SMARTCARD Private Constants
+  * @{
+  */
+
+/** @brief SMARTCARD interruptions flag mask
+  *
+  */
+#define SMARTCARD_IT_MASK                   ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
+                                                        USART_CR1_IDLEIE | USART_CR3_EIE )
+
+#define SMARTCARD_CR1_REG_INDEX             1U
+#define SMARTCARD_CR3_REG_INDEX             3U
+/**
+  * @}
+  */
+
+/* Private macros --------------------------------------------------------*/
+/** @defgroup SMARTCARD_Private_Macros   SMARTCARD Private Macros
+  * @{
+  */
+#define IS_SMARTCARD_WORD_LENGTH(LENGTH)    ((LENGTH) == SMARTCARD_WORDLENGTH_9B)
+#define IS_SMARTCARD_STOPBITS(STOPBITS)     (((STOPBITS) == SMARTCARD_STOPBITS_0_5) || \
+                                             ((STOPBITS) == SMARTCARD_STOPBITS_1_5))
+#define IS_SMARTCARD_PARITY(PARITY)         (((PARITY) == SMARTCARD_PARITY_EVEN) || \
+                                             ((PARITY) == SMARTCARD_PARITY_ODD))
+#define IS_SMARTCARD_MODE(MODE)             ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x000000U))
+#define IS_SMARTCARD_POLARITY(CPOL)         (((CPOL) == SMARTCARD_POLARITY_LOW) || ((CPOL) == SMARTCARD_POLARITY_HIGH))
+#define IS_SMARTCARD_PHASE(CPHA)            (((CPHA) == SMARTCARD_PHASE_1EDGE) || ((CPHA) == SMARTCARD_PHASE_2EDGE))
+#define IS_SMARTCARD_LASTBIT(LASTBIT)       (((LASTBIT) == SMARTCARD_LASTBIT_DISABLE) || \
+                                             ((LASTBIT) == SMARTCARD_LASTBIT_ENABLE))
+#define IS_SMARTCARD_NACK_STATE(NACK)       (((NACK) == SMARTCARD_NACK_ENABLE) || \
+                                             ((NACK) == SMARTCARD_NACK_DISABLE))
+#define IS_SMARTCARD_BAUDRATE(BAUDRATE)     ((BAUDRATE) < 2000001U)
+
+#define SMARTCARD_DIV(__PCLK__, __BAUD__)                (((__PCLK__)*25U)/(4U*(__BAUD__)))
+#define SMARTCARD_DIVMANT(__PCLK__, __BAUD__)            (SMARTCARD_DIV((__PCLK__), (__BAUD__))/100U)
+#define SMARTCARD_DIVFRAQ(__PCLK__, __BAUD__)            ((((SMARTCARD_DIV((__PCLK__), (__BAUD__)) - (SMARTCARD_DIVMANT((__PCLK__), (__BAUD__)) * 100U)) * 16U) + 50U) / 100U)
+/* SMARTCARD BRR = mantissa + overflow + fraction
+            = (SMARTCARD DIVMANT << 4) + (SMARTCARD DIVFRAQ & 0xF0) + (SMARTCARD DIVFRAQ & 0x0FU) */
+#define SMARTCARD_BRR(__PCLK__, __BAUD__)       (((SMARTCARD_DIVMANT((__PCLK__), (__BAUD__)) << 4U) + \
+                                                 (SMARTCARD_DIVFRAQ((__PCLK__), (__BAUD__)) & 0xF0U)) + \
+                                                 (SMARTCARD_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x0FU))
+
+/**
+  * @}
+  */
+
+/* Private functions ---------------------------------------------------------*/
+/** @defgroup SMARTCARD_Private_Functions SMARTCARD Private Functions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L1xx_HAL_SMARTCARD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/