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Replace __attribute__((cmse_nonsecure_entry)) with compiler agnostic __NONSECURE_ENTRY

pull/7631/head
ccli8 2018-04-13 19:43:20 +08:00 committed by Cruz Monrreal II
parent 07b21b42e5
commit 0e6a76f113
6 changed files with 27 additions and 27 deletions
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18
targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.c
View File

@ -114,7 +114,7 @@ void CLK_Idle(void)
*/ */
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetHXTFreq(void) uint32_t CLK_GetHXTFreq(void)
{ {
uint32_t u32Freq = 0UL; uint32_t u32Freq = 0UL;
@ -142,7 +142,7 @@ uint32_t CLK_GetHXTFreq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetLXTFreq(void) uint32_t CLK_GetLXTFreq(void)
{ {
uint32_t u32Freq = 0UL; uint32_t u32Freq = 0UL;
@ -169,7 +169,7 @@ uint32_t CLK_GetLXTFreq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetHCLKFreq(void) uint32_t CLK_GetHCLKFreq(void)
{ {
SystemCoreClockUpdate(); SystemCoreClockUpdate();
@ -186,7 +186,7 @@ uint32_t CLK_GetHCLKFreq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetPCLK0Freq(void) uint32_t CLK_GetPCLK0Freq(void)
{ {
SystemCoreClockUpdate(); SystemCoreClockUpdate();
@ -203,7 +203,7 @@ uint32_t CLK_GetPCLK0Freq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetPCLK1Freq(void) uint32_t CLK_GetPCLK1Freq(void)
{ {
SystemCoreClockUpdate(); SystemCoreClockUpdate();
@ -220,7 +220,7 @@ uint32_t CLK_GetPCLK1Freq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetCPUFreq(void) uint32_t CLK_GetCPUFreq(void)
{ {
uint32_t u32Freq, u32HclkSrc, u32HclkDiv; uint32_t u32Freq, u32HclkSrc, u32HclkDiv;
@ -1080,7 +1080,7 @@ void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerTy
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetPLLClockFreq(void) uint32_t CLK_GetPLLClockFreq(void)
{ {
uint32_t u32PllFreq = 0UL, u32PllReg; uint32_t u32PllFreq = 0UL, u32PllReg;
@ -1169,7 +1169,7 @@ uint32_t CLK_GetPLLClockFreq(void)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx) uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
{ {
uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL; uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL;
@ -1229,7 +1229,7 @@ uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
//__NONSECURE_ENTRY_WEAK //__NONSECURE_ENTRY_WEAK
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
uint32_t CLK_GetModuleClockDivider(uint32_t u32ModuleIdx) uint32_t CLK_GetModuleClockDivider(uint32_t u32ModuleIdx)
{ {
uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL; uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL;

2
targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_sys.c
View File

@ -165,7 +165,7 @@ void SYS_ResetCPU(void)
* @details This function reset selected module. * @details This function reset selected module.
*/ */
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void SYS_ResetModule(uint32_t u32ModuleIndex) void SYS_ResetModule(uint32_t u32ModuleIndex)
{ {
uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL; uint32_t u32tmpVal = 0UL, u32tmpAddr = 0UL;

8
targets/TARGET_NUVOTON/TARGET_M2351/device/m2351_stddriver_sup.c
View File

@ -133,7 +133,7 @@ static const nu_modidx_ns_t modidx_ns_tab[] = {
*/ */
static bool check_mod_ns(int modclass, uint32_t modidx); static bool check_mod_ns(int modclass, uint32_t modidx);
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void SYS_ResetModule_S(uint32_t u32ModuleIndex) void SYS_ResetModule_S(uint32_t u32ModuleIndex)
{ {
/* Guard access to secure module from non-secure domain */ /* Guard access to secure module from non-secure domain */
@ -145,7 +145,7 @@ void SYS_ResetModule_S(uint32_t u32ModuleIndex)
SYS_ResetModule(u32ModuleIndex); SYS_ResetModule(u32ModuleIndex);
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void CLK_SetModuleClock_S(uint32_t u32ModuleIndex, uint32_t u32ClkSrc, uint32_t u32ClkDiv) void CLK_SetModuleClock_S(uint32_t u32ModuleIndex, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
{ {
/* Guard access to secure module from non-secure domain */ /* Guard access to secure module from non-secure domain */
@ -157,7 +157,7 @@ void CLK_SetModuleClock_S(uint32_t u32ModuleIndex, uint32_t u32ClkSrc, uint32_t
CLK_SetModuleClock(u32ModuleIndex, u32ClkSrc, u32ClkDiv); CLK_SetModuleClock(u32ModuleIndex, u32ClkSrc, u32ClkDiv);
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void CLK_EnableModuleClock_S(uint32_t u32ModuleIndex) void CLK_EnableModuleClock_S(uint32_t u32ModuleIndex)
{ {
/* Guard access to secure module from non-secure domain */ /* Guard access to secure module from non-secure domain */
@ -169,7 +169,7 @@ void CLK_EnableModuleClock_S(uint32_t u32ModuleIndex)
CLK_EnableModuleClock(u32ModuleIndex); CLK_EnableModuleClock(u32ModuleIndex);
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void CLK_DisableModuleClock_S(uint32_t u32ModuleIndex) void CLK_DisableModuleClock_S(uint32_t u32ModuleIndex)
{ {
/* Guard access to secure module from non-secure domain */ /* Guard access to secure module from non-secure domain */

2
targets/TARGET_NUVOTON/TARGET_M2351/pinmap.c
View File

@ -26,7 +26,7 @@
*/ */
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void pin_function(PinName pin, int data) void pin_function(PinName pin, int data)
{ {
MBED_ASSERT(pin != (PinName)NC); MBED_ASSERT(pin != (PinName)NC);

20
targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c
View File

@ -38,15 +38,15 @@
/* As of ARM Compiler 6.9, we meet some NSC functions are missing in secure gateway /* As of ARM Compiler 6.9, we meet some NSC functions are missing in secure gateway
* import library (cmse_lib.o) in secure build. Per test, we could get around it by * import library (cmse_lib.o) in secure build. Per test, we could get around it by
* adding declaration for NSC functions. */ * adding declaration for NSC functions. */
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_init(void); void rtc_init(void);
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_free(void); void rtc_free(void);
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
int rtc_isenabled(void); int rtc_isenabled(void);
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
time_t rtc_read(void); time_t rtc_read(void);
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_write(time_t t); void rtc_write(time_t t);
/* Micro seconds per second */ /* Micro seconds per second */
@ -111,7 +111,7 @@ static void rtc_convert_datetime_hwrtc_to_tm(struct tm *datetime_tm, const S_RTC
static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL}; static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL};
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_init(void) void rtc_init(void)
{ {
if (rtc_isenabled()) { if (rtc_isenabled()) {
@ -124,13 +124,13 @@ void rtc_init(void)
rtc_write(0); rtc_write(0);
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_free(void) void rtc_free(void)
{ {
// N/A // N/A
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
int rtc_isenabled(void) int rtc_isenabled(void)
{ {
// NOTE: To access (RTC) registers, clock must be enabled first. // NOTE: To access (RTC) registers, clock must be enabled first.
@ -145,7 +145,7 @@ int rtc_isenabled(void)
return !! (rtc_base->INIT & RTC_INIT_ACTIVE_Msk); return !! (rtc_base->INIT & RTC_INIT_ACTIVE_Msk);
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
time_t rtc_read(void) time_t rtc_read(void)
{ {
/* NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency. /* NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency.
@ -186,7 +186,7 @@ time_t rtc_read(void)
return t_present; return t_present;
} }
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void rtc_write(time_t t) void rtc_write(time_t t)
{ {
if (! rtc_isenabled()) { if (! rtc_isenabled()) {

4
targets/TARGET_NUVOTON/TARGET_M2351/sleep.c
View File

@ -28,7 +28,7 @@
/** /**
* Enter idle mode, in which just CPU is halted. * Enter idle mode, in which just CPU is halted.
*/ */
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void hal_sleep(void) void hal_sleep(void)
{ {
SYS_UnlockReg(); SYS_UnlockReg();
@ -39,7 +39,7 @@ void hal_sleep(void)
/** /**
* Enter power-down mode, in which HXT/HIRC are halted. * Enter power-down mode, in which HXT/HIRC are halted.
*/ */
__attribute__((cmse_nonsecure_entry)) __NONSECURE_ENTRY
void hal_deepsleep(void) void hal_deepsleep(void)
{ {
SYS_UnlockReg(); SYS_UnlockReg();