From 0c8add6e28d03ed56eecbd20cd563faf94bfb1da Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Tue, 11 Feb 2020 17:59:31 +0100 Subject: [PATCH] DISCO_H747I_CM4 compilation issue SCB_DisableDCache() function is only available for M7 core. --- .../TARGET_STM32H7/TARGET_DISCO_H747I/stm32h7_eth_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/features/netsocket/emac-drivers/TARGET_STM/TARGET_STM32H7/TARGET_DISCO_H747I/stm32h7_eth_init.c b/features/netsocket/emac-drivers/TARGET_STM/TARGET_STM32H7/TARGET_DISCO_H747I/stm32h7_eth_init.c index 193ea35367..5255724adc 100644 --- a/features/netsocket/emac-drivers/TARGET_STM/TARGET_STM32H7/TARGET_DISCO_H747I/stm32h7_eth_init.c +++ b/features/netsocket/emac-drivers/TARGET_STM/TARGET_STM32H7/TARGET_DISCO_H747I/stm32h7_eth_init.c @@ -64,8 +64,10 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) { GPIO_InitTypeDef GPIO_InitStruct; if (heth->Instance == ETH) { +#if defined(CORE_CM7) /* Disable DCache for STM32H7 family */ SCB_DisableDCache(); +#endif /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE();