From 0c4c3c44dbcfc7335f30e9750af8b50dc6b2ec1a Mon Sep 17 00:00:00 2001 From: TomoYamanaka Date: Tue, 25 Sep 2018 13:53:49 +0900 Subject: [PATCH] Change MTU2 channel number for LPTicker of GR-LYCHEE MTU2(Multi function Timer pulse Unit 2) can create the low freaquency. Currently GR-LYCHEE uses MTU2 channel 3 for LPTicker, but I noticed that a part of it is used by another function. Thus, I changed MTU2 channel number for LPTicker to 2. --- .../TARGET_RZ_A1XX/TARGET_GR_LYCHEE/PeripheralPins.c | 9 +++++---- .../TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h | 2 +- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/PeripheralPins.c b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/PeripheralPins.c index 6ddd72e438..d33fa7394c 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/PeripheralPins.c +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/PeripheralPins.c @@ -246,10 +246,11 @@ const PinMap PinMap_PWM[] = { {P7_9 , PWM_TIOC1A, 6}, {P9_2 , PWM_TIOC1A, 5}, /* for 208QFP */ {P2_7 , PWM_TIOC1A, 3}, - {P5_14 , PWM_TIOC2A, 4}, - {P7_0 , PWM_TIOC2A, 5}, - {P9_4 , PWM_TIOC2A, 5}, /* for 208QFP */ - {P2_6 , PWM_TIOC2A, 3}, + {P6_7 , PWM_TIOC3A, 5}, + {P2_5 , PWM_TIOC3A, 3}, + {P3_11 , PWM_TIOC3A, 3}, + {P6_9 , PWM_TIOC3C, 5}, + {P3_12 , PWM_TIOC3C, 3}, {P5_8 , PWM_TIOC4A, 3}, {P2_4 , PWM_TIOC4A, 3}, {P5_10 , PWM_TIOC4C, 3}, diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h index dad976cd3d..97f9962c09 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h @@ -34,7 +34,7 @@ #define RENESAS_RZ_A1_P0_CLK CM1_RENESAS_RZ_A1_P0_CLK -#define LP_TICKER_MTU2_CH 3 +#define LP_TICKER_MTU2_CH 2 /* flash (W25Q64JV) */ #define FLASH_BASE (0x18000000UL) /**< Flash Base Address */