diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/PeripheralPins.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/PeripheralPins.c index 95baad0840..79f7f1933e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/PeripheralPins.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/PeripheralPins.c @@ -100,6 +100,37 @@ const PinMap PinMap_I2C_SCL[] = { {PF7, I2C_0, 30}, {PA0, I2C_0, 31}, + {PA7, I2C_1, 0}, + {PA8, I2C_1, 1}, + {PA9, I2C_1, 2}, + {PI2, I2C_1, 3}, + {PI3, I2C_1, 4}, + {PB6, I2C_1, 5}, + {PB7, I2C_1, 6}, + {PB8, I2C_1, 7}, + {PB9, I2C_1, 8}, + {PB10, I2C_1, 9}, + {PJ14, I2C_1, 10}, + {PJ15, I2C_1, 11}, + {PC0, I2C_1, 12}, + {PC1, I2C_1, 13}, + {PC2, I2C_1, 14}, + {PC3, I2C_1, 15}, + {PC4, I2C_1, 16}, + {PC5, I2C_1, 17}, + {PF8, I2C_1, 20}, + {PF9, I2C_1, 21}, + {PF10, I2C_1, 22}, + {PF11, I2C_1, 23}, + {PF12, I2C_1, 24}, + {PF13, I2C_1, 25}, + {PF14, I2C_1, 26}, + {PF15, I2C_1, 27}, + {PK0, I2C_1, 28}, + {PK1, I2C_1, 29}, + {PK2, I2C_1, 30}, + {PA6, I2C_1, 31}, + {NC , NC , NC} }; @@ -139,7 +170,39 @@ const PinMap PinMap_I2C_SDA[] = { {PF6, I2C_0, 30}, {PF7, I2C_0, 31}, + {PA6, I2C_1, 0}, + {PA7, I2C_1, 1}, + {PA8, I2C_1, 2}, + {PA9, I2C_1, 3}, + {PI2, I2C_1, 4}, + {PI3, I2C_1, 5}, + {PB6, I2C_1, 6}, + {PB7, I2C_1, 7}, + {PB8, I2C_1, 8}, + {PB9, I2C_1, 9}, + {PB10, I2C_1, 10}, + {PJ14, I2C_1, 11}, + {PJ15, I2C_1, 12}, + {PC0, I2C_1, 13}, + {PC1, I2C_1, 14}, + {PC2, I2C_1, 15}, + {PC3, I2C_1, 16}, + {PC4, I2C_1, 17}, + {PC5, I2C_1, 18}, + {PF8, I2C_1, 21}, + {PF9, I2C_1, 22}, + {PF10, I2C_1, 23}, + {PF11, I2C_1, 24}, + {PF12, I2C_1, 25}, + {PF13, I2C_1, 26}, + {PF14, I2C_1, 27}, + {PF15, I2C_1, 28}, + {PK0, I2C_1, 29}, + {PK1, I2C_1, 30}, + {PK2, I2C_1, 31}, + /* Not connected */ + {NC , NC , NC} }; @@ -220,6 +283,42 @@ const PinMap PinMap_SPI_MOSI[] = { {PF6, SPI_1, 30}, {PF7, SPI_1, 31}, + /* USART2 */ + {PA6, SPI_2, 1}, + {PA7, SPI_2, 2}, + {PA8, SPI_2, 3}, + {PA9, SPI_2, 4}, + {PI0, SPI_2, 5}, + {PI1, SPI_2, 6}, + {PI2, SPI_2, 7}, + {PI3, SPI_2, 8}, + {PB6, SPI_2, 9}, + {PB7, SPI_2, 10}, + {PB8, SPI_2, 11}, + {PB9, SPI_2, 12}, + {PB10, SPI_2, 13}, + {PF8, SPI_2, 21}, + {PF9, SPI_2, 22}, + {PF10, SPI_2, 23}, + {PF11, SPI_2, 24}, + {PF12, SPI_2, 25}, + {PF13, SPI_2, 26}, + {PF14, SPI_2, 27}, + {PF15, SPI_2, 28}, + {PK0, SPI_2, 29}, + {PK1, SPI_2, 30}, + {PK2, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 16}, + {PJ15, SPI_3, 17}, + {PC0, SPI_3, 18}, + {PC1, SPI_3, 19}, + {PC2, SPI_3, 20}, + {PC3, SPI_3, 21}, + {PC4, SPI_3, 22}, + {PC5, SPI_3, 23}, + {NC , NC , NC} }; @@ -262,6 +361,42 @@ const PinMap PinMap_SPI_MISO[] = { {PF7, SPI_1, 30}, {PA0, SPI_1, 31}, + /* USART2 */ + {PA6, SPI_2, 0}, + {PA7, SPI_2, 1}, + {PA8, SPI_2, 2}, + {PA9, SPI_2, 3}, + {PI0, SPI_2, 4}, + {PI1, SPI_2, 5}, + {PI2, SPI_2, 6}, + {PI3, SPI_2, 7}, + {PB6, SPI_2, 8}, + {PB7, SPI_2, 9}, + {PB8, SPI_2, 10}, + {PB9, SPI_2, 11}, + {PB10, SPI_2, 12}, + {PF8, SPI_2, 20}, + {PF9, SPI_2, 21}, + {PF10, SPI_2, 22}, + {PF11, SPI_2, 23}, + {PF12, SPI_2, 24}, + {PF13, SPI_2, 25}, + {PF14, SPI_2, 26}, + {PF15, SPI_2, 27}, + {PK0, SPI_2, 28}, + {PK1, SPI_2, 29}, + {PK2, SPI_2, 30}, + + /* USART3 */ + {PJ14, SPI_3, 15}, + {PJ15, SPI_3, 16}, + {PC0, SPI_3, 17}, + {PC1, SPI_3, 18}, + {PC2, SPI_3, 19}, + {PC3, SPI_3, 20}, + {PC4, SPI_3, 21}, + {PC5, SPI_3, 22}, + {NC , NC , NC} }; @@ -305,6 +440,42 @@ const PinMap PinMap_SPI_CLK[] = { {PA0, SPI_1, 30}, {PA1, SPI_1, 31}, + /* USART2 */ + {PA7, SPI_2, 0}, + {PA8, SPI_2, 1}, + {PA9, SPI_2, 2}, + {PI0, SPI_2, 3}, + {PI1, SPI_2, 4}, + {PI2, SPI_2, 5}, + {PI3, SPI_2, 6}, + {PB6, SPI_2, 7}, + {PB7, SPI_2, 8}, + {PB8, SPI_2, 9}, + {PB9, SPI_2, 10}, + {PB10, SPI_2, 11}, + {PF8, SPI_2, 19}, + {PF9, SPI_2, 20}, + {PF10, SPI_2, 21}, + {PF11, SPI_2, 22}, + {PF12, SPI_2, 23}, + {PF13, SPI_2, 24}, + {PF14, SPI_2, 25}, + {PF15, SPI_2, 26}, + {PK0, SPI_2, 27}, + {PK1, SPI_2, 28}, + {PK2, SPI_2, 29}, + {PA6, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 14}, + {PJ15, SPI_3, 15}, + {PC0, SPI_3, 16}, + {PC1, SPI_3, 17}, + {PC2, SPI_3, 18}, + {PC3, SPI_3, 19}, + {PC4, SPI_3, 20}, + {PC5, SPI_3, 21}, + {NC , NC , NC} }; @@ -346,6 +517,42 @@ const PinMap PinMap_SPI_CS[] = { {PF6, SPI_1, 27}, {PF7, SPI_1, 28}, + /* USART2 */ + {PA8, SPI_2, 0}, + {PA9, SPI_2, 1}, + {PI0, SPI_2, 2}, + {PI1, SPI_2, 3}, + {PI2, SPI_2, 4}, + {PI3, SPI_2, 5}, + {PB6, SPI_2, 6}, + {PB7, SPI_2, 7}, + {PB8, SPI_2, 8}, + {PB9, SPI_2, 9}, + {PB10, SPI_2, 10}, + {PF8, SPI_2, 18}, + {PF9, SPI_2, 19}, + {PF10, SPI_2, 20}, + {PF11, SPI_2, 21}, + {PF12, SPI_2, 22}, + {PF13, SPI_2, 23}, + {PF14, SPI_2, 24}, + {PF15, SPI_2, 25}, + {PK0, SPI_2, 26}, + {PK1, SPI_2, 27}, + {PK2, SPI_2, 28}, + {PA6, SPI_2, 30}, + {PA7, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 13}, + {PJ15, SPI_3, 14}, + {PC0, SPI_3, 15}, + {PC1, SPI_3, 16}, + {PC2, SPI_3, 17}, + {PC3, SPI_3, 18}, + {PC4, SPI_3, 19}, + {PC5, SPI_3, 20}, + {NC , NC , NC} }; @@ -385,6 +592,42 @@ const PinMap PinMap_UART_TX[] = { {PF6, USART_1, 30}, {PF7, USART_1, 31}, + /* USART2 */ + {PA6, USART_2, 1}, + {PA7, USART_2, 2}, + {PA8, USART_2, 3}, + {PA9, USART_2, 4}, + {PI0, USART_2, 5}, + {PI1, USART_2, 6}, + {PI2, USART_2, 7}, + {PI3, USART_2, 8}, + {PB6, USART_2, 9}, + {PB7, USART_2, 10}, + {PB8, USART_2, 11}, + {PB9, USART_2, 12}, + {PB10, USART_2, 13}, + {PF8, USART_2, 21}, + {PF9, USART_2, 22}, + {PF10, USART_2, 23}, + {PF11, USART_2, 24}, + {PF12, USART_2, 25}, + {PF13, USART_2, 26}, + {PF14, USART_2, 27}, + {PF15, USART_2, 28}, + {PK0, USART_2, 29}, + {PK1, USART_2, 30}, + {PK2, USART_2, 31}, + + /* USART3 */ + {PJ14, USART_3, 16}, + {PJ15, USART_3, 17}, + {PC0, USART_3, 18}, + {PC1, USART_3, 19}, + {PC2, USART_3, 20}, + {PC3, USART_3, 21}, + {PC4, USART_3, 22}, + {PC5, USART_3, 23}, + {NC , NC , NC} }; @@ -423,5 +666,41 @@ const PinMap PinMap_UART_RX[] = { {PF6, USART_1, 29}, {PF7, USART_1, 30}, + /* USART2 */ + {PA6, USART_2, 0}, + {PA7, USART_2, 1}, + {PA8, USART_2, 2}, + {PA9, USART_2, 3}, + {PI0, USART_2, 4}, + {PI1, USART_2, 5}, + {PI2, USART_2, 6}, + {PI3, USART_2, 7}, + {PB6, USART_2, 8}, + {PB7, USART_2, 9}, + {PB8, USART_2, 10}, + {PB9, USART_2, 11}, + {PB10, USART_2, 12}, + {PF8, USART_2, 20}, + {PF9, USART_2, 21}, + {PF10, USART_2, 22}, + {PF11, USART_2, 23}, + {PF12, USART_2, 24}, + {PF13, USART_2, 25}, + {PF14, USART_2, 26}, + {PF15, USART_2, 27}, + {PK0, USART_2, 28}, + {PK1, USART_2, 29}, + {PK2, USART_2, 30}, + + /* USART3 */ + {PJ14, USART_3, 15}, + {PJ15, USART_3, 16}, + {PC0, USART_3, 17}, + {PC1, USART_3, 18}, + {PC2, USART_3, 19}, + {PC3, USART_3, 20}, + {PC4, USART_3, 21}, + {PC5, USART_3, 22}, + {NC , NC , NC} }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/PeripheralPins.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/PeripheralPins.c index 95baad0840..79f7f1933e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/PeripheralPins.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/PeripheralPins.c @@ -100,6 +100,37 @@ const PinMap PinMap_I2C_SCL[] = { {PF7, I2C_0, 30}, {PA0, I2C_0, 31}, + {PA7, I2C_1, 0}, + {PA8, I2C_1, 1}, + {PA9, I2C_1, 2}, + {PI2, I2C_1, 3}, + {PI3, I2C_1, 4}, + {PB6, I2C_1, 5}, + {PB7, I2C_1, 6}, + {PB8, I2C_1, 7}, + {PB9, I2C_1, 8}, + {PB10, I2C_1, 9}, + {PJ14, I2C_1, 10}, + {PJ15, I2C_1, 11}, + {PC0, I2C_1, 12}, + {PC1, I2C_1, 13}, + {PC2, I2C_1, 14}, + {PC3, I2C_1, 15}, + {PC4, I2C_1, 16}, + {PC5, I2C_1, 17}, + {PF8, I2C_1, 20}, + {PF9, I2C_1, 21}, + {PF10, I2C_1, 22}, + {PF11, I2C_1, 23}, + {PF12, I2C_1, 24}, + {PF13, I2C_1, 25}, + {PF14, I2C_1, 26}, + {PF15, I2C_1, 27}, + {PK0, I2C_1, 28}, + {PK1, I2C_1, 29}, + {PK2, I2C_1, 30}, + {PA6, I2C_1, 31}, + {NC , NC , NC} }; @@ -139,7 +170,39 @@ const PinMap PinMap_I2C_SDA[] = { {PF6, I2C_0, 30}, {PF7, I2C_0, 31}, + {PA6, I2C_1, 0}, + {PA7, I2C_1, 1}, + {PA8, I2C_1, 2}, + {PA9, I2C_1, 3}, + {PI2, I2C_1, 4}, + {PI3, I2C_1, 5}, + {PB6, I2C_1, 6}, + {PB7, I2C_1, 7}, + {PB8, I2C_1, 8}, + {PB9, I2C_1, 9}, + {PB10, I2C_1, 10}, + {PJ14, I2C_1, 11}, + {PJ15, I2C_1, 12}, + {PC0, I2C_1, 13}, + {PC1, I2C_1, 14}, + {PC2, I2C_1, 15}, + {PC3, I2C_1, 16}, + {PC4, I2C_1, 17}, + {PC5, I2C_1, 18}, + {PF8, I2C_1, 21}, + {PF9, I2C_1, 22}, + {PF10, I2C_1, 23}, + {PF11, I2C_1, 24}, + {PF12, I2C_1, 25}, + {PF13, I2C_1, 26}, + {PF14, I2C_1, 27}, + {PF15, I2C_1, 28}, + {PK0, I2C_1, 29}, + {PK1, I2C_1, 30}, + {PK2, I2C_1, 31}, + /* Not connected */ + {NC , NC , NC} }; @@ -220,6 +283,42 @@ const PinMap PinMap_SPI_MOSI[] = { {PF6, SPI_1, 30}, {PF7, SPI_1, 31}, + /* USART2 */ + {PA6, SPI_2, 1}, + {PA7, SPI_2, 2}, + {PA8, SPI_2, 3}, + {PA9, SPI_2, 4}, + {PI0, SPI_2, 5}, + {PI1, SPI_2, 6}, + {PI2, SPI_2, 7}, + {PI3, SPI_2, 8}, + {PB6, SPI_2, 9}, + {PB7, SPI_2, 10}, + {PB8, SPI_2, 11}, + {PB9, SPI_2, 12}, + {PB10, SPI_2, 13}, + {PF8, SPI_2, 21}, + {PF9, SPI_2, 22}, + {PF10, SPI_2, 23}, + {PF11, SPI_2, 24}, + {PF12, SPI_2, 25}, + {PF13, SPI_2, 26}, + {PF14, SPI_2, 27}, + {PF15, SPI_2, 28}, + {PK0, SPI_2, 29}, + {PK1, SPI_2, 30}, + {PK2, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 16}, + {PJ15, SPI_3, 17}, + {PC0, SPI_3, 18}, + {PC1, SPI_3, 19}, + {PC2, SPI_3, 20}, + {PC3, SPI_3, 21}, + {PC4, SPI_3, 22}, + {PC5, SPI_3, 23}, + {NC , NC , NC} }; @@ -262,6 +361,42 @@ const PinMap PinMap_SPI_MISO[] = { {PF7, SPI_1, 30}, {PA0, SPI_1, 31}, + /* USART2 */ + {PA6, SPI_2, 0}, + {PA7, SPI_2, 1}, + {PA8, SPI_2, 2}, + {PA9, SPI_2, 3}, + {PI0, SPI_2, 4}, + {PI1, SPI_2, 5}, + {PI2, SPI_2, 6}, + {PI3, SPI_2, 7}, + {PB6, SPI_2, 8}, + {PB7, SPI_2, 9}, + {PB8, SPI_2, 10}, + {PB9, SPI_2, 11}, + {PB10, SPI_2, 12}, + {PF8, SPI_2, 20}, + {PF9, SPI_2, 21}, + {PF10, SPI_2, 22}, + {PF11, SPI_2, 23}, + {PF12, SPI_2, 24}, + {PF13, SPI_2, 25}, + {PF14, SPI_2, 26}, + {PF15, SPI_2, 27}, + {PK0, SPI_2, 28}, + {PK1, SPI_2, 29}, + {PK2, SPI_2, 30}, + + /* USART3 */ + {PJ14, SPI_3, 15}, + {PJ15, SPI_3, 16}, + {PC0, SPI_3, 17}, + {PC1, SPI_3, 18}, + {PC2, SPI_3, 19}, + {PC3, SPI_3, 20}, + {PC4, SPI_3, 21}, + {PC5, SPI_3, 22}, + {NC , NC , NC} }; @@ -305,6 +440,42 @@ const PinMap PinMap_SPI_CLK[] = { {PA0, SPI_1, 30}, {PA1, SPI_1, 31}, + /* USART2 */ + {PA7, SPI_2, 0}, + {PA8, SPI_2, 1}, + {PA9, SPI_2, 2}, + {PI0, SPI_2, 3}, + {PI1, SPI_2, 4}, + {PI2, SPI_2, 5}, + {PI3, SPI_2, 6}, + {PB6, SPI_2, 7}, + {PB7, SPI_2, 8}, + {PB8, SPI_2, 9}, + {PB9, SPI_2, 10}, + {PB10, SPI_2, 11}, + {PF8, SPI_2, 19}, + {PF9, SPI_2, 20}, + {PF10, SPI_2, 21}, + {PF11, SPI_2, 22}, + {PF12, SPI_2, 23}, + {PF13, SPI_2, 24}, + {PF14, SPI_2, 25}, + {PF15, SPI_2, 26}, + {PK0, SPI_2, 27}, + {PK1, SPI_2, 28}, + {PK2, SPI_2, 29}, + {PA6, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 14}, + {PJ15, SPI_3, 15}, + {PC0, SPI_3, 16}, + {PC1, SPI_3, 17}, + {PC2, SPI_3, 18}, + {PC3, SPI_3, 19}, + {PC4, SPI_3, 20}, + {PC5, SPI_3, 21}, + {NC , NC , NC} }; @@ -346,6 +517,42 @@ const PinMap PinMap_SPI_CS[] = { {PF6, SPI_1, 27}, {PF7, SPI_1, 28}, + /* USART2 */ + {PA8, SPI_2, 0}, + {PA9, SPI_2, 1}, + {PI0, SPI_2, 2}, + {PI1, SPI_2, 3}, + {PI2, SPI_2, 4}, + {PI3, SPI_2, 5}, + {PB6, SPI_2, 6}, + {PB7, SPI_2, 7}, + {PB8, SPI_2, 8}, + {PB9, SPI_2, 9}, + {PB10, SPI_2, 10}, + {PF8, SPI_2, 18}, + {PF9, SPI_2, 19}, + {PF10, SPI_2, 20}, + {PF11, SPI_2, 21}, + {PF12, SPI_2, 22}, + {PF13, SPI_2, 23}, + {PF14, SPI_2, 24}, + {PF15, SPI_2, 25}, + {PK0, SPI_2, 26}, + {PK1, SPI_2, 27}, + {PK2, SPI_2, 28}, + {PA6, SPI_2, 30}, + {PA7, SPI_2, 31}, + + /* USART3 */ + {PJ14, SPI_3, 13}, + {PJ15, SPI_3, 14}, + {PC0, SPI_3, 15}, + {PC1, SPI_3, 16}, + {PC2, SPI_3, 17}, + {PC3, SPI_3, 18}, + {PC4, SPI_3, 19}, + {PC5, SPI_3, 20}, + {NC , NC , NC} }; @@ -385,6 +592,42 @@ const PinMap PinMap_UART_TX[] = { {PF6, USART_1, 30}, {PF7, USART_1, 31}, + /* USART2 */ + {PA6, USART_2, 1}, + {PA7, USART_2, 2}, + {PA8, USART_2, 3}, + {PA9, USART_2, 4}, + {PI0, USART_2, 5}, + {PI1, USART_2, 6}, + {PI2, USART_2, 7}, + {PI3, USART_2, 8}, + {PB6, USART_2, 9}, + {PB7, USART_2, 10}, + {PB8, USART_2, 11}, + {PB9, USART_2, 12}, + {PB10, USART_2, 13}, + {PF8, USART_2, 21}, + {PF9, USART_2, 22}, + {PF10, USART_2, 23}, + {PF11, USART_2, 24}, + {PF12, USART_2, 25}, + {PF13, USART_2, 26}, + {PF14, USART_2, 27}, + {PF15, USART_2, 28}, + {PK0, USART_2, 29}, + {PK1, USART_2, 30}, + {PK2, USART_2, 31}, + + /* USART3 */ + {PJ14, USART_3, 16}, + {PJ15, USART_3, 17}, + {PC0, USART_3, 18}, + {PC1, USART_3, 19}, + {PC2, USART_3, 20}, + {PC3, USART_3, 21}, + {PC4, USART_3, 22}, + {PC5, USART_3, 23}, + {NC , NC , NC} }; @@ -423,5 +666,41 @@ const PinMap PinMap_UART_RX[] = { {PF6, USART_1, 29}, {PF7, USART_1, 30}, + /* USART2 */ + {PA6, USART_2, 0}, + {PA7, USART_2, 1}, + {PA8, USART_2, 2}, + {PA9, USART_2, 3}, + {PI0, USART_2, 4}, + {PI1, USART_2, 5}, + {PI2, USART_2, 6}, + {PI3, USART_2, 7}, + {PB6, USART_2, 8}, + {PB7, USART_2, 9}, + {PB8, USART_2, 10}, + {PB9, USART_2, 11}, + {PB10, USART_2, 12}, + {PF8, USART_2, 20}, + {PF9, USART_2, 21}, + {PF10, USART_2, 22}, + {PF11, USART_2, 23}, + {PF12, USART_2, 24}, + {PF13, USART_2, 25}, + {PF14, USART_2, 26}, + {PF15, USART_2, 27}, + {PK0, USART_2, 28}, + {PK1, USART_2, 29}, + {PK2, USART_2, 30}, + + /* USART3 */ + {PJ14, USART_3, 15}, + {PJ15, USART_3, 16}, + {PC0, USART_3, 17}, + {PC1, USART_3, 18}, + {PC2, USART_3, 19}, + {PC3, USART_3, 20}, + {PC4, USART_3, 21}, + {PC5, USART_3, 22}, + {NC , NC , NC} }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/common/objects.h b/targets/TARGET_Silicon_Labs/TARGET_EFM32/common/objects.h index 4a67f22243..596e178a0d 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/common/objects.h +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/common/objects.h @@ -59,6 +59,7 @@ struct dac_s { #if DEVICE_I2C struct i2c_s { I2C_TypeDef *i2c; + uint32_t location; #if DEVICE_I2C_ASYNCH uint32_t events; I2C_TransferSeq_TypeDef xfer; @@ -116,7 +117,8 @@ struct serial_s { #if DEVICE_SPI struct spi_s { USART_TypeDef *spi; - int location; + uint32_t location; + uint32_t route; uint8_t bits; uint8_t master; #if DEVICE_SPI_ASYNCH diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/i2c_api.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/i2c_api.c index 7c8f50e200..123925aca4 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/i2c_api.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/i2c_api.c @@ -121,11 +121,13 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) int loc = pinmap_merge(loc_sda, loc_scl); MBED_ASSERT(loc != NC); /* Set location */ + obj->i2c.location = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | (loc << _I2C_ROUTE_LOCATION_SHIFT); obj->i2c.i2c->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | (loc << _I2C_ROUTE_LOCATION_SHIFT); #else obj->i2c.i2c->ROUTEPEN = I2C_ROUTEPEN_SDAPEN | I2C_ROUTEPEN_SCLPEN; - obj->i2c.i2c->ROUTELOC0 = (pin_location(sda, PinMap_I2C_SDA) << _I2C_ROUTELOC0_SDALOC_SHIFT) | - (pin_location(scl, PinMap_I2C_SCL) << _I2C_ROUTELOC0_SCLLOC_SHIFT); + obj->i2c.location = (pin_location(sda, PinMap_I2C_SDA) << _I2C_ROUTELOC0_SDALOC_SHIFT) | + (pin_location(scl, PinMap_I2C_SCL) << _I2C_ROUTELOC0_SCLLOC_SHIFT); + obj->i2c.i2c->ROUTELOC0 = obj->i2c.location; #endif /* Set up the pins for I2C use */ @@ -215,6 +217,13 @@ int i2c_start(i2c_t *obj) { I2C_TypeDef *i2c = obj->i2c.i2c; + /* Restore pin configuration in case we changed I2C object */ +#ifdef I2C_ROUTE_SDAPEN + obj->i2c.i2c->ROUTE = obj->i2c.location; +#else + obj->i2c.i2c->ROUTELOC0 = obj->i2c.location; +#endif + /* Ensure buffers are empty */ i2c->CMD = I2C_CMD_CLEARPC | I2C_CMD_CLEARTX; if (i2c->IF & I2C_IF_RXDATAV) { @@ -410,7 +419,6 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) data[count] = i2c_byte_read(obj, 0); } - return count; } @@ -459,6 +467,12 @@ void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, if((tx_length == 0) && (rx_length == 0)) return; // For now, we are assuming a solely interrupt-driven implementation. +#ifdef I2C_ROUTE_SDAPEN + obj->i2c.i2c->ROUTE = obj->i2c.location; +#else + obj->i2c.i2c->ROUTELOC0 = obj->i2c.location; +#endif + // Store transfer config obj->i2c.xfer.addr = address; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c index ad387d86ae..abb401247f 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c @@ -213,10 +213,12 @@ void spi_enable_pins(spi_t *obj, uint8_t enable, PinName mosi, PinName miso, Pin obj->spi.spi->ROUTELOC0 &= ~_USART_ROUTELOC0_CSLOC_MASK; obj->spi.spi->ROUTELOC0 |= pin_location(cs, PinMap_SPI_MOSI)<<_USART_ROUTELOC0_CSLOC_SHIFT; } + obj->spi.location = obj->spi.spi->ROUTELOC0; + obj->spi.route = route; obj->spi.spi->ROUTEPEN = route; } #else - uint32_t route = USART_ROUTE_CLKPEN | (obj->spi.location << _USART_ROUTE_LOCATION_SHIFT); + uint32_t route = USART_ROUTE_CLKPEN; if (mosi != NC) { route |= USART_ROUTE_TXPEN; @@ -227,7 +229,9 @@ void spi_enable_pins(spi_t *obj, uint8_t enable, PinName mosi, PinName miso, Pin if (!obj->spi.master) { route |= USART_ROUTE_CSPEN; } + route |= obj->spi.location << _USART_ROUTE_LOCATION_SHIFT; obj->spi.spi->ROUTE = route; + obj->spi.route = route; } #endif void spi_enable(spi_t *obj, uint8_t enable) @@ -324,14 +328,6 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) default: clockMode = usartClockMode0; } - - //save state -#ifdef _USART_ROUTEPEN_RESETVALUE - uint32_t route = obj->spi.spi->ROUTEPEN; - uint32_t loc = obj->spi.spi->ROUTELOC0; -#else - uint32_t route = obj->spi.spi->ROUTE; -#endif uint32_t iflags = obj->spi.spi->IEN; bool enabled = (obj->spi.spi->STATUS & (USART_STATUS_RXENS | USART_STATUS_TXENS)) != 0; @@ -339,10 +335,10 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) //restore state #ifdef _USART_ROUTEPEN_RESETVALUE - obj->spi.spi->ROUTEPEN = route; - obj->spi.spi->ROUTELOC0 = loc; + obj->spi.spi->ROUTEPEN = obj->spi.route; + obj->spi.spi->ROUTELOC0 = obj->spi.location; #else - obj->spi.spi->ROUTE = route; + obj->spi.spi->ROUTE = obj->spi.route; #endif obj->spi.spi->IEN = iflags;