From 0b90c827bdf94fa73e97c244f5a3681d903eb211 Mon Sep 17 00:00:00 2001 From: Jarno Komula Date: Wed, 19 Jul 2017 16:46:58 +0300 Subject: [PATCH] Better readability. --- tools/export/sw4stm32/__init__.py | 324 ++++++++++++++++++++++++------ 1 file changed, 260 insertions(+), 64 deletions(-) diff --git a/tools/export/sw4stm32/__init__.py b/tools/export/sw4stm32/__init__.py index 85016f7623..b0926faf24 100644 --- a/tools/export/sw4stm32/__init__.py +++ b/tools/export/sw4stm32/__init__.py @@ -23,62 +23,243 @@ from tools.export.exporters import Exporter class Sw4STM32(Exporter): + """ + Sw4STM32 class + """ NAME = 'Sw4STM32' TOOLCHAIN = 'GCC_ARM' BOARDS = { - 'B96B_F446VE': {'name': 'B96B-F446VE', 'mcuId': 'STM32F446VETx'}, - 'DISCO_F051R8': {'name': 'STM32F0DISCOVERY', 'mcuId': 'STM32F051R8Tx'}, - 'DISCO_F303VC': {'name': 'STM32F3DISCOVERY', 'mcuId': 'STM32F303VCTx'}, - 'DISCO_F334C8': {'name': 'STM32F3348DISCOVERY', 'mcuId': 'STM32F334C8Tx'}, - 'DISCO_F401VC': {'name': 'STM32F401C-DISCO', 'mcuId': 'STM32F401VCTx'}, - 'DISCO_F407VG': {'name': 'STM32F4DISCOVERY', 'mcuId': 'STM32F407VGTx'}, - 'DISCO_F413ZH': {'name': 'DISCO_F413', 'mcuId': 'STM32F413ZHTx'}, - 'DISCO_F429ZI': {'name': 'STM32F429I-DISCO', 'mcuId': 'STM32F429ZITx'}, - 'DISCO_F469NI': {'name': 'DISCO-F469NI', 'mcuId': 'STM32F469NIHx'}, - 'DISCO_F746NG': {'name': 'STM32F746G-DISCO', 'mcuId': 'STM32F746NGHx'}, - 'DISCO_F769NI': {'name': 'DISCO-F769NI', 'mcuId': 'STM32F769NIHx'}, - 'DISCO_L053C8': {'name': 'STM32L0538DISCOVERY', 'mcuId': 'STM32L053C8Tx'}, - 'DISCO_L072CZ_LRWAN1': {'name': 'DISCO-L072CZ-LRWAN1', 'mcuId': 'STM32L072CZTx'}, - 'DISCO_L475VG_IOT01A': {'name': 'STM32L475G-DISCO', 'mcuId': 'STM32L475VGTx'}, - 'DISCO_L476VG': {'name': 'STM32L476G-DISCO', 'mcuId': 'STM32L476VGTx'}, - 'NUCLEO_F030R8': {'name': 'NUCLEO-F030R8', 'mcuId': 'STM32F030R8Tx'}, - 'NUCLEO_F031K6': {'name': 'NUCLEO-F031K6', 'mcuId': 'STM32F031K6Tx'}, - 'NUCLEO_F042K6': {'name': 'NUCLEO-F042K6', 'mcuId': 'STM32F042K6Tx'}, - 'NUCLEO_F070RB': {'name': 'NUCLEO-F070RB', 'mcuId': 'STM32F070RBTx'}, - 'NUCLEO_F072RB': {'name': 'NUCLEO-F072RB', 'mcuId': 'STM32F072RBTx'}, - 'NUCLEO_F091RC': {'name': 'NUCLEO-F091RC', 'mcuId': 'STM32F091RCTx'}, - 'NUCLEO_F103RB': {'name': 'NUCLEO-F103RB', 'mcuId': 'STM32F103RBTx'}, - 'NUCLEO_F207ZG': {'name': 'NUCLEO-F207ZG', 'mcuId': 'STM32F207ZGTx'}, - 'NUCLEO_F302R8': {'name': 'NUCLEO-F302R8', 'mcuId': 'STM32F302R8Tx'}, - 'NUCLEO_F303K8': {'name': 'NUCLEO-F303K8', 'mcuId': 'STM32F303K8Tx'}, - 'NUCLEO_F303RE': {'name': 'NUCLEO-F303RE', 'mcuId': 'STM32F303RETx'}, - 'NUCLEO_F303ZE': {'name': 'NUCLEO-F303ZE', 'mcuId': 'STM32F303ZETx'}, - 'NUCLEO_F334R8': {'name': 'NUCLEO-F334R8', 'mcuId': 'STM32F334R8Tx'}, - 'NUCLEO_F401RE': {'name': 'NUCLEO-F401RE', 'mcuId': 'STM32F401RETx'}, - 'NUCLEO_F410RB': {'name': 'NUCLEO-F410RB', 'mcuId': 'STM32F410RBTx'}, - 'NUCLEO_F411RE': {'name': 'NUCLEO-F411RE', 'mcuId': 'STM32F411RETx'}, - 'NUCLEO_F429ZI': {'name': 'NUCLEO-F429ZI', 'mcuId': 'STM32F429ZITx'}, - 'NUCLEO_F446RE': {'name': 'NUCLEO-F446RE', 'mcuId': 'STM32F446RETx'}, - 'NUCLEO_F446ZE': {'name': 'NUCLEO-F446ZE', 'mcuId': 'STM32F446ZETx'}, - 'NUCLEO_F746ZG': {'name': 'NUCLEO-F746ZG', 'mcuId': 'STM32F746ZGTx'}, - 'NUCLEO_F767ZI': {'name': 'NUCLEO-F767ZI', 'mcuId': 'STM32F767ZITx'}, - 'NUCLEO_L011K4': {'name': 'NUCLEO-L011K4', 'mcuId': 'STM32L011K4Tx'}, - 'NUCLEO_L031K6': {'name': 'NUCLEO-L031K6', 'mcuId': 'STM32L031K6Tx'}, - 'NUCLEO_L053R8': {'name': 'NUCLEO-L053R8', 'mcuId': 'STM32L053R8Tx'}, - 'NUCLEO_L073RZ': {'name': 'NUCLEO-L073RZ', 'mcuId': 'STM32L073RZTx'}, - 'NUCLEO_L152RE': {'name': 'NUCLEO-L152RE', 'mcuId': 'STM32L152RETx'}, - 'NUCLEO_L432KC': {'name': 'NUCLEO-L432KC', 'mcuId': 'STM32L432KCUx'}, - 'NUCLEO_L476RG': {'name': 'NUCLEO-L476RG', 'mcuId': 'STM32L476RGTx'}, + 'B96B_F446VE': + { + 'name': 'B96B-F446VE', + 'mcuId': 'STM32F446VETx' + }, + 'DISCO_F051R8': + { + 'name': 'STM32F0DISCOVERY', + 'mcuId': 'STM32F051R8Tx' + }, + 'DISCO_F303VC': + { + 'name': 'STM32F3DISCOVERY', + 'mcuId': 'STM32F303VCTx' + }, + 'DISCO_F334C8': + { + 'name': 'STM32F3348DISCOVERY', + 'mcuId': 'STM32F334C8Tx' + }, + 'DISCO_F401VC': + { + 'name': 'STM32F401C-DISCO', + 'mcuId': 'STM32F401VCTx' + }, + 'DISCO_F407VG': + { + 'name': 'STM32F4DISCOVERY', + 'mcuId': 'STM32F407VGTx' + }, + 'DISCO_F413ZH': + { + 'name': 'DISCO_F413', + 'mcuId': 'STM32F413ZHTx' + }, + 'DISCO_F429ZI': + { + 'name': 'STM32F429I-DISCO', + 'mcuId': 'STM32F429ZITx' + }, + 'DISCO_F469NI': + { + 'name': 'DISCO-F469NI', + 'mcuId': 'STM32F469NIHx' + }, + 'DISCO_F746NG': + { + 'name': 'STM32F746G-DISCO', + 'mcuId': 'STM32F746NGHx' + }, + 'DISCO_F769NI': + { + 'name': 'DISCO-F769NI', + 'mcuId': 'STM32F769NIHx' + }, + 'DISCO_L053C8': + { + 'name': 'STM32L0538DISCOVERY', + 'mcuId': 'STM32L053C8Tx' + }, + 'DISCO_L072CZ_LRWAN1': + { + 'name': 'DISCO-L072CZ-LRWAN1', + 'mcuId': 'STM32L072CZTx' + }, + 'DISCO_L475VG_IOT01A': + { + 'name': 'STM32L475G-DISCO', + 'mcuId': 'STM32L475VGTx' + }, + 'DISCO_L476VG': + { + 'name': 'STM32L476G-DISCO', + 'mcuId': 'STM32L476VGTx' + }, + 'NUCLEO_F030R8': + { + 'name': 'NUCLEO-F030R8', + 'mcuId': 'STM32F030R8Tx' + }, + 'NUCLEO_F031K6': + { + 'name': 'NUCLEO-F031K6', + 'mcuId': 'STM32F031K6Tx' + }, + 'NUCLEO_F042K6': + { + 'name': 'NUCLEO-F042K6', + 'mcuId': 'STM32F042K6Tx' + }, + 'NUCLEO_F070RB': + { + 'name': 'NUCLEO-F070RB', + 'mcuId': 'STM32F070RBTx' + }, + 'NUCLEO_F072RB': + { + 'name': 'NUCLEO-F072RB', + 'mcuId': 'STM32F072RBTx' + }, + 'NUCLEO_F091RC': + { + 'name': 'NUCLEO-F091RC', + 'mcuId': 'STM32F091RCTx' + }, + 'NUCLEO_F103RB': + { + 'name': 'NUCLEO-F103RB', + 'mcuId': 'STM32F103RBTx' + }, + 'NUCLEO_F207ZG': + { + 'name': 'NUCLEO-F207ZG', + 'mcuId': 'STM32F207ZGTx' + }, + 'NUCLEO_F302R8': + { + 'name': 'NUCLEO-F302R8', + 'mcuId': 'STM32F302R8Tx' + }, + 'NUCLEO_F303K8': + { + 'name': 'NUCLEO-F303K8', + 'mcuId': 'STM32F303K8Tx' + }, + 'NUCLEO_F303RE': + { + 'name': 'NUCLEO-F303RE', + 'mcuId': 'STM32F303RETx' + }, + 'NUCLEO_F303ZE': + { + 'name': 'NUCLEO-F303ZE', + 'mcuId': 'STM32F303ZETx' + }, + 'NUCLEO_F334R8': + { + 'name': 'NUCLEO-F334R8', + 'mcuId': 'STM32F334R8Tx' + }, + 'NUCLEO_F401RE': + { + 'name': 'NUCLEO-F401RE', + 'mcuId': 'STM32F401RETx' + }, + 'NUCLEO_F410RB': + { + 'name': 'NUCLEO-F410RB', + 'mcuId': 'STM32F410RBTx' + }, + 'NUCLEO_F411RE': + { + 'name': 'NUCLEO-F411RE', + 'mcuId': 'STM32F411RETx' + }, + 'NUCLEO_F429ZI': + { + 'name': 'NUCLEO-F429ZI', + 'mcuId': 'STM32F429ZITx' + }, + 'NUCLEO_F446RE': + { + 'name': 'NUCLEO-F446RE', + 'mcuId': 'STM32F446RETx' + }, + 'NUCLEO_F446ZE': + { + 'name': 'NUCLEO-F446ZE', + 'mcuId': 'STM32F446ZETx' + }, + 'NUCLEO_F746ZG': + { + 'name': 'NUCLEO-F746ZG', + 'mcuId': 'STM32F746ZGTx' + }, + 'NUCLEO_F767ZI': + { + 'name': 'NUCLEO-F767ZI', + 'mcuId': 'STM32F767ZITx' + }, + 'NUCLEO_L011K4': + { + 'name': 'NUCLEO-L011K4', + 'mcuId': 'STM32L011K4Tx' + }, + 'NUCLEO_L031K6': + { + 'name': 'NUCLEO-L031K6', + 'mcuId': 'STM32L031K6Tx' + }, + 'NUCLEO_L053R8': + { + 'name': 'NUCLEO-L053R8', + 'mcuId': 'STM32L053R8Tx' + }, + 'NUCLEO_L073RZ': + { + 'name': 'NUCLEO-L073RZ', + 'mcuId': 'STM32L073RZTx' + }, + 'NUCLEO_L152RE': + { + 'name': 'NUCLEO-L152RE', + 'mcuId': 'STM32L152RETx' + }, + 'NUCLEO_L432KC': + { + 'name': 'NUCLEO-L432KC', + 'mcuId': 'STM32L432KCUx' + }, + 'NUCLEO_L476RG': + { + 'name': 'NUCLEO-L476RG', + 'mcuId': 'STM32L476RGTx' + }, } TARGETS = BOARDS.keys() - def __gen_dir(self, dirname): - settings = join(self.export_dir, dirname) + def __gen_dir(self, dir_name): + """ + Method that created directory + """ + settings = join(self.export_dir, dir_name) mkdir(settings) def __generate_uid(self): + """ + Method to create random int + """ return "%0.9u" % randint(0, 999999999) @staticmethod @@ -94,12 +275,19 @@ class Sw4STM32(Exporter): return path def build_excludelist(self): - self.source_folders = [self.filter_dot(s) for s in set(dirname( - src) for src in self.resources.c_sources + self.resources.cpp_sources + self.resources.s_sources)] + """ + This method creates list for excluded directories. + """ + self.source_folders = [self.filter_dot(s) + for s in set(dirname(src) for src in + self.resources.c_sources + + self.resources.cpp_sources + + self.resources.s_sources)] if '.' in self.source_folders: self.source_folders.remove('.') - top_folders = [f for f in set(s.split('/')[0] for s in self.source_folders)] + top_folders = [f for f in set(s.split('/')[0] + for s in self.source_folders)] for top_folder in top_folders: for root, dirs, files in walk(top_folder, topdown=True): @@ -107,19 +295,24 @@ class Sw4STM32(Exporter): # to accomodate Windows weirdness. parts = root.split(sep) self.remove_unused('/'.join(parts)) - + def remove_unused(self, path): - found = False + """ + Method for checking if path is needed. + Method adds path to excluded list if not needed + and is not subdirectory of already excluded directory + """ + found = False for used in self.include_path: if path == used: found = True - needToAdd = True + needtoadd = True if not found: - for dir in self.exclude_dirs: + for directory in self.exclude_dirs: # Do not exclude subfolders from excluded folder - if path.find(dir+'/') != -1: - needToAdd = False - if needToAdd: + if path.find(directory+'/') != -1: + needtoadd = False + if needtoadd: self.exclude_dirs.append(path) def generate(self): @@ -137,10 +330,11 @@ class Sw4STM32(Exporter): libraries = [] for lib in self.resources.libraries: - l, _ = splitext(basename(lib)) - libraries.append(l[3:]) + library, _ = splitext(basename(lib)) + libraries.append(library[3:]) - self.include_path = [self.filter_dot(s) for s in self.resources.inc_dirs] + self.include_path = [self.filter_dot(s) + for s in self.resources.inc_dirs] print 'Include folders: %d' % len(self.include_path) self.exclude_dirs = [] @@ -150,21 +344,23 @@ class Sw4STM32(Exporter): self.exclude_dirs = '|'.join(self.exclude_dirs) - self.ld_script = self.filter_dot(self.resources.linker_script) + ld_script = self.filter_dot(self.resources.linker_script) - self.lib_dirs = [self.filter_dot(s) for s in self.resources.lib_dirs] + # self.lib_dirs = [self.filter_dot(s) for s in self.resources.lib_dirs] + lib_dirs = [self.filter_dot(s) for s in self.resources.lib_dirs] - self.symbols = [s.replace('"', '"') for s in self.toolchain.get_symbols()] + symbols = [s.replace('"', '"') + for s in self.toolchain.get_symbols()] ctx = { 'name': self.project_name, 'include_paths': self.include_path, 'exclude_paths': self.exclude_dirs, - 'linker_script': self.ld_script, - 'library_paths': self.lib_dirs, + 'linker_script': ld_script, + 'library_paths': lib_dirs, 'object_files': self.resources.objects, 'libraries': libraries, - 'symbols': self.symbols, + 'symbols': symbols, 'board_name': self.BOARDS[self.target.upper()]['name'], 'mcu_name': self.BOARDS[self.target.upper()]['mcuId'], 'c_include_uid': self.__generate_uid(),