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Merge pull request #7220 from melvinvdb/fix_nrf5x_interrupt_pull_mode 

Fix mbed::InterruptIn.mode() in NRF5x targets
pull/7299/head
Cruz Monrreal 2018-06-21 10:31:48 -05:00 committed by GitHub
parent b80490d884 4986daaa7d
commit 0b8f46763a
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 38 additions and 44 deletions
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46
targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c
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@ -21,13 +21,13 @@
#if defined(TARGET_MCU_NRF51822) #if defined(TARGET_MCU_NRF51822)
#define GPIO_PIN_COUNT 31 #define GPIO_PIN_COUNT 31
#elif defined(TARGET_MCU_NRF52832) #elif defined(TARGET_MCU_NRF52832)
#define GPIO_PIN_COUNT 32 #define GPIO_PIN_COUNT 32
#elif defined(TARGET_MCU_NRF52840) #elif defined(TARGET_MCU_NRF52840)
#define GPIO_PIN_COUNT 48 #define GPIO_PIN_COUNT 48
#else #else
#error not recognized gpio count for mcu #error not recognized gpio count for mcu
#endif #endif
typedef struct { typedef struct {
@ -40,9 +40,9 @@ typedef struct {
} gpio_cfg_t; } gpio_cfg_t;
#if GPIO_PIN_COUNT > 32 #if GPIO_PIN_COUNT > 32
typedef uint64_t gpio_mask_t; typedef uint64_t gpio_mask_t;
#else #else
typedef uint32_t gpio_mask_t; typedef uint32_t gpio_mask_t;
#endif #endif
static gpio_mask_t m_gpio_initialized; static gpio_mask_t m_gpio_initialized;
@ -111,8 +111,7 @@ static void gpiote_pin_uninit(uint8_t pin)
if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) { if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) {
if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) { if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) {
nrf_drv_gpiote_out_uninit(pin); nrf_drv_gpiote_out_uninit(pin);
} } else if (m_gpio_cfg[pin].used_as_irq) {
else if (m_gpio_cfg[pin].used_as_irq) {
nrf_drv_gpiote_in_uninit(pin); nrf_drv_gpiote_in_uninit(pin);
} }
} }
@ -129,17 +128,7 @@ static void gpio_apply_config(uint8_t pin)
cfg.hi_accuracy = false; cfg.hi_accuracy = false;
cfg.is_watcher = false; cfg.is_watcher = false;
cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE; cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE;
if (m_gpio_cfg[pin].used_as_irq) { switch (m_gpio_cfg[pin].pull) {
cfg.pull = NRF_GPIO_PIN_PULLUP;
nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler);
if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin))
&& (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall))
{
nrf_drv_gpiote_in_event_enable(pin, true);
}
}
else {
switch(m_gpio_cfg[pin].pull) {
case PullUp: case PullUp:
cfg.pull = NRF_GPIO_PIN_PULLUP; cfg.pull = NRF_GPIO_PIN_PULLUP;
break; break;
@ -150,17 +139,22 @@ static void gpio_apply_config(uint8_t pin)
cfg.pull = NRF_GPIO_PIN_NOPULL; cfg.pull = NRF_GPIO_PIN_NOPULL;
break; break;
} }
nrf_gpio_cfg_input(pin,cfg.pull); if (m_gpio_cfg[pin].used_as_irq) {
nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler);
if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin))
&& (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall)) {
nrf_drv_gpiote_in_event_enable(pin, true);
} }
} else {
nrf_gpio_cfg_input(pin, cfg.pull);
} }
else { } else {
// Configure as output. // Configure as output.
nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin)); nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin));
nrf_drv_gpiote_out_init(pin, &cfg); nrf_drv_gpiote_out_init(pin, &cfg);
} }
m_gpio_initialized |= ((gpio_mask_t)1UL << pin); m_gpio_initialized |= ((gpio_mask_t)1UL << pin);
} } else {
else {
m_gpio_initialized &= ~((gpio_mask_t)1UL << pin); m_gpio_initialized &= ~((gpio_mask_t)1UL << pin);
} }
} }
@ -203,6 +197,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
gpiote_pin_uninit(pin); // try to uninitialize gpio before a change. gpiote_pin_uninit(pin); // try to uninitialize gpio before a change.
m_gpio_cfg[pin].used_as_irq = true; m_gpio_cfg[pin].used_as_irq = true;
m_gpio_cfg[pin].pull = PullNone;
m_channel_ids[pin] = id; m_channel_ids[pin] = id;
obj->ch = pin; obj->ch = pin;
m_irq_handler = handler; m_irq_handler = handler;
@ -225,15 +220,14 @@ void gpio_irq_free(gpio_irq_t *obj)
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
{ {
gpio_cfg_t* cfg = &m_gpio_cfg[obj->ch]; gpio_cfg_t *cfg = &m_gpio_cfg[obj->ch];
bool irq_enabled_before = bool irq_enabled_before =
(m_gpio_irq_enabled & ((gpio_mask_t)1 << obj->ch)) && (m_gpio_irq_enabled & ((gpio_mask_t)1 << obj->ch)) &&
(cfg->irq_rise || cfg->irq_fall); (cfg->irq_rise || cfg->irq_fall);
if (event == IRQ_RISE) { if (event == IRQ_RISE) {
cfg->irq_rise = enable ? true : false; cfg->irq_rise = enable ? true : false;
} } else if (event == IRQ_FALL) {
else if (event == IRQ_FALL) {
cfg->irq_fall = enable ? true : false; cfg->irq_fall = enable ? true : false;
} }