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Fixing the send break for the MAXWSNENV and MAX32600MBED. (#1684) 

Our UART doesn't have the ability to send a break, so we make the TX a GPIO and drive it low during the break_set() and then release it back to the UART in the break_clear().
pull/1645/merge
Kevin Gillespie 2016-04-26 13:20:17 -05:00 committed by Martin Kojtal
parent 0b771117c7
commit 0b67bf08c8
3 changed files with 129 additions and 14 deletions
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67
libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c
View File

@ -35,7 +35,9 @@
#include "mbed_assert.h"
#include "cmsis.h"
#include "serial_api.h"
#include "gpio_api.h"
#include "uart_regs.h"
#include "ioman_regs.h"
#include "PeripheralPins.h"
#define UART_NUM 2
@ -290,23 +292,76 @@ void serial_clear(serial_t *obj)
obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
}
//******************************************************************************
void serial_break_set(serial_t *obj)
{
// Make sure that nothing is being sent
while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
// Disable the clock to pause any transmission
obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
// Configure the GPIO to outpu 0
gpio_t tx_gpio;
switch (((UARTName)(obj->uart))) {
case UART_0:
gpio_init_out(&tx_gpio, UART0_TX);
break;
case UART_1:
gpio_init_out(&tx_gpio, UART1_TX);
break;
default:
gpio_init_out(&tx_gpio, (PinName)NC);
break;
}
gpio_write(&tx_gpio, 0);
// GPIO is setup now, but we need to maps gpio to the pin
switch (((UARTName)(obj->uart))) {
case UART_0:
MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
break;
case UART_1:
MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
break;
default:
break;
}
}
//******************************************************************************
void serial_break_clear(serial_t *obj)
{
obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
}
// Configure the GPIO to output 1
gpio_t tx_gpio;
switch (((UARTName)(obj->uart))) {
case UART_0:
gpio_init_out(&tx_gpio, UART0_TX);
break;
case UART_1:
gpio_init_out(&tx_gpio, UART1_TX);
break;
default:
gpio_init_out(&tx_gpio, (PinName)NC);
break;
}
gpio_write(&tx_gpio, 1);
// Renable UART
switch (((UARTName)(obj->uart))) {
case UART_0:
serial_pinout_tx(UART0_TX);
break;
case UART_1:
serial_pinout_tx(UART1_TX);
break;
default:
serial_pinout_tx((PinName)NC);
break;
}
}
//******************************************************************************
void serial_pinout_tx(PinName tx)

9
libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/TARGET_MAXWSNENV/PinNames.h
View File

@ -130,11 +130,16 @@ typedef enum {
SW1 = P1_5,
// UART Pins
USBTX = P1_3,
USBRX = P1_2,
UART0_RX = P1_0,
UART0_TX = P1_1,
UART1_RX = P1_2,
UART1_TX = P1_3,
USBTX = UART1_TX,
USBRX = UART1_RX,
STDIO_UART_TX = USBTX,
STDIO_UART_RX = USBRX,
// I2C Pins
I2C_SCL = P0_5,
I2C_SDA = P0_4,

67
libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/serial_api.c
View File

@ -35,7 +35,9 @@
#include "mbed_assert.h"
#include "cmsis.h"
#include "serial_api.h"
#include "gpio_api.h"
#include "uart_regs.h"
#include "ioman_regs.h"
#include "PeripheralPins.h"
#define UART_NUM 2
@ -290,23 +292,76 @@ void serial_clear(serial_t *obj)
obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
}
//******************************************************************************
void serial_break_set(serial_t *obj)
{
// Make sure that nothing is being sent
while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
// Disable the clock to pause any transmission
obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
// Configure the GPIO to outpu 0
gpio_t tx_gpio;
switch (((UARTName)(obj->uart))) {
case UART_0:
gpio_init_out(&tx_gpio, UART0_TX);
break;
case UART_1:
gpio_init_out(&tx_gpio, UART1_TX);
break;
default:
gpio_init_out(&tx_gpio, (PinName)NC);
break;
}
gpio_write(&tx_gpio, 0);
// GPIO is setup now, but we need to maps gpio to the pin
switch (((UARTName)(obj->uart))) {
case UART_0:
MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
break;
case UART_1:
MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
break;
default:
break;
}
}
//******************************************************************************
void serial_break_clear(serial_t *obj)
{
obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
}
// Configure the GPIO to output 1
gpio_t tx_gpio;
switch (((UARTName)(obj->uart))) {
case UART_0:
gpio_init_out(&tx_gpio, UART0_TX);
break;
case UART_1:
gpio_init_out(&tx_gpio, UART1_TX);
break;
default:
gpio_init_out(&tx_gpio, (PinName)NC);
break;
}
gpio_write(&tx_gpio, 1);
// Renable UART
switch (((UARTName)(obj->uart))) {
case UART_0:
serial_pinout_tx(UART0_TX);
break;
case UART_1:
serial_pinout_tx(UART1_TX);
break;
default:
serial_pinout_tx((PinName)NC);
break;
}
}
//******************************************************************************
void serial_pinout_tx(PinName tx)