From 8d7c3da179ec9a1ba2de1244ed8b072dff7e7390 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Mon, 30 Dec 2013 11:39:36 +0100
Subject: [PATCH 01/24] i2c clock from global clock value, syntax corrections

---
 .../hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c     | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
index 5762b5d142..2529761629 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
@@ -165,10 +165,11 @@ static int i2c_do_write(i2c_t *obj, int value) {
 }
 
 static int i2c_do_read(i2c_t *obj, char * data, int last) {
-    if (last)
+    if (last) {
         i2c_send_nack(obj);
-    else
+    } else {
         i2c_send_ack(obj);
+    }
 
     *data = (obj->i2c->D & 0xFF);
 
@@ -184,7 +185,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
     uint32_t ref = 0;
     uint8_t i, j;
     // bus clk
-    uint32_t PCLK = 24000000u;
+    uint32_t PCLK = SystemCoreClock/2;
     uint32_t pulse = PCLK / (hz * 2);
 
     // we look for the values that minimize the error
@@ -237,9 +238,8 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
     }
 
     // If not repeated start, send stop.
-    if (stop) {
+    if (stop)
         i2c_stop(obj);
-    }
 
     // last read
     data[count-1] = obj->i2c->D;
@@ -326,11 +326,9 @@ int i2c_slave_receive(i2c_t *obj) {
         // read addressed
         case 0xE6:
             return 1;
-
         // write addressed
         case 0xE2:
             return 3;
-
         default:
             return 0;
     }

From a384d1d875ac4b5d9a5cb4d2c8f695c66039fa3c Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Mon, 30 Dec 2013 18:12:01 +0100
Subject: [PATCH 02/24] pwm channel 7 correction, enhanced mode

---
 .../TARGET_K20D5M/pwmout_api.c                | 22 +++++++++----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
index 5936ee03b8..6c362e0e3c 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
@@ -22,15 +22,15 @@
 static const PinMap PinMap_PWM[] = {
     // LEDs
     {LED_RED  , PWM_3 , 3}, // PTC3, FTM0 CH2
-    {LED_GREEN, PWM_5, 3},  // PTD4, FTM0 CH4
-    {LED_BLUE , PWM_9 , 3}, // PTA2 , FTM0 CH7
+    {LED_GREEN, PWM_5,  3}, // PTD4, FTM0 CH4
+    {LED_BLUE , PWM_8 , 3}, // PTA2, FTM0 CH7
 
     // Arduino digital pinout
     {D3,  PWM_5 , 3}, // PTD4, FTM0 CH4
-    {D5,  PWM_7 , 3}, // PTA1 , FTM0 CH6
-    {D6,  PWM_3 , 3}, // PTC3 , FTM0 CH2
-    {D9,  PWM_8 , 4}, // PTD2 , FTM0 CH7
-    {D10, PWM_2 , 4}, // PTC2 , FTM0 CH1
+    {D5,  PWM_7 , 3}, // PTA1, FTM0 CH6
+    {D6,  PWM_3 , 3}, // PTC3, FTM0 CH2
+    {D9,  PWM_8 , 4}, // PTD2, FTM0 CH7
+    {D10, PWM_2 , 4}, // PTC2, FTM0 CH1
 
     {NC , NC    , 0}
 };
@@ -54,10 +54,9 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     ftm->MODE |= FTM_MODE_WPDIS_MASK; //write protection disabled
     ftm->CONF |= FTM_CONF_BDMMODE(3);
     ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
+    ftm->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
     ftm->CONTROLS[ch_n].CnSC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
-    ftm->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK; //loading updated values enabled
-    //ftm->SYNCONF |= FTM_SYNCONF_SWRSTCNT_MASK;
-    ftm->MODE |= FTM_MODE_INIT_MASK;
+    ftm->SYNCONF |= FTM_SYNCONF_SYNCMODE_MASK | FTM_SYNCONF_SWWRBUF_MASK; //enhanced
 
     obj->CnV = &ftm->CONTROLS[ch_n].CnV;
     obj->MOD = &ftm->MOD;
@@ -66,7 +65,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
 
     // default to 20ms: standard for servos, and fine for e.g. brightness control
     pwmout_period_ms(obj, 20);
-    pwmout_write    (obj, 0);
+    pwmout_write(obj, 0);
 
     // Wire pinout
     pinmap_pinout(pin, PinMap_PWM);
@@ -83,7 +82,7 @@ void pwmout_write(pwmout_t* obj, float value) {
 
     *obj->CnV = (uint32_t)((float)(*obj->MOD) * value);
     *obj->CNT = 0;
-    //*obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
+    *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
 }
 
 float pwmout_read(pwmout_t* obj) {
@@ -116,4 +115,5 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
     *obj->CnV = PWM_CLOCK_MHZ * us;
+    *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
 }

From 5d95041620375aa7b080b921f164c127303f0095 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Mon, 6 Jan 2014 18:43:17 +0100
Subject: [PATCH 03/24] PWM - legacy mode, LOAD use for updating

---
 .../targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h  | 2 +-
 .../hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c       | 8 +++-----
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
index 69bc95d6e1..d029cc5ebe 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
@@ -43,7 +43,7 @@ struct pwmout_s {
     __IO uint32_t *MOD;
     __IO uint32_t *CNT;
     __IO uint32_t *CnV;
-    __IO uint32_t *SYNC;
+    __IO uint32_t *PWMLOAD;
 };
 
 struct serial_s {
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
index 6c362e0e3c..899c75ca14 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
@@ -54,14 +54,12 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     ftm->MODE |= FTM_MODE_WPDIS_MASK; //write protection disabled
     ftm->CONF |= FTM_CONF_BDMMODE(3);
     ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
-    ftm->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
     ftm->CONTROLS[ch_n].CnSC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
-    ftm->SYNCONF |= FTM_SYNCONF_SYNCMODE_MASK | FTM_SYNCONF_SWWRBUF_MASK; //enhanced
 
     obj->CnV = &ftm->CONTROLS[ch_n].CnV;
     obj->MOD = &ftm->MOD;
     obj->CNT = &ftm->CNT;
-    obj->SYNC = &ftm->SYNC;
+    obj->PWMLOAD = &ftm->PWMLOAD;
 
     // default to 20ms: standard for servos, and fine for e.g. brightness control
     pwmout_period_ms(obj, 20);
@@ -81,8 +79,8 @@ void pwmout_write(pwmout_t* obj, float value) {
     }
 
     *obj->CnV = (uint32_t)((float)(*obj->MOD) * value);
+    *obj->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
     *obj->CNT = 0;
-    *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
 }
 
 float pwmout_read(pwmout_t* obj) {
@@ -115,5 +113,5 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
     *obj->CnV = PWM_CLOCK_MHZ * us;
-    *obj->SYNC |= FTM_SYNC_SWSYNC_MASK;
+    *obj->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
 }

From b5527ca74d5ea8549ac55d75e5dd8d2939b9a9ce Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu <bogdan.marinescu@arm.com>
Date: Tue, 7 Jan 2014 15:57:49 +0200
Subject: [PATCH 04/24] [LPC4088] Switch to 'hard' FP ABI on GCC

This is consistent with the armcc compilation options.
---
 workspace_tools/export/codered_lpc4088_cproject.tmpl | 8 ++++----
 workspace_tools/export/gcc_arm_lpc4088.tmpl          | 2 +-
 workspace_tools/toolchains/gcc.py                    | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/workspace_tools/export/codered_lpc4088_cproject.tmpl b/workspace_tools/export/codered_lpc4088_cproject.tmpl
index 173fea11f1..9b05351086 100644
--- a/workspace_tools/export/codered_lpc4088_cproject.tmpl
+++ b/workspace_tools/export/codered_lpc4088_cproject.tmpl
@@ -41,7 +41,7 @@
                                         <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
                                     {% endfor %}
                                 </option>
-								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4" valueType="enumerated"/>
+								<option id="com.crt.advproject.cpp.fpu.192009095" name="Floating point" superClass="com.crt.advproject.cpp.fpu" value="com.crt.advproject.cpp.fpu.fpv4.hard" valueType="enumerated"/>
                                 <inputType id="com.crt.advproject.compiler.cpp.input.1370967818" superClass="com.crt.advproject.compiler.cpp.input"/>
                             </tool>
                             <tool id="com.crt.advproject.gcc.exe.debug.529082641" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.debug">
@@ -63,7 +63,7 @@
                                         <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
                                     {% endfor %}
                                 </option>
-								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4" valueType="enumerated"/>
+								<option id="com.crt.advproject.gcc.fpu.759979004" name="Floating point" superClass="com.crt.advproject.gcc.fpu" value="com.crt.advproject.gcc.fpu.fpv4.hard" valueType="enumerated"/>
                                 <inputType id="com.crt.advproject.compiler.input.205113874" superClass="com.crt.advproject.compiler.input"/>
                             </tool>
                             <tool id="com.crt.advproject.gas.exe.debug.1277199919" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
@@ -71,7 +71,7 @@
                                 <option id="com.crt.advproject.gas.thumb.1976113150" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
                                 <option id="gnu.both.asm.option.flags.crt.1501250871" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__NEWLIB__  -DDEBUG -D__CODE_RED " valueType="string"/>
                                 <option id="com.crt.advproject.gas.hdrlib.473313643" name="Use headers for C library" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlib" valueType="enumerated"/>
-								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4" valueType="enumerated"/>
+								<option id="com.crt.advproject.gas.fpu.478766821" name="Floating point" superClass="com.crt.advproject.gas.fpu" value="com.crt.advproject.gas.fpu.fpv4.hard" valueType="enumerated"/>
                                 <inputType id="com.crt.advproject.assembler.input.910682278" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
                             </tool>
                             <tool id="com.crt.advproject.link.cpp.exe.debug.1997879384" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.debug">
@@ -106,7 +106,7 @@
                                         <listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/{{path}}}&quot;"/>
                                     {% endfor %}
                                 </option>
-				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4" valueType="enumerated"/>
+				<option id="com.crt.advproject.link.cpp.fpu.1448877425" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" value="com.crt.advproject.link.cpp.fpu.fpv4.hard" valueType="enumerated"/>
 
                                 <inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.1671719885" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
                                     <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
diff --git a/workspace_tools/export/gcc_arm_lpc4088.tmpl b/workspace_tools/export/gcc_arm_lpc4088.tmpl
index 4f40755f51..f25307671a 100644
--- a/workspace_tools/export/gcc_arm_lpc4088.tmpl
+++ b/workspace_tools/export/gcc_arm_lpc4088.tmpl
@@ -17,7 +17,7 @@ CPP     = $(GCC_BIN)arm-none-eabi-g++
 LD      = $(GCC_BIN)arm-none-eabi-gcc
 OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
 
-CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp
+CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard
 CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections 
 CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
 
diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py
index b2cfb2b7e0..a4f0d78de2 100644
--- a/workspace_tools/toolchains/gcc.py
+++ b/workspace_tools/toolchains/gcc.py
@@ -45,7 +45,7 @@ class GCC(mbedToolchain):
         
         if target.core == "Cortex-M4F":
             self.cpu.append("-mfpu=fpv4-sp-d16")
-            self.cpu.append("-mfloat-abi=softfp")
+            self.cpu.append("-mfloat-abi=hard")
         
         # Note: We are using "-O2" instead of "-Os" to avoid this known GCC bug:
         # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46762

From e5f13c047ce5cf289d02bd87cd4b1384bd0a435e Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Tue, 7 Jan 2014 18:35:41 +0100
Subject: [PATCH 05/24] Added Sleep, LED3 and LED4 definitions, switches

Sleep = KL25Z sleep (verified to work correctly)
LED3 = LED1, LED4 = LED2 (for compatibility, similar to LED3 = LED4 in
KL25Z code)
SW1 and SW3 for the two switches (SW2 is reset switch)
---
 .../TARGET_Freescale/TARGET_KL46Z/PinNames.h  |  8 ++-
 .../TARGET_Freescale/TARGET_KL46Z/device.h    |  2 +-
 .../hal/TARGET_Freescale/TARGET_KL46Z/sleep.c | 51 +++++++++++++++++++
 3 files changed, 59 insertions(+), 2 deletions(-)
 create mode 100644 libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/sleep.c

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h
index e9e3f79ac7..80e043cfd7 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h
@@ -197,7 +197,13 @@ typedef enum {
     // mbed original LED naming
     LED1 = LED_GREEN,
     LED2 = LED_RED,
-
+	LED3 = LED_GREEN,
+    LED4 = LED_RED,
+    
+    //Push buttons
+    SW1 = PTC3,
+    SW3 = PTC12,
+	
     // USB Pins
     USBTX = PTA2,
     USBRX = PTA1,
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/device.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/device.h
index 82374a0224..ef2d8260d3 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/device.h
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/device.h
@@ -45,7 +45,7 @@
 #define DEVICE_LOCALFILESYSTEM  0
 #define DEVICE_ID_LENGTH       24
 
-#define DEVICE_SLEEP            0
+#define DEVICE_SLEEP            1
 
 #define DEVICE_DEBUG_AWARENESS  0
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/sleep.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/sleep.c
new file mode 100644
index 0000000000..3fcffd4fbd
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/sleep.c
@@ -0,0 +1,51 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "sleep_api.h"
+#include "cmsis.h"
+
+//Normal wait mode
+void sleep(void)
+{
+    SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
+
+    //Normal sleep mode for ARM core:
+    SCB->SCR = 0;
+    __WFI();
+}
+
+//Very low-power stop mode
+void deepsleep(void)
+{
+    //Check if PLL/FLL is enabled:
+    uint32_t PLL_FLL_en = (MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0);
+    
+    SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
+    SMC->PMCTRL = SMC_PMCTRL_STOPM(2);
+
+    //Deep sleep for ARM core:
+    SCB->SCR = 1<<SCB_SCR_SLEEPDEEP_Pos;
+
+    __WFI();
+
+    //Switch back to PLL as clock source if needed
+    //The interrupt that woke up the device will run at reduced speed
+    if (PLL_FLL_en) {
+        if (MCG->C6 & (1<<MCG_C6_PLLS_SHIFT) != 0) /* If PLL */
+            while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U); /* Wait until locked */
+        MCG->C1 &= ~MCG_C1_CLKS_MASK;
+    }
+
+}

From a6e45b7d38ade3ea4d3d04277170939a11738ee5 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Tue, 7 Jan 2014 20:23:54 +0100
Subject: [PATCH 06/24] spi - disable rx/tx fifo, write/readable flags change

---
 .../TARGET_Freescale/TARGET_K20D5M/spi_api.c  | 59 +++++++++++--------
 1 file changed, 35 insertions(+), 24 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
index 1fd563c868..3300dfdfd1 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
@@ -59,11 +59,12 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
         error("SPI pinout mapping failed");
     }
 
-    SIM->SCGC5 |= (1 << 11) | (1 << 12); // PortC & D
-    SIM->SCGC6 |= 1 << 12;               // spi clocks
+    SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK;
+    SIM->SCGC6 |= SIM_SCGC6_SPI0_MASK;
 
     // halted state
-    obj->spi->MCR = SPI_MCR_HALT_MASK;
+    obj->spi->MCR &= ~SPI_MCR_MDIS_MASK;
+    obj->spi->MCR |= SPI_MCR_HALT_MASK | SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK;
 
     // set default format and frequency
     if (ssel == NC) {
@@ -111,50 +112,60 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
     obj->spi->CTAR[0] |= (polarity << SPI_CTAR_CPOL_SHIFT) | (phase << SPI_CTAR_CPHA_SHIFT);
 }
 
+static const uint8_t baudrate_prescaler[] = {2,3,5,7};
+static const uint32_t baudrate_scaler[] = {2, 4, 6, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768};
+static const uint8_t delay_prescaler[] = {1, 3, 5, 7};
+
 void spi_frequency(spi_t *obj, int hz) {
     uint32_t error = 0;
     uint32_t p_error = 0xffffffff;
     uint32_t ref = 0;
-    uint32_t spr = 0;
+    uint32_t br = 0;
     uint32_t ref_spr = 0;
     uint32_t ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = 48000000u;
-    uint32_t prescaler = 1;
+    uint32_t PCLK = SystemCoreClock;
     uint32_t divisor = 2;
+    uint32_t prescaler;
 
-    for (prescaler = 1; prescaler <= 8; prescaler++) {
+    /* TODO */
+    for (uint32_t i = 0; i < 4; i++) {
+        prescaler = baudrate_prescaler[i];
         divisor = 2;
-        for (spr = 0; spr <= 8; spr++, divisor *= 2) {
-            ref = PCLK / (prescaler*divisor);
-            if (ref > (uint32_t)hz)
-                continue;
-            error = hz - ref;
-            if (error < p_error) {
-                ref_spr = spr;
-                ref_prescaler = prescaler - 1;
-                p_error = error;
+        for (br = 0; br <= 15; br++, divisor *= 2) {
+            for (uint32_t dr = 0; dr < 2; dr++) {
+                ref = (PCLK / prescaler) * ((1U + dr) / divisor);
+                if (ref > (uint32_t)hz)
+                    continue;
+                error = hz - ref;
+                if (error < p_error) {
+                    ref_spr = br;
+                    ref_prescaler = i;
+                    p_error = error;
+                }
             }
         }
     }
 
-    // set SPPR and SPR
-    obj->spi->CTAR[0] = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
+    // set PBR and BR
+    obj->spi->CTAR[0] = ((ref_prescaler & 0x3) << SPI_CTAR_PBR_SHIFT) | (ref_spr & 0xf);
 }
 
-static inline int spi_writeable(spi_t * obj) {
-    return (obj->spi->SR & SPI_SR_TCF_MASK) ? 1 : 0;
-}
-
-static inline int spi_readable(spi_t * obj) {
+static inline int spi_writeable(spi_t *obj) {
     return (obj->spi->SR & SPI_SR_TFFF_MASK) ? 1 : 0;
 }
 
+static inline int spi_readable(spi_t *obj) {
+    return (obj->spi->SR & SPI_SR_RFDF_MASK) ? 0 : 1;
+}
+
 int spi_master_write(spi_t *obj, int value) {
     // wait tx buffer empty
     while(!spi_writeable(obj));
-    obj->spi->PUSHR = SPI_PUSHR_TXDATA(value & 0xff);
+    obj->spi->PUSHR = SPI_PUSHR_TXDATA(value & 0xff) /*| SPI_PUSHR_EOQ_MASK*/;
+
+    while (!obj->spi->SR & SPI_SR_TCF_MASK); // wait for transfer to be complete
 
     // wait rx buffer full
     while (!spi_readable(obj));

From 889952790fba7f8abe24cd8435cfa1303e520376 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Wed, 8 Jan 2014 10:58:51 +0100
Subject: [PATCH 07/24] PWM - mux addition

---
 .../TARGET_K20D5M/pwmout_api.c                | 28 ++++++++++++-------
 1 file changed, 18 insertions(+), 10 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
index 899c75ca14..d925c8730c 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
@@ -21,17 +21,30 @@
 
 static const PinMap PinMap_PWM[] = {
     // LEDs
-    {LED_RED  , PWM_3 , 3}, // PTC3, FTM0 CH2
-    {LED_GREEN, PWM_5,  3}, // PTD4, FTM0 CH4
+    {LED_RED  , PWM_3 , 4}, // PTC3, FTM0 CH2
+    {LED_GREEN, PWM_5,  4}, // PTD4, FTM0 CH4
     {LED_BLUE , PWM_8 , 3}, // PTA2, FTM0 CH7
 
     // Arduino digital pinout
-    {D3,  PWM_5 , 3}, // PTD4, FTM0 CH4
+    {D3,  PWM_5 , 4}, // PTD4, FTM0 CH4
     {D5,  PWM_7 , 3}, // PTA1, FTM0 CH6
-    {D6,  PWM_3 , 3}, // PTC3, FTM0 CH2
-    {D9,  PWM_8 , 4}, // PTD2, FTM0 CH7
+    {D6,  PWM_3 , 4}, // PTC3, FTM0 CH2
+    {D9,  PWM_6 , 4}, // PTD5, FTM0 CH6
     {D10, PWM_2 , 4}, // PTC2, FTM0 CH1
 
+    {PTA0,  PWM_6 , 3}, // PTA0, FTM0 CH5
+    {PTA3,  PWM_0 , 3}, // PTA3, FTM0 CH0
+    {PTA4,  PWM_1 , 3}, // PTA4, FTM0 CH1
+    {PTA5,  PWM_3 , 3}, // PTA5, FTM0 CH2
+    {PTA12, PWM_9 , 3}, // PTA12, FTM1 CH0
+    {PTA13, PWM_10, 3}, // PTA13, FTM1 CH1
+    {PTB0,  PWM_9 , 3}, // PTB0, FTM1 CH0
+    {PTB1,  PWM_10, 3}, // PTB1, FTM1 CH1
+    {PTC1,  PWM_0 , 4}, // PTC1, FTM0 CH0
+    {PTD4,  PWM_4 , 4}, // PTD4, FTM0 CH3
+    {PTD6,  PWM_7 , 4}, // PTD6, FTM0 CH6
+    {PTD7,  PWM_8 , 4}, // PTD7, FTM0 CH7
+
     {NC , NC    , 0}
 };
 
@@ -51,7 +64,6 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     SIM->SCGC6 |= 1 << (SIM_SCGC6_FTM0_SHIFT + ftm_n);
 
     FTM_Type *ftm = (FTM_Type *)(FTM0_BASE + 0x1000 * ftm_n);
-    ftm->MODE |= FTM_MODE_WPDIS_MASK; //write protection disabled
     ftm->CONF |= FTM_CONF_BDMMODE(3);
     ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
     ftm->CONTROLS[ch_n].CnSC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
@@ -59,7 +71,6 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     obj->CnV = &ftm->CONTROLS[ch_n].CnV;
     obj->MOD = &ftm->MOD;
     obj->CNT = &ftm->CNT;
-    obj->PWMLOAD = &ftm->PWMLOAD;
 
     // default to 20ms: standard for servos, and fine for e.g. brightness control
     pwmout_period_ms(obj, 20);
@@ -79,8 +90,6 @@ void pwmout_write(pwmout_t* obj, float value) {
     }
 
     *obj->CnV = (uint32_t)((float)(*obj->MOD) * value);
-    *obj->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
-    *obj->CNT = 0;
 }
 
 float pwmout_read(pwmout_t* obj) {
@@ -113,5 +122,4 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
     *obj->CnV = PWM_CLOCK_MHZ * us;
-    *obj->PWMLOAD |= FTM_PWMLOAD_LDOK_MASK;
 }

From ffac7e6d6ad3d6ed3a314835c62effc91def6645 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Wed, 8 Jan 2014 12:05:11 +0100
Subject: [PATCH 08/24] PWM - pwmload removed from the objects header file

---
 .../mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h    | 1 -
 1 file changed, 1 deletion(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
index d029cc5ebe..257bc5c802 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/objects.h
@@ -43,7 +43,6 @@ struct pwmout_s {
     __IO uint32_t *MOD;
     __IO uint32_t *CNT;
     __IO uint32_t *CnV;
-    __IO uint32_t *PWMLOAD;
 };
 
 struct serial_s {

From 4732796ab47666036d410860481c3013e1392e29 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Wed, 8 Jan 2014 17:32:28 +0100
Subject: [PATCH 09/24] PWM channels definition update, serial uses external
 global variable system clock

---
 .../targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c | 6 +++---
 .../targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c | 3 +--
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
index d925c8730c..e5fcf37667 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
@@ -33,14 +33,14 @@ static const PinMap PinMap_PWM[] = {
     {D10, PWM_2 , 4}, // PTC2, FTM0 CH1
 
     {PTA0,  PWM_6 , 3}, // PTA0, FTM0 CH5
-    {PTA3,  PWM_0 , 3}, // PTA3, FTM0 CH0
-    {PTA4,  PWM_1 , 3}, // PTA4, FTM0 CH1
+    {PTA3,  PWM_1 , 3}, // PTA3, FTM0 CH0
+    {PTA4,  PWM_2 , 3}, // PTA4, FTM0 CH1
     {PTA5,  PWM_3 , 3}, // PTA5, FTM0 CH2
     {PTA12, PWM_9 , 3}, // PTA12, FTM1 CH0
     {PTA13, PWM_10, 3}, // PTA13, FTM1 CH1
     {PTB0,  PWM_9 , 3}, // PTB0, FTM1 CH0
     {PTB1,  PWM_10, 3}, // PTB1, FTM1 CH1
-    {PTC1,  PWM_0 , 4}, // PTC1, FTM0 CH0
+    {PTC1,  PWM_1 , 4}, // PTC1, FTM0 CH0
     {PTD4,  PWM_4 , 4}, // PTD4, FTM0 CH3
     {PTD6,  PWM_7 , 4}, // PTD6, FTM0 CH6
     {PTD7,  PWM_8 , 4}, // PTD7, FTM0 CH7
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
index 2356648b30..b6a5ff926f 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
@@ -98,8 +98,7 @@ void serial_baud(serial_t *obj, int baudrate) {
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
 
-    // [TODO] not hardcode this value
-    uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u;
+    uint32_t PCLK = (obj->uart == UART0) ? SystemCoreClock : SystemCoreClock/2;
 
     // First we check to see if the basic divide with no DivAddVal/MulVal
     // ratio gives us an integer result. If it does, we set DivAddVal = 0,

From ed7954f5acd947d1bd3caff76e3fdbb30aa02a3f Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Wed, 8 Jan 2014 21:00:40 +0100
Subject: [PATCH 10/24] Fixed KL25Z SPI clock

https://mbed.org/questions/2309/spifrequency-for-KL25Z/
---
 .../mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
index 20a953aec7..429d38f968 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
@@ -145,7 +145,7 @@ void spi_frequency(spi_t *obj, int hz) {
     uint8_t  ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = 48000000u;
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
     uint8_t prescaler = 1;
     uint8_t divisor = 2;
 

From 210cead56b9edd2019bdc879453b43e2d0e4bac8 Mon Sep 17 00:00:00 2001
From: sg- <sam.w.grove@gmail.com>
Date: Wed, 8 Jan 2014 16:41:13 -0600
Subject: [PATCH 11/24] changes

---
 README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index 9c9998661b..bd2cb88690 100644
--- a/README.md
+++ b/README.md
@@ -1,5 +1,5 @@
-mbed SDK
-========
+mbed SDK 
+======== 
 
 [![Build Status](https://travis-ci.org/mbedmicro/mbed.png)](https://travis-ci.org/mbedmicro/mbed/builds)
 

From a1a2fec25938c62b705cfefe30108798cf9397ea Mon Sep 17 00:00:00 2001
From: Andreas Rebert <andreas.rebert@embeddedartists.com>
Date: Thu, 9 Jan 2014 07:44:15 +0100
Subject: [PATCH 12/24] [LPC4088]: Corrected RAM size in linker script
 (ARM_GCC)

---
 .../TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld
index 364154d143..226e6baf46 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld
@@ -4,7 +4,7 @@
 MEMORY
 {
   FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
-  RAM (rwx) : ORIGIN = 0x100000E8, LENGTH = (32K - 0xE8)
+  RAM (rwx) : ORIGIN = 0x100000E8, LENGTH = (64K - 0xE8)
 
   USB_RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 16K
   ETH_RAM(rwx) : ORIGIN = 0x20004000, LENGTH = 16K

From 7df2622a76feed282ab4d9e7155c23c503ad4277 Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Thu, 9 Jan 2014 07:57:45 +0100
Subject: [PATCH 13/24] SPI clock fix for KL05Z and KL46Z

---
 .../mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/spi_api.c    | 2 +-
 .../mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/spi_api.c
index fcf7bd657c..183bc5bf97 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/spi_api.c
@@ -115,7 +115,7 @@ void spi_frequency(spi_t *obj, int hz) {
     uint8_t  ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = 23986176u;
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
     uint8_t prescaler = 1;
     uint8_t divisor = 2;
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c
index c717768b0d..ea09ebc9f6 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c
@@ -158,7 +158,7 @@ void spi_frequency(spi_t *obj, int hz) {
     uint8_t  ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = 48000000u;
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
     uint8_t prescaler = 1;
     uint8_t divisor = 2;
 

From 3157d5afb2ec424337e1a6725e89e232e7059f81 Mon Sep 17 00:00:00 2001
From: Andreas Rebert <andreas.rebert@embeddedartists.com>
Date: Thu, 9 Jan 2014 08:51:30 +0100
Subject: [PATCH 14/24] [LPC4088] Making it possible to reserve stack space by
 weak function.

---
 .../cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys.cpp  | 3 ++-
 workspace_tools/export/uvision4_lpc4088.uvopt.tmpl             | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys.cpp
index 2f1024ace8..ad00bc43c9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys.cpp
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys.cpp
@@ -11,6 +11,7 @@ extern "C" {
 
 #include <rt_misc.h>
 #include <stdint.h>
+#include "sys_helper.h"
 
 extern char Image$$RW_IRAM1$$ZI$$Limit[];
 
@@ -22,7 +23,7 @@ extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_
 
     struct __initial_stackheap r;
     r.heap_base = zi_limit;
-    r.heap_limit = sp_limit;
+    r.heap_limit = sp_limit - __reserved_stack_size();
     return r;
 }
 
diff --git a/workspace_tools/export/uvision4_lpc4088.uvopt.tmpl b/workspace_tools/export/uvision4_lpc4088.uvopt.tmpl
index 77400b267c..542903f60d 100644
--- a/workspace_tools/export/uvision4_lpc4088.uvopt.tmpl
+++ b/workspace_tools/export/uvision4_lpc4088.uvopt.tmpl
@@ -21,7 +21,7 @@
   </DaveTm>
 
   <Target>
-    <TargetName>mbed NXP LPC1768</TargetName>
+    <TargetName>mbed NXP LPC4088</TargetName>
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>

From 1448b871c12852c351713e2e62e36d1c18023a6a Mon Sep 17 00:00:00 2001
From: Andreas Rebert <andreas.rebert@embeddedartists.com>
Date: Thu, 9 Jan 2014 08:52:33 +0100
Subject: [PATCH 15/24] [LPC4088] Making it possible to reserve stack space by
 weak function.

---
 .../TOOLCHAIN_ARM_STD/sys_helper.cpp          | 19 +++++++++++++++++++
 .../TOOLCHAIN_ARM_STD/sys_helper.h            | 17 +++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
 create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
new file mode 100644
index 0000000000..cc1064628b
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
@@ -0,0 +1,19 @@
+/* mbed Microcontroller Library - stackheap
+ * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
+ *
+ */
+
+#include "sys_helper.h"
+
+/* This function specifies the amount of memory of the internal RAM to
+   reserve for the stack. The default implementation will reserve 0 bytes
+   which gives the normal behaviour where the stack and heap share all the
+   internal RAM.
+
+   You can override this function in your code to reserve a number of bytes
+   for the stack.
+*/
+extern "C" WEAK uint32_t __reserved_stack_size();
+extern "C" WEAK uint32_t __reserved_stack_size() {
+    return 0; // return 0 to indicate that nothing is reserved
+}
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h
new file mode 100644
index 0000000000..3fda8f5e30
--- /dev/null
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h
@@ -0,0 +1,17 @@
+#ifndef SYS_HELPER_H
+#define SYS_HELPER_H
+
+#include <stdint.h>
+#include "toolchain.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+uint32_t __reserved_stack_size();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

From e8b09cbc2d0ed6fcb8750337f9ed6a58cbabdbba Mon Sep 17 00:00:00 2001
From: Andreas Rebert <andreas.rebert@embeddedartists.com>
Date: Thu, 9 Jan 2014 09:10:10 +0100
Subject: [PATCH 16/24] [LPC4088] Corrected an invalid header file dependecy.

---
 .../TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp           | 4 ++--
 .../TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h  | 1 -
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
index cc1064628b..eb31c5ed9f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.cpp
@@ -13,7 +13,7 @@
    You can override this function in your code to reserve a number of bytes
    for the stack.
 */
-extern "C" WEAK uint32_t __reserved_stack_size();
-extern "C" WEAK uint32_t __reserved_stack_size() {
+extern "C" __attribute__((weak)) uint32_t __reserved_stack_size();
+extern "C" __attribute__((weak)) uint32_t __reserved_stack_size() {
     return 0; // return 0 to indicate that nothing is reserved
 }
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h
index 3fda8f5e30..4ba0770b4f 100644
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/sys_helper.h
@@ -2,7 +2,6 @@
 #define SYS_HELPER_H
 
 #include <stdint.h>
-#include "toolchain.h"
 
 #ifdef __cplusplus
 extern "C" {

From eedce209c50ecb01fa1af6be68b114d8dcd4d6fc Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Fri, 10 Jan 2014 21:45:26 +0100
Subject: [PATCH 17/24] Removed hardcoded frequencies, replaced by
 automatically calculated

ADC frequency 1.5MHz -> 6MHz (if possible, otherwise it tries as close
to, but less than 6MHz)
pwm tries to get its clock as close as possible to 1MHz, but not lower
than 1MHz
---
 .../TARGET_KL25Z/analogin_api.c               | 22 ++++++++++++++-----
 .../TARGET_Freescale/TARGET_KL25Z/i2c_api.c   |  2 +-
 .../TARGET_KL25Z/pwmout_api.c                 | 19 ++++++++++++----
 .../TARGET_KL25Z/serial_api.c                 | 12 +---------
 .../TARGET_Freescale/TARGET_KL25Z/us_ticker.c |  3 ++-
 5 files changed, 36 insertions(+), 22 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
index 455fa835db..973900fae4 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
@@ -19,6 +19,8 @@
 #include "pinmap.h"
 #include "error.h"
 
+#define MAX_FADC        6000000
+
 static const PinMap PinMap_ADC[] = {
     {PTE20, ADC0_SE0,  0},
     {PTE22, ADC0_SE3,  0},
@@ -54,14 +56,24 @@ void analogin_init(analogin_t *obj, PinName pin) {
     if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
         cfg2_muxsel = 0;
     }
+    
+    // bus clk
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    uint32_t clkdiv;
+    for (clkdiv = 0; clkdiv < 4; clkdiv++) {
+        if ((PCLK >> clkdiv) <= MAX_FADC)
+            break;
+    }
+    if (clkdiv == 4)                    //Set max div
+        clkdiv = 0x7;
 
     ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
 
-    ADC0->CFG1 = ADC_CFG1_ADLPC_MASK    // Low-Power Configuration
-               | ADC_CFG1_ADIV(3)       // Clock Divide Select: (Input Clock)/8
-               | ADC_CFG1_ADLSMP_MASK   // Long Sample Time
-               | ADC_CFG1_MODE(3)       // (16)bits Resolution
-               | ADC_CFG1_ADICLK(1);    // Input Clock: (Bus Clock)/2
+    ADC0->CFG1 = ADC_CFG1_ADLPC_MASK            // Low-Power Configuration
+               | ADC_CFG1_ADIV(clkdiv & 0x3)    // Clock Divide Select: (Input Clock)/8
+               | ADC_CFG1_ADLSMP_MASK           // Long Sample Time
+               | ADC_CFG1_MODE(3)               // (16)bits Resolution
+               | ADC_CFG1_ADICLK(clkdiv >> 2);  // Input Clock: (Bus Clock)/2
 
     ADC0->CFG2 = cfg2_muxsel            // ADxxb or ADxxa channels
                | ADC_CFG2_ADACKEN_MASK  // Asynchronous Clock Output Enable
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
index 7cf3b2683c..01a6c31437 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
@@ -206,7 +206,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
     uint32_t ref = 0;
     uint8_t i, j;
     // bus clk
-    uint32_t PCLK = 24000000u;
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
     uint32_t pulse = PCLK / (hz * 2);
 
     // we look for the values that minimize the error
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
index 4265c8e5bc..c7d3196d91 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
@@ -64,14 +64,25 @@ static const PinMap PinMap_PWM[] = {
     {NC , NC    , 0}
 };
 
-#define PWM_CLOCK_MHZ       (0.75) // (48)MHz / 64 = (0.75)MHz
+static float pwm_clock;
 
 void pwmout_init(pwmout_t* obj, PinName pin) {
     // determine the channel
     PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
     if (pwm == (PWMName)NC)
         error("PwmOut pin mapping failed");
-
+    
+    uint32_t clkdiv = 0;
+    float clkval = SystemCoreClock / 1000000.0f;
+    
+    while (clkval > 1) {
+        clkdiv++;
+        clkval /= 2.0;  
+        if (clkdiv == 7)
+            break;
+    }
+    
+    pwm_clock = clkval;
     unsigned int port = (unsigned int)pin >> PORT_SHIFT;
     unsigned int tpm_n = (pwm >> TPM_SHIFT);
     unsigned int ch_n = (pwm & 0xFF);
@@ -125,7 +136,7 @@ void pwmout_period_ms(pwmout_t* obj, int ms) {
 // Set the PWM period, keeping the duty cycle the same.
 void pwmout_period_us(pwmout_t* obj, int us) {
     float dc = pwmout_read(obj);
-    *obj->MOD = PWM_CLOCK_MHZ * us;
+    *obj->MOD = (uint32_t)(pwm_clock * (float)us);
     pwmout_write(obj, dc);
 }
 
@@ -138,5 +149,5 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 }
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
-    *obj->CnV = PWM_CLOCK_MHZ * us;
+    *obj->CnV = (uint32_t)(pwm_clock * (float)us);
 }
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
index 0d360060be..5b8d4f4ad8 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
@@ -111,16 +111,6 @@ void serial_free(serial_t *obj) {
 // serial_baud
 //
 // set the baud rate, taking in to account the current SystemFrequency
-//
-// The LPC2300 and LPC1700 have a divider and a fractional divider to control the
-// baud rate. The formula is:
-//
-// Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
-//   where:
-//     1 < MulVal <= 15
-//     0 <= DivAddVal < 14
-//     DivAddVal < MulVal
-//
 void serial_baud(serial_t *obj, int baudrate) {
     
     // save C2 state
@@ -130,7 +120,7 @@ void serial_baud(serial_t *obj, int baudrate) {
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
     
     // [TODO] not hardcode this value
-    uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u;
+    uint32_t PCLK = (obj->uart == UART0) ? SystemCoreClock : SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
 
     // First we check to see if the basic divide with no DivAddVal/MulVal
     // ratio gives us an integer result. If it does, we set DivAddVal = 0,
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
index 6f593d40b9..6b2e0798df 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
@@ -43,7 +43,8 @@ static void pit_init(void) {
     PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;   // Start timer 1
     
     // Use channel 0 as a prescaler for channel 1
-    PIT->CHANNEL[0].LDVAL = 23;
+    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    PIT->CHANNEL[0].LDVAL = PCLK / 1000000 - 1;
     PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TEN_MASK;    // Start timer 0, disable interrupts
 }
 

From ebdbf53ba1a2161de5091f61b58d9d4b31476e07 Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Sat, 11 Jan 2014 09:40:10 +0100
Subject: [PATCH 18/24] Updat PWM prescaler correctly

---
 .../mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
index c7d3196d91..447d1c6e5b 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
@@ -92,7 +92,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
 
     TPM_Type *tpm = (TPM_Type *)(TPM0_BASE + 0x1000 * tpm_n);
-    tpm->SC = TPM_SC_CMOD(1) | TPM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
+    tpm->SC = TPM_SC_CMOD(1) | TPM_SC_PS(clkdiv); // (clock)MHz / clkdiv ~= (0.75)MHz
     tpm->CONTROLS[ch_n].CnSC = (TPM_CnSC_MSB_MASK | TPM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
 
     obj->CnV = &tpm->CONTROLS[ch_n].CnV;

From aa0f7a7026eed06c12b2f9b13ba864163db9096a Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Sat, 11 Jan 2014 19:10:36 +0100
Subject: [PATCH 19/24] Added clk_freqs.h for clock related functions

Serial now also works when PLL/FLL is disabled and extosc is available.

us_ticker tries to divide extosc to 1MHz, otherwise use fast internal
oscillator
---
 .../TARGET_KL25Z/analogin_api.c               |  3 +-
 .../TARGET_Freescale/TARGET_KL25Z/clk_freqs.h | 91 +++++++++++++++++++
 .../TARGET_Freescale/TARGET_KL25Z/i2c_api.c   |  3 +-
 .../TARGET_KL25Z/serial_api.c                 |  9 +-
 .../TARGET_Freescale/TARGET_KL25Z/spi_api.c   |  3 +-
 .../TARGET_Freescale/TARGET_KL25Z/us_ticker.c | 36 +++++++-
 6 files changed, 135 insertions(+), 10 deletions(-)
 create mode 100644 libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
index 973900fae4..f45fb05ad9 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c
@@ -18,6 +18,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 #define MAX_FADC        6000000
 
@@ -58,7 +59,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
     }
     
     // bus clk
-    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    uint32_t PCLK = bus_frequency();
     uint32_t clkdiv;
     for (clkdiv = 0; clkdiv < 4; clkdiv++) {
         if ((PCLK >> clkdiv) <= MAX_FADC)
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h
new file mode 100644
index 0000000000..4273872b70
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h
@@ -0,0 +1,91 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_CLK_FREQS_H
+#define MBED_CLK_FREQS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//Get the peripheral bus clock frequency
+static inline uint32_t bus_frequency(void) {
+    return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+}
+
+//Get external oscillator (crystal) frequency
+static uint32_t extosc_frequency(void) {
+    uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
+
+    if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2))     //MCG clock = external reference clock
+        return MCGClock;
+    
+    if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) {   //PLL/FLL is selected
+        uint32_t divider, multiplier;
+        if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {         //FLL is selected
+            if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) {     //FLL uses external reference
+                divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
+                if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
+                    divider <<= 5u;
+                /* Select correct multiplier to calculate the MCG output clock  */
+                switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
+                    case 0x0u:
+                      multiplier = 640u;
+                      break;
+                    case 0x20u:
+                      multiplier = 1280u;
+                      break;
+                    case 0x40u:
+                      multiplier = 1920u;
+                      break;
+                    case 0x60u:
+                      multiplier = 2560u;
+                      break;
+                    case 0x80u:
+                      multiplier = 732u;
+                      break;
+                    case 0xA0u:
+                      multiplier = 1464u;
+                      break;
+                    case 0xC0u:
+                      multiplier = 2197u;
+                      break;
+                    case 0xE0u:
+                    default:
+                      multiplier = 2929u;
+                      break;
+                }
+                
+                return MCGClock * divider / multiplier;
+            }
+        } else {             //PLL is selected
+            divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
+            multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
+            return MCGClock * divider / multiplier;            
+        }
+    }
+    
+    //In all other cases either there is no crystal or we cannot determine it
+    //For example when the FLL is running on the internal reference, and there is also an
+    //external crystal. However these are unlikely situations
+    return 0;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
index 01a6c31437..110f7942fc 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/i2c_api.c
@@ -18,6 +18,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_I2C_SDA[] = {
     {PTE25, I2C_0, 5},
@@ -206,7 +207,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
     uint32_t ref = 0;
     uint8_t i, j;
     // bus clk
-    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    uint32_t PCLK = bus_frequency();
     uint32_t pulse = PCLK / (hz * 2);
 
     // we look for the values that minimize the error
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
index 5b8d4f4ad8..fe986519bc 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
@@ -23,6 +23,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 /******************************************************************************
  * INITIALIZATION
@@ -70,7 +71,10 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     obj->uart = (UARTLP_Type *)uart;
     // enable clk
     switch (uart) {
-        case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT2_UART0SRC_SHIFT);
+        case UART_0: if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0))   //PLL/FLL is selected
+                        SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT2_UART0SRC_SHIFT);
+                     else
+                        SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
                      SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
         case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
         case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
@@ -119,8 +123,7 @@ void serial_baud(serial_t *obj, int baudrate) {
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
     
-    // [TODO] not hardcode this value
-    uint32_t PCLK = (obj->uart == UART0) ? SystemCoreClock : SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    uint32_t PCLK = (obj->uart == UART0) ? SystemCoreClock : bus_frequency();
 
     // First we check to see if the basic divide with no DivAddVal/MulVal
     // ratio gives us an integer result. If it does, we set DivAddVal = 0,
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
index 429d38f968..f039a0468c 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/spi_api.c
@@ -20,6 +20,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_SPI_SCLK[] = {
     {PTA15, SPI_0, 2},
@@ -145,7 +146,7 @@ void spi_frequency(spi_t *obj, int hz) {
     uint8_t  ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+    uint32_t PCLK = bus_frequency();
     uint8_t prescaler = 1;
     uint8_t divisor = 2;
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
index 6b2e0798df..2b33130b2f 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
@@ -16,6 +16,7 @@
 #include <stddef.h>
 #include "us_ticker_api.h"
 #include "PeripheralNames.h"
+#include "clk_freqs.h"
 
 static void pit_init(void);
 static void lptmr_init(void);
@@ -43,8 +44,7 @@ static void pit_init(void) {
     PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK;   // Start timer 1
     
     // Use channel 0 as a prescaler for channel 1
-    uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
-    PIT->CHANNEL[0].LDVAL = PCLK / 1000000 - 1;
+    PIT->CHANNEL[0].LDVAL = bus_frequency() / 1000000 - 1;
     PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TEN_MASK;    // Start timer 0, disable interrupts
 }
 
@@ -77,8 +77,36 @@ static void lptmr_init(void) {
     NVIC_EnableIRQ(LPTimer_IRQn);
     
     /* Clock at (1)MHz -> (1)tick/us */
-    LPTMR0->PSR = LPTMR_PSR_PCS(3);       // OSCERCLK -> 8MHz
-    LPTMR0->PSR |= LPTMR_PSR_PRESCALE(2); // divide by 8
+    /* Check if the external oscillator can be divided to 1MHz */
+    uint32_t extosc = extosc_frequency();
+    
+    if (extosc != 0) {                      //If external oscillator found
+        if (extosc % 1000000u == 0) {       //If it is a multiple if 1MHz
+            extosc /= 1000000;
+            if (extosc == 1)    {           //1MHz, set timerprescaler in bypass mode
+                LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PBYP_MASK;
+                return;
+            } else {                        //See if we can divide it to 1MHz
+                uint32_t divider = 0;
+                extosc >>= 1;
+                while (1) {
+                    if (extosc == 1) {
+                        LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PRESCALE(divider);
+                        return;
+                    }
+                    if (extosc % 2 != 0)    //If we can't divide by two anymore
+                        break;
+                    divider++;
+                    extosc >>= 1;
+                }
+            }
+        }
+    }
+    //No suitable external oscillator clock -> Use fast internal oscillator (4MHz)
+    MCG->C1 |= MCG_C1_IRCLKEN_MASK;
+    MCG->C2 |= MCG_C2_IRCS_MASK;
+    LPTMR0->PSR = LPTMR_PSR_PCS(0) | LPTMR_PSR_PRESCALE(1);
+    
 }
 
 void us_ticker_disable_interrupt(void) {

From df403f243056054d65429751cfb71d591f4a53de Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Sun, 12 Jan 2014 09:03:46 +0100
Subject: [PATCH 20/24] Initial commit - CoIDE for KL25Z

---
 workspace_tools/export/__init__.py            | 23 +++---
 workspace_tools/export/coide.py               | 52 +++++++++++++
 .../export/coide_kl25z.coproj.tmpl            | 75 +++++++++++++++++++
 3 files changed, 139 insertions(+), 11 deletions(-)
 create mode 100644 workspace_tools/export/coide.py
 create mode 100644 workspace_tools/export/coide_kl25z.coproj.tmpl

diff --git a/workspace_tools/export/__init__.py b/workspace_tools/export/__init__.py
index 753c3620d2..1c3eb1e919 100644
--- a/workspace_tools/export/__init__.py
+++ b/workspace_tools/export/__init__.py
@@ -20,7 +20,7 @@ from os import makedirs
 from shutil import copytree, rmtree
 
 from workspace_tools.utils import mkdir
-from workspace_tools.export import uvision4, codesourcery, codered, gccarm, ds5_5, iar
+from workspace_tools.export import uvision4, codesourcery, codered, gccarm, ds5_5, iar, coide
 from workspace_tools.export.exporters import zip_working_directory_and_clean_up, OldLibrariesException
 from workspace_tools.targets import EXPORT_MAP
 
@@ -30,7 +30,8 @@ EXPORTERS = {
     'codesourcery': codesourcery.CodeSourcery,
     'gcc_arm': gccarm.GccArm,
     'ds5_5': ds5_5.DS5_5,
-    'iar': iar.IAREmbeddedWorkbench
+    'iar': iar.IAREmbeddedWorkbench,
+    'coide' : coide.CoIDE
 }
 
 ERROR_MESSAGE_UNSUPPORTED_TOOLCHAIN = """
@@ -51,16 +52,16 @@ def export(project_path, project_name, ide, target, destination='/tmp/', tempdir
     # Convention: we are using capitals for toolchain and target names
     if target is not None:
         target = target.upper()
-    
+
     if tempdir is None:
         tempdir = tempfile.mkdtemp()
-    
+
     if ide is None:
         # Simply copy everything, no project files to be generated
         for d in ['src', 'lib']:
             os.system("cp -r %s/* %s" % (join(project_path, d), tempdir))
         report = {'success': True}
-    
+
     else:
         report = {'success': False}
         if ide not in EXPORTERS:
@@ -78,11 +79,11 @@ def export(project_path, project_name, ide, target, destination='/tmp/', tempdir
                     report['success'] = True
                 except OldLibrariesException, e:
                     report['errormsg'] = ERROR_MESSAGE_NOT_EXPORT_LIBS
-    
+
     zip_path = None
     if report['success']:
         zip_path = zip_working_directory_and_clean_up(tempdir, destination, project_name, clean)
-    
+
     return zip_path, report
 
 
@@ -95,7 +96,7 @@ def copy_tree(src, dst, clean=True):
             rmtree(dst)
         else:
             return
-    
+
     copytree(src, dst)
 
 
@@ -104,14 +105,14 @@ def setup_user_prj(user_dir, prj_path, lib_paths=None):
     Setup a project with the same directory structure of the mbed online IDE
     """
     mkdir(user_dir)
-    
+
     # Project Path
     copy_tree(prj_path, join(user_dir, "src"))
-    
+
     # Project Libraries
     user_lib = join(user_dir, "lib")
     mkdir(user_lib)
-    
+
     if lib_paths is not None:
         for lib_path in lib_paths:
             copy_tree(lib_path, join(user_lib, basename(lib_path)))
diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
new file mode 100644
index 0000000000..fd8c1227b2
--- /dev/null
+++ b/workspace_tools/export/coide.py
@@ -0,0 +1,52 @@
+"""
+mbed SDK
+Copyright (c) 2014 ARM Limited
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+"""
+from exporters import Exporter
+from os.path import splitext, basename
+
+
+class CoIDE(Exporter):
+    NAME = 'CoIDE'
+    TARGETS = ['KL25Z']
+    TOOLCHAIN = 'GCC_ARM'
+
+    def generate(self):
+        to_be_compiled = []
+        for r_type in ['s_sources', 'c_sources', 'cpp_sources']:
+            r = getattr(self.resources, r_type)
+            if r:
+                for source in r:
+                    base, ext = splitext(source)
+                    to_be_compiled.append(base + '.o')
+
+        libraries = []
+        for lib in self.resources.libraries:
+            l, _ = splitext(basename(lib))
+            libraries.append(l[3:])
+
+        ctx = {
+            'name': self.program_name,
+            'to_be_compiled': to_be_compiled,
+            'include_paths': self.resources.inc_dirs,
+            'library_paths': self.resources.lib_dirs,
+            'scatter_file': self.resources.linker_script,
+            'object_files': self.resources.objects,
+            'symbols': self.toolchain.get_symbols()
+        }
+        target = self.target.lower()
+
+        # Project file
+        self.gen_file('coide_%s.coproj.tmpl' % target, ctx, '.coproj')
diff --git a/workspace_tools/export/coide_kl25z.coproj.tmpl b/workspace_tools/export/coide_kl25z.coproj.tmpl
new file mode 100644
index 0000000000..999d523184
--- /dev/null
+++ b/workspace_tools/export/coide_kl25z.coproj.tmpl
@@ -0,0 +1,75 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<Project version="2G - 1.7.5" name="{{name}}">
+  <Target name="{{name}}" isCurrent="1">
+    <Device manufacturerId="4" manufacturerName="Freescale" chipId="86" chipName="MKL25Z128VLK4" boardId="" boardName=""/>
+    <BuildOption>
+      <Compile>
+        <Option name="OptimizationLevel" value="0"/>
+        <Option name="UseFPU" value="0"/>
+        <Option name="UserEditCompiler" value="-Wl, --specs=nano.specs -fno-common; -fmessage-length=0; -Wall; -fno-exceptions; -ffunction-sections; -fdata-sections; {% for s in symbols %}-D{{s}}; {% endfor %} -std=gnu++98"/>
+        <Includepaths>
+          <Includepath path="."/>
+          <Includepath path="mbed"/>
+          <Includepath path="mbed/target_kl25z"/>
+          <Includepath path="mbed/target_kl25z/toolchain_gcc_arm"/>
+        </Includepaths>
+        <DefinedSymbols>
+          <Define name="MKL25Z128VLK4"/>
+        </DefinedSymbols>
+      </Compile>
+      <Link useDefault="0">
+        <Option name="DiscardUnusedSection" value="0"/>
+        <Option name="UserEditLinkder" value=""/>
+        <Option name="UseMemoryLayout" value="0"/>
+        <Option name="LTO" value="0"/>
+        <Option name="IsNewStartupCode" value="1"/>
+        <Option name="Library" value="Not use C Library"/>
+        <Option name="nostartfiles" value="0"/>
+        <Option name="UserEditLinker" value="C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/cmsis_nvic.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/retarget.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/startup_MKL25Z4.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/system_MKL25Z4.o; -lmbed; -lstdc++; -lsupc++; -lm; -lc; -lgcc; -lnosys; -lmbed; -lstdc++; -lsupc++; -lm; -lc; -lgcc; -lnosys; "/>
+        <LinkedLibraries/>
+        <MemoryAreas debugInFlashNotRAM="1">
+          <Memory name="IROM1" type="ReadOnly" size="0x00020000" startValue="0x00000000"/>
+          <Memory name="IRAM1" type="ReadWrite" size="0x00001000" startValue="0x1FFFF000"/>
+          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
+          <Memory name="IRAM2" type="ReadWrite" size="" startValue=""/>
+        </MemoryAreas>
+        <LocateLinkFile path="mbed/target_kl25z/toolchain_gcc_arm/mkl25z4.ld" type="0"/>
+      </Link>
+      <Output>
+        <Option name="OutputFileType" value="0"/>
+        <Option name="Path" value="./"/>
+        <Option name="Name" value="{{name}}"/>
+        <Option name="HEX" value="1"/>
+        <Option name="BIN" value="1"/>
+      </Output>
+      <User>
+        <UserRun name="Run#1" type="Before" checked="0" value=""/>
+        <UserRun name="Run#1" type="After" checked="0" value=""/>
+      </User>
+    </BuildOption>
+    <DebugOption>
+      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="CMSIS-DAP"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
+      <Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
+      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="KLxx_128_PRG_NO_CFG.elf"/>
+    </DebugOption>
+    <ExcludeFile/>
+  </Target>
+  <Components path="./"/>
+  <Files>
+    <File name="main.cpp" path="main.cpp" type="1"/>
+  </Files>
+</Project>

From 9fe172d93902ff7dc3b00786474ec33cb36baa92 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Sun, 12 Jan 2014 11:17:21 +0100
Subject: [PATCH 21/24] libraries addition, link command correction

---
 workspace_tools/export/coide.py               | 25 +++++++++++--------
 .../export/coide_kl25z.coproj.tmpl            | 20 +++++++--------
 2 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
index fd8c1227b2..5af4c71eeb 100644
--- a/workspace_tools/export/coide.py
+++ b/workspace_tools/export/coide.py
@@ -20,17 +20,22 @@ from os.path import splitext, basename
 
 class CoIDE(Exporter):
     NAME = 'CoIDE'
+    FILE_TYPES = {
+        'c_sources':'1',
+        'cpp_sources':'8',
+        's_sources':'2'
+    }
     TARGETS = ['KL25Z']
     TOOLCHAIN = 'GCC_ARM'
 
     def generate(self):
-        to_be_compiled = []
-        for r_type in ['s_sources', 'c_sources', 'cpp_sources']:
-            r = getattr(self.resources, r_type)
-            if r:
-                for source in r:
-                    base, ext = splitext(source)
-                    to_be_compiled.append(base + '.o')
+        self.resources.win_to_unix()
+        source_files = []
+        for r_type, n in CoIDE.FILE_TYPES.iteritems():
+            for file in getattr(self.resources, r_type):
+                source_files.append({
+                    'name': basename(file), 'path': file
+                })
 
         libraries = []
         for lib in self.resources.libraries:
@@ -39,14 +44,14 @@ class CoIDE(Exporter):
 
         ctx = {
             'name': self.program_name,
-            'to_be_compiled': to_be_compiled,
+            'source_files': source_files,
             'include_paths': self.resources.inc_dirs,
-            'library_paths': self.resources.lib_dirs,
             'scatter_file': self.resources.linker_script,
             'object_files': self.resources.objects,
+            'libraries': libraries,
             'symbols': self.toolchain.get_symbols()
         }
         target = self.target.lower()
 
         # Project file
-        self.gen_file('coide_%s.coproj.tmpl' % target, ctx, '.coproj')
+        self.gen_file('coide_%s.coproj.tmpl' % target, ctx, '%s.coproj' % self.program_name)
diff --git a/workspace_tools/export/coide_kl25z.coproj.tmpl b/workspace_tools/export/coide_kl25z.coproj.tmpl
index 999d523184..b370259ec5 100644
--- a/workspace_tools/export/coide_kl25z.coproj.tmpl
+++ b/workspace_tools/export/coide_kl25z.coproj.tmpl
@@ -4,17 +4,14 @@
     <Device manufacturerId="4" manufacturerName="Freescale" chipId="86" chipName="MKL25Z128VLK4" boardId="" boardName=""/>
     <BuildOption>
       <Compile>
-        <Option name="OptimizationLevel" value="0"/>
+        <Option name="OptimizationLevel" value="4"/>
         <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value="-Wl, --specs=nano.specs -fno-common; -fmessage-length=0; -Wall; -fno-exceptions; -ffunction-sections; -fdata-sections; {% for s in symbols %}-D{{s}}; {% endfor %} -std=gnu++98"/>
+        <Option name="UserEditCompiler" value="-fno-common; -fmessage-length=0; -Wall; -fno-strict-aliasing; -fno-rtti; -fno-exceptions; -ffunction-sections; -fdata-sections; -std=gnu++98"/>
         <Includepaths>
-          <Includepath path="."/>
-          <Includepath path="mbed"/>
-          <Includepath path="mbed/target_kl25z"/>
-          <Includepath path="mbed/target_kl25z/toolchain_gcc_arm"/>
+          {% for path in include_paths %} <Includepath path="{{path}}"/> {% endfor %}
         </Includepaths>
         <DefinedSymbols>
-          <Define name="MKL25Z128VLK4"/>
+          {% for s in symbols %} <Define name="{{s}}"/> {% endfor %}
         </DefinedSymbols>
       </Compile>
       <Link useDefault="0">
@@ -25,7 +22,8 @@
         <Option name="IsNewStartupCode" value="1"/>
         <Option name="Library" value="Not use C Library"/>
         <Option name="nostartfiles" value="0"/>
-        <Option name="UserEditLinker" value="C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/cmsis_nvic.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/retarget.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/startup_MKL25Z4.o; C:/CooCox/CoIDE/workspace/{{name}}/mbed/target_kl25z/toolchain_gcc_arm/system_MKL25Z4.o; -lmbed; -lstdc++; -lsupc++; -lm; -lc; -lgcc; -lnosys; -lmbed; -lstdc++; -lsupc++; -lm; -lc; -lgcc; -lnosys; "/>
+        <Option name="UserEditLinker" value="--specs=nano.specs; -u _printf_float; -u _scanf_float; {% for file in object_files %}
+        ${project.path}/{{file}}; {% endfor %} {% for lib in libraries %} -l{{lib}}; {% endfor %} -lstdc++; -lsupc++; -lm; -lc; -lgcc; -lnosys;"/>
         <LinkedLibraries/>
         <MemoryAreas debugInFlashNotRAM="1">
           <Memory name="IROM1" type="ReadOnly" size="0x00020000" startValue="0x00000000"/>
@@ -33,7 +31,7 @@
           <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
           <Memory name="IRAM2" type="ReadWrite" size="" startValue=""/>
         </MemoryAreas>
-        <LocateLinkFile path="mbed/target_kl25z/toolchain_gcc_arm/mkl25z4.ld" type="0"/>
+        <LocateLinkFile path="{{scatter_file}}" type="0"/>
       </Link>
       <Output>
         <Option name="OutputFileType" value="0"/>
@@ -70,6 +68,8 @@
   </Target>
   <Components path="./"/>
   <Files>
-    <File name="main.cpp" path="main.cpp" type="1"/>
+    {% for file in source_files %}
+    <File name="{{file.name}}" path="{{file.path}}.{{file.type}}" type="1"/>
+    {% endfor %}
   </Files>
 </Project>

From 38f24228dbb30a4c6208fb76e164a570f6f9c085 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Sun, 12 Jan 2014 11:34:35 +0100
Subject: [PATCH 22/24] file type support

---
 workspace_tools/export/coide.py                | 7 ++++---
 workspace_tools/export/coide_kl25z.coproj.tmpl | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
index 5af4c71eeb..aea2d9c2ea 100644
--- a/workspace_tools/export/coide.py
+++ b/workspace_tools/export/coide.py
@@ -20,10 +20,11 @@ from os.path import splitext, basename
 
 class CoIDE(Exporter):
     NAME = 'CoIDE'
+    # seems like CoIDE currently supports only one type
     FILE_TYPES = {
         'c_sources':'1',
-        'cpp_sources':'8',
-        's_sources':'2'
+        'cpp_sources':'1',
+        's_sources':'1'
     }
     TARGETS = ['KL25Z']
     TOOLCHAIN = 'GCC_ARM'
@@ -34,7 +35,7 @@ class CoIDE(Exporter):
         for r_type, n in CoIDE.FILE_TYPES.iteritems():
             for file in getattr(self.resources, r_type):
                 source_files.append({
-                    'name': basename(file), 'path': file
+                    'name': basename(file), 'type': n, 'path': file
                 })
 
         libraries = []
diff --git a/workspace_tools/export/coide_kl25z.coproj.tmpl b/workspace_tools/export/coide_kl25z.coproj.tmpl
index b370259ec5..3b66e766d8 100644
--- a/workspace_tools/export/coide_kl25z.coproj.tmpl
+++ b/workspace_tools/export/coide_kl25z.coproj.tmpl
@@ -69,7 +69,7 @@
   <Components path="./"/>
   <Files>
     {% for file in source_files %}
-    <File name="{{file.name}}" path="{{file.path}}.{{file.type}}" type="1"/>
+    <File name="{{file.name}}" path="{{file.path}}" type="{{file.type}}"/>
     {% endfor %}
   </Files>
 </Project>

From 937430a1304f2ca79b4ed0e04d26349752b2e964 Mon Sep 17 00:00:00 2001
From: 0xc0170 <c0170@rocketmail.com>
Date: Tue, 14 Jan 2014 17:51:09 +0100
Subject: [PATCH 23/24] clk freq header file

	- HAL clock improvement
---
 .../TARGET_K20D5M/analogin_api.c              | 17 +++-
 .../TARGET_K20D5M/clk_freqs.h                 | 97 +++++++++++++++++++
 .../TARGET_Freescale/TARGET_K20D5M/i2c_api.c  |  3 +-
 .../TARGET_K20D5M/pwmout_api.c                | 19 +++-
 .../TARGET_K20D5M/serial_api.c                |  2 +-
 .../TARGET_Freescale/TARGET_K20D5M/spi_api.c  |  3 +-
 .../TARGET_K20D5M/us_ticker.c                 | 43 ++++++--
 7 files changed, 169 insertions(+), 15 deletions(-)
 create mode 100644 libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/clk_freqs.h

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c
index ed9380b001..def4d5129b 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c
@@ -18,6 +18,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_ADC[] = {
     {PTC2, ADC0_SE4b, 0},
@@ -33,6 +34,8 @@ static const PinMap PinMap_ADC[] = {
     {NC,   NC,        0}
 };
 
+#define MAX_FADC        6000000
+
 void analogin_init(analogin_t *obj, PinName pin) {
     obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
     if (obj->adc == (ADCName)NC)
@@ -43,13 +46,23 @@ void analogin_init(analogin_t *obj, PinName pin) {
     uint32_t port = (uint32_t)pin >> PORT_SHIFT;
     SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
 
+    // bus clk
+    uint32_t PCLK = bus_frequency();
+    uint32_t clkdiv;
+    for (clkdiv = 0; clkdiv < 4; clkdiv++) {
+        if ((PCLK >> clkdiv) <= MAX_FADC)
+            break;
+    }
+    if (clkdiv == 4)                    //Set max div
+        clkdiv = 0x7;
+
     ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc);
 
     ADC0->CFG1 = ADC_CFG1_ADLPC_MASK    // Low-Power Configuration
-               | ADC_CFG1_ADIV(3)       // Clock Divide Select: (Input Clock)/8
+               | ADC_CFG1_ADIV(clkdiv & 0x3)       // Clock Divide Select
                | ADC_CFG1_ADLSMP_MASK   // Long Sample Time
                | ADC_CFG1_MODE(3)       // (16)bits Resolution
-               | ADC_CFG1_ADICLK(1);    // Input Clock: (Bus Clock)/2
+               | ADC_CFG1_ADICLK(clkdiv >> 2);    // Input Clock
 
     ADC0->CFG2 = ADC_CFG2_MUXSEL_MASK   // ADxxb or ADxxa channels
                | ADC_CFG2_ADACKEN_MASK  // Asynchronous Clock Output Enable
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/clk_freqs.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/clk_freqs.h
new file mode 100644
index 0000000000..a86573ca1b
--- /dev/null
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/clk_freqs.h
@@ -0,0 +1,97 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef CLK_FREQS_H
+#define CLK_FREQS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+ * \brief Get the peripheral bus clock frequency
+ * \return Bus frequency
+ */
+static inline uint32_t bus_frequency(void) {
+    return SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
+}
+
+/*!
+ * \brief Get external oscillator (crystal) frequency
+ * \return External osc frequency
+ */
+static uint32_t extosc_frequency(void) {
+    uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
+
+    if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2))     //MCG clock = external reference clock
+        return MCGClock;
+
+    if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) {   //PLL/FLL is selected
+        uint32_t divider, multiplier;
+        if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {         //FLL is selected
+            if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) {     //FLL uses external reference
+                divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
+                if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
+                    divider <<= 5u;
+                /* Select correct multiplier to calculate the MCG output clock  */
+                switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
+                    case 0x0u:
+                      multiplier = 640u;
+                      break;
+                    case 0x20u:
+                      multiplier = 1280u;
+                      break;
+                    case 0x40u:
+                      multiplier = 1920u;
+                      break;
+                    case 0x60u:
+                      multiplier = 2560u;
+                      break;
+                    case 0x80u:
+                      multiplier = 732u;
+                      break;
+                    case 0xA0u:
+                      multiplier = 1464u;
+                      break;
+                    case 0xC0u:
+                      multiplier = 2197u;
+                      break;
+                    case 0xE0u:
+                    default:
+                      multiplier = 2929u;
+                      break;
+                }
+
+                return MCGClock * divider / multiplier;
+            }
+        } else {             //PLL is selected
+            divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
+            multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
+            return MCGClock * divider / multiplier;
+        }
+    }
+
+    //In all other cases either there is no crystal or we cannot determine it
+    //For example when the FLL is running on the internal reference, and there is also an
+    //external crystal. However these are unlikely situations
+    return 0;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
index 2529761629..4cbdb2d42f 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c
@@ -18,6 +18,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_I2C_SDA[] = {
     {PTB1,  I2C_0, 2},
@@ -185,7 +186,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
     uint32_t ref = 0;
     uint8_t i, j;
     // bus clk
-    uint32_t PCLK = SystemCoreClock/2;
+    uint32_t PCLK = bus_frequency();
     uint32_t pulse = PCLK / (hz * 2);
 
     // we look for the values that minimize the error
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
index e5fcf37667..35b8901149 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/pwmout_api.c
@@ -48,7 +48,7 @@ static const PinMap PinMap_PWM[] = {
     {NC , NC    , 0}
 };
 
-#define PWM_CLOCK_MHZ       (0.75) // (48)MHz / 64 = (0.75)MHz
+static float pwm_clock = 0;
 
 void pwmout_init(pwmout_t* obj, PinName pin) {
     // determine the channel
@@ -56,6 +56,17 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
     if (pwm == (PWMName)NC)
         error("PwmOut pin mapping failed");
 
+    uint32_t clkdiv = 0;
+    float clkval = SystemCoreClock / 1000000.0f;
+
+    while (clkval > 1) {
+        clkdiv++;
+        clkval /= 2.0;
+        if (clkdiv == 7)
+            break;
+    }
+
+    pwm_clock = clkval;
     unsigned int port = (unsigned int)pin >> PORT_SHIFT;
     unsigned int ftm_n = (pwm >> TPM_SHIFT);
     unsigned int ch_n = (pwm & 0xFF);
@@ -65,7 +76,7 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
 
     FTM_Type *ftm = (FTM_Type *)(FTM0_BASE + 0x1000 * ftm_n);
     ftm->CONF |= FTM_CONF_BDMMODE(3);
-    ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
+    ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(clkdiv); // (clock)MHz / clkdiv ~= (0.75)MHz
     ftm->CONTROLS[ch_n].CnSC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
 
     obj->CnV = &ftm->CONTROLS[ch_n].CnV;
@@ -108,7 +119,7 @@ void pwmout_period_ms(pwmout_t* obj, int ms) {
 // Set the PWM period, keeping the duty cycle the same.
 void pwmout_period_us(pwmout_t* obj, int us) {
     float dc = pwmout_read(obj);
-    *obj->MOD = PWM_CLOCK_MHZ * us;
+    *obj->MOD = (uint32_t)(pwm_clock * (float)us);
     pwmout_write(obj, dc);
 }
 
@@ -121,5 +132,5 @@ void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
 }
 
 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
-    *obj->CnV = PWM_CLOCK_MHZ * us;
+    *obj->CnV = (uint32_t)(pwm_clock * (float)us);
 }
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
index b6a5ff926f..33ca5ef466 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
@@ -53,7 +53,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     obj->uart = (UART_Type *)uart;
     // enable clk
     switch (uart) {
-        case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT5_UART0TXSRC_SHIFT);
+        case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
                      SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
         case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
         case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
index 3300dfdfd1..3075a33a49 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/spi_api.c
@@ -20,6 +20,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_SPI_SCLK[] = {
     {PTC5, SPI_0, 2},
@@ -125,7 +126,7 @@ void spi_frequency(spi_t *obj, int hz) {
     uint32_t ref_prescaler = 0;
 
     // bus clk
-    uint32_t PCLK = SystemCoreClock;
+    uint32_t PCLK = bus_frequency();
     uint32_t divisor = 2;
     uint32_t prescaler;
 
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/us_ticker.c
index c0da069928..72767601aa 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/us_ticker.c
@@ -16,11 +16,14 @@
 #include <stddef.h>
 #include "us_ticker_api.h"
 #include "PeripheralNames.h"
+#include "clk_freqs.h"
 
 static void pit_init(void);
 static void lptmr_init(void);
 
+
 static int us_ticker_inited = 0;
+static uint32_t pit_ldval = 0;
 
 void us_ticker_init(void) {
     if (us_ticker_inited)
@@ -35,7 +38,7 @@ static uint32_t pit_us_ticker_counter = 0;
 
 void pit0_isr(void) {
     pit_us_ticker_counter++;
-    PIT->CHANNEL[0].LDVAL = 48; // 1us
+    PIT->CHANNEL[0].LDVAL = pit_ldval; // 1us
     PIT->CHANNEL[0].TFLG = 1;
 }
 
@@ -46,7 +49,9 @@ static void pit_init(void) {
     SIM->SCGC6 |= SIM_SCGC6_PIT_MASK;  // Clock PIT
     PIT->MCR = 0;  // Enable PIT
 
-    PIT->CHANNEL[0].LDVAL = 48;  // 1us
+    pit_ldval = bus_frequency() / 1000000;
+
+    PIT->CHANNEL[0].LDVAL = pit_ldval;  // 1us
     PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TIE_MASK;
     PIT->CHANNEL[0].TCTRL |= PIT_TCTRL_TEN_MASK;  // Start timer 1
 
@@ -82,10 +87,36 @@ static void lptmr_init(void) {
     NVIC_EnableIRQ(LPTimer_IRQn);
 
     /* Clock at (1)MHz -> (1)tick/us */
-    OSC0->CR |= OSC_CR_ERCLKEN_MASK;
-    LPTMR0->PSR = 0;
-    LPTMR0->PSR |= LPTMR_PSR_PCS(3);       // OSCERCLK -> 8MHz
-    LPTMR0->PSR |= LPTMR_PSR_PRESCALE(2); // divide by 8
+    /* Check if the external oscillator can be divided to 1MHz */
+    uint32_t extosc = extosc_frequency();
+
+    if (extosc != 0) {                      //If external oscillator found
+        OSC0->CR |= OSC_CR_ERCLKEN_MASK;
+        if (extosc % 1000000u == 0) {       //If it is a multiple if 1MHz
+            extosc /= 1000000;
+            if (extosc == 1)    {           //1MHz, set timerprescaler in bypass mode
+                LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PBYP_MASK;
+                return;
+            } else {                        //See if we can divide it to 1MHz
+                uint32_t divider = 0;
+                extosc >>= 1;
+                while (1) {
+                    if (extosc == 1) {
+                        LPTMR0->PSR = LPTMR_PSR_PCS(3) | LPTMR_PSR_PRESCALE(divider);
+                        return;
+                    }
+                    if (extosc % 2 != 0)    //If we can't divide by two anymore
+                        break;
+                    divider++;
+                    extosc >>= 1;
+                }
+            }
+        }
+    }
+    //No suitable external oscillator clock -> Use fast internal oscillator (4MHz)
+    MCG->C1 |= MCG_C1_IRCLKEN_MASK;
+    MCG->C2 |= MCG_C2_IRCS_MASK;
+    LPTMR0->PSR = LPTMR_PSR_PCS(0) | LPTMR_PSR_PRESCALE(1);
 }
 
 void us_ticker_disable_interrupt(void) {

From 153a9ddb4905bf8c58105fbfb18c0787ff793023 Mon Sep 17 00:00:00 2001
From: Sissors <erik_olieman@hotmail.com>
Date: Tue, 14 Jan 2014 22:57:43 +0100
Subject: [PATCH 24/24] Added MCGPLLFLL clock function, squished some 'bugs'

PWM bug mentioned here:
https://mbed.org/questions/2315/BUG-Exporting-to-ARM-GCC-does-not-work-n/

Fast internal osc prescaler wasn't taken into account at us_ticker
interrupt clock source, now it is.
---
 .../TARGET_Freescale/TARGET_KL25Z/clk_freqs.h | 21 +++++++++++++++++--
 .../TARGET_KL25Z/pwmout_api.c                 | 11 ++++++++--
 .../TARGET_KL25Z/serial_api.c                 | 13 +++++++++---
 .../TARGET_Freescale/TARGET_KL25Z/us_ticker.c | 16 ++++++++++++--
 4 files changed, 52 insertions(+), 9 deletions(-)

diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h
index 4273872b70..e50e0cd227 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/clk_freqs.h
@@ -72,8 +72,8 @@ static uint32_t extosc_frequency(void) {
             }
         } else {             //PLL is selected
             divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
-            multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
-            return MCGClock * divider / multiplier;            
+            multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u); 
+            return MCGClock * divider / multiplier;         
         }
     }
     
@@ -83,6 +83,23 @@ static uint32_t extosc_frequency(void) {
     return 0;
 }
 
+//Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
+static uint32_t mcgpllfll_frequency(void) { 
+    if ((MCG->C1 & MCG_C1_CLKS_MASK) != MCG_C1_CLKS(0))   //PLL/FLL is not selected
+        return 0;
+    
+    uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
+    if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {         //FLL is selected
+        SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;        //MCG peripheral clock is FLL output
+        return MCGClock;
+    } else {                                            //PLL is selected
+        SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;         //MCG peripheral clock is PLL output
+        return (MCGClock >> 1);
+    }
+    
+    //It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active 
+    //for the peripherals, this is however an unlikely setup
+}
 
 #ifdef __cplusplus
 }
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
index 447d1c6e5b..48861646f9 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/pwmout_api.c
@@ -18,6 +18,7 @@
 #include "cmsis.h"
 #include "pinmap.h"
 #include "error.h"
+#include "clk_freqs.h"
 
 static const PinMap PinMap_PWM[] = {
     // LEDs
@@ -73,7 +74,14 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
         error("PwmOut pin mapping failed");
     
     uint32_t clkdiv = 0;
-    float clkval = SystemCoreClock / 1000000.0f;
+    float clkval;
+    if (mcgpllfll_frequency()) {
+        SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
+        clkval = mcgpllfll_frequency() / 1000000.0f;
+    } else {
+        SIM->SOPT2 |= SIM_SOPT2_TPMSRC(2); // Clock source: ExtOsc
+        clkval = extosc_frequency() / 1000000.0f;
+    } 
     
     while (clkval > 1) {
         clkdiv++;
@@ -89,7 +97,6 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
 
     SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
     SIM->SCGC6 |= 1 << (SIM_SCGC6_TPM0_SHIFT + tpm_n);
-    SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
 
     TPM_Type *tpm = (TPM_Type *)(TPM0_BASE + 0x1000 * tpm_n);
     tpm->SC = TPM_SC_CMOD(1) | TPM_SC_PS(clkdiv); // (clock)MHz / clkdiv ~= (0.75)MHz
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
index fe986519bc..e1b882e3c4 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/serial_api.c
@@ -71,8 +71,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     obj->uart = (UARTLP_Type *)uart;
     // enable clk
     switch (uart) {
-        case UART_0: if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0))   //PLL/FLL is selected
-                        SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<<SIM_SOPT2_UART0SRC_SHIFT);
+        case UART_0: if (mcgpllfll_frequency() != 0)                    //PLL/FLL is selected
+                        SIM->SOPT2 |= (1<<SIM_SOPT2_UART0SRC_SHIFT);
                      else
                         SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
                      SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
@@ -123,7 +123,14 @@ void serial_baud(serial_t *obj, int baudrate) {
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
     
-    uint32_t PCLK = (obj->uart == UART0) ? SystemCoreClock : bus_frequency();
+    uint32_t PCLK;
+    if (obj->uart == UART0) {
+        if (mcgpllfll_frequency() != 0)
+            PCLK = mcgpllfll_frequency();
+        else
+            PCLK = extosc_frequency();
+    } else
+        PCLK = bus_frequency();
 
     // First we check to see if the basic divide with no DivAddVal/MulVal
     // ratio gives us an integer result. If it does, we set DivAddVal = 0,
diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
index 2b33130b2f..3f0bf61b68 100644
--- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
+++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c
@@ -102,10 +102,22 @@ static void lptmr_init(void) {
             }
         }
     }
-    //No suitable external oscillator clock -> Use fast internal oscillator (4MHz)
+    //No suitable external oscillator clock -> Use fast internal oscillator (4MHz / divider)
     MCG->C1 |= MCG_C1_IRCLKEN_MASK;
     MCG->C2 |= MCG_C2_IRCS_MASK;
-    LPTMR0->PSR = LPTMR_PSR_PCS(0) | LPTMR_PSR_PRESCALE(1);
+    LPTMR0->PSR =  LPTMR_PSR_PCS(0);
+    switch (MCG->SC & MCG_SC_FCRDIV_MASK) {
+        case MCG_SC_FCRDIV(0):                  //4MHz
+            LPTMR0->PSR |= LPTMR_PSR_PRESCALE(1);
+            break;
+        case MCG_SC_FCRDIV(1):                  //2MHz
+            LPTMR0->PSR |= LPTMR_PSR_PRESCALE(0);
+            break;
+        default:                                //1MHz or anything else, in which case we put it on 1MHz
+            MCG->SC &= ~MCG_SC_FCRDIV_MASK;
+            MCG->SC |= MCG_SC_FCRDIV(2);
+            LPTMR0->PSR |= LPTMR_PSR_PBYP_MASK;
+    }
     
 }