diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct
index dd4573a430..19cb02bed3 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct
@@ -1,61 +1,53 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2015, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x40000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188-Stack_Size) {
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (0x20000000+0x00010000) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld
index 062be2149b..6f30480b05 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld
@@ -1,22 +1,44 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 256k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
MEMORY
{
- FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM1 (rwx) : ORIGIN = 0x20000188, LENGTH = 64k - 0x188
+ FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+ RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@@ -54,6 +76,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -90,7 +113,7 @@ SECTIONS
__etext = .;
_sidata = .;
-
+
.data : AT (__etext)
{
__data_start__ = .;
@@ -111,7 +134,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -125,8 +147,21 @@ SECTIONS
__data_end__ = .;
_edata = .;
- } > SRAM1
+ } > RAM
+ /* Uninitialized data section
+ * This region is not initialized by the C/C++ library and can be used to
+ * store state across soft reboots. */
+ .uninitialized (NOLOAD):
+ {
+ . = ALIGN(32);
+ __uninitialized_start = .;
+ *(.uninitialized)
+ KEEP(*(.keep.uninitialized))
+ . = ALIGN(32);
+ __uninitialized_end = .;
+ } > RAM
+
.bss :
{
. = ALIGN(8);
@@ -137,16 +172,16 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
- } > SRAM1
+ } > RAM
.heap (COPY):
{
__end__ = .;
- end = __end__;
+ PROVIDE(end = .);
*(.heap*)
- . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE;
+ . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
- } > SRAM1
+ } > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -154,13 +189,13 @@ SECTIONS
.stack_dummy (COPY):
{
*(.stack*)
- } > SRAM1
+ } > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
- __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1);
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
- __StackLimit = __StackTop - STACK_SIZE;
+ __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf
index f3d08f6742..844289a4a7 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf
@@ -1,37 +1,59 @@
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; }
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+/* Device specific values */
-/* [ROM = 256kb = 0x40000] */
-define symbol __intvec_start__ = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
+/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
-/* [RAM = 48kb + 16kb = 0x10000] */
-/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x20000187; /* Aligned on 8 bytes (392 = 98 x 4) */
-define symbol __region_SRAM1_start__ = 0x20000188;
-define symbol __region_SRAM1_end__ = 0x2000FFFF;
+define symbol VECTORS = 99; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE = 0x2000;
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+ define symbol MBED_APP_START = MBED_ROM_START;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+ define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
-define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
-define symbol __size_heap__ = 0x4000;
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol RAM_REGION_SIZE = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE;
-initialize by copy with packing = zeros { readwrite };
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
+define block HEAP with alignment = 8, size = HEAP_SIZE { };
+
+initialize by copy { readwrite };
do not initialize { section .noinit };
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM1_region { readwrite, block STACKHEAP };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/cmsis_nvic.h
index 49f64adf45..b2290b8738 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
-#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS SRAM1_BASE // Vectors positioned at start of SRAM1
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x40000 // 256 KB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0xc000 // 48 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x4000 // 16 KB
+#endif
+
+#define NVIC_NUM_VECTORS 99
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct
index dd4573a430..19cb02bed3 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct
@@ -1,61 +1,53 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2015, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x40000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 256KB FLASH (0x40000) + 64KB SRAM (0x10000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188-Stack_Size) {
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (0x20000000+0x00010000) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld
index b66a1d4334..6f30480b05 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld
@@ -1,22 +1,44 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 256k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
MEMORY
{
- FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM1 (rwx) : ORIGIN = 0x20000188, LENGTH = 64k - 0x188
+ FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+ RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@@ -54,6 +76,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -90,7 +113,7 @@ SECTIONS
__etext = .;
_sidata = .;
-
+
.data : AT (__etext)
{
__data_start__ = .;
@@ -111,7 +134,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -125,8 +147,21 @@ SECTIONS
__data_end__ = .;
_edata = .;
- } > SRAM1
+ } > RAM
+ /* Uninitialized data section
+ * This region is not initialized by the C/C++ library and can be used to
+ * store state across soft reboots. */
+ .uninitialized (NOLOAD):
+ {
+ . = ALIGN(32);
+ __uninitialized_start = .;
+ *(.uninitialized)
+ KEEP(*(.keep.uninitialized))
+ . = ALIGN(32);
+ __uninitialized_end = .;
+ } > RAM
+
.bss :
{
. = ALIGN(8);
@@ -137,16 +172,16 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
- } > SRAM1
+ } > RAM
.heap (COPY):
{
__end__ = .;
- end = __end__;
+ PROVIDE(end = .);
*(.heap*)
- . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE;
+ . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
- } > SRAM1
+ } > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -154,13 +189,13 @@ SECTIONS
.stack_dummy (COPY):
{
*(.stack*)
- } > SRAM1
+ } > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
- __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1);
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
- __StackLimit = __StackTop - STACK_SIZE;
+ __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf
index f3d08f6742..844289a4a7 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf
@@ -1,37 +1,59 @@
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; }
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+/* Device specific values */
-/* [ROM = 256kb = 0x40000] */
-define symbol __intvec_start__ = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
+/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
-/* [RAM = 48kb + 16kb = 0x10000] */
-/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x20000187; /* Aligned on 8 bytes (392 = 98 x 4) */
-define symbol __region_SRAM1_start__ = 0x20000188;
-define symbol __region_SRAM1_end__ = 0x2000FFFF;
+define symbol VECTORS = 99; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE = 0x2000;
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+ define symbol MBED_APP_START = MBED_ROM_START;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+ define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
-define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
-define symbol __size_heap__ = 0x4000;
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol RAM_REGION_SIZE = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE;
-initialize by copy with packing = zeros { readwrite };
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
+define block HEAP with alignment = 8, size = HEAP_SIZE { };
+
+initialize by copy { readwrite };
do not initialize { section .noinit };
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM1_region { readwrite, block STACKHEAP };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/cmsis_nvic.h
index 49f64adf45..b2290b8738 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
-#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS SRAM1_BASE // Vectors positioned at start of SRAM1
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x40000 // 256 KB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0xc000 // 48 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x4000 // 16 KB
+#endif
+
+#define NVIC_NUM_VECTORS 99
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct
index b9147ba194..621d6c9ac6 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct
@@ -1,69 +1,37 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2020, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
-; 512KB FLASH (0x80000)
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x80000
-#endif
-
-; 128KB SRAM (0x20000) + 32KB SRAM (0x8000)
-#if !defined(MBED_RAM_START)
- #define MBED_RAM_START 0x20000000
-#endif
-
-; RW data 128k L4-SRAM1
-#if !defined(MBED_RAM_SIZE)
- #define MBED_RAM_SIZE 0x20000
-#endif
-
-#if !defined(MBED_RAM2_START)
-#define MBED_RAM2_START 0x10000000
-#endif
-
-; RW data 32k L4-ECC-SRAM2 retained in standby
-#if !defined(MBED_RAM2_SIZE)
-#define MBED_RAM2_SIZE 0x8000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-; Total: 99 vectors = 396 bytes (0x18C+0x4) to be reserved in RAM
-#if !defined(VECTOR_SIZE)
-#define VECTOR_SIZE 0x190
-#endif
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
; Crash report is enabled as default
#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
@@ -71,9 +39,9 @@
#endif
;Vectors + Crash report - Fixed at start of RAM2 in sequence
-#define MBED_IRAM2_SIZE (MBED_RAM2_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_IRAM2_SIZE (MBED_RAM1_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
-#define MBED_CRASH_REPORT_RAM_START (MBED_RAM2_START + VECTOR_SIZE)
+#define MBED_CRASH_REPORT_RAM_START (MBED_RAM1_START + VECTORS_SIZE)
#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
; Minimum heap should be larger then smallest RAM bank (else can use
@@ -81,30 +49,28 @@
#define MINIMUM_HEAP 0x10000
#define RAM_FIXED_SIZE MBED_BOOT_STACK_SIZE
-;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x10000 available)
-;and IRAM2 (MBED_IRAM2_SIZE = 0x7D70 available)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
- RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE-MINIMUM_HEAP) { ; RW data
+ RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MINIMUM_HEAP) { ; RW data
.ANY (+RW +ZI)
}
- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld
index d64af6b8d5..cde243f97a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld
@@ -1,26 +1,47 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 512k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
-/* 0x18C resevered for vectors; 8-byte aligned = 0x190 (0x18C + 0x4)*/
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM2 (rwx) : ORIGIN = 0x10000190, LENGTH = 32k - (0x18C+0x4)
- SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 128k
+ SRAM2 (rwx) : ORIGIN = MBED_RAM1_START + VECTORS_SIZE, LENGTH = MBED_RAM1_SIZE - VECTORS_SIZE
+ SRAM1 (rwx) : ORIGIN = MBED_RAM_START, LENGTH = 0x20000
}
/* Linker script to place sections and symbol values. Should be used together
@@ -58,6 +79,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -115,7 +137,7 @@ SECTIONS
{
__StackLimit = .;
*(.stack*);
- . += STACK_SIZE - (. - __StackLimit);
+ . += MBED_BOOT_STACK_SIZE - (. - __StackLimit);
} > SRAM2
/* Set stack top to end of RAM, and stack limit move down by
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/cmsis_nvic.h
index 43fcca8c9f..b5288e8a69 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x18b
-// Total: 99 vectors = 396 bytes (0x18c) to be reserved in RAM
-#define NVIC_NUM_VECTORS 99
-#define NVIC_RAM_VECTOR_ADDRESS SRAM2_BASE // Vectors positioned at start of SRAM1
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x80000 // 512 KB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x20000 // 128 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x8000 // 32 KB
+#endif
+
+#define NVIC_NUM_VECTORS 101
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM1_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct
index 45a3440a2c..8f82897889 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct
@@ -1,69 +1,38 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2015, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
-; 1MB FLASH (0x100000)
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
-#endif
-
-; 128KB SRAM (0x20000)
-#if !defined(MBED_RAM_START)
- #define MBED_RAM_START 0x20000000
-#endif
-
-; RW data 96k L4-SRAM1
-#if !defined(MBED_RAM_SIZE)
- #define MBED_RAM_SIZE 0x18000
-#endif
-
-#if !defined(MBED_RAM2_START)
-#define MBED_RAM2_START 0x10000000
-#endif
-
-; RW data 32k L4-ECC-SRAM2
-#if !defined(MBED_RAM2_SIZE)
-#define MBED_RAM2_SIZE 0x8000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
-#if !defined(VECTOR_SIZE)
-#define VECTOR_SIZE 0x188
-#endif
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
+
; Crash report enabled as default
#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
@@ -71,40 +40,39 @@
#endif
;Vectors + Crash report - Fixed at start of RAM2 in sequence
-#define MBED_IRAM2_SIZE (MBED_RAM2_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_IRAM2_SIZE (MBED_RAM1_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
-#define MBED_CRASH_REPORT_RAM_START (MBED_RAM2_START + VECTOR_SIZE)
+#define MBED_CRASH_REPORT_RAM_START (MBED_RAM1_START + VECTORS_SIZE)
#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
; Minimum heap should be larger then smallest RAM bank (else can use
; that bank for heap) and less then largest RAM bank.
#define MINIMUM_HEAP 0x12000
-#define RAM_FIXED_SIZE MBED_BOOT_STACK_SIZE
;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x6000 available)
;and IRAM2 (MBED_IRAM2_SIZE = 0x7D78 available)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
- RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE-MINIMUM_HEAP) { ; RW data
+ RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MINIMUM_HEAP) { ; RW data
.ANY (+RW +ZI)
}
- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld
index e7bccd34ac..f333095855 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld
@@ -1,25 +1,47 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 1024k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
- SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
+ SRAM2 (rwx) : ORIGIN = MBED_RAM1_START + VECTORS_SIZE, LENGTH = MBED_RAM1_SIZE - VECTORS_SIZE
+ SRAM1 (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@@ -57,6 +79,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -114,7 +137,7 @@ SECTIONS
{
__StackLimit = .;
*(.stack*);
- . += STACK_SIZE - (. - __StackLimit);
+ . += MBED_BOOT_STACK_SIZE - (. - __StackLimit);
} > SRAM2
/* Set stack top to end of RAM, and stack limit move down by
@@ -155,7 +178,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf
index 2c76cd5995..d139eaf06a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf
@@ -1,3 +1,20 @@
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/cmsis_nvic.h
index e4d724b163..c78ee0f735 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2017, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x18000 // 96 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x8000 // 32 KB
+#endif
+
#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of SRAM2
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM1_START // Vectors positioned at start of SRAM2
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct
index fb5dafd14a..60eb94abcc 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct
@@ -1,77 +1,77 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2015, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
-#define MBED_RAM_START 0x20000000
-#define MBED_RAM_SIZE 0x00018000
-#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
-#define MBED_CRASH_REPORT_RAM_SIZE 0x100
-#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
-
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+; Crash report enabled as default
+#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_CRASH_REPORT_RAM_SIZE 0x100
+#endif
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
+;Vectors + Crash report - Fixed at start of RAM2 in sequence
+#define MBED_IRAM2_SIZE (MBED_RAM1_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+
+#define MBED_CRASH_REPORT_RAM_START (MBED_RAM1_START + VECTORS_SIZE)
+#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
+
+; Minimum heap should be larger then smallest RAM bank (else can use
+; that bank for heap) and less then largest RAM bank.
+#define MINIMUM_HEAP 0x12000
+
+;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x6000 available)
+;and IRAM2 (MBED_IRAM2_SIZE = 0x7D78 available)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
- RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
+ RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
- RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
+ RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MINIMUM_HEAP) { ; RW data
.ANY (+RW +ZI)
}
- ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+ }
+
+ RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
}
-
}
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
index 00ace2cd76..f333095855 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
@@ -1,25 +1,47 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 1024k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
- SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
+ SRAM2 (rwx) : ORIGIN = MBED_RAM1_START + VECTORS_SIZE, LENGTH = MBED_RAM1_SIZE - VECTORS_SIZE
+ SRAM1 (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@@ -57,6 +79,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -114,7 +137,7 @@ SECTIONS
{
__StackLimit = .;
*(.stack*);
- . += STACK_SIZE - (. - __StackLimit);
+ . += MBED_BOOT_STACK_SIZE - (. - __StackLimit);
} > SRAM2
/* Set stack top to end of RAM, and stack limit move down by
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf
index 2c76cd5995..d139eaf06a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf
@@ -1,3 +1,20 @@
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/cmsis_nvic.h
index abb7956a00..c78ee0f735 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x18000 // 96 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x8000 // 32 KB
+#endif
+
#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of SRAM2
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM1_START // Vectors positioned at start of SRAM2
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct
index fb5dafd14a..60eb94abcc 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct
@@ -1,77 +1,77 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2015, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
-#define MBED_RAM_START 0x20000000
-#define MBED_RAM_SIZE 0x00018000
-#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
-#define MBED_CRASH_REPORT_RAM_SIZE 0x100
-#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
-
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+; Crash report enabled as default
+#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_CRASH_REPORT_RAM_SIZE 0x100
+#endif
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
+;Vectors + Crash report - Fixed at start of RAM2 in sequence
+#define MBED_IRAM2_SIZE (MBED_RAM1_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+
+#define MBED_CRASH_REPORT_RAM_START (MBED_RAM1_START + VECTORS_SIZE)
+#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
+
+; Minimum heap should be larger then smallest RAM bank (else can use
+; that bank for heap) and less then largest RAM bank.
+#define MINIMUM_HEAP 0x12000
+
+;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x6000 available)
+;and IRAM2 (MBED_IRAM2_SIZE = 0x7D78 available)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
- RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
+ RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
- RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
+ RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MINIMUM_HEAP) { ; RW data
.ANY (+RW +ZI)
}
- ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
- RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+ }
+
+ RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
}
-
}
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld
index 00ace2cd76..f333095855 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld
@@ -1,25 +1,47 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 1024k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
- SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
+ SRAM2 (rwx) : ORIGIN = MBED_RAM1_START + VECTORS_SIZE, LENGTH = MBED_RAM1_SIZE - VECTORS_SIZE
+ SRAM1 (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@@ -57,6 +79,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -114,7 +137,7 @@ SECTIONS
{
__StackLimit = .;
*(.stack*);
- . += STACK_SIZE - (. - __StackLimit);
+ . += MBED_BOOT_STACK_SIZE - (. - __StackLimit);
} > SRAM2
/* Set stack top to end of RAM, and stack limit move down by
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf
index 2c76cd5995..d139eaf06a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf
@@ -1,3 +1,20 @@
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/cmsis_nvic.h
index abb7956a00..c78ee0f735 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x18000 // 96 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x8000 // 32 KB
+#endif
+
#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of SRAM2
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM1_START // Vectors positioned at start of SRAM2
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct
index 95c4977533..19cb02bed3 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct
@@ -1,62 +1,53 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2018, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 1MB FLASH (0x100000) + 320KB SRAM (0x50000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ; Total: 107 vectors = 428 bytes (0x1AC); 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x1B0) (0x50000-0x1B0-Stack_Size) { ; RW data 320k L4-SRAM1
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld
index 7a4d42a755..6f30480b05 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld
@@ -1,30 +1,51 @@
/* Linker script to configure memory regions. */
-/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
+
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 1024k
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY
-{
- FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM1 (rwx) : ORIGIN = 0x200001B0, LENGTH = 320k - (0x1AC +0x4)
+{
+ FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+ RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
- *
+ *
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
@@ -55,6 +76,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -91,7 +113,7 @@ SECTIONS
__etext = .;
_sidata = .;
-
+
.data : AT (__etext)
{
__data_start__ = .;
@@ -112,7 +134,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -126,8 +147,21 @@ SECTIONS
__data_end__ = .;
_edata = .;
- } > SRAM1
+ } > RAM
+ /* Uninitialized data section
+ * This region is not initialized by the C/C++ library and can be used to
+ * store state across soft reboots. */
+ .uninitialized (NOLOAD):
+ {
+ . = ALIGN(32);
+ __uninitialized_start = .;
+ *(.uninitialized)
+ KEEP(*(.keep.uninitialized))
+ . = ALIGN(32);
+ __uninitialized_end = .;
+ } > RAM
+
.bss :
{
. = ALIGN(8);
@@ -138,16 +172,16 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
- } > SRAM1
+ } > RAM
.heap (COPY):
{
__end__ = .;
- end = __end__;
+ PROVIDE(end = .);
*(.heap*)
- . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE;
+ . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
- } > SRAM1
+ } > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -155,13 +189,13 @@ SECTIONS
.stack_dummy (COPY):
{
*(.stack*)
- } > SRAM1
+ } > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
- __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1);
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
- __StackLimit = __StackTop - STACK_SIZE;
+ __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf
index ab4c42d031..ecbf9ad503 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf
@@ -1,38 +1,59 @@
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+/* Device specific values */
-/* [ROM = 1024kb = 0x100000] */
-define symbol __intvec_start__ = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
+/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
-/* [RAM = 0x50000] */
-/* Vector table dynamic copy: Total: 107 vectors * 4 = 428 bytes (0x1AC) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x200001AF; /* Add 4 more bytes to be aligned on 8 bytes */
-define symbol __region_SRAM1_start__ = 0x200001B0;
-define symbol __region_SRAM1_end__ = 0x2004FFFF;
+define symbol VECTORS = 107; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE = 0x10000;
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+ define symbol MBED_APP_START = MBED_ROM_START;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+ define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
-define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
-define symbol __size_heap__ = 0x10000;
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol RAM_REGION_SIZE = MBED_RAM_SIZE + MBED_RAM1_SIZE - VECTORS_SIZE;
-initialize by copy with packing = zeros { readwrite };
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
+define block HEAP with alignment = 8, size = HEAP_SIZE { };
+
+initialize by copy { readwrite };
do not initialize { section .noinit };
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM1_region { readwrite, block STACKHEAP };
-
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/cmsis_nvic.h
index ad22074ad6..cc9dc22a06 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 91 vectors = 364 bytes from 0x40 to 0x1AB
-// Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x40000 // 256 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x10000 // 64 KB
+#endif
+
#define NVIC_NUM_VECTORS 107
-#define NVIC_RAM_VECTOR_ADDRESS 0X20000000 // Vectors positioned at start of SRAM
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c
index 94f6fd7578..238182fd63 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c
@@ -1,5 +1,7 @@
/* mbed Microcontroller Library
-* Copyright (c) 2006-2017 ARM Limited
+* Copyright (c) 2006-2019 ARM Limited
+* Copyright (c) 2006-2019 STMicroelectronics
+* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -33,21 +35,12 @@
#include "stm32l4xx.h"
#include "mbed_assert.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
#define USE_PLL_HSI 0x2 // Use HSI internal clock
#define USE_PLL_MSI 0x1 // Use MSI internal clock
-#define DEBUG_MCO (0) // Output the MCO on PA8 for debugging (0=OFF, 1=SYSCLK, 2=HSE, 3=HSI, 4=MSI)
-
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -64,8 +57,7 @@ uint8_t SetSysClock_PLL_MSI(void);
/**
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
* AHB/APBx prescalers and Flash settings
- * @note This function should be called only once the RCC clock configuration
- * is reset to the default reset state (done in SystemInit() function).
+ * @note This function is called in mbed_sdk_init() and hal_deepsleep() functions
* @param None
* @retval None
*/
@@ -99,11 +91,6 @@ void SetSysClock(void)
}
}
}
-
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 1
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
-#endif
}
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
@@ -177,15 +164,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
HAL_RCC_OscConfig(&RCC_OscInitStruct);
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 2
- if (bypass == 0) {
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
- } else {
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
- }
-#endif
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -252,11 +230,6 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
HAL_RCC_OscConfig(&RCC_OscInitStruct);
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 3
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
-#endif
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
@@ -313,15 +286,10 @@ uint8_t SetSysClock_PLL_MSI(void)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* 120 MHz */
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* 120 MHz */
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; /* 120 MHz */
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
return 0; // FAIL
}
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 4
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz
-#endif
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct
index f0e40746b7..aaecf8f0ca 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct
@@ -1,60 +1,57 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2018, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x200000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ; Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x1C0) (0xA0000-0x1C0-Stack_Size) { ; RW data
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
+ }
+
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ RW_IRAM2 MBED_RAM1_START MBED_RAM1_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (0x20000000+0xA0000) EMPTY -Stack_Size { ; stack
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld
index b45d63b141..eda971131f 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld
@@ -1,30 +1,52 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 2048K
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
-/* Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM */
MEMORY
-{
- FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM1 (rwx) : ORIGIN = 0x200001C0, LENGTH = 640k - 0x1C0
+{
+ FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+ RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
+ RAM2 (rwx) : ORIGIN = MBED_RAM1_START , LENGTH = MBED_RAM1_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
- *
+ *
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
@@ -55,6 +77,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -91,7 +114,7 @@ SECTIONS
__etext = .;
_sidata = .;
-
+
.data : AT (__etext)
{
__data_start__ = .;
@@ -112,7 +135,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -126,8 +148,21 @@ SECTIONS
__data_end__ = .;
_edata = .;
- } > SRAM1
+ } > RAM
+ /* Uninitialized data section
+ * This region is not initialized by the C/C++ library and can be used to
+ * store state across soft reboots. */
+ .uninitialized (NOLOAD):
+ {
+ . = ALIGN(32);
+ __uninitialized_start = .;
+ *(.uninitialized)
+ KEEP(*(.keep.uninitialized))
+ . = ALIGN(32);
+ __uninitialized_end = .;
+ } > RAM
+
.bss :
{
. = ALIGN(8);
@@ -138,16 +173,16 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
- } > SRAM1
+ } > RAM
.heap (COPY):
{
__end__ = .;
- end = __end__;
+ PROVIDE(end = .);
*(.heap*)
- . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE;
+ . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
- } > SRAM1
+ } > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -155,13 +190,13 @@ SECTIONS
.stack_dummy (COPY):
{
*(.stack*)
- } > SRAM1
+ } > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
- __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1);
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
- __StackLimit = __StackTop - STACK_SIZE;
+ __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf
index e81823dd83..70c95e409e 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf
@@ -1,38 +1,59 @@
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+/* Device specific values */
-/* [ROM = 2MB = 0x200000] */
-define symbol __intvec_start__ = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
+/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
-/* [RAM = 640KB = 0xA0000] */
-/* Vector table dynamic copy */
-/* Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x20000000 + 0x1C0 - 1;
-define symbol __region_SRAM1_start__ = 0x20000000 + 0x1C0;
-define symbol __region_SRAM1_end__ = 0x20000000 + 0xA0000 - 1;
+define symbol VECTORS = 111; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE = 0x10000;
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+ define symbol MBED_APP_START = MBED_ROM_START;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+ define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
-/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
-define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
-define symbol __size_heap__ = 0x20000; /* 128KB */
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
-initialize by copy with packing = zeros { readwrite };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
+define block HEAP with alignment = 8, size = HEAP_SIZE { };
+
+initialize by copy { readwrite };
do not initialize { section .noinit };
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM1_region { readwrite, block STACKHEAP };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/cmsis_nvic.h
index 169022ec9f..6f087ffb0b 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/cmsis_nvic.h
@@ -1,25 +1,47 @@
/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * http://www.apache.org/licenses/LICENSE-2.0
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
+ ******************************************************************************
+*/
+
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 95 vectors = 380 bytes from 0x40 to 0x1BB
-// Total: 111 vectors = 444 bytes (0x1BC) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x200000 // 2.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x40000 // 192KB SRAM1 + 64KB SRAM2
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x20040000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x60000 // 384KB SRAM3
+#endif
+
#define NVIC_NUM_VECTORS 111
-#define NVIC_RAM_VECTOR_ADDRESS 0X20000000 // Vectors positioned at start of SRAM
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c
index 27286f78d4..a75942ba5f 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c
@@ -61,6 +61,7 @@ uint8_t SetSysClock_PLL_MSI(void);
* @param None
* @retval None
*/
+
void SetSysClock(void)
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
@@ -241,22 +242,17 @@ uint8_t SetSysClock_PLL_MSI(void)
HAL_RCCEx_DisableLSECSS();
/* Enable MSI Oscillator and activate PLL with MSI as source */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.MSIState = RCC_MSI_ON;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
-#if DEVICE_USBDEVICE
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
-#else
- RCC_OscInitStruct.HSI48State = RCC_HSI48_OFF;
-#endif /* DEVICE_USBDEVICE */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; /* 4 MHz */
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; /* 48 MHz */
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
- RCC_OscInitStruct.PLL.PLLM = 1; /* 4 MHz */
- RCC_OscInitStruct.PLL.PLLN = 60; /* 240 MHz */
- RCC_OscInitStruct.PLL.PLLP = 7; /* 48 MHz */
+ RCC_OscInitStruct.PLL.PLLM = 6; /* 8 MHz */
+ RCC_OscInitStruct.PLL.PLLN = 30; /* 240 MHz */
+ RCC_OscInitStruct.PLL.PLLP = 5; /* 48 MHz */
RCC_OscInitStruct.PLL.PLLQ = 2; /* 120 MHz */
RCC_OscInitStruct.PLL.PLLR = 2; /* 120 MHz */
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -266,11 +262,10 @@ uint8_t SetSysClock_PLL_MSI(void)
HAL_RCCEx_EnableMSIPLLMode();
#if DEVICE_USBDEVICE
+ /* Select MSI output as USB clock source */
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
#endif /* DEVICE_USBDEVICE */
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct
index f0e40746b7..aaecf8f0ca 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct
@@ -1,60 +1,57 @@
#! armcc -E
; Scatter-Loading Description File
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Copyright (c) 2018, STMicroelectronics
-; All rights reserved.
;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions are met:
-;
-; 1. Redistributions of source code must retain the above copyright notice,
-; this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright notice,
-; this list of conditions and the following disclaimer in the documentation
-; and/or other materials provided with the distribution.
-; 3. Neither the name of STMicroelectronics nor the names of its contributors
-; may be used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; SPDX-License-Identifier: BSD-3-Clause
+;******************************************************************************
+;* @attention
+;*
+;* Copyright (c) 2016-2020 STMicroelectronics.
+;* All rights reserved.
+;*
+;* This software component is licensed by ST under BSD 3-Clause license,
+;* the "License"; You may not use this file except in compliance with the
+;* License. You may obtain a copy of the License at:
+;* opensource.org/licenses/BSD-3-Clause
+;*
+;******************************************************************************
+
+#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x200000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ; Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM
- RW_IRAM1 (0x20000000+0x1C0) (0xA0000-0x1C0-Stack_Size) { ; RW data
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
+ }
+
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ RW_IRAM2 MBED_RAM1_START MBED_RAM1_SIZE {
.ANY (+RW +ZI)
}
- ARM_LIB_STACK (0x20000000+0xA0000) EMPTY -Stack_Size { ; stack
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld
index b45d63b141..eda971131f 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld
@@ -1,30 +1,52 @@
+/* Linker script to configure memory regions. */
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#include "../cmsis_nvic.h"
+
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 2048K
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
-/* Linker script to configure memory regions. */
-/* Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM */
MEMORY
-{
- FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
- SRAM1 (rwx) : ORIGIN = 0x200001C0, LENGTH = 640k - 0x1C0
+{
+ FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+ RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
+ RAM2 (rwx) : ORIGIN = MBED_RAM1_START , LENGTH = MBED_RAM1_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
- *
+ *
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
@@ -55,6 +77,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
+
KEEP(*(.init))
KEEP(*(.fini))
@@ -91,7 +114,7 @@ SECTIONS
__etext = .;
_sidata = .;
-
+
.data : AT (__etext)
{
__data_start__ = .;
@@ -112,7 +135,6 @@ SECTIONS
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
-
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
@@ -126,8 +148,21 @@ SECTIONS
__data_end__ = .;
_edata = .;
- } > SRAM1
+ } > RAM
+ /* Uninitialized data section
+ * This region is not initialized by the C/C++ library and can be used to
+ * store state across soft reboots. */
+ .uninitialized (NOLOAD):
+ {
+ . = ALIGN(32);
+ __uninitialized_start = .;
+ *(.uninitialized)
+ KEEP(*(.keep.uninitialized))
+ . = ALIGN(32);
+ __uninitialized_end = .;
+ } > RAM
+
.bss :
{
. = ALIGN(8);
@@ -138,16 +173,16 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
- } > SRAM1
+ } > RAM
.heap (COPY):
{
__end__ = .;
- end = __end__;
+ PROVIDE(end = .);
*(.heap*)
- . = ORIGIN(SRAM1) + LENGTH(SRAM1) - STACK_SIZE;
+ . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
- } > SRAM1
+ } > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
@@ -155,13 +190,13 @@ SECTIONS
.stack_dummy (COPY):
{
*(.stack*)
- } > SRAM1
+ } > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
- __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1);
+ __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
- __StackLimit = __StackTop - STACK_SIZE;
+ __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf
index e81823dd83..1f74eb7736 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf
@@ -1,38 +1,77 @@
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
+/* Linker script to configure memory regions.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+/* Device specific values */
-/* [ROM = 2MB = 0x200000] */
-define symbol __intvec_start__ = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
+/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
+if (!isdefinedsymbol(MBED_ROM_START)) {
+ define symbol MBED_ROM_START = 0x8000000;
+}
+if (!isdefinedsymbol(MBED_ROM_SIZE)) {
+ define symbol MBED_ROM_SIZE = 0x200000;
+}
+if (!isdefinedsymbol(MBED_RAM_START)) {
+ define symbol MBED_RAM_START = 0x20000000;
+}
+if (!isdefinedsymbol(MBED_RAM_SIZE)) {
+ define symbol MBED_RAM_SIZE = 0x40000;
+}
+if (!isdefinedsymbol(MBED_RAM1_START)) {
+ define symbol MBED_RAM1_START = 0x20040000;
+}
+if (!isdefinedsymbol(MBED_RAM1_SIZE)) {
+ define symbol MBED_RAM1_SIZE = 0x60000;
+}
-/* [RAM = 640KB = 0xA0000] */
-/* Vector table dynamic copy */
-/* Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM */
-define symbol __NVIC_start__ = 0x20000000;
-define symbol __NVIC_end__ = 0x20000000 + 0x1C0 - 1;
-define symbol __region_SRAM1_start__ = 0x20000000 + 0x1C0;
-define symbol __region_SRAM1_end__ = 0x20000000 + 0xA0000 - 1;
+define symbol VECTORS = 111; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE = 0x10000;
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+ define symbol MBED_APP_START = MBED_ROM_START;
+}
+
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+ define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
-/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
+ /* This value is normally defined by the tools
+ to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
-define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
-define symbol __size_heap__ = 0x20000; /* 128KB */
-define block CSTACK with alignment = 8, size = __size_cstack__ { };
-define block HEAP with alignment = 8, size = __size_heap__ { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
-initialize by copy with packing = zeros { readwrite };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
+define block HEAP with alignment = 8, size = HEAP_SIZE { };
+
+initialize by copy { readwrite };
do not initialize { section .noinit };
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly };
-place in SRAM1_region { readwrite, block STACKHEAP };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/cmsis_nvic.h
index 169022ec9f..6f087ffb0b 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/cmsis_nvic.h
@@ -1,25 +1,47 @@
/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * http://www.apache.org/licenses/LICENSE-2.0
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
+ ******************************************************************************
+*/
+
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 95 vectors = 380 bytes from 0x40 to 0x1BB
-// Total: 111 vectors = 444 bytes (0x1BC) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x200000 // 2.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x40000 // 192KB SRAM1 + 64KB SRAM2
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x20040000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x60000 // 384KB SRAM3
+#endif
+
#define NVIC_NUM_VECTORS 111
-#define NVIC_RAM_VECTOR_ADDRESS 0X20000000 // Vectors positioned at start of SRAM
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/targets.json b/targets/targets.json
index ddad444985..5b9bf78690 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -3908,6 +3908,10 @@
"MPU"
],
"device_name": "STM32L4R5ZI",
+ "mbed_rom_start": "0x08000000",
+ "mbed_rom_size": "0x200000",
+ "mbed_ram_start": "0x20000000",
+ "mbed_ram_size": "0x40000",
"bootloader_supported": true
},
"NUCLEO_L4R5ZI_P": {
@@ -3970,7 +3974,11 @@
"USBDEVICE",
"MPU"
],
- "bootloader_supported": false
+ "mbed_rom_start": "0x08000000",
+ "mbed_rom_size": "0x200000",
+ "mbed_ram_start": "0x20000000",
+ "mbed_ram_size": "0x40000",
+ "bootloader_supported": true
},
"NUCLEO_L552ZE_Q": {
"inherits": [