mirror of https://github.com/ARMmbed/mbed-os.git
Support for exporting to GCC_ARM
parent
83d4facb0e
commit
09cf4ef128
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@ -0,0 +1,172 @@
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/* Linker script for mbed LPC1768 */
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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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RAM (rwx) : ORIGIN = 0x100000E8, LENGTH = (32K - 0xE8)
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USB_RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 16K
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ETH_RAM(rwx) : ORIGIN = 0x20004000, LENGTH = 16K
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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Image$$RW_IRAM1$$Base = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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__bss_end__ = .;
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Image$$RW_IRAM1$$ZI$$Limit = . ;
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} > RAM
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.heap :
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy :
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{
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*(.stack)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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/* Code can explicitly ask for data to be
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placed in these higher RAM banks where
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they will be left uninitialized.
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*/
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.AHBSRAM0 (NOLOAD):
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{
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Image$$RW_IRAM2$$Base = . ;
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*(AHBSRAM0)
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Image$$RW_IRAM2$$ZI$$Limit = .;
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} > USB_RAM
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.AHBSRAM1 (NOLOAD):
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{
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Image$$RW_IRAM3$$Base = . ;
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*(AHBSRAM1)
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Image$$RW_IRAM3$$ZI$$Limit = .;
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} > ETH_RAM
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}
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@ -0,0 +1,231 @@
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/* File: startup_ARMCM3.s
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* Purpose: startup file for Cortex-M3/M4 devices. Should use with
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* GNU Tools for ARM Embedded Processors
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* Version: V1.1
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* Date: 17 June 2011
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*
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* Copyright (C) 2011 ARM Limited. All rights reserved.
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* ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
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* processor based microcontrollers. This file can be freely distributed
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* within development tools that are supporting such ARM based processors.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*/
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.syntax unified
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.arch armv7-m
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/* Memory Model
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The HEAP starts at the end of the DATA section and grows upward.
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The STACK starts at the end of the RAM and grows downward.
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The HEAP and stack STACK are only checked at compile time:
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(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
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This is just a check for the bare minimum for the Heap+Stack area before
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aborting compilation, it is not the run time limit:
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Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
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*/
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0xc00
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x800
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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.long BusFault_Handler /* Bus Fault Handler */
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.long UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long WDT_IRQHandler /* 16: Watchdog Timer */
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.long TIMER0_IRQHandler /* 17: Timer0 */
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.long TIMER1_IRQHandler /* 18: Timer1 */
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.long TIMER2_IRQHandler /* 19: Timer2 */
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.long TIMER3_IRQHandler /* 20: Timer3 */
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.long UART0_IRQHandler /* 21: UART0 */
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.long UART1_IRQHandler /* 22: UART1 */
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.long UART2_IRQHandler /* 23: UART2 */
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.long UART3_IRQHandler /* 24: UART3 */
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.long PWM1_IRQHandler /* 25: PWM1 */
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.long I2C0_IRQHandler /* 26: I2C0 */
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.long I2C1_IRQHandler /* 27: I2C1 */
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.long I2C2_IRQHandler /* 28: I2C2 */
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.long 0 /* 29: Reserved */
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.long SSP0_IRQHandler /* 30: SSP0 */
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.long SSP1_IRQHandler /* 31: SSP1 */
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.long PLL0_IRQHandler /* 32: PLL0 Lock (Main PLL) */
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.long RTC_IRQHandler /* 33: Real Time Clock */
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.long EINT0_IRQHandler /* 34: External Interrupt 0 */
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.long EINT1_IRQHandler /* 35: External Interrupt 1 */
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.long EINT2_IRQHandler /* 36: External Interrupt 2 */
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.long EINT3_IRQHandler /* 37: External Interrupt 3 */
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.long ADC_IRQHandler /* 38: A/D Converter */
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.long BOD_IRQHandler /* 39: Brown-Out Detect */
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.long USB_IRQHandler /* 40: USB */
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.long CAN_IRQHandler /* 41: CAN */
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.long DMA_IRQHandler /* 42: General Purpose DMA */
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.long I2S_IRQHandler /* 43: I2S */
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.long ENET_IRQHandler /* 44: Ethernet */
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.long MCI_IRQHandler /* 45: SD/MMC carf I/F */
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.long MCPWM_IRQHandler /* 46: Motor Control PWM */
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.long QEI_IRQHandler /* 47: Quadrature Encoder Interface */
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.long PLL1_IRQHandler /* 48: PLL1 Lock (USB PLL) */
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.long USBActivity_IRQHandler /* 49: USB Activity */
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.long CANActivity_IRQHandler /* 50: CAN Activity */
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.long UART4_IRQHandler /* 51: UART4 */
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.long SSP2_IRQHandler /* 52: SSP2 */
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.long LCD_IRQHandler /* 53: LCD */
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.long GPIO_IRQHandler /* 54: GPIO */
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.long PWM0_IRQHandler /* 55: PWM0 */
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.long EEPROM_IRQHandler /* 56: EEPROM */
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* _etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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.flash_to_ram_loop:
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cmp r2, r3
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ittt lt
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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blt .flash_to_ram_loop
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ldr r0, =SystemInit
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blx r0
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_default_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_default_handler NMI_Handler
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def_default_handler HardFault_Handler
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def_default_handler MemManage_Handler
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def_default_handler BusFault_Handler
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def_default_handler UsageFault_Handler
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def_default_handler SVC_Handler
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def_default_handler DebugMon_Handler
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def_default_handler PendSV_Handler
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def_default_handler SysTick_Handler
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def_default_handler Default_Handler
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def_default_handler WDT_IRQHandler
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def_default_handler TIMER0_IRQHandler
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def_default_handler TIMER1_IRQHandler
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def_default_handler TIMER2_IRQHandler
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def_default_handler TIMER3_IRQHandler
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def_default_handler UART0_IRQHandler
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def_default_handler UART1_IRQHandler
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def_default_handler UART2_IRQHandler
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def_default_handler UART3_IRQHandler
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def_default_handler PWM1_IRQHandler
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def_default_handler I2C0_IRQHandler
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def_default_handler I2C1_IRQHandler
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def_default_handler I2C2_IRQHandler
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/* def_default_handler SPI_IRQHandler */
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def_default_handler SSP0_IRQHandler
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def_default_handler SSP1_IRQHandler
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def_default_handler PLL0_IRQHandler
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def_default_handler RTC_IRQHandler
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def_default_handler EINT0_IRQHandler
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def_default_handler EINT1_IRQHandler
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def_default_handler EINT2_IRQHandler
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def_default_handler EINT3_IRQHandler
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def_default_handler ADC_IRQHandler
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def_default_handler BOD_IRQHandler
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def_default_handler USB_IRQHandler
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def_default_handler CAN_IRQHandler
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def_default_handler DMA_IRQHandler
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def_default_handler I2S_IRQHandler
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def_default_handler ENET_IRQHandler
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def_default_handler MCI_IRQHandler
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def_default_handler MCPWM_IRQHandler
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def_default_handler QEI_IRQHandler
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def_default_handler PLL1_IRQHandler
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def_default_handler USBActivity_IRQHandler
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def_default_handler CANActivity_IRQHandler
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def_default_handler UART4_IRQHandler
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def_default_handler SSP2_IRQHandler
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def_default_handler LCD_IRQHandler
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def_default_handler GPIO_IRQHandler
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def_default_handler PWM0_IRQHandler
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def_default_handler EEPROM_IRQHandler
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.weak DEF_IRQHandler
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.set DEF_IRQHandler, Default_Handler
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.end
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@ -0,0 +1,46 @@
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# This file was automagically generated by mbed.org. For more information,
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# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
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GCC_BIN =
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PROJECT = {{name}}
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OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
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SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
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INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
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LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
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LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
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LINKER_SCRIPT = {{linker_script}}
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###############################################################################
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AS = $(GCC_BIN)arm-none-eabi-as
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CC = $(GCC_BIN)arm-none-eabi-gcc
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CPP = $(GCC_BIN)arm-none-eabi-g++
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LD = $(GCC_BIN)arm-none-eabi-gcc
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OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
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CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp
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CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections
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CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
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LD_FLAGS = -mcpu=cortex-m4 -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float
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LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
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all: $(PROJECT).bin
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clean:
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rm -f $(PROJECT).bin $(PROJECT).elf $(OBJECTS)
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.s.o:
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$(AS) $(CPU) -o $@ $<
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.c.o:
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$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
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.cpp.o:
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$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $<
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$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
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$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
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$(PROJECT).bin: $(PROJECT).elf
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$(OBJCOPY) -O binary $< $@
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Reference in New Issue