mirror of https://github.com/ARMmbed/mbed-os.git
Disabled interrupts on smt32f7 and stm32h7 before calling disable data cache
Interrupts are disabled before calling disable data cache on Ethernet initialization.pull/15006/head
parent
ca5126e2e4
commit
096ce41094
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
/**
|
||||
* Override HAL Eth Init function
|
||||
|
@ -38,7 +39,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32F7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
/**
|
||||
* Override HAL Eth Init function
|
||||
|
@ -38,7 +39,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32F7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
/**
|
||||
* Override HAL Eth Init function
|
||||
|
@ -38,7 +39,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32F7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
/**
|
||||
* Override HAL Eth Init function
|
||||
|
@ -38,7 +39,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32F7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
/**
|
||||
* Override HAL Eth Init function
|
||||
|
@ -38,7 +39,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32F7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* Enable GPIOs clocks */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
#define ETH_TX_EN_Pin GPIO_PIN_11
|
||||
#define ETH_TX_EN_GPIO_Port GPIOG
|
||||
|
@ -66,7 +67,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
if (heth->Instance == ETH) {
|
||||
#if defined(CORE_CM7)
|
||||
/* Disable DCache for STM32H7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
#endif
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
#define MCO_Pin GPIO_PIN_0
|
||||
#define MCO_GPIO_Port GPIOH
|
||||
|
@ -63,7 +64,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32H7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
|
||||
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
#define MCO_Pin GPIO_PIN_0
|
||||
#define MCO_GPIO_Port GPIOH
|
||||
|
@ -63,7 +64,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if (heth->Instance == ETH) {
|
||||
/* Disable DCache for STM32H7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "portenta_power.h"
|
||||
#include "platform/mbed_critical.h"
|
||||
|
||||
#define ETH_TX_EN_Pin GPIO_PIN_11
|
||||
#define ETH_TX_EN_GPIO_Port GPIOG
|
||||
|
@ -66,7 +67,9 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
|
|||
|
||||
#if !(defined(DUAL_CORE) && defined(CORE_CM4))
|
||||
/* Disable DCache for STM32H7 family */
|
||||
core_util_critical_section_enter();
|
||||
SCB_DisableDCache();
|
||||
core_util_critical_section_exit();
|
||||
#endif
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
|
|
Loading…
Reference in New Issue