From 08a7fd6c15904fee8b23c0d75fcbf21d8159647e Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 13 Nov 2020 12:05:23 +0100 Subject: [PATCH] STM32G0: no TIM2 for G070xx --- .../TARGET_STM32G0/us_ticker_data.h | 26 ++++++++++++++----- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h index 8a3b534a9b..089e240da8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h +++ b/targets/TARGET_STM/TARGET_STM32G0/us_ticker_data.h @@ -2,11 +2,11 @@ * SPDX-License-Identifier: BSD-3-Clause ****************************************************************************** * - * Copyright (c) 2017 STMicroelectronics. + * Copyright (c) 2017 STMicroelectronics. * All rights reserved. * * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -16,13 +16,15 @@ #define __US_TICKER_DATA_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif #include "stm32g0xx.h" #include "stm32g0xx_ll_tim.h" #include "cmsis_nvic.h" - + +#if defined TIM2_BASE + #define TIM_MST TIM2 #define TIM_MST_IRQ TIM2_IRQn #define TIM_MST_RCC __TIM2_CLK_ENABLE() @@ -33,12 +35,24 @@ #define TIM_MST_BIT_WIDTH 32 // 16 or 32 -#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2) +#else // TIM2_BASE +#define TIM_MST TIM3 +#define TIM_MST_IRQ TIM3_IRQn +#define TIM_MST_RCC __TIM3_CLK_ENABLE() +#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM3() + +#define TIM_MST_RESET_ON __TIM3_FORCE_RESET() +#define TIM_MST_RESET_OFF __TIM3_RELEASE_RESET() + +#define TIM_MST_BIT_WIDTH 16 // 16 or 32 + +#endif // TIM2_BASE + +#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2) #ifdef __cplusplus } #endif #endif // __US_TICKER_DATA_H -