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[NUCLEO_L152RE] Add sleep api

pull/154/head
bcostm 2014-01-30 11:14:59 +01:00
parent 90f7a2b80d
commit 08941aaba1
1 changed files with 84 additions and 4 deletions
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88
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c
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@ -30,17 +30,97 @@
#include "sleep_api.h"
#include "cmsis.h"
void sleep(void)
static void SetSysClock_HSI(void)
{
SCB->SCR = 0; // Normal sleep mode for ARM core
__WFI();
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
/* Enable HSI */
RCC->CR |= ((uint32_t)RCC_CR_HSION);
/* Wait till HSI is ready and if Time out is reached exit */
do
{
HSIStatus = RCC->CR & RCC_CR_HSIRDY;
} while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
{
HSIStatus = (uint32_t)0x01;
}
else
{
HSIStatus = (uint32_t)0x00;
}
if (HSIStatus == (uint32_t)0x01)
{
/* Flash 0 wait state */
FLASH->ACR &= ~FLASH_ACR_LATENCY;
/* Disable Prefetch Buffer */
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
/* Disable 64-bit access */
FLASH->ACR &= ~FLASH_ACR_ACC64;
/* Power enable */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
/* Select the Voltage Range 1 (1.8 V) */
PWR->CR = PWR_CR_VOS_0;
/* Wait Until the Voltage Regulator is ready */
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
{
}
/* HCLK = SYSCLK /1*/
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK2 = HCLK /1*/
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
/* PCLK1 = HCLK /1*/
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
/* Select HSI as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
/* Wait till HSI is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI)
{
}
}
else
{
/* If HSI fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}
// MCU SLEEP mode
void sleep(void)
{
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Request to enter SLEEP mode with regulator ON
PWR_EnterSleepMode(PWR_Regulator_ON, PWR_SLEEPEntry_WFI);
}
// MCU STOP mode (Regulator in LP mode, LSI, HSI and HSE OFF)
void deepsleep(void)
{
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Request to enter STOP mode with regulator in low power mode
// Enable Ultra low power mode
PWR_UltraLowPowerCmd(ENABLE);
// Enter Stop Mode
PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
// After wake-up from STOP reconfigure the system clock (HSI)
SetSysClock_HSI();
}