From e9c0fd990fb4a53f6979f194ae58517c26d28ba7 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 4 Nov 2014 11:12:26 +0100 Subject: [PATCH 1/4] [STM32L0] Update version in files, add Cube driver release note --- .../Release_Notes_stm32l0xx_hal.html | 1133 +++++++++++++++++ .../TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s | 4 +- .../TOOLCHAIN_ARM_STD/startup_stm32l053xx.s | 4 +- .../TARGET_NUCLEO_L053R8/stm32l0xx.h | 8 +- .../TARGET_NUCLEO_L053R8/system_stm32l0xx.c | 4 +- .../TARGET_NUCLEO_L053R8/system_stm32l0xx.h | 4 +- .../TARGET_STM32L0/stm32l0xx_hal_conf.h | 4 +- 7 files changed, 1147 insertions(+), 14 deletions(-) create mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html new file mode 100644 index 0000000000..d19459b6ce --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html @@ -0,0 +1,1133 @@ + + + + + + +Release Notes for STM32L0xx HAL Drivers + + + + + + + + +
+

 

+
+ + + + + + +
+ + + + + + + + + +
+

Back to Release page

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+

Release +Notes for STM32L0xx HAL Drivers

+

Copyright +2014 STMicroelectronics

+

+
+

 

+ + + + + + +
+

Update History

V1.1.0 +/ 18-June-2014

Main +Changes

+
  • + + + + + + + +

    HAL generic update

    +
    • +
      +
    • Fix flag clear procedure: use atomic write operation "=" instead of ready-modify-write operation "|=" or "&="
      • +
    • Fix +on Timeout management, Timeout value set to 0 passed to API +automatically exits the function after checking the flag without any +wait
      +
      • +
    • Common update for the following communication peripherals: SPI, UART, USART and IRDA
      • +
        +
      • Add DMA circular mode support
        +
        • +
      +
        +
      • Remove lock from recursive process
        +
        • +
      +
    • Add +new macro __HAL_RESET_HANDLE_STATE to reset a given handle state
      • +
    +
      +
    • When USE_RTOS == 1 (in stm32l0xx_hal_conf.h), the __HAL_LOCK() is not defined instead of being defined empty
      • +
    • Use “__IO const” instead of +“__I”, to avoid any compilation issue when __cplusplus switch is defined
      • +
    • Add new functions for the DBGMCU module
      • +
        +
      • HAL_EnableDBGSleepMode()
        • +
      • HAL_DisableDBGSleepMode()
        • +
      • HAL_EnableDBGStopMode()
        • +
      • HAL_DisableDBGStopMode()
        • +
      • HAL_EnableDBGStandbyMode()
        • +
      • HAL_DisableDBGStandbyMode()
        • +
      +
    • Miscellaneous comments update
      • +
    +
  • + +

    HAL FLASH update

    + + + + + +
    • Add +new functions: HAL_FLASHEx_OB_SelectPCROP() and HAL_FLASHEx_OB_DeSelectPCROP()
      • +
    • Some functions was renamed and moved to the extension files (stm32l0xx_hal_flash_ex.h/.c)
      +
      • +
        +
      • Rename + FLASH_HalfPageProgram() into HAL_FLASHEx_HalfPageProgram()
        • +
      +
        +
      • Rename + FLASH_EnableRunPowerDown() into HAL_FLASHEx_EnableRunPowerDown()
        • +
      +
        +
      • Rename + FLASH_DisableRunPowerDown() into HAL_FLASHEx_DisableRunPowerDown()
        • +
      +
        +
      • Rename +all HAL_DATA_EEPROMEx_xxx() functions into HAL_FLASHEx_DATAEEPROM_xxx()
        • +
      +
        +
      • Note: aliases has been added to keep compatibility with previous version
        • +
      +

    +
    • +
  • HAL GPIO update
    • +
      +
    • Remove + IS_GET_GPIO_PIN macro
      • +
    • Add +a new function HAL_GPIO_LockPin()
      • +
    • Private Macro __HAL_GET_GPIO_SOURCE renamed into GET_GPIO_SOURCE
      +
      • +
    +
  • +

    HAL DMA update

    +
    • +
      +
    • Fix in HAL_DMA_PollForTransfer() to set error code HAL_DMA_ERROR_TE in case of HAL_ERROR status
      • +
    +

+ +
    +
  • HAL PWR update
    +
    • +
      +
    • HAL_PWR_PVDConfig(): add clear of the EXTI trigger before new configuration
      +
      • +
    • Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function
      +
      • +
    +
  • +

    HAL RCC update

    +
    • +
      +
    • Allow to calibrate the HSI when it is used as system clock source
      +
      • +
    • Fix implementation of IS_RCC_OSCILLATORTYPE() macro
      +
      • +
    +
  • +

    HAL ADC update

    +
    • +
      +
    • Update ADC internal channels mapping: TEMPSENSOR connected to ADC_CHANNEL_18 and VLCD mapped to ADC_CHANNEL_16
      +
      • +
    • Skip polling for ADRDY flag when Low Power Auto Off mode is enabled
      +
      • +
    +
  • +

    HAL COMP update

    +
    • Add + LPTIMConnection field in the COMP_InitTypeDef structure.
    • Add +new defines: COMP_LPTIMCONNECTION_DISABLED, COMP_LPTIMCONNECTION_ENABLED
    • Add +new macro IS_COMP_LPTIMCONNECTION
    • +
  • +

    HAL LPTIM update

    + +
    • +
      +
    • Add + CKPOL configuration for encoder mode
      • +
    +
  • +

    HAL WWDG update

    + +
    • +
      +
    • Miscellaneous minor update on the source code
      • +
    +
  • +

    HAL IWDG update

    + +
    • +
      +
    • Miscellaneous minor update on the source code
      • +
    +
  • +

    HAL CRC update

    +
    • Some functions was renamed and moved to the extension files (stm32l0xx_hal_crc_ex.h/.c)
      • +
        +
      • HAL_CRC_Input_Data_Reverse() renamed into HAL_CRCEx_Input_Data_Reverse()
        • +
      +
        +
      • HAL_CRC_Output_Data_Reverse() renamed into HAL_CRCEx_Output_Data_Reverse()
        • +
      +
        +
      • Note: aliases has been added to keep compatibility with previous version
        • +
      +
    • +
  • + + + +

    HAL CRYP update

      +
    • HAL_CRYP_ComputationCpltCallback() renamed into HAL_CRYPEx_ComputationCpltCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c)
      • +
    • Note: alias has been added to keep compatibility with previous version
      • +
    • +
  • +

    HAL I2C update

    +
    • +
      +
    • Add +management of NACK event in Master transmitter mode and Slave +transmitter/receiver modes (only in polling mode), in that case the +current transfer is stopped.
      • +
    +
  • +

    HAL SMBUS update

    + + + + + + + + + + + +
    • +
      +
    • Add +a new function: HAL_SMBUS_DisableListen_IT()
      +
      • +
    • Add aliases for the following functions
      +
      • +
        +
      • #define +HAL_SMBUS_Slave_Listen_IT             +HAL_SMBUS_EnableListen_IT
        • +
      • #define HAL_SMBUS_SlaveAddrCallback         HAL_SMBUS_AddrCallback
        • +
      • #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
        • +
      +
    • Add alias HAL_SMBUS_STATE_SLAVE_LISTEN for the constant HAL_SMBUS_STATE_LISTEN
      • +
    +
  • +

    HAL UART update

    + + + + +
      +
    • HAL_UART_WakeupCallback() renamed into HAL_UART_WakeupCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c)
      • +
    • Add +new macros to control CTS and RTS
      +
      • +
    • Add specific macros to manage the + flags cleared only by a software sequence
      • +
        +
      • __HAL_UART_CLEAR_PEFLAG()
        • +
      +
        +
      • __HAL_UART_CLEAR_FEFLAG()
        • +
      +
        +
      • __HAL_UART_CLEAR_NEFLAG()
        • +
      +
        +
      • __HAL_UART_CLEAR_OREFLAG()
        • +
      • __HAL_UART_CLEAR_IDLEFLAG()
        • +
      +
    • Add several enhancements without + affecting the driver functionalities
      • +
        +
      • Remove the check on RXNE set + after reading the Data in the DR register
        • +
      +
        +
      • Update the transmit processes to + use TXE instead of TC
        • +
      • Update HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC
        • +
      +
    +
    • +
  • + + + + + + + +

    HAL USART update

    • +
      +
    • Add specific macros to manage the + flags cleared only by a software sequence
      • +
        +
      • __HAL_USART_CLEAR_PEFLAG()
        • +
      +
        +
      • __HAL_USART_CLEAR_FEFLAG()
        • +
      +
        +
      • __HAL_USART_CLEAR_NEFLAG()
        • +
      +
        +
      • __HAL_USART_CLEAR_OREFLAG()
        • +
      +
        +
      • __HAL_USART_CLEAR_IDLEFLAG()
        • +
      +
    • Update HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC
      • +
    +
  • +

    HAL IRDA update

    +
      +
    • Add specific macros to manage the + flags cleared only by a software sequence
      • +
        +
      • __HAL_IRDA_CLEAR_PEFLAG()
      • __HAL_ IRDA _CLEAR_FEFLAG()
      • __HAL_ IRDA _CLEAR_NEFLAG()
      • __HAL_ IRDA _CLEAR_OREFLAG()
      • __HAL_ IRDA _CLEAR_IDLEFLAG()
        • +
      +
    • Add several enhancements without + affecting the driver functionalities
      • +
        +
      • Remove the check on RXNE set + after reading the Data in the DR register
        +
        • +
      • Update HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC
        • +
      +
    • Add the following APIs used within + DMA process
      • +
        +
      • HAL_StatusTypeDef + HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
        • +
      +
        +
      • HAL_StatusTypeDef + HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
        • +
      • HAL_StatusTypeDef + HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
        • +
      • void + HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
        • +
      • void + HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
        • +
      +
    • +
  • + + + + + + + +

    HAL SMARTCARD update

    • +
      +
    • Add specific macros to manage the + flags cleared only by a software sequence
      • +
        +
      • __HAL_SMARTCARD_CLEAR_PEFLAG()
        • +
      +
        +
      • __HAL_SMARTCARD_CLEAR_FEFLAG()
        • +
      +
        +
      • __HAL_SMARTCARD_CLEAR_NEFLAG()
        • +
      +
        +
      • __HAL_SMARTCARD_CLEAR_OREFLAG()
        • +
      +
        +
      • __HAL_SMARTCARD_CLEAR_IDLEFLAG()
        • +
      +
    • Add several enhancements without + affecting the driver functionalities
      • +
        +
      • Add a new state + HAL_SMARTCARD_STATE_BUSY_TX_RX and all processes has been updated + accordingly
        • +
      +
        +
      • Update HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC
        • +
      +
    +
+
+ +
    +
  • HAL SPI update
    • +
      +
    • Bugs fix
      • +
        +
      • SPI interface is used in synchronous polling mode: at high clock rates like SPI prescaler 2 and 4, calling
        +HAL_SPI_TransmitReceive() returns with error HAL_TIMEOUT
        • +
      • HAL_SPI_TransmitReceive_DMA() does not clean up the TX DMA, so any subsequent SPI calls return the DMA error
        • +
      • HAL_SPI_Transmit_DMA() is failing when data size is equal to 1 byte
        • +
      +
    • Add the following APIs used within the DMA process
      • +
    +
      +
      • HAL_StatusTypeDef + HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
      • HAL_StatusTypeDef + HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
      • HAL_StatusTypeDef + HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
      • void + HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      • void + HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      • void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef + *hspi);
      +
    +
  • +

    HAL TSC update

    +
    • +
      +
    • +

      Fix value of the constant TSC_ACQ_MODE_SYNCHRO

      +
      • +
    +
  • +

    HAL PCD update

    +
    • +
      +
    • +

      Add new macro __HAL_USB_EXTI_GENERATE_SWIT()

      +
      • +
    +
+

V1.0.0 +/ 22-April-2014

Main +Changes

+First official release.
+ + +

License

+
+
Redistribution +and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are +met:
+ +
    +
  1. Redistributions +of source code must retain the above copyright notice, this list of +conditions and the following disclaimer.
    2. +
  2. Redistributions +in binary form must reproduce the above copyright notice, this list of +conditions and the following disclaimer in the +documentation and/or other materials provided with the distribution.
    3. +
  3. Neither the +name of STMicroelectronics nor the names of its contributors may be +used to endorse or promote products derived
    +
    4. +
+       +from this software without specific prior written permission.
+
+THIS +SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, +INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR +PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR +CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +THE POSSIBILITY OF SUCH DAMAGE.
+
+ +
+
+
+

For +complete documentation on STM32 Microcontrollers visit www.st.com/STM32

+
+

+
+
+

 

+
+ \ No newline at end of file diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s index 39643eb327..82152a6380 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.s @@ -1,8 +1,8 @@ ;******************** (C) COPYRIGHT 2014 STMicroelectronics ******************** ;* File Name : startup_stm32l053xx.s ;* Author : MCD Application Team -;* Version : V1.0.0 -;* Date : 22-April-2014 +;* Version : V1.1.0 +;* Date : 18-June-2014 ;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain. ;* This module performs: ;* - Set the initial SP diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s index 4c1b6c7ffd..c15b196c9c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_ARM_STD/startup_stm32l053xx.s @@ -1,8 +1,8 @@ ;******************** (C) COPYRIGHT 2014 STMicroelectronics ******************** ;* File Name : startup_stm32l053xx.s ;* Author : MCD Application Team -;* Version : V1.0.0 -;* Date : 22-April-2014 +;* Version : V1.1.0 +;* Date : 18-June-2014 ;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain. ;* This module performs: ;* - Set the initial SP diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l0xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l0xx.h index fb2b8b3653..c26bfd0a79 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l0xx.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l0xx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32l0xx.h * @author MCD Application Team - * @version V1.0.0 - * @date 22-April-2014 + * @version V1.1.0 + * @date 18-June-2014 * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File. * This file contains all the peripheral register's definitions, bits * definitions and memory mapping for STM32L0xx devices. @@ -93,10 +93,10 @@ #endif /* USE_HAL_DRIVER */ /** - * @brief CMSIS Device version number V1.0.0 + * @brief CMSIS Device version number V1.1.0 */ #define __STM32L0xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */ -#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */ +#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */ #define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ #define __STM32L0xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32L0xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c index f51d91562c..8bd323284c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32l0xx.c * @author MCD Application Team - * @version V1.0.0 - * @date 22-April-2014 + * @version V1.1.0 + * @date 18-June-2014 * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File. * * This file provides two functions and one global variable to be called from diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.h index 7b787aae83..7ba1eb0601 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32l0xx.h * @author MCD Application Team - * @version V1.0.0 - * @date 22-April-2014 + * @version V1.1.0 + * @date 18-June-2014 * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Header File. ****************************************************************************** * @attention diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h index 1025fb65db..805a180323 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32l0xx_hal_conf.h * @author MCD Application Team - * @version V1.0.0 - * @date 22-April-2014 + * @version V1.1.0 + * @date 18-June-2014 * @brief HAL configuration file. ****************************************************************************** * @attention From 0f20cff47d041bf9a327a43ca196b77e5f005401 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 4 Nov 2014 11:13:20 +0100 Subject: [PATCH 2/4] [STM32L0] Update registers map file --- .../TARGET_NUCLEO_L053R8/stm32l053xx.h | 575 +++++++++--------- 1 file changed, 288 insertions(+), 287 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l053xx.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l053xx.h index 9e91dbf656..8f467f6da8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l053xx.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/stm32l053xx.h @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32l053xx.h * @author MCD Application Team - * @version V1.0.0 - * @date 22-April-2014 + * @version V1.1.0 + * @date 18-June-2014 * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File. * This file contains all the peripheral register's definitions, bits * definitions and memory mapping for STM32L0xx devices. @@ -183,9 +183,7 @@ typedef struct typedef struct { __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ - __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ - uint8_t RESERVED0; /*!< Reserved, 0x05 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ + __IO uint32_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ uint32_t RESERVED2; /*!< Reserved, 0x0C */ __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ @@ -304,18 +302,15 @@ typedef struct typedef struct { __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */ - __IO uint16_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */ - uint16_t RESERVED0; /*!< Reserved, 0x06 */ + __IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */ __IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */ __IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */ - __IO uint16_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */ - uint16_t RESERVED1; /*!< Reserved, 0x12 */ - __IO uint16_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */ - uint16_t RESERVED2; /*!< Reserved, 0x16 */ + __IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */ + __IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */ __IO uint32_t BSRR; /*!< GPIO port bit set/reset registerBSRR, Address offset: 0x18 */ __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ __IO uint32_t AFR[2]; /*!< GPIO alternate function register, Address offset: 0x20-0x24 */ - __IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */ + __IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */ }GPIO_TypeDef; /** @@ -501,24 +496,15 @@ typedef struct typedef struct { - __IO uint16_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: 0x00 */ - uint16_t RESERVED0; /*!< Reserved, 0x02 */ - __IO uint16_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint16_t SR; /*!< SPI Status register, Address offset: 0x08 */ - uint16_t RESERVED2; /*!< Reserved, 0x0A */ - __IO uint16_t DR; /*!< SPI data register, Address offset: 0x0C */ - uint16_t RESERVED3; /*!< Reserved, 0x0E */ - __IO uint16_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */ - uint16_t RESERVED4; /*!< Reserved, 0x12 */ - __IO uint16_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S mode), Address offset: 0x14 */ - uint16_t RESERVED5; /*!< Reserved, 0x16 */ - __IO uint16_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S mode), Address offset: 0x18 */ - uint16_t RESERVED6; /*!< Reserved, 0x1A */ - __IO uint16_t I2SCFGR; /*!< SPI_I2S configuration register, Address offset: 0x1C */ - uint16_t RESERVED7; /*!< Reserved, 0x1E */ - __IO uint16_t I2SPR; /*!< SPI_I2S prescaler register, Address offset: 0x20 */ - uint16_t RESERVED8; /*!< Reserved, 0x22 */ + __IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset: 0x00 */ + __IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */ + __IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */ + __IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */ + __IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */ + __IO uint32_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S mode), Address offset: 0x14 */ + __IO uint32_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S mode), Address offset: 0x18 */ + __IO uint32_t I2SCFGR; /*!< SPI_I2S configuration register, Address offset: 0x1C */ + __IO uint32_t I2SPR; /*!< SPI_I2S prescaler register, Address offset: 0x20 */ } SPI_TypeDef; /** @@ -526,42 +512,27 @@ typedef struct */ typedef struct { - __IO uint16_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ - uint16_t RESERVED0; /*!< Reserved, 0x02 */ - __IO uint16_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint16_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ - uint16_t RESERVED2; /*!< Reserved, 0x0A */ - __IO uint16_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */ - uint16_t RESERVED3; /*!< Reserved, 0x0E */ - __IO uint16_t SR; /*!< TIM status register, Address offset: 0x10 */ - uint16_t RESERVED4; /*!< Reserved, 0x12 */ - __IO uint16_t EGR; /*!< TIM event generation register, Address offset: 0x14 */ - uint16_t RESERVED5; /*!< Reserved, 0x16 */ - __IO uint16_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ - uint16_t RESERVED6; /*!< Reserved, 0x1A */ - __IO uint16_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ - uint16_t RESERVED7; /*!< Reserved, 0x1E */ - __IO uint16_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */ - uint16_t RESERVED8; /*!< Reserved, 0x22 */ + __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ + __IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ + __IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ + __IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */ + __IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */ + __IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */ + __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ + __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ + __IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */ __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */ - __IO uint16_t PSC; /*!< TIM prescaler register, Address offset: 0x28 */ - uint16_t RESERVED10; /*!< Reserved, 0x2A */ + __IO uint32_t PSC; /*!< TIM prescaler register, Address offset: 0x28 */ __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */ - __IO uint16_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ - uint16_t RESERVED12; /*!< Reserved, 0x32 */ + __IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */ __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */ __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */ - __IO uint16_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ - uint16_t RESERVED17; /*!< Reserved, 0x26 */ - __IO uint16_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */ - uint16_t RESERVED18; /*!< Reserved, 0x4A */ - __IO uint16_t DMAR; /*!< TIM DMA address for full transfer register, Address offset: 0x4C */ - uint16_t RESERVED19; /*!< Reserved, 0x4E */ - __IO uint16_t OR; /*!< TIM option register, Address offset: 0x50 */ - uint16_t RESERVED20; /*!< Reserved, 0x52 */ + __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ + __IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */ + __IO uint32_t DMAR; /*!< TIM DMA address for full transfer register, Address offset: 0x4C */ + __IO uint32_t OR; /*!< TIM option register, Address offset: 0x50 */ } TIM_TypeDef; /** @@ -595,17 +566,13 @@ typedef struct __IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x04 */ __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ - __IO uint16_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */ - uint16_t RESERVED2; /*!< Reserved, 0x12 */ + __IO uint32_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */ __IO uint32_t RTOR; /*!< USART Receiver Time Out register, Address offset: 0x14 */ - __IO uint16_t RQR; /*!< USART Request register, Address offset: 0x18 */ - uint16_t RESERVED3; /*!< Reserved, 0x1A */ + __IO uint32_t RQR; /*!< USART Request register, Address offset: 0x18 */ __IO uint32_t ISR; /*!< USART Interrupt and status register, Address offset: 0x1C */ __IO uint32_t ICR; /*!< USART Interrupt flag Clear register, Address offset: 0x20 */ - __IO uint16_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */ - uint16_t RESERVED4; /*!< Reserved, 0x26 */ - __IO uint16_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */ - uint16_t RESERVED5; /*!< Reserved, 0x2A */ + __IO uint32_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */ + __IO uint32_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */ } USART_TypeDef; /** @@ -666,6 +633,9 @@ typedef struct */ #define FLASH_BASE ((uint32_t)0x08000000) /*!< FLASH base address in the alias region */ +#define FLASH_END ((uint32_t)0x0800FFFF) /*!< FLASH end address in the alias region */ +#define DATA_EEPROM_BASE ((uint32_t)0x08080000) /*! Date: Tue, 4 Nov 2014 11:13:51 +0100 Subject: [PATCH 3/4] [STM32L0] Remove useless files --- .../stm32l0xx_hal_conf_template.h | 292 ------------------ .../stm32l0xx_hal_msp_template.c | 133 -------- 2 files changed, 425 deletions(-) delete mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf_template.h delete mode 100644 libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_msp_template.c diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf_template.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf_template.h deleted file mode 100644 index f7d5ae83e0..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_conf_template.h +++ /dev/null @@ -1,292 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l0xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 18-June-2014 - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L0xx_HAL_CONF_H -#define __STM32L0xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_COMP_MODULE_ENABLED -#define HAL_CRC_MODULE_ENABLED -#define HAL_CRYP_MODULE_ENABLED -#define HAL_DAC_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -#define HAL_IWDG_MODULE_ENABLED -#define HAL_LCD_MODULE_ENABLED -#define HAL_LPTIM_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_TSC_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -#define HAL_IRDA_MODULE_ENABLED -#define HAL_SMARTCARD_MODULE_ENABLED -#define HAL_SMBUS_MODULE_ENABLED -#define HAL_WWDG_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)2000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)3) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define PREREAD_ENABLE 1 -#define BUFFER_CACHE_DISABLE 0 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l0xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l0xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l0xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l0xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l0xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l0xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l0xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l0xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l0xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l0xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l0xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32l0xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l0xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l0xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l0xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l0xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l0xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l0xx_hal_rtc.h" - -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l0xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l0xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l0xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l0xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l0xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l0xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l0xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l0xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l0xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l0xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L0xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_msp_template.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_msp_template.c deleted file mode 100644 index 10773316dc..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_msp_template.c +++ /dev/null @@ -1,133 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l0xx_hal_bsp_template.c - * @author MCD Application Team - * @version V1.1.0 - * @date 18-June-2014 - * @brief HAL BSP module. - * This file template is located in the HAL folder and should be copied - * to the user folder. - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - This file is generated automatically by MicroXplorer and eventually modified - by the user - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2014 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l0xx_hal.h" - -/** @addtogroup STM32L0xx_HAL_Driver - * @{ - */ - -/** @defgroup HAL_MSP - * @brief HAL MSP module. - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** @defgroup HAL_MSP_Private_Functions - * @{ - */ - -/** - * @brief Initializes the Global BSP. - * @param None - * @retval None - */ -void HAL_MspInit(void) -{ - /* NOTE : This function is generated automatically by STM32CubeMX and eventually - modified by the user - */ -} - -/** - * @brief DeInitializes the Global MSP. - * @param None - * @retval None - */ -void HAL_MspDeInit(void) -{ - /* NOTE : This function is generated automatically by STM32CubeMX and eventually - modified by the user - */ -} - -/** - * @brief Initializes the PPP MSP. - * @param None - * @retval None - */ -void HAL_PPP_MspInit(void) -{ - /* NOTE : This function is generated automatically by STM32CubeMX and eventually - modified by the user - */ -} - -/** - * @brief DeInitializes the PPP MSP. - * @param None - * @retval None - */ -void HAL_PPP_MspDeInit(void) -{ - /* NOTE : This function is generated automatically by STM32CubeMX and eventually - modified by the user - */ -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ From 340effa2c7dcdc3e58d3fe180eb437f8e8786f55 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 4 Nov 2014 11:16:17 +0100 Subject: [PATCH 4/4] [NUCLEO_L053R8] Update GPIO structures Due to latest registers map file used. --- .../targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/gpio_object.h | 4 ++-- .../targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/objects.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/gpio_object.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/gpio_object.h index 75013b4188..d731d97d05 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/gpio_object.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/gpio_object.h @@ -43,9 +43,9 @@ extern "C" { typedef struct { PinName pin; uint32_t mask; - __IO uint16_t *reg_in; + __IO uint32_t *reg_in; __IO uint32_t *reg_set; - __IO uint16_t *reg_clr; + __IO uint32_t *reg_clr; } gpio_t; static inline void gpio_write(gpio_t *obj, int value) { diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/objects.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/objects.h index b5065b6066..cb55880918 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/objects.h +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L053R8/objects.h @@ -50,8 +50,8 @@ struct port_s { PortName port; uint32_t mask; PinDirection direction; - __IO uint16_t *reg_in; - __IO uint16_t *reg_out; + __IO uint32_t *reg_in; + __IO uint32_t *reg_out; }; struct analogin_s {