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Revert "Dummy cycles count is not an init parameter, but a command parameter." 

This reverts commit f1ad089660.
pull/7783/head
adustm 2018-03-30 14:55:33 +02:00 committed by Maciej Bocianski
parent 2b234c2902
commit 0714ac350f
2 changed files with 15 additions and 14 deletions
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20
drivers/QSPI.cpp
View File

@ -39,6 +39,7 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin
_alt_width = QSPI_CFG_BUS_SINGLE; _alt_width = QSPI_CFG_BUS_SINGLE;
_alt_size = QSPI_CFG_ALT_SIZE_8; _alt_size = QSPI_CFG_ALT_SIZE_8;
_data_width = QSPI_CFG_BUS_SINGLE; _data_width = QSPI_CFG_BUS_SINGLE;
_num_dummy_cycles = 0;
_mode = mode; _mode = mode;
_hz = ONE_MHZ; _hz = ONE_MHZ;
_initialized = false; _initialized = false;
@ -58,6 +59,7 @@ qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width
_alt_width = alt_width; _alt_width = alt_width;
_alt_size = alt_size; _alt_size = alt_size;
_data_width = data_width; _data_width = data_width;
_num_dummy_cycles = dummy_cycles;
unlock(); unlock();
@ -97,7 +99,7 @@ qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_lengt
if (*rx_length != 0) { if (*rx_length != 0) {
lock(); lock();
if (true == _acquire()) { if (true == _acquire()) {
_build_qspi_command(-1, address, -1, 0); _build_qspi_command(-1, address, -1);
if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) { if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
ret_status = QSPI_STATUS_OK; ret_status = QSPI_STATUS_OK;
} }
@ -121,7 +123,7 @@ qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *t
if (*tx_length != 0) { if (*tx_length != 0) {
lock(); lock();
if (true == _acquire()) { if (true == _acquire()) {
_build_qspi_command(-1, address, -1, 0); _build_qspi_command(-1, address, -1);
if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) { if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
ret_status = QSPI_STATUS_OK; ret_status = QSPI_STATUS_OK;
} }
@ -136,7 +138,7 @@ qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *t
return ret_status; return ret_status;
} }
qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int dummy_cnt, unsigned int address, char *rx_buffer, size_t *rx_length) qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned int address, char *rx_buffer, size_t *rx_length)
{ {
qspi_status_t ret_status = QSPI_STATUS_ERROR; qspi_status_t ret_status = QSPI_STATUS_ERROR;
@ -145,7 +147,7 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned in
if (*rx_length != 0) { if (*rx_length != 0) {
lock(); lock();
if ( true == _acquire()) { if ( true == _acquire()) {
_build_qspi_command(instruction, address, alt, dummy_cnt); _build_qspi_command(instruction, address, alt);
if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) { if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
ret_status = QSPI_STATUS_OK; ret_status = QSPI_STATUS_OK;
} }
@ -160,7 +162,7 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int alt, unsigned in
return ret_status; return ret_status;
} }
qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int dummy_cnt, unsigned int address, const char *tx_buffer, size_t *tx_length) qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned int address, const char *tx_buffer, size_t *tx_length)
{ {
qspi_status_t ret_status = QSPI_STATUS_ERROR; qspi_status_t ret_status = QSPI_STATUS_ERROR;
@ -169,7 +171,7 @@ qspi_status_t QSPI::write(unsigned int instruction, unsigned int alt, unsigned i
if (*tx_length != 0) { if (*tx_length != 0) {
lock(); lock();
if (true == _acquire()) { if (true == _acquire()) {
_build_qspi_command(instruction, address, alt, dummy_cnt); _build_qspi_command(instruction, address, alt);
if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) { if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
ret_status = QSPI_STATUS_OK; ret_status = QSPI_STATUS_OK;
} }
@ -191,7 +193,7 @@ qspi_status_t QSPI::command_transfer(unsigned int instruction, int address, cons
if (_initialized) { if (_initialized) {
lock(); lock();
if (true == _acquire()) { if (true == _acquire()) {
_build_qspi_command(instruction, address, -1, 0); //We just need the command _build_qspi_command(instruction, address, -1); //We just need the command
if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) { if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) {
ret_status = QSPI_STATUS_OK; ret_status = QSPI_STATUS_OK;
} }
@ -240,7 +242,7 @@ bool QSPI::_acquire()
return _initialized; return _initialized;
} }
void QSPI::_build_qspi_command(int instruction, int address, int alt, int dummy_cnt) void QSPI::_build_qspi_command(int instruction, int address, int alt)
{ {
memset( &_qspi_command, 0, sizeof(qspi_command_t) ); memset( &_qspi_command, 0, sizeof(qspi_command_t) );
//Set up instruction phase parameters //Set up instruction phase parameters
@ -272,7 +274,7 @@ void QSPI::_build_qspi_command(int instruction, int address, int alt, int dummy_
_qspi_command.alt.disabled = true; _qspi_command.alt.disabled = true;
} }
_qspi_command.dummy_count = dummy_cnt; _qspi_command.dummy_count = _num_dummy_cycles;
//Set up bus width for data phase //Set up bus width for data phase
_qspi_command.data.bus_width = _data_width; _qspi_command.data.bus_width = _data_width;

9
drivers/QSPI.h
View File

@ -135,7 +135,6 @@ public:
* *
* @param instruction Instruction value to be used in instruction phase * @param instruction Instruction value to be used in instruction phase
* @param alt Alt value to be used in instruction phase * @param alt Alt value to be used in instruction phase
* @param dummy_cnt Amount of dummy cycles to be sent after instruction phase
* @param address Address to be accessed in QSPI peripheral * @param address Address to be accessed in QSPI peripheral
* @param rx_buffer Buffer for data to be read from the peripheral * @param rx_buffer Buffer for data to be read from the peripheral
* @param rx_length Pointer to a variable containing the length of rx_buffer, and on return this variable will be updated with the actual number of bytes read * @param rx_length Pointer to a variable containing the length of rx_buffer, and on return this variable will be updated with the actual number of bytes read
@ -143,13 +142,12 @@ public:
* @returns * @returns
* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
*/ */
qspi_status_t read(unsigned int instruction, unsigned int alt, unsigned int dummy_cnt, unsigned int address, char *rx_buffer, size_t *rx_length); qspi_status_t read(unsigned int instruction, unsigned int alt, unsigned int address, char *rx_buffer, size_t *rx_length);
/** Write to QSPI peripheral using custom write instruction, alt values /** Write to QSPI peripheral using custom write instruction, alt values
* *
* @param instruction Instruction value to be used in instruction phase * @param instruction Instruction value to be used in instruction phase
* @param alt Alt value to be used in instruction phase * @param alt Alt value to be used in instruction phase
* @param dummy_cnt Amount of dummy cycles to be sent after instruction phase
* @param address Address to be accessed in QSPI peripheral * @param address Address to be accessed in QSPI peripheral
* @param tx_buffer Buffer containing data to be sent to peripheral * @param tx_buffer Buffer containing data to be sent to peripheral
* @param tx_length Pointer to a variable containing the length of data to be transmitted, and on return this variable will be updated with the actual number of bytes written * @param tx_length Pointer to a variable containing the length of data to be transmitted, and on return this variable will be updated with the actual number of bytes written
@ -157,7 +155,7 @@ public:
* @returns * @returns
* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
*/ */
qspi_status_t write(unsigned int instruction, unsigned int alt, unsigned int dummy_cnt, unsigned int address, const char *tx_buffer, size_t *tx_length); qspi_status_t write(unsigned int instruction, unsigned int alt, unsigned int address, const char *tx_buffer, size_t *tx_length);
/** Perform a transaction to write to an address(a control register) and get the status results /** Perform a transaction to write to an address(a control register) and get the status results
* *
@ -198,6 +196,7 @@ protected:
qspi_alt_size_t _alt_size; qspi_alt_size_t _alt_size;
qspi_bus_width_t _data_width; //Bus width for Data phase qspi_bus_width_t _data_width; //Bus width for Data phase
qspi_command_t _qspi_command; //QSPI Hal command struct qspi_command_t _qspi_command; //QSPI Hal command struct
unsigned int _num_dummy_cycles; //Number of dummy cycles to be used
int _hz; //Bus Frequency int _hz; //Bus Frequency
int _mode; //SPI mode int _mode; //SPI mode
bool _initialized; bool _initialized;
@ -213,7 +212,7 @@ private:
/* /*
* This function builds the qspi command struct to be send to Hal * This function builds the qspi command struct to be send to Hal
*/ */
inline void _build_qspi_command(int instruction, int address, int alt, int dummy_cnt); inline void _build_qspi_command(int instruction, int address, int alt);
}; };
} // namespace mbed } // namespace mbed