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STM32L4 USB pins addition

pull/11675/head
jeromecoutant 2019-09-06 17:18:43 +02:00
parent 2c03f3a61e
commit 03dd8d3e22
29 changed files with 193 additions and 26 deletions
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4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralNames.h
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@ -76,6 +76,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE, QSPI_1 = (int)QSPI_R_BASE,
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

9
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralPins.c
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@ -236,3 +236,12 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
// {PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to STDIO_UART_TX // {PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to STDIO_UART_TX
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE
{NC, NC, 0}
};

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralNames.h
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@ -81,6 +81,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE, QSPI_1 = (int)QSPI_R_BASE,
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

10
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralPins.c
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@ -293,3 +293,13 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE
{NC, NC, 0}
};

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h
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@ -216,8 +216,8 @@ typedef enum {
/**** USB pins ****/ /**** USB pins ****/
USB_DM = PA_11, USB_DM = PA_11,
USB_DP = PA_12, USB_DP = PA_12,
USB_NOE = PC_9, USB_NOE = PA_13,
USB_NOE_ALT0 = PA_13, USB_NOE_ALT0 = PC_9,
/**** OSCILLATOR pins ****/ /**** OSCILLATOR pins ****/
RCC_OSC32_IN = PC_14, RCC_OSC32_IN = PC_14,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE, QSPI_1 = (int)QSPI_R_BASE,
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c
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@ -378,3 +378,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QUADSPI_NCS [MX25R6435F_SCLK] {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QUADSPI_NCS [MX25R6435F_SCLK]
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to SPBTLE_RF_RST
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTG_FS_VBUS [STMPS2141STR_OUT]
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTG_FS_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTG_FS_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to LED3_WIFI_ LED4_BLE
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h
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@ -241,12 +241,12 @@ typedef enum {
SPI_CS = D10, SPI_CS = D10,
PWM_OUT = D9, PWM_OUT = D9,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE, QSPI_1 = (int)QSPI_R_BASE,
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c
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@ -378,3 +378,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QSPI_CS [N25Q128A13EF840E_S\#] {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QSPI_CS [N25Q128A13EF840E_S\#]
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to COM0 [GH08172T_COM0]
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to COM1 [GH08172T_COM1]
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to COM2 [GH08172T_COM2]
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to OTG_FS_DM [EMIF02-USB03F2_D-out]
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to OTG_FS_DP [EMIF02-USB03F2_D+out]
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to OTG_FS_PowerSwitchOn [STMPS2141STR_EN]
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h
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@ -225,12 +225,12 @@ typedef enum {
SPI_CS = PA_4, SPI_CS = PA_4,
PWM_OUT = PB_3, PWM_OUT = PB_3,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE QSPI_1 = (int)QSPI_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralPins.c
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@ -337,3 +337,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PinNames.h
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@ -210,12 +210,12 @@ typedef enum {
SPI_CS = PB_6, SPI_CS = PB_6,
PWM_OUT = PB_3, PWM_OUT = PB_3,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE QSPI_1 = (int)QSPI_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralPins.c
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@ -337,3 +337,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PinNames.h
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@ -210,12 +210,12 @@ typedef enum {
SPI_CS = PB_6, SPI_CS = PB_6,
PWM_OUT = PB_3, PWM_OUT = PB_3,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralNames.h
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@ -90,6 +90,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE QSPI_1 = (int)QSPI_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c
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@ -462,3 +462,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to D8 [D8_IS66WV51216EBLL] {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to D8 [D8_IS66WV51216EBLL]
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to DCMI_CLK
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTGFS_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTGFS_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTGFS_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTGFS_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to uSD_D1
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h
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@ -303,14 +303,14 @@ typedef enum {
SPI_CS = D10, SPI_CS = D10,
PWM_OUT = D9, PWM_OUT = D9,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PA_13, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_14, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_SOF_ALT0 = PA_8, USB_OTG_FS_SOF_ALT0 = PA_14,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
/**** OSCILLATOR pins ****/ /**** OSCILLATOR pins ****/

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h
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@ -90,6 +90,10 @@ typedef enum {
QSPI_1 = (int)QSPI_R_BASE QSPI_1 = (int)QSPI_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralPins.c
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@ -454,3 +454,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1]
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h
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@ -279,12 +279,12 @@ typedef enum {
SPI_CS = D10, SPI_CS = D10,
PWM_OUT = D9, PWM_OUT = D9,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_SOF_ALT0 = PA_14,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_2 = (int)OCTOSPI2_R_BASE QSPI_2 = (int)OCTOSPI2_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c
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@ -430,3 +430,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PG_12, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS {PG_12, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1]
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PinNames.h
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@ -281,12 +281,12 @@ typedef enum {
SPI_CS = D10, SPI_CS = D10,
PWM_OUT = D9, PWM_OUT = D9,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PC_9, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_SOF_ALT0 = PA_14,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,

4
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralNames.h
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@ -88,6 +88,10 @@ typedef enum {
QSPI_2 = (int)OCTOSPI2_R_BASE QSPI_2 = (int)OCTOSPI2_R_BASE
} QSPIName; } QSPIName;
typedef enum {
USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
} USBName;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralPins.c
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@ -446,3 +446,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
{PI_5, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS // Connected to DCMI_VSYNC {PI_5, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS // Connected to DCMI_VSYNC
{NC, NC, 0} {NC, NC, 0}
}; };
//*** USBDEVICE ***
MBED_WEAK const PinMap PinMap_USB_FS[] = {
// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
{PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTGFS_VBUS
{PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTGFS_ID
{PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTGFS_DM
{PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP
// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE
// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to uSD_D1
{NC, NC, 0}
};

6
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PinNames.h
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@ -314,14 +314,14 @@ typedef enum {
SPI_CS = D10, SPI_CS = D10,
PWM_OUT = D9, PWM_OUT = D9,
/**** USB pins ****/ /**** USB FS pins ****/
USB_OTG_FS_DM = PA_11, USB_OTG_FS_DM = PA_11,
USB_OTG_FS_DP = PA_12, USB_OTG_FS_DP = PA_12,
USB_OTG_FS_ID = PA_10, USB_OTG_FS_ID = PA_10,
USB_OTG_FS_NOE = PA_13, USB_OTG_FS_NOE = PA_13,
USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_NOE_ALT0 = PC_9,
USB_OTG_FS_SOF = PA_14, USB_OTG_FS_SOF = PA_8,
USB_OTG_FS_SOF_ALT0 = PA_8, USB_OTG_FS_SOF_ALT0 = PA_14,
USB_OTG_FS_VBUS = PA_9, USB_OTG_FS_VBUS = PA_9,
/**** OSCILLATOR pins ****/ /**** OSCILLATOR pins ****/