mirror of https://github.com/ARMmbed/mbed-os.git
HAL : [LPC824] Fix SPI1 SWM table
- Fix SPI ch1 switch matrix table value - detected by SPI_MASTER test case - Add LPC824 pinout for some test cases - [LPC824] spi_api.c code refactoringpull/575/head
parent
36a8882a54
commit
03482e329d
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@ -24,22 +24,22 @@
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static const SWM_Map SWM_SPI_SSEL[] = {
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static const SWM_Map SWM_SPI_SSEL[] = {
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{4, 16},
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{4, 16},
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{5, 16},
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{6, 8},
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};
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};
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static const SWM_Map SWM_SPI_SCLK[] = {
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static const SWM_Map SWM_SPI_SCLK[] = {
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{3, 24},
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{3, 24},
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{4, 24},
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{5, 16},
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};
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};
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static const SWM_Map SWM_SPI_MOSI[] = {
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static const SWM_Map SWM_SPI_MOSI[] = {
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{4, 0},
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{4, 0},
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{5, 0},
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{5, 24},
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};
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};
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static const SWM_Map SWM_SPI_MISO[] = {
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static const SWM_Map SWM_SPI_MISO[] = {
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{4, 8},
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{4, 8},
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{5, 16},
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{6, 0},
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};
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};
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// bit flags for used SPIs
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// bit flags for used SPIs
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@ -55,8 +55,8 @@ static int get_available_spi(void)
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return -1;
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return -1;
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}
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}
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static inline int ssp_disable(spi_t *obj);
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static inline void spi_disable(spi_t *obj);
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static inline int ssp_enable(spi_t *obj);
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static inline void spi_enable(spi_t *obj);
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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{
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@ -104,7 +104,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
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LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
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// set default format and frequency
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// set default format and frequency
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if (ssel == NC) {
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if (ssel == (PinName)NC) {
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spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
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spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
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} else {
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} else {
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spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
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spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
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@ -113,7 +113,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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obj->spi->DLY = 2; // 2 SPI clock times pre-delay
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obj->spi->DLY = 2; // 2 SPI clock times pre-delay
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// enable the ssp channel
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// enable the ssp channel
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ssp_enable(obj);
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spi_enable(obj);
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}
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}
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void spi_free(spi_t *obj)
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void spi_free(spi_t *obj)
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@ -123,92 +123,87 @@ void spi_free(spi_t *obj)
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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{
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MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
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MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
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ssp_disable(obj);
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spi_disable(obj);
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obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
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obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
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obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
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obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
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obj->spi->TXDATCTL &= ~( 0xF << 24);
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obj->spi->TXCTL &= ~( 0xF << 24);
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obj->spi->TXDATCTL |= (((bits & 0xF) - 1) << 24);
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obj->spi->TXCTL |= ((bits - 1) << 24);
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ssp_enable(obj);
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spi_enable(obj);
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}
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}
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void spi_frequency(spi_t *obj, int hz)
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void spi_frequency(spi_t *obj, int hz)
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{
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{
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ssp_disable(obj);
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spi_disable(obj);
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// rise DIV value if it cannot be divided
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// rise DIV value if it cannot be divided
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obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
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obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
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ssp_enable(obj);
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spi_enable(obj);
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}
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}
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static inline int ssp_disable(spi_t *obj)
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static inline void spi_disable(spi_t *obj)
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{
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{
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return obj->spi->CFG &= ~(1 << 0);
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obj->spi->CFG &= ~(1 << 0);
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}
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}
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static inline int ssp_enable(spi_t *obj)
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static inline void spi_enable(spi_t *obj)
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{
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{
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return obj->spi->CFG |= (1 << 0);
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obj->spi->CFG |= (1 << 0);
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}
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}
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static inline int ssp_readable(spi_t *obj)
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static inline int spi_readable(spi_t *obj)
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{
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{
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return obj->spi->STAT & (1 << 0);
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return obj->spi->STAT & (1 << 0);
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}
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}
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static inline int ssp_writeable(spi_t *obj)
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static inline int spi_writeable(spi_t *obj)
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{
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{
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return obj->spi->STAT & (1 << 1);
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return obj->spi->STAT & (1 << 1);
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}
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}
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static inline void ssp_write(spi_t *obj, int value)
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static inline void spi_write(spi_t *obj, int value)
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{
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{
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while (!ssp_writeable(obj));
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while (!spi_writeable(obj));
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// end of transfer
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// end of transfer
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obj->spi->TXDATCTL |= (1 << 20);
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obj->spi->TXCTL |= (1 << 20);
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obj->spi->TXDAT = value;
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obj->spi->TXDAT = (value & 0xffff);
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}
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}
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static inline int ssp_read(spi_t *obj)
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static inline int spi_read(spi_t *obj)
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{
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{
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while (!ssp_readable(obj));
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while (!spi_readable(obj));
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return obj->spi->RXDAT;
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return (obj->spi->RXDAT & 0xFFFF);
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}
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}
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static inline int ssp_busy(spi_t *obj)
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int spi_master_write(spi_t *obj, int value)
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{
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spi_write(obj, value);
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return spi_read(obj);
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}
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static inline int spi_busy(spi_t *obj)
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{
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{
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// checking RXOV(Receiver Overrun interrupt flag)
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// checking RXOV(Receiver Overrun interrupt flag)
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return obj->spi->STAT & (1 << 2);
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return obj->spi->STAT & (1 << 2);
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}
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}
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int spi_master_write(spi_t *obj, int value)
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{
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ssp_write(obj, value);
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return ssp_read(obj);
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}
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int spi_slave_receive(spi_t *obj)
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int spi_slave_receive(spi_t *obj)
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{
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{
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return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
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return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
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}
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}
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int spi_slave_read(spi_t *obj)
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int spi_slave_read(spi_t *obj)
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{
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{
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return obj->spi->RXDAT;
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return (obj->spi->RXDAT & 0xFFFF);
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}
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}
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void spi_slave_write(spi_t *obj, int value)
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void spi_slave_write(spi_t *obj, int value)
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{
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{
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while (ssp_writeable(obj) == 0);
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while (spi_writeable(obj) == 0);
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obj->spi->TXDAT = value;
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obj->spi->TXDAT = value;
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}
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}
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int spi_busy(spi_t *obj)
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{
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return ssp_busy(obj);
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}
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#endif
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#endif
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@ -49,7 +49,8 @@ I2C i2c(P0_23, P0_22);
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_L053R8) || \
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defined(TARGET_NUCLEO_L053R8) || \
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defined(TARGET_NUCLEO_L152RE)
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defined(TARGET_NUCLEO_L152RE) || \
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defined(TARGET_FF_ARDUINO)
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I2C i2c(I2C_SDA, I2C_SCL);
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I2C i2c(I2C_SDA, I2C_SCL);
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#elif defined(TARGET_LPC11U68)
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#elif defined(TARGET_LPC11U68)
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@ -8,6 +8,8 @@
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I2C i2c(PTE0, PTE1);
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I2C i2c(PTE0, PTE1);
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#elif defined(TARGET_nRF51822)
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#elif defined(TARGET_nRF51822)
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I2C i2c(p22,p20);
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I2C i2c(p22,p20);
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#elif defined(TARGET_FF_ARDUINO)
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I2C i2c(I2C_SDA, I2C_SCL);
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#else
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#else
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I2C i2c(p28, p27);
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I2C i2c(p28, p27);
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#endif
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#endif
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@ -16,7 +16,8 @@
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defined(TARGET_NUCLEO_L152RE)
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defined(TARGET_NUCLEO_L152RE)
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#define TEST_LED D3
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#define TEST_LED D3
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#elif defined (TARGET_K22F)
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#elif defined (TARGET_K22F) || \
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defined (TARGET_LPC824)
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#define TEST_LED LED_GREEN
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#define TEST_LED LED_GREEN
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#else
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#else
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@ -10,6 +10,9 @@ DigitalOut cs(PTB1);
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#elif defined(TARGET_KL46Z)
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#elif defined(TARGET_KL46Z)
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SPI spi(PTD2, PTD3, PTD1); // mosi, miso, sclk
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SPI spi(PTD2, PTD3, PTD1); // mosi, miso, sclk
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DigitalOut cs(PTA13);
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DigitalOut cs(PTA13);
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#elif defined(TARGET_FF_ARDUINO)
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SPI spi(D11, D12, D13); // mosi, miso, sclk
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DigitalOut cs(D10);
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#else
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#else
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SPI spi(p5, p6, p7); // mosi, miso, sclk
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SPI spi(p5, p6, p7); // mosi, miso, sclk
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DigitalOut cs(p8);
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DigitalOut cs(p8);
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@ -6,6 +6,8 @@ SPISlave device(PTD2, PTD3, PTD1, PTD0); // mosi, miso, sclk, ssel
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SPISlave device(p12, p13, p15, p14); // mosi, miso, sclk, ssel
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SPISlave device(p12, p13, p15, p14); // mosi, miso, sclk, ssel
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#elif defined(TARGET_LPC812)
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#elif defined(TARGET_LPC812)
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SPISlave device(P0_14, P0_15, P0_12, P0_13); // mosi, miso, sclk, ssel
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SPISlave device(P0_14, P0_15, P0_12, P0_13); // mosi, miso, sclk, ssel
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#elif defined(TARGET_FF_ARDUINO)
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SPISlave device(D11, D12, D13, D10); // mosi, miso, sclk, ssel
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#else
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#else
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SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
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SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
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#endif
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#endif
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