HAL : [LPC824] Fix SPI1 SWM table

- Fix SPI ch1 switch matrix table value - detected by SPI_MASTER test
case
- Add LPC824 pinout for some test cases
- [LPC824] spi_api.c code refactoring
pull/575/head
Toyomasa Watarai 2014-10-17 19:16:37 +09:00
parent 36a8882a54
commit 03482e329d
6 changed files with 48 additions and 44 deletions

View File

@ -24,22 +24,22 @@
static const SWM_Map SWM_SPI_SSEL[] = { static const SWM_Map SWM_SPI_SSEL[] = {
{4, 16}, {4, 16},
{5, 16}, {6, 8},
}; };
static const SWM_Map SWM_SPI_SCLK[] = { static const SWM_Map SWM_SPI_SCLK[] = {
{3, 24}, {3, 24},
{4, 24}, {5, 16},
}; };
static const SWM_Map SWM_SPI_MOSI[] = { static const SWM_Map SWM_SPI_MOSI[] = {
{4, 0}, {4, 0},
{5, 0}, {5, 24},
}; };
static const SWM_Map SWM_SPI_MISO[] = { static const SWM_Map SWM_SPI_MISO[] = {
{4, 8}, {4, 8},
{5, 16}, {6, 0},
}; };
// bit flags for used SPIs // bit flags for used SPIs
@ -55,8 +55,8 @@ static int get_available_spi(void)
return -1; return -1;
} }
static inline int ssp_disable(spi_t *obj); static inline void spi_disable(spi_t *obj);
static inline int ssp_enable(spi_t *obj); static inline void spi_enable(spi_t *obj);
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
{ {
@ -104,7 +104,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n); LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
// set default format and frequency // set default format and frequency
if (ssel == NC) { if (ssel == (PinName)NC) {
spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
} else { } else {
spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
@ -113,7 +113,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
obj->spi->DLY = 2; // 2 SPI clock times pre-delay obj->spi->DLY = 2; // 2 SPI clock times pre-delay
// enable the ssp channel // enable the ssp channel
ssp_enable(obj); spi_enable(obj);
} }
void spi_free(spi_t *obj) void spi_free(spi_t *obj)
@ -123,92 +123,87 @@ void spi_free(spi_t *obj)
void spi_format(spi_t *obj, int bits, int mode, int slave) void spi_format(spi_t *obj, int bits, int mode, int slave)
{ {
MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3))); MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
ssp_disable(obj); spi_disable(obj);
obj->spi->CFG &= ~((0x3 << 4) | (1 << 2)); obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2); obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
obj->spi->TXDATCTL &= ~( 0xF << 24); obj->spi->TXCTL &= ~( 0xF << 24);
obj->spi->TXDATCTL |= (((bits & 0xF) - 1) << 24); obj->spi->TXCTL |= ((bits - 1) << 24);
ssp_enable(obj); spi_enable(obj);
} }
void spi_frequency(spi_t *obj, int hz) void spi_frequency(spi_t *obj, int hz)
{ {
ssp_disable(obj); spi_disable(obj);
// rise DIV value if it cannot be divided // rise DIV value if it cannot be divided
obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1; obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
ssp_enable(obj); spi_enable(obj);
} }
static inline int ssp_disable(spi_t *obj) static inline void spi_disable(spi_t *obj)
{ {
return obj->spi->CFG &= ~(1 << 0); obj->spi->CFG &= ~(1 << 0);
} }
static inline int ssp_enable(spi_t *obj) static inline void spi_enable(spi_t *obj)
{ {
return obj->spi->CFG |= (1 << 0); obj->spi->CFG |= (1 << 0);
} }
static inline int ssp_readable(spi_t *obj) static inline int spi_readable(spi_t *obj)
{ {
return obj->spi->STAT & (1 << 0); return obj->spi->STAT & (1 << 0);
} }
static inline int ssp_writeable(spi_t *obj) static inline int spi_writeable(spi_t *obj)
{ {
return obj->spi->STAT & (1 << 1); return obj->spi->STAT & (1 << 1);
} }
static inline void ssp_write(spi_t *obj, int value) static inline void spi_write(spi_t *obj, int value)
{ {
while (!ssp_writeable(obj)); while (!spi_writeable(obj));
// end of transfer // end of transfer
obj->spi->TXDATCTL |= (1 << 20); obj->spi->TXCTL |= (1 << 20);
obj->spi->TXDAT = value; obj->spi->TXDAT = (value & 0xffff);
} }
static inline int ssp_read(spi_t *obj) static inline int spi_read(spi_t *obj)
{ {
while (!ssp_readable(obj)); while (!spi_readable(obj));
return obj->spi->RXDAT; return (obj->spi->RXDAT & 0xFFFF);
} }
static inline int ssp_busy(spi_t *obj) int spi_master_write(spi_t *obj, int value)
{
spi_write(obj, value);
return spi_read(obj);
}
static inline int spi_busy(spi_t *obj)
{ {
// checking RXOV(Receiver Overrun interrupt flag) // checking RXOV(Receiver Overrun interrupt flag)
return obj->spi->STAT & (1 << 2); return obj->spi->STAT & (1 << 2);
} }
int spi_master_write(spi_t *obj, int value)
{
ssp_write(obj, value);
return ssp_read(obj);
}
int spi_slave_receive(spi_t *obj) int spi_slave_receive(spi_t *obj)
{ {
return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0); return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
} }
int spi_slave_read(spi_t *obj) int spi_slave_read(spi_t *obj)
{ {
return obj->spi->RXDAT; return (obj->spi->RXDAT & 0xFFFF);
} }
void spi_slave_write(spi_t *obj, int value) void spi_slave_write(spi_t *obj, int value)
{ {
while (ssp_writeable(obj) == 0); while (spi_writeable(obj) == 0);
obj->spi->TXDAT = value; obj->spi->TXDAT = value;
} }
int spi_busy(spi_t *obj)
{
return ssp_busy(obj);
}
#endif #endif

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@ -49,7 +49,8 @@ I2C i2c(P0_23, P0_22);
defined(TARGET_NUCLEO_F401RE) || \ defined(TARGET_NUCLEO_F401RE) || \
defined(TARGET_NUCLEO_F411RE) || \ defined(TARGET_NUCLEO_F411RE) || \
defined(TARGET_NUCLEO_L053R8) || \ defined(TARGET_NUCLEO_L053R8) || \
defined(TARGET_NUCLEO_L152RE) defined(TARGET_NUCLEO_L152RE) || \
defined(TARGET_FF_ARDUINO)
I2C i2c(I2C_SDA, I2C_SCL); I2C i2c(I2C_SDA, I2C_SCL);
#elif defined(TARGET_LPC11U68) #elif defined(TARGET_LPC11U68)

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@ -8,6 +8,8 @@
I2C i2c(PTE0, PTE1); I2C i2c(PTE0, PTE1);
#elif defined(TARGET_nRF51822) #elif defined(TARGET_nRF51822)
I2C i2c(p22,p20); I2C i2c(p22,p20);
#elif defined(TARGET_FF_ARDUINO)
I2C i2c(I2C_SDA, I2C_SCL);
#else #else
I2C i2c(p28, p27); I2C i2c(p28, p27);
#endif #endif

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@ -16,7 +16,8 @@
defined(TARGET_NUCLEO_L152RE) defined(TARGET_NUCLEO_L152RE)
#define TEST_LED D3 #define TEST_LED D3
#elif defined (TARGET_K22F) #elif defined (TARGET_K22F) || \
defined (TARGET_LPC824)
#define TEST_LED LED_GREEN #define TEST_LED LED_GREEN
#else #else

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@ -10,6 +10,9 @@ DigitalOut cs(PTB1);
#elif defined(TARGET_KL46Z) #elif defined(TARGET_KL46Z)
SPI spi(PTD2, PTD3, PTD1); // mosi, miso, sclk SPI spi(PTD2, PTD3, PTD1); // mosi, miso, sclk
DigitalOut cs(PTA13); DigitalOut cs(PTA13);
#elif defined(TARGET_FF_ARDUINO)
SPI spi(D11, D12, D13); // mosi, miso, sclk
DigitalOut cs(D10);
#else #else
SPI spi(p5, p6, p7); // mosi, miso, sclk SPI spi(p5, p6, p7); // mosi, miso, sclk
DigitalOut cs(p8); DigitalOut cs(p8);

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@ -6,6 +6,8 @@ SPISlave device(PTD2, PTD3, PTD1, PTD0); // mosi, miso, sclk, ssel
SPISlave device(p12, p13, p15, p14); // mosi, miso, sclk, ssel SPISlave device(p12, p13, p15, p14); // mosi, miso, sclk, ssel
#elif defined(TARGET_LPC812) #elif defined(TARGET_LPC812)
SPISlave device(P0_14, P0_15, P0_12, P0_13); // mosi, miso, sclk, ssel SPISlave device(P0_14, P0_15, P0_12, P0_13); // mosi, miso, sclk, ssel
#elif defined(TARGET_FF_ARDUINO)
SPISlave device(D11, D12, D13, D10); // mosi, miso, sclk, ssel
#else #else
SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
#endif #endif