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Remove unavailable and EOLed target boards - Ambiq (#290)

pull/15530/head
Jamie Smith 2024-06-21 01:16:10 -07:00 committed by GitHub
parent 65519018b0
commit 02623ff442
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15 changed files with 0 additions and 6571 deletions
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7
.github/pull_request_template.md vendored
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@ -51,11 +51,4 @@
[] Tests / results supplied as part of this PR
----------------------------------------------------------------------------------------------------------------
### Reviewers <!-- Optional -->
<!--
Request additional reviewers with @username or @team
-->
----------------------------------------------------------------------------------------------------------------

2
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/CMakeLists.txt
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@ -10,8 +10,6 @@ add_subdirectory(TARGET_SFE_ARTEMIS_DK EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_SFE_ARTEMIS_MODULE EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_SFE_ARTEMIS_NANO EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_SFE_ARTEMIS_THING_PLUS EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_SFE_EDGE EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_SFE_EDGE2 EXCLUDE_FROM_ALL)
add_library(mbed-apollo3 INTERFACE)

18
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/CMakeLists.txt
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@ -1,18 +0,0 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_library(mbed-sfe-edge INTERFACE)
target_include_directories(mbed-sfe-edge
INTERFACE
.
bsp
)
target_sources(mbed-sfe-edge
INTERFACE
bsp/am_bsp.c
bsp/am_bsp_pins.c
)
target_link_libraries(mbed-sfe-edge INTERFACE mbed-apollo3)

101
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/PinNames.h
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@ -1,101 +0,0 @@
/*
* Copyright (c) 2019-2020 SparkFun Electronics
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* MBED TARGET LIST: SFE_EDGE */
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "am_bsp.h"
#include "objects_gpio.h"
#ifdef __cplusplus
extern "C"
{
#endif
#define NC_VAL (int)0xFFFFFFFF
typedef enum
{
// Digital naming
D1 = 1,
D38 = 38,
D36 = 36,
D3 = 3,
// // Analog naming
// No analog pins
// mbed buttons
BUTTON1 = AM_BSP_GPIO_BUTTON0,
// LEDs
LED_RED = AM_BSP_GPIO_LED_RED,
LED_BLUE = AM_BSP_GPIO_LED_BLUE,
LED_GREEN = AM_BSP_GPIO_LED_GREEN,
LED_YELLOW = AM_BSP_GPIO_LED_YELLOW,
// mbed original LED naming
LED1 = AM_BSP_GPIO_LED0,
LED2 = AM_BSP_GPIO_LED1,
LED3 = AM_BSP_GPIO_LED2,
LED4 = AM_BSP_GPIO_LED3,
// I2C
I2C_SCL = AM_BSP_QWIIC_I2C_SCL_PIN,
I2C_SDA = AM_BSP_QWIIC_I2C_SDA_PIN,
// Qwiic
QWIIC_SCL = I2C_SCL,
QWIIC_SDA = I2C_SDA,
// SPI
// The SFE_EDGE does not expose a complete IOM peripheral for SPI
// UART
SERIAL_TX = AM_BSP_PRIM_UART_TX_PIN,
SERIAL_RX = AM_BSP_PRIM_UART_RX_PIN,
CONSOLE_TX = SERIAL_TX,
CONSOLE_RX = SERIAL_RX,
// Not connected
NC = NC_VAL
} PinName;
#if defined(MBED_CONF_TARGET_STDIO_UART_TX)
#define STDIO_UART_TX MBED_CONF_TARGET_STDIO_UART_TX
#else
#define STDIO_UART_TX CONSOLE_TX
#endif
#if defined(MBED_CONF_TARGET_STDIO_UART_RX)
#define STDIO_UART_RX MBED_CONF_TARGET_STDIO_UART_RX
#else
#define STDIO_UART_RX CONSOLE_RX
#endif
#ifdef __cplusplus
}
#endif
#endif

1066
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/bsp/am_bsp.c
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290
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/bsp/am_bsp.h
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@ -1,290 +0,0 @@
//*****************************************************************************
//
// am_bsp.h
//! @file
//!
//! @brief Functions to aid with configuring the GPIOs.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
//
//*****************************************************************************
// SPDX-License-Identifier: BSD-3-Clause
#ifndef AM_BSP_H
#define AM_BSP_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#include "am_bsp_pins.h"
//
// Make individual includes to not require full port before usage.
//#include "am_devices.h"
//
#include "am_devices_led.h"
#include "am_devices_button.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Begin User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// Camera
//
//*****************************************************************************
#define AM_BSP_CAMERA_HM01B0_MCLK_PIN 13
#define AM_BSP_CAMERA_HM01B0_I2C_IOM 1
#define AM_BSP_CAMERA_HM01B0_I2C_SDA_PIN AM_BSP_GPIO_IOM1_SDA
#define AM_BSP_CAMERA_HM01B0_I2C_SCL_PIN AM_BSP_GPIO_IOM1_SCL
#define g_AM_BSP_CAMERA_HM01B0_I2C_SDA g_AM_BSP_GPIO_IOM1_SDA
#define g_AM_BSP_CAMERA_HM01B0_I2C_SCL g_AM_BSP_GPIO_IOM1_SCL
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_MOD 0
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_SEG AM_HAL_CTIMER_TIMERB
//*****************************************************************************
//
// Accelerometer.
//
//*****************************************************************************
#define AM_BSP_ACCELEROMETER_I2C_IOM 3
#define AM_BSP_ACCELEROMETER_I2C_ADDRESS 0x19
#define AM_BSP_ACCELEROMETER_I2C_SDA_PIN AM_BSP_GPIO_IOM3_SDA
#define AM_BSP_ACCELEROMETER_I2C_SCL_PIN AM_BSP_GPIO_IOM3_SCL
#define g_AM_BSP_ACCELEROMETER_I2C_SCL g_AM_BSP_GPIO_IOM3_SCL
#define g_AM_BSP_ACCELEROMETER_I2C_SDA g_AM_BSP_GPIO_IOM3_SDA
#define AM_BSP_ACCELEROMETER_INT1_PIN 17
#define AM_BSP_ACCELEROMETER_INT2_PIN 0
//*****************************************************************************
//
// Primary SPI Pins
//
//*****************************************************************************
// The SparkFun Edge does not have a complete IOMaster broken out
//*****************************************************************************
//
// Primary UART Pins
//
//*****************************************************************************
#define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX
#define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX
#define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX
#define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX
//*****************************************************************************
//
// Qwiic Connector.
//
//*****************************************************************************
#define AM_BSP_QWIIC_I2C_IOM 4
#define AM_BSP_QWIIC_I2C_SDA_PIN AM_BSP_GPIO_IOM4_SDA
#define AM_BSP_QWIIC_I2C_SCL_PIN AM_BSP_GPIO_IOM4_SCL
#define g_AM_BSP_QWIIC_I2C_SDA g_AM_BSP_GPIO_IOM4_SDA
#define g_AM_BSP_QWIIC_I2C_SCL g_AM_BSP_GPIO_IOM4_SCL
//*****************************************************************************
//
// Button definitions.
//
//*****************************************************************************
#define AM_BSP_NUM_BUTTONS 1
extern am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS];
#define AM_BSP_GPIO_BUTTON0 AM_BSP_GPIO_BUTTON14
//*****************************************************************************
//
// LED definitions.
//
//*****************************************************************************
#define AM_BSP_NUM_LEDS 4
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
// LED Device Array Indices
#define AM_BSP_LED0 0
#define AM_BSP_LED1 1
#define AM_BSP_LED2 2
#define AM_BSP_LED3 3
#define AM_BSP_LED_RED AM_BSP_LED0
#define AM_BSP_LED_BLUE AM_BSP_LED1
#define AM_BSP_LED_GREEN AM_BSP_LED2
#define AM_BSP_LED_YELLOW AM_BSP_LED3
// Corresponding GPIO Numbers
#define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_RED
#define AM_BSP_GPIO_LED1 AM_BSP_GPIO_LED_BLUE
#define AM_BSP_GPIO_LED2 AM_BSP_GPIO_LED_GREEN
#define AM_BSP_GPIO_LED3 AM_BSP_GPIO_LED_YELLOW
#define AM_BSP_GPIO_LED46 AM_BSP_GPIO_LED_RED
#define AM_BSP_GPIO_LED37 AM_BSP_GPIO_LED_BLUE
#define AM_BSP_GPIO_LED44 AM_BSP_GPIO_LED_GREEN
#define AM_BSP_GPIO_LED47 AM_BSP_GPIO_LED_YELLOW
//*****************************************************************************
//
// PWM_LED peripheral assignments.
//
//*****************************************************************************
//
// The Edge LED0 is pin 46
//
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0
#define AM_BSP_PWM_LED_TIMER 6
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERA
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERA6C0
//*****************************************************************************
//
// UART definitions.
//
//*****************************************************************************
//
// Apollo3 has two UART instances.
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
//
#define AM_BSP_UART_IOS_INST 0
#define AM_BSP_UART_PRINT_INST 0
#define AM_BSP_UART_BOOTLOADER_INST 0
//*****************************************************************************
//
// End User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// Print interface type
//
//*****************************************************************************
#define AM_BSP_PRINT_INFC_NONE 0
#define AM_BSP_PRINT_INFC_SWO 1
#define AM_BSP_PRINT_INFC_UART0 2
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
//*****************************************************************************
//
//! Structure containing UART configuration information while it is powered down.
//
//*****************************************************************************
typedef struct
{
bool bSaved;
uint32_t ui32TxPinNum;
uint32_t ui32TxPinCfg;
}
am_bsp_uart_pwrsave_t;
//*****************************************************************************
//
// External data definitions.
//
//*****************************************************************************
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
extern void am_bsp_low_power_init(void);
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
extern void am_bsp_debug_printf_enable(void);
extern void am_bsp_debug_printf_disable(void);
#ifdef AM_BSP_GPIO_ITM_SWO
extern void am_bsp_itm_printf_enable(void);
#else
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
#endif
extern void am_bsp_itm_string_print(char *pcString);
extern void am_bsp_itm_printf_disable(void);
extern void am_bsp_uart_string_print(char *pcString);
extern void am_bsp_uart_printf_enable(void);
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
extern void am_bsp_uart_printf_disable(void);
extern void am_bsp_buffered_uart_printf_enable(void);
extern void am_bsp_buffered_uart_service(void);
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************

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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/bsp/am_bsp_pins.c
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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE/bsp/am_bsp_pins.h
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//*****************************************************************************
//
// am_bsp_pins.h
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
//
//*****************************************************************************
// SPDX-License-Identifier: BSD-3-Clause
#ifndef AM_BSP_PINS_H
#define AM_BSP_PINS_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// CAMERA_HM01B0_D0 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D0 24
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0;
//*****************************************************************************
//
// CAMERA_HM01B0_D1 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D1 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1;
//*****************************************************************************
//
// CAMERA_HM01B0_D2 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D2 26
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2;
//*****************************************************************************
//
// CAMERA_HM01B0_D3 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D3 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3;
//*****************************************************************************
//
// CAMERA_HM01B0_D4 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D4 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4;
//*****************************************************************************
//
// CAMERA_HM01B0_D5 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5;
//*****************************************************************************
//
// CAMERA_HM01B0_D6 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D6 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6;
//*****************************************************************************
//
// CAMERA_HM01B0_D7 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D7 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7;
//*****************************************************************************
//
// CAMERA_HM01B0_VSYNC pin: Also called FVLD on the HM01B0 module.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC;
//*****************************************************************************
//
// CAMERA_HM01B0_HSYNC pin: Also called LVLD on the HM01B0 module.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC;
//*****************************************************************************
//
// CAMERA_HM01B0_PCLK pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK;
//*****************************************************************************
//
// CAMERA_HM01B0_TRIG pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG;
//*****************************************************************************
//
// CAMERA_HM01B0_INT pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_INT 4
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT;
//*****************************************************************************
//
// CAMERA_HM01B0_DVDDEN pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN;
//*****************************************************************************
//
// MIC0 pin: Analog microphone near camera connector.
//
//*****************************************************************************
#define AM_BSP_GPIO_MIC0 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC0;
//*****************************************************************************
//
// MIC1 pin: Analog microphone near LEDs.
//
//*****************************************************************************
#define AM_BSP_GPIO_MIC1 29
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC1;
//*****************************************************************************
//
// BUTTON14 pin: Labeled 14 on the SparkFun Edge.
//
//*****************************************************************************
#define AM_BSP_GPIO_BUTTON14 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_BUTTON14;
//*****************************************************************************
//
// LED_RED pin: The RED LED labelled 46.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_RED 46
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED;
//*****************************************************************************
//
// LED_BLUE pin: The BLUE LED labelled 37.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_BLUE 37
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE;
//*****************************************************************************
//
// LED_GREEN pin: The GREEN LED labelled 44.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_GREEN 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN;
//*****************************************************************************
//
// LED_YELLOW pin: The YELLOW LED labelled 47.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_YELLOW 47
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW;
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_TX 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_RX 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
#define AM_BSP_IOM0_CS_CHNL 0
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS3 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
#define AM_BSP_IOM0_CS3_CHNL 3
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MISO 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MOSI 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCK 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCL 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SDA 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_CS 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
#define AM_BSP_IOM1_CS_CHNL 2
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MISO 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MOSI 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCK 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCL 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SDA 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_CS 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
#define AM_BSP_IOM2_CS_CHNL 3
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MISO 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MOSI 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCK 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCL 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SDA 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_CS 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
#define AM_BSP_IOM3_CS_CHNL 0
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MISO 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MOSI 38
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCK 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCL 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SDA 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_CS 13
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
#define AM_BSP_IOM4_CS_CHNL 1
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MISO 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MOSI 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCK 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCL 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SDA 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_CS 16
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
#define AM_BSP_IOM5_CS_CHNL 0
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MISO 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MOSI 47
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCK 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCL 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SDA 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE0 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
#define AM_BSP_MSPI_CE0_CHNL 0
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE1 41
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
#define AM_BSP_MSPI_CE1_CHNL 1
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D0 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D1 26
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D2 4
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D3 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D4 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D5 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D6 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D7 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_SCK 24
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_CE 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
#define AM_BSP_IOS_CE_CHNL 0
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MISO 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MOSI 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCK 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCL 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SDA 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
//*****************************************************************************
//
// ITM_SWO pin: ITM Serial Wire Output.
//
//*****************************************************************************
#define AM_BSP_GPIO_ITM_SWO 33
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO;
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDCK 20
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDIO 21
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_PINS_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************

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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/CMakeLists.txt
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# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_library(mbed-sfe-edge2 INTERFACE)
target_include_directories(mbed-sfe-edge2
INTERFACE
.
bsp
)
target_sources(mbed-sfe-edge2
INTERFACE
bsp/am_bsp.c
bsp/am_bsp_pins.c
)
target_link_libraries(mbed-sfe-edge2 INTERFACE mbed-apollo3)

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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/PinNames.h
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/*
* Copyright (c) 2019-2020 SparkFun Electronics
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* MBED TARGET LIST: SFE_EDGE2 */
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "am_bsp.h"
#include "objects_gpio.h"
#ifdef __cplusplus
extern "C"
{
#endif
#define NC_VAL (int)0xFFFFFFFF
typedef enum
{
// Digital naming
D16 = 16,
D31 = 31,
D45 = 45,
D44 = 44,
// Analog naming
A16 = D16,
A31 = D31,
// LEDs
LED_RED = AM_BSP_GPIO_LED_RED,
LED_BLUE = AM_BSP_GPIO_LED_BLUE,
LED_GREEN = AM_BSP_GPIO_LED_GREEN,
LED_YELLOW = AM_BSP_GPIO_LED_BLUE,
// mbed original LED naming
LED1 = AM_BSP_GPIO_LED0,
LED2 = AM_BSP_GPIO_LED1,
LED3 = AM_BSP_GPIO_LED2,
LED4 = AM_BSP_GPIO_LED3,
// LED naming by digital pin number
LED19 = AM_BSP_GPIO_LED19,
LED18 = AM_BSP_GPIO_LED18,
LED17 = AM_BSP_GPIO_LED17,
LED37 = AM_BSP_GPIO_LED37,
// I2C
I2C_SCL = AM_BSP_QWIIC_I2C_SCL_PIN,
I2C_SDA = AM_BSP_QWIIC_I2C_SDA_PIN,
// Qwiic
QWIIC_SCL = I2C_SCL,
QWIIC_SDA = I2C_SDA,
// SPI
SPI_CLK = AM_BSP_PRIM_SPI_CLK_PIN,
SPI_SDO = AM_BSP_PRIM_SPI_SDO_PIN,
SPI_SDI = AM_BSP_PRIM_SPI_SDI_PIN,
// UART
SERIAL_TX = AM_BSP_PRIM_UART_TX_PIN,
SERIAL_RX = AM_BSP_PRIM_UART_RX_PIN,
CONSOLE_TX = SERIAL_TX,
CONSOLE_RX = SERIAL_RX,
// Not connected
NC = NC_VAL
} PinName;
#if defined(MBED_CONF_TARGET_STDIO_UART_TX)
#define STDIO_UART_TX MBED_CONF_TARGET_STDIO_UART_TX
#else
#define STDIO_UART_TX CONSOLE_TX
#endif
#if defined(MBED_CONF_TARGET_STDIO_UART_RX)
#define STDIO_UART_RX MBED_CONF_TARGET_STDIO_UART_RX
#else
#define STDIO_UART_RX CONSOLE_RX
#endif
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/bsp/am_bsp.c
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302
targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/bsp/am_bsp.h
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//*****************************************************************************
//
// am_bsp.h
//! @file
//!
//! @brief Functions to aid with configuring the GPIOs.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_fpga_bsp BSP for the Apollo3 Hotshot FPGA
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision v2.0.0 of the AmbiqSuite Development Package.
//
//*****************************************************************************
// SPDX-License-Identifier: BSD-3-Clause
#ifndef AM_BSP_H
#define AM_BSP_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#include "am_bsp_pins.h"
//
// Make individual includes to not require full port before usage.
//#include "am_devices.h"
//
#include "am_devices_led.h"
#include "am_devices_button.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Begin User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// Camera
//
//*****************************************************************************
#define AM_BSP_CAMERA_HM01B0_MCLK_PIN 26
#define AM_BSP_CAMERA_HM01B0_I2C_IOM 1
#define AM_BSP_CAMERA_HM01B0_I2C_SDA_PIN AM_BSP_GPIO_IOM1_SDA
#define AM_BSP_CAMERA_HM01B0_I2C_SCL_PIN AM_BSP_GPIO_IOM1_SCL
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_MOD 0
#define AM_BSP_CAMERA_HM01B0_MCLK_GEN_SEG AM_HAL_CTIMER_TIMERB
//*****************************************************************************
//
// PDM Microphone
//
//*****************************************************************************
#define AM_BSP_PDM_CHANNEL AM_HAL_PDM_CHANNEL_RIGHT
#define AM_BSP_PDM_DATA_PIN AM_BSP_GPIO_MIC_DATA
#define AM_BSP_PDM_CLOCK_PIN AM_BSP_GPIO_MIC_CLK
#define g_AM_BSP_PDM_DATA g_AM_BSP_GPIO_MIC_DATA
#define g_AM_BSP_PDM_CLOCK g_AM_BSP_GPIO_MIC_CLK
//*****************************************************************************
//
// Accelerometer.
//
//*****************************************************************************
#define AM_BSP_ACCELEROMETER_I2C_IOM 3
#define AM_BSP_ACCELEROMETER_I2C_ADDRESS 0x19
#define AM_BSP_ACCELEROMETER_I2C_SDA_PIN AM_BSP_GPIO_IOM3_SDA
#define AM_BSP_ACCELEROMETER_I2C_SCL_PIN AM_BSP_GPIO_IOM3_SCL
#define g_AM_BSP_ACCELEROMETER_I2C_SDA g_AM_BSP_GPIO_IOM3_SDA
#define g_AM_BSP_ACCELEROMETER_I2C_SCL g_AM_BSP_GPIO_IOM3_SCL
//*****************************************************************************
//
// Primary SPI Pins
//
//*****************************************************************************
// Note: Edge2 can use SPI via the Qwiic connector and GPIO 44
#define AM_BSP_PRIM_SPI_IOM 4
#define AM_BSP_PRIM_SPI_CLK_PIN AM_BSP_GPIO_IOM4_SCK
#define AM_BSP_PRIM_SPI_SDO_PIN AM_BSP_GPIO_IOM4_MOSI
#define AM_BSP_PRIM_SPI_SDI_PIN AM_BSP_GPIO_IOM4_MISO
#define g_AM_BSP_PRIM_SPI_CLK g_AM_BSP_GPIO_IOM4_SCK
#define g_AM_BSP_PRIM_SPI_SDO g_AM_BSP_GPIO_IOM4_SDO
#define g_AM_BSP_PRIM_SPI_SDI g_AM_BSP_GPIO_IOM4_SDI
//*****************************************************************************
//
// Primary UART Pins
//
//*****************************************************************************
#define AM_BSP_PRIM_UART_TX_PIN AM_BSP_GPIO_COM_UART_TX
#define AM_BSP_PRIM_UART_RX_PIN AM_BSP_GPIO_COM_UART_RX
#define g_AM_BSP_PRIM_UART_TX g_AM_BSP_GPIO_COM_UART_TX
#define g_AM_BSP_PRIM_UART_RX g_AM_BSP_GPIO_COM_UART_RX
//*****************************************************************************
//
// Qwiic Connector.
//
//*****************************************************************************
#define AM_BSP_QWIIC_I2C_IOM 4
#define AM_BSP_QWIIC_I2C_SDA_PIN AM_BSP_GPIO_IOM4_SDA
#define AM_BSP_QWIIC_I2C_SCL_PIN AM_BSP_GPIO_IOM4_SCL
#define g_AM_BSP_QWIIC_I2C_SDA g_AM_BSP_GPIO_IOM4_SDA
#define g_AM_BSP_QWIIC_I2C_SCL g_AM_BSP_GPIO_IOM4_SCL
// //*****************************************************************************
// //
// // Button definitions.
// //
// //*****************************************************************************
// #define AM_BSP_NUM_BUTTONS 0
// extern am_devices_button_t am_bsp_psButtons[AM_BSP_NUM_BUTTONS];
//*****************************************************************************
//
// LED definitions.
//
//*****************************************************************************
#define AM_BSP_NUM_LEDS 4
extern am_devices_led_t am_bsp_psLEDs[AM_BSP_NUM_LEDS];
// LED Device Array Indices
#define AM_BSP_LED0 0
#define AM_BSP_LED1 1
#define AM_BSP_LED2 2
#define AM_BSP_LED3 3
#define AM_BSP_LED_RED AM_BSP_LED0
#define AM_BSP_LED_BLUE AM_BSP_LED1
#define AM_BSP_LED_GREEN AM_BSP_LED2
#define AM_BSP_LED_YELLOW AM_BSP_LED3
// Corresponding GPIO Numbers
#define AM_BSP_GPIO_LED0 AM_BSP_GPIO_LED_RED
#define AM_BSP_GPIO_LED1 AM_BSP_GPIO_LED_BLUE
#define AM_BSP_GPIO_LED2 AM_BSP_GPIO_LED_GREEN
#define AM_BSP_GPIO_LED3 AM_BSP_GPIO_LED_YELLOW
#define AM_BSP_GPIO_LED19 AM_BSP_GPIO_LED_RED
#define AM_BSP_GPIO_LED18 AM_BSP_GPIO_LED_BLUE
#define AM_BSP_GPIO_LED17 AM_BSP_GPIO_LED_GREEN
#define AM_BSP_GPIO_LED37 AM_BSP_GPIO_LED_YELLOW
//*****************************************************************************
//
// PWM_LED peripheral assignments.
//
//*****************************************************************************
//
// The Edge2 LED0 is pin 19
//
#define AM_BSP_PIN_PWM_LED AM_BSP_GPIO_LED0
#define AM_BSP_PWM_LED_TIMER 1
#define AM_BSP_PWM_LED_TIMER_SEG AM_HAL_CTIMER_TIMERB
#define AM_BSP_PWM_LED_TIMER_INT AM_HAL_CTIMER_INT_TIMERB1C0
//*****************************************************************************
//
// UART definitions.
//
//*****************************************************************************
//
// Apollo3 has two UART instances.
// AM_BSP_UART_PRINT_INST should correspond to COM_UART.
//
#define AM_BSP_UART_IOS_INST 0
#define AM_BSP_UART_PRINT_INST 0
#define AM_BSP_UART_BOOTLOADER_INST 0
//*****************************************************************************
//
// End User Modifiable Area
//
//*****************************************************************************
//*****************************************************************************
//
// Print interface type
//
//*****************************************************************************
#define AM_BSP_PRINT_INFC_NONE 0
#define AM_BSP_PRINT_INFC_SWO 1
#define AM_BSP_PRINT_INFC_UART0 2
#define AM_BSP_PRINT_INFC_BUFFERED_UART0 3
//*****************************************************************************
//
//! Structure containing UART configuration information while it is powered down.
//
//*****************************************************************************
typedef struct
{
bool bSaved;
uint32_t ui32TxPinNum;
uint32_t ui32TxPinCfg;
}
am_bsp_uart_pwrsave_t;
//*****************************************************************************
//
// External data definitions.
//
//*****************************************************************************
extern am_bsp_uart_pwrsave_t am_bsp_uart_pwrsave[AM_REG_UART_NUM_MODULES];
//*****************************************************************************
//
// External function definitions.
//
//*****************************************************************************
extern void am_bsp_low_power_init(void);
extern void am_bsp_iom_pins_enable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_iom_pins_disable(uint32_t ui32Module, am_hal_iom_mode_e eIOMMode);
extern void am_bsp_mspi_pins_enable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_mspi_pins_disable(am_hal_mspi_device_e eMSPIDevice);
extern void am_bsp_ios_pins_enable(uint32_t ui32Module, uint32_t ui32IOSMode); // SparkFun Edge does not expose IO Slave Clock signal, so hiding these functions
extern void am_bsp_ios_pins_disable(uint32_t ui32Module, uint32_t ui32IOSMode);
extern void am_bsp_debug_printf_enable(void);
extern void am_bsp_debug_printf_disable(void);
#ifdef AM_BSP_GPIO_ITM_SWO
extern void am_bsp_itm_printf_enable(void);
#else
extern void am_bsp_itm_printf_enable(uint32_t ui32Pin, am_hal_gpio_pincfg_t sPincfg);
#endif
extern void am_bsp_itm_string_print(char *pcString);
extern void am_bsp_itm_printf_disable(void);
extern void am_bsp_uart_string_print(char *pcString);
extern void am_bsp_uart_printf_enable(void);
extern void am_bsp_uart_printf_enable_custom(const am_hal_uart_config_t* p_config);
extern void am_bsp_uart_printf_disable(void);
extern void am_bsp_buffered_uart_printf_enable(void);
extern void am_bsp_buffered_uart_service(void);
extern uint32_t am_bsp_com_uart_transfer(const am_hal_uart_transfer_t *psTransfer);
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************

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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/bsp/am_bsp_pins.c
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targets/TARGET_Ambiq_Micro/TARGET_Apollo3/TARGET_SFE_EDGE2/bsp/am_bsp_pins.h
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//*****************************************************************************
//
// am_bsp_pins.h
//! @file
//!
//! @brief BSP pin configuration definitions.
//!
//! @addtogroup BSP Board Support Package (BSP)
//! @addtogroup apollo3_bsp BSP for the Apollo3 EVB.
//! @ingroup BSP
//! @{
//
//*****************************************************************************
//*****************************************************************************
//
// Copyright (c) 2019, Ambiq Micro
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// Third party software included in this distribution is subject to the
// additional license terms as defined in the /docs/licenses directory.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// This is part of revision 2.2.0-hotfix-2.2.1 of the AmbiqSuite Development Package.
//
//*****************************************************************************
// SPDX-License-Identifier: BSD-3-Clause
#ifndef AM_BSP_PINS_H
#define AM_BSP_PINS_H
#include <stdint.h>
#include <stdbool.h>
#include "am_mcu_apollo.h"
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// CAMERA_HM01B0_D0 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D0 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D0;
//*****************************************************************************
//
// CAMERA_HM01B0_D1 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D1 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D1;
//*****************************************************************************
//
// CAMERA_HM01B0_D2 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D2 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D2;
//*****************************************************************************
//
// CAMERA_HM01B0_D3 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D3 34
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D3;
//*****************************************************************************
//
// CAMERA_HM01B0_D4 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D4 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D4;
//*****************************************************************************
//
// CAMERA_HM01B0_D5 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D5 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D5;
//*****************************************************************************
//
// CAMERA_HM01B0_D6 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D6 35
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D6;
//*****************************************************************************
//
// CAMERA_HM01B0_D7 pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_D7 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_D7;
//*****************************************************************************
//
// CAMERA_HM01B0_VSYNC pin: Also called FVLD on the HM01B0 module.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_VSYNC 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_VSYNC;
//*****************************************************************************
//
// CAMERA_HM01B0_HSYNC pin: Also called LVLD on the HM01B0 module.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_HSYNC 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_HSYNC;
//*****************************************************************************
//
// CAMERA_HM01B0_PCLK pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_PCLK 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_PCLK;
//*****************************************************************************
//
// CAMERA_HM01B0_TRIG pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_TRIG 13
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_TRIG;
//*****************************************************************************
//
// CAMERA_HM01B0_INT pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_INT 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_INT;
//*****************************************************************************
//
// CAMERA_HM01B0_DVDDEN pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN 32
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_CAMERA_HM01B0_DVDDEN;
//*****************************************************************************
//
// MIC_DATA pin: Data line for PDM microphones.
//
//*****************************************************************************
#define AM_BSP_GPIO_MIC_DATA 29
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_DATA;
//*****************************************************************************
//
// MIC_CLK pin: Clock line for PDM microphones.
//
//*****************************************************************************
#define AM_BSP_GPIO_MIC_CLK 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MIC_CLK;
//*****************************************************************************
//
// LED_RED pin: The RED LED labelled 19.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_RED 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_RED;
//*****************************************************************************
//
// LED_BLUE pin: The BLUE LED labelled 18.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_BLUE 18
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_BLUE;
//*****************************************************************************
//
// LED_GREEN pin: The GREEN LED labelled 17.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_GREEN 17
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_GREEN;
//*****************************************************************************
//
// LED_YELLOW pin: The YELLOW LED labelled 37.
//
//*****************************************************************************
#define AM_BSP_GPIO_LED_YELLOW 37
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_LED_YELLOW;
//*****************************************************************************
//
// COM_UART_TX pin: This pin is the COM_UART transmit pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_TX 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_TX;
//*****************************************************************************
//
// COM_UART_RX pin: This pin is the COM_UART receive pin.
//
//*****************************************************************************
#define AM_BSP_GPIO_COM_UART_RX 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_COM_UART_RX;
//*****************************************************************************
//
// IOM0_CS pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS 11
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS;
#define AM_BSP_IOM0_CS_CHNL 0
//*****************************************************************************
//
// IOM0_CS3 pin: I/O Master 0 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_CS3 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_CS3;
#define AM_BSP_IOM0_CS3_CHNL 3
//*****************************************************************************
//
// IOM0_MISO pin: I/O Master 0 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MISO 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MISO;
//*****************************************************************************
//
// IOM0_MOSI pin: I/O Master 0 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_MOSI 7
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_MOSI;
//*****************************************************************************
//
// IOM0_SCK pin: I/O Master 0 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCK 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCK;
//*****************************************************************************
//
// IOM0_SCL pin: I/O Master 0 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SCL 5
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SCL;
//*****************************************************************************
//
// IOM0_SDA pin: I/O Master 0 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM0_SDA 6
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM0_SDA;
//*****************************************************************************
//
// IOM1_CS pin: I/O Master 1 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_CS 14
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_CS;
#define AM_BSP_IOM1_CS_CHNL 2
//*****************************************************************************
//
// IOM1_MISO pin: I/O Master 1 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MISO 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MISO;
//*****************************************************************************
//
// IOM1_MOSI pin: I/O Master 1 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_MOSI 10
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_MOSI;
//*****************************************************************************
//
// IOM1_SCK pin: I/O Master 1 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCK 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCK;
//*****************************************************************************
//
// IOM1_SCL pin: I/O Master 1 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SCL 8
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SCL;
//*****************************************************************************
//
// IOM1_SDA pin: I/O Master 1 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM1_SDA 9
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM1_SDA;
//*****************************************************************************
//
// IOM2_CS pin: I/O Master 2 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_CS 15
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_CS;
#define AM_BSP_IOM2_CS_CHNL 3
//*****************************************************************************
//
// IOM2_MISO pin: I/O Master 2 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MISO 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MISO;
//*****************************************************************************
//
// IOM2_MOSI pin: I/O Master 2 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_MOSI 28
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_MOSI;
//*****************************************************************************
//
// IOM2_SCK pin: I/O Master 2 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCK 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCK;
//*****************************************************************************
//
// IOM2_SCL pin: I/O Master 2 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SCL 27
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SCL;
//*****************************************************************************
//
// IOM2_SDA pin: I/O Master 2 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM2_SDA 25
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM2_SDA;
//*****************************************************************************
//
// IOM3_CS pin: I/O Master 3 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_CS 12
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_CS;
#define AM_BSP_IOM3_CS_CHNL 0
//*****************************************************************************
//
// IOM3_MISO pin: I/O Master 3 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MISO 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MISO;
//*****************************************************************************
//
// IOM3_MOSI pin: I/O Master 3 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_MOSI 38
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_MOSI;
//*****************************************************************************
//
// IOM3_SCK pin: I/O Master 3 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCK 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCK;
//*****************************************************************************
//
// IOM3_SCL pin: I/O Master 3 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SCL 42
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SCL;
//*****************************************************************************
//
// IOM3_SDA pin: I/O Master 3 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM3_SDA 43
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM3_SDA;
//*****************************************************************************
//
// IOM4_CS pin: I/O Master 4 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_CS 13
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_CS;
#define AM_BSP_IOM4_CS_CHNL 1
//*****************************************************************************
//
// IOM4_MISO pin: I/O Master 4 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MISO 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MISO;
//*****************************************************************************
//
// IOM4_MOSI pin: I/O Master 4 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_MOSI 44
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_MOSI;
//*****************************************************************************
//
// IOM4_SCK pin: I/O Master 4 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCK 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCK;
//*****************************************************************************
//
// IOM4_SCL pin: I/O Master 4 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SCL 39
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SCL;
//*****************************************************************************
//
// IOM4_SDA pin: I/O Master 4 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM4_SDA 40
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM4_SDA;
//*****************************************************************************
//
// IOM5_CS pin: I/O Master 5 chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_CS 16
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_CS;
#define AM_BSP_IOM5_CS_CHNL 0
//*****************************************************************************
//
// IOM5_MISO pin: I/O Master 5 SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MISO 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MISO;
//*****************************************************************************
//
// IOM5_MOSI pin: I/O Master 5 SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_MOSI 47
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_MOSI;
//*****************************************************************************
//
// IOM5_SCK pin: I/O Master 5 SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCK 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCK;
//*****************************************************************************
//
// IOM5_SCL pin: I/O Master 5 I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SCL 48
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SCL;
//*****************************************************************************
//
// IOM5_SDA pin: I/O Master 5 I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOM5_SDA 49
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOM5_SDA;
//*****************************************************************************
//
// MSPI_CE0 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE0 19
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE0;
#define AM_BSP_MSPI_CE0_CHNL 0
//*****************************************************************************
//
// MSPI_CE1 pin: MSPI chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_CE1 41
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_CE1;
#define AM_BSP_MSPI_CE1_CHNL 1
//*****************************************************************************
//
// MSPI_D0 pin: MSPI data 0.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D0 22
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D0;
//*****************************************************************************
//
// MSPI_D1 pin: MSPI data 1.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D1 26
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D1;
//*****************************************************************************
//
// MSPI_D2 pin: MSPI data 2.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D2 4
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D2;
//*****************************************************************************
//
// MSPI_D3 pin: MSPI data 3.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D3 23
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D3;
//*****************************************************************************
//
// MSPI_D4 pin: MSPI data 4.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D4 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D4;
//*****************************************************************************
//
// MSPI_D5 pin: MSPI data 5.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D5 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D5;
//*****************************************************************************
//
// MSPI_D6 pin: MSPI data 6.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D6 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D6;
//*****************************************************************************
//
// MSPI_D7 pin: MSPI data 7.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_D7 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_D7;
//*****************************************************************************
//
// MSPI_SCK pin: MSPI clock.
//
//*****************************************************************************
#define AM_BSP_GPIO_MSPI_SCK 24
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_MSPI_SCK;
//*****************************************************************************
//
// IOS_CE pin: I/O Slave chip select.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_CE 3
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_CE;
#define AM_BSP_IOS_CE_CHNL 0
//*****************************************************************************
//
// IOS_MISO pin: I/O Slave SPI MISO signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MISO 2
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MISO;
//*****************************************************************************
//
// IOS_MOSI pin: I/O Slave SPI MOSI signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_MOSI 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_MOSI;
//*****************************************************************************
//
// IOS_SCK pin: I/O Slave SPI SCK signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCK 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCK;
//*****************************************************************************
//
// IOS_SCL pin: I/O Slave I2C clock signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SCL 0
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SCL;
//*****************************************************************************
//
// IOS_SDA pin: I/O Slave I2C data signal.
//
//*****************************************************************************
#define AM_BSP_GPIO_IOS_SDA 1
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_IOS_SDA;
//*****************************************************************************
//
// ITM_SWO pin: ITM Serial Wire Output.
//
//*****************************************************************************
#define AM_BSP_GPIO_ITM_SWO 33
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_ITM_SWO;
//*****************************************************************************
//
// SWDCK pin: Cortex Serial Wire DCK.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDCK 20
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDCK;
//*****************************************************************************
//
// SWDIO pin: Cortex Serial Wire DIO.
//
//*****************************************************************************
#define AM_BSP_GPIO_SWDIO 21
extern const am_hal_gpio_pincfg_t g_AM_BSP_GPIO_SWDIO;
#ifdef __cplusplus
}
#endif
#endif // AM_BSP_PINS_H
//*****************************************************************************
//
// End Doxygen group.
//! @}
//
//*****************************************************************************

12
targets/targets.json5
View File

@ -9194,18 +9194,6 @@
"SFE_ARTEMIS_THING_PLUS": { // AKA SparkFun Thing Plus - Artemis
"inherits": ["AMA3B1KK"]
},
// This target has been retired by the manufacturer (as far as I can tell), making it a candidate for removal
"SFE_EDGE": {
"inherits": ["AMA3B1KK"],
"components_add": ["lis2dh12", "hm01b0"]
},
// This target has been retired by the manufacturer, making it a candidate for removal
"SFE_EDGE2": { // AKE SparkFun Edge 2 Development Board - Artemis
"inherits": ["AMA3B1KK"],
"components_add": ["lis2dh12", "hm01b0"],
"image_url": "https://cdn.sparkfun.com/r/455-455/assets/parts/1/3/9/7/5/15420-SparkFun_Edge_2_Development_Board_-_Artemis-01.jpg"
},
// Toshiba Targets -------------------------------------------------------------------------------------------------
"TMPM46B": { // AKA AdBun-M46B
"inherits": [