mirror of https://github.com/ARMmbed/mbed-os.git
Fix I2C driver for RZ/A1H
Previously, when "length = 0" as failsafe, "return 0" is executed. But we changed so that only START bit and STOP bit are executed same as other devices.pull/3551/head
parent
3a326c0b94
commit
0236d95fed
|
|
@ -416,9 +416,6 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
int value;
|
||||
volatile uint32_t work_reg = 0;
|
||||
|
||||
if(length <= 0) {
|
||||
return 0;
|
||||
}
|
||||
i2c_set_MR3_ACK(obj);
|
||||
/* There is a STOP condition for last processing */
|
||||
if (obj->i2c.last_stop_flag != 0) {
|
||||
|
|
@ -448,6 +445,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
obj->i2c.last_stop_flag = 1;
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
if (length != 0) {
|
||||
/* Read in all except last byte */
|
||||
if (length > 2) {
|
||||
/* dummy read */
|
||||
|
|
@ -519,6 +517,19 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
/* SR2.START = 0 */
|
||||
REG(SR2.UINT32) &= ~SR2_START;
|
||||
}
|
||||
} else {
|
||||
/* If not repeated start, send stop. */
|
||||
if (stop) {
|
||||
(void)i2c_set_STOP(obj);
|
||||
(void)i2c_wait_STOP(obj);
|
||||
i2c_set_SR2_NACKF_STOP(obj);
|
||||
} else {
|
||||
(void)i2c_restart(obj);
|
||||
(void)i2c_wait_START(obj);
|
||||
/* SR2.START = 0 */
|
||||
REG(SR2.UINT32) &= ~SR2_START;
|
||||
}
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
|
@ -527,10 +538,6 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
|||
int cnt;
|
||||
int status;
|
||||
|
||||
if(length <= 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* There is a STOP condition for last processing */
|
||||
if (obj->i2c.last_stop_flag != 0) {
|
||||
status = i2c_start(obj);
|
||||
|
|
|
|||
|
|
@ -418,9 +418,6 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
int value;
|
||||
volatile uint32_t work_reg = 0;
|
||||
|
||||
if(length <= 0) {
|
||||
return 0;
|
||||
}
|
||||
i2c_set_MR3_ACK(obj);
|
||||
/* There is a STOP condition for last processing */
|
||||
if (obj->last_stop_flag != 0) {
|
||||
|
|
@ -450,6 +447,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
obj->last_stop_flag = 1;
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
if (length != 0) {
|
||||
/* Read in all except last byte */
|
||||
if (length > 2) {
|
||||
/* dummy read */
|
||||
|
|
@ -472,7 +470,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
data[count] = (char)value;
|
||||
}
|
||||
} else if (length == 2) {
|
||||
/* Set MR3 WATI bit is 1 */
|
||||
/* Set MR3 WAIT bit is 1 */
|
||||
REG(MR3.UINT32) |= MR3_WAIT;
|
||||
/* dummy read */
|
||||
value = REG(DRR.UINT32);
|
||||
|
|
@ -487,7 +485,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
count++;
|
||||
} else {
|
||||
/* length == 1 */
|
||||
/* Set MR3 WATI bit is 1 */;
|
||||
/* Set MR3 WAIT bit is 1 */;
|
||||
REG(MR3.UINT32) |= MR3_WAIT;
|
||||
i2c_set_MR3_NACK(obj);
|
||||
/* dummy read */
|
||||
|
|
@ -521,6 +519,19 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
/* SR2.START = 0 */
|
||||
REG(SR2.UINT32) &= ~SR2_START;
|
||||
}
|
||||
} else {
|
||||
/* If not repeated start, send stop. */
|
||||
if (stop) {
|
||||
(void)i2c_set_STOP(obj);
|
||||
(void)i2c_wait_STOP(obj);
|
||||
i2c_set_SR2_NACKF_STOP(obj);
|
||||
} else {
|
||||
(void)i2c_restart(obj);
|
||||
(void)i2c_wait_START(obj);
|
||||
/* SR2.START = 0 */
|
||||
REG(SR2.UINT32) &= ~SR2_START;
|
||||
}
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
|
@ -529,10 +540,6 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
|||
int cnt;
|
||||
int status;
|
||||
|
||||
if(length <= 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* There is a STOP condition for last processing */
|
||||
if (obj->last_stop_flag != 0) {
|
||||
status = i2c_start(obj);
|
||||
|
|
|
|||
Loading…
Reference in New Issue