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Code Issues Projects Releases Wiki Activity

Fix RTC time doesn't continue across reset cycle

pull/4974/head
ccli8 2017-05-10 09:23:01 +08:00 committed by adbridge
parent 94b40c3146
commit 019c989e24
2 changed files with 28 additions and 20 deletions
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24
targets/TARGET_NUVOTON/TARGET_M451/rtc_api.c
View File

@ -26,31 +26,33 @@
#define YEAR0 1900 #define YEAR0 1900
//#define EPOCH_YR 1970 //#define EPOCH_YR 1970
static int rtc_inited = 0;
static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL}; static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL};
void rtc_init(void) void rtc_init(void)
{ {
if (rtc_inited) { if (rtc_isenabled()) {
return; return;
} }
rtc_inited = 1;
// Enable IP clock
CLK_EnableModuleClock(rtc_modinit.clkidx);
RTC_Open(NULL); RTC_Open(NULL);
} }
void rtc_free(void) void rtc_free(void)
{ {
// FIXME // N/A
} }
int rtc_isenabled(void) int rtc_isenabled(void)
{ {
return rtc_inited; // NOTE: To access (RTC) registers, clock must be enabled first.
if (! (CLK->APBCLK0 & CLK_APBCLK0_RTCCKEN_Msk)) {
// Enable IP clock
CLK_EnableModuleClock(rtc_modinit.clkidx);
}
// NOTE: Check RTC Init Active flag to support crossing reset cycle.
return !! (RTC->INIT & RTC_INIT_ACTIVE_Msk);
} }
/* /*
@ -68,7 +70,9 @@ int rtc_isenabled(void)
time_t rtc_read(void) time_t rtc_read(void)
{ {
if (! rtc_inited) { // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency.
// RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect.
if (! rtc_isenabled()) {
rtc_init(); rtc_init();
} }
@ -94,7 +98,7 @@ time_t rtc_read(void)
void rtc_write(time_t t) void rtc_write(time_t t)
{ {
if (! rtc_inited) { if (! rtc_isenabled()) {
rtc_init(); rtc_init();
} }

24
targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c
View File

@ -26,31 +26,33 @@
#define YEAR0 1900 #define YEAR0 1900
//#define EPOCH_YR 1970 //#define EPOCH_YR 1970
static int rtc_inited = 0;
static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL}; static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL};
void rtc_init(void) void rtc_init(void)
{ {
if (rtc_inited) { if (rtc_isenabled()) {
return; return;
} }
rtc_inited = 1;
// Enable IP clock
CLK_EnableModuleClock(rtc_modinit.clkidx);
RTC_Open(NULL); RTC_Open(NULL);
} }
void rtc_free(void) void rtc_free(void)
{ {
// FIXME // N/A
} }
int rtc_isenabled(void) int rtc_isenabled(void)
{ {
return rtc_inited; // NOTE: To access (RTC) registers, clock must be enabled first.
if (! (CLK->APBCLK0 & CLK_APBCLK0_RTCCKEN_Msk)) {
// Enable IP clock
CLK_EnableModuleClock(rtc_modinit.clkidx);
}
// NOTE: Check RTC Init Active flag to support crossing reset cycle.
return !! (RTC->INIT & RTC_INIT_INIT_Active_Msk);
} }
/* /*
@ -68,7 +70,9 @@ int rtc_isenabled(void)
time_t rtc_read(void) time_t rtc_read(void)
{ {
if (! rtc_inited) { // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency.
// RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect.
if (! rtc_isenabled()) {
rtc_init(); rtc_init();
} }
@ -94,7 +98,7 @@ time_t rtc_read(void)
void rtc_write(time_t t) void rtc_write(time_t t)
{ {
if (! rtc_inited) { if (! rtc_isenabled()) {
rtc_init(); rtc_init();
} }