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Merge pull request #14465 from harmut01/baremetal_maxim 

Maxim: Add bare metal support to targets
pull/14554/head
Martin Kojtal 2021-04-15 17:31:12 +02:00 committed by GitHub
parent 32d1c99d3c 1c671c43ff
commit 016d725673
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 115 additions and 20 deletions
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34
targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct
View File

@ -4,8 +4,22 @@
; 256KB RAM (0x40000) @ 0x20000000 ; 256KB RAM (0x40000) @ 0x20000000
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x000000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif
; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000)
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x40000
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE)
@ -15,20 +29,26 @@
# endif # endif
#endif #endif
; [RAM] Vector table dynamic copy: 65 vectors * 4 bytes = 260 (0x104) + 4
; for 8 byte alignment
#define VECTOR_SIZE 0x108
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#define RAM_FIXED_SIZE (Stack_Size + VECTOR_SIZE)
LR_IROM1 0x00000000 0x200000 { ; load region size_region #define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
ER_IROM1 0x00000000 0x200000 { ; load address = execution address #define MBED_RAM1_SIZE (MBED_RAM_SIZE-RAM_FIXED_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
} }
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
; [RAM] Vector table dynamic copy: 65 vectors * 4 bytes = 260 (0x104) + 4
; for 8 byte alignment
RW_IRAM1 (0x20000000+0x108) (0x40000-0x108-Stack_Size) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x40000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, +16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)){ ; heap region growing up
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack region growing down
} }
} }

22
targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct
View File

@ -11,6 +11,14 @@
#define MBED_APP_SIZE 0x00070000 #define MBED_APP_SIZE 0x00070000
#endif #endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x28000
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@ -19,7 +27,13 @@
# endif # endif
#endif #endif
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110)
#define VECTOR_SIZE 0x110
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#define RAM_FIXED_SIZE (Stack_Size + VECTOR_SIZE)
#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE-RAM_FIXED_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
@ -28,10 +42,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO) .ANY (+RO)
} }
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
RW_IRAM1 (0x20000000+0x110) (0x28000-0x110-Stack_Size) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x28000) EMPTY -Stack_Size { ; stack
ARM_LIB_HEAP AlignExpr(+0, +16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)){ ; heap region growing up
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack region growing down
} }
} }

32
targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct
View File

@ -3,6 +3,22 @@
; 512KB FLASH (0x80000) @ 0x000000000 ; 512KB FLASH (0x80000) @ 0x000000000
; 160KB RAM (0x28000) @ 0x20000000 ; 160KB RAM (0x28000) @ 0x20000000
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x000000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x28000
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@ -11,19 +27,27 @@
# endif # endif
#endif #endif
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110)
#define VECTOR_SIZE 0x110
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#define RAM_FIXED_SIZE (Stack_Size + VECTOR_SIZE)
LR_IROM1 0x000000000 0x80000 { ; load region size_region #define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
ER_IROM1 0x000000000 0x80000 { ; load address = execution address #define MBED_RAM1_SIZE (MBED_RAM_SIZE-RAM_FIXED_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
} }
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110)
RW_IRAM1 (0x20000000+0x110) (0x28000-0x110-Stack_Size) { ; RW data RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x28000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, +16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)){ ; heap region growing up
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack region growing down
} }
} }

33
targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct
View File

@ -3,6 +3,23 @@
; 2MB FLASH (0x200000) @ 0x000000000 ; 2MB FLASH (0x200000) @ 0x000000000
; 512KB RAM (0x80000) @ 0x20000000 ; 512KB RAM (0x80000) @ 0x20000000
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x000000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000
#endif
; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000)
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@ -11,19 +28,27 @@
# endif # endif
#endif #endif
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110)
#define VECTOR_SIZE 0x110
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#define RAM_FIXED_SIZE (Stack_Size + VECTOR_SIZE)
LR_IROM1 0x000000000 0x200000 { ; load region size_region #define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
ER_IROM1 0x000000000 0x200000 { ; load address = execution address #define MBED_RAM1_SIZE (MBED_RAM_SIZE-RAM_FIXED_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
} }
; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110)
RW_IRAM1 (0x20000000+0x110) (0x80000-0x110-Stack_Size) { ; RW data RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x80000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, +16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)){ ; heap region growing up
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack region growing down
} }
} }

14
targets/targets.json
View File

@ -5212,7 +5212,6 @@
], ],
"supported_toolchains": [ "supported_toolchains": [
"GCC_ARM", "GCC_ARM",
"IAR",
"ARM" "ARM"
], ],
"device_has": [ "device_has": [
@ -5234,7 +5233,18 @@
], ],
"release_versions": [ "release_versions": [
"5" "5"
] ],
"supported_application_profiles" : ["full", "bare-metal"],
"supported_c_libs": {
"arm": [
"std",
"small"
],
"gcc_arm": [
"std",
"small"
]
}
}, },
"MAX32625_BASE": { "MAX32625_BASE": {
"inherits": [ "inherits": [