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[ARM_SSG] Support boot stack size configuration option

pull/9092/head
Przemyslaw Stekiel 2018-12-17 14:29:51 +01:00
parent 55b1c664bc
commit 0111f5d5fe
12 changed files with 104 additions and 15 deletions
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14
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct
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@ -1,4 +1,5 @@
;/*
#! armcc -E;
/*
; * BEETLE CMSIS Library
; */
;/*
@ -22,6 +23,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
*.o (RESET, +FIRST)
@ -30,7 +37,10 @@ LR_IROM1 0x00000000 0x00040000 { ; load region size_region
CORDIO_RO_2.1.o (*)
}
; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM
RW_IRAM1 (0x20000000+0x140) (0x20000-0x140) { ; RW data
RW_IRAM1 (0x20000000+0x140) (0x20000-0x140-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack
}
}

9
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld
View File

@ -59,8 +59,11 @@ MEMORY
*/
ENTRY(Reset_Handler)
/* Heap 1/4 of ram and stack 1/8 */
__stack_size__ = 0x4000;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x8000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
@ -202,7 +205,7 @@ SECTIONS
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > RAM

7
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf
View File

@ -29,8 +29,13 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000140;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/* Heap and Stack size */
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

10
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -29,6 +29,12 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
; The vector table is loaded at address 0x00000000 in Flash memory region.
LR_IROM1 FLASH_START FLASH_SIZE {
ER_IROM1 FLASH_START FLASH_SIZE {
@ -38,10 +44,12 @@ LR_IROM1 FLASH_START FLASH_SIZE {
; Rest of the code is loaded to the ZBT SSRAM1.
LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE-Stack_Size {
*(InRoot$$Sections)
.ANY (+RO)
}
ARM_LIB_STACK ZBT_SSRAM1_START+ZBT_SSRAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down
}
; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector
; table previously moved from Flash.
RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE) {

6
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -25,6 +25,10 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
MEMORY
{
VECTORS (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
@ -61,7 +65,7 @@ MEMORY
ENTRY(Reset_Handler)
HEAP_SIZE = 0x4000;
STACK_SIZE = 0x1000;
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -57,7 +57,10 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SSRAM23_START + ZBT_SSRAM23_
/* Sizes */
/* Heap and Stack size */
define symbol __ICFEDIT_size_heap__ = 0xF000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define memory mem with size = 4G;

11
targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM
RW_IRAM1 (0x20000000+0x140) (0x400000-0x140) { ; RW data
RW_IRAM1 (0x20000000+0x140) (0x400000-0x140-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

12
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,5 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +35,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +48,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

12
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,5 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +35,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +48,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}