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Merge commit '1a9de4ca6c71d2b1fb46b93f42f54b7e69a879d7' as 'connectivity/drivers/802.15.4_RF/atmel-rf-driver'

pull/13473/head
Arto Kinnunen 2020-08-21 12:15:45 +03:00
parent 1140885b0e 1a9de4ca6c
commit 007484e492
12 changed files with 4495 additions and 0 deletions
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2
connectivity/drivers/802.15.4_RF/atmel-rf-driver/LICENSE Normal file
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Unless specifically indicated otherwise in a file, files are licensed
under the Apache 2.0 license, as can be found in: apache-2.0.txt

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connectivity/drivers/802.15.4_RF/atmel-rf-driver/README.md Normal file
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# Example RF driver for Atmel 802.15.4 transceivers #
Support for:
* AT86RF233
* AT86RF212B
This driver is used with 6LoWPAN stack.

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connectivity/drivers/802.15.4_RF/atmel-rf-driver/apache-2.0.txt Normal file
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Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction, and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all other entities that control, are controlled by, or are under common control with that entity. For the purposes of this definition, "control" means (i) the power, direct or indirect, to cause the direction or management of such entity, whether by contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity exercising permissions granted by this License.
"Source" form shall mean the preferred form for making modifications, including but not limited to software source code, documentation source, and configuration files.
"Object" form shall mean any form resulting from mechanical transformation or translation of a Source form, including but not limited to compiled object code, generated documentation, and conversions to other media types.
"Work" shall mean the work of authorship, whether in Source or Object form, made available under the License, as indicated by a copyright notice that is included in or attached to the work (an example is provided in the Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object form, that is based on (or derived from) the Work and for which the editorial revisions, annotations, elaborations, or other modifications represent, as a whole, an original work of authorship. For the purposes of this License, Derivative Works shall not include works that remain separable from, or merely link (or bind by name) to the interfaces of, the Work and Derivative Works thereof.
"Contribution" shall mean any work of authorship, including the original version of the Work and any modifications or additions to that Work or Derivative Works thereof, that is intentionally submitted to Licensor for inclusion in the Work by the copyright owner or by an individual or Legal Entity authorized to submit on behalf of the copyright owner. For the purposes of this definition, "submitted" means any form of electronic, verbal, or written communication sent to the Licensor or its representatives, including but not limited to communication on electronic mailing lists, source code control systems, and issue tracking systems that are managed by, or on behalf of, the Licensor for the purpose of discussing and improving the Work, but excluding communication that is conspicuously marked or otherwise designated in writing by the copyright owner as "Not a Contribution."
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7. Disclaimer of Warranty. Unless required by applicable law or agreed to in writing, Licensor provides the Work (and each Contributor provides its Contributions) on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied, including, without limitation, any warranties or conditions of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are solely responsible for determining the appropriateness of using or redistributing the Work and assume any risks associated with Your exercise of permissions under this License.
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END OF TERMS AND CONDITIONS

141
connectivity/drivers/802.15.4_RF/atmel-rf-driver/atmel-rf-driver/NanostackRfPhyAtmel.h Normal file
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/*
* Copyright (c) 2014-2015 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef NANOSTACK_RF_PHY_ATMEL_H_
#define NANOSTACK_RF_PHY_ATMEL_H_
#include "at24mac.h"
#include "PinNames.h"
#if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI && DEVICE_I2C && defined(MBED_CONF_RTOS_PRESENT)
#include "NanostackRfPhy.h"
// Uncomment to use testing gpios attached to TX/RX processes
// #define TEST_GPIOS_ENABLED
// Arduino pin defaults for convenience
#if !defined(ATMEL_SPI_MOSI)
#define ATMEL_SPI_MOSI D11
#endif
#if !defined(ATMEL_SPI_MISO)
#define ATMEL_SPI_MISO D12
#endif
#if !defined(ATMEL_SPI_SCLK)
#define ATMEL_SPI_SCLK D13
#endif
#if !defined(ATMEL_SPI_CS)
#define ATMEL_SPI_CS D10
#endif
#if !defined(ATMEL_SPI_RST)
#define ATMEL_SPI_RST D5
#endif
#if !defined(ATMEL_SPI_SLP)
#define ATMEL_SPI_SLP D7
#endif
#if !defined(ATMEL_SPI_IRQ)
#define ATMEL_SPI_IRQ D9
#endif
#if !defined(ATMEL_I2C_SDA)
#define ATMEL_I2C_SDA D14
#endif
#if !defined(ATMEL_I2C_SCL)
#define ATMEL_I2C_SCL D15
#endif
#if !defined(TEST_PIN_TX)
#define TEST_PIN_TX D6
#endif
#if !defined(TEST_PIN_RX)
#define TEST_PIN_RX D3
#endif
#if !defined(TEST_PIN_CSMA)
#define TEST_PIN_CSMA D4
#endif
#if !defined(TEST_PIN_SPARE_1)
#define TEST_PIN_SPARE_1 D2
#endif
#if !defined(TEST_PIN_SPARE_2)
#define TEST_PIN_SPARE_2 D8
#endif
#if !defined(SE2435L_CSD)
#define SE2435L_CSD D2
#endif
#if !defined(SE2435L_ANT_SEL)
#define SE2435L_ANT_SEL D8
#endif
class RFBits;
class TestPins;
class Se2435Pins;
class NanostackRfPhyAtmel : public NanostackRfPhy {
public:
NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq,
PinName i2c_sda, PinName i2c_scl);
virtual ~NanostackRfPhyAtmel();
virtual int8_t rf_register();
virtual void rf_unregister();
virtual void get_mac_address(uint8_t *mac);
virtual void set_mac_address(uint8_t *mac);
private:
#if !defined(DISABLE_AT24MAC)
AT24Mac _mac;
#endif
uint8_t _mac_addr[8];
RFBits *_rf;
TestPins *_test_pins;
Se2435Pins *_se2435_pa_pins;
bool _mac_set;
const PinName _spi_mosi;
const PinName _spi_miso;
const PinName _spi_sclk;
const PinName _spi_cs;
const PinName _spi_rst;
const PinName _spi_slp;
const PinName _spi_irq;
};
#ifdef TEST_GPIOS_ENABLED
#define TEST_TX_STARTED test_pins->TEST1 = 1;
#define TEST_TX_DONE test_pins->TEST1 = 0;
#define TEST_RX_STARTED test_pins->TEST2 = 1;
#define TEST_RX_DONE test_pins->TEST2 = 0;
#define TEST_CSMA_STARTED test_pins->TEST3 = 1;
#define TEST_CSMA_DONE test_pins->TEST3 = 0;
#define TEST_SPARE_1_ON test_pins->TEST4 = 1;
#define TEST_SPARE_1_OFF test_pins->TEST4 = 0;
#define TEST_SPARE_2_ON test_pins->TEST5 = 1;
#define TEST_SPARE_2_OFF test_pins->TEST5 = 0;
extern void (*fhss_uc_switch)(void);
extern void (*fhss_bc_switch)(void);
#else
#define TEST_TX_STARTED
#define TEST_TX_DONE
#define TEST_RX_STARTED
#define TEST_RX_DONE
#define TEST_CSMA_STARTED
#define TEST_CSMA_DONE
#define TEST_SPARE_1_ON
#define TEST_SPARE_1_OFF
#define TEST_SPARE_2_ON
#define TEST_SPARE_2_OFF
#endif //TEST_GPIOS_ENABLED
#endif /* MBED_CONF_NANOSTACK_CONFIGURATION */
#endif /* NANOSTACK_RF_PHY_ATMEL_H_ */

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connectivity/drivers/802.15.4_RF/atmel-rf-driver/mbed_lib.json Normal file
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{
"name": "atmel-rf",
"config": {
"full-spi-speed": {
"help": "Maximum SPI clock speed (Hz), as long as sufficient inter-byte spacing",
"value": 7500000
},
"full-spi-speed-byte-spacing": {
"help": "Required byte spacing in nanoseconds if full SPI speed is in use",
"value": 250
},
"low-spi-speed": {
"help": "Maximum SPI clock speed (Hz) if no inter-byte spacing",
"value": 3750000
},
"use-spi-spacing-api": {
"help": "Use SPI spacing API proposed in https://github.com/ARMmbed/mbed-os/pull/5353 to ensure spacing between bytes - either run at full speed with spacing, or low with no spacing",
"value": false
},
"assume-spaced-spi": {
"help": "If not using SPI spacing API, assume platform has widely-spaced bytes in bursts, so use full clock speed rather than low.",
"value": false
},
"provide-default": {
"help": "Provide default NanostackRfpy. [true/false]",
"value": false
},
"irq-thread-stack-size": {
"help": "The stack size of the Thread serving the Atmel RF interrupts",
"value": 1024
}
},
"target_overrides": {
"STM": {
"assume-spaced-spi": true
}
}
}

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connectivity/drivers/802.15.4_RF/atmel-rf-driver/source/AT86RF215Reg.h Normal file
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/*
* Copyright (c) 2020 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef AT86RF215REG_H_
#define AT86RF215REG_H_
#ifdef __cplusplus
extern "C" {
#endif
/*Register addresses*/
#define RF09_IRQS 0x00
#define RF24_IRQS 0x01
#define BBC0_IRQS 0x02
#define BBC1_IRQS 0x03
#define RF_AUXS 0x01
#define RF_CFG 0x06
#define RF_IQIFC1 0x0B
#define RF_PN 0x0D
#define RF_VN 0x0E
#define RF_IRQM 0x00
#define RF_STATE 0x02
#define RF_CMD 0x03
#define RF_CS 0x04
#define RF_CCF0L 0x05
#define RF_CCF0H 0x06
#define RF_CNL 0x07
#define RF_CNM 0x08
#define RF_RXBWC 0x09
#define RF_RXDFE 0x0A
#define RF_AGCC 0x0B
#define RF_AGCS 0x0C
#define RF_RSSI 0x0D
#define RF_EDC 0x0E
#define RF_EDV 0x10
#define RF_TXCUTC 0x12
#define RF_TXDFE 0x13
#define RF_PAC 0x14
#define RF_PADFE 0x16
#define BBC_IRQM 0x00
#define BBC_PC 0x01
#define BBC_RXFLL 0x04
#define BBC_RXFLH 0x05
#define BBC_TXFLL 0x06
#define BBC_TXFLH 0x07
#define BBC_FBLL 0x08
#define BBC_FBLH 0x09
#define BBC_OFDMPHRTX 0x0C
#define BBC_OFDMC 0x0E
#define BBC_OFDMSW 0x0F
#define BBC_OQPSKC0 0x10
#define BBC_OQPSKC1 0x11
#define BBC_OQPSKC2 0x12
#define BBC_OQPSKC3 0x13
#define BBC_OQPSKPHRTX 0x14
#define BBC_OQPSKPHRRX 0x15
#define BBC_AFC0 0x20
#define BBC_AFFTM 0x22
#define BBC_MACEA0 0x25
#define BBC_MACPID0F0 0x2D
#define BBC_MACSHA0F0 0x2F
#define BBC_AMCS 0x40
#define BBC_AMEDT 0x41
#define BBC_AMAACKTL 0x43
#define BBC_AMAACKTH 0x44
#define BBC_FSKC0 0x60
#define BBC_FSKC1 0x61
#define BBC_FSKC2 0x62
#define BBC_FSKC3 0x63
#define BBC_FSKPLL 0x65
#define BBC_FSKPHRTX 0x6A
#define BBC_FSKPHRRX 0x6B
#define BBC0_FBRXS 0x2000
#define BBC0_FBTXS 0x2800
#define BBC1_FBRXS 0x3000
#define BBC1_FBTXS 0x3800
// RF_AUXS
#define EXTLNABYP (1 << 7)
#define AGCMAP 0x60
#define AGCMAP_2 (2 << 5)
#define AVEN (1 << 3)
// RF_PAC
#define TXPWR 0x1F
#define TXPWR_11 (11 << 0)
// RF_PADFE
#define PADFE 0xC0
#define RF_FEMODE3 (3 << 6)
// RF_AGCC
#define AGCI (1 << 6)
#define AVGS 0x30
#define AVGS_8_SAMPLES (0 << 4)
// RF_AGCS
#define TGT 0xE0
#define TGT_1 (1 << 5)
#define TGT_3 (3 << 5)
// RF_RXBWC
#define BW 0x0F
#define RF_BW2000KHZ_IF2000KHZ (11 << 0)
#define RF_BW1600KHZ_IF2000KHZ (10 << 0)
#define RF_BW1250KHZ_IF2000KHZ (9 << 0)
#define RF_BW1000KHZ_IF1000KHZ (8 << 0)
#define RF_BW800KHZ_IF1000KHZ (7 << 0)
#define RF_BW630KHZ_IF1000KHZ (6 << 0)
#define RF_BW500KHZ_IF500KHZ (5 << 0)
#define RF_BW400KHZ_IF500KHZ (4 << 0)
#define RF_BW320KHZ_IF500KHZ (3 << 0)
#define RF_BW250KHZ_IF250KHZ (2 << 0)
#define RF_BW200KHZ_IF250KHZ (1 << 0)
#define RF_BW160KHZ_IF250KHZ (0 << 0)
#define IFS (1 << 4)
// RF_TXCUTC
#define PARAMP 0xC0
#define RF_PARAMP32U (3 << 6)
#define RF_PARAMP16U (2 << 6)
#define RF_PARAMP8U (1 << 6)
#define RF_PARAMP4U (0 << 6)
#define LPFCUT 0x0F
#define RF_FLC80KHZ (0 << 0)
#define RF_FLC100KHZ (1 << 0)
#define RF_FLC125KHZ (2 << 0)
#define RF_FLC160KHZ (3 << 0)
#define RF_FLC200KHZ (4 << 0)
#define RF_FLC250KHZ (5 << 0)
#define RF_FLC315KHZ (6 << 0)
#define RF_FLC400KHZ (7 << 0)
#define RF_FLC500KHZ (8 << 0)
#define RF_FLC625KHZ (9 << 0)
#define RF_FLC800KHZ (10 << 0)
#define RF_FLC1000KHZ (11 << 0)
// RF_TXDFE, RF_RXDFE
#define RCUT 0xE0
#define RCUT_4 (4 << 5)
#define RCUT_3 (3 << 5)
#define RCUT_2 (2 << 5)
#define RCUT_1 (1 << 5)
#define RCUT_0 (0 << 5)
#define SR 0x0F
#define SR_10 (10 << 0)
#define SR_8 (8 << 0)
#define SR_6 (6 << 0)
#define SR_5 (5 << 0)
#define SR_4 (4 << 0)
#define SR_3 (3 << 0)
#define SR_2 (2 << 0)
#define SR_1 (1 << 0)
// BBC_OFDMPHRTX
#define MCS 0x07
#define MCS_0 (0 << 0)
#define MCS_1 (1 << 0)
#define MCS_2 (2 << 0)
#define MCS_3 (3 << 0)
#define MCS_4 (4 << 0)
#define MCS_5 (5 << 0)
#define MCS_6 (6 << 0)
// BBC_OFDMC
#define SSRX 0xC0
#define SSRX_0 (0 << 6)
#define SSRX_1 (1 << 6)
#define SSRX_2 (2 << 6)
#define SSRX_3 (3 << 6)
#define SSTX 0x30
#define SSTX_0 (0 << 4)
#define SSTX_1 (1 << 4)
#define SSTX_2 (2 << 4)
#define SSTX_3 (3 << 4)
#define LFO (1 << 3)
#define POI (1 << 2)
#define OPT 0x03
#define OPT_1 (0 << 0)
#define OPT_2 (1 << 0)
#define OPT_3 (2 << 0)
#define OPT_4 (3 << 0)
// BBC_OFDMSW
#define OFDM_PDT 0xE0
#define OFDM_PDT_5 (5 << 5)
#define OFDM_PDT_4 (4 << 5)
#define OFDM_PDT_3 (3 << 5)
// BBC_FSKC0
#define BT 0xC0
#define BT_20 (3 << 6)
#define BT_10 (1 << 6)
#define MIDXS 0x30
#define MIDXS_0 (0 << 4)
#define MIDX 0x0E
#define MIDX_10 (3 << 1)
#define MIDX_075 (2 << 1)
#define MIDX_05 (1 << 1)
#define MIDX_0375 (0 << 1)
// BBC_FSKC1
#define SRATE 0x0F
#define SRATE_400KHZ (5 << 0)
#define SRATE_300KHZ (4 << 0)
#define SRATE_200KHZ (3 << 0)
#define SRATE_150KHZ (2 << 0)
#define SRATE_100KHZ (1 << 0)
#define SRATE_50KHZ (0 << 0)
// BBC_FSKC2
#define RXO 0x60
#define RXO_DIS (0 << 5)
#define FECIE (1 << 0)
// BBC_FSKC3
#define SFDT 0xF0
#define PDT 0x0F
#define PDT_6 (6 << 0)
// BBC_AFFTM
#define TYPE_2 (1 << 2)
// BBC_AFC0
#define PM (1 << 4)
#define AFEN3 (1 << 3)
#define AFEN2 (1 << 2)
#define AFEN1 (1 << 1)
#define AFEN0 (1 << 0)
// BBC_OQPSKPHRTX
#define LEG (1 << 0)
// BBC_OQPSKC0
#define FCHIP 0x03
#define BB_FCHIP100 (0 << 0)
#define BB_FCHIP200 (1 << 0)
#define BB_FCHIP1000 (2 << 0)
#define BB_FCHIP2000 (3 << 0)
// BBC_OQPSKC2
#define FCSTLEG 0x04
#define RXM 0x03
#define FCS_16 (1 << 2)
#define RXM_2 (2 << 0)
// BBC_IRQS, BBC_IRQM
#define FBLI (1 << 7)
#define AGCR (1 << 6)
#define AGCH (1 << 5)
#define TXFE (1 << 4)
#define RXEM (1 << 3)
#define RXAM (1 << 2)
#define RXFE (1 << 1)
#define RXFS (1 << 0)
//BBC_PC
#define BBEN (1 << 2)
#define PT 0x03
#define BB_PHYOFF (0 << 0)
#define BB_MRFSK (1 << 0)
#define BB_MROFDM (2 << 0)
#define BB_MROQPSK (3 << 0)
#define FCSOK (1 << 5)
#define TXAFCS (1 << 4)
#define FCST (1 << 3)
#define FCSFE (1 << 6)
//BBC_AMCS
#define AACKFT (1 << 7)
#define AACK (1 << 3)
#define CCAED (1 << 2)
// RF_IQIFC1
#define CHPM 0x70
#define RF_MODE_BBRF (0 << 4)
#define RF_MODE_RF (1 << 4)
#define RF_MODE_BBRF09 (4 << 4)
#define RF_MODE_BBRF24 (5 << 4)
/*RF_CFG bits*/
#define IRQMM 0x08
#define IRQP 0x04
/*RFn_IRQM bits*/
#define TRXRDY (1 << 1)
#define EDC (1 << 2)
/*RFn_EDC bits*/
#define EDM 0x03
#define RF_EDAUTO (0 << 0)
#define RF_EDSINGLE (1 << 0)
#define RF_EDCONT (2 << 0)
#define RF_EDOFF (3 << 0)
/*Masks*/
#define CNH 0x01
#define EDM 0x03
#define CHPM 0x70
#ifdef __cplusplus
}
#endif
#endif /* AT86RF215REG_H_ */

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connectivity/drivers/802.15.4_RF/atmel-rf-driver/source/AT86RFReg.h Normal file
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/*
* Copyright (c) 2014-2015 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef AT86RFREG_H_
#define AT86RFREG_H_
#ifdef __cplusplus
extern "C" {
#endif
/*AT86RF212 PHY Modes*/
#define BPSK_20 0x00
#define BPSK_40 0x04
#define BPSK_40_ALT 0x14
#define OQPSK_SIN_RC_100 0x08
#define OQPSK_SIN_RC_200 0x09
#define OQPSK_RC_100 0x18
#define OQPSK_RC_200 0x19
#define OQPSK_SIN_250 0x0c
#define OQPSK_SIN_500 0x0d
#define OQPSK_SIN_500_ALT 0x0f
#define OQPSK_RC_250 0x1c
#define OQPSK_RC_500 0x1d
#define OQPSK_RC_500_ALT 0x1f
#define OQPSK_SIN_RC_400_SCR_ON 0x2A
#define OQPSK_SIN_RC_400_SCR_OFF 0x0A
#define OQPSK_RC_400_SCR_ON 0x3A
#define OQPSK_RC_400_SCR_OFF 0x1A
#define OQPSK_SIN_1000_SCR_ON 0x2E
#define OQPSK_SIN_1000_SCR_OFF 0x0E
#define OQPSK_RC_1000_SCR_ON 0x3E
#define OQPSK_RC_1000_SCR_OFF 0x1E
/*Supported transceivers*/
#define PART_AT86RF231 0x03
#define PART_AT86RF212 0x07
#define PART_AT86RF233 0x0B
#define PART_AT86RF215 0x34
#define PART_AT86RF215M 0x36
#define VERSION_AT86RF212 0x01
#define VERSION_AT86RF212B 0x03
/*RF Configuration Registers*/
#define TRX_STATUS 0x01
#define TRX_STATE 0x02
#define TRX_CTRL_0 0x03
#define TRX_CTRL_1 0x04
#define PHY_TX_PWR 0x05
#define PHY_RSSI 0x06
#define PHY_ED_LEVEL 0x07
#define PHY_CC_CCA 0x08
#define RX_CTRL 0x0A
#define SFD_VALUE 0x0B
#define TRX_CTRL_2 0x0C
#define ANT_DIV 0x0D
#define IRQ_MASK 0x0E
#define IRQ_STATUS 0x0F
#define VREG_CTRL 0x10
#define BATMON 0x11
#define XOSC_CTRL 0x12
#define CC_CTRL_0 0x13
#define CC_CTRL_1 0x14
#define RX_SYN 0x15
#define TRX_RPC 0x16
#define RF_CTRL_0 0x16
#define XAH_CTRL_1 0x17
#define FTN_CTRL 0x18
#define PLL_CF 0x1A
#define PLL_DCU 0x1B
#define PART_NUM 0x1C
#define VERSION_NUM 0x1D
#define MAN_ID_0 0x1E
#define MAN_ID_1 0x1F
#define SHORT_ADDR_0 0x20
#define SHORT_ADDR_1 0x21
#define PAN_ID_0 0x22
#define PAN_ID_1 0x23
#define IEEE_ADDR_0 0x24
#define IEEE_ADDR_1 0x25
#define IEEE_ADDR_2 0x26
#define IEEE_ADDR_3 0x27
#define IEEE_ADDR_4 0x28
#define IEEE_ADDR_5 0x29
#define IEEE_ADDR_6 0x2A
#define IEEE_ADDR_7 0x2B
#define XAH_CTRL_0 0x2C
#define CSMA_SEED_0 0x2D
#define CSMA_SEED_1 0x2E
#define CSMA_BE 0x2F
/* CSMA_SEED_1*/
#define AACK_FVN_MODE1 7
#define AACK_FVN_MODE0 6
#define AACK_SET_PD 5
#define AACK_DIS_ACK 4
#define AACK_I_AM_COORD 3
#define CSMA_SEED_12 2
#define CSMA_SEED_11 1
#define CSMA_SEED_10 0
/*TRX_STATUS bits*/
#define CCA_STATUS 0x40
#define CCA_DONE 0x80
/*PHY_CC_CCA bits*/
#define CCA_REQUEST 0x80
#define CCA_MODE_3A 0x00
#define CCA_MODE_1 0x20
#define CCA_MODE_2 0x40
#define CCA_MODE_3B 0x60
#define CCA_MODE_MASK 0x60
#define CCA_CHANNEL_MASK 0x1F
/*IRQ_MASK bits*/
#define RX_START 0x04
#define TRX_END 0x08
#define CCA_ED_DONE 0x10
#define AMI 0x20
#define TRX_UR 0x40
/*ANT_DIV bits*/
#define ANT_DIV_EN 0x08
#define ANT_EXT_SW_EN 0x04
#define ANT_CTRL_DEFAULT 0x03
/*TRX_CTRL_1 bits*/
#define PA_EXT_EN 0x80
#define TX_AUTO_CRC_ON 0x20
#define SPI_CMD_MODE_TRX_STATUS 0x04
#define SPI_CMD_MODE_PHY_RSSI 0x08
#define SPI_CMD_MODE_IRQ_STATUS 0x0C
/*TRX_CTRL_2 bits*/
#define RX_SAFE_MODE 0x80
/*FTN_CTRL bits*/
#define FTN_START 0x80
/*PHY_RSSI bits*/
#define CRC_VALID 0x80
/*RX_SYN bits*/
#define RX_PDT_DIS 0x80
/*TRX_RPC bits */
#define RX_RPC_CTRL 0xC0
#define RX_RPC_EN 0x20
#define PDT_RPC_EN 0x10
#define PLL_RPC_EN 0x08
#define XAH_TX_RPC_EN 0x04
#define IPAN_RPC_EN 0x02
#define TRX_RPC_RSVD_1 0x01
/*XAH_CTRL_1 bits*/
#define AACK_PROM_MODE 0x02
#ifdef __cplusplus
}
#endif
#endif /* AT86RFREG_H_ */

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/*
* Copyright (c) 2016-2016 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "at24mac.h"
#if DEVICE_I2C
/* Device addressing */
#define AT24MAC_EEPROM_ADDRESS (0x0A<<4)
#define AT24MAC_RW_PROTECT_ADDRESS (0x06<<4)
#define AT24MAC_SERIAL_ADDRESS (0x0B<<4)
/* Known memory blocks */
#define AT24MAC_SERIAL_OFFSET (0x80)
#define AT24MAC_EUI64_OFFSET (0x98)
#define AT24MAC_EUI48_OFFSET (0x9A)
#define SERIAL_LEN 16
#define EUI64_LEN 8
#define EUI48_LEN 6
using namespace mbed;
AT24Mac::AT24Mac(PinName sda, PinName scl) : _i2c(sda, scl)
{
// Do nothing
}
int AT24Mac::read_serial(void *buf)
{
char offset = AT24MAC_SERIAL_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, SERIAL_LEN);
}
int AT24Mac::read_eui64(void *buf)
{
char offset = AT24MAC_EUI64_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI64_LEN);
}
int AT24Mac::read_eui48(void *buf)
{
char offset = AT24MAC_EUI48_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI48_LEN);
}
#endif /* DEVICE_I2C */

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/*
* Copyright (c) 2014-2015 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef AT24MAC_H
#define AT24MAC_H
#include "PinNames.h"
#if DEVICE_I2C
#include "I2C.h"
#include "drivers/DigitalInOut.h"
#include "platform/mbed_wait_api.h"
/*
* AT24MAC drivers.
*
* This is a EEPROM chip designed to contain factory programmed read-only EUI-64 or EUI-48,
* a 128bit serial number and some user programmable EEPROM.
*
* AT24MAC602 contains EUI-64, use read_eui64()
* AT24MAC402 contains EUI-64, use read_eui48()
*
* NOTE: You cannot use both EUI-64 and EUI-48. Chip contains only one of those.
*/
class AT24Mac {
public:
AT24Mac(PinName sda, PinName scl);
/**
* Read unique serial number from chip.
* \param buf pointer to write serial number to. Must have space for 16 bytes.
* \return zero on success, negative number on failure
*/
int read_serial(void *buf);
/**
* Read EUI-64 from chip.
* \param buf pointer to write EUI-64 to. Must have space for 8 bytes.
* \return zero on success, negative number on failure
*/
int read_eui64(void *buf);
/**
* Read EUI-48 from chip.
* \param buf pointer to write EUI-48 to. Must have space for 6 bytes.
* \return zero on success, negative number on failure
*/
int read_eui48(void *buf);
private:
mbed::I2C _i2c;
};
#endif /* DEVICE_I2C */
#endif /* AT24MAC_H */

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/*
* Copyright (c) 2020 ARM Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef RFBITS_H_
#define RFBITS_H_
#include "DigitalIn.h"
#include "DigitalOut.h"
#include "InterruptIn.h"
#include "SPI.h"
#include <Timer.h>
#include "Timeout.h"
#include "rtos.h"
using namespace mbed;
using namespace rtos;
class UnlockedSPI : public SPI {
public:
UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
SPI(mosi, miso, sclk) { }
virtual void lock() { }
virtual void unlock() { }
};
class RFBits {
public:
RFBits(PinName spi_mosi, PinName spi_miso,
PinName spi_sclk, PinName spi_cs,
PinName spi_rst, PinName spi_slp, PinName spi_irq);
UnlockedSPI spi;
DigitalOut CS;
DigitalOut RST;
DigitalOut SLP_TR;
InterruptIn IRQ;
Timeout ack_timer;
Timeout cal_timer;
Timeout cca_timer;
Timer tx_timer;
int init_215_driver(RFBits *_rf, TestPins *_test_pins, const uint8_t mac[8], uint8_t *rf_part_num);
int init_se2435_pa(Se2435Pins *_se2435_pa_pins);
#ifdef MBED_CONF_RTOS_PRESENT
Thread irq_thread;
Thread irq_thread_215;
Mutex mutex;
void rf_if_irq_task();
void rf_irq_task();
#endif
};
class TestPins {
public:
TestPins(PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, PinName test_pin_4, PinName test_pin_5);
DigitalOut TEST1;
DigitalOut TEST2;
DigitalOut TEST3;
DigitalOut TEST4;
DigitalOut TEST5;
};
class Se2435Pins {
public:
Se2435Pins(PinName csd_pin, PinName ant_sel_pin);
DigitalOut CSD;
DigitalOut ANT_SEL;
};
#endif /* RFBITS_H_ */