mbed-os/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/README.md

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CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
# Cortex-M3 Design Start Eval package example on MPS2+ board
This folder includes the port of Mbed OS on the example system of the Cortex-M3
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
Design Start Eval package. This example is implemented in FPGA on the MPS2+
board. Please see this target's [Mbed page](https://os.mbed.com/platforms/ARM-CM3DS/)
for more information.
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
For convenience, this target is called **CM3DS**.
## Compiling
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
The target name is `ARM_CM3DS_MPS2`. You can compile Mbed OS
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
projects for CM3DS with:
```bash
mbed compile -t COMPILER -m ARM_CM3DS_MPS2
```
Mbed OS supports the following compilers (replace `COMPILER` with):
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
* `ARM` for Arm Compiler version 5.
* `GCC_ARM` for GNU Compiler for Arm.
* `IAR` for IAR compiler.
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
## Running
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
Because of the new memory configuration introduced in commit `CM3DS: switch to
larger memories for code and data`, it
has become easier (and portable among all compilers) to use `.elf` files
instead of `.bin`. `.elf` files are now the default for CM3DS projects, and compilation
generates only them.
For `.elf` files to work, you need **at least version 2.2.5** of the MPS2+
firmware. For more information, please see the [firmware version 2.2.6 and instructions on how to put it
in the MPS2+ board](https://community.arm.com/processors/designstart/f/discussions/9727/mps2-firmware-for-mbed).
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
## Testing
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
If you want to execute the Mbed OS greentea tests on CM3DS, you need
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
**at least firmware version 2.2.6**.
* `mbedls` does not automatically recognize which serial port is linked to the
board. Check it manually, and create a file named `mbedls.json` containing
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
(at the same level than where you execute all commands):
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
```bash
{
"50040200074D652F3828F333": {
"serial_port": "/dev/ttyUSB0"
}
}
```
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
Replace `/dev/ttyUSB0` with your correct serial port
(something like `COM6` on Windows).
* `mbedls` does not link CM3DS target ID with its name, so execute the command:
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
```bash
mbedls --mock 5004:ARM_CM3DS_MPS2
```
* You can now compile and run the tests:
CM3DS: switch to larger memories for code and data This patch changes the linker files and defines to use the ZBT SSRAM instead of the FPGA Block RAM for code and data. The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and testbench user guide explains the available memories. This switch improves code memory from 256 kB to 4 MB and data memory from 128 kB to 4 MB. However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the processor can only boot at address 0x00000000 which means that it expects the vector table to be at that address. That is why we have to create 2 load regions in the linker scripts: one with only the vector table at address 0x0 and one with code + data at address 0x00400000. Because of these two load regions, linker will produce different behaviours: * GCC_ARM and IAR will only create 1 binary with both load regions padding with 0 in between. The binary will then be very large (at least 4 MB) and the flash process will take longer. * ARM and ARMC6 will create 2 binaries for the two load regions. The load addresses of the two binaries can be written in the images.txt file on the MPS2 board. You can also use the --bincombined option of fromelf utility to produce only 1 large binary. This patch also adds the memory_zones.h file to try to put in common all the memory addresses that were previously hard coded in the linker scripts / startup files. With that patch in, the simplest option is to directly use the .elf file with the MPS2, which is only possible with mbb_v225.ebf and more recent firmwares. It will now be the default for CM3DS. This commit works with greentea thanks to the now merged pull request ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board. Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-01-08 15:19:48 +00:00
```bash
mbed test -m ARM_CM3DS_MPS2 -t COMPILER
```